Murata LB1PJ Users Manual
Preliminary Specification Number :SP-ZZ1PJ-F
MP Part Number:
LBEE5ZZ1PJ
W-LAN + Bluetooth Module Data Sheet
Qualcomm Chipset
for 802.11a/b/g/n/ac + Bluetooth 4.1 (Dual)
< Specification may be changed by Murata without notice >
Murata(China) Investment Co., Ltd.
Preliminary & Confidential
Preliminary Specification Number : SP-ZZ1PJ-F
Revised
Date
Revision
Code
Revised
Page
Revised Item
Change
Reason
April 21,
2017
-
-
-
First release
June 26,
2017
A
3,4
Module Height
Updated
Aug 2,
2017
B
7, 12~20
Absolute Maximum Rating
Operating Condition
DC/RF Characteristics
Updated
Aug 10,
2017
C
22
Reference circuit
Added
Aug 21,
2017
D
21
Land pattern
Added
Nov 2,
2017
E
7, 24~26
Marking
Tape and Reel packing
Added
Dec 25,
2017
F
4, 31~38
Certification information
Appendix
Added
1 / 38
The revision history of the product specification
Preliminary & Confidential
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Murata(China) Investment Co., Ltd.
Preliminary Specification Number : SP-ZZ1PJ-F
2 / 38
TABLE OF CONTENTS
1. SCOPE ..................................................................................................................................................... 3
2. KEY FEATURE ...................................................................................................................................... 3
3. Part Number ........................................................................................................................................... 3
4. RoHS Compliance ................................................................................................................................... 3
5. Block Diagram ........................................................................................................................................ 3
6. Certification Information ....................................................................................................................... 4
6.1. Radio Certification ................................................................................................................... 4
7. DIMENSIONS, MARKING AND TERMINAL CONFIGURATIONS ................................................. 4
7.1. Dimensions ............................................................................................................................... 4
7.2. Pin Layout and PIN Descriptions ........................................................................................... 5
7.3. Marking ..................................................................................................................................... 7
8. ABSOLUTE MAXIMUM RATINGS
9. OPERATING CONDITION
10. External low–power 32.768 kHz clock............................................................................................... 8
11. POWER ON SEQUENCE .................................................................................................................. 9
*2)
11.1. Case 1: 3.3 V power down after 1.8 V .................................................................................. 9
11.2. Case 2: 1.8 V power down after 3.3 V ................................................................................ 10
11.3. Case 3: All power rails supplied with 3.3 V .......................................................................11
12. Digital I/O Requirements ................................................................................................................. 12
13. INTERFACE TIMING AND AC CHARACTERISTICS ................................................................. 12
13.1. Bluetooth UART Timing .................................................................................................... 12
13.2. I2S Timing ........................................................................................................................... 12
13.3. SDIO Timing ....................................................................................................................... 12
14. DC / RF Characteristics.................................................................................................................... 13
14.1. DC/RF Characteristics for IEEE802.11b - 2.4GHz .......................................................... 13
14.2. DC/RF Characteristics for IEEE802.11g - 2.4GHz .......................................................... 14
14.3. DC/RF Characteristics for IEEE802.11n – 2.4GHz ......................................................... 15
14.4. DC/RF Characteristics for IEEE802.11ac – 2.4GHz ........................................................ 16
14.5. DC/RF Characteristics for IEEE802.11a - 5GHz ............................................................. 17
14.6. DC/RF Characteristics for IEEE802.11n - 5GHz ............................................................. 18
14.7. DC/RF Characteristics for IEEE802.11ac - 5GHz ............................................................ 19
14.8. DC/RF Characteristics for Bluetooth ................................................................................ 20
14.9. DC/RF Characteristics for Bluetooth (LE) ........................................................................ 21
15. LAND PATTERN (TOP VIEW) ........................................................................................................ 22
16. REFERENCE CIRCUIT ................................................................................................................... 23
17. TAPE AND REEL PACKING ........................................................................................................... 24
18. NOTICE ............................................................................................................................................. 27
18.1. Storage Conditions: ............................................................................................................ 27
18.2. Handling Conditions: ......................................................................................................... 27
18.3. Standard PCB Design (Land Pattern and Dimensions): ................................................. 27
18.4. Notice for Chip Placer: ....................................................................................................... 27
18.5. Soldering Conditions: ......................................................................................................... 28
18.6. Cleaning: ............................................................................................................................. 28
18.7. Operational Environment Conditions: .............................................................................. 28
18.8. Input Power Capacity: ........................................................................................................ 29
19. PRECONDITION TO USE OUR PRODUCTS ............................................................................... 30
Please be aware that an important notice concerning availability, standard warranty and use in critical applications of
Murata products and disclaimers thereto appears at the end of this specification sheet.
*1)
................................................................................................... 8
................................................................................................................ 8
Preliminary & Confidential
< Specification may be changed by Murata without notice >
Murata(China) Investment Co., Ltd.
Preliminary Specification Number : SP-ZZ1PJ-F
Ordering Part Number
Description
LBEE5ZZ1PJ
MP order
LBEE5ZZ1PJ-TEMP
In case of sample order
1. SCOPE
This specification is applied to the IEEE802.11a/b/g/n/ac W-LAN + Bluetooth 4.1 combo module.
2. KEY FEATURE
- Chipset : QCA9377-3
- Size : 7.2 x 7.4 x 1.25 (max) mm
- PCB w/ shielded resin mold module
- IEEE802.11a/b/g/n/ac dual band 2.4G/5G
- Supports BT4.1
- SDIO 3.0 (WLAN), UART/PCM (Bluetooth)
- Lead Free Module
3. Part Number
4. RoHS Compliance
This module is compliant with the RoHS directive.
5. Block Diagram
3 / 38
Preliminary & Confidential
< Specification may be changed by Murata without notice >
Murata(China) Investment Co., Ltd.
Preliminary Specification Number : SP-ZZ1PJ-F
FCC ID
VPYLB1PJ
IC
772C-LB1PJ
Mark
Dimension
Mark
Dimension
Mark
Dimension
L
7.40±0.20
W
7.20±0.20
T
1.25 max
a1
0.30±0.10
a2
0.30±0.10
a3
0.30±0.10
a4
0.80±0.10
a5
0.30±0.10
b1
0.20±0.15
b2
0.25±0.15
b3
1.45±0.15
b4
5.15±0.15
b5
0.20±0.15
b6
1.05±0.15
b7
1.35±0.15
b8
1.55±0.15
c1
0.55±0.10
c2
0.55±0.10
c3
0.55±0.10
c4
0.80±0.10
c5
0.30±0.10
e1
0.30±0.10
e2
0.30±0.10
e3
0.30±0.10
e4
0.30±0.10
e5
0.30±0.10
6. Certification Information
6.1. Radio Certification
USA/Canada
*Please follow installation manual in Appendix
Europe
EN300328 v2.1.1, EN301893 v2.1.1 and EN300440 v2.1.1 test reports are prepared.
7. DIMENSIONS, MARKING AND TERMINAL CONFIGURATIONS
7.1. Dimensions
<TOP VIEW> <BOTTOM VIEW>
4 / 38
<SIDE VIEW>
Table 1 Dimension (Unit: mm)
(unit : mm)
Preliminary & Confidential
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Murata(China) Investment Co., Ltd.
Preliminary Specification Number : SP-ZZ1PJ-F
Pin
NO.
Terminal Name
Type
VDDIO or
pad voltage
Connection to
IC terminal
Description
1
GND
Ground
- - Ground
2
VBUCK_GND_PM
Ground
-
VBUCK_GND_PM
Ground for internal 1.1 V regulator
3
PWM_PM
O
1.1V
PWM_PM
SWREG PMU 1.1V output.
4
VDD11_PM
I
1.1V
VDD11_PM
1.1 V voltage feedback to SWREG PMU.
5
GND
Ground
- - Ground
6
SDIO_DATA3
I/O
VDDIO_SDIO
SDIO_D3
SDIO data bus D3
7
SDIO_DATA2
I/O
VDDIO_SDIO
SDIO_D2
SDIO data bus D2
8
SDIO_DATA1
I/O
VDDIO_SDIO
SDIO_D1
SDIO data bus D1
9
SDIO_DATA0
I/O
VDDIO_SDIO
SDIO_D0
SDIO data bus D0
10
SDIO_CMD
I
VDDIO_SDIO
SDIO_CMD
SDIO CMD line signal
11
SDIO_CLK
OD
(1)
VDDIO_SDIO
SDIO_CLK
SDIO clock signal
12
VDDIO_SDIO
Power
1.8V or 3.3V
VDDIO_SDIO
Voltage supply for SDIO
13
SDIO_INTERRUPT_L
O
VDDIO_SDIO
SDIO_INTERRUPT_L
SDIO interrupt signal
14
GND
Ground
- - Ground
15
32KHz_CLK_IN
I
VDDIO_GPIO2
LF_CLK_IN
External low–power 32.768 kHz clock input
16
VDDIO_GPIO2
Power
1.8V or 3.3V
VDDIO_GPIO2
Voltage supply
17
HCI_UART_WAKEHOST
OD
(1)
VDDIO_GPIO2
HCI_UART_WAKEHOST
Bluetooth wakeup host. Active high
18
WLAN_RF_KILL_L
I
VDDIO_GPIO2
WLAN_RFKILL_L
Turn off WLAN RF analog and front–end.
Active low.
19
GND
Ground
- - Ground
20
2G_WIFI/BT_RF_OUT
A,O - -
2G WIFI and BT output
21
GND
Ground
- - Ground
22
2G_WIFI/BT_RF_IN
A, I - -
2G WIFI and BT input
23
GND
Ground
- - Ground
24
ANT
A, I/O
- - RF Transmit / Receive Antenna
25
GND
Ground
- - Ground
Top View
7.2. Pin Layout and PIN Descriptions
5 / 38
Table 2 Terminal Configurations
Preliminary & Confidential
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Murata(China) Investment Co., Ltd.
Preliminary Specification Number : SP-ZZ1PJ-F
26
3D_FRAME_SYNC
I
VDDIO_GPIO1
3D_FRAME_SYNC
Frame sync signal from TV to sync with 3D
glass via Bluetooth.
27
HCI_UART_RXD
I
VDDIO_GPIO1
HCI_UART_RXD
UART RXD signal
28
HCI_UART_TXD
O
VDDIO_GPIO1
HCI_UART_TXD
UART TXD signal
29
HCI_UART_RTS
O
VDDIO_GPIO1
HCI_UART_RTS
UART RTS signal
30
HCI_UART_CTS
I
VDDIO_GPIO1
HCI_UART_CTS
UART CTS signal
31
PCM_CLK
I
VDDIO_GPIO1
BT_I2S_SCK
Bluetooth PCM_CLK signal
32
PCM_SYNC
I/O
VDDIO_GPIO1
BT_I2S_WS
Bluetooth PCM_SYNC signal
33
PCM_IN
OD
(1)
VDDIO_GPIO1
BT_I2S_SDI
Bluetooth PCM_IN signal
34
PCM_OUT
O
VDDIO_GPIO1
BT_I2S_SDO
Bluetooth PCM_OUT signal
35
GND
Ground
- - Ground
36
VDDIO_XTAL
Power
1.8V or 3.3V
VDDIO_XTAL
Voltage supply for XTAL
37
VDDIO_GPIO1
Power
1.8V or 3.3V
VDDIO_GPIO1
Voltage supply
38
GND
Ground
- - Ground
39
WLAN_EN
I
VDDIO_AO
WL_EN
WLAN enable. Active high
40
BT_EN
I
VDDIO_AO
BT_EN
Bluetooth enable. Active high
41
VDD_3P3
Power
3.3V
VDD33_PM
3.3 V input voltage
42
VDDIO_AO
Power
1.8V or 3.3V
VDDIO_AO_PM
Always–on I/O supply for power
management and real–time clock. This
supply must be present if any other supply
is present.
43
GND
Ground
- - Ground
44
LTE_UART_RXD
I
VDDIO_GPIO1
LTE_UART_RXD
LTE coexistence signal.
LTE_UART_RXD or LTE_FS.
45
LTE_UART_TXD
O
VDDIO_GPIO1
LTE_UART_TXD
LTE co– existence signal.
LTE_UART_TXD or LTE_PRI.
46
CLK_REQ
O
VDDIO_GPIO1
CLK_REQ
Clock request output
47
DBG_UART_TXD
OD
(1)
VDDIO_AO
GPIO[19]
DBG_UART_TXD
48
DBG_UART_RXD
OD
(1)
VDDIO_GPIO2
GPIO[18]
DBG_UART_RXD
49
QOW
OD
(1)
VDDIO_GPIO2
QOW
This signal can be used to enable for
external Wireless charging UART circuit.
50~
62
GND
Ground
- - Ground
6 / 38
(1) OD means this PIN is a digital output signal with open drain, an external pull-up or pull-down resistor is needed when this PIN is
used.
Preliminary & Confidential
< Specification may be changed by Murata without notice >
Murata(China) Investment Co., Ltd.
7.3. Marking
Marking
Meaning
A
Pin 1 Marking
B
Inspection Number
C
Module P/N
D
Murata Logo
Preliminary Specification Number : SP-ZZ1PJ-F
7 / 38
Preliminary & Confidential
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Murata(China) Investment Co., Ltd.
Preliminary Specification Number : SP-ZZ1PJ-F
Parameter
min.
max.
Unit
Storage Temperature
TBD
TBD
deg.C
Supply Voltage
VDD_3P3
-0.3
3.65
V
VDDIO_SDIO
VDDIO_GPIO1
VDDIO_GPIO2
VDDIO_XTAL
VDDIO_AO
-0.3
3.6
V
Parameter
min.
typ.
max.
unit
Operating Temperature
-40 - 85
deg.C
Specification Temperature range
TBD
TBD
TBD
deg.C
Supply Voltage
VDD_3P3
3.135
3.3
3.465
V
VDDIO_SDIO
VDDIO_GPIO1
VDDIO_GPIO2
VDDIO_XTAL
VDDIO_AO
1.71
1.8 or 3.3
3.46
V
8. ABSOLUTE MAXIMUM RATINGS
*1)
*1)
Stresses in excess of the absolute ratings may cause permanent damage. Functional operation
is not implied under these conditions. Exposure to absolute ratings for extended periods of time
may adversely affect reliability. No damage assuming only one parameter is set at limit at a time
with all other parameters are set within operating condition.
9. OPERATING CONDITION
*2)
8 / 38
*2)
Functionality is guaranteed but the specifications require the derating at over-temperatures,
over-voltage condition.
10. External low–power 32.768 kHz clock
TBD
Preliminary & Confidential
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Murata(China) Investment Co., Ltd.
Preliminary Specification Number : SP-ZZ1PJ-F
Symbol
Parameter
Min
Max
Units
ta1
No requirement if VDDIO_AO connected to 3.3 V
0 - μs
ta2
90% of 3.3 V to 10% of 1.8 V
0 0 μs
ta3
90% of VDDIO_GPIO to 0.7 V of both WLAN_EN and BT_EN
10 - μs
ta4
WLAN_EN valid to LF_CLK_IN input
0 - μs
ta5
WLAN_EN valid to VDD11AO_PM_OUT established
-
50
μs
ta6
WLAN_EN to DVDD11
-
3.5
ms
ta7
WLAN_EN to AVDD11
- 4 ms
VDD_3.3 (3.3V)
11. POWER ON SEQUENCE
11.1. Case 1: 3.3 V power down after 1.8 V
If the battery source can be removed from the end user device (battery removed, AC/DC plugged
in), this is the recommended power sequence. It will avoid violating the power off sequence by
allowing the 3.3 V rail to shut down after the 1.8 V rail.
Notes:
1. VDDIO_GPIO voltage should match VIO voltage from the host. In some applications,
VDDIO_GPIO may connected to 3.3 V upon Host VIO voltage.
2. In this case, both WLAN_EN and BT_EN on the 1PJ are at 3.3 V due to using the VDD_AO
power rail. If the host VIO voltage is 1.8 V, it must have level shifters to interface with host.
3. All host interface signals must stay floating or low before valid power on sequence (WLAN_EN
and BT-EN goes high).
9 / 38
Preliminary & Confidential
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Murata(China) Investment Co., Ltd.
Preliminary Specification Number : SP-ZZ1PJ-F
ta8
AVDD11 to XTAL clock stable
1 - ms
ta9
WLAN_EN de-assert (“low”) to LF_CLK_IN de-assert
(tristate or low)
0 - μs
t
a10
Both WLAN_EN = low and BT_EN = low to 90% of 1.8 V
10 - μs
t
a11
3.3 V always higher than 1.8 V during operation, with power
off by removing battery or unplugging AC/DC
0 - μs
t
a12
VDDIO_AO and VDDIO_XTAL should be connected to 3.3 V
power rail
0 - μs
Symbol
Parameter
Min
Max
Units
tb1
No requirement if VDDIO_AO connected to 1.8 V
0 - μs
tb2
90% of 1.8 V to 10% of 3.3 V
0 - μs
tb3
90% of 3.3 V to 0.7 V of both WLAN_EN and BT_EN
10 - μs
VDD_3.3 (3.3V)
11.2. Case 2: 1.8 V power down after 3.3 V
If the battery source cannot be removed from the end user device, this is the recommended
power sequence for this application. This sequence allows the software to control the power
on/off sequence.
Notes:
1. VDDIO_GPIO voltage should match VIO voltage from the host. In some applications,
VDDIO_GPIO may connected to 3.3 V upon host VIO voltage.
2. Both WLAN_EN and BT_EN of 1PJ are 1.8 V. If host VIO voltage is 1.8 V, it does
not need level shifter to interface with host.
3. All host interface signals must stay floating or low before WLAN_EN/BT_EN =”high”, and
after WLAN_EN/BT_EN = Low.
10 / 38
Preliminary & Confidential
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Murata(China) Investment Co., Ltd.
Preliminary Specification Number : SP-ZZ1PJ-F
tb4
WLAN_EN valid to LF_CLK_IN input
0 - μs
tb5
WLAN_EN valid to VDD11AO_PM_OUT established
-
50
μs
tb6
WLAN_EN to DVDD11
-
3.5
ms
tb7
WLAN_EN to AVDD11
4 ms
tb8
AVDD11 to XTAL clock stable
1 - ms
tb9
WLAN_EN de-assert (“low”) to LF_CLK_IN de-assert
(tristate or low)
0 - μs
t
b10
Both WLAN_EN = low and BT_EN = low to 90% of 3.3 V
10 - μs
t
b11
10% of 3.3 V to 90% of 1.8 V
0 - μs
t
b12
VDDIO_AO and VDDIO_XTAL should be connected to 1.8 V
power rail
0 - μs
Symbol
Parameter
Min
Max
Units
tc1
90% of 3.3 V to 0.7 V of both WLAN_EN and BT_EN
0 - μs
tc4
WLAN_EN valid to LF_CLK_IN input
0 - μs
tc5
WLAN_EN valid to VDD11AO_PM_OUT established
-
50
μs
tc6
WLAN_EN to DVDD11
-
3.5
ms
tc7
WLAN_EN to AVDD11
- 4 ms
VDD_3.3 (3.3V)
11.3. Case 3: All power rails supplied with 3.3 V
All power pins are connected to 3.3 V only include VDDIO_AO, VDDIO_XTAL, VDDIO_GPIOx.
Notes:
All host signals are either GND or floating before WLAN_EN/BT_EN =”high”, and after
WLAN_EN/BT_EN = Low.
11 / 38
Preliminary & Confidential
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