5
4
3
2
1
MSI
D D
MS-7642 Ver:10
CPU:
AMD AM3 (HT 3.0)
Title Page
Cover Sheet 1
GPIO Configuration
2 Block Diagram
3
Clock Distribution 4
System Chipset:
AMD/ATI RS880D
AMD/ATI SB850
On Board Chipset:
FINTEK Super I/O -- F71889
LAN -- RTL8111DL
HD Codec -- ALC889
USB3.0 -- NEC uPD720200
C C
PATA -- JMICRON JMB368
BIOS -- SPI ROM 8M
Main Memory:
DDR III X 4 (Max 8GB)
Power Deliver Chart
ISL6323 3+1 Phase
Clock-Gen RTM880N-793
AMD AM3 941
FIRST LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
RS880D
SB850
PCI EXPRESS switch
PCI EXPRESS X16 SLOT
PCI Slot & PCI EXPRESS X1 SLOT
Expansion Slots:
PCI-E X 16 *2
PCI-E X 1 *1
PCI 2.2 Slot X 1
USB connectors
VGA CONN
HDMI / DVI CONNECTOR
LAN - Realtek 8111DL
Clock Generator:
Controller--REALTEK RTM880N-793
B B
PWM:
ISL6323+ISL6212
USB3.0 NEC uPD720200
PATA JMB368
Azalia Codec-ALC889
LPC-F71889
COM/LPT/FAN
SYSTEM POWER
ATX/Front Panel
BOM - Option Parts
POWER OK MAP
RESET MAP
History
5
6
7
8, 9,10
11
12
13,14, 15,16
18,19, 20,21
22
23
24
25
26
27
28
29
30
31
32
33
34,35,36
37
38
39
40
41
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
1
Cover Sheet
Cover Sheet
Cover Sheet
MS-7642
MS-7642
MS-7642
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Sheet
Sheet
Sheet
of
1 41
of
1 41
of
1 41
Rev
Rev
Rev
0A
0A
0A
5
4
3
2
1
Project RS-880D BLOCK DIAGRAM
UNBUFFERED
D D
AMD CPU
AM3 SOCKET
16x16 HyperTransport LINK
IN
Side port
DVI CON
HDMI CON
D-SUB
TMDS
RGB
OUT
RS880
HyperTransport LINK0 CPU I/F
64bit
64bit
DDR3 128MB
DDRIII DIMM1
UNBUFFERED
DDRIII DIMM2
DDRIII FIRST LOGICAL DIMM DDRIII SECOND LOGICAL DIMM
UNBUFFERED
DDRIII DIMM3
UNBUFFERED
DDRIII DIMM4
1 16X PCIE VIDEO I/F
USB 2.0
1 4X PCIE I/F WITH SB
3 1X PCIE I/F
A-LINK
4X PCIE
ATI SB850
USB2.0 (14)
SATA2 (6 PORTS)
HD AUDIO 1.0
ACPI 1.1
SPI I/F
1X PCIE GEN2
HD AUDIO I/F
SERIAL ATA 2.0
JMB368 PATA
AZALIA CODEC
SATA#0 SATA#1 SATA#2 SATA#3
SATA#4 SATA#5
PCIE GFX
PCIE x8 (LOWER LANES)
16X or 8X
C C
PCIE GFX
8X
USB3.0 USB3.0
USB-4 USB-5
REAR REAR
B B
USB-13 USB-12
USB-11 USB-10
PCIE x8
PCIE x8
USB3.0
uPD720200
Front Front Front Front
PCIE x8 (UPPER LANES)
SWITCH
4X1 PCIE INTERFACE
Realtek
8111DL
REAR REAR
PCIE x1 SLOT
USB-1 USB-2 USB-3
REAR REAR
USB-7 USB-8 USB-9
Front Front Front Front
USB-0
USB-6
PCI BUS
PCI/PCI BRIDGE
ACPI CONTROLLER
uPI
CPU CORE POWER
NB CORE POWER
ISL6323CR
PCI SLOT 1
SPI Bus
LPC BUS
SPI ROM 8M
CPU VLDT Power
RS880 CORE POWER
PCIE & SB POWER
DUAL POWER
A A
DDRIII DRAM POWER
Fintek 71889
TPM Pin Header
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
ATX CON
5
4
KBD
MOUSE
SERIAL
PORT
LPT
PORT
3
2
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
BLOCK Diagram
BLOCK Diagram
BLOCK Diagram
MS-7642
MS-7642
MS-7642
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Sheet
Sheet
Sheet
1
2 41
2 41
2 41
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
SB850 GPIO Config
GPIO Name Type Function description Pin Page
I
PCI_PME#/GEVENT3# LPC_PME#
LPC_PME#/GEVENT4#
WAKE#/GEVENT8# WAKE#
USB_OC0#/GEVENT12#
D D
USB_OC1#/GEVENT13# USB_OC1#
SYS_RESET#/GEVENT19#
SERIRQ/GPIO48
GPIO50
SATA_ACT#/GPIO67
TALERT#/GPIO174
C C
I
I
I
I
I
I
I/O
I
O
I
GA20IN GA20IN/GEVENT0#
PCIPME#
USB_OC0#
SYS_RESET#
SERIRQ
DUALX8_EN#
SATA_ACT#
TALERT#
4
3
2
1
F71889 GPIO Config
GPIO Name Type Function description Pin Page
GPIO27
GPIO26
GPIO00
I
I
DISPLAY_TYPE
CPU_FAN_TYPE
KB_SEL O
B B
PCI Config.
DEVICE MCP1 INT Pin REQ#/GNT#
IDSEL
PCI_INTE#
PCI Slot 1
PCI_INTF#
PCI_INTG#
PREQ#0
PGNT#0
AD21
PCI_INTH#
A A
5
4
3
CLOCK
PCICLK0
2
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
GPIO Configuration
GPIO Configuration
GPIO Configuration
MS-7642
MS-7642
MS-7642
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Sheet
Sheet
Sheet
1
of
3 41
of
3 41
of
3 41
Rev
Rev
Rev
0A
0A
0A
5
4
3
2
1
DIMM3 DIMM4
D D
DIMM1 DIMM2
3 PAIR MEM CLK
3 PAIR MEM CLK
3 PAIR MEM CLK
3 PAIR MEM CLK
AM3 SOCKET
C C
1 PAIR CPU CLK
200MHZ
24MHz
PCIE GPP CLK
B B
USB3.0 u720200
PATA JMB368
100MHZ
PCIE GPP CLK
100MHZ
HT REFCLK
100MHz DIFF RS780
EXTERNAL
CLK GEN.
NB-OSCIN
14.318MHZ
NB ALINK PCIE CLK
100MHZ
SB ALINK PCIE CLK
100MHZ
NB GFX PCIE CLK
100MHZ
PCIE GFX CLK
100MHZ
PCIE GFX CLK
100MHZ
PCIE GPP CLK
100MHZ
PCIE GPP CLK
100MHZ
USB CLK
48MHZ
AMD/ATI NB
RS880D
PCIE GFX SLOT 8 or 16 LANES
PCIE GFX SLOT 8 LANES
PCIE GPP SLOT 1 - 1 LANE
PCIE GBE
25MHZ
OSC
INPUT
25MHz
LAN
CPU_HT_CLK
NB_HT_CLK
25M_48M_66M_OSC
AMD/ATI SB
SB850
NB_DISP_CLK
GPP_CLK3
PCIE_RCLK/
NB_LNK_CLK
SLT_GFX_CLK
GPP_CLK0
GPP_CLK1
GPP_CLK2
USB_CLK
PCI CLK2
33MHZ
PCI CLK1
33MHZ
PCI CLK0
33MHZ
PCI SLOT 0 33MHz
TPM 33MHz
SUPER IO F71882
33MHz
SIO CLK
48MHZ
25MHz
32.768KHz
14.31818MHz
A A
5
External clock mode
Internal clock mode
4
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
3
2
http://www.msi.com.tw
Clock Distribution
Clock Distribution
Clock Distribution
MS-7642
MS-7642
MS-7642
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Sheet
Sheet
Sheet
1
4 41
4 41
4 41
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
Power Deliver Chart
4
3
2
1
2.5V Shunt
Regulator
3VDUAL
VRM SW
REGUALTOR
D D
C C
ATX P/S WITH 1A STBY CURRENT
5V
5VSB
+/-5%
+/-5%
3.3V
+/-5%
12V
+/-5%
-12V
+/-5%
CPU
PW
12V
+/-5%
5VDIMM Linear
REGULATOR
1.5V VDD SW
REGULATOR
3VDUAL Linear
REGULATOR
VDDA25 (S0, S1)
VCCP (S0, S1) / VCC_NB (S0, S1)
0.75V VTT_DDR
REGULATOR
1.2V VCC Linear
REGULATOR
1.3V VCC SW
REGULATOR
1.8V VCC Linear
REGULATOR
1.1V_SB Linear
REGULATOR
VCC_1V3 (S0, S1)
1.1V VCC Linear
REGULATOR
VCC_DDR (S0, S1, S3)
DDRIII DIMMX4
VDD MEM
7.2A
VTT_DDR
2A
VLDT 1.2V (S0, S1)
1.1V VCC Linear
REGULATOR
+1.8V_S0 (S0, S1)
1_1VDUAL
3VDUAL
VCC3 (S0, S1)
+5VA Linear
B B
5VDUAL Linear
REGULATOR
3VSB_LAN Linear
REGULATOR
REGULATOR
+5VA (S0, S1)
AMD AM3 CPU
VDDA 0.25A
VDD
VDDIO 3.6A
VDDR 1.75A
VLDT
NB RS880D
VDDHTTX 1.2V
VDDPCIE 1.1V
VDDHT/RX 1.1V
NB CORE VDDC
1.3V
+1.8V
VDD_MEM 1.5V
AVDD 3.3V
SB850
PCI-E
SATA
SB CORE
CLOCK
1_1VDUAL
3VDUAL
3.3V I/O
AUDIO CODEC
3.3V CORE
5V ANALOG
110A
20AVDDNB
1.4A
0.4A
2.5A
1.3A
1.5A
0.5A
0.2A
1A
1.35A
1.125A
0.4A
0.4A
0.8A
0.2A
0.1A
0.1A
22A
PCI Slot (per slot)
A A
5
5V
3.3V
12V
3.3VDual
-12V
5.0A
7.6A
0.5A
0.375A
0.1A
X1 PCIE per
3.3V
12V
3.3Vaux
X16 PCIE per USB X8 FR
3.0A
3.3V
0.5A
12V
0.1A
3.3VDual
4
3.0A
5.5A
0.1A
X16 PCIE per
3.3V
12V
3.3VDual
3.0A
5.5A
0.1A
VDD
5VDual
4.0A
USB X6 RL 2XPS/2
VDD
5VDual
3.0A
3
5VDual
0.5A
ENTHENET
0.5A 0.7A
USB3.0 x1
3.3VDual 3.3VDual
PATA x1
0.7A
3.3V
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
2
http://www.msi.com.tw
Power Deliver Chart
Power Deliver Chart
Power Deliver Chart
MS-7596
MS-7596
MS-7596
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Sheet
Sheet
Sheet
1
of
5 41
of
5 41
of
5 41
Rev
Rev
Rev
0A
0A
0A
5
B
VCC5
R122
R122
10KR0402
10KR0402
R110
R110
360R1%0402
360R1%0402
C2 X_C1000p50X0402 C2 X_C1000p50X0402
560R1%0402-RH
560R1%0402-RH
VCC_VRM
1
2
+
+
EC3
EC3
CD270u16SO-RH
CD270u16SO-RH
D S
Q2
Q2
+12VIN
R43
R43
10.KR0402
10.KR0402
C E
Q3
Q3
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
C58
C58
X_C680p50X0402-RH
X_C680p50X0402-RH
X_C0.1u16Y0402
X_C0.1u16Y0402
ISEN_NB_A
R105
R105
X_0R0402
X_0R0402
R101 49.9R1%0402 R101 49.9R1%0402
C42
X_C0.1u16Y0402
X_C0.1u16Y0402
R16 2.37KR1%0402R16 2.37KR1%0402
R20
R20
1.1KR1%0402
1.1KR1%0402
C18
C18
X_C0.1u16Y0402
X_C0.1u16Y0402
R49 56KR1%0402 R49 56KR1%0402
C14 C0.1u16X0402 C14 C0.1u16X0402
R42 69.8KR1%0402-RH R42 69.8KR1%0402-RH
X_10KR0402
X_10KR0402
+
+
1 2
+
+
1 2
EC17
EC17
CD270u16SO-RH
CD270u16SO-RH
VID1
LOW FOR SVID
R40
R40
X_27R0402
X_27R0402
VCORE_EN#
G
X_N-2N7002_SOT23
X_N-2N7002_SOT23
R83 X_0R0402 R83 X_0R0402
R86 X_0R0402 R86 X_0R0402
R93 X_0R0402 R93 X_0R0402
R123 1.2KR1%0402R123 1.2KR1%0402
C57 C10p50N0402-RHC57 C10p50N0402-RH
C51
C51
R104 0R0402 R104 0R0402
C1
C1
C100p50N0402
C100p50N0402
C15 C0.01u25X0402 C15 C0.01u25X0402
R15
R15
4.99KR1%0402
4.99KR1%0402
VCC_VRM
R17
R17
+
+
1 2
EC6
EC6
CD270u16SO-RH
CD270u16SO-RH
6262_VCCNB
UPI6262_NB
ISL6323CR CKT for Hybride
VCC5_SB
R6
10KR0402R610KR0402
R99 0R0402 R99 0R0402
R100 0R0402 R100 0R0402
VCCP
COREFB+
+12VIN
VCORE_EN# 37
100R0402
100R0402
100R0402
100R0402
R59 49.9R1%0402 R59 49.9R1%0402
R18
R18
0R0402
0R0402
+12VIN
C36
C36
X_C0.01u25X0402
X_C0.01u25X0402
1 2
C34
C34
CH-1.1u27A2.5m-RH
CH-1.1u27A2.5m-RH
X_C0.01u25X0402
X_C0.01u25X0402
VCC_DDR
3VDUAL
R34
R34
B
X_4.7KR0402
X_4.7KR0402
X_N-MMBT3904_NL_SOT23
X_N-MMBT3904_NL_SOT23
5
VDDPWRGD 35,36,37
PWROK_PWM 8
VCCP_NB
R108
R108
R92
R92
6262_VCCP
C0.1u16Y0402
C0.1u16Y0402
R37
R37
100R0402
100R0402
CHOKE2
CHOKE2
CD270u16SO-RH
CD270u16SO-RH
R50 X_300R0402 R50 X_300R0402
R76
R76
X_4.7KR0402
X_4.7KR0402
C E
Q13
Q13
R51 300R0402 R51 300R0402
D D
NB_VSEN 8
C C
B B
A A
NB_GND 8
R33
R33
100R0402
100R0402
COREFB+ 8
COREFB- 8
CPU_CORE_TYPE 8
R44 1KR1%0402 R44 1KR1%0402
VCORE_EN#
R7
10KR0402R710KR0402
VID5 8
VID4 8
VID3 8
VID2 8
VID1 8
VID0 8
R116
R116
X_470R1%0402
X_470R1%0402
UPI6262_NB
C40
C40
X_C0.1u16Y0402
X_C0.1u16Y0402
VCCP
R1
R1
R32
R32
X_470R1%0402
X_470R1%0402
X_100R0402
X_100R0402
R8
R8
C8
C8
C17
C17
X_C0.1u16Y0402
X_C0.1u16Y0402
5
GND GND
GND GND
12V
12V
3
12V
12V
4
JPWR2
JPWR2
PWRCONN4P_CREAM-RH-1
PWRCONN4P_CREAM-RH-1
1 2
+
+
1 2
EC10
EC10
CD270u16SO-RH
CD270u16SO-RH
R27
R27
X_27R0402
X_27R0402
D S
Q14
Q14
G
X_N-2N7002_SOT23
X_N-2N7002_SOT23
4
C56
C56
C0.01u25X0402
C0.01u25X0402
6262_VCCNB
C13 C0.01u25X0402 C13 C0.01u25X0402
C16
C16
C0.1u16Y0402
C0.1u16Y0402
R73
R73
X_10KR1%0402
X_10KR1%0402
R74
R74
91KR1%0402
91KR1%0402
C87
C87
input CAP
EC15
EC15
C0.1u16Y0402
C0.1u16Y0402
R90
R90
0R0402
0R0402
R112 X_0R0402 R112 X_0R0402
4
VCC5_SB
VCC5
R78
R78
R79
R79
X_2.2R1%0805
X_2.2R1%0805
2.2R1%0805
2.2R1%0805
C12
C12
C0.1u16Y0402
C0.1u16Y0402
7X7 QFN
24
37
34
9
8
7
6
5
4
48
1
2
3
18
17
15
13
12
10
U2 ISL6323ACRZ-T U2 ISL6323ACRZ-T
EN
VDDPWRGD
PWROK
VID5
VID4
VID3/SVC
VID2/SVD
VID1/SEL
VID0/VFIXEN
COMP_NB
FB_NB
VSEN_NB
RGND_NB
VCC
PVCC1_2
COMP
FB
RCOMP
VSEN
RGND
PVCC_NB
GND
BOOT_NB
UGATE_NB
PHASE_NB
LGATE_NB
19
APA
16
RESET
14
OFS
11
FS
49
BOTTOM PAD
CONNECT TO GND
Through 8 VIAs
VIN
VCC5
R10 2.2R/0603 R10 2.2R/0603
C9
C9
C0.1u16Y0402
C0.1u16Y0402
3
SDA0 7,11,12,19,23,24
6262_VCCNB_R
4
8
R52
R52
X_1KR0402
X_1KR0402
R643=10K;R644=OPEN
+12VIN
VCC_VRM
C26
C26
C4.7u6.3X0805
C4.7u6.3X0805
29
31
BOOT1
32
UGATE1
33
PHASE1
30
LGATE1
20
ISEN1+
21
ISEN1-
27
BOOT2
26
UGATE2
25
PHASE2
28
LGATE2
22
ISEN2+
23
ISEN2-
35
PWM3
44
ISEN3+
43
ISEN3-
36
PWM4
46
ISEN4+
45
ISEN4-
42
40
39
38
41
47
ISEN_NB
PHASE_NB_A
1
U1
U1
GND
OUT2
VCC
SDA
OUT3
SCL
OUT1
BUS_SEL
2
R36
R36
10KR0402
10KR0402
BUS_SEL=100%VCC
I2C address:0X60
R85
R85
2.2R1%0805
2.2R1%0805
C31 C1u25X0805-RH C31 C1u25X0805-RH
R96 2.2R1%0805 R96 2.2R1%0805
U_G1
PHASE1
L_G1
ISEN1+
R48 255R1%0402-RH R48 255R1%0402-RH
ISEN1ÂIPHASE1
R47
R47
R81 2.2R1%0805 R81 2.2R1%0805
U_G2
PHASE2
L_G2
ISEN2+
R46 1.37KR1%0402-RH R46 1.37KR1%0402-RH
ISEN2ÂIPHASE2
R45
R45
PWM3
ISEN3+
R121 200R1%0402-RH R121 200R1%0402-RH
ISEN3ÂIPHASE3
R120
R120
PWM4
R115 X_0R0805 R115 X_0R0805
ISEN4ÂIPHASE4
R131 2.2R1%0805 R131 2.2R1%0805
C60 C1u25X0805-RH C60 C1u25X0805-RH
R124 2.2R1%0805 R124 2.2R1%0805
UGATE_NB
PHASE_NB
LGATE_NB
R126
R126
6.8KR1%0402-RH
6.8KR1%0402-RH
6262_VCCP_R
7
6
5
UP6262M8_SOT23-8-RH
UP6262M8_SOT23-8-RH
VCC5
VCC5 VCC5
1KR0402
1KR0402
R77
R77
A C
A C
LED1
LED-B_1608
LED1
LED-B_1608
C45 C0.1u25X C45 C0.1u25X
C6
8.2KR1%0402-RH
8.2KR1%0402-RH
8.2KR1%0402-RH
8.2KR1%0402-RH
8.2KR1%0402-RH
8.2KR1%0402-RH
R118 200R1%0402-RH R118 200R1%0402-RH
R117
R117
C68 C0.1u16X0402 C68 C0.1u16X0402
SCL0 7,11,12,19,23,24
C6
C0.1u16X0402
C0.1u16X0402
C22 C0.1u25X C22 C0.1u25X
C4
C4
C0.1u16X0402
C0.1u16X0402
C65
C65
VCC5
C0.1u16X0402
C0.1u16X0402
8.2KR1%0402-RH
8.2KR1%0402-RH
+12VIN
C64 C0.1u25X C64 C0.1u25X
R119 X_6.2KR1%0402 R119 X_6.2KR1%0402
ISEN4-
R9 0R0402 R9 0R0402
3
R55
R55
1Kohm/0603
1Kohm/0603
LED2
LED-B_1608
LED2
LED-B_1608
PHASE4
ISEN1
ISEN2
ISEN3
C62
C62
C0.1u16X0402
C0.1u16X0402
ISEN_NB_A
C0.1u16X0402
C0.1u16X0402
R132 X_0R0805 R132 X_0R0805
3
A C
LED-B_1608
LED-B_1608
C41
C41
0.01uF/50V/6
0.01uF/50V/6
C7
C7
C0.1u16Y0402
C0.1u16Y0402
C5
C5
C0.1u16Y0402
C0.1u16Y0402
C66
C66
C0.1u16Y0402
C0.1u16Y0402
ISEN4 ISEN4+
C67
C67
6262_VCCP
VCC5
A C
LED3
LED3
C63
C63
C0.1u16Y0402
C0.1u16Y0402
R56
R56
1Kohm/0603
1Kohm/0603
LED4
LED-B_1608
LED4
LED-B_1608
R95
R95
4.7K/0603
4.7K/0603
R87
R87
4.7K/0603
4.7K/0603
C190 C1u16X5 C190 C1u16X5
VCC5
UGATE_NB
PHASE_NB
LGATE_NB
+12VIN
PWM3
+12VIN
PWM4
C29
C29
C1u16Y0402
C1u16Y0402
R229
R229
2.2R1%0805
2.2R1%0805
C166
C166
C1u16X5
C1u16X5
R267
R267
2.2R1%0805
2.2R1%0805
G2
S2
G1
S1
D2
D1
NN-2N7002DW_SOT363-RH
NN-2N7002DW_SOT363-RH
Q21
Q21
U12
U12
6
VCC
UGATE
7
BOOT
PVCC
PHASE
4
GND
3
PWM
LGATE
ISL6612ACBZT_SOIC8-RH
ISL6612ACBZT_SOIC8-RH
U16
U16
6
VCC
7
PVCC
4
GND
3
PWM
ISL6612ACBZT_SOIC8-RH
ISL6612ACBZT_SOIC8-RH
R127 1R0805 R127 1R0805
R114 0R0805 R114 0R0805
U_G1
PHASE1
L_G1
U_G2
PHASE2
L_G2
UGATE
BOOT
PHASE
LGATE
10KR0402
10KR0402
R125
R125
VCC5
4
3
2
1
1
2
8
5
R202 1R0805 R202 1R0805
R82
R82
4.7KR0402
4.7KR0402
R151 1R0805 R151 1R0805
U_G3
R247
R247
2.2R1%0805
2.2R1%0805
PHASE3
L_G3
1
2
R276
R276
2.2R1%0805
2.2R1%0805
8
5
4
3
2
1
5
Q20
Q20
N-NTMFS4837
N-NTMFS4837
R216 0R0805 R216 0R0805
R182 0R0805 R182 0R0805
R239 1R0805 R239 1R0805
C172 C0.1u25X C172 C0.1u25X
R263 0R0805 R263 0R0805
U_G4
R273 1R0805 R273 1R0805
PHASE4
L_G4
VIN
5
Q23
Q23
N-NTMFS4841
N-NTMFS4841
Q22
Q22
4
3
2
1
N-NTMFS4837
N-NTMFS4837
2
R205
R205
10KR0402
10KR0402
Q38
Q38
4
3
2
1
N-NTMFS4837
N-NTMFS4837
R167
R167
10KR0402
10KR0402
Q30
Q30
4
3
2
1
N-NTMFS4837
N-NTMFS4837
10KR0402
10KR0402
C204 C0.1u25X C204 C0.1u25X
R300 0R0805 R300 0R0805
C79
C79
C1u16X5
C1u16X5
5
2
VIN
Q35
Q35
4
3
2
1
N-NTMFS4841
N-NTMFS4841
5
VIN
Q25
Q25
4
3
2
1
N-NTMFS4841
N-NTMFS4841
5
R250
R250
Q47
Q47
4
3
2
1
N-NTMFS4837
N-NTMFS4837
R277
R277
10KR0402
10KR0402
Q53
Q53
4
3
2
1
N-NTMFS4837
N-NTMFS4837
C74
C74
C10u16Y1206
C10u16Y1206
R91
R91
2.2R1%0805
2.2R1%0805
C43
C43
C1000p50X0402
C1000p50X0402
PHASE_NB_A
ISEN_NB_A
C179
C179
5
C1u16X5
C1u16X5
5
Q41
Q41
4
3
2
1
N-NTMFS4837
N-NTMFS4837
5
5
Q33
Q33
4
3
2
1
N-NTMFS4837
N-NTMFS4837
VIN
5
Q45
Q45
4
3
2
1
N-NTMFS4841
N-NTMFS4841
5
Q49
Q49
4
3
2
1
N-NTMFS4837
N-NTMFS4837
VIN
5
Q50
Q50
4
3
2
1
N-NTMFS4841
N-NTMFS4841
5
4
3
2
1
CHOKE1 CH-0.5U40A-RH-1 CHOKE1 CH-0.5U40A-RH-1
1 2
CP16CP16
C168
C168
C10u16Y1206
C10u16Y1206
CHOKE5 CH-0.5u40A-RH-1 CHOKE5 CH-0.5u40A-RH-1
R226
R226
2.2R1%0805
2.2R1%0805
C157
C157
C1000p50X0402
C1000p50X0402
IPHASE1
ISEN1
C111
C111
C80
C80
C10u16Y1206
C10u16Y1206
C1u16X5
C1u16X5
CHOKE3 CH-0.5U40A-RH-1 CHOKE3 CH-0.5U40A-RH-1
R186
R186
2.2R1%0805
2.2R1%0805
C117
C117
C1000p50X0402
C1000p50X0402
IPHASE2
ISEN2
C217
C217
C1u16X5
C1u16X5
5
2.2R1%0805
2.2R1%0805
C142
C142
C1u16X5
C1u16X5
5
Q58
Q58
2.2R1%0805
2.2R1%0805
N-NTMFS4837
N-NTMFS4837
1 2
CP20CP20
CP21CP21
1 2
CP18CP18 C42
C133
C133
C10u16Y1206
C10u16Y1206
CHOKE6 CH-0.5U40A-RH-1 CHOKE6 CH-0.5U40A-RH-1
R265
R265
C183
C183
C1000p50X0402
C1000p50X0402
IPHASE3
ISEN3
R302
R302
C228
C228
C1000p50X0402
C1000p50X0402
IPHASE4
ISEN4
CP17CP17
CP19CP19
1 2
CP22CP22
C200
C200
C10u16Y1206
C10u16Y1206
CHOKE8 CH-0.5U40A-RH-1 CHOKE8 CH-0.5U40A-RH-1
1 2
CP24CP24
VCCP_NB
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
VCCP
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
1 2
CD820u2.5SO-RH
110A
VCCP
VCCP_NB
CD820u2.5SO-RH
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
VCCP
output CAP
VCCP
NB-output CAP
VCCP
CP23CP23
CP25CP25
20A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Intersil 6323CR 3 Phase
Intersil 6323CR 3 Phase
Intersil 6323CR 3 Phase
MS-7642
MS-7642
MS-7642
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Sheet
Sheet
Sheet
1
EC9
EC9
+
+
EC7
EC7
+
+
EC16
EC16
+
+
EC14
EC14
+
+
EC11
EC11
+
+
EC22
EC22
+
+
EC19
EC19
+
+
EC5
EC5
+
+
EC4
EC4
+
+
EC2
EC2
+
+
6 41
6 41
6 41
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
4
3
2
1
VCC3
L34
L34
30L3A-15_0805-RH
30L3A-15_0805-RH
D D
VCC3
CLK_VDD
VCC3
C C
CLK_VDD
FP_RST# 19,37
SCL0 6,11,12,19,23,24
SDA0 6,11,12,19,23,24
CLK_VDD
B B
RS880
(Single-ended)
NB_OSC_14M 14
REF0/SEL_HTT66
OSC_14M_NB
1.1V 158R/90.9R
R420
R420
90.9R1%0402
90.9R1%0402
0
1
CLK_VDD
C476
C476
22uF/6.3V/X5R
L24
L24
SCL0
SDA0
C395
C395
X_10p/50v/N/4
X_10p/50v/N/4
22uF/6.3V/X5R
1u/610v/X5/4
1u/610v/X5/4
14.318MHZ16P_D-RH
14.318MHZ16P_D-RH
Y1
Y1
1 2
R430 X_4.7K/4 R430 X_4.7K/4
R421 0R/4 R421 0R/4
R453 X_R/2 R453 X_R/2
R459 X_R/2 R459 X_R/2
R431 1K/4 R431 1K/4
R427
R427
X_10K/4
X_10K/4
10u/10v/Y5/8
10u/10v/Y5/8
30L3A-15_0805-RH
30L3A-15_0805-RH
L25
L25
30L3A-15_0805-RH
30L3A-15_0805-RH
C407 20p/50N/4 C407 20p/50N/4
C412 20p/50N/4 C412 20p/50N/4
R419 158R/4/1%_B R419 158R/4/1%_B
HTT CLOCK
100.00 DIFFERENTIAL
66.66 SINGLE END
C475
C475
C413
C413
X_8.2K/4
X_8.2K/4
10u/10v/Y5/8
10u/10v/Y5/8
CLK_VDD
R424
R424
R425
R425
8.2K/4
8.2K/4
CLK_VDDA
C409
C409
VDD48
R433
R433
10MR1%0402
10MR1%0402
C406
C406
0.1u/16v/X5/4
0.1u/16v/X5/4
R418
R418
X_8.2K/4
X_8.2K/4
SEL_HTT66
SEL_SATA
SEL_OC_MODE
R426
R426
8.2K/4
8.2K/4
C453
C453
0.1u/16v/X5/4
0.1u/16v/X5/4
C434
C434
0.1u/16v/X5/4
0.1u/16v/X5/4
TXC1
TXC2
RST#_CLK
SCL0_C
SDA0_C
PD#
C470
C470
0.1u/16v/X5/4
0.1u/16v/X5/4
U35A
U35A
44
VDDA
43
GNDA
60
VDDREF
61
GNDREF
39
VDDSATA
42
GNDSATA
64
VDD48
3
GND48
48
VDDCPU
47
GNDCPU
56
VDDHTT
53
GNDHTT
34
VDDATIG
11
VDDSRC1
16
VDDSRC2
25
VDDSB_SRC
28
GNDATIG
33
GNDATIG
10
GNDSRC
17
GNDSRC
24
GNDSB_SRC
62
X1
63
X2
52
RESTORE#
4
SMBCLK
5
SMBDAT
51
PD#
59
REF0/SEL_HTT66
58
REF1/SEL_SATA
57
REF2
RTM880N-793-VB-GR_QFN64-RH
RTM880N-793-VB-GR_QFN64-RH
R417 33R0402 R417 33R0402
C472
C472
0.1u/16v/X5/4
0.1u/16v/X5/4
CPUKG0T_LPRS
CPUKG0C_LPRS
CPUKG1T_LPRS
CPUKG1C_LPRS
ATIG0T_LPRS
ATIG0C_LPRS
ATIG1T_LPRS
ATIG1C_LPRS
ATIG2T_LPRS
ATIG2C_LPRS
ATIG3T_LPRS
ATIG3C_LPRS
SB_SRC0T_LPRS
SB_SRC0C_LPRS
SB_SRC1T_LPRS
SB_SRC1C_LPRS
SRC0T_LPRS
SRC0C_LPRS
SRC1T_LPRS
SRC1C_LPRS
SRC2T_LPRS
SRC2C_LPRS
SRC3T_LPRS
SRC3C_LPRS
SRC4T_LPRS
SRC4C_LPRS
DOC_1/SRC5T_LPRS
DOC_0/SRC5C_LPRS
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
HTT0T/66M_LPRS
HTT0C/66M_LPRS
48MHz_0
48MHz_1
SB_OSC_14M
C400
C400
X_10p/50v/N/4
X_10p/50v/N/4
C473
C473
0.1u/16v/X5/4
0.1u/16v/X5/4
CPU_CLK_R
50
CPU_CLK#_R
49
46
45
NBGFX_SRCCLK_R
38
NBGFX_SRCCLK#_R
37
GFX_CLKP_R1
36
GFX_CLKN_R1
35
GFX_CLKP_R2
32
GFX_CLKN_R2
31
30
29
NBLINKCLK_R
27
NBLINKCLK#_R
26
SBSRCCLK_R
23
SBSRCCLK#_R
22
21
20
GPPCLK0_R
19
GPPCLK0#_R
18
USB30CLK_R
15
USB30CLK#_R
14
LANCLK1_R
13
LANCLK1#_R
12
IDECLK_R
9
IDECLK#_R
8
DOC1#
7
DOC0#
6
41
40
HTREFCLK_R
55
HTREFCLK#_R
54
SIO_48M_CLK_R
2
USBCLK_EXT_R
1
SB_OSC_14M 19
C442
C442
0.1u/16v/X5/4
0.1u/16v/X5/4
C428
C428
0.1u/16v/X5/4
0.1u/16v/X5/4
R438 X_R/2 R438 X_R/2
R443 X_R/2 R443 X_R/2
R465 X_R/2 R465 X_R/2
R471 X_R/2 R471 X_R/2
R478
R478
R486
R486
R498
R498
R497
R497
R496 X_R/2 R496 X_R/2
R495 X_R/2 R495 X_R/2
R494 X_R/2 R494 X_R/2
R493 X_R/2 R493 X_R/2
R492 X_R/2 R492 X_R/2
R491 X_R/2 R491 X_R/2
R487 X_R/2 R487 X_R/2
R482 X_R/2 R482 X_R/2
R484 X_R/2 R484 X_R/2
R476 X_R/2 R476 X_R/2
R467 X_R/2 R467 X_R/2
R461 X_R/2 R461 X_R/2
R428 X_R/2 R428 X_R/2
R429 X_R/2 R429 X_R/2
R450 33R0402 R450 33R0402
R441 33R0402 R441 33R0402
X_10p/50v/N/4
X_10p/50v/N/4
C405
C405
0.1u/16v/X5/4
0.1u/16v/X5/4
CPU_CLK 8
CPU_CLK# 8
NBGFX_SRCCLK 14
X_R/2
X_R/2
X_R/2
X_R/2
X_R/2
X_R/2
X_R/2
X_R/2
C427
C427
EMI EMI
NBGFX_SRCCLK# 14
GFX_CLKP_1 23
GFX_CLKN_1 23
GFX_CLKP_2 23
GFX_CLKN_2 23
NBLINKCLK 14
NBLINKCLK# 14
SBSRCCLK 17
SBSRCCLK# 17
GPPCLK0 24
GPPCLK0# 24
USB30_CLK 29
USB30_CLK# 29
LANCLK1 28
LANCLK1# 28
IDECLK 30
IDECLK# 30
HTREFCLK 14
HTREFCLK# 14
SIO_48M_CLK 32
USBCLK_EXT 19
C432
C432
X_C10p50N0402
X_C10p50N0402
VCC3 VCC3
R653
R653
10K/4
10K/4
OCSWITCH1
OCSWITCH1
ON
ON
ON
DOC0# DOC1#
R689
R689
0R0402
0R0402
1
1A
3
1B
OFF OFF
OFF OFF
SW-DIPP2-RH
SW-DIPP2-RH
ON
R652
R652
10K/4
10K/4
2
2A
4
2B
R679
R679
0R0402
0R0402
CLK_VDD
R440
R440
DOC
10K/4
10K/4
USBCLK_EXT_R
R445
R445
SRC5T
X_10K/4
X_10K/4
65
U35B
U35B
THERMPAD
RTM880N-793-VB-GR_QFN64-RH
RTM880N-793-VB-GR_QFN64-RH
PIN40,41 SRC6T/C and SATAT_LPRS select
A A
REF/SEL_SATA
01100MHz differential spreading SRC clock
100MHz non-spreading differential SATA clock
atched input to select pin functionality
0
REF2
5
ATIG/SRC PCIE Gen2 Mode with limited
overclocking ability
ATIG/SRC PCIE Gen1 Mode with higher
1
overclocking ability
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Clock-Gen ICS9LPRS477
Clock-Gen ICS9LPRS477
Clock-Gen ICS9LPRS477
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
4
3
2
http://www.msi.com.tw
MS-7642
MS-7642
MS-7642
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Sheet
Sheet
Sheet
of
7 41
of
7 41
of
7 41
Rev
Rev
Rev
0A
0A
0A
5
4
3
2
1
HT_CADIN_H[15..0] 13
HT_CADIN_L[15..0] 13
HT_CADOUT_H[15..0] 13
HT_CADOUT_L[15..0] 13
D D
HT_CLKIN_H1 13
HT_CLKIN_L1 13
HT_CLKIN_H0 13
HT_CLKIN_L0 13
HT_CTLIN_H1 13
HT_CTLIN_L1 13
HT_CTLIN_H0 13
HT_CTLIN_L0 13
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
IMC_CPU_TRST_L 19
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
IMC_CPU_TDO 19
CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS
IMC_CPU_TCK 19
IMC_CPU_TMS 19
VCC_DDR
R308 X_1K/4/5% R308 X_1K/4/5%
C C
B B
A A
CPU1A
CPU1A
N6
L0_CLKIN_H1
P6
L0_CLKIN_L1
N3
L0_CLKIN_H0
N2
L0_CLKIN_L0
V4
L0_CTLIN_H1
V5
L0_CTLIN_L1
U1
L0_CTLIN_H0
V1
L0_CTLIN_L0
U6
L0_CADIN_H15
V6
L0_CADIN_L15
T4
L0_CADIN_H14
T5
L0_CADIN_L14
R6
L0_CADIN_H13
T6
L0_CADIN_L13
P4
L0_CADIN_H12
P5
L0_CADIN_L12
M4
L0_CADIN_H11
M5
L0_CADIN_L11
L6
L0_CADIN_H10
M6
L0_CADIN_L10
K4
L0_CADIN_H9
K5
L0_CADIN_L9
J6
L0_CADIN_H8
K6
L0_CADIN_L8
U3
L0_CADIN_H7
U2
L0_CADIN_L7
R1
L0_CADIN_H6
T1
L0_CADIN_L6
R3
L0_CADIN_H5
R2
L0_CADIN_L5
N1
L0_CADIN_H4
P1
L0_CADIN_L4
L1
L0_CADIN_H3
M1
L0_CADIN_L3
L3
L0_CADIN_H2
L2
L0_CADIN_L2
J1
L0_CADIN_H1
K1
L0_CADIN_L1
J3
L0_CADIN_H0
J2
L0_CADIN_L0
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
4
IMC_CPU_TDO CPU_TDI
IMC_CPU_TRST_L CPU_TRST_L
R303 X_1K/4/5% R303 X_1K/4/5%
R301 X_1K/4/5% R301 X_1K/4/5%
R305 X_1K/4/5% R305 X_1K/4/5%
IMC_CPU_TCK CPU_TCK
IMC_CPU_TMS CPU_TMS
5
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
HT LINK
HT LINK
5566778
8
IMC_TCK
IMC_TMS
IMC_TDI
IMC_TRST_L
5
2
Q57
Q57
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
6
1
3
IMC_TCK
IMC_TMS
5
2
Q56
Q56
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
4
6
1
3
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
R304 10K/4 R304 10K/4
R299 10K/4 R299 10K/4
R310 10K/4 R310 10K/4
R312 10K/4 R312 10K/4
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
VCC_DDR
HT_CLKOUT_H1 13
HT_CLKOUT_L1 13
HT_CLKOUT_H0 13
HT_CLKOUT_L0 13
HT_CTLOUT_H1 13
HT_CTLOUT_L1 13
HT_CTLOUT_H0 13
HT_CTLOUT_L0 13
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
VCC_DDR
IMC_CPU_DBREQ_L 19
VCC_DDR
IMC_LDT_RST# 19
L1
30L5A/6L130L5A/6
LDT_PWRGD
R285 X_1K/4/5% R285 X_1K/4/5%
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
R298 X_1K/4/5% R298 X_1K/4/5%
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
4
THERM_SIC
VDDA25 VDDA_25
IMC_CPU_DBREQ_L
THERM_SID
CPU_CLK 7
CPU_CLK# 7
VCC_DDR
VCC_DDR VCC3
R162
R162
4.7K/4
4.7K/4
B
Q29
Q29
2N3904_SOT23
2N3904_SOT23
C E
5
Q52
Q52
4
3
CPU_TDO
Q55
Q55
IMC_LDT_RST#
5
4
3
R287 0R0402 R287 0R0402
R280 0R0402 R280 0R0402
C98
C98
3900p/50vX7/6
3900p/50vX7/6
C97
C97
3900p/50vX7/6
3900p/50vX7/6
R286 300R/4 R286 300R/4
R279 300R/4 R279 300R/4
VCC_DDR
IMC_DBREQ_L
IMC_TDO
IMC_RST#
IMC_DBRDY
2
6
1
IMC_CPU_TDI
CPU_DBREQ_L
IMC_DBRDY
IMC_RST#
2
6
1
LDT_RST#
4.7u/16v/Y5/1206
4.7u/16v/Y5/1206
R178
R178
169R/6/1%
169R/6/1%
LDT_PWRGD 17
LDT_STOP# 14,17
X_1000p/50v/X7/6
X_1000p/50v/X7/6
VCC_DDR
R271
R271
39.2R/6/1%
39.2R/6/1%
CPU_STRAP_HI_E11
CPU_STRAP_LO_F11
R272
R272
39.2R/6/1%
39.2R/6/1%
R111
R111
10K/4
10K/4
C86
C86
CPUCLKIN
CPUCLKIN#
LDT_RST# 17
C102
THERM_SIC
THERM_SID
COREFB+ 6
COREFB- 6
TP16TP16
TP17TP17
TP20TP20
TP15TP15
TP23TP23
PWROK_PWM 6
RN5
RN5
8P4R-10KR0402
8P4R-10KR0402
1
3
5
7
IMC_CPU_TDI 19
VCC_DDR
THERM_SIC_R 32
THERM_SID_R 32
C92
C92
0.22u/16v/X7/6
0.22u/16v/X7/6
LDT_PWRGD
LDT_STOP#
LDT_RST#
TP26TP26 C102
R274 0R0402R274 0R0402
R284 X_1KR0402R284 X_1KR0402
CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS
COREFB+
COREFB-
TP21TP21
TP18TP18
CPU_TEST25_H
CPU_TEST25_L
R161 X_300R/4 R161 X_300R/4
R177 X_300R/4 R177 X_300R/4
VCC_DDR
2
4
6
8
VCC_DDR
R166
R166
300R/4
300R/4
R165
R165
300R/4
300R/4
IMC_CPU_DBRDY CPU_DBRDY
3
VDDA25
C99
C99
3300p/50v/X7/4
3300p/50v/X7/4
CPU_PRESENT_L
CPU_SA0
ALERT_L
CPU_DBREQ_L
M_VDDIO_PWRGD
VDDR_SENSE
CPU_M_VREF
M_VDDIO_PWRGD
CPU_PRESENT_L
CPU_TEST25_H
CPU_TEST25_L
VID1_C
VID0
IMC_CPU_DBRDY 19
VID5 6
VID4 6
VID3 6
VID2 6
VID1 6
VID0 6
CPU_HOT
CPU_CORE_TYPE
CPU1D
CPU1D
C10
VDDA_1
D10
VDDA_2
A8
CLKIN_H
B8
CLKIN_L
C9
PWROK
D8
LDTSTOP_L
C7
RESET_L
AL3
CPU_PRESENT_L
AL6
SIC
AK6
SID
AK4
SA0
AL4
ALERT_L
AL10
TDI
AJ10
TRST_L
AH10
TCK
AL9
TMS
A5
DBREQ_L
G2
VDD_FB_H
G1
VDD_FB_L
F3
M_VDDIO_PWRGD
E12
VDDR_SENSE
F12
M_VREF
AH11
M_ZN
AJ11
M_ZP
A10
TEST25_H
B10
TEST25_L
F10
TEST19
E9
TEST18
AJ7
TEST13
F6
TEST9
D6
TEST17
E7
TEST16
F8
TEST15
C5
TEST14
AH9
TEST12
E5
TEST7
AJ5
TEST6
AH7
TEST3
AJ6
TEST2
C18
RSVD1
C20
RSVD2
F2
RSVD3
G24
RSVD4
G25
RSVD5
INT. MISC.
INT. MISC.
H25
RSVD6
L25
RSVD7
L26
RSVD8
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
R200 X_1K/4/5% R200 X_1K/4/5%
R283 10K/4 R283 10K/4
R175 510R/0402 R175 510R/0402
R156 510R/0402 R156 510R/0402
R193 300R/4 R193 300R/4
R192 49.9R1%/4 R192 49.9R1%/4
test load
MISC.
MISC.
VCC_DDR
CPU_HOT 17
CPU_CORE_TYPE 6
CORE_TYPE
VID5
VID4
SVC/VID3
SVD/VID2
PVIEN/VID1
VID0
THERMDC
THERMDA
THERMTRIP_L
PROCHOT_L
TDO
DBRDY
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
2
G5
D2
D1
C1
E3
E2
E1
AG9
AG8
AK7
AL7
AK10
B6
AK11
AL11
G4
G3
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
L30
L31
AD25
AE24
AE25
AJ18
AJ20
AK3
CPU_CORE_TYPE
VCC_DDR
R176
R176
VID5
VID4
VID3
VID2
VID1_C
R194 1KR1%0402 R194 1KR1%0402
VID0
CPU_THRIP_L#
CPU_HOT
CPU_TDO
CPU_DBRDY
R281 X_0RR281 X_0R
NB_VSEN 6
NB_GND 6
R174 80.6R/6/1% R174 80.6R/6/1%
CPU_TEST22
CPU_TEST21
TP19TP19
CPU_PSI_L
HTREF1
HTREF0
R278 300R/4 R278 300R/4
R269 X_300R/4 R269 X_300R/4
VCC_DDR
R154
R154
R172
R172
1K/4/5%
1K/4/5%
1K/4/5%
1K/4/5%
place near the PWM IC
THERMDC_CPU 32
THERMDA_CPU 32
VCC_DDR_FB 36
X_1000p/50v/X7/4
X_1000p/50v/X7/4
TP25TP25
TP22TP22
TP24TP24
VCC_DDR
R282
R282
300R/4
300R/4
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
AM3 HT I/F,CTRL&DEBUG
AM3 HT I/F,CTRL&DEBUG
AM3 HT I/F,CTRL&DEBUG
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1K/4/5%
1K/4/5%
VID1
VCC_DDR
R288
R288
C193
C193
300R0402
300R0402
VCC_DDR
VCC_DDR
R290
R290
300R/4
300R/4
B
VCC_DDR
R296
R296
4.7K/4
4.7K/4
R297
R297
300R/4
300R/4
B
Q54
Q54
2N3904_SOT23
2N3904_SOT23
C E
R275 44.2R/6/1% R275 44.2R/6/1%
R270 44.2R/6/1% R270 44.2R/6/1%
C195
C195
X_1000p/50v/X7/4
X_1000p/50v/X7/4
VCC_DDR
R169
R169
15R/6/1%
15R/6/1%
R170
R170
15R/6/1%
15R/6/1%
R164 300R/4 R164 300R/4
R163 300R/4 R163 300R/4
MS-7642
MS-7642
MS-7642
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
R291
R291
4.7K/4
4.7K/4
Q51
Q51
2N3904_SOT23
2N3904_SOT23
C E
CPU_THRIP# 19
CPU_PROCHOT# 18
VLDT_1V2
CPU_M_VREF
C106
C106
0.1u/16v/X5/4
0.1u/16v/X5/4
LDT_STOP#
LDT_PWRGD
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
of
8 41
of
8 41
of
8 41
TP14TP14
C101
C1000p50X0402
C101
C1000p50X0402
Rev
Rev
Rev
0A
0A
0A
5
MEM_MA_DQS_L[7..0] 11,12
MEM_MA_DQS_H[7..0] 11,12
MEM_MA_DM[7..0] 11,12
MEM_MA_ADD[15..0] 11,12
MEM_MA_DATA[63..0] 11,12 MEM_MB_DATA[63..0] 11,12
AG21
D D
MEM_MA1_CLK_H1 12
MEM_MA1_CLK_L1 12
MEM_MA0_CLK_H0 11
MEM_MA0_CLK_L0 11
MEM_MA1_CLK_H0 12
MEM_MA1_CLK_L0 12
MEM_MA0_CLK_H1 11
MEM_MA0_CLK_L1 11
MEM_MA0_CS_L1 11
MEM_MA0_CS_L0 11
MEM_MA0_ODT1 11
MEM_MA0_ODT0 11
MEM_MA1_CS_L1 12
MEM_MA1_CS_L0 12
MEM_MA1_ODT1 12
MEM_MA1_ODT0 12
C C
B B
A A
MEM_MA_RESET# 11,12
MEM_MA_CAS_L 11,12
MEM_MA_WE_L 11,12
MEM_MA_RAS_L 11,12
MEM_MA_BANK2 11,12
MEM_MA_BANK1 11,12
MEM_MA_BANK0 11,12
MEM_MA_CKE1 11,12
MEM_MA_CKE0 11,12
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CS_L1
MEM_MA0_CS_L0
MEM_MA0_ODT1
MEM_MA0_ODT0
MEM_MA1_CS_L1
MEM_MA1_CS_L0
MEM_MA1_ODT1
MEM_MA1_ODT0
MEM_MA_RESET#
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
AG20
AE20
AE19
AC25
AA24
AE28
AC28
AD27
AA25
AE27
AC27
AB25
AB27
AA26
AA27
AC26
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
AF15
AF19
AJ25
AH29
W27
W26
W25
M25
M27
W24
U27
U26
V27
U24
V24
G19
H19
G20
G21
E20
N25
Y27
L27
N24
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27
D29
C29
C25
D25
E19
F19
F15
G15
B29
E24
E18
H15
MEM_MA_DQS_L[7..0]
MEM_MA_DQS_H[7..0]
MEM_MA_DM[7..0]
MEM_MA_ADD[15..0]
MEM_MA_DATA[63..0] MEM_MB_DATA[63..0]
CPU1B
CPU1B
MA_CLK_H7
MA_CLK_L7
MA_CLK_H6
MA_CLK_L6
MA_CLK_H5
MA_CLK_L5
MA_CLK_H4
MA_CLK_L4
MA_CLK_H3
MA_CLK_L3
MA_CLK_H2
MA_CLK_L2
MA_CLK_H1
MA_CLK_L1
MA_CLK_H0
MA_CLK_L0
MA0_CS_L1
MA0_CS_L0
MA0_ODT1
MA0_ODT0
MA1_CS_L1
MA1_CS_L0
MA1_ODT1
MA1_ODT0
MA_RESET_L
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK2
MA_BANK1
MA_BANK0
MA_CKE1
MA_CKE0
MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
4
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MEM CHA
MEM CHA
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_DQS_H8
MA_DQS_L8
MA_DM8
MA_CHECK7
MA_CHECK6
MA_CHECK5
MA_CHECK4
MA_CHECK3
MA_CHECK2
MA_CHECK1
MA_CHECK0
MA_EVENT_L
AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
W30
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
MEM_MA_EVENT_L
3
MEM_MB_DQS_L[7..0] 11,12
MEM_MB_DQS_H[7..0] 11,12
MEM_MB_DM[7..0] 11,12
MEM_MB_ADD[15..0] 11,12
MEM_MB1_CLK_H1 12
MEM_MB1_CLK_L1 12
MEM_MB0_CLK_H0 11
MEM_MB0_CLK_L0 11
MEM_MB1_CLK_H0 12
MEM_MB1_CLK_L0 12
MEM_MB0_CLK_H1 11
MEM_MB0_CLK_L1 11
MEM_MB0_CS_L1 11
MEM_MB0_CS_L0 11
MEM_MB0_ODT1 11
MEM_MB0_ODT0 11
MEM_MB1_CS_L1 12
MEM_MB1_CS_L0 12
MEM_MB1_ODT1 12
MEM_MB1_ODT0 12
MEM_MB_RESET# 11,12
MEM_MB_CAS_L 11,12
MEM_MB_WE_L 11,12
MEM_MB_RAS_L 11,12
MEM_MB_BANK2 11,12
MEM_MB_BANK1 11,12
MEM_MB_BANK0 11,12
MEM_MB_CKE1 11,12
MEM_MB_CKE0 11,12
VCC_DDR VCC_DDR
R257
R257
1K/4/5%
1K/4/5%
MEM_MA_EVENT_L 11,12
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CS_L1
MEM_MB0_CS_L0
MEM_MB0_ODT1
MEM_MB0_ODT0
MEM_MB1_CS_L1
MEM_MB1_CS_L0
MEM_MB1_ODT1
MEM_MB1_ODT0
MEM_MB_RESET#
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AJ19
AK19
AL19
AL18
W29
W28
W31
AE30
AC31
AF31
AD29
AE29
AB31
AG31
AD31
AC29
AC30
AB29
AA31
AA28
AE31
AA29
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
AJ14
AH17
AJ23
AK29
U31
U30
Y31
Y30
V31
A18
A19
C19
D19
B19
N31
M31
M29
N28
N29
N30
P29
P31
R29
R28
R31
R30
T31
T29
U29
U28
D31
C31
C24
C23
D17
C17
C14
C13
C30
A23
B17
B13
MEM_MB_DQS_L[7..0]
MEM_MB_DQS_H[7..0]
MEM_MB_DM[7..0]
MEM_MB_ADD[15..0]
CPU1C
CPU1C
MB_CLK_H7
MB_CLK_L7
MB_CLK_H6
MB_CLK_L6
MB_CLK_H5
MB_CLK_L5
MB_CLK_H4
MB_CLK_L4
MB_CLK_H3
MB_CLK_L3
MB_CLK_H2
MB_CLK_L2
MB_CLK_H1
MB_CLK_L1
MB_CLK_H0
MB_CLK_L0
MB0_CS_L1
MB0_CS_L0
MB0_ODT1
MB0_ODT0
MB1_CS_L1
MB1_CS_L0
MB1_ODT1
MB1_ODT0
MB_RESET_L
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK2
MB_BANK1
MB_BANK0
MB_CKE1
MB_CKE0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
2
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MEM CHB
MEM CHB
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
MB_DQS_H8
MB_DQS_L8
MB_DM8
MB_CHECK7
MB_CHECK6
MB_CHECK5
MB_CHECK4
MB_CHECK3
MB_CHECK2
MB_CHECK1
MB_CHECK0
MB_EVENT_L
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
V29
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_EVENT_L
R258
R258
1K/4/5%
1K/4/5%
1
MEM_MB_EVENT_L 11,12
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
AM3 DDR MEMORY I/F
AM3 DDR MEMORY I/F
AM3 DDR MEMORY I/F
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
MS-7642
MS-7642
MS-7642
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Sheet
Sheet
Sheet
9 41
9 41
9 41
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
VCCP VCCP
D D
C C
B B
A A
B3
VDD_1
C2
VDD_2
C4
VDD_3
D3
VDD_4
D5
VDD_5
E4
VDD_6
E6
VDD_7
F5
VDD_8
F7
VDD_9
G6
VDD_10
G8
VDD_11
H7
VDD_12
H11
VDD_13
H23
VDD_14
J8
VDD_15
J12
VDD_16
J14
VDD_17
J16
VDD_18
J18
VDD_19
J20
VDD_20
J22
VDD_21
J24
VDD_22
K7
VDD_23
K9
VDD_24
K11
VDD_25
K13
VDD_26
K15
VDD_27
K17
VDD_28
K19
VDD_29
K21
VDD_30
K23
VDD_31
L4
VDD_32
L5
VDD_33
L8
VDD_34
L10
VDD_35
L12
VDD_36
L14
VDD_37
L16
VDD_38
L18
VDD_39
L20
VDD_40
L22
VDD_41
M2
VDD_42
M3
VDD_43
M7
VDD_44
M9
VDD_45
M11
VDD_46
M13
VDD_47
M15
VDD_48
M17
VDD_49
M19
VDD_50
M21
VDD_51
M23
VDD_52
N8
VDD_53
N10
VDD_54
N12
VDD_55
N14
VDD_56
N16
VDD_57
N18
VDD_58
N20
VDD_59
N22
VDD_60
P7
VDD_61
P9
VDD_62
P11
VDD_63
P13
VDD_64
P15
VDD_65
P17
VDD_66
P19
VDD_67
P21
VDD_68
P23
VDD_69
R4
VDD_70
R5
VDD_71
R8
VDD_72
R10
VDD_73
R12
VDD_74
R14
VDD_75
R16
VDD_76
R18
VDD_77
R20
VDD_78
R22
VDD_79
T2
VDD_80
T3
VDD_81
T7
VDD_82
T9
VDD_83
T11
VDD_84
T13
VDD_85
CPU1E
CPU1E
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
VCC_DDR
VCC_DDR
A3
VSS_1
A7
VSS_2
A9
VSS_3
A11
VSS_4
B4
VSS_5
B9
VSS_6
B11
VSS_7
B14
VSS_8
B16
VSS_9
B18
VSS_10
B20
VSS_11
B22
VSS_12
B24
VSS_13
B26
VSS_14
B28
VSS_15
B30
VSS_16
C3
VSS_17
D14
VSS_18
D16
VSS_19
D18
VSS_20
D20
VSS_21
D22
VSS_22
D24
VSS_23
D26
VSS_24
D28
VSS_25
D30
VSS_26
E11
VSS_27
F4
VSS_28
F14
VSS_29
F16
VSS_30
F18
VSS_31
F20
VSS_32
F22
VSS_33
F24
VSS_34
F26
VSS_35
F28
VSS_36
F30
VSS_37
G9
VSS_38
G11
VSS_39
H8
VSS_40
H10
VSS_41
H12
VSS_42
H14
VSS_43
H16
VSS_44
H18
VSS_45
H24
VSS_46
H26
VSS_47
H28
VSS_48
H30
VSS_49
J4
VSS_50
J5
VSS_51
POWER/GND1
POWER/GND1
J7
VSS_52
J9
VSS_53
J11
VSS_54
J13
VSS_55
J15
VSS_56
J17
VSS_57
J19
VSS_58
J21
VSS_59
J23
VSS_60
K2
VSS_61
K3
VSS_62
K8
VSS_63
K10
VSS_64
K12
VSS_65
K14
VSS_66
K16
VSS_67
K18
VSS_68
K20
VSS_69
K22
VSS_70
K24
VSS_71
K26
VSS_72
K28
VSS_73
K30
VSS_74
L7
VSS_75
L9
VSS_76
L11
VSS_77
L13
VSS_78
L15
VSS_79
L17
VSS_80
L19
VSS_81
L21
VSS_82
L23
VSS_83
M8
VSS_84
M10
VSS_85
C678 C10u6.3X50805C678 C10u6.3X50805
C662 22u/6.3v/X5/1206 C662 22u/6.3v/X5/1206
C691 22u/6.3v/X5/1206 C691 22u/6.3v/X5/1206
C682 22u/6.3v/X5/1206 C682 22u/6.3v/X5/1206
C672 22u/6.3v/X5/1206 C672 22u/6.3v/X5/1206
5
VCC_DDR
VCC_DDR
T15
T17
T19
T21
T23
U10
U12
U14
U16
U18
U20
U22
V11
V13
V15
V17
V19
V21
V23
W10
W12
W14
W16
W18
W20
W22
Y11
Y13
Y15
Y17
Y19
Y21
Y23
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AC4
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AD2
AD3
AD7
AD9
AD11
AD23
AE10
AE12
AF7
AF9
AF11
AG4
AG5
AG7
AH2
AH3
C684 0.22u/16v/X7/6 C684 0.22u/16v/X7/6
C687 0.22u/16v/X7/6 C687 0.22u/16v/X7/6
C158 4.7u/10v/Y5/8 C158 4.7u/10v/Y5/8
C207 4.7u/10v/Y5/8 C207 4.7u/10v/Y5/8
C215 4.7u/10v/Y5/8 C215 4.7u/10v/Y5/8
CPU1F
CPU1F
VDD_86
VDD_87
VDD_88
VDD_89
VDD_90
U8
VDD_91
VDD_92
VDD_93
VDD_94
VDD_95
VDD_96
VDD_97
VDD_98
V9
VDD_99
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
W4
VDD_107
W5
VDD_108
W8
VDD_109
VDD_110
VDD_111
VDD_112
VDD_113
VDD_114
VDD_115
VDD_116
Y2
VDD_117
Y3
VDD_118
Y7
VDD_119
Y9
VDD_120
VDD_121
VDD_122
VDD_123
VDD_124
VDD_125
VDD_126
VDD_127
VDD_128
VDD_129
VDD_130
VDD_131
VDD_132
VDD_133
VDD_134
VDD_135
VDD_136
VDD_137
VDD_138
VDD_139
VDD_140
VDD_141
VDD_142
VDD_143
VDD_144
VDD_145
VDD_146
VDD_147
VDD_148
VDD_149
VDD_150
VDD_151
VDD_152
VDD_153
VDD_154
VDD_155
VDD_156
VDD_157
VDD_158
VDD_159
VDD_160
VDD_161
VDD_162
VDD_163
VDD_164
VDD_165
VDD_166
VDD_167
VDD_168
VDD_169
VDD_170
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
VCC_DDR CAP
VCC_DDR
VCC_DDR
4
M12
VSS_86
M14
VSS_87
M16
VSS_88
M18
VSS_89
M20
VSS_90
M22
VSS_91
N4
VSS_92
N5
VSS_93
N7
VSS_94
N9
VSS_95
N11
VSS_96
N13
VSS_97
N15
VSS_98
N17
VSS_99
N19
VSS_100
N21
VSS_101
N23
VSS_102
P2
VSS_103
P3
VSS_104
P8
VSS_105
P10
VSS_106
P12
VSS_107
P14
VSS_108
P16
VSS_109
P18
VSS_110
P20
VSS_111
P22
VSS_112
R7
VSS_113
R9
VSS_114
R11
VSS_115
R13
VSS_116
R15
VSS_117
R17
VSS_118
R19
VSS_119
R21
VSS_120
R23
VSS_121
T8
VSS_122
T10
VSS_123
T12
VSS_124
T14
VSS_125
T16
VSS_126
T18
VSS_127
T20
VSS_128
T22
VSS_129
U4
VSS_130
U5
VSS_131
U7
VSS_132
U9
VSS_133
U11
VSS_134
U13
VSS_135
POWER/GND2
POWER/GND2
C693 180p/50v/N/4_BC693 180p/50v/N/4_B
C674 180p/50v/N/4_BC674 180p/50v/N/4_B
C150 0.01u/50v/X7/6_B C150 0.01u/50v/X7/6_B
C196 0.01u/50v/X7/6_B C196 0.01u/50v/X7/6_B
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W7
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
Y14
Y16
Y18
Y20
Y22
AA4
AA5
AA7
AA9
4
VCCP_NB
VCCP
CPU1G
CPU1G
A4
VDDNB_1
A6
VDDNB_2
B5
VDDNB_3
B7
VDDNB_4
C6
VDDNB_5
C8
VDDNB_6
D7
VDDNB_7
D9
VDDNB_8
E8
VDDNB_9
E10
VDDNB_10
F9
VDDNB_11
F11
VDDNB_12
G10
VDDNB_13
G12
VDDNB_14
B2
NP/RSVD
H20
NP/VSS1
AE7
NP/VSS2
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
C676 22u/6.3v/X5/1206 C676 22u/6.3v/X5/1206
C689 22u/6.3v/X5/1206 C689 22u/6.3v/X5/1206
C669 22u/6.3v/X5/1206 C669 22u/6.3v/X5/1206
C667 22u/6.3v/X5/1206 C667 22u/6.3v/X5/1206
C663 22u/6.3v/X5/1206 C663 22u/6.3v/X5/1206
C677 22u/6.3v/X5/1206 C677 22u/6.3v/X5/1206
C679 22u/6.3v/X5/1206 C679 22u/6.3v/X5/1206
C681 22u/6.3v/X5/1206 C681 22u/6.3v/X5/1206
C671 22u/6.3v/X5/1206 C671 22u/6.3v/X5/1206
C673 22u/6.3v/X5/1206 C673 22u/6.3v/X5/1206
C664 22u/6.3v/X5/1206 C664 22u/6.3v/X5/1206
3
AA11
VSS_171
AA13
VSS_172
AA15
VSS_173
AA17
VSS_174
AA19
VSS_175
AA21
VSS_176
AA23
VSS_177
AB2
VSS_178
AB3
VSS_179
AB8
VSS_180
AB10
VSS_181
AB12
VSS_182
AB14
VSS_183
AB16
VSS_184
AB18
VSS_185
AB20
VSS_186
AB22
VSS_187
AC7
VSS_188
AC9
VSS_189
AC11
VSS_190
AC13
VSS_191
AC15
VSS_192
AC17
VSS_193
AC19
VSS_194
AC21
VSS_195
AC23
VSS_196
AD8
VSS_197
AD10
VSS_198
AD12
VSS_199
AD14
VSS_200
AD16
VSS_201
AD20
VSS_202
POWER/GND3
POWER/GND3
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
AD22
AD24
AE4
AE5
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
VCCP CAP VCCP_NB CAP
VCCP
C683 C10u6.3X50805C683 C10u6.3X50805
C675 C10u6.3X50805C675 C10u6.3X50805
C686 C10u6.3X50805C686 C10u6.3X50805
C135 C10u6.3X50805C135 C10u6.3X50805
C128 C10u6.3X50805C128 C10u6.3X50805
C670 C10u6.3X50805C670 C10u6.3X50805
C680 C10u6.3X50805C680 C10u6.3X50805
3
near VDDR 4pin
VLDT_1V2
VLDT_1V2
VCCP
C668 180p/50v/N/4_BC668 180p/50v/N/4_B
VCCP
C690 0.01u/50v/X7/6_B C690 0.01u/50v/X7/6_B
C659 0.01u/50v/X7/6_B C659 0.01u/50v/X7/6_B
VCCP
C692 0.22u/16v/X7/6 C692 0.22u/16v/X7/6
C685 0.22u/16v/X7/6 C685 0.22u/16v/X7/6
VCCP
C141 4.7u/10v/Y5/8 C141 4.7u/10v/Y5/8
C688 4.7u/10v/Y5/8 C688 4.7u/10v/Y5/8
C665 4.7u/10v/Y5/8 C665 4.7u/10v/Y5/8
VLDT_1V2
CPU_VDDR_B
VCC_DDR
C105 0.01u/50v/X7/6_B C105 0.01u/50v/X7/6_B
C96 0.22u/16v/X7/6 C96 0.22u/16v/X7/6
C103 0.22u/16v/X7/6 C103 0.22u/16v/X7/6
C91 4.7u/10v/Y5/8 C91 4.7u/10v/Y5/8
C93 4.7u/10v/Y5/8 C93 4.7u/10v/Y5/8
C88 4.7u/10v/Y5/8 C88 4.7u/10v/Y5/8
C89 4.7u/10v/Y5/8 C89 4.7u/10v/Y5/8
VCCA_1V2 CAP
C202 4.7u/10v/Y5/8 C202 4.7u/10v/Y5/8
C210 4.7u/10v/Y5/8 C210 4.7u/10v/Y5/8
C199 C10u6.3X50805C199 C10u6.3X50805
C206 C10u6.3X50805C206 C10u6.3X50805
VLDT_1V2
VCCP_NB
VCCP_NB
VCCP_NB
VCCP_NB
AJ1
AJ2
AJ3
AJ4
A12
B12
C12
D12
M24
M26
M28
M30
P24
P26
P28
P30
T24
T26
T28
T30
V25
V26
V28
V30
Y24
Y26
Y28
Y29
AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30
C191 180p/50v/N/4_BC191 180p/50v/N/4_B
C192 180p/50v/N/4_BC192 180p/50v/N/4_B
C658 0.22u/16v/X7/6 C658 0.22u/16v/X7/6
C660 0.22u/16v/X7/6 C660 0.22u/16v/X7/6
C104 4.7u/10v/Y5/8 C104 4.7u/10v/Y5/8
C123 C10u6.3X50805C123 C10u6.3X50805
C122 C10u6.3X50805C122 C10u6.3X50805
C657 22u/6.3v/X5/1206 C657 22u/6.3v/X5/1206 C186 4.7u/10v/Y5/8 C186 4.7u/10v/Y5/8
C119 22u/6.3v/X5/1206 C119 22u/6.3v/X5/1206
CPU1H
CPU1H
VLDT_A_1
VLDT_A_2
VLDT_A_3
VLDT_A_4
VDDR_1
VDDR_2
VDDR_3
VDDR_4
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
VDDIO_8
VDDIO_9
VDDIO_10
VDDIO_11
VDDIO_12
VDDIO_13
VDDIO_14
VDDIO_15
VDDIO_16
VDDIO_17
VDDIO_18
VDDIO_19
VDDIO_20
VDDIO_21
VDDIO_22
VDDIO_23
VDDIO_24
VDDIO_25
VDDIO_26
VDDIO_27
VDDIO_28
VDDIO_29
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
2
POWER/GND4
POWER/GND4
2
H1
VLDT_B_1
H2
VLDT_B_2
H5
VLDT_B_3
H6
VLDT_B_4
AG12
VDDR_5
AH12
VDDR_6
AJ12
VDDR_7
AK12
VDDR_8
AL12
VDDR_9
AF18
VSS_215
AF20
VSS_216
AF22
VSS_217
AF24
VSS_218
AF26
VSS_219
AF28
VSS_220
AG10
VSS_221
AG11
VSS_222
AH14
VSS_223
AH16
VSS_224
AH18
VSS_225
AH20
VSS_226
AH22
VSS_227
AH24
VSS_228
AH26
VSS_229
AH28
VSS_230
AH30
VSS_231
AK2
VSS_232
AK14
VSS_233
AK16
VSS_234
AK18
VSS_235
AK20
VSS_236
AK22
VSS_237
AK24
VSS_238
AK26
VSS_239
AK28
VSS_240
AK30
VSS_241
AL5
VSS_242
VLDT_1V2 CPU_VDDR
VCCP_NB
C661 180p/50v/N/4_BC661 180p/50v/N/4_B
VCCP_NB
C121 0.01u/50v/X7/6_B C121 0.01u/50v/X7/6_B
C110 0.01u/50v/X7/6_B C110 0.01u/50v/X7/6_B
C120 0.01u/50v/X7/6_B C120 0.01u/50v/X7/6_B
Layout: Place as close as
possible to CPU socket.
VLDT_RUN_B
CPU_VDDR
CPU_VDDR
CP3CP3
CP4CP4
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
C134
C134
C10u6.3X50805
C10u6.3X50805
180p/50v/N/4_B
180p/50v/N/4_B
C203 0.01u/50v/X7/6_B C203 0.01u/50v/X7/6_B
C209 0.22u/16v/X7/6 C209 0.22u/16v/X7/6
C218 0.22u/16v/X7/6 C218 0.22u/16v/X7/6
C194 0.01u/50v/X7/6_B C194 0.01u/50v/X7/6_B
C198 0.22u/16v/X7/6 C198 0.22u/16v/X7/6
C227 4.7u/10v/Y5/8 C227 4.7u/10v/Y5/8
C216 4.7u/10v/Y5/8 C216 4.7u/10v/Y5/8
C229 C10u6.3X50805 C229 C10u6.3X50805
C226 4.7u/10v/Y5/8 C226 4.7u/10v/Y5/8
C224 4.7u/10v/Y5/8C224 4.7u/10v/Y5/8
C211 22u/6.3v/X5/1206 C211 22u/6.3v/X5/1206
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
K9 M2 PWR & GND
K9 M2 PWR & GND
K9 M2 PWR & GND
MS-7642
MS-7642
MS-7642
1
C741
C741
C742
C742
4.7u/10v/Y5/8
4.7u/10v/Y5/8
near VDDR 5pin
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Sheet
Sheet
Sheet
10 41
10 41
10 41
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
MEM_MA_DQS_H[7..0] 9,12
MEM_MA_DQS_L[7..0] 9,12
MEM_MA_DM[7..0] 9,12
MEM_MA_ADD[15..0] 9,12
MEM_MA_DATA[63..0] 9,12
D D
MEM_MA_DATA0 MEM_MA_ADD0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
C C
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
B B
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
A A
MEM_MA_DQS_H[7..0]
MEM_MA_DQS_L[7..0]
MEM_MA_DM[7..0]
MEM_MA_ADD[15..0]
MEM_MA_DATA[63..0]
VCC_DDR
DIMM1
DIMM1
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
54
VDD51VDD
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
VSS
107
110
113
116
119
121
170
173
176
179
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
127
130
133
136
139
142
145
148
151
VCC3
VTT_DDR
236
120
182
183
186
189
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
154
157
160
163
240
191
194
197
68
53
VTT
VDD
VSS
VTT
VDD
VDD
VDD
VDDSPD
NC/PAR_IN
NC/ERR_OUT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
166
199
202
205
208
211
214
217
220
223
226
ADDRESS A0
5
C291
C291
C0.1u16Y0402
C0.1u16Y0402
79
48
167
RSVD
FREE1
NC/TEST4
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
VSS
VSS
VSS
229
232
235
239
MEM_MA_EVENT_L
187
198
A0
FREE249FREE3
FREE4
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
BA0
BA1
BA2
WE#
RAS#
CAS#
RESET#
CK0
CK0#
CK1(NU)
CK1#(NU)
VREFDQ
VREFCA
SCL
SDA
SA1
SA0
VSS
MEC1
MEC2
MEC3
DDRIII-240P_BLUE-RH
DDRIII-240P_BLUE-RH
MEC1
MEC2
MEC3
4
4
188
181
61
180
59
58
178
56
177
175
70
55
174
196
172
171
39
40
45
46
158
159
164
165
7
6
16
15
25
24
34
33
85
84
94
93
103
102
112
111
43
42
125
126
134
135
143
144
152
153
203
204
212
213
221
222
230
231
161
162
195
77
50
169
193
76
71
190
52
73
192
74
168
184
185
63
64
1
67
118
238
237
117
MEM_MA_EVENT_L 9,12
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA0_ODT0
MEM_MA0_ODT1
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA0_CS_L0
MEM_MA0_CS_L1
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_CAS_L
MEM_MA_RESET#
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
VDDR_VREF_DQ
VDDR_VREF_CA
SCL0
SDA0
VTT_DDR
R98
R98
15R1%
15R1%
R107
R107
15R1%
15R1%
MEM_MA0_ODT0 9
MEM_MA0_ODT1 9
MEM_MA_CKE0 9,12
MEM_MA_CKE1 9,12
MEM_MA0_CS_L0 9
MEM_MA0_CS_L1 9
MEM_MA_BANK0 9,12
MEM_MA_BANK1 9,12
MEM_MA_BANK2 9,12
MEM_MA_WE_L 9,12
MEM_MA_RAS_L 9,12
MEM_MA_CAS_L 9,12
MEM_MA_RESET# 9,12
MEM_MA0_CLK_H0 9
MEM_MA0_CLK_L0 9
MEM_MA0_CLK_H1 9
MEM_MA0_CLK_L1 9
SCL0 6,7,12,19,23,24
SDA0 6,7,12,19,23,24
C306
C306
C1u16Y
C1u16Y
VCC_DDR
R262
R262
15R1%
15R1%
R264
R264
15R1%
15R1%
VCC_DDR
C292
C292
C1u16Y
C1u16Y
C50
C50
0.1u/10v/X7/4
0.1u/10v/X7/4
3
C38
C38
X_0.1u/25v/Y5/4
X_0.1u/25v/Y5/4
VDDR_VREF_DQ
C44
C44
0.1u/10v/X7/4
0.1u/10v/X7/4
C180
C180
X_0.1u/25v/Y5/4
X_0.1u/25v/Y5/4
VDDR_VREF_CA
C188
C188
0.1u/10v/X7/4
0.1u/10v/X7/4
VDDR_VREF_CA VDDR_VREF_DQ
3
VDDR_VREF_DQ
C48
C48
1nf/25v/X7R/4
1nf/25v/X7R/4
VDDR_VREF_CA
C185
C185
0.1u/10v/X7/4
0.1u/10v/X7/4
MEM_MB_DQS_H[7..0] 9,12
MEM_MB_DQS_L[7..0] 9,12
MEM_MB_ADD[15..0] 9,12
MEM_MB_DATA[63..0] 9,12
C187
C187
1nf/25v/X7R/4
1nf/25v/X7R/4
MEM_MB_DM[7..0] 9,12
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
MEM_MB_DQS_H[7..0]
MEM_MB_DQS_L[7..0]
MEM_MB_DM[7..0]
MEM_MB_ADD[15..0]
MEM_MB_DATA[63..0]
VCC_DDR
DIMM2
DIMM2
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
VSS
107
110
ADDRESS A2
54
VDD51VDD
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
113
116
119
121
124
127
130
VSS
VSS
133
136
2
170
173
176
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
139
142
145
148
2
1
VCC3
C614
C614
C0.1u16Y0402
VTT_DDR
179
182
VDD
VDD
VSS
VSS
151
154
236
183
186
189
191
194
197
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
157
160
163
166
199
202
205
208
211
C0.1u16Y0402
MEM_MB_EVENT_L
120
240
79
48
187
198
167
68
53
VTT
VTT
NC/PAR_IN
VSS
VSS
VSS
VSS
VSS
214
217
220
223
RSVD
FREE1
NC/TEST4
NC/ERR_OUT
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
VSS
VSS
VSS
VSS
226
229
232
235
FREE249FREE3
FREE4
A10/AP
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
DM0/DQS9
NC/DQS9#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
WE#
RAS#
CAS#
RESET#
CK0#
CK1(NU)
CK1#(NU)
VREFDQ
VREFCA
VSS
MEC1
MEC2
239
MEC1
MEC2
A11
A12
A13
A14
A15
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
BA0
BA1
BA2
CK0
SCL
SDA
SA1
SA0
MEC3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
MEC3
DDRIII-240P_BLUE-RH
DDRIII-240P_BLUE-RH
MEM_MB_EVENT_L 9,12
MEM_MB_ADD0
188
MEM_MB_ADD1
181
MEM_MB_ADD2
61
MEM_MB_ADD3
180
MEM_MB_ADD4
59
MEM_MB_ADD5
58
MEM_MB_ADD6
178
MEM_MB_ADD7
56
MEM_MB_ADD8
177
MEM_MB_ADD9
175
MEM_MB_ADD10
70
MEM_MB_ADD11
55
MEM_MB_ADD12
174
MEM_MB_ADD13
196
MEM_MB_ADD14
172
MEM_MB_ADD15
171
39
40
45
46
158
159
164
165
MEM_MB_DQS_H0
7
MEM_MB_DQS_L0
6
MEM_MB_DQS_H1
16
MEM_MB_DQS_L1
15
MEM_MB_DQS_H2
25
MEM_MB_DQS_L2
24
MEM_MB_DQS_H3
34
MEM_MB_DQS_L3
33
MEM_MB_DQS_H4
85
MEM_MB_DQS_L4
84
MEM_MB_DQS_H5
94
MEM_MB_DQS_L5
93
MEM_MB_DQS_H6
103
MEM_MB_DQS_L6
102
MEM_MB_DQS_H7
112
MEM_MB_DQS_L7
111
43
42
MEM_MB_DM0
125
126
MEM_MB_DM1
134
135
MEM_MB_DM2
143
144
MEM_MB_DM3
152
153
MEM_MB_DM4
203
204
MEM_MB_DM5
212
213
MEM_MB_DM6
221
222
MEM_MB_DM7
230
231
161
162
MEM_MB0_ODT0
195
MEM_MB0_ODT1
77
MEM_MB_CKE0
50
MEM_MB_CKE1
169
MEM_MB0_CS_L0
193
MEM_MB0_CS_L1
76
MEM_MB_BANK0
71
MEM_MB_BANK1
190
MEM_MB_BANK2
52
MEM_MB_WE_L
73
MEM_MB_RAS_L
192
MEM_MB_CAS_L
74
MEM_MB_RESET#
168
MEM_MB0_CLK_H0
184
MEM_MB0_CLK_L0
185
MEM_MB0_CLK_H1
63
MEM_MB0_CLK_L1
64
VDDR_VREF_DQ
1
VDDR_VREF_CA
67
SCL0
118
SDA0
238
237
117
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MEM_MB0_ODT0 9
MEM_MB0_ODT1 9
MEM_MB_CKE0 9,12
MEM_MB_CKE1 9,12
MEM_MB0_CS_L0 9
MEM_MB0_CS_L1 9
MEM_MB_BANK0 9,12
MEM_MB_BANK1 9,12
MEM_MB_BANK2 9,12
MEM_MB_WE_L 9,12
MEM_MB_RAS_L 9,12
MEM_MB_CAS_L 9,12
MEM_MB_RESET# 9,12
MEM_MB0_CLK_H0 9
MEM_MB0_CLK_L0 9
MEM_MB0_CLK_H1 9
MEM_MB0_CLK_L1 9
SCL0 6,7,12,19,23,24
SDA0 6,7,12,19,23,24
VCC3
MS-7642
MS-7642
MS-7642
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
of
11 41
of
11 41
of
11 41
Rev
Rev
Rev
0A
0A
0A
5
MEM_MA_DQS_H[7..0] 9,11
MEM_MA_DQS_L[7..0] 9,11
MEM_MA_DM[7..0] 9,11
MEM_MA_ADD[15..0] 9,11
MEM_MA_DATA[63..0] 9,11
D D
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
C C
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
B B
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
A A
MEM_MA_DQS_H[7..0]
MEM_MA_DQS_L[7..0]
MEM_MA_DM[7..0]
MEM_MA_ADD[15..0]
MEM_MA_DATA[63..0]
VCC_DDR
DIMM3
DIMM3
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
VSS
107
110
54
VDD51VDD
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
113
116
119
121
124
127
130
VSS
VSS
VSS
133
136
170
173
176
179
VDD
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
139
142
145
148
151
VCC3
VTT_DDR
236
120
182
183
186
189
VDD
VDD
VDD
VSS
VSS
VSS
154
157
160
163
240
191
194
197
68
53
VTT
VDD
VSS
VTT
VDD
VDD
VDD
VDDSPD
NC/PAR_IN
NC/ERR_OUT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
166
199
202
205
208
211
214
217
220
223
226
ADDRESS A4
5
C230
C230
C0.1u16Y0402
C0.1u16Y0402
79
48
167
RSVD
NC/TEST4
VSS
VSS
229
232
235
MEM_MA_EVENT_L
187
198
FREE1
FREE249FREE3
FREE4
A10/AP
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
WE#
RAS#
CAS#
RESET#
CK0#
CK1(NU)
CK1#(NU)
VREFDQ
VREFCA
VSS
VSS
MEC1
MEC2
239
MEC1
MEC2
4
188
A0
181
A1
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70
55
A11
174
A12
196
A13
172
A14
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
7
6
16
15
25
24
34
33
85
84
94
93
103
102
112
111
43
42
125
126
134
135
143
144
152
153
203
204
212
213
221
222
230
231
161
162
195
77
50
169
193
76
71
BA0
190
BA1
52
BA2
73
192
74
168
184
CK0
185
63
64
1
67
118
SCL
238
SDA
237
SA1
117
SA0
MEC3
ZIF-DDRIII240P-RH
ZIF-DDRIII240P-RH
MEC3
4
MEM_MA_EVENT_L 9,11
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA1_ODT0
MEM_MA1_ODT1
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA1_CS_L0
MEM_MA1_CS_L1
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_CAS_L
MEM_MA_RESET#
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
VDDR_VREF_DQ
VDDR_VREF_CA
SCL0
SDA0
3
MEM_MB_DQS_L[7..0] 9,11
MEM_MB_DQS_H[7..0] 9,11
MEM_MB_DM[7..0] 9,11
MEM_MB_ADD[15..0] 9,11
MEM_MB_DATA[63..0] 9,11
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MA1_ODT0 9
MEM_MA1_ODT1 9
MEM_MA_CKE0 9,11
MEM_MA_CKE1 9,11
MEM_MA1_CS_L0 9
MEM_MA1_CS_L1 9
MEM_MA_BANK0 9,11
MEM_MA_BANK1 9,11
MEM_MA_BANK2 9,11
MEM_MA_WE_L 9,11
MEM_MA_RAS_L 9,11
MEM_MA_CAS_L 9,11
MEM_MA_RESET# 9,11
MEM_MA1_CLK_H0 9
MEM_MA1_CLK_L0 9
MEM_MA1_CLK_H1 9
MEM_MA1_CLK_L1 9
SCL0 6,7,11,19,23,24
SDA0 6,7,11,19,23,24
VCC3 VCC3
MEM_MB_DATA63
MEM_MB_DQS_L[7..0]
MEM_MB_DQS_H[7..0]
MEM_MB_DM[7..0]
MEM_MB_ADD[15..0]
MEM_MB_DATA[63..0]
VCC_DDR
DIMM4
DIMM4
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
VSS
107
110
54
VDD51VDD
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
113
116
119
121
124
127
130
VSS
VSS
133
136
170
173
176
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
139
142
145
148
VCC3
179
182
183
186
189
191
194
197
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
151
154
157
160
163
166
199
202
205
VTT_DDR
236
VDDSPD
VSS
VSS
208
2
C574
C574
C0.1u16Y0402
C0.1u16Y0402
MEM_MB_EVENT_L
120
240
79
48
187
198
167
68
53
VTT
VTT
NC/PAR_IN
VSS
VSS
VSS
VSS
VSS
211
214
217
220
223
RSVD
FREE1
NC/TEST4
NC/ERR_OUT
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
VSS
VSS
VSS
VSS
226
229
232
235
FREE249FREE3
FREE4
A10/AP
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
DM0/DQS9
NC/DQS9#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
WE#
RAS#
CAS#
RESET#
CK0#
CK1(NU)
CK1#(NU)
VREFDQ
VREFCA
SDA
VSS
MEC1
MEC2
239
MEC1
MEC2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
A14
A15
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
BA0
BA1
BA2
CK0
SCL
SA1
SA0
MEC3
ZIF-DDRIII240P-RH
ZIF-DDRIII240P-RH
MEC3
188
181
61
180
59
58
178
56
177
175
70
55
174
196
172
171
39
40
45
46
158
159
164
165
7
6
16
15
25
24
34
33
85
84
94
93
103
102
112
111
43
42
125
126
134
135
143
144
152
153
203
204
212
213
221
222
230
231
161
162
195
77
50
169
193
76
71
190
52
73
192
74
168
184
185
63
64
1
67
118
238
237
117
MEM_MB_EVENT_L 9,11
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB1_ODT0
MEM_MB1_ODT1
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB1_CS_L0
MEM_MB1_CS_L1
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_CAS_L
MEM_MB_RESET#
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
VDDR_VREF_DQ
VDDR_VREF_CA
SCL0
SDA0
ADDRESS A6
3
2
MEM_MB1_ODT0 9
MEM_MB1_ODT1 9
MEM_MB_CKE0 9,11
MEM_MB_CKE1 9,11
MEM_MB1_CS_L0 9
MEM_MB1_CS_L1 9
MEM_MB_BANK0 9,11
MEM_MB_BANK1 9,11
MEM_MB_BANK2 9,11
MEM_MB_WE_L 9,11
MEM_MB_RAS_L 9,11
MEM_MB_CAS_L 9,11
MEM_MB_RESET# 9,11
MEM_MB1_CLK_H0 9
MEM_MB1_CLK_L0 9
MEM_MB1_CLK_H1 9
MEM_MB1_CLK_L1 9
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
MS-7642
MS-7642
MS-7642
1
C49
C49
X_C0.1u16Y0402
X_C0.1u16Y0402
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Sheet
Sheet
Sheet
VDDR_VREF_CA VDDR_VREF_DQ
C184
C184
X_C0.1u16Y0402
X_C0.1u16Y0402
of
12 41
of
12 41
of
12 41
Rev
Rev
Rev
0A
0A
0A
5
4
3
2
1
D D
C C
B B
HT_CADOUT_H[15..0] 8
HT_CADOUT_L[15..0] 8
HT_CLKOUT_H0 8
HT_CLKOUT_L0 8
HT_CLKOUT_H1 8
HT_CLKOUT_L1 8
HT_CTLOUT_H0 8
HT_CTLOUT_L0 8
HT_CTLOUT_H1 8
HT_CTLOUT_L1 8
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
HT_CADOUT_H0
HT_CADOUT_L0
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H15
HT_CADOUT_L15
HT_RXCALP
R324 301R/4/1% R324 301R/4/1%
HT_RXCALN
U21A
U21A
Y25
HT_RXCAD0P
Y24
HT_RXCAD0N
V22
HT_RXCAD1P
V23
HT_RXCAD1N
V25
HT_RXCAD2P
V24
HT_RXCAD2N
U24
HT_RXCAD3P
U25
HT_RXCAD3N
T25
HT_RXCAD4P
T24
HT_RXCAD4N
P22
HT_RXCAD5P
P23
HT_RXCAD5N
P25
HT_RXCAD6P
P24
HT_RXCAD6N
N24
HT_RXCAD7P
N25
HT_RXCAD7N
AC24
HT_RXCAD8P
AC25
HT_RXCAD8N
AB25
HT_RXCAD9P
AB24
HT_RXCAD9N
AA24
HT_RXCAD10P
AA25
HT_RXCAD10N
Y22
HT_RXCAD11P
Y23
HT_RXCAD11N
W21
HT_RXCAD12P
W20
HT_RXCAD12N
V21
HT_RXCAD13P
V20
HT_RXCAD13N
U20
HT_RXCAD14P
U21
HT_RXCAD14N
U19
HT_RXCAD15P
U18
HT_RXCAD15N
T22
HT_RXCLK0P
T23
HT_RXCLK0N
AB23
HT_RXCLK1P
AA22
HT_RXCLK1N
M22
HT_RXCTL0P
M23
HT_RXCTL0N
R21
HT_RXCTL1P
R20
HT_RXCTL1N
C23
HT_RXCALP
A24
HT_RXCALN
NB,RS780,A12,FCBGA-528pin
NB,RS780,A12,FCBGA-528pin
HT_CADIN_H[15..0] 8
HT_CADIN_L[15..0] 8
HT_TXCLK0P
HT_TXCLK1P
HT_TXCTL0P
HT_TXCTL1P
HT_TXCALP
HT_TXCALN
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H24
H25
L21
L20
M24
M25
P19
R18
B24
B25
PART 1 OF 6
PART 1 OF 6
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HYPER TRANSPORT CPU
I/F
HYPER TRANSPORT CPU
I/F
HT_TXCLK0N
HT_TXCLK1N
HT_TXCTL0N
HT_TXCTL1N
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADIN_H0
HT_CADIN_L0
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H15
HT_CADIN_L15
HT_TXCALP
HT_TXCALN
R326 301R/4/1% R326 301R/4/1%
HT_CLKIN_H0 8
HT_CLKIN_L0 8
HT_CLKIN_H1 8
HT_CLKIN_L1 8
HT_CTLIN_H0 8
HT_CTLIN_L0 8
HT_CTLIN_H1 8
HT_CTLIN_L1 8
85 ohm
U21B
U21B
GFX_RX0P 23
GFX_RX0N 23
GFX_RX1P 23
GFX_RX1N 23
GFX_RX2P 23
GFX_RX2N 23
GFX_RX3P 23
GFX_RX3N 23
GFX_RX4P 23
GFX_RX4N 23
GFX_RX5P 23
GFX_RX5N 23
GFX_RX6P 23
GFX_RX6N 23
GFX_RX7P 23
GFX_RX7N 23
GFX_RX8P 22
GFX_RX8N 22
GFX_RX9P 22
GFX_RX9N 22
GFX_RX10P 22
GFX_RX10N 22
GFX_RX11P 22
GFX_RX11N 22
GFX_RX12P 22
GFX_RX12N 22
GFX_RX13P 22
GFX_RX13N 22
GFX_RX14P 22
GFX_RX14N 22
GFX_RX15P 22
GFX_RX15N 22
PE0_RX 24
PE0_RX# 24
RX_LANP1 28
RX_LANN1 28
RX_USBP2 29
RX_USBN2 29
A_RX0P 17
A_RX0N 17
A_RX1P 17
A_RX1N 17
A_RX2P 17
A_RX2N 17
A_RX3P 17
A_RX3N 17
A_RX0P
A_RX0N
A_RX1P
A_RX1N
A_RX2P
A_RX2N
A_RX3P
A_RX3N
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
NB,RS780,A12,FCBGA-528pin
NB,RS780,A12,FCBGA-528pin
PART 2 OF 6
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_BCALRP
PCE_BCALRN
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
AC1
AC2
TX_LANP1
AB4
TX_LANN1
AB3
TX_USBP2
AA2
TX_USBN2
AA1
Y1
Y2
Y4
Y3
V1
V2
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
R359 1.27K/4/1% R359 1.27K/4/1%
AC8
R353 2K/4/1% R353 2K/4/1%
AB8
A_TX0P_C
A_TX0N_C
A_TX1P_C
A_TX1N_C
A_TX2P_C
A_TX2N_C
A_TX3P_C
A_TX3N_C
GFX_TX0P 23
GFX_TX0N 23
GFX_TX1P 23
GFX_TX1N 23
GFX_TX2P 23
GFX_TX2N 23
GFX_TX3P 23
GFX_TX3N 23
GFX_TX4P 23
GFX_TX4N 23
GFX_TX5P 23
GFX_TX5N 23
GFX_TX6P 23
GFX_TX6N 23
GFX_TX7P 23
GFX_TX7N 23
GFX_TX8P 22
GFX_TX8N 22
GFX_TX9P 22
GFX_TX9N 22
GFX_TX10P 22
GFX_TX10N 22
GFX_TX11P 22
GFX_TX11N 22
GFX_TX12P 22
GFX_TX12N 22
GFX_TX13P 22
GFX_TX13N 22
GFX_TX14P 22
GFX_TX14N 22
GFX_TX15P 22
GFX_TX15N 22
C324 0.1u/10v/X7/4 C324 0.1u/10v/X7/4
C320 0.1u/10v/X7/4 C320 0.1u/10v/X7/4
C322 0.1u/10v/X7/4 C322 0.1u/10v/X7/4
C319 0.1u/10v/X7/4 C319 0.1u/10v/X7/4
C295 0.1u/10v/X7/4 C295 0.1u/10v/X7/4
C293 0.1u/10v/X7/4 C293 0.1u/10v/X7/4
C294 0.1u/10v/X7/4 C294 0.1u/10v/X7/4
C302 0.1u/10v/X7/4 C302 0.1u/10v/X7/4
C309 0.1u/10v/X7/4 C309 0.1u/10v/X7/4
C307 0.1u/10v/X7/4 C307 0.1u/10v/X7/4
C312 0.1u/10v/X7/4 C312 0.1u/10v/X7/4
C308 0.1u/10v/X7/4 C308 0.1u/10v/X7/4
VCCNB1_1
PE0_TX 24
PE0_TX# 24
TXLANP1 28
TXLANN1 28
TXUSBP2 29
TXUSBN2 29
A_TX0P 17
A_TX0N 17
A_TX1P 17
A_TX1N 17
A_TX2P 17
A_TX2N 17
A_TX3P 17
A_TX3N 17
VCCP
C161
C161
C175
X_0.01u/16v/X7/4
X_0.01u/16v/X7/4
Adding some 0.01?uF stitching capacitors
for crossing a split when these signals
change different reference layer.
A A
5
C175
X_0.01u/16v/X7/4
X_0.01u/16v/X7/4
4
3
RS880 Display Port Support (muxed on GFX)
DP0
DP1
GFX_TX0,TX1,TX2 and TX3
AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7
AUX1 and HPD1
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
2
http://www.msi.com.tw
RS780-HT L
RS780-HT L
RS780-HT L
MS-7642
MS-7642
MS-7642
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Tuesday, January 19, 2010
Tuesday, January 19, 2010
Tuesday, January 19, 2010
13 41
13 41
13 41
Rev
Rev
Rev
0A
0A
0A
of
of
of