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MS-7774
Schematic 1.0
26 pgs1.11 Mb0

MSI MS-7774 Schematic 1.0

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5
D D
4
3
2
1
H61GV22D-在gv22C基础上VGA部分行场信号串电阻
Version: 1.0
C C
B B
A A
GM Confidential
GM Confidential
GM Confidential
Title
Title
Title
Document Number Rev
Size Document Number Rev
Size Document Number Rev
Size B
B
B Date: Sheet
5
4
3
2
Cover Sheet
Cover Sheet
Cover Sheet
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
13
13
13
of
of
of
1.0
0Monday, June 04, 2012
0Monday, June 04, 2012
0Monday, June 04, 2012
5
D D
CPU1C
Near PIN 500MIL
2
GRCOMP
24.9 OHM
B11 B12 D12 D11 C10
C9
E10
E9 B8 B7 C6 C5 A5 A6 E2 E1 F4 F3 G2
G1
H3 H4 J1 J2 K3 K4 L1
L2 M3 M4
N1
N2 W5
W4
V3
V4
Y3
Y4
AA4 AA5
P3
P4
R2
R1
T4
T3
U2
U1
B5
C4
B4
PEG_RX[0] PEG_RX#[0] PEG_RX[1] PEG_RX#[1] PEG_RX[2] PEG_RX#[2] PEG_RX[3] PEG_RX#[3] PEG_RX[4] PEG_RX#[4] PEG_RX[5] PEG_RX#[5] PEG_RX[6] PEG_RX#[6] PEG_RX[7] PEG_RX#[7] PEG_RX[8] PEG_RX#[8] PEG_RX[9] PEG_RX#[9] PEG_RX[10] PEG_RX#[10] PEG_RX[11] PEG_RX#[11] PEG_RX[12] PEG_RX#[12] PEG_RX[13] PEG_RX#[13] PEG_RX[14] PEG_RX#[14] PEG_RX[15] PEG_RX#[15]
DMI_RX[0] DMI_RX#[0] DMI_RX[1] DMI_RX#[1] DMI_RX[2] DMI_RX#[2] DMI_RX_3 DMI_RX#[3]
PE_RX[0] PE_RX#[0] PE_RX[1] PE_RX#[1] PE_RX[2] PE_RX#[2] PE_RX[3] PE_RX#[3]
PEG_ICOMPO PEG_RCOMPO PEG_ICOMPI
SKT_H2
CPU
EXP_A_RX_0_DP10 EXP_A_RX_0_DN10 EXP_A_RX_1_DP10 EXP_A_RX_1_DN10 EXP_A_RX_2_DP10 EXP_A_RX_2_DN10 EXP_A_RX_3_DP10 EXP_A_RX_3_DN10 EXP_A_RX_4_DP10 EXP_A_RX_4_DN10 EXP_A_RX_5_DP10 EXP_A_RX_5_DN10 EXP_A_RX_6_DP10 EXP_A_RX_6_DN10 EXP_A_RX_7_DP10 EXP_A_RX_7_DN10 EXP_A_RX_8_DP10 EXP_A_RX_8_DN10 EXP_A_RX_9_DP10 EXP_A_RX_9_DN10 EXP_A_RX_10_DP10 EXP_A_RX_10_DN10 EXP_A_RX_11_DP10 EXP_A_RX_11_DN10 EXP_A_RX_12_DP10 EXP_A_RX_12_DN10 EXP_A_RX_13_DP10 EXP_A_RX_13_DN10
C C
EXP_A_RX_14_DP10 EXP_A_RX_14_DN10 EXP_A_RX_15_DP10 EXP_A_RX_15_DN10
DMI_IT_MR_0_DP11 DMI_IT_MR_0_DN11 DMI_IT_MR_1_DP11 DMI_IT_MR_1_DN11 DMI_IT_MR_2_DP11 DMI_IT_MR_2_DN11 DMI_IT_MR_3_DP11 DMI_IT_MR_3_DN11
V_CPU_VCCIO
R2
CPU
SHORT B4 & C4 TOGETHER, ROUTE AS A SINGLE 4 MIL TRACE TO Rcomp, ROUTE B5 TO RCOMP AS A SEPERATE 10 MIL TRACE
040
?
SKT_H2
REV = 4
BALLMAP_REV = 1.6
3 OF 11
4
C13
PEG_TX[0]
C14
PEG_TX#[0]
E14
PEG_TX[1]
E13
PEG_TX#[1]
G14
PEG_TX[2]
G13
PEG_TX#[2]
F12
PEG_TX[3]
F11
PEG_TX#[3]
J14
PEG_TX[4]
J13
PEG_TX#[4]
D8
PEG_TX[5]
D7
PEG_TX#[5]
D3
PEG_TX[6]
C3
PEG_TX#[6]
E6
PEG_TX[7]
E5
PEG_TX#[7]
F8
PEG_TX[8]
F7
PEG_TX#[8]
G10
PEG_TX[9]
G9
PEG_TX#[9]
G5
PEG_TX[10]
G6
PEG_TX#[10]
K7
PEG_TX[11]
K8
PEG_TX#[11]
J5
PEG_TX[12]
J6
PEG_TX#[12]
M8
PEG_TX[13]
M7
PEG_TX#[13]
L6
PEG_TX[14]
L5
PEG_TX#[14]
N5
PEG_TX[15]
N6
PEG_TX#[15]
V7
DMI_TX[0]
V6
DMI_TX#[0]
W7
DMI_TX[1]
W8
DMI_TX#[1]
Y6
DMI_TX[2]
Y7
DMI_TX#[2]
DMIGEN PEG
DMI_TX[3]
DMI_TX#[3]
PE_TX[0]
PE_TX#[0]
PE_TX[1]
PE_TX#[1]
PE_TX[2]
PE_TX#[2]
PE_TX[3]
PE_TX#[3]
AA7 AA8
P8
Note
P7 T7 T8 R6 R5 U5 U6
?
PCIE X4 LANES ARE NOT SUPPORTED ON DESKTOP CPU SKUS
EXP_A_TX_0_DP EXP_A_TX_0_DN EXP_A_TX_1_DP EXP_A_TX_1_DN EXP_A_TX_2_DP EXP_A_TX_2_DN EXP_A_TX_3_DP EXP_A_TX_3_DN EXP_A_TX_4_DP EXP_A_TX_4_DN EXP_A_TX_5_DP EXP_A_TX_5_DN EXP_A_TX_6_DP EXP_A_TX_6_DN EXP_A_TX_7_DP EXP_A_TX_7_DN EXP_A_TX_8_DP EXP_A_TX_8_DN EXP_A_TX_9_DP EXP_A_TX_9_DN EXP_A_TX_10_DP EXP_A_TX_10_DN EXP_A_TX_11_DP EXP_A_TX_11_DN EXP_A_TX_12_DP EXP_A_TX_12_DN EXP_A_TX_13_DP EXP_A_TX_13_DN EXP_A_TX_14_DP EXP_A_TX_14_DN EXP_A_TX_15_DP EXP_A_TX_15_DN
DMI_MT_IR_0_DP DMI_MT_IR_0_DN DMI_MT_IR_1_DP DMI_MT_IR_1_DN DMI_MT_IR_2_DP DMI_MT_IR_2_DN DMI_MT_IR_3_DP DMI_MT_IR_3_DN
3
?
SKT_H2
CPU1D
AC5 AC4
AE5 AE4
AG3 AE2
AE1
4 OF 11
BALLMAP_REV = 1.6
FDI_FSYNC_0 FDI_LSYNC_0
FDI_LSYNC_1 FDI_FSYNC_1
FDI_INT FDI_COMPIO
FDI_ICOMPO
SKT_H2
CPU
REV = 4
10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
10 10 10 10 10 10 10 10 10 10 10 10
11
11
11
11
11
11
11
11
V_CPU_VCCIO
R1
FDI_FSYNC_013 FDI_LSYNC_013
FDI_FSYNC_113 FDI_LSYNC_113
FDI_INT13
040
2
SNB_IPL_RCOMP
24.9 OHM
CPU
W=10 Near PIN 250MIL
FDI_TX[0]
2
AC8
FDI_TX[0]
AC7
FDI_TX#[0]
AC2
FDI_TX[1]
AC3
FDI_TX#[1]
AD2
FDI_TX[2]
AD1
FDI_TX#[2]
AD4
FDI_TX[3]
AD3
FDI_TX#[3]
AD7
FDI_TX[4]
AD6
FDI_TX#[4]
AE7
FDI_TX[5]
AE8
FDI_TX#[5]
AF3
FDI_TX[6]
AF2
FDI_TX#[6]
AG2
FDI_TX[7]
AG1
FDI_TX#[7]
FDI LINK
?
FDI_TX_0_DP FDI_TX_0_DN FDI_TX_1_DP FDI_TX_1_DN FDI_TX_2_DP FDI_TX_2_DN FDI_TX_3_DP FDI_TX_3_DN
FDI_TX_4_DP FDI_TX_4_DN FDI_TX_5_DP FDI_TX_5_DN FDI_TX_6_DP FDI_TX_6_DN FDI_TX_7_DP FDI_TX_7_DN
13 13 13 13 13 13 13 13
13 13 13 13 13 13 13 13
1
B B
A A
GM Confidential
GM Confidential
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev C
C
C Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
GM Confidential
H2-PCIE&FDI
H2-PCIE&FDI
H2-PCIE&FDI
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
1.0
of
of
of
0Monday, June 04, 2012
0Monday, June 04, 2012
0Monday, June 04, 2012
33
33
33
5
4
3
2
1
AM10
AL10
AP10 AR10
AM12 AM13 AR13 AP13
AL12
AL13 AR12 AP12 AR28 AR29
AL28
AL29 AP28 AP29 AM28 AM29 AP32 AP31 AP35 AP34 AR32 AR31 AR35 AR34 AM32 AM31
AL35
AL32 AM34
AL31 AM35
AL34 AH35 AH34 AE34 AE35
AJ35
AJ34
AF33
AF35
AN13 AN29 AP33
AL33 AG35
AN12 AN28 AR33 AM33 AG34
AG7 AG8
AG5 AG6
AM7
AM6 AM9
AP7 AR7
AP6 AR6 AP9 AR9
AH7 AM8 AR8
AH6 AP8
AJ9 AJ8
AJ6 AJ7 AL7
AL6 AL9
AL8
SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#7]
?
CPU
9
9 9
?
SKT_H2
REV = 4
BALLMAP_REV = 1.6
SB_CK[0]
SB_DIMM_DQVREF SA_DIMM_DQVREF
2 OF 11
CPU1B
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]
SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
SB_WE# SB_CAS# SB_RAS#
SB_BS[0] SB_BS[1] SB_BS[2]
SB_CS#[0] SB_CS#[1] SB_CS#[2] SB_CS#[3]
SB_CKE[0]
SB_CKE[1]
SB_CKE[2] SB_CKE[3]
SB_ODT[0] SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
SB_CK[0]
SB_CK#[0]
SB_CK[1]
SB_CK#[1]
SB_CK[2]
SB_CK#[2]
SB_CK[3]
SB_CK#[3]
SB_DQS[8]
SB_DQS#[8]
SB_ECC_CB[0] SB_ECC_CB[1] SB_ECC_CB[2] SB_ECC_CB[3] SB_ECC_CB[4] SB_ECC_CB[5] SB_ECC_CB[6] SB_ECC_CB[7]
DDR_B
SKT_H2
AK24
M_MAA_B0
AM20
M_MAA_B1
AM19
M_MAA_B2
AK18
M_MAA_B3
AP19
M_MAA_B4
AP18
M_MAA_B5
AM18
M_MAA_B6
AL18
M_MAA_B7
AN18
M_MAA_B8
AY17
M_MAA_B9
AN23
M_MAA_B10
AU17
M_MAA_B11
AT18
M_MAA_B12
AR26
M_MAA_B13
AY16
M_MAA_B14
AV16
M_MAA_B15
AR25 AK25 AP24
AP23 AM24 AW17
AN25 AN26 AL25 AT26
AU16 AY15 AW15 AV15
AL26 AP26 AM26 AK26
AL21 AL22 AL20 AK20 AL23 AM22 AP21 AN21
AH1 AH4
AN16 AN15
AL16 AM16 AP16 AR16 AL15 AM15 AR15 AP15
M_CAS_B_N M_RAS_B_N
M_SBS_B0 M_SBS_B1 M_SBS_B2
M_SCS_B_N0 M_SCS_B_N1 M_SCS_B_N2 M_SCS_B_N3
M_SCKE_B0 M_SCKE_B1 M_SCKE_B2 M_SCKE_B3
M_ODT_B0 M_ODT_B1 M_ODT_B2 M_ODT_B3
C2
0402
0.1UF/16V
CPU
Design Note
DDR ECC IS NOT SUPPORTED ON DESKTOP SKUS ECC TRACES ARE FOR ENGINEERING FUNCTION ONLY
M_MAA_B[0..15]
M_WE_B_N
9 9 9
M_SBS_B[0..2]
M_SCS_B_N[0..3]
M_SCKE_B[0..3]
CK_M_DDR0_B_DP CK_M_DDR0_B_DN CK_M_DDR1_B_DP CK_M_DDR1_B_DN CK_M_DDR2_B_DP CK_M_DDR2_B_DN CK_M_DDR3_B_DP CK_M_DDR3_B_DN
DIMM_DQ_CPU_VREF_A
9
9
9
9
9 9 9 9
DIMM_DQ_CPU_VREF_B
C1
8
0402
0.1UF/16V
CPU
9
M_DATA_B[0..63] M_DQS_B_DP[0..7]
M_DATA_B0 M_DATA_B1 M_DATA_B2 M_DATA_B3 M_DATA_B4 M_DATA_B5 M_DATA_B6 M_DATA_B7 M_DATA_B13 M_DATA_B9 M_DATA_B11 M_DATA_B15 M_DATA_B12 M_DATA_B8 M_DATA_B14 M_DATA_B10 M_DATA_B16 M_DATA_B17 M_DATA_B18 M_DATA_B19 M_DATA_B20 M_DATA_B21 M_DATA_B22 M_DATA_B23 M_DATA_B24 M_DATA_B25 M_DATA_B26 M_DATA_B27 M_DATA_B28 M_DATA_B29 M_DATA_B30 M_DATA_B31 M_DATA_B32 M_DATA_B33 M_DATA_B34 M_DATA_B35 M_DATA_B36 M_DATA_B37 M_DATA_B38 M_DATA_B39 M_DATA_B40 M_DATA_B41 M_DATA_B42 M_DATA_B43 M_DATA_B44 M_DATA_B45 M_DATA_B46 M_DATA_B47 M_DATA_B48 M_DATA_B52 M_DATA_B55 M_DATA_B51 M_DATA_B54 M_DATA_B49 M_DATA_B53 M_DATA_B50 M_DATA_B56 M_DATA_B57 M_DATA_B58 M_DATA_B59 M_DATA_B60 M_DATA_B61 M_DATA_B62 M_DATA_B63
M_DQS_B_DP0 M_DQS_B_DP1 M_DQS_B_DP2 M_DQS_B_DP3 M_DQS_B_DP4 M_DQS_B_DP5 M_DQS_B_DP6 M_DQS_B_DP7
M_DQS_B_DN0 M_DQS_B_DN1 M_DQS_B_DN2 M_DQS_B_DN3 M_DQS_B_DN4 M_DQS_B_DN5 M_DQS_B_DN6 M_DQS_B_DN7
M_DQS_B_DN[0..7]
AU35
AW37
AU39 AU36
AW35
AY36 AU38 AU37 AR40 AR37 AN38 AN37 AR39 AR38 AN39 AN40 AL40 AL37 AJ38 AJ37 AL39 AL38 AJ39 AJ40 AG40 AG37 AE38 AE37 AG39 AG38 AE39 AE40
AV37 AP38 AK38 AF38
AV36 AP39 AK39 AF39
8
8 8
AJ3
SA_DQ[0]
AJ4
SA_DQ[1]
AL3
SA_DQ[2]
AL4
SA_DQ[3]
AJ2
SA_DQ[4]
AJ1
SA_DQ[5]
AL2
SA_DQ[6]
AL1
SA_DQ[7]
AN1
SA_DQ[8]
AN4
SA_DQ[9]
AR3
SA_DQ[10]
AR4
SA_DQ[11]
AN2
SA_DQ[12]
AN3
SA_DQ[13]
AR2
SA_DQ[14]
AR1
SA_DQ[15]
AV2
SA_DQ[16]
AW3
SA_DQ[17]
AV5
SA_DQ[18]
AW5
SA_DQ[19]
AU2
SA_DQ[20]
AU3
SA_DQ[21]
AU5
SA_DQ[22]
AY5
SA_DQ[23]
AY7
SA_DQ[24]
AU7
SA_DQ[25]
AV9
SA_DQ[26]
AU9
SA_DQ[27]
AV7
SA_DQ[28]
AW7
SA_DQ[29]
AW9
SA_DQ[30]
AY9
SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
AK3
SA_DQS[0]
AP3
SA_DQS[1]
AW4
SA_DQS[2]
AV8
SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
AK2
SA_DQS#[0]
AP2
SA_DQS#[1]
AV4
SA_DQS#[2]
AW8
SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
?
CPU
?
SKT_H2
REV = 4
BALLMAP_REV = 1.6
1 OF 11
CPU1A
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
SA_WE# SA_CAS# SA_RAS#
SA_BS_0 SA_BS[1] SA_BS[2]
SA_CS#[0] SA_CS#[1] SA_CS#[2] SA_CS#[3]
SA_CKE[0] SA_CKE[1] SA_CKE[3] SA_CKE[2]
SA_ODT[0] SA_ODT[1] SA_ODT[2] SA_ODT[3]
SA_CK[0]
SA_CK#[0]
SA_CK[1]
SA_CK#[1]
SA_CK[2]
SA_CK#[2]
SA_CK[3]
SA_CK#[3]
SM_DRAMRST#
SA_DQS[8]
SA_DQS#[8]
SA_ECC_CB[0] SA_ECC_CB[1] SA_ECC_CB[2] SA_ECC_CB[3] SA_ECC_CB[4] SA_ECC_CB[5] SA_ECC_CB[6] SA_ECC_CB[7]
DDR_A
SKT_H2
AV27
M_MAA_A0
AY24
M_MAA_A1
AW24
M_MAA_A2
AW23
M_MAA_A3
AV23
M_MAA_A4
AT24
M_MAA_A5
AT23
M_MAA_A6
AU22
M_MAA_A7
AV22
M_MAA_A8
AT22
M_MAA_A9
AV28
M_MAA_A10
AU21
M_MAA_A11
AT21
M_MAA_A12
AW32
M_MAA_A13
AU20
M_MAA_A14
AT20
M_MAA_A15
AW29 AV30 AU28
AY29 AW28 AV20
AU29 AV32 AW30 AU33
AV19 AT19 AU18 AV18
AV31 AU32 AU30 AW33
AY25 AW25 AU24 AU25 AW27 AY27 AV26 AW26
AW18
AV13 AV12
AU12 AU14 AW13 AY13 AU13 AU11 AY12 AW12
M_CAS_A_N M_RAS_A_N
M_SBS_A0 M_SBS_A1 M_SBS_A2
M_SCS_A_N0 M_SCS_A_N1 M_SCS_A_N2 M_SCS_A_N3
M_SCKE_A0 M_SCKE_A1 M_SCKE_A2 M_SCKE_A3
M_ODT_A0 M_ODT_A1 M_ODT_A2 M_ODT_A3
DDR3_DRAMRST_N_R6PR
Design Note
DDR ECC IS NOT SUPPORTED ON DESKTOP SKUS ECC TRACES ARE FOR ENGINEERING FUNCTION ONLY
M_WE_A_N
M_SCS_A_N[0..3]
M_SCKE_A[0..3]
M_ODT_A[0..3]
CK_M_DDR0_A_DP CK_M_DDR0_A_DN CK_M_DDR1_A_DP CK_M_DDR1_A_DN CK_M_DDR2_A_DP CK_M_DDR2_A_DN CK_M_DDR3_A_DP CK_M_DDR3_A_DN
M_MAA_A[0..15]
8 8 8
M_SBS_A[0..2]
040
2
R3
0 OHM
RC FILTER
CPU
8
0402
CPU
8
DQ REMAPPING IMPLEMENTED TO IMPROVE BREAKOUT AND MINIMIZE CH-2-CH COUPLING
8
8
8
8
DQ REMAPPING IMPLEMENTED TO
8
IMPROVE BREAKOUT AND MINIMIZE
8
CH-2-CH COUPLING
8
DDR3_DRAMRST_N
C3
NS
0.1UF/16V
8,9
M_DATA_A[0..63] M_DQS_A_DP[0..7] M_DQS_A_Dn[0..7]
M_DATA_A0 M_DATA_A1
D D
C C
B B
M_DATA_A2 M_DATA_A3 M_DATA_A4 M_DATA_A5 M_DATA_A6 M_DATA_A7 M_DATA_A8 M_DATA_A9 M_DATA_A10 M_DATA_A11 M_DATA_A12 M_DATA_A13 M_DATA_A14 M_DATA_A15 M_DATA_A16 M_DATA_A17 M_DATA_A18 M_DATA_A19 M_DATA_A20 M_DATA_A21 M_DATA_A22 M_DATA_A23 M_DATA_A24 M_DATA_A25 M_DATA_A26 M_DATA_A27 M_DATA_A28 M_DATA_A29 M_DATA_A30 M_DATA_A31 M_DATA_A32 M_DATA_A33 M_DATA_A34 M_DATA_A35 M_DATA_A36 M_DATA_A37 M_DATA_A38 M_DATA_A39 M_DATA_A40 M_DATA_A41 M_DATA_A42 M_DATA_A43 M_DATA_A44 M_DATA_A45 M_DATA_A46 M_DATA_A47 M_DATA_A48 M_DATA_A49 M_DATA_A50 M_DATA_A51 M_DATA_A52 M_DATA_A53 M_DATA_A54 M_DATA_A55 M_DATA_A56 M_DATA_A57 M_DATA_A58 M_DATA_A59 M_DATA_A60 M_DATA_A61 M_DATA_A62 M_DATA_A63
M_DQS_A_DP0 M_DQS_A_DP1 M_DQS_A_DP2 M_DQS_A_DP3 M_DQS_A_DP4 M_DQS_A_DP5 M_DQS_A_DP6 M_DQS_A_DP7
M_DQS_A_DN0 M_DQS_A_DN1 M_DQS_A_DN2 M_DQS_A_DN3 M_DQS_A_DN4 M_DQS_A_DN5 M_DQS_A_DN6 M_DQS_A_DN7
A A
GM Confidential
GM Confidential
Title
Title
Title
Document Number Rev
Size Document Number Rev
Size Document Number Rev
Size C
C
C Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
GM Confidential
H2-DRAM
H2-DRAM
H2-DRAM
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
1.0
of
of
of
0Monday, June 04, 2012
0Monday, June 04, 2012
0Monday, June 04, 2012
43
43
43
5
4
3
2
1
?
SKT_H2
CPU1E
REV = 4
D D
040
2
110 OHM
040
2
040
2
51 OHM NS
040
2
75 OHM
040
2
1K OHM NS
040
2
1K OHM NS
040
2
51 OHM
040
2
51 OHM NS
040
2
51 OHM
040
2
51 OHM
040
2
51 OHM
H_TCK
H_TRST_N
060
3
200 OHM
R26 R27 R28
90.9 OHM
040
040
040
H_VIDSOUT H_VIDSCK H_PWRGD H_VIDALERT_N H_PECI H_CATERR_N H_PROCHOT_R_N H_THERMTRIP_N H_TDO H_TDI H_TMS
040
2
51 OHM
R21
040
2
R22
51 OHM
H_DRAMPWRGD
2
0 OHM
2
0 OHM
2
H_VIDALERT_NH_VIDALERT_N_VR
0 OHM
060
3
R607
1K OHM
V_SM
0
R23
4 0 2
100 OHM
SNB_DDR_VREF
0
0402
R25
4 0 2
100 OHM
H_VIDSCKH_VIDSCK_VR
H_VIDSOUTH_VIDSOUT_VR
H_PROCHOT_N27
C4
0.1UF/16V
V_SM
R8 R9 R10 R11 R12 R13 R14 R15 R17 R19 R20
Near CPU 1.5"
R4
V_CPU_VCCIO
H_VIDSCK_VR27 H_VIDSOUT_VR27 H_VIDALERT_N_VR27
C C
3D3V_SB
2 0
R29
4 0
1K/NC
040
2
H_SKTOCC_N
R30
H_SKTOCC_R_N12
V_1P8_SFR
0
R32
4 0 2
2.2K OHM
H_SNB_N
DMI/FDI TERMINATION VOLTAGE DC COUPLED: TX/RX TO VCC ISF SAMPLED HIGH DC COUPLED: TX/RX TO VSS IF SAMPLED LOW AC COUPLED: TX SET TO VCC/2, RX SET TO VSS REGARDLESS OF THIS STRAP
TPEV_SNB_PCUDEBUG_0 TPEV_SNB_PCUDEBUG_1 TPEV_SNB_PCUDEBUG_2 TPEV_SNB_PCUDEBUG_3
B B
TPEV_SNB_PCUDEBUG_4 TPEV_SNB_PCUDEBUG_5 TPEV_SNB_PCUDEBUG_6 TPEV_SNB_PCUDEBUG_7 TPEV_SNB_PCUDEBUG_8 TPEV_SNB_PCUDEBUG_9 TPEV_SNB_PCUDEBUG_10 TPEV_SNB_PCUDEBUG_11 TPEV_SNB_PCUDEBUG_12 TPEV_SNB_PCUDEBUG_13 TPEV_SNB_PCUDEBUG_14 TPEV_SNB_PCUDEBUG_15 TPEV_SNB_PCUSTB_0 TPEV_SNB_PCUSTB_1
PLACE AS NEAR AS POSSIBLE TO SNB
C445
0402
0.1UF/16V
0
NS
2 0
R31
4 0
10K/NC
R33
R34 R35 R36 R37 R38 R39 R40 R41 R42 R43 R44 R45 R46 R47 R48 R49 R50 R51
040
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
040
2
1K OHM NS
2
4.7K OHM
Near PCH 100MIL
NVR_CLE
SNB STRAP TABLE
CFG H L DESCRIPTION
27
H_SKTOCC_N
11
0 RESERVED RESERVED RESERVED 1
RESERVED
RESERVED
NORM REVERSE PEGLANE REVERSAL[0],X16
2
RESERVED RESERVED RESERVED
3
RESERVED RESERVED RESERVED
4 5
**
6
**
RESERVED RESERVED RESERVED
7
RESERVED RESERVED RESERVED
8
RESERVED RESERVED RESERVED
9 10
RESERVED RESERVED RESERVED
11
RESERVED RESERVED RESERVED
12
RESERVED RESERVED RESERVED
13
RESERVED RESERVED RESERVED
14
RESERVED RESERVED RESERVED
15
RESERVED RESERVED RESERVED
PEG CONFIG TABLE
SEL1
1
1
SEL0
1
0
H_VIDALERT_N
RESERVED
PEOFGSEL[0] PEOFGSEL[1]
PCIE CONFIG
1X16 (Default)
2X8
CK_PE_100M_MCP_DP13 CK_PE_100M_MCP_DN13
040
R7
040
R16
H_PWRGD12,21 H_DRAMPWRGD12 PLTRST_CPU_N21
H_PM_SYNC_012
H_PECI12,23
040
2
0 OHM
R18
H_THERMTRIP_N12
TPEV_SNB_PCUDEBUG_0 TPEV_SNB_PCUDEBUG_1 TPEV_SNB_PCUDEBUG_2 TPEV_SNB_PCUDEBUG_3 TPEV_SNB_PCUDEBUG_4 TPEV_SNB_PCUDEBUG_5 TPEV_SNB_PCUDEBUG_6 TPEV_SNB_PCUDEBUG_7 TPEV_SNB_PCUDEBUG_8 TPEV_SNB_PCUDEBUG_9 TPEV_SNB_PCUDEBUG_10 TPEV_SNB_PCUDEBUG_11 TPEV_SNB_PCUDEBUG_12 TPEV_SNB_PCUDEBUG_13 TPEV_SNB_PCUDEBUG_14 TPEV_SNB_PCUDEBUG_15 TPEV_SNB_PCUSTB_0 TPEV_SNB_PCUSTB_1
2
44.2 OHM
2
100 OHM
NS
H_CATERR_N
H_PROCHOT_R_N
H_SKTOCC_N H_SNB_N
SNB_DDR_VREF
H_VIDSCK H_VIDSOUT VIDALERT_N
VIDALERT_N
AJ19
AJ33
AJ22
AT14
W2
BCLK[0]
W1
BCLK#[0]
C37
VIDSCLK
B37
VIDSOUT
A37
VIDALERT#
J40
UNCOREPWRGOOD SM_DRAMPWROK
F36
RESET#
E38
PM_SYNC
J35
PECI
E37
CATERR#
H34
PROCHOT#
G35
THERMTRIP# SKTOCC#
K32
FC_K32 SM_VREF
SKT_H2
H36
CFG[0]
J36
CFG[1]
J37
CFG[2]
K36
CFG[3]
L36
CFG[4]
N35
CFG[5]
L37
CFG[6]
M36
CFG[7]
J38
CFG[8]
L35
CFG[9]
M38
CFG[10]
N36
CFG[11]
N38
CFG[12]
N39
CFG[13]
N37
CFG[14]
N40
CFG[15]
G37
CFG[16]
G36
CFG[17]
RSVD1
AY3
RSVD2
H7
RSVD3
H8
RSVD4
BALLMAP_REV = 1.6
5 OF 11
VCCIO_SELECT
VCCSA_VID_0
VCCSA_SENSE
VCC_SENSE VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
VCCAXG_SENSE VSSAXG_SENSE
BCLK_ITP#
VCC_VALIDATION_SENSE
VSSU_VALIDATION_SENSE
VCCAXG_VALIDATION_SENSE
VSSGT_VALIDATION_SENSE
MISC
TRST# PRDY# PREQ#
DBR#
BCLK_ITP
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
RSVD5 RSVD6 RSVD7 RSVD8 RSVD9
RSVD10 RSVD11
RSVD12 RSVD13
RSVD14 RSVD15 RSVD16
RSVD17
P33 P34
VCCSA_VID
T2
VCCSA_SENSE
A36
VCC_SENSE
B36
VSS_SENSE
AB4
VCCP_SENSE
AB3
VSSP_SENSE
L32
VCCAXG_SENSE
M32
VSSAXG_SENSE
L39
H_TDO
TDO
L40
H_TDI
TDI
M40
H_TCK
TCK
L38
H_TMS
TMS
J39
H_TRST_N
K38
H_PRDY_N
K40
H_PREQ_N
E39
XDP_DBRESET_N
C40 D40
?
H40 H38 G38 G40 G39 F38 E40 F40
B39 J33 L34 L33 K34
N33 M34
AV1 AW2
L9 J9 K9
L31 J31
K31 AD34
AD35
VCC
0
R5
4 0 2
10K OHM
VCCIO_SEL
24
24
0
R6
4 0 2
4.7K OHM
27 27
27
27
040
2
R24
0
FP_RST_N
12,22
A A
GM Confidential
GM Confidential
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev C
C
C Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
GM Confidential
H2-MISC
H2-MISC
H2-MISC
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
1.0
of
of
of
0Monday, June 04, 2012
0Monday, June 04, 2012
0Monday, June 04, 2012
53
53
53
5
?
SKT_H2
CPU1F
REV = 4
A12
BALLMAP_REV = 1.6
VCC1
A13
VCC2
A14
VCC3
A15
VCC4
A16
VCC5
A18
VCC6
A24
VCC7
A25
VCC8
A27
VCC9
D D
C C
B B
A28
VCC10
B15
VCC11
B16
VCC12
B18
VCC13
B24
VCC14
B25
VCC15
B27
VCC16
B28
VCC17
B30
VCC18
B31
VCC19
B33
VCC20
B34
VCC21
C15
VCC22
C16
VCC23
C18
VCC24
C19
VCC25
C21
VCC26
C22
VCC27
C24
VCC28
C25
VCC29
C27
VCC30
C28
VCC31
C30
VCC32
C31
VCC33
C33
VCC34
C34
VCC35
C36
VCC36
D13
VCC37
D14
VCC38
D15
VCC39
D16
VCC40
D18
VCC41
D19
VCC42
D21
VCC43
D22
VCC44
D24
VCC45
D25
VCC46
D27
VCC47
D28
VCC48
D30
VCC49
D31
VCC50
D33
VCC51
D34
VCC52
D35
VCC53
D36
VCC54
E15
VCC55
E16
VCC56
E18
VCC57
E19
VCC58
E21
VCC59
E22
VCC60
E24
VCC61
E25
VCC62
E27
VCC63
E28
VCC64
E30
VCC65
E31
VCC66
E33
VCC67
E34
VCC68
E35
VCC69
F15
VCC70
F16
VCC71
F18
VCC72
F19
VCC73
F21
VCC74
F22
VCC75
F24
VCC76
F25
VCC77
F27
VCC78
F28
VCC79
F30
VCC80
F31
VCC81
SKT_H2
6 OF 11
CPU POWER
VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98
VCC99 VCC100 VCC101 VCC102 VCC103 VCC104 VCC105 VCC106 VCC107 VCC108 VCC109 VCC110 VCC111 VCC112 VCC113 VCC114 VCC115 VCC116 VCC117 VCC118 VCC119 VCC120 VCC121 VCC122 VCC123 VCC124 VCC125 VCC126 VCC127 VCC128 VCC129 VCC130 VCC131 VCC132 VCC133 VCC134 VCC135 VCC136 VCC137 VCC138 VCC139 VCC140 VCC141 VCC142 VCC143 VCC144 VCC145 VCC146 VCC147 VCC148 VCC149 VCC150 VCC151 VCC152 VCC153 VCC154 VCC155 VCC156 VCC157 VCC158 VCC159 VCC160 VCC161
VCCPVCCP
F32 F33 F34 G15 G16 G18 G19 G21 G22 G24 G25 G27 G28 G30 G31 G32 G33 H13 H14 H15 H16 H18 H19 H21 H22
?
H24 H25 H27 H28 H30 H31 H32 J12 J15 J16 J18 J19 J21 J22 J24 J25 J27 J28 J30 K15 K16 K18 K19 K21 K22 K24 K25 K27 K28 K30 L13 L14 L15 L16 L18 L19 L21 L22 L24 L25 L27 L28 L30 M14 M15 M16 M18 M19 M21 M22 M24 M25 M27 M28 M30
4
?
AB33 AB34 AB35 AB36 AB37 AB38 AB39 AB40 AC33 AC34 AC35 AC36 AC37 AC38 AC39 AC40
CPU1G
VCCAXG1 VCCAXG2 VCCAXG3 VCCAXG4 VCCAXG5 VCCAXG6 VCCAXG7 VCCAXG8 VCCAXG9 VCCAXG10 VCCAXG11 VCCAXG12 VCCAXG13 VCCAXG14 VCCAXG15 VCCAXG16
T33
VCCAXG17
T34
VCCAXG18
T35
VCCAXG19
T36
VCCAXG20
T37
VCCAXG21
T38
VCCAXG22
T39
VCCAXG23
T40
VCCAXG24
U33
VCCAXG25
U34
VCCAXG26
U35
VCCAXG27
U36
VCCAXG28
U37
VCCAXG29
U38
VCCAXG30
U39
VCCAXG31
U40
VCCAXG32
W33
VCCAXG33
W34
VCCAXG34
W35
VCCAXG35
W36
VCCAXG36
W37
VCCAXG37
W38
VCCAXG38
Y33
VCCAXG39
Y34
VCCAXG40
Y35
VCCAXG41
Y36
VCCAXG42
Y37
VCCAXG43
Y38
VCCAXG44
V_AXG
SKT_H2
REV = 4
BALLMAP_REV = 1.6
7 OF 11
SKT_H2
GFX POWERGFX POWER
3
?
2
?
AG33
AJ16 AJ17 AJ26 AJ28
AJ32 AK15 AK17 AK19 AK21 AK23 AK27 AK29 AK30
AK11 AK12
CPU1H
M13 A11
A7 AA3 AB8 AF8
B9 D10
D6
E3
E4
G3 G4
J3
J4
J7
J8
L3
L4
L7
N3
N4
N7
R3
R4
R7
U3
U4
U7
V8
W3
H10 H11 H12 J10 K10 K11 L11 L12 M10 M11 M12
V_CPU_VCCIO
V_SA
V_1P8_SFR
SKT_H2
REV = 4
BALLMAP_REV = 1.6
VCCIO1 VCCIO2
VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8 VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18
8 OF 11
VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24
SKT_H2
VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39 VCCIO40 VCCIO41 VCCIO42 VCCIO43 VCCIO44 VCCIO45
VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8 VCCSA9 VCCSA10 VCCSA11
VCCPLL1 VCCPLL2
IO/SA/PLL POWER
1
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8
VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22
VDDQ23
V_SM
AJ13 AJ14 AJ23 AJ24 AR20 AR21 AR22 AR23 AR24 AU19 AU23 AU27 AU31 AV21 AV24 AV25 AV29 AV33 AW31 AY23 AY26 AY28
?
AJ20
VCCP
V_AXG
C7
0805
22UF/6.3V
C8
0805
22UF/6.3V
C9
0805
22UF/6.3V
C10
0805
22UF/6.3V
0805
22UF/6.3V
C12
C11
0805
22UF/6.3V
VCCP
C25
C26
C27
C28
C22
C23
C24
0805
0805
0805
0805
0805
22UF/6.3V
22UF/6.3V
22UF/6.3V
VCCP
C33
A A
C32
0805
0805
22UF/6.3V
22UF/6.3V
PLACE ALL 0805 CAPS INSIDE CPU SOCKET CAVITY
5
22UF/6.3V
V_SM
22UF/6.3V
C34
0805
22UF/6.3V
0805
22UF/6.3V
C35
0805
22UF/6.3V
0805
22UF/6.3V
C36
0805
22UF/6.3V
C29
0805
22UF/6.3V
4
CPU CAVITY CAPS
C17
C18
0805
0805
22UF/6.3V
22UF/6.3V
V_AXG
CPU CAVITY CAPS BACKSIDE
C19
0805
22UF/6.3V
0805
22UF/6.3V
NS
C20
0805
22UF/6.3V
C431
C21
0805
22UF/6.3V
C429
0805
22UF/6.3V
3
PLACE ALL 0805 CAPS INSIDE BACKSIDE
VCCP
V_1P8_SFR
C432
0805
22UF/6.3V
2
V_SA
C435
0805
22UF/6.3V
GM Confidential
GM Confidential
Title
Title
Title
Document Number Rev
Size Document Number Rev
Size Document Number Rev
Size C
C
C Date: Sheet
Date: Sheet
Date: Sheet
GM Confidential
H2-POWER
H2-POWER
H2-POWER
Sugar Bay
Sugar Bay
Sugar Bay
1
of
of
of
0Monday, June 04, 2012
0Monday, June 04, 2012
0Monday, June 04, 2012
63
63
63
1.0
1.0
1.0
5
?
SKT_H2
CPU1I
A17
REV = 4
VSS1
A23
BALLMAP_REV = 1.6
VSS2
A26
VSS3
A29
VSS4
A35
VSS5
AA33
VSS6
AA34
VSS7
AA35
VSS8
AA36
VSS9
AA37
VSS10
AA38
VSS11
AA6
VSS12
D D
C C
B B
AD33 AD36 AD38 AD39 AD40
AE33 AE36
AF34 AF36 AF37 AF40
AG36
AH33 AH36 AH37 AH38 AH39 AH40
AJ12 AJ15 AJ18 AJ21 AJ25 AJ27 AJ36
AK10 AK13 AK14 AK16 AK22 AK28 AK31 AK32 AK33 AK34 AK35 AK36 AK37
AK40
AL11 AL14 AL17 AL19 AL24 AL27 AL30 AL36
AM11 AM14 AM17
AM21 AM23 AM25
AV39
AB5 AC1 AC6
AD5 AD8 AE3
AH2 AH3
AH5 AH8
AK1
AK4 AK5
AK6 AK7 AK8 AK9
AM1
AM2
AF1
AF5 AF6 AF7
AJ5
AL5
SKT_H2
A4
VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24
9 OF 11
VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS_AK10 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS_NCTF1 VSS_NCTF2
VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179
AM27 AM3 AM30 AM36 AM37 AM38 AM39 AM4 AM40 AM5 AN10 AN11 AN14 AN17 AN19 AN22 AN24 AN27 AN30 AN31 AN32 AN33 AN34 AN35 AN36 AN5 AN6
?
AN7 AN8 AN9 AP1 AP11 AP14 AP17 AP22 AP25 AP27 AP30 AP36 AP37 AP4 AP40 AP5 AR11 AR14 AR17 AR18 AR19 AR27 AR30 AR36 AR5 AT1 AT10 AT12 AT13 AT15 AT16 AT17 AT2 AT25 AT27 AT28 AT29 AT3 AT30 AT31 AT32 AT33 AT34 AT35 AT36 AT37 AT38 AT39 AT4 AT40 AT5 AT6 AT7 AT8 AT9 AU1 AU15 AU26 AU34 AU4 AU6 AU8 AV10
4
?
SKT_H2
CPU1J
REV = 4
AB7
BALLMAP_REV = 1.6
RSVD1
AD37
RSVD2
AG4
RSVD3
10 OF 11
SKT_H2
AV34
AW34
AU40
AW38
AJ29
RSVD4
AJ30
RSVD5
AJ31
RSVD6 RSVD7 RSVD8
P35
RSVD9
P37
RSVD10
P39
RSVD11
R34
RSVD12
R36
RSVD13
R38
RSVD14
R40
RSVD15
A38
NCTF1 NCTF2 NCTF3
C2
NCTF4
D1
NCTF5
SPARES
RSVD16 RSVD17 RSVD18 RSVD19 RSVD20
RSVD21 RSVD22 RSVD23 RSVD24
RSVD25 RSVD26 RSVD27 RSVD28 RSVD29
3
? AV11
VSS1
AV14
VSS2
AV17
VSS3
AV3
VSS4
AV35
VSS5
AV38
VSS6
AV6
VSS7
AW10
VSS8
AW11
VSS9
AW14
VSS10
AW16
VSS11
AW36
VSS12
AW6
VSS13
AY11
VSS14
AY14
VSS15
AY18
VSS16
AY35
VSS17
AY4
VSS18
AY6
VSS19
AY8
VSS20
B10
VSS21
B13
VSS22
B14
VSS23
B17
VSS24
B23
VSS25
AY37
C11 C12 C17 C20 C23 C26 C29 C32 C35
D17 D20
D23 D26 D29 D32 D37 D39
G11 G12 G17 G20 G23 G26 G29 G34
B26 B29 B32 B35 B38
E11 E12 E17 E20 E23 E26 E29 E32 E36
F10 F13 F14 F17
F20 F23 F26 F29 F35 F37 F39
B6
C7 C8
D2
D4 D5 D9
E7 E8 F1
F2
F5 F6 F9
G7 B3
VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS_NCTF1 VSS_NCTF2
AT11 AP20 AN20 AU10 AY10
AF4 AB6 AE6 AJ11
D38 C39 C38 J34
?
N34
CPU1K
REV = 4
BALLMAP_REV = 1.6
4 OF 11
SKT_H2
2
VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180
1
G8 H1 H17 H2 H20 H23 H26 H29 H33 H35 H37 H39 H5 H6 H9 J11 J17 J20 J23 J26 J29 J32 K1 K12 K13 K14 K17
?
K2 K20 K23 K26 K29 K33 K35 K37 K39 K5 K6 L10 L17 L20 L23 L26 L29 L8 M1 M17 M2 M20 M23 M26 M29 M33 M35 M37 M39 M5 M6 M9 N8 P1 P2 P36 P38 P40 P5 P6 R33 R35 R37 R39 R8 T1 T5 T6 U8 V1 V2 V33 V34 V35 V36 V37 V38 V39 V40 V5 W6 Y5 Y8
A A
GM Confidential
GM Confidential
Title
Title
Title
Document Number Rev
Size Document Number Rev
Size Document Number Rev
Size C
C
C Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
GM Confidential
H2-GND\
H2-GND\
H2-GND\
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
1.0
of
of
of
0Monday, June 04, 2012
0Monday, June 04, 2012
0Monday, June 04, 2012
73
73
73
5
V_SM_VTT
D D
C C
V_SM
PLACE BETWEEN CHA &CHB. DO NOT PUNCH VIA.
0402
0402
C52
B B
A A
C51
0.1UF/16V
0.1UF/16V
VCC3
M_SBS_A[0..2]4
CK_M_DDR1_A_DN4 CK_M_DDR1_A_DP4 CK_M_DDR0_A_DN4 CK_M_DDR0_A_DP4
DDR3_DRAMRST_N4,9
NS
M_CAS_A_N4
M_RAS_A_N4 M_WE_A_N4
DIMM_CA_VREF_A DIMM_DQ_VREF_A
SMB_CLK_MAIN9,10,12,16 SMB_DATA_MAIN9,10,12,16
NS
5
M_SBS_A2 M_SBS_A1 M_SBS_A0
M_SCKE_A1 M_SCKE_A0
M_SCS_A_N1 M_SCS_A_N0
M_MAA_A0 M_MAA_A1 M_MAA_A2 M_MAA_A3 M_MAA_A4 M_MAA_A5 M_MAA_A6 M_MAA_A7 M_MAA_A8 M_MAA_A9 M_MAA_A10 M_MAA_A11 M_MAA_A12 M_MAA_A13 M_MAA_A14 M_MAA_A15
DIMM1
198
FREE1
187
FREE2
49
FREE3
48
FREE4
240
VTT
120
VTT
239
VSS
235
VSS
232
VSS
229
VSS
226
VSS
223
VSS
220
VSS
217
VSS
214
VSS
211
VSS
208
VSS
205
VSS
202
VSS
199
VSS
166
VSS
163
VSS
160
VSS
157
VSS
154
VSS
151
VSS
148
VSS
145
VSS
142
VSS
139
VSS
136
VSS
133
VSS
130
VSS
127
VSS
124
VSS
121
VSS
119
SA2
116
VSS
113
VSS
110
VSS
107
VSS
104
VSS
101
VSS
98
VSS
95
VSS
92
VSS
89
VSS
86
VSS
83
VSS
80
VSS
47
VSS
44
VSS
41
VSS
38
VSS
35
VSS
32
VSS
29
VSS
26
VSS
23
VSS
20
VSS
17
VSS
14
VSS
11
VSS
8
VSS
5
VSS
2
VSS
197
VDD
194
VDD
191
VDD
189
VDD
186
VDD
183
VDD
182
VDD
179
VDD
176
VDD
173
VDD
170
VDD
78
VDD
75
VDD
72
VDD
69
VDD
66
VDD
65
VDD
62
VDD
60
VDD
57
VDD
54
VDD
51
VDD
236
VDDSPD
67
VREFCA
1
VREFDQ
118
SCL
238
SDA
237
SA1
117
SA0
52
BA2
190
BA1
71
BA0
169
CKE1
50
CKE0
76
S1*
193
S0*
64
CK1/NU*
63
CK1/NU
185
CK0*
184
CK0
188
A0
181
A1
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70
A10/AP
55
A11
174
A12
196
A13
172
A14
171
A15
168
RESET*
74
CAS#
192
RAS#
73
WE#
DDR3
RSVD ODT1 ODT0
NC/PAR_IN
NC/ERR_OUT
NC/TEST4
CB<0> CB<1> CB<2> CB<3> CB<4> CB<5> CB<6> CB<7>
DQS<0>
DQS#<0>
DQS<1>
DQS#<1>
DQS<2>
DQS#<2>
DQS<3>
DQS#<3>
DQS<4>
DQS#<4>
DQS<5>
DQS#<5>
DQS<6>
DQS#<6>
DQS<7>
DQS#<7>
DQS<8>
DQS#<8>
DM0/DQS9 NC/DQS9#
DM1/DQS10 NC/DQS10#
DM2/DQS11 NC/DQS11#
DM3/DQS12 NC/DQS12#
DM4/DQS13 NC/DQS13#
DM5/DQS14 NC/DQS14#
DM6/DQS15 NC/DQS15#
DM7/DQS16 NC/DQS16#
DM8/DQS17 NC/DQS17#
DQ<0> DQ<1> DQ<2> DQ<3> DQ<4> DQ<5> DQ<6> DQ<7> DQ<8>
DQ<9> DQ<10> DQ<11> DQ<12> DQ<13> DQ<14> DQ<15> DQ<16> DQ<17> DQ<18> DQ<19> DQ<20> DQ<21> DQ<22> DQ<23> DQ<24> DQ<25> DQ<26> DQ<27> DQ<28> DQ<29> DQ<30> DQ<31> DQ<32> DQ<33> DQ<34> DQ<35> DQ<36> DQ<37> DQ<38> DQ<39> DQ<40> DQ<41> DQ<42> DQ<43> DQ<44> DQ<45> DQ<46> DQ<47> DQ<48> DQ<49> DQ<50> DQ<51> DQ<52> DQ<53> DQ<54> DQ<55> DQ<56> DQ<57> DQ<58> DQ<59> DQ<60> DQ<61> DQ<62> DQ<63>
79 77 195
68 53 167
39 40 45 46 158 159 164 165
7 6
16 15
25 24
34 33
85 84
94 93
103 102
112 111
43 42
125 126
134 135
143 144
152 153
203 204
212 213
221 222
230 231
161 162
3 4 9 10 122 123 128 129 12 13 18 19 131 132 137 138 21 22 27 28 140 141 146 147 30 31 36 37 149 150 155 156 81 82 87 88 200 201 206 207 90 91 96 97 209 210 215 216 99 100 105 106 218 219 224 225 108 109 114 115 227 228 233 234
M_ODT_A1 M_ODT_A0
M_DQS_A_DP0 M_DQS_A_DN0
M_DQS_A_DP1 M_DQS_A_DN1
M_DQS_A_DP2 M_DQS_A_DN2
M_DQS_A_DP3 M_DQS_A_DN3
M_DQS_A_DP4 M_DQS_A_DN4
M_DQS_A_DP5 M_DQS_A_DN5
M_DQS_A_DP6 M_DQS_A_DN6
M_DQS_A_DP7 M_DQS_A_DN7
M_DATA_A0 M_DATA_A1 M_DATA_A2 M_DATA_A3 M_DATA_A4 M_DATA_A5 M_DATA_A6 M_DATA_A7 M_DATA_A8 M_DATA_A9 M_DATA_A10 M_DATA_A11 M_DATA_A12 M_DATA_A13 M_DATA_A14 M_DATA_A15 M_DATA_A16 M_DATA_A17 M_DATA_A18 M_DATA_A19 M_DATA_A20 M_DATA_A21 M_DATA_A22 M_DATA_A23 M_DATA_A24 M_DATA_A25 M_DATA_A26 M_DATA_A27 M_DATA_A28 M_DATA_A29 M_DATA_A30 M_DATA_A31 M_DATA_A32 M_DATA_A33 M_DATA_A34 M_DATA_A35 M_DATA_A36 M_DATA_A37 M_DATA_A38 M_DATA_A39 M_DATA_A40 M_DATA_A41 M_DATA_A42 M_DATA_A43 M_DATA_A44 M_DATA_A45 M_DATA_A46 M_DATA_A47 M_DATA_A48 M_DATA_A49 M_DATA_A50 M_DATA_A51 M_DATA_A52 M_DATA_A53 M_DATA_A54 M_DATA_A55 M_DATA_A56 M_DATA_A57 M_DATA_A58 M_DATA_A59 M_DATA_A60 M_DATA_A61 M_DATA_A62 M_DATA_A63
4
M_MAA_A[0..15]
4
M_SCS_A_N[0..3] M_SCKE_A[0..3] M_ODT_A[0..3]
M_DATA_A[0..63] M_DQS_A_DP[0..7] M_DQS_A_DN[0..7]
M_MAA_A[0..15]
4
4
4
4
4
4 4
3
3
2
V_SM
C37
0
0402
2
R52
4 0
0.1UF/16V
2
1K OHM
DIMM_CA_VREF_A
0
R53
4 0 2
1K OHM
V_SM
C39
0
0402
0.1UF/16V
NS
R54
4 0 2
1K OHM
DIMM_DQ_VREF_A
0
0402
R56
4 0
0.1UF/16V
2
1K OHM
Title
Title
Title
Document Number Rev
Size Document Number Rev
Size Document Number Rev
Size C
C
C Date: Sheet
Date: Sheet
Date: Sheet
1
C38
0402
0.1UF/16V
040
2
R55
C40
C41
NS
0402
0.1UF/16V
GM Confidential
GM Confidential
GM Confidential
DDR3-A
DDR3-A
DDR3-A
Sugar Bay
Sugar Bay
Sugar Bay
1
DIMM_DQ_CPU_VREF_A
of
of
of
0Monday, June 04, 2012
0Monday, June 04, 2012
0Monday, June 04, 2012
83
83
83
4
1.0
1.0
1.0
5
V_SM_VTT
D D
C C
V_SM
B B
VCC3
DIMM_CA_VREF_B DIMM_DQ_VREF_B
SMB_CLK_MAIN8,10,12,16 SMB_DATA_MAIN8,10,12,16
5
VCC3
M_SBS_B2 M_SBS_B1 M_SBS_B0
M_SCKE_B1 M_SCKE_B0
M_SCS_B_N1 M_SCS_B_N0
M_MAA_B0 M_MAA_B1 M_MAA_B2 M_MAA_B3 M_MAA_B4 M_MAA_B5 M_MAA_B6 M_MAA_B7 M_MAA_B8 M_MAA_B9 M_MAA_B10 M_MAA_B11 M_MAA_B12 M_MAA_B13 M_MAA_B14 M_MAA_B15
M_SBS_B[0..2]4
CK_M_DDR1_B_DN4 CK_M_DDR1_B_DP4 CK_M_DDR0_B_DN4 CK_M_DDR0_B_DP4
A A
DDR3_DRAMRST_N4,8
M_CAS_B_N4
M_RAS_B_N4 M_WE_B_N4
DIMM3
198
FREE1
187
FREE2
49
FREE3
48
FREE4
240
VTT
120
VTT
239
VSS
235
VSS
232
VSS
229
VSS
226
VSS
223
VSS
220
VSS
217
VSS
214
VSS
211
VSS
208
VSS
205
VSS
202
VSS
199
VSS
166
VSS
163
VSS
160
VSS
157
VSS
154
VSS
151
VSS
148
VSS
145
VSS
142
VSS
139
VSS
136
VSS
133
VSS
130
VSS
127
VSS
124
VSS
121
VSS
119
SA2
116
VSS
113
VSS
110
VSS
107
VSS
104
VSS
101
VSS
98
VSS
95
VSS
92
VSS
89
VSS
86
VSS
83
VSS
80
VSS
47
VSS
44
VSS
41
VSS
38
VSS
35
VSS
32
VSS
29
VSS
26
VSS
23
VSS
20
VSS
17
VSS
14
VSS
11
VSS
8
VSS
5
VSS
2
VSS
197
VDD
194
VDD
191
VDD
189
VDD
186
VDD
183
VDD
182
VDD
179
VDD
176
VDD
173
VDD
170
VDD
78
VDD
75
VDD
72
VDD
69
VDD
66
VDD
65
VDD
62
VDD
60
VDD
57
VDD
54
VDD
51
VDD
236
VDDSPD
67
VREFCA
1
VREFDQ
118
SCL
238
SDA
237
SA1
117
SA0
52
BA2
190
BA1
71
BA0
169
CKE1
50
CKE0
76
S1*
193
S0*
64
CK1/NU*
63
CK1/NU
185
CK0*
184
CK0
188
A0
181
A1
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70
A10/AP
55
A11
174
A12
196
A13
172
A14
171
A15
168
RESET*
74
CAS#
192
RAS#
73
WE#
DDR3
RSVD ODT1 ODT0
NC/PAR_IN
NC/ERR_OUT
NC/TEST4
CB<0> CB<1> CB<2> CB<3> CB<4> CB<5> CB<6> CB<7>
DQS<0>
DQS#<0>
DQS<1>
DQS#<1>
DQS<2>
DQS#<2>
DQS<3>
DQS#<3>
DQS<4>
DQS#<4>
DQS<5>
DQS#<5>
DQS<6>
DQS#<6>
DQS<7>
DQS#<7>
DQS<8>
DQS#<8> DM0/DQS9
NC/DQS9#
DM1/DQS10 NC/DQS10#
DM2/DQS11 NC/DQS11#
DM3/DQS12 NC/DQS12#
DM4/DQS13 NC/DQS13#
DM5/DQS14 NC/DQS14#
DM6/DQS15 NC/DQS15#
DM7/DQS16 NC/DQS16#
DM8/DQS17 NC/DQS17#
DQ<0> DQ<1> DQ<2> DQ<3> DQ<4> DQ<5> DQ<6> DQ<7> DQ<8>
DQ<9> DQ<10> DQ<11> DQ<12> DQ<13> DQ<14> DQ<15> DQ<16> DQ<17> DQ<18> DQ<19> DQ<20> DQ<21> DQ<22> DQ<23> DQ<24> DQ<25> DQ<26> DQ<27> DQ<28> DQ<29> DQ<30> DQ<31> DQ<32> DQ<33> DQ<34> DQ<35> DQ<36> DQ<37> DQ<38> DQ<39> DQ<40> DQ<41> DQ<42> DQ<43> DQ<44> DQ<45> DQ<46> DQ<47> DQ<48> DQ<49> DQ<50> DQ<51> DQ<52> DQ<53> DQ<54> DQ<55> DQ<56> DQ<57> DQ<58> DQ<59> DQ<60> DQ<61> DQ<62> DQ<63>
79 77 195
68 53 167
39 40 45 46 158 159 164 165
7 6
16 15
25 24
34 33
85 84
94 93
103 102
112 111
43 42
125 126
134 135
143 144
152 153
203 204
212 213
221 222
230 231
161 162
3 4 9 10 122 123 128 129 12 13 18 19 131 132 137 138 21 22 27 28 140 141 146 147 30 31 36 37 149 150 155 156 81 82 87 88 200 201 206 207 90 91 96 97 209 210 215 216 99 100 105 106 218 219 224 225 108 109 114 115 227 228 233 234
M_ODT_B1 M_ODT_B0
M_DQS_B_DP0 M_DQS_B_DN0
M_DQS_B_DP1 M_DQS_B_DN1
M_DQS_B_DP2 M_DQS_B_DN2
M_DQS_B_DP3 M_DQS_B_DN3
M_DQS_B_DP4 M_DQS_B_DN4
M_DQS_B_DP5 M_DQS_B_DN5
M_DQS_B_DP6 M_DQS_B_DN6
M_DQS_B_DP7 M_DQS_B_DN7
M_DATA_B0 M_DATA_B1 M_DATA_B2 M_DATA_B3 M_DATA_B4 M_DATA_B5 M_DATA_B6 M_DATA_B7 M_DATA_B8 M_DATA_B9 M_DATA_B10 M_DATA_B11 M_DATA_B12 M_DATA_B13 M_DATA_B14 M_DATA_B15 M_DATA_B16 M_DATA_B17 M_DATA_B18 M_DATA_B19 M_DATA_B20 M_DATA_B21 M_DATA_B22 M_DATA_B23 M_DATA_B24 M_DATA_B25 M_DATA_B26 M_DATA_B27 M_DATA_B28 M_DATA_B29 M_DATA_B30 M_DATA_B31 M_DATA_B32 M_DATA_B33 M_DATA_B34 M_DATA_B35 M_DATA_B36 M_DATA_B37 M_DATA_B38 M_DATA_B39 M_DATA_B40 M_DATA_B41 M_DATA_B42 M_DATA_B43 M_DATA_B44 M_DATA_B45 M_DATA_B46 M_DATA_B47 M_DATA_B48 M_DATA_B49 M_DATA_B50 M_DATA_B51 M_DATA_B52 M_DATA_B53 M_DATA_B54 M_DATA_B55 M_DATA_B56 M_DATA_B57 M_DATA_B58 M_DATA_B59 M_DATA_B60 M_DATA_B61 M_DATA_B62 M_DATA_B63
4
M_MAA_B[0..15] 4 M_SCS_B_N[0..3] 4 M_SCKE_B[0..3] 4 M_ODT_B[0..3] 4
M_DATA_B[0..63] 4 M_DQS_B_DP[0..7] 4 M_DQS_B_DN[0..7] 4
4
3
3
2
V_SM
C58
0
0402
0.1UF/16V
V_SM
0402
0.1UF/16V
V_SM
0805
22UF/6.3V
NS
V_SM_VTT
0805
4.7UF/10V
C85
0805
22UF/6.3V
V_SM
www.666fix.com
2
R57
4 0 2
1K OHM
DIMM_CA_VREF_B
0
R58
4 0 2
1K OHM
C64
0
R59
4 0 2
1K OHM
DIMM_DQ_VREF_B
0
0402
R61
4 0
0.1UF/16V
2
1K OHM
C77
C86
C90
0402
0.1UF/16V
V_SM
0402
0.1UF/16V
C48
C80
0402
0402
0.1UF/16V
0.1UF/16V
C88
C87
0805
0805
22UF/6.3V
22UF/6.3V
STICHING CAPS FOR CMD, ADDR, CTL
C91
0402
0402
0.1UF/16V
0.1UF/16V
C94
C95
0402
0.1UF/16V
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev C
C
C Date: Sheet
Date: Sheet
Date: Sheet
1
C59
0402
0.1UF/16V
040
2
R60 0 OHM C71
C70
NS
0402
0.1UF/16V
C92
C93
0402
1UF/6.3V
C96
C97
0402
0402
0.1UF/16V
1UF/6.3V
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DDR3-B
DDR3-B
DDR3-B
Sugar Bay
Sugar Bay
Sugar Bay
1
DIMM_DQ_CPU_VREF_B 4
930Monday, June 04, 2012
930Monday, June 04, 2012
930Monday, June 04, 2012
of
of
of
1.0
1.0
1.0
5
3D3V_SB
D D
SMB_CLK_MAIN8,9,12,16 SMB_DATA_MAIN8,9,12,16
WAKE_N12,16,19
All AC Coupling caps. should be placed within 250 mils of the connector
EXP_A_TX_0_DP3 EXP_A_TX_0_DN3
EXP_A_TX_1_DP3 EXP_A_TX_1_DN3
EXP_A_TX_2_DP3 EXP_A_TX_2_DN3
EXP_A_TX_3_DP3 EXP_A_TX_3_DN3
C C
B B
EXP_A_TX_4_DP3 EXP_A_TX_4_DN3
EXP_A_TX_5_DP3 EXP_A_TX_5_DN3
EXP_A_TX_6_DP3 EXP_A_TX_6_DN3
EXP_A_TX_7_DP3 EXP_A_TX_7_DN3
EXP_A_TX_8_DP3 EXP_A_TX_8_DN3
EXP_A_TX_9_DP3 EXP_A_TX_9_DN3
EXP_A_TX_10_DP3 EXP_A_TX_10_DN3
EXP_A_TX_11_DP3 EXP_A_TX_11_DN3
EXP_A_TX_12_DP3 EXP_A_TX_12_DN3
EXP_A_TX_13_DP3 EXP_A_TX_13_DN3
EXP_A_TX_14_DP3 EXP_A_TX_14_DN3
EXP_A_TX_15_DP3 EXP_A_TX_15_DN3
C104 0.1UF/16V
0402
C105 0.1UF/16V
0402
C106 0.1UF/16V C107 0.1UF/16V
C108 0.1UF/16V C109 0.1UF/16V
C110 0.1UF/16V C111 0.1UF/16V
C112 0.1UF/16V C113 0.1UF/16V
C114 0.1UF/16V C115 0.1UF/16V
C116 0.1UF/16V C117 0.1UF/16V
C121 0.1UF/16V C122 0.1UF/16V
C123 0.1UF/16V C124 0.1UF/16V
C125 0.1UF/16V C126 0.1UF/16V
C127 0.1UF/16V C128 0.1UF/16V
C129 0.1UF/16V C130 0.1UF/16V
C131 0.1UF/16V C132 0.1UF/16V
C133 0.1UF/16V C134 0.1UF/16V
C135 0.1UF/16V C136 0.1UF/16V
C137 0.1UF/16V C138 0.1UF/16V
All AC Coupling caps. should be placed within 250 mils of the connector
4
+12V
VCC3
0402 0402
0402 0402
0402 0402
0402 0402
0402 0402
0402 0402
0402 0402
0402 0402
0402 0402
0402 0402
0402 0402
0402 0402
0402 0402
0402 0402
0402 0402
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11
B12 B13 B14 B15 B16 B17 B18
B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32
B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82
PCIEX1
12V_1(P) 12V_2(P) 12V_3(P) GND_1(P) SMCLK(B) SMDAT(B) GND_2(P) 3_3V_1(P) JTAG1(B) 3_3VAUX(I) WAKE*(B)
RSVD_1(B) GND_4(P) HSOP0(I) HSON0(I) GND_5(P) PRSNT2#_1(I) GND_6(P)
HSOP1(I) HSON1(I) GND_10(P) GND_11(P) HSOP2(I) HSON2(I) GND_12(P) GND_13(P) HSOP3(I) HSON3(I) GND_14(P) RSVD_2(B) PRSNT2#_2(I) GND_15(P)
HSOP4(I) HSON4(I) GND_22(P) GND_23(P) HSOP5(I) HSON5(I) GND_24(P) GND_25(P) HSOP6(I) HSON6(I) GND_26(P) GND_27(P) HSOP7(I) HSON7(I) GND_28(P) PRSNT2#_3(B) GND_29(P)
HSOP8(I) HSON8(I) GND_38(P) GND_39(P) HSOP9(I) HSON9(I) GND_40(P) GND_41(P) HSOP10(I) HSON10(I) GND_42(P) GND_43(P) HSOP11(I) HSON11(I) GND_44(P) GND_45(P) HSOP12(I) HSON12(I) GND_46(P) GND_47(P) HSOP13(I) HSON13(I) GND_48(P) GND_49(P) HSOP14(I) HSON14(I) GND_50(P) GND_51(P) HSOP15(I) HSON15(I) GND_52(P) PRSNT2#_4(I) RSVD_6(I)
PRSNT1#(B)
12V_4(P)
12V_5(P) GND_3(P) JTAG2(B) JTAG3(B) JTAG4(B) JTAG5(B)
3_3V_2(P) 3_3V_3(P)
PERST#
KEY
GND_7(P)
REFCLK+(I)
REFCLK-(I)
GND_8(P)
HSIP0(O) HSIN0(O) GND_9(P)
RSVD_3(B)
GND_16(P)
HSIP1(O) HSIN1(O)
GND_17(P) GND_18(P)
HSIP2(O) HSIN2(O)
GND_19(P) GND_20(P)
HSIP3(O) HSIN3(O)
GND_21(P)
RSVD_4(B)
RSVD_5(B)
GND_30(P)
HSIP4(O) HSIN4(O)
GND_31(P) GND_32(P)
HSIP5(O) HSIN5(O)
GND_33(P) GND_34(P)
HSIP6(O) HSIN6(O)
GND_35(P) GND_36(P)
HSIP7(O) HSIN7(O)
GND_37(P)
RSVD_7(B)
GND_53(P)
HSIP8(O) HSIN8(O)
GND_54(P) GND_55(P)
HSIP9(O) HSIN9(O)
GND_56(P) GND_57(P)
HSIP10(O)
HSIN10(O) GND_58(P) GND_59(P)
HSIP11(O)
HSIN11(O) GND_60(P) GND_61(P)
HSIP12(O)
HSIN12(O) GND_62(P) GND_63(P)
HSIP13(O)
HSIN13(O) GND_64(P) GND_65(P)
HSIP14(O)
HSIN14(O) GND_66(P) GND_67(P)
HSIP15(O)
HSIN15(O) GND_68(P)
+12V
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A12 A13 A14 A15 A16 A17 A18
A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32
A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82
VCC3
3
2
1
PLTRST_PCIE_SLOTS_N 16,19,21
CK_PE_16PORT_PCH_DP 13 CK_PE_16PORT_PCH_DN 13
EXP_A_RX_0_DP 3 EXP_A_RX_0_DN 3
EXP_A_RX_1_DP 3 EXP_A_RX_1_DN 3
EXP_A_RX_2_DP 3 EXP_A_RX_2_DN 3
EXP_A_RX_3_DP 3 EXP_A_RX_3_DN 3
EXP_A_RX_4_DP 3 EXP_A_RX_4_DN 3
EXP_A_RX_5_DP 3 EXP_A_RX_5_DN 3
EXP_A_RX_6_DP 3 EXP_A_RX_6_DN 3
EXP_A_RX_7_DP 3 EXP_A_RX_7_DN 3
EXP_A_RX_8_DP 3 EXP_A_RX_8_DN 3
EXP_A_RX_9_DP 3 EXP_A_RX_9_DN 3
EXP_A_RX_10_DP 3 EXP_A_RX_10_DN 3
EXP_A_RX_11_DP 3 EXP_A_RX_11_DN 3
EXP_A_RX_12_DP 3 EXP_A_RX_12_DN 3
EXP_A_RX_13_DP 3 EXP_A_RX_13_DN 3
EXP_A_RX_14_DP 3 EXP_A_RX_14_DN 3
EXP_A_RX_15_DP 3 EXP_A_RX_15_DN 3
+12V
www.666fix.com
EC2
EC1
+
+
8*12
8*12
470UF/16V
+12V
0402
C118
0.1UF/25V
470UF/16V
VCC3
0402
C119
0.1UF/25V
3D3V_SB
0402
C120
0.1UF/25V
PCIE164
A A
GM Confidential
GM Confidential
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev C
C
C Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
GM Confidential
PICE16X
PICE16X
PICE16X
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
10 30Monday, June 04, 2012
10 30Monday, June 04, 2012
10 30Monday, June 04, 2012
1.0
of
of
of
5
CPT_CRB
D D
CK_PCH_33M_FB13 USBP0N 18
C C
P_DEVSEL_N
CK_PCH_33M_FB
P_IRDY_N P_PME_N P_SERR_N P_STOP_N P_PLOCK_N P_TRDY_N P_PERR_N P_FRAME_N
P_GNT_N0
P_GNT_N012
P_GNT_N1
P_GNT_N112
P_GNT_N2 P_GNT_N3
P_REQ_N0 P_REQ_N1 P_REQ_N2 P_REQ_N3
P_INTA_N P_INTB_N P_INTC_N P_INTD_N P_INTE_N P_INTF_N P_INTG_N P_INTH_N
PCH1A
BH8
PAR
BH9
DEVSEL#
BD15
CLKIN_PCILOOPBACK
AV14
PCIRST#
BF11
IRDY#
AV15
PME#
BR6
SERR#
BC12
STOP#
BA17
PLOCK#
BC8
TRDY#
BM3
PERR#
BC11
FRAME#
BA15
GNT0#
AV8
GNT1#_GPIO51
BU12
GNT2#_GPIO53
BE2
GNT3#_GPIO55
BG5
REQ0#
BT5
REQ1#_GPIO50
BK8
REQ2#_GPIO52
AV11
REQ3#_GPIO54
BK10
PIRQA#
BJ5
PIRQB#
BM15
PIRQC#
BP5
PIRQD#
BN9
PIRQE#_GPIO2
AV9
PIRQF#_GPIO3
BT15
PIRQG#_GPIO4
BR4
PIRQH#_GPIO5
CPT_CRB
A16 SWAP OVERRIDE IF SAMPLED LOW
P_GNT_N2
P_GNT_N3
3D3V_SB
R80 8.2K/NC
VCC3
1 2 3 4 5 6 7 8
B B
VCC3
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
040
0402 0402 0402 0402
0402 0402 0402 0402
0402 0402 0402 0402
0402 0402 0402 0402
0402 0402 0402 0402
040
R70 1K OHM NS
040
R71 1K OHM NS
2
P_PME_N
P_INTE_N
RN6
P_INTA_N
8.2K
P_INTC_N P_INTG_N
P_REQ_N0
RN7
P_INTF_N
8.2K
P_REQ_N3
P_TRDY_N
P_REQ_N1
RN3
P_SERR_N
8.2K
P_REQ_N2 P_DEVSEL_N
P_FRAME_N
RN4
P_IRDY_N
8.2K
P_STOP_N P_PLOCK_N
P_INTB_N
RN5
P_PERR_N
8.2K
P_INTH_N P_INTD_N
2
2
?
REV 1.0
PCI
1 OF 10
AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C_BE0# C_BE1# C_BE2# C_BE3#
BF15
AD0
BF17
AD1
BT7
AD2
BT13
AD3
BG12
AD4
BN11
AD5
BJ12
AD6
BU9
AD7
BR12
AD8
BJ3
AD9
BR9 BJ10 BM8 BF3 BN2 BE4 BE6 BG15 BC6 BT11 BA14 BL2 BC4 BL4 BC2 BM13 BA9 BF9 BA8 BF8 AV17 BK12
BN4 BP7 BG2 BP13
?
4
DMI_MT_IR_0_DN3
DMI_MT_IR_0_DP3 DMI_IT_MR_0_DN3 DMI_IT_MR_0_DP3
DMI_MT_IR_1_DN3
DMI_MT_IR_1_DP3 DMI_IT_MR_1_DN3 DMI_IT_MR_1_DP3
DMI_MT_IR_2_DN3
DMI_MT_IR_2_DP3 DMI_IT_MR_2_DN3 DMI_IT_MR_2_DP3
DMI_MT_IR_3_DN3
DMI_MT_IR_3_DP3 DMI_IT_MR_3_DN3 DMI_IT_MR_3_DP3
V_1P05_PCH
PCH_PCIE_RN1
PCH_PCIE_RP1 PCH_PCIE_TN1 PCH_PCIE_TP1
PCH_PCIE_RN216
PCH_PCIE_RP216 PCH_PCIE_TN216 PCH_PCIE_TP216
PCH_PCIE_RN3
PCH_PCIE_RP3 PCH_PCIE_TN3 PCH_PCIE_TP3
PCH_PCIE_RN4
PCH_PCIE_RP4 PCH_PCIE_TN4 PCH_PCIE_TP4
PCH_PCIE_RN519
PCH_PCIE_RP519 PCH_PCIE_TN519 PCH_PCIE_TP519
PCH_PCIE_RN6
PCH_PCIE_RP6 PCH_PCIE_TN6 PCH_PCIE_TP6
040
2
R62 49.9
W4S8 Near PIN 500MIL
R63 10K OHM R64 10K OHM
040 040
DMICOMP
2 2
3
D33 B33
J36 H36 A36 B35 P38 R38 B37 C36 H38
J38 E37 F38 M41 P41 B31 E31
P33 R33
J20 L20 F25 F23 P20 R20 C22 A22 H17
J17 E21 B21 P17 M17 F18 E17 N15 M15 B17 C16
J15 L15 A16 B15
J12 H12 F15 F13 H10
J10 B13 D13
PCH1B
DMI0RXN DMI0RXP DMI0TXN DMI0TXP DMI1RXN DMI1RXP DMI1TXN DMI1TXP DMI2RXN DMI2RXP DMI2TXN DMI2TXP DMI3RXN DMI3RXP DMI3TXN DMI3TXP DMI_IRCOMP DMI_ZCOMP
CLKIN_DMI_N CLKIN_DMI_P
PERN1 PERP1 PETN1 PETP1 PERN2 PERP2 PETN2 PETP2 PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP4 PERN5 PERP5 PETN5 PETP5 PERN6 PERP6 PETN6 PETP6 PERN7 PERP7 PETN7 PETP7 PERN8 PERP8 PETN8 PETP8
REV 1.0
CPT_CRB
2
?
CPT_CRB
2 OF 10
DMI
PCI-E
USB
CLKIN_DOT_96N CLKIN_DOT_96P
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N
USBP9P USBP10N USBP10P USBP11N USBP11P USBP12P USBP12N USBP13P USBP13N
OC0#_GPIO59 OC1#_GPIO40 OC2#_GPIO41 OC3#_GPIO42 OC4#_GPIO43
OC5#_GPIO9 OC6#_GPIO10 OC7#_GPIO14
USBRBIAS#
USBRBIAS
DMI2RBIAS
?
BF36 BD36 BC33 BA33 BM33 BM35 BT33 BU32 BR32 BT31 BN29 BM30 BK33 BJ33 BF31 BD31 BN27 BR29 BR26 BT27 BK25 BJ25 BJ31 BK31 BD27 BF27 BK27 BJ27
BM43 BD41 BG41 BK43 BP43 BJ41 BT45 BM45
BP25 BM25
BD38 BF38
A32
USB_OC0_R_N USB_OC1_R_N USB_OC2_R_N USB_OC3_R_N USB_OC4_R_N USB_OC5_R_N USB_OC6_R_N USB_OC7_R_N
USBRBIAS_PCH
USBP0P 18 USBP1N 18 USBP1P 18 USBP2N 18 USBP2P 18 USBP3N 18 USBP3P 18 USBP4N 19 USBP4P 19 USBP5N 19 USBP5P 19
USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P
R65 22.6
CK_96M_DREF_DN CK_96M_DREF_DP
RBIAS_CPY
R68 750 OHM
PCH1E
M48
RESERVED_29
NVR_CLE5
R47
Y41 M50 M49
U43
J57
DF_TVS RESERVED_6 RESERVED_4 RESERVED_3 RESERVED_2 RESERVED_1
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For USB OC# Detect connect to USB power divider
W4 Near PIN 500MIL
040
2
040
2
R66 10K OHM
040
2
R67 10K OHM
040
2
USB_OC2_R_N USB_OC1_R_N USB_OC3_R_N USB_OC5_R_N USB_OC6_R_N USB_OC7_R_N USB_OC0_R_N USB_OC4_R_N
1 2
0402
RN1
3 4
0402
5 6
0402
7 8
0402
1 2
0402
RN2
3 4
0402
5 6
0402
7 8
0402
10K
For USB OC# Detect connect
10K
to USB power divider
3D3V_SB
NVRAM
CPT_CRB
CPT_CRB
REV 1.0
1
?
RESERVED_22 RESERVED_21 RESERVED_14 RESERVED_13 RESERVED_12 RESERVED_11 RESERVED_10
RESERVED_9 RESERVED_8
RESERVED_7 RESERVED_20 RESERVED_19 RESERVED_18 RESERVED_17 RESERVED_16 RESERVED_15
RESERVED_28 RESERVED_27 RESERVED_26 RESERVED_25
RESERVED_24 RESERVED_23
RESERVED_5
5 OF 10
AB50 Y50 AB49 AB44 U49 R44 U50 U46 U44 H50 K46 L56 J55 F53 H52 E52
K50 K49 AB46 G56
Y44 L53
R50
?
A A
GM Confidential
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Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev C
C
C Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
GM Confidential
PCH-PCIE&USB
PCH-PCIE&USB
PCH-PCIE&USB
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
11 30Monday, June 04, 2012
11 30Monday, June 04, 2012
11 30Monday, June 04, 2012
1.0
of
of
of
5
040
2
PCH_MEPWROK_R
PWRGD_3V21
PCH_MEPWROK_R
D D
PCH_GP17_PU PCH_GP1_PU HEC_GP6 PCH_GP7_PU PCH_GP68_PU
TEST_SETUP_MENU
BOARD_DIFF PCH_GP71_PU
PCH_CONFIG_JUMPER
GP38_CRB_DETECT GP39_GFX_CRB_DETECT SV_ADVANCE_GP48
C C
3D3V_SB
+
2 0 4 0
12
BAT1
R127
1K
D1
1
SOT23
2
BAT54C
BAT_HOLDER
3
width 20 mils
C163
0805
+80/-20%
4.7UF/10V
R81 0
?
CPT_CRB
PCH1C
REV 1.0
BA50
CL_CLK1
BF50
CL_DATA1
BF49
CL_RST1#
BC46
APWROK
BN21
PWM0
BT21
PWM1
BM20
PWM2
BN19
PWM3
BT17
TACH0_GPIO17
BR19
TACH1_GPIO1
BA22
TACH2_GPIO6
BR16
TACH3_GPIO7
BU16
TACH4_GPIO68
BM18
TACH5_GPIO69
BN17
TACH6_GPIO70
BP15
TACH7_GPIO71
BC43
SST
BA53
SCLOCK_GPIO22
BE54
SLOAD_GPIO38
BF55
SDATAOUT0_GPIO39
AW53
SDATAOUT1_GPIO48
AY20
GPIO FAN CLINK
NC
CPT_CRB
Change from 3.3SB to 3.3SYS
VCCRTC
2 0
R128
4 0
20K
PCH_RTCRST
C164
2 0
R142
4 0
0402
1UF/10V
4.7K
SATA2 SATA3
CLKIN_SATA_N
CLKIN_SATA_P
SATA0GP_GPIO21 SATA1GP_GPIO19 SATA2GP_GPIO36 SATA3GP_GPIO37 SATA4GP_GPIO16 SATA5GP_GPIO49
SATA3RCOMPO
3 OF 10
HOST
JBAT(1-2)1
YELLOW
JUMPER
1
JBAT
2
1X3PIN
3
SATA0RXN SATA0RXP SATA0TXN
SATA0TXP SATA1RXN SATA1RXP SATA1TXN
SATA1TXP SATA2RXN
SATA2RXP SATA2TXN
SATA2TXP SATA3RXN SATA3RXP SATA3TXN
SATA3TXP SATA4RXN SATA4RXP SATA4TXN
SATA4TXP SATA5RXN SATA5RXP SATA5TXN
SATA5TXP
SATALED#
SATAICOMPI
SATAICOMPO
SATA3COMPI
TP16
SATA3RBIAS
A20GATE
INIT3_3V#
RCIN#
SERIRQ
THRMTRIP#
PECI
PMSYNCH
?
-
PCH_RTCX2
R166 10M
32.768K
<1.inch
060
3
X1
3X8
0
R176 200
4 0 2
1%
0
R181 100
4 0 2
1%
CMOSJBAT
(1-2) (2-3)
12 34
18PF/50V
C167
0603
PCH_JTAG_TDO
0
R177 200
4 0 2
1%
0
R182 100
4 0 2
1%
B B
Normal
VCCRTC
2 0
R163
4 0
0402
1UF/10V
20K
C165
1 2
SRTCRSTB PCH_RTCX1
3
2 0
R169
4 0
4.7K
JRTC 1X3PIN
Clear
C166 18PF/50V
0603
RTC PROTECTJRTC
Normal
Clear RTC
3D3V_SB
A A
0
R175
4 0 2
20K OHM
PCH_JTAG_RST_R
0
R179
4 0 2
10K OHM
(1-2) (2-3)
PCH_JTAG_TCK_FILTER PCH_JTAG_TMSPCH_JTAG_TDI
0
R180
6 0 3
51 OHM
5
4
AC56
SATA_RXN0
AB55
SATA_RXP0
AE46
SATA_TXN0
AE44
SATA_TXP0
AA53
SATA_RXN1
AA56
SATA_RXP1
AG49
SATA_TXN1
AG47
SATA_TXP1
AL50 AL49 AL56 AL53 AN46 AN44 AN56 AM55 AN49
SATA_RXN4
AN50
SATA_RXP4
AT50
SATA_TXN4
AT49
SATA_TXP4
AT46
SATA_RXN5
AT44
SATA_RXP5
AV50
SATA_TXN5
AV49
SATA_TXP5
040
2
AF55
R92 10K OHM
040
2
AG56
R93 10K OHM
BF57 AJ55
SATARBIAS_PCH
AJ53 BC54
SATA0GP
AY52
SATA1GP
BB55
CDC_DWN_DISABLE
BG53
PCH_GP37
AU56
SATA4GP
BA56
AIO_DETECT
AE54
SATA3COMP_PCH
AE52 AE50 AC52
RBIAS_SATA3
BB57
A20GATE
BN56
INIT3_3VB
BG56
KBRST_N
AV52
SER_IRQ
E56
PCH_THERMTRIP_N
H48
PCH_PECI
F55
3D3V_SB
LOW:TLS CIPHER SUITE WITH NO CONFIDENTIALITY. HIGH:TLS CIPHER SUITE WITH CONFIDENTIALITY.
PCH_SATA_LED_N 22
060
R94 37.4
W4S15MIL Near PIN 500MIL
040
2
R96 49.9 OHM
040
2
R97 750 OHM
A20GATE 23
KBRST_N 23
SER_IRQ 23
040
2
R98 0 OHM
040
2
R99 0 OHM
H_PECI 5,23
NS
H_PM_SYNC_0 5
040
2
R161 4.7K OHM NS
SATA_TXP0 SATA_TXN0
3
Near Pin 450MIL
Near Pin 450MIL
H_THERMTRIP_N 5
1_WATT_CTRL_1
0.01UF/50V
0.01UF/50V
SATA_RXN0
0.01UF/50V
0.01UF/50V
3D3V_SB3D3V_SB 3D3V_SB
0
R178 200
4 0 2
1%
0
R183 100
4 0 2
1%
4
SATA_TXP4 SATA_TXN4
SATA_RXN4 SATA_RXP4
0.01UF/50V
0.01UF/50V
0.01UF/50V
0.01UF/50V
V_1P05_PCH
V_1P05_PCH
C456 C457
C458 C459
C495 C502
C503 C490
SATA0TXPC
0402
SATA0TXNC
0402
SATA0RXNC
0402
SATA0RXPCSATA_RXP0
0402
SATA4TXPC
0402
SATA4TXNC
0402
SATA4RXNC
0402
SATA4RXPC
0402
SATA1
2
TX+ (I)
3
TX- (I)
5
RX- (O)
6
RX+ (O)
1
GND1 (P)
4
GND2 (P)
7
GND3 (P)
8
H1
9
H2
7PIN
SATA_15MM
SATA3
2
TX+ (I)
3
TX- (I)
5
RX- (O)
6
RX+ (O)
1
GND1 (P)
4
GND2 (P)
7
GND3 (P)
8
H1
9
H2
7PIN
SATA_15MM
3
L_AD023 L_AD123 L_AD223
L_AD323 L_DRQ_N L_FRAME_N23
AUD_LINK_BCLK20
AUD_LINK_RST20
AUD_LINK_SDI220 AUD_LINK_SDO20
AUD_LINK_SYNC20 SPI_MOSI_FLASH15
SPI_MISO_FLASH15 SPI_CS0_FLASH15 SPI_CLK_FLASH15
SMB_CLK_SIO23 SMB_DAT_SIO23
R82 33 OHM R83 33 OHM
R84 33 OHM R85 33 OHM
R86 33 OHM R87 33 OHM
R89 33 OHM R90 33 OHM R91 33 OHM
PWRGD_3V21
PCH_RSMRST_N21 PCH_DPWROK21
SMB_CLK_MAIN8,9,10,16 SMB_DATA_MAIN8,9,10,16
040
R589 0 OHM/NC
040
R590 0 OHM/NC
GP39_GFX_CRB_DETECT
AIO_DETECT
P_GNT_N011 P_GNT_N111
SATA2
9
8
7
1
6
2
5
3
4
4
3
5
2
6
1
7
8
9
7PIN
SATA_15MM
SATA4
9
8
7
1
6
2
5
3
4
4
3
5
2
6
1
7
8
9
7PIN
SATA_15MM
3
GND3 (P) GND2 (P) GND1 (P)
RX+ (O)
RX- (O)
TX- (I)
TX+ (I)
GND3 (P) GND2 (P) GND1 (P)
RX+ (O)
RX- (O)
TX- (I)
TX+ (I)
9
H2
8
H1
7 4 1
6
SATA1RXPC
5
3
SATA1TXNC
2
SATA1TXPC
9
H2
8
H1
7 4 1
6
SATA5RXPC
5
SATA5RXNC
3
SATA5TXNC
2
SATA5TXPC
L_DRQ1_N
L_DRQ_N
040
2
AUD_LINK_BCLK_R
040
2
AUD_LINK_RST_R_N
040
2
040
2
AUD_LINK_SDO_R
040
2
AUD_LINK_SYNC_R
040
2
SPI_MOSI
040
2
SPI_MISO
040
2
SPI_CS0_N
040
2
SPI_CLK SPI_CS1_N
PCH_RTCX1 PCH_RTCX2 PCH_RTCRST SRTCRSTB PCH_INTRUDER PWRGD_3V PCH_RSMRST_N PCH_INTVRMEN
DSWODVREN
PCH_PORT80_LED
Mismatch 500MIL
PCH_GP60 SMLINK0_CLK SMLINK0_DATA PCHHOT
2
SML1CLK_PCH
2
SML1DATA_PCH
DSWODVREN HI FOR ALL PRODUCTS
DSWODVREN PCH_INTRUDER PCH_INTVRMEN
IINTEGRATED 1.05V SUS VRM ENABLE SUS VRM ENABLED WHEN SAMPLED HIGH
PWRGD_3V
PCH_GP37
INIT3_3VB
0.01UF/50V
0402 0402
0402 0402
0.01UF/50V
0.01UF/50V
0.01UF/50V
0.01UF/50V
0402 0402
0402 0402
0.01UF/50V
0.01UF/50V
101PCI
P_GNT_N0 P_GNT_N1
0.01UF/50V C453 C460
C454 C448
SATA_RXP5
C447
SATA_RXN5
C488
SATA_TXN5
C501
SATA_TXP5
C455
R125 1K OHM NS
R143 10K NS R145 10K
R149 10K NS
R151 10K NS R152 10K
R155 1K OHM
SATA1GPGNT1
00
1
R165 1K OHM NS R167 1K OHM NS
SATA_RXP1
SATA_RXN1SATA1RXNC
SATA_TXN1
SATA_TXP1
2
PCH1D
BA20
LDRQ1#_GPIO23
BK15
FWH0_LAD0
BJ17
FWH1_LAD1
BJ20
FWH2_LAD2
BG20
FWH3_LAD3
BK17
LDRQ0#
BG17
FWH4_LFRAME#
BU22
HDA_BCLK
BC22
HDA_RST#
BD22
HDA_SDIN0
BF22
HDA_SDIN1
BK22
HDA_SDIN2
BJ22
HDA_SDIN3
BT23
HDA_SDO
BP23
HDA_SYNC
AU53
SPI_MOSI
AT55
SPI_MISO
AT57
SPI_CS0#
AR54
SPI_CLK
AR56
SPI_CS1#
BR39
RTCX1
BN39
RTCX2
BT41
RTCRST#
BN37
SRTCRST#
BM38
INTRUDER#
BJ38
PWROK
BK38
RSMRST#
BN41
INTVRMEN
BT37
DPWROK
BR42
DSWVRMEN
BN49
SMBALERT#_GPIO11
BT47
SMBCLK
BR49
SMBDATA
BU49
SML0ALERT#_GPIO60
BT51
SML0CLK
BM50
SML0DATA
BR46
SML1ALERT#_PCHHOT#_GPIO74
BJ46
SML1CLK_GPIO58
BK46
SML1DATA_GPIO75
VCCRTC
040
2
R107 390K OHM
040
2
R110 1M
040
2
R113 390K OHM
040
2
040
2
040
2
040
2
040
2
040
2
040
2
NS
Boot Device
LPC
SPI
*
040
2
040
2
?
REV 1.0
SUSWARN#-SUS_PWR_DN_ACK-GPIO30
CPT_CRB
4 OF 10
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PCH_CONFIG_JUMPER
VCC3
VCC3
VCC3
DFX TEST MODE RINGS OSCILLATOR BYPASS WHEN LOW
3D3V_SB
2
BMBUSY#_GPIO0
CLKRUN#_GPIO32
HDA_DOCK_EN#_GPIO33
STP_PCI#_GPIO34
LAN_PHY_PWR_CTRL_GPIO12
HDA_DOCK_RST#_GPIO13
GPIO24_MEM_LED
SLP_LAN#_GPIO29 PCIECLKRQ2#_GPIO20 PCIECLKRQ5#_GPIO44 PCIECLKRQ6#_GPIO45 PCIECLKRQ7#_GPIO46
SLP_S5#_GPIO63
SUS_STAT#_GPIO61
SUSCLK_GPIO62
BATLOW#_GPIO72
PM_GPIO(DSW)
?
JTAG(SUS)
HEC_GP6 TEST_SETUP_MENU SV_ADVANCE_GP48 PCH_GP17_PU PCH_GP1_PU PCH_GP7_PU PCH_GP68_PU BOARD_DIFF PCH_GP71_PU
GP38_CRB_DETECT PCH_SATA_LED_N SATA0GP SATA1GP SATA4GP A20GATE KBRST_N SER_IRQ L_DRQ1_N L_DRQ_N GPIO35
PCH_GP44
040
R150 1K OHM NS
OD PLL VR ENABLE DISABLED WHEN SAMPLED LOW
040
2
R157 1K OHM
040
2
R159 1K OHM NS
3D3V_SB
040
2
R168 1K OHM
3D3V_SB
040
2
AUD_LINK_SYNC_R
R170 1K OHM
NS
AW55
FP_AUD_DETECT
BC56 BC25 BL56
PCH_PU_GP34
BJ57
GPIO8
SPKR
040 040 040 040 040 040 040 040 040 040 040 040 040 040 040 040 040 040 040 040 040
TP12
RI#
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
GPIO35
BP51
IGC_EN_N
BK50
LAN_DISABLE_N
BA25
IO_PME_N
BM55
1_WATT_CTRL_1
BP53 BJ55
V_MINI_PCIE_EN
BH49 AV43
PCH_GP20_PU
BL54
PCH_GP44
AV44
PCH_GP45
BP55
PCH_GP46
BT53
GP57_SV_DETECT
BJ53 BJ48
PCH_RI_PU
BK48 BC44 BC41 BM53 BN52
BH50 BN54 BA47 AV46
1_WATT_CTRL_2
BP45 BU46
SUS_WARNB
BG46
BJ43
LED_DRIVE_GP27
BG43
PCH_GPI31_PU
BD43 BT43
BE52 BE56
D53
BC49
PCH_JTAG_RST_R
BA43
PCH_JTAG_TCK_FILTER
BC52
PCH_JTAG_TDI
BF47
PCH_JTAG_TDO
BC50
PCH_JTAG_TMS
3D3V_SB
VCC3
H_PWRGD 5,21
GPIO35
GPIO15 GPIO28
GPIO57
SYS_PWROK
PLTRST#
WAKE#
SLP_A# SLP_S3# SLP_S4#
SUSACK#
DRAMPWROK
GPIO27 GPIO31
SLP_SUS#
PWRBTN#
SYS_RESET#
PROCPWRGD
JTAG_TCK
JTAG_TDI JTAG_TDO JTAG_TMS
R226 10K R100 10K R103 20K OHM R105 10K R108 10K R111 10K R114 10K R116 10K R118 10K R120 10K R122 10K R124 10K R126 10K R130 10K R132 10K R134 10K R137 10K R139 10K R141 10K/NC R146 10K/NC
R199 1K
2
VCC3
V_MINI_PCIE_EN
J2
AUD_LINK_SDO_R----IBX INTERPOSER NAND VCCQ PWR WELL SEL
1
POWERED BY CORE WHEN SAMPLED LOW.STBY
2
AUD_LINK_SDO_R
WHEN SAMPLED HI CPT FLASH DESCRIPTOR OVERRIDE.HI FOR OVERRIDE
OD PLL VR SUPPLY SEL
1.8V SUPPLY WHEN SAMPLED LOW
1.5V SUPPLY WHEN SAMPLED HIGH
THROUGH MODE CLOCK VALIDATION STRAP EMPTY JUMPER FOR BUFFER THROUGH MODE
CDC_DWN_DISABLE
DMI RX TERMINATION VOLTAGE OVERRIDE
PCH_GP37
FDI RX TERMINATION VOLTAGE OVERRIDE
JTAG CLK FILTER BYPASS WHEN LOW
PCH_GP46
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev C
C
C Date: Sheet
Date: Sheet
Date: Sheet
1
IO_PME_N 23
H_SKTOCC_R_N 5
PCH_SYSPWROK 21 PLTRST_N 21,23
WAKE_N 10,16,19 SLP_S3_N 21,23
SLP_S4_N 24
H_DRAMPWRGD 5
SW_ON_N 23 FP_RST_N 5,22
SPKR 22
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
NS
040
2
R153 5.6K OHM NS
040
2
R154 5.6K OHM NS
040
2
R156 10K OHM
040
2
R158 10K OHM
040
2
R160 10K OHM
R172 1K OHM
SUS_WARNB PCH_PORT80_LED SMB_CLK_MAIN SMB_DATA_MAIN
PCH_GP60 SMLINK0_CLK SMLINK0_DATA PCHHOT SML1CLK_PCH SML1DATA_PCH LAN_DISABLE_N IO_PME_N
PCH_GP44 PCH_GP45 PCH_GP46 GP57_SV_DETECT PCH_RI_PU WAKE_N 1_WATT_CTRL_2 LED_DRIVE_GP27 PCH_GPI31_PU FP_RST_N
040
R327 10K OHM R102 10K OHM R101 2.7K OHM R104 2.7K OHM R106 2.2K OHM NS R109 2.2K OHM R112 2.2K OHM R115 10K OHM R117 2.2K OHM R119 2.2K OHM R121 10K OHM R123 10K OHM
R129 10K OHM R131 10K OHM R133 1K OHM R135 10K OHMNS R138 10K OHM R140 1K OHM R144 10K OHM R147 10K OHM R148 10K OHM R586 220 OHM
IGC_EN_N
Is not need for soft strap
040
2
R171 1K OHM NS
040
2
R173 1K OHM NS
040
2
R174 100 OHM NS
GM Confidential
GM Confidential
GM Confidential
PCH-SATA&GPIO
PCH-SATA&GPIO
PCH-SATA&GPIO
Sugar Bay
Sugar Bay
Sugar Bay
1
?
SMB_CLK_MAIN SMB_DATA_MAIN FP_AUD_DETECT PCH_PU_GP34 PCH_GP20_PU
2
VCC3
12 30Monday, June 04, 2012
12 30Monday, June 04, 2012
12 30Monday, June 04, 2012
040
2
R136 47K OHM
of
of
of
1.0
1.0
1.0
5
?
PCH1H
REV 1.0
CK_P_33M_AD7 CK_P_33M_PCI2
2
XCLK_RCOMP
040
2
AT11
CLKOUT_PCI0
AN14
CLKOUT_PCI1
AT12
CLKOUT_PCI2
AT17
CLKOUT_PCI3
AT14
CLKOUT_PCI4
AT9
CLKOUTFLEX0_GPIO64
BA5
CLKOUTFLEX1_GPIO65
AW5
CLKOUTFLEX2_GPIO66
BA2
CLKOUTFLEX3_GPIO67
AL2
XCLK_RCOMP
AN8
REFCLK14IN
CPT_CRB
AJ5
XTAL25_OUT
AJ3
XTAL25_IN
TP_CK_P_33M_EVBUF
040
2
CK_P_33M_LPCLAI23
CK_PCH_33M_FB11 CK_PCH_33M_SIO23
D D
CK_PCH_48M_SIO23
V_1P05_PCH
C C
R185 22 OHM
040
2
R188 22 OHM
040
2
R189 22 OHM
040
R296 22 OHM
040
2
R194 90.9 OHM
R573 10K OHM
CLKOUT_PCI_3_R
XTAL_25M_PCH_OUT XTAL_25M_PCH_IN
CPT_CRB
8 OF 10
?
4
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_GND0_N
CLKIN_GND0_P
CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P
CLKOUT_PCIE7N CLKOUT_PCIE7P
CLKOUT_DMI_N CLKOUT_DMI_P
CLKOUT_DP_N CLKOUT_DP_P
CLKOUT_PCIE0N CLKOUT_PCIE0P
CLKOUT_PCIE1N CLKOUT_PCIE1P
CLKOUT_PCIE2N CLKOUT_PCIE2P
CLKOUT_PCIE3N CLKOUT_PCIE3P
CLKOUT_PCIE4N CLKOUT_PCIE4P
CLKOUT_PCIE5N CLKOUT_PCIE5P
CLKOUT_PCIE6N CLKOUT_PCIE6P
CLKOUT_PEG_A_N CLKOUT_PEG_A_P
CLKOUT_PEG_B_N CLKOUT_PEG_B_P
R27
CK_100M_CPHY_PCH_IN_DN
P27
CK_100M_CPHY_PCH_IN_DP
W53
CK_CSI_PCH_IN_DN
V52
CK_CSI_PCH_IN_DP
R52 N52
AE2 AF1
P31 R31
N56 M55
AE6 AC6
AA5 W5
AB12 AB14
AB9 AB8
Y9 Y8
AF3 AG2
AB3 AA2
AG8 AG9
AE12 AE11
R575 10K OHM R576 10K OHM
R184 10K OHM R186 10K OHM
CK_PE_100M_MCP_DN 5 CK_PE_100M_MCP_DP 5
CK_PCIE1X_S1_DN CK_PCIE1X_S1_DP
CK_PCIE1X_S2_DN 16 CK_PCIE1X_S2_DP 16
CK_LAN_DN 19
CK_LAN_DP 19 CK_PCI_DN
CK_PCI_DP
CK_PCIE1X_S3_DN CK_PCIE1X_S3_DP
CK_PE_16PORT_PCH_DN 10 CK_PE_16PORT_PCH_DP 10
3
PCH1F
040
2
040
2
040
2
040
2
DDSP_B_HPD017 DDSP_C_HPD1
DDSP_B_TX_0_DP17 DDSP_B_TX_0_DN17 DDSP_B_TX_1_DP17 DDSP_B_TX_1_DN17 DDSP_B_TX_2_DP17 DDSP_B_TX_2_DN17 DDSP_B_TX_3_DP17 DDSP_B_TX_3_DN17 DDSP_C_TX_0_DP DDSP_C_TX_0_DN DDSP_C_TX_1_DP DDSP_C_TX_1_DN DDSP_C_TX_2_DP DDSP_C_TX_2_DN DDSP_C_TX_3_DP DDSP_C_TX_3_DN
T1 N2 M1
R8 R9
U14 U12
N6 R6
R14 R12 M11 M12
H8
K8
L5 M3
L2
J3 G2 G4
F3
F5
E4
E2 D5
B5 C6 D7
B7 C9
E11 B11
U2
T3
W3
U5 U8
U9
DDPB_HPD DDPC_HPD DDPD_HPD
DDPB_AUXP DDPB_AUXN DDPC_AUXP DDPC_AUXN DDPD_AUXP DDPD_AUXN
DDPB_0P DDPB_0N DDPB_1P DDPB_1N DDPB_2P DDPB_2N DDPB_3P DDPB_3N DDPC_0P DDPC_0N DDPC_1P DDPC_1N DDPC_2P DDPC_2N DDPC_3P DDPC_3N DDPD_0P DDPD_0N DDPD_1P DDPD_1N DDPD_2P DDPD_2N DDPD_3P DDPD_3N
SDVO_INTP SDVO_INTN
SDVO_STALLP SDVO_STALLN
SDVO_TVCLKINP SDVO_TVCLKINN
REV 1.0
2
?
CPT_CRB
<750 MILS TO MCH BALL
040
AR4
TP6 TP7 TP8 TP9
VGA_HSYNC
AR2
VGA_VSYNC
AN6 AN2 AM1
AM6
AW1
VGA_PCH_DDCSDA
AW3
VGA_PCH_DDCSCL
AT3
VGA_DACREFSET
Y18 Y17 AB18 AB17
AL12 AL14
AL9
DDPD_CTRL_CLK
AL8
DDPD_CTRL_DATA
AL15
SDVO_CTRL_CLK
AL17
SDVO_CTRL_DATA
R196 150
1%
0 4 0 2
CRT_HSYNC CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN
CRT_DDC_DATA
CRT_DDC_CLK
DAC_IREF
CPT_CRB
6 OF 10
?
DDPC_CTRLCLK
DDPC_CTRLDATA
0603
27PF/50V
<1.25inch
C169
+/-5%
DDPD_CTRLCLK
DDPD_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
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XTAL_25M_PCH_OUT XTAL_25M_PCH_IN
060
3
R195 1M
5%
Y1
49S
25M
C168
0603
+/-5%
27PF/50V
R190 33 R187 33
0 4 0 2
DDPC_CTRL_CLK DDPC_CTRL_DATA
0
R197 150
4 0 2
1%
2
040
2
R193 1K OHM
R198 150
1%
1
VGA_HSYNC_3V 17 VGA_VSYNC_3V 17
VGA_RED 17 VGA_GREEN 17 VGA_BLUE 17
VGA_PCH_DDCSDA 17 VGA_PCH_DDCSCL 17
SDVO_CTRL_CLK 17 SDVO_CTRL_DATA 17
0 4 0 2
VGA_RED 17 VGA_GREEN 17 VGA_BLUE 17
TO MCH: <250 MILS TO MCH BALLS REPLACE 150 OHM WITH 0 OHM FOR NON-GRAPHICS SKUS
VCC3 VCC3
B B
A A
PCH1G
H31
TP21
J31
TP25
C29
TP29
E29
TP33
J27
TP22
L27
TP26
F28
TP30
E27
TP34
J25
TP23
L25
TP27
C26
TP31
B27
TP35
L22
TP24
J22
TP28
B25
TP32
D25
TP36
CPT_CRB
5
REV 1.0
?
CPT_CRB
7 OF 10
FDILINK
FDI_FSYNC0 FDI_LSYNC0 FDI_FSYNC1 FDI_LSYNC1
?
FDI_RXN0 FDI_RXP0 FDI_RXN1 FDI_RXP1 FDI_RXN2 FDI_RXP2 FDI_RXN3 FDI_RXP3 FDI_RXN4 FDI_RXP4 FDI_RXN5 FDI_RXP5 FDI_RXN6 FDI_RXP6 FDI_RXN7 FDI_RXP7
FDI_INT
VGA_PCH_DDCSDA VGA_PCH_DDCSCL
C42 B43 F45 F43 H41 J41 C46 D47 B45 A46 B47 C49 J43 H43 M43 P43
B51 E49 C52 D51
H46
FDI_TX_0_DN 3 FDI_TX_0_DP 3 FDI_TX_1_DN 3 FDI_TX_1_DP 3 FDI_TX_2_DN 3 FDI_TX_2_DP 3 FDI_TX_3_DN 3 FDI_TX_3_DP 3 FDI_TX_4_DN 3 FDI_TX_4_DP 3 FDI_TX_5_DN 3 FDI_TX_5_DP 3 FDI_TX_6_DN 3 FDI_TX_6_DP 3 FDI_TX_7_DN 3 FDI_TX_7_DP 3
FDI_FSYNC_0 3 FDI_LSYNC_0 3 FDI_FSYNC_1 3 FDI_LSYNC_1 3
FDI_INT 3
4
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev C
C
C Date: Sheet
Date: Sheet
3
2
Date: Sheet
R201
2.2K
5%
0
R202
4 0
2.2K
2
C170
0402
Y5V
470PF/50V
5%
<500 MILS TO MCH BALL
0 4 0 2
C171
0402
Y5V
470PF/50V
GM Confidential
GM Confidential
GM Confidential
PCH-CLOCK&DISPLAY
PCH-CLOCK&DISPLAY
PCH-CLOCK&DISPLAY
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
13 30Monday, June 04, 2012
13 30Monday, June 04, 2012
13 30Monday, June 04, 2012
1.0
of
of
of
5
AC24 AC26 AC28 AC30 AC32 AE24 AE28 AE30 AE32 AE34 AE36 AG32 AG34 AJ32 AJ34 AJ36 AL32 AL34 AN32 AN34 AR32 AR34
AG24 AG26 AG28 AJ24 AJ26 AJ28 AL24 AL28 AN22 AN24 AN26 AN28 AR24 AR26 AR28 AR30 AR36 AR38 AU30 AU36
AU34 AV36 AU32
AE15 AE17 AG15 AJ20
V_1P05_PCH_SRC
AE40 AC20 AE20
AV24 AV26 AY25 AY27
V36 Y36 AJ38 Y28
V_1P05_PCH
D4
TL431
V_1P05_PCH
1.6A
1.61A
C180
0402
1UF/6.3V
V_1P05_ME
V_1P05_PCH
55MA
105MA
V_1P05_PCH
0805
FB1 10UH
1
NS
0805
10UF/10V
0805
FB3 1UH
1
NS
0805
10UF/10V
+12V
0
0
R213
R214
4
4
0
0
2
2
1K
1K/NC
R
A C
2MA
C200
NS
C203
NS
R217 390
3 0 6 0
?
CPT_CRB
4.07A
AA34 AA36
PCH1I
F20 F30 V25 V27 V31 V33 Y24 Y26 Y30 Y32 Y34
V22 Y20 Y22
VCCIO_24 VCCIO_25 VCCIO_26 VCCIO_27 VCCIO_28 VCCIO_29 VCCIO_30 VCCIO_31 VCCIO_32 VCCIO_33 VCCIO_34
VCCIO_22 VCCIO_23
VCCIO_35 VCCIO_36 VCCIO_37
REV 1.0
CPT_CRB
9 OF 10
VCCCORE_1 VCCCORE_2 VCCCORE_3 VCCCORE_4 VCCCORE_5 VCCCORE_6 VCCCORE_7 VCCCORE_8
VCCCORE_9 VCCCORE_10 VCCCORE_11 VCCCORE_12 VCCCORE_13 VCCCORE_14 VCCCORE_15 VCCCORE_16 VCCCORE_17 VCCCORE_18 VCCCORE_19 VCCCORE_20 VCCCORE_21 VCCCORE_22
?
V_1P05_PCH
D D
V_CPU_VCCIO V_1P05_ME
57MA
B41
VCCDMI_2
E41
AL40 AN40 AN41
AG38 AG40
AG41
BA38
U56
B53 C54
AL5 A19
VCCDMI_1
VCCIO_8 VCCIO_9 VCCIO_10
VCCIO_20 VCCIO_21
VCCIO_7
VCCAPLLSATA VCCIO_19 VCCAPLLEXP VCCAFDIPLL
VCCACLK VCCAPLLDMI2
C C
V_1P05_PCH
VCCSATA_PLL_PCH
V_1P05_PCH
VCCDMI_PLL_PCH
TP_VCCIPL_PLL_PCH
B B
TP_VCCCLK_PLL_PCH
VCCUSB3_PLL_PCH
VCCASW_4 VCCASW_5 VCCASW_6 VCCASW_7 VCCASW_8
VCCASW_9 VCCASW_10 VCCASW_11 VCCASW_12 VCCASW_13 VCCASW_14 VCCASW_15 VCCASW_16 VCCASW_17 VCCASW_18 VCCASW_19 VCCASW_20 VCCASW_21 VCCASW_22 VCCASW_23
VCCASW_3
VCCASW_2
VCCASW_1
VCCDIFFCLKN_1 VCCDIFFCLKN_2 VCCDIFFCLKN_3
VCCCLKDMI
VCCIO_18 VCCSSC_1 VCCSSC_2
VCCIO_1 VCCIO_2 VCCIO_3
VCCIO_4 VCCIO_13 VCCIO_12 VCCIO_11 VCCIO_14
V_1P05_PCH
0805
040
R209 0
R211 0
R212 0
NS
R216 0
2
040
2
040
2
040
2
5
FB2 10UH
1
0805
FB4 10UH
1
A A
0805
FB5 1uH
1
NS
0805
FB6 0R
1
+
6*11
220UF/16V
+
6*11
220UF/16V
0805
10UF/6.3V
0805
10UF/6.3V
CE1
CE2
C214
NS
C216
NS
VCCA_DPLLA
C202
0402
+80%/-20%
1UF/10V
VCCA_DPLLB
C205
0402
+80%/-20%
1UF/10V
VCCUSB3_PLL_PCH
C215
0402
+80%/-20%
1UF/10V
NS
V_1P05_PCH_SRC
C217
0402
+80%/-20%
1UF/10V
0402
1UF/6.3V
R218
C181
VCC3
0402
0402
0402
1
060
1.21K
0.1UF/25V
1UF/10V
1UF/10V
G
G
PCI
C190
0402
Y5V
0.1UF/25V
VCCSATA_PLL_PCH
C201
NS
R210 0
C204
NS
VCC
3
D
2N7002
SOT23
S
2
3
4
3D3V_SB
V_REF5V_SUS
VCC3
C174
0402
PCH
VCC3
3D3V_SB
PCH
D2 B5819W
D3 B5819W
Near AU22
R207
VCC
10
0402
5VSB
3 0 6 0
1UF/6.3V
1UF/6.3V
0402
0.1UF/25V
V_REF5V
C179
3 0
R208
6 0
10
V_REF5V_SUS
C184
0402
Y5V
0.1UF/25V
R206 0
C176
+80%/-20%
V_3P3_DAC_FB_R
C192
C191
0402
Y5V
Y5V
0.1UF/25V
PLACE VCCSATA DCPL CAPS AT ENDS OF POWER CORRIDOR
040
2
C193
0402
0402
Y5V
1UF/10V
0.1UF/25V
VCCDMI_PLL_PCH
C194
0805
NS
VCC3
Q1
2 0
R215
4 0
0/NC
0603
V_3P3_DAC_FB_R
FB7 150
1
C218
0805
10UF/6.3V
4
V_REF5V
1MA
409MA
040
2
20MA
?
VCCA_DPLLA
VCCA_DPLLB
C195
22UF/6.3V
0402
1UF/10V
1MA
10MA
V_3P3_EPW
C175
0402
1UF/6.3V
68MA
100MA
100MA
VCC3
PLACE NEAR PCH
C206
0402
Y5V
0.1UF/25V
C219
BT25 AV28 AU20
AV20 AU22
AN52
AC2
BF1
AT1 AB1
0805
PCH1K
V5REF V5REF_SUS VCCSUSHDA VCC3_3_9
VCC3_3_10 VCC3_3_7
VCCSPI
CPT_CRB
VCCADAC VCCADPLLA VCCADPLLB
3D3V_SB
0402
C207
4.7UF/6.3V
?
REV 1.0
5 OF 10
USB CLASSIC FILTER
C196
C197
0402
Y5V
Y5V
0.1UF/25V
0.1UF/25V
VCCPUSB
PLACE V3P3_STBY DCPL CAPS AT ENDS OF POWER CORRIDOR (VCCP_USB)
VCC3
V_CPU_VCCIO
C221
C220
+80%/-20%
0805
0402
1UF/10V
4.7UF/6.3V
PLACE 4.7UF EAST CORNER OF PCH
3
VCCVRM_1 VCCVRM_4 VCCVRM_3 VCCVRM_2
VCCPNAND_01 VCCPNAND_02
VCC3_3_5 VCC3_3_6
VCC3_3_2 VCC3_3_3 VCC3_3_4
VCC3_3_8 VCC3_3_1
VCCSUS3_3_11
VCCSUS3_3_2 VCCSUS3_3_3 VCCSUS3_3_4 VCCSUS3_3_5 VCCSUS3_3_6 VCCSUS3_3_7 VCCSUS3_3_8
VCCSUS3_3_9
VCCSUS3_3_10
VCCSUS3_3_1
VCCDSW3_3
V_PROC_IO
V_PROC_IO_NCTF
DCPSUS_3 DCPSUS_1
VCCRTC DCPRTC
DCPRTC_NCTF
DCPSUS_2
DCPSUSBYP
DCPSST
SATA BG
C212
0402
Y5V
0.1UF/25V
C223
C222
0402
0.1UF/25V
0.1UF/25V
3
?
0402
159MA
AJ1
VCC_XCKPLL
R2
VCCADMI_VRM_R2
R54
VCC_XCKPLL_AFDI
R56
T55 T57
VCC3
AL38 AN38
BC17 BD17 BD20
VCC3
A12 AF57
C177
0.1UF/25V
3D3V_SB
BT35
97MA
AV30 AV32 AY31 AY33 BJ36 BK36 BM36
AT40 AU38
U31
3MA
AV40
1MA+1MA
D55 B56
A39
V_1P1_USB
AA32 BU42 BR54
V_1P5_RTC_INT
BT56 AT41
AV41 BA46
V_1P5_STBY_INT
C172 0.1UF/25V
0402
040
2
R203 0
040
2
R2040
040
2
R205 0
C173 0.1UF/25V
0402
V_1P8_SFR
0402
0402
C178
0.1UF/25V
C182
0402
0402
0.1UF/25V
V_3P3_A
C185 0.1UF/25V
VCCRTC
C187 0.1UF/25V
V_1P05_PCH
0402
1UF/10V
C183
0.1UF/25V
040
2
R584 0 OHM
0402
V_CPU_VCCIO
C186 1UF/10V NS
0402
0402
C188 0.1UF/25V
0402
C189 0.1UF/25V
0402
PCI EXPRESS DECOUPLING FILTER
C199
C198
0402
1UF/10V
V_1P05_PCH
C213
C208
0402
0402
1UF/10V
1UF/10V
SATA RX/TX
V_1P05_PCH
C224
0402
Y5V
0.1UF/25V
V_1P8_SFR
3D3V_SB
V_1P05_PCH
PCH CORE POWER
C209
C210
0805
0402
1UF/10V
10UF/10V
FOR PCH DECOUPLING
C225
C226
0402
Y5V
0.1UF/25V
0402
0.1UF/25V
C227
Y5V
0402
Y5V
0.1UF/25V
BM57
BP57
BU52 BU54
AY22 AE56
BR36
M20 M22 M25 M27 M31
W55 W57
BM1
BU4
BU6
AU2
0805
L12 L17 L38 L41 L43
T52
T6 U11 U15 U17 U20 U22 U25 U27 U33 U36 U38 U41 U47 U53 V20 V38
V6
W1
Y11 Y15 Y38 Y40 Y43 Y46 Y47 Y49 Y52
Y6
A4
A6
B2
BP1 BT2
D1
F1
C12
A54 A52 F57 D57
C228
10UF/10V
2
PCH1L
VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277
CPT_CRB
VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14
VSS_4 VSS_3 VSS_1 VSS_2 VSSADAC
TS_VSS1 TS_VSS2 TS_VSS3 TS_VSS4
2
?
L33
REV 1.0
TP3
AE49
TP13
BA36
TP17
AY36
TP18
Y14
TP19
Y12
TP20
P22
TP1
M38
TP4
P25
VSS_296
R25
VSS_295
P36
VSS_294
R36
VSS_293
L31
TP2
L36
TP5
AL44
VSS_292
AL43
VSS_291
AE41
TP14
AE43
TP15
BA27
TP11
5 OF 10 ?
BM46
TP10
AG12
L_BKLTCTL
AG18
L_BKLTEN
AG17
L_VDD_EN
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C211
0402
Y5V
0.1UF/25V
V_1P05_PCH
C229
0805
10UF/10V
V_1P05_ME
BC15 BC20 BC27 BC31 BC36 BC38 BC47
BC9 BD25 BD33 BF12 BF20 BF25 BF33 BF41 BF43 BF46 BF52
BF6 BG22 BG25 BG27 BG31 BG33 BG36 BG38 BH52
BH6
BJ15 BK20 BK41 BK52
BK6 BM10 BM12 BM16 BM22 BM23 BM26 BM28 BM32 BM40 BM42 BM48
BM5 BN31 BN47
BN6
BP3 BP33 BP35 BR22 BR52 BU19 BU26 BU29 BU36 BU39
C19
C32
C39
D15
D23
D35
D43
D45
AV18 AV22 AV34 AV38 AV47
AV6 AW57 AY38
AY6 BA11
BA12 BA31 BA41 BA44
G54
H15
H20
H22
H25
H27
H33
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev C
C
C Date: Sheet
Date: Sheet
Date: Sheet
CPT_CRB
PCH1J
VSS_125
REV 1.0
VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151
10 OF 10
VSS_152
BJ1
VSS_153 VSS_154
CPT_CRB
VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186
C4
VSS_187 VSS_188 VSS_189
D3
VSS_190 VSS_191 VSS_192 VSS_193
E19
VSS_194
E39
VSS_195
E54
VSS_196
E6
VSS_197
E9
VSS_198
F10
VSS_199
F12
VSS_200
F16
VSS_201
F22
VSS_202
F26
VSS_203
F32
VSS_204
F33
VSS_205
F35
VSS_206
F36
VSS_207
F40
VSS_208
F42
VSS_209
F46
VSS_210
F48
VSS_211
F50
VSS_212
F8
VSS_213 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112
B23
VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220
H6
VSS_221
J1
VSS_222
J33
VSS_223
J46
VSS_224
J48
VSS_225
J5
VSS_226
J53
VSS_227
K52
VSS_228
K6
VSS_229
K9
VSS_230
GM Confidential
GM Confidential
GM Confidential
1
?
VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_73 VSS_72 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99
VSS_100 VSS_101 VSS_102 VSS_103 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259
PCH-POWER
PCH-POWER
PCH-POWER
Sugar Bay
Sugar Bay
Sugar Bay
1
A26 A29 A42 A49 A9 AA20 AA22 AA24 AA26 AA28 AA30 AA38 AB11 AB15 AB40 AB41 AB43 AB47 AB52 AB57 AB6 AC22 AC34 AC36 AC38 AC4 AC54 AE14 AE18 AE22 AE26 AE38 AE4 AE47 AE8 AE9 AF52 AF6 AG11 AG14 AG20 AG22 AG30 AG36 AG43 AG44 AG46 AG5 AG50 AG53 AH52 AH6 AJ22 AJ30 AJ57 AK52 AK6 AL11 AL18 AL20 AL22 AL26 AL30 AL36 AL41 AL46 AL47 AM52 AM3 AM57 AN11 AN12 AN15 AN17 AN18 AN20 AN30 AN36 AN4 AN43 AN47 AN54 AN9 AR20 AR22 AR52 AR6 AT15 AT18 AT43 AT47 AT52 AT6 AT8 AU24 AU26 AU28 AU5 AV12 BA49 BB1 BB3 BB52 BB6 BC14 M33 M36 M46 M52 M57 M6 M8 M9 N4 N54 R11 R15 R17 R22 R4 R41 R43 R46 R49
?
1.0
1.0
14 30Monday, June 04, 2012
14 30Monday, June 04, 2012
14 30Monday, June 04, 2012
1.0
of
of
of
5
4
3
2
1
VCC3
D D
FAN_CTL123
VCC3
VCC3
0
R224
4 0
10K
SPI_CLK_FLASH12 SPI_MOSI_FLASH12
C C
B B
BIOS1
2
8
VDD
7
HOLD#
6
SCK
5
SI
1
CE#
2
SO
3
WP#
4
Vss
25X80VSS_DIP
SPI_CS0_FLASH 12
SPI_MISO_FLASH 12
2 0
R225
4 0
10K
040
R256 0
2
3 0
R219
6 0
4.7k
BIOS_PT 23
060
R220 100
FAN_TAC123
3
060
3
R222 27k
C230
3 0
R223
6
0603
470PF/50V/NC
0
22K
+12V
3 0
R221
6 0
4.7k
D5
1N4148
+12V
C231
0603
0.1UF/50V
CPUFAN1
4
Control
3
SENSE
2
+12V
1
GND
4-wire
COB1X4P-2_54-FAN
www.666fix.com
1234
+12V
+12V
FAN_TAC323
A A
System FAN 2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev B
B
B Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
GM Confidential
GM Confidential
GM Confidential
SPI&DEBUG PORT
SPI&DEBUG PORT
SPI&DEBUG PORT
Sugar Bay
Sugar Bay
Sugar Bay
15 30Monday, June 04, 2012
15 30Monday, June 04, 2012
15 30Monday, June 04, 2012
1
1.0
1.0
of
of
of
1.0
5
D D
3D3V_SB
SMB_CLK_MAIN8,9,10,12 SMB_DATA_MAIN8,9,10,12
VCC3
4
+12V
VCC3
+12V
3
2
1
WAKE_N10,12,19
PCH_PCIE_TP611 PCH_PCIE_TN611
C C
+12V
VCC3
3D3V_SB
2
PCIE2
B1
PRSNT1*(B)
12V(P)
H11H2
B2 B3 B4
SMB_CLK_MAIN8,9,10,12 SMB_DATA_MAIN8,9,10,12
WAKE_N10,12,19
SMB_CLK_MAIN8,9,10,12 SMB_DATA_MAIN8,9,10,12
C237 0.1UF/16V C236 0.1UF/16V
WAKE_N10,12,19
0402 0402
3D3V_SB
VCC3
PCH_PCIE_TP211 PCH_PCIE_TN211
B B
PCH_PCIE_TP311 PCH_PCIE_TN311
B5 B6 B7 B8
B9 B10 B11
B12 B13 B14 B15 B16 B17 B18
+12V
12V(P) 12V(P) GND(P) SMCLK(B) SMDAT(B) GND(P)
3.3V(P) JTAG1(B)
3.3VAUX(I) WAKE*(B)
RSVD(B) GND(P) HSOP0(I) HSON0(I) GND(P) PRSNT2*(B) GND(P)
PCIE36
PWRGD(I)
KEY
REFCLK+(I)
REFCLK-(I)
12V(P) 12V(P)
GND(P) JTAG2(B) JTAG3(B) JTAG4(B) JTAG5(B)
3.3V(P)
3.3V(P)
GND(P)
GND(P) HSIP0(O) HSIN0(O)
GND(P)
VCC3
+12V
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A12 A13 A14 A15 A16 A17 A18
VCC3
+12V
PLTRST_PCIE_SLOTS_N 10,19,21
CK_PCIE1X_S1_DP 13 CK_PCIE1X_S1_DN 13
PCH_PCIE_RP6 11 PCH_PCIE_RN6 11
PLTRST_PCIE_SLOTS_N 10,19,21
CK_PCIE1X_S2_DP 13 CK_PCIE1X_S2_DN 13
PCH_PCIE_RP2 11 PCH_PCIE_RN2 11
PLTRST_PCIE_SLOTS_N 10,19,21
CK_PCIE1X_S3_DP 13 CK_PCIE1X_S3_DN 13
PCH_PCIE_RP3 11 PCH_PCIE_RN3 11
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A A
GM Confidential
GM Confidential
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev C
C
C Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
GM Confidential
PCIE1X
PCIE1X
PCIE1X
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
16 30Monday, June 04, 2012
16 30Monday, June 04, 2012
16 30Monday, June 04, 2012
1.0
of
of
5
4
SDVO_CTRL_CLK SDVO_CTRL_DATA DDPC_CTRL_CLK DDPC_CTRL_DATA DDSP_C_HPD1 DDSP_B_HPD0
R235 2.2K R236 2.2K
R587 2.2K
3
040
2
VCC3
040
2
040
2
2
DAC_5VVCC
D8
A K
SDO80
C243
4148
0402
+80%/-20%
0.1UF/25V
1
D D
VGA_RED13
VGA_GREEN13
VGA_BLUE13
Near pin 300mil
Mismatch MAX 200mil
0
0
R239 150
R238 150
R237 150
4
4
0
0
2
2
1%
1%
1%
C252
0603
10PF/50V
+/-5%
0603
10PF/50V
C247
+/-5%
0 4 0 2
C253
VCC
VCC3
VGA_BLUE VGA_GREEN VGA_RED
VCC3
HDMID_TX0_DN
HDMID_CLK_DP
789
D1-
GND
D2+
HDMID_TX0_DN
HDMID_CLK_DP
0402
0.01UF/50V
HDMID_TX0_DP
D2-
HDMID_TX0_DP
VCC
040
R338 680 OHM R339 680 OHM R341 680 OHM R342 680 OHM R344 680 OHM R346 680 OHM R390 680 OHM R368 680 OHM
HDMID_HPD_SINK
040
2
040
2
2
040
2
040
2
040
2
040
2
040
2
040
2
040
2
DVI_SCL_R
DVI_SDA_R
C263
0402
+/-5%
100PF/50V/NC
C264
0402
+/-5%
100PF/50V/NC
ESD17
VGA_HSYNC_3V 13 VGA_VSYNC_3V 13
HDMID_CLK_DN
10
NCNCNCNCNC
D1+
12345 6
HDMID_CLK_DN
DDSP_B_TX_0_DP13 DDSP_B_TX_0_DN13
C C
DDSP_B_TX_1_DP13 DDSP_B_TX_1_DN13 DDSP_B_TX_2_DP13 DDSP_B_TX_2_DN13 DDSP_B_TX_3_DP13 DDSP_B_TX_3_DN13
C238 0.1UF/16V C239 0.1UF/16V C240 0.1UF/16V C241 0.1UF/16V C242 0.1UF/16V C244 0.1UF/16V C245 0.1UF/16V C246 0.1UF/16V
HDMID_TX2_DP
0402
HDMID_TX2_DN
0402
HDMID_TX1_DP
0402
HDMID_TX1_DN
0402
HDMID_TX0_DP
0402
HDMID_TX0_DN
0402
HDMID_CLK_DP
0402
HDMID_CLK_DN
0402
VCC3
1
G
G
3
D
2
DDSP_B_HPD013
SDVO_CTRL_CLK13
B B
SDVO_CTRL_DATA13
S
SOT23
Q2
2N7002
NC for DDC CLK/DATA from VGA
VCC3
1
G
G
3
R240 0
D
2
S
SOT23
2N7002
Q3
VCC3
1
G
G
3
R244 0
D
2
S
SOT23
2N7002
Q4
AZ1045-04F/MSOP10
A A
C254
+/-10%
0603
10PF/50V
0402
0.1UF/25V
ESD18
0603
FB8 82NH
1
0603
FB9 82NH
1
0603
FB10 82NH
1
C248
+/-5%
U1
1
VCC_SYNC
2
VCC_VIDEO
3
VIDEO_1
4
VIDEO_2
5
VIDEO_3
6
GND
7
VCC_DDC BYP8DDC_OUT1
CM2009-02QR
<OPT11>
HDMID_TX1_DPHDMID_TX1_DP
HDMID_TX1_DN
10
NCNCNCNCNC
D1+
D1-
GND
12345 6
HDMID_TX1_DN
AZ1045-04F/MSOP10
C249
0603
+/-5%
10PF/50V
SYNC_OUT2
SYNC_IN2
SYNC_OUT1
SYNC_IN1
DDC_OUT2
DDC_IN2 DDC_IN1
HDMID_TX2_DN
HDMID_TX2_DP
789
D2+
D2-
HDMID_TX2_DN
HDMID_TX2_DP
0603
10PF/50V
C250
+/-5%
VGA_R VGA_G VGA_B
C251
0603
+/-5%
10PF/50V
16
R246 22
15 14
R247 22
13 12
5V_DDCA_CLK
11 10 9
5V_DDCA_DATA
DVI_SCL_R
6
123 4
DVI_SDA_R
R258
2.2K
5V_DDCA_DATA
5V_DDCA_CLK
040
040
DAC_5V
5
DAC_5V
2
2
D32
NUP4302MR6
HDMID_HPD
R257
0 4 0 2
2.2K
0 4 0 2
R250 0/NC R251 0/NC
5V_HSYNC 5V_VSYNC
VGA_PCH_DDCSCL 13 VGA_PCH_DDCSDA 13
5V_DDCA_CLK 5V_DDCA_DATA
040
2
040
2
VGA_HSYNC_3V 13 VGA_VSYNC_3V 13
DVI_SDA_R DVI_SCL_R
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HDMID_TX2_DN HDMID_TX2_DP
DVI_SCL_R
DVI_SDA_R
HDMID_TX1_DN HDMID_TX1_DP
DAC_5V
040
HDMID_HPD_SINK HDMID_HPD
DAC_5V
R241
R242
0
0
4
4
0
0
2
2
2.2K
2.2K
C266
C265
0402
0402
+/-5%
+/-5%
100PF/50V
100PF/50V
R243 1K
DVI_SCL_R DVI_SDA_R
NEAR TO IC
2
0
R245
4 0 2
20K
HDMID_TX0_DN HDMID_TX0_DP
HDMID_CLK_DP HDMID_CLK_DN
VGA_B
VGA_R VGA_G
6 1 7 2 8 3 9 4
10
5
DVI
M1
CASE
1
TMDS Data2-
2
TMDS Data2+
3
TMDS Data2/4 Shield
4
TMDS Data4-
5
TMDS Data4+
6
DDC Clock
7
DDC Data
8
Analog VSYNC
9
TMDS Data1-
10
TMDS Data1+
11
TMDS Data1/3 Shield
12
TMDS Data3-
13
TMDS Data3+
14
+5V Power
15
GND (for +5V)
16
Hot Plug Detect
17
TMDS Data0-
18
TMDS Data0+
19
TMDS Data0/5 Shield
20
TMDS Data5-
21
TMDS Data5+
22
TMDS Clock Shield
23
TMDS Clock+
24
TMDS Clock-
C1
Analog Red
C2
Analog Green
C3
Analog Blue
C4
Analog HYNC
C5
Analog GND
C6
Analog GND#C6
M2
CASE#26
DVICONNECTOR
VGA
GND
NC
R
GND
SDA
G
GND
HSYNC
B
NC NC
VSYNC
GND GND
CLK
shell
shell
16
17
11 12 13 14 15
VGA_PORT
5V_DDCA_DATA
5V_HSYNC 5V_VSYNC 5V_DDCA_CLK
Design Note: For DVI-I Support Please Use Port B See MOW WW07 For Detail.
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C Date: Sheet
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4
3
2
Date: Sheet
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VGA/DVI/HDMI
VGA/DVI/HDMI
VGA/DVI/HDMI
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
17 30Monday, June 04, 2012
17 30Monday, June 04, 2012
17 30Monday, June 04, 2012
1.0
of
of
of
5
1812
FU1 1.6A
1
FUSBV1
FU3
1812
1.6A
D D
1
C268
0805
4.7UF/10V
C276
0805
4.7UF/10V
USBV1
+
8*12
+
8*12
CE3
1000UF/6.3V
CE4
1000UF/6.3V
C269
0603
+/-10%
470PF/50V
CE9
+
8*12
ECD-6-2_5
1000UF/6.3V
C267
0603
+/-10%
470PF/50V
0603
470PF/50V
C277
+/-10%
+
8*12
UVCC
USBP8N_RUSBP8P_R
CE5
ECD-6-2_5
1000UF/6.3V
USBP9N_R
USBP2N_R USBP2P_R
USBV0
USBP2N_RUSBP2P_R
5
6
USBV0
USBP3N_R
4
1 5 2 6 3 7 4 8
USB_DOUBLE
D29
3
VCC_KBFUSBV0 USBV0
RN10
0603
0603
0603
0603
2.2K
1 2
3 4
5 6
7 8
0603
USB1
USBP3N_R
3571
USBP3P_R
2468
9
121011
USBP0N_R
USBV1
USBP1N_RUSBP1P_R
5
6
D28
USBV1
USBP10N_RUSBP10P_R
USBP11N_R
KBDATA23 KBCLK23
MSDATA23 MSCLK23
CLOSE PS2 CONNECTOR
FB11 120 500mA
1
0603
FB12 120 500mA
1
0603
FB15 120 500mA
1
0603
FB16 120 500mA
1
0603
C272 180PF/50V
0603
C273 180PF/50V
0603
C280 180PF/50V
0603
C279 180PF/50V
KB_DATA KB_CLK
MS_DATA MS_CLK
2
VCC_KB
0603
C271
0.1UF/50V
Y5V 16V
VCC
VCC_KB
1
0805
FB13 0R
5VSB
1
1
JKB
2
1X3PIN
3
NUP4302MR6
USBP11N_R USBP11P_R
USBP10N_R USBP10P_R
USBP2N_R USBP2P_R
USBP3N_R USBP3P_R
USBP8N_R
USBP8P_R
USBP9N_R USBP9P_R
USBP0N_R USBP0P_R
USBP1N_R USBP1P_R
123 4
NUP4302MR6
USBP0P_R
USBP11P_R
VCC FUSBV1
5VSB
VCC_KB
5VSB
VCC FUSBV0
1
JUSB2
1
JUSB1
2
1X3PIN
3
2
1X3PIN
3
KB_DATA KB_CLK
MS_DATA MS_CLK
KM1
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4
VCC1 (P)
10
VCC2 (P)
1
KDAT (B)
5
KCLK (B)
2
NC1
6
NC2
7
MDAT (B)
11
MCLK (B)
8
NC3
12
NC4
3
GND1 (P)
9
GND2 (P)
13
H1
14
H2
15
H3
16
H4
17
H5
2*6PIN
CON2X6P-DIN
16 14
9
53 7 8 101112
64
1 2
13
1517
123 4
USBV1
USBP11N11
FUSB1
2
1
4
USBV1
3 5 7
2X5N9PIN
6 8 10
USBP1P_R
USBP11P_R
USBP0N_R USBP1N_R
C C
B B
USBP0P_R
USBP10N_R USBP11N_R USBP10P_R
USBP11P11
USBP10N11 USBP10P11
USBP2N11 USBP2P11
USBP3N11 USBP3P11
USBP8N11 USBP8P11
USBP9N11 USBP9P11
USBP0N11 USBP0P11
USBP1N11 USBP1P11
USBP9P_R
USBP3P_R
-12V_SYS
DOUT1 DOUT2
DOUT3
+12V
CB1 0.1UF/25V
0402
CB2 0.1UF/25V
1
V+
2
RIN1
3
RIN2
4
RIN3
5 6 7
RIN4
8 9
RIN5
10
V-
0402
NDCDA NDSRA NSINA NRTSA NSOUTA NCTSA NDTRA NRIA
4
NDCDA
NSOUTA
NRIA
COM1
1 3 5 7 9
2X5N10PIN
2
NSINA
4
NDTRA
6
NDSRA
8
NCTSANRTSA
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PS2&USB
PS2&USB
PS2&USB
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
18 30Monday, June 04, 2012
18 30Monday, June 04, 2012
18 30Monday, June 04, 2012
1.0
of
of
of
VCC
C281
0402
0.1UF/25V
DCD1_23 DSR1_23 SIN123 RTS1_23 SOUT123
A A
CTS1_23 DTR1_23 RI1_23
U2
20
VCC
19
ROUT1
18
ROUT2
17
ROUT3
16
DIN1
15
DIN2
14
ROUT4
13
DIN3
12
ROUT5
11
GND
GD75232
5
5
VDD333D3V_SB
RL1
R0805_short
L1
4.7UH L3225
D D
CL8
0805
4.7UF/6.3V
CL9
0402
0.1UF/16V
CL1
0402
0.1UF/16V
For RTL8105E, DEL LL1,RL7,RL13
Note 1: The Trace length between L1 and 8111DL's Pin 1 must be within 0.5 cm. C5 and C8 to L1 must be within
0.5cm. Refer to Layout guide for more detail.
C C
XTAL1 XTAL2
X2 25MHz/X
CL18 27PF
CL17 27PF
GND
VDD33
CL2
CL3
0402
0.1UF/16V
CL4
0402
0402
0.1UF/16V
0.1UF/16V
R69
0/5%
CL25
0402
0.1UF/16V
R15 value should be
2.49K (1%) for all application.
49
1
MDI0+
2
MDI0-
3
VDD10
4
MDI1+
5
MDI1-
6
VDD10
7
MDI2+
8
MDI2-
9
VDD10
10
MDI3+
11
MDI3-
12
VDD33 PERSTB
RL6 0/5%
CL12
0402
0.1UF/16V
UL2
GND
MDIP0 MDIN0 AVDD10 MDIP1 MDIN1 AVDD10(NC) MDIP2(NC) MDIN2(NC) AVDD10(NC) MDIP3(NC) MDIN3(NC) AVDD33(NC)
4
CL14
CL13
0402
0402
0.1UF/16V
0.1UF/16V
2 0 4 0
VDD33
RSET
VDD33
47
46
AVDD3348AVDD33
RTL8105E/8111E
CL10
0402
1UF/16V
RL10
2.49K 1% 0402
VDD10
XTAL1
XTAL2
45
43
RSET
AVDD10
CKXTAL244CKXTAL1
0402
VDD33
42
AVDD33
CL15
0.1UF/16V
VDD10
41
EVDD10
CL11
0402
0.1UF/16V
LINK_LED
VDD33
GPO
ACT_LED
39
38
37
40
LED0
DVDD3
DVDD10(NC)
GPO/SMBALERT
CL16
0402
0.1UF/16V
LED1/EESK
ENSWREG
LED3/EEDO
LANWAKEB
ISOLATEB
REGOUT VDDREG VDDREG
EECS
DVDD10 DVDD33 PERSTB
EEDI
EVDD10CTRL12A
VDD10
36 35 34 33 32 31 30 29 28 27 26 25
CTRL12A AVDD33_REG AVDD33_REG ENSWREG LED2/EEDI LED3/EEDO EECS VDD10 LANWAKEB VDD33 ISOLATEB
3
VCC3
2 0
RL3
4 0
1K 0402
ISOLATEB
RL5
040
2
15K 0402
RL14 0 0402
RL19 0 0402
CL7
0805
4.7UF/6.3V
AVDD33_REG
8111E RL13 10K 8105E RL13 NC
CL6
0402
0.1UF/16V
VDD33
2 0 4 0
2 0 4 0
For RTL8105E, Del RL14,Add RL19
2
040
2
RL2 10K 0402
040
2
RL4 10K 0402
EECS LINK_LED LED2/EEDI LED3/EEDO
For RTL8111E, use this block
VDD33
040
2
AVDD33_REG
040
2
CLKREQB
040
2
GPO
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040
2
SMBCLK
040
2
SMBDATA
040
2
10K 0402
VDD33
RL7 0 0402
RL8 10K 0402
RL9 1K 0402
RL11 1K 0402/NI
RL12 1K 0402/NI
RL13
VDD33
CL5
0402
0.1UF/16V
1
DVDD10
SMBCLK(NC)14SMBDATA(NC)
CLKREQB
13
15
16
VDD10
SMBCLK
SMBDATA
CLKREQB
B B
A A
PLTRST_PCIE_SLOTS_N10,16,21
WAKE_N10,12,16 PCH_PCIE_TP511 PCH_PCIE_TN511
PCH_PCIE_RP511 PCH_PCIE_RN511
USBP4N11 USBP4P11
USBP5N11 USBP5P11
CL21 0.1UF/16V CL22 0.1UF/16V CL23 0.1UF/16V CL24 0.1UF/16V
CK_LAN_DP13 CK_LAN_DN13
5
PERSTB LANWAKEB HSIP
0402
HSIN
0402
HSOP
0402
HSON
0402
REFCLK+ REFCLK-
USBP4N_R USBP4P_R
USBP5N_R USBP5P_R
3D3V_SB
MDI0+MDI0-
5
6
123 4
MDI1+MDI1-
D17 NUP4302MR6
3D3V_SB
MDI2+MDI2-
5
6
123 4
4
HSIP17HSIN18REFCLK_P19REFCLK_N20EVDD1021HSOP22HSON
HSIN
HSIP
REFCLK-
HSOP
EVDD10
REFCLK+
MDI3+MDI3-
D23 NUP4302MR6
23
HSON
GND
24
VDD10
USBV0
USBP4N_RUSBP4P_R
5
6
123 4
USBP5N_R
USBP5P_R
D26 NUP4302MR6
0.01U
0.01U
0.01U
0.01U
0.01UF/16V/NI
CL33
0603
CL34
0603
CL35
0603
CL36
0603
3
CL20
0402
0.01UF/16V
1
MDI1+ MDI1­B_V_DAC MDI0-
CL19
0402
MDI0+
V_DAC
NS
MDI3­MDI3+
V_DAC
NS
MDI2­MDI2+
V_DAC
NS
MDI1­MDI1+
V_DAC
NS
MDI0­MDI0+
RD+
2
RD-
3
CT
15
TD-
14
CT
16
TD+
Pulse H5007 for RTL8110S
1 2 3 4 5 6 7 8
9 10 11
B_V_DAC
V_DAC
UL4
PE68515
UL5
TCT1 TD1+ TD1­TCT2 TD2+ TD2­TCT3 TD3+ TD3­TCT4 TD4+ TD4-12MX4-
RL17 0 0402
RL29 0 0402
RX+
CT RX­TX-
CMT
TX+
MCT1
MX1+ MX1-
MCT2
MX2+ MX2-
MCT3
MX3+ MX3-
MCT4
MX4+
040
040
7 5 6 11 12 10
24 23 22 21 20 19 18 17 16 15 14 13
2
2
2
2
0
0
RL21
4
4
0
0
75 0402
RL23 75 NS
CONN_LAN8 CONN_LAN7
RL24 75 NS
CONN_LAN6 CONN_LAN5
RL25 75 NS
CONN_LAN4 CONN_LAN3
RL26 75 NS
CONN_LAN2 CONN_LAN1
RL22 75 0402
21
21
21
21
R1004 0
R1003 0
2
[K/K32]
<P>
<P>
040
RL18 0 0402
2 0
RL27
4 0
75 0402
R0603
21
GND_AUD
R0603
21
2
2 0
RL20
4 0
0 0402
2 0
RL28
4 0
75 0402
X_1000pF/2000V
CONN_LAN1 CONN_LAN2 CONN_LAN3 CONN_LAN5 CONN_LAN6 CONN_LAN4 CONN_LAN7 CONN_LAN8
TC34
USBL1
[K/K32]
1 2 3 4 5 6 7 8
DOWN
17
18232425262728
12
ESD10 APG2247B
esd_apg2247b
SP8
1 2
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12 11
10 9 19
20 21 22
UP
13 14 15 16
USB/LAN
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RTL8111E
RTL8111E
RTL8111E
Sugar Bay
Sugar Bay
Sugar Bay
1
ACT_LED
RL15 330
LINK_LED
RL16 330
USBP5N_R USBP5P_R
USBP4N_R USBP4P_R
19 30Monday, June 04, 2012
19 30Monday, June 04, 2012
19 30Monday, June 04, 2012
3D3V_SB
of
of
of
USBV0
1.0
1.0
1.0
A
RA37 0/X
CA2
0.1uF
0603
4 4
AUD_LINK_RST12 AUD_LINK_SDO12 AUD_LINK_SDI212 AUD_LINK_SYNC12 AUD_LINK_BCLK12
CA8
RA25 20K/1%
0603
1uF
GND_AUD
3 3
2 2
CDL CDG CDR
VREFO SEN_B
JDREF SIDESURR_L
SIDESURR_R
SPDIFIN
SPDIFOUT
CA13
0805
10UF/6.3V
11
5 8
10
6 28 34
40 45
46 47
48
2
3
LDOVDD
MIC2-VREFO
CD IN
GND_AUDGND_AUD GND_AUD
9
7
DVSS2
DVDD2
RESET# SDOUT SDIN SYNC BITCLK
MIC1_VREFO_L SENSEB
JDREF SIDE_SUR_L
SIDE_SUR_R SPDIF-IN
SPDIF-OUT GPIO0
GPIO1
VREF27LINE1_VREFO_L
0603
GND_AUD
1
4
DVSS1
AVDD125AVDD2
DVDD1
MIC2_VREFO30LINE2_REFO31MIC1_VREFO_R
29
CA11 1uF
SUR_BACK_OR SUR_BACK_OL
ALC888-VC/ALC892
38
42
U16 ALC850
AVSS126AVSS2
FRONT-OUT-L FRONT-OUT-R
SURR-OUT-L
SURR-OUT-R CENTER-OUT
LFE-OUT
LINE2_L
LINE2-R
MIC2_L
MIC2_R
CD-GND
MIC1_L MIC1_R LINE1-L
LINE1-R
LINE1_VREFO_R
SENSEA
DCVOL
32
33
MIC2_L
CA20 1uF
MIC2_R
LINE2-VREFO
0603
CA21 1uF
0603
+
CA23 100uF
1
6X7
16V
+
CA25 100uF
1
6X7
16V
RA53 10K/5% RA54 10K/5%
AC97 FRONT AUDIO
1 1
B
AC5VVCC3
CA4
0.1uF
0603
GND_AUDGND_AUD
RA34 For ALC892
AC5V
LDOVDD
RA32 0
RA33 0/X
RA32: For ALC662-VD RA33: For ALC662
MIC2-VREFO
RA45 75/5% RA46 75/5%
CD-L
CD-R
BEEP
GND_AUD
35
FRONT_L
36
FRONT_R
39
SUR_L
41
SUR_R
43
CEN_O
44
LFE_O
14
SUR_BACK_OL
15
SUR_BACK_OR
16
MIC2_L
17
MIC2_R
18
CDL
19
CDG
20
CDR
21
MIC1_L
22
MIC1_R
23
LINE1_L
24
LINE1_R
37 13
SEN_A
12
MIC1-VREFO-R LINE2-VREFO
RA49 75/5% RA51 75/5%
CA3
0.1uF
0603
RA43 10K/5% RA44 10K/5%
SIDE SURROUND OUT
C
AUDIO POWER
5VSB
RA34
0
FB 600 ohm
8 0 5
SOT23
A1
D46
K
A2
AZ2025
D-SOT23-A1KA2
LM7805CT/200mA (For all ports support Headphone function)
MIC1_IN_R
0/5%/XRA41
MIC1_IN_L
0/5%/XRA42 CFPA
HEADER2X5
132
4
5
6 7 9 10
GND_AUD
CA12
0805
10UF/6.3V
MIC2-JD LINE2-JD
VR3 78L05/D
TOP
O
OUT GND IN
G
GND_AUDGND_AUD
RA16 20K/1% RA17 39.2K/1%
For Standby mode-De-pop
Option 1: For improving the background noise of MIC boosting.
I
CA36 1uF
RA24 10
Digital
Analog
SIDESURR-JD
GND_AUD
SR4 0/6S/X
CEN-JD
FRONT-JD LINE1-JD MIC1-JD SURR-JD
SEN_B
SEN_A
RA12 5.1K/1% RA13 10K/1% RA14 20K/1%
GND_AUD
SEN_B
D
SPDIFIN
RA22 10
SPDIFOUT
+12V
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CA15
0.01U
16V Y5V
0603
VCC3
RA26 10K
RA27 10K
RA28 100
VREFO MIC1-VREFO-R
MIC1_R
MIC1_L
J13
CA14
0603
CA17
0.01U
100P
0603
16V
50V
Y5V
NPO
SPD_OUT_R
CA22
RA30
100P
0603
50V
220
NPO
RA18 10K/5% RA19 10K/5%/X RA20 10K/5%
0603
0603
RA21 75/5%
CA5 1uF
CA6 1uF RA23 75/5%
LINE IN
LINE1_R
LINE1_L
CA9 1uF
0603
CA10 1uF
0603
RA29 75/5%
RA31 75/5%
LINE OUT
SR5 0/6S/X
SR6 0/6S/X
FRONT_R
FRONT_L
SR7 0/6S/X
+
CE25 100uF
1
+
CE26 100uF
1
MIC1_IN_L MIC1-JD
MIC1_IN_R
F_OUT_L FRONT-JD
F_OUT_R
L_IN_L LINE1-JD
L_IN_R
GND_AUD
16V
16V
RA38 75/5%
RA40 75/5%
AUDIO2
2
FRONT_L (I)
3
NC1
4
NC2
5
FRONT_R (I)
6
H1
7
H2
8
H3
9
H4
10
H5
22
LINEIN_L (B)
23
NC3
24
NC4
25
LINEIN_R (B)
32
MIC_REF (B)
33
NC5
34
NC6
35
MIC_IN (I)
1
GND
13PIN
CON13P-PHONEX3
CA18 100pF
6X7
6X7
E
MIC IN
MIC1_IN_R
F_OUT_R
F_OUT_L
CA19 100pF
0603
0603
GND_AUD
96
2
32
22
3
23
33
1
24
34
4
25
35
5
8
2,22,32 3,23,33
4,24,34 5,25,35
1
SPDIF
1 2 3
3*1 PIN
MIC1_IN_L
L_IN_R
L_IN_L
7
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Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
ALC888-VC/892
ALC888-VC/892
ALC888-VC/892
Sugar Bay
Sugar Bay
Sugar Bay
E
1.0
1.0
20 30Monday, June 04, 2012
20 30Monday, June 04, 2012
20 30Monday, June 04, 2012
1.0
of
of
of
5
3D3V_SB
2 0
R292
4 0
10K
040
2
R297 1K OHM
R300
SLP_S3_N12,23
D D
040
10K
3
C
2
Q9
B
1
SOT23
BE
2N3904
2
NS
040
2
R305 1K OHM
B
1
B
1
R293 100 OHM
3
C
SOT23
BE
2N3904
NS
2
R303 100 OHM
3
C
SOT23
BE
2N3904
2
040
2
NS
Q8
040
2
Q10
H_PWRGD 5,12
0
R298
4 0 2
1K OHM
VR_READY 27
4
3
2
1
3D3V_SB
3D3V_SB
C295
0402
0.01UF/25V
2 0
R301
4 0
U3A
14
1K
3
C
B
1
C297
+80%/-20%
BE
Q11
SOT23
2N3904
2
PLTRST_N12,23
0402
1UF/10V/NC
040
2
R306 10K
172
U3B
3 4
74HCT14
74HCT14
040
2
R304 1.62K OHM
Near 74HCT14
040
2
R308 22 OHM
PLTRST_CPU_N 5
0
R307
4 0 2
750 OHM
PLTRST_PCIE_SLOTS_N 10,16,19
3D3V_SB
SEQUENCING CIRCUIT
3D3V_SB
3D3V_SB
2 0
R310
4 0
2 0 4 0
C C
040
2
R315 10K
PWRGD_PS22
C301 1UF/10V
3
1
0402
SLP_S3_N12,23
R311
10K
1
Q14
2N3904
2
040
2
R319 10K
10K
PWRGD_PS_BUF
3
Q13
2N3904
2
C302
0402
0.1UF/25V/NC
1
3D3V_SB
2 0 4 0
3
R312
040
2
0
R314
0
R318
10K
1
Q16
2N3904
2
U3C
5 6
C299
0
0603
4 0
1UF/10V/X
2
3
Q15
2N3904
2
74HCT14
U3D
9 8
040
2
R317 0/NC
74HCT14
040
2
R313 249 OHM
C300
2 0
0402
+/-5%
R316
4 0
100PF/50V
100K
PWRGD_3V 12
J1
1 2
1X2
3D3V_SB
R320
0 6 0 3
47K
C303
0603
Q17
1
2N3904
3D3V_SB
2 0 4 0
NS
3
2
1UF/16V
R325 680 OHM
B B
5VSB
5VSB
R326
0 6 0
3D3V_SB
3
R328
5.6K
R331
1.1K
0 6 0 3
3.24K/NC
0 6 0 3
R329
4.7K
0 6 0 3
3
1
2N3904
2
Q18
040
2
R330 1K OHM
0402
0.1UF/25V
0402
1UF/6.3VNS
C306
C307
2 0 4 0
11 10
R324 0
U3E
74HCT14
U3F
13 12
74HCT14
STBYPWG_N
0402
C305
0.1UF/25V/NC
060
3
R321 499
R322 10K
5%
0 4 0 2
C304
0402
0.1UF/25V/NC
PCH_DPWROK 12
R299 0
0
R295
4 0
10K/NC
2
040
2
0
R302
4 0
10K/NC
2
C296
0805
22UF/6.3V
NS
PCH_SYSPWROK 12VR_READY27
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Stuff for DEEP S4/S5 NOT SUPPORT
040
2
PCH_DPWROK12
R333 0
PCH_RSMRST_N 12
040
R340 0/NC
2 0
R574
4 0
100K
2
RSMRST_N_SIO 23
A A
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Date: Sheet
5
4
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2
Date: Sheet
GM Confidential
SYSTEM LOGIC
SYSTEM LOGIC
SYSTEM LOGIC
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
21 30Monday, June 04, 2012
21 30Monday, June 04, 2012
21 30Monday, June 04, 2012
1.0
of
of
of
5
4
3
2
1
C322
0.1UF/25V
<ROOM>
13 14 15 16 17 18 19 20 21 22 23 24
ATXPWR24
PW1
3.3V
-12V GND PSON GND GND GND
-5V 5V1 5V2 5V3 GND
GND
GND
GND
5VSB
1
3.3V
2
3.3V
3 4
5V4
5 6
5V5
7 8
POK
9 10
12V
11
12V
12
3.3V
5VSB
3 0
R352
6 0
22K
C318
0402
0.1UF/25V
CE14
ECD-6-2_5
0402
0.01UF/50V/NC
R354 100
C313
+/-10%
VCC3
CE6
+
8*12
1000UF/6.3V
VCC VCC VCC
CE8
+
8*12
1000UF/6.3V
PS_ONJ23
D D
0402
VCC3
C316
0.1UF/25V
0402
C317
0.1UF/25V
VCC3
3D3V_SB
C320
0402
0.1UF/25V
+
8*12
1000UF/6.3V
-12V_SYS VCCVCC3
040
2
CE13
+
8*12
ECD-6-2_5
1000UF/6.3V
C321
0402
0.1UF/25V
VCC
0402
-12V_SYS
C323
0402
0.1UF/25V
C C
PCH_SATA_LED_N12 FP_RST_N5,12
B B
WDRESET23
D9 1N4148
060
3
R366 100
060
3
R383 100
+12V +12V +12V
C324
C325
0402
0402
0.1UF/25V
0.1UF/25V
C327
0.1UF/25V
V_1P05_PCH V_1P05_PCH
C328
0402
0.1UF/25V
VCC3 VCC3
0402
VCC3
3 0
R362
R363
6
0 0 4
330
0 2
HDLED+
8.2K
RESET_BTNRESET_BTNRESET_BTNRESET_BTN
0402
0402
C326
0.1UF/25V
C329
0.1UF/25V
CFP
1 3 4 5 6 7 8 9
2X5NC10
0402
2
SPKR12
C330
0.1UF/25V
PWRLED+
0402
1UF/10V
VCCVCC
3 0 6 0
PBTNJ_SIO
C331
+80%/-20%
3D3V_SB
R364 330
R361 2.2K
2 0 4 0
INTEL FRONT PANEL
VCC3
R365
+
8*12
4.7K
CE15
ECD-6-2_5
1000UF/6.3V
040
2
5VSB
+12V
CE7
+
8*12
1000UF/6.3V
B
1
BE
PBTNJ_SIO 23
5VSB
2 0 4 0
C319
0402
+/-10%
0.01UF/50V/NC
VCC
3 0
R359
6 0
75
3
C
Q28
SOT23
2N3904
2
SOT23
D33
K
AZ2025
D-SOT23-A1KA2
R356
3 0 6 0
10K/NC
R360 75
A1 A2
SPK1
1 2 3 4
PWRGD_PS 21
1X4PIN
PBTNJ_SIO RESET_BTN
VCC3 VCC3 VCC3 VCC3 VCC3 VCC3
0402
C410
0.1UF/25V
0402
C440
0.1UF/25V
0402
C441
0.1UF/25V
0402
C442
0.1UF/25V
0402
C443
0.1UF/25V
0402
C444
0.1UF/25V
5VSB
0.001V SETP
VCCP_OFFSET 27
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5VSB
0.002V SETP
DDR_OFFSET 24
0.001V SETP
VTT_OFFSET
SMB_CLK_MAIN 8,9,10,12,16
SMB_DATA_MAIN 8,9,10,12,16
0.001V SETP
VSA_OFFSET 24
0.002V SETP
VAXG_OFFSET 27
0.001V SETP
V18_OFFSET
SMB_CLK_MAIN 8,9,10,12,16
SMB_DATA_MAIN 8,9,10,12,16
91011
1213
222324
1415161920
18
25
8 7 6
21
MH2 XMH-HOLE
1 2 3 4 5
A A
5
91011
1213
222324
MH3 XMH-HOLE
1 2 3 4 5
1415161920
18
25
8 7 6
21
91011
1213
222324
MH4 XMH-HOLE
1 2 3 4 5
1415161920
18
91011
1213
222324
MH1 XMH-HOLE
1 2 3 4 5
1415161920
18
25
8 7 6
21
25
8 7 6
21
4
91011
1213
222324
MH5 XMH-HOLE
1 2 3 4 5
1415161920
18
91011
1213
222324
MH6 XMH-HOLE
1 2 3 4 5
1415161920
18
25
8 7 6
21
25
8 7 6
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21
3
2
Title
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C
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Date: Sheet
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PANEL
PANEL
PANEL
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
22 30Monday, June 04, 2012
22 30Monday, June 04, 2012
22 30Monday, June 04, 2012
1.0
of
of
of
Power On Strapping Options
JP3
Flashseg1_EN
Pin 124 JP4
K8PWR_EN
Pin 126 JP3 &
JP5
FAN_CTL_SEL
Pin 124 & 46
D D
NOTE: Use EUP function Pin 71,Pin 72, Pin 73 ,Pin 77 Pin 85,Pin 17 please pull high to SYS_3VSB. Pin 16,Pin 75,Pin 76 pull high to 3.3VSB.
If without use these pins, Please pull-up to 3.3V. Don't let it floating
1.Pin 95:VIN3/ATXPG
2.Pin 71:SUSB#
3.Pin 3:PCIRSTIN#
4.Power On Strapping Options pin
5.Pin80~83 KCLK/KDAT/MCLK/MDAT
VCC
VCC3
C C
VCC
B B
P_STB_R P_PD0_R P_PD1_R P_PD2_R P_PD3_R P_PD4_R P_PD5_R P_PD6_R P_PD7_R
DSKCHGJ WPJ INDEXJ TRAK0J
RDATAJ
RESETIN
P_D3 P_D2 P_D1 P_D0
P_D6 P_PD6_R
STB­AFD1­INIT1­SLIN1-
P_SLIN_R SLCT PE BUSY ACKJ P_PD4_R P_PD5_R P_PD6_R P_PD7_R
P_INIT_R ERRJ P_AFD_R P_STB_R P_PD0_R P_PD1_R P_PD2_R P_PD3_R
ACKJ BUSY
PE
SLCT
5
P_PD3_R P_PD2_R P_PD1_R P_PD0_R
P_PD7_RP_D7 P_PD5_RP_D5
P_PD4_RP_D4
P_STB_R P_AFD_R P_INIT_R P_SLIN_R
VCC3
3D3V_SB
P_AFD_R ERRJ P_INIT_R P_SLIN_R
DescriptionSymbol value
L_FRAME_N
VCC3
C336
0402
0.1UF/16V
To COM1 Port
LPC1
1 3 4 5 6 7 8 9 10
HEADER_2X5
3D3V_SB
C333
0402
0.1UF/16V
FAN_TAC115 FAN_CTL115 FAN_TAC2
FAN_TAC3
040
2
R563 10K OHM
BIOS_PT15
GPIO21 GPIO20
WDRESET22
C346
0.1UF/16V
0402
Note: *Place C337 close to SIO
CK_PCH_33M_SIO13
CK_PCH_48M_SIO13
L_FRAME_N12
2
VCC3
VCC3
0402
2.2UF/16V
PLTRST_N12,21
L_DRQ_N12
SER_IRQ12
KBRST_N 12 A20GATE12
Disabled.1
0 Flash I/F Address Segment 1 is enabled
K8 power sequence function is disabled
1
K8 power sequence function is enabled
0 11 The default value of EC Index 15h/16h/17h is 80h 10
The default value of EC Index 15h/16h/17h is FFh(Fan off )
01
The default value of EC Index 15h/16h/17h is 00h(Fan full speed )
00
The default value of EC Index 15h/16h/17h is 40h
CK_P_33M_LPCLAI13
C337
L_AD012 L_AD112 L_AD212 L_AD312
SIN118 SOUT118 DSR1_18 RTS1_18 RI1_18 DCD1_18 DTR1_18 CTS1_18
L_AD0 L_AD1 L_AD2L_AD3
CTS1_
FAN_TAC1 FAN_CTL1 FAN_TAC2
FAN_TAC3
RESETIN
GNDD
5VSB_CTRL 5VAUX_SW PWRGD2_50ms
ATXPG
GPIO_A GPIO_B
PWRGD1_30ms
3D3V_SB VCORE
LRESET# SERIRQ
L_FRAME_N
SIN1 SOUT1 DSR1_ RTS1_ RI1_ DCD1_ DTR1_ CTS1_
PLTRST_N 12,21
L_AD0 L_AD1 L_AD2 L_AD03 KBRST_N A20GATE
NS
040
2
R367 680 OHM
040
2
R369 680 OHM/NC
NS
RI1_
PCICLK
48M_CLK
4
Note: If 75232 is connected, please use 680 ohm to be the pull down resistor value. Since
JP3
SOUT1
A20GATE
JP5
3D3V_SB VCC3
2
2
0
0
R371
R370
4
4
0
0
10K/NC
10K/NC
SW_ON_N RSMRST_N_SIO IO_PME_N
5VAUX_SW PWRGD1_30ms
PWRGD2_50ms PWRGD3_150ms 5VSB_CTRL
P_D7
P_D6
DCD1_
DTR1_
GNDD
SIN1
SOUT1
DSR1_
RTS1_
powered by 12V, 75232 has a very strong internal pull-up. It is hard to be pulled low. (Please see specification for detail of power on strapping setting)
2 0
R372
4 0
10K
P_D5
P_D4
P_D3
P_D2
P_D1
P_D0
Pin59
Pin58
Pin57
Pin60
PECI SST
R374
0 4 0
2.2K
2
STB­AFD1­ERRJ INIT1­SLIN1­ACKJ
WPJ INDEXJ TRAK0J RDATAJ
WEJ HEADJ STEPJ DIRJ WDJ DSAJ MOAJ DENSELJ
SMB_DAT_SIO 12
R376
0 4 0
2.2K
2
SLCT
PE
BUSY
VIN0
VIN1
Pin98
VIN3 VIN4 VIN5 VIN6
TMPIN1
RSMRST# MSCLK
MSDATA KBCLK KBDATA
PWRGD3_150ms
PSON# PANSHW_ GNDD PME# PWRON# SUSB_ SYS_3VSB VBAT COPEN_ VCC3SB
DSKCHGJ
040
R570 33 OHM
3D3V_SB
R377
0 4 0
2.2K
2
R335 1K OHM R95 1K OHM
R332 1K OHM
2
3
VIN3
Reserve
AVCC3_R
ME2N7002D
040
2
040
2
040
2
RSMRST_N_SIO 21
R385 33 OHM
SLP_S3_N 12,21
R389 1K
3D3V_SB
H_PECI 5,12
SMB_CLK_SIO 12
VCC
2 0
R378
4 0
6.8K OHM
2 0
R379
4 0
10K OHM
ITE8728 :R387=0 R382=330 ITE8772 :R387=330 R382=0
SIO_AVCC3
0
R387
4 0 2
330 OHM
3
Q29
D
G
1
PSON#
SOT23
S
G
2
0
R382
4 0 2
330 OHM
VCCP V_SM
V_CPU_VCCIO V_1P05_PCH V_AXG
MSCLK 18
MSDATA 18
KBCLK 18
KBDATA 18
PS_ONJ 22
040
2
IO_PME_N 12 SW_ON_N 12
040
2
R386 100/NI
040
2
3D3V_SB
0402
0.1UF/16V
Note: *Place C10,C11 close to SIO *Recommended net "VCCH" minimum trace width 12mils.
Pin98
VREF
C334
0402
Note:
1UF/6.3V
0402
PBTNJ_SIO 22
VCCRTC
3D3V_SB
0402
C338
0805
10UF/10V
+12V
2 0 4 0
2 0 4 0
C332
0402
1UF/6.3V
VREF
Place C4 close to SIO, and Do Not remove this 1uF Cap. of VREF.
C308
0.1UF/25V
C335
Tantalum cap. (Spare for battery installation glitch) Layout Note:
1UF/6.3V
*Isolated the VBAT pin-69 & ICH's VCCRTC pin *Suggest not clear SIO's VBAT
C339
R88
31.6K OHM
R384 10K OHM
R337 6.8KRF
5%
12
RT8 10K
t
0805
10UF/10V
040
2
SUSB_
GPIO_A GPIO_B
PCIRST1_ PCIRST3_
VCC3 VCC33D3V_SB 3D3V_SB
3D3V_SB
2 0 4 0
R665 10K OHM
2 0
R667
4 0
10K OHM
2 0
R666
4 0
10K OHM
NS
1
2
2
0
0
R664
R663
4
4
0
0
1K OHM
1K OHM
C600
C601
0402
0402
180PF
180PF
ITE8772 上件
RTS1_ DSR1_ SOUT1 SIN1 DTR1_ DCD1_ RI1_ CTS1_
56
55
64
63
62
61
60
59
VCC3
060
3
R380 10 OHM
C79
C78
0805
10UF/10V
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BIOS_PT15
WDRESET22
2
VREFTMPIN1
GPIO_B
PWRGD1_30ms
PCIRST1_ 3D3V_SB
LRESET# L_FRAME_N
L_AD0
L_AD1 L_AD2 L_AD03 KBRST_N A20GATE PCICLK 48M_CLK
FAN_TAC1 FAN_CTL1 FAN_TAC3
5VSB_CTRL
ATXPG
R660 33 OHM
R661 33 OHM
VCORE SERIRQ
1
FAN_TAC2/GP52
2
FAN_CTL2/GP51
3
FAN_TAC3/GP37
4
FAN_CTL3/GP36
5
5VSB_CTL#
6
ATXPG/GP30
7
CPU_PG/GP23
8
GP22
040
2
9
PWRGD1
040
2
10
PCIRST1#/GP12
11
3VSB
12
VCORE
13
LRESET#
14
SERIRQ
15
LFRAME#
16
LAD0
58
RI1#/GP32
SIN1/GP41
DTR1#/JP4
SOUT1/JP3
CTS1#/GP31
DSR1#/GP45
DCD1#/GP33
IT8772
64-LQFP
LAD117LAD218LAD319KRST#/GP6220GA20/JP521PCICLK22CLKIN23SST/AMDTSI_D/PCH_D
49
57
52
51
50
54
53
GNDD
AVCC3
RTS1#/JP2
VLDT_12/VIN4
VIN3(+5V_SEN)
VIN2(+12V_SEN)
VIN0/VCORE(1.1V)
VLDT_EN/PCH_D/GP65
VIN1/VDIMM_STR(1.5V)
RSMRST#/CIRRX1/GP55
PCIRST3#/GP10
VCORE_EN/PCH_C/FAN_CTRL4
MCLK/GP56 MDAT/GP57
KCLK/GP60 KDAT/GP61
3VSBSW#/GP40
PWRGD3 SUSC#/GP53 PSON#/GP42
PECI/AMDTSI_C
SYS_3VSB26COPEN#27VBAT28SUSB#29PWRON#/GP44
PME#/GP5431PANSWH#/GP43
24
25
30
32
VREF TMPIN1 TMPIN2
TSD-
GNDA
U18
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
lqfp64
PANSHW_ PME# PWRON# SUSB_ VBAT COPEN_ SYS_3VSB PECI SST
AVCC3_R
VIN0
VIN1
Pin98
VIN3 VIN5
V_1P05_PCH
040
2
R662 33 OHM
VCCP V_SM +12V VCC
TMPIN1
RSMRST# PCIRST3_ MSCLK MSDATA KBCLK KBDATA
PWRGD3_150ms
GPIO_A PSON#
VREF
P12页 KBRST A20GATE 上拉电阻R134 R137改为1K
A A
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Custom
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8721BX/8728
8721BX/8728
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1.0
1.0
23 30Monday, June 04, 2012
23 30Monday, June 04, 2012
23 30Monday, June 04, 2012
1.0
of
of
of
5
VCC
D D
060
R401 24K
3 0
Q31
6 0
2N7002
SOT23
0.01UF/50V/NC
VR1 RC1117ST
SOT223
I
IN(I)
3
C344
0603
R399
470PF/50V/NC
2.2K/NC
0603
C347
REG-SOT223-GOI
OUT(O)
ADJ(I)
1A
G
7
COMP
OSC
6
FB
FB252
0
R405
6 0 3
1K
O
3 0 6 0
PHASE_2
5VSB
0 4 0 2
3
C
040
2
B
R403 4.7K
SLP_S4_N12
1
BE
EN_1.8V
R397
3
D
4.7K
G
1
S
G
Q32
2
SOT23
2N3904
2
DDR_OFFSET
C C
5VSB
C372
0805
10UF/10V
3D3VADJ
3 0 6
R260
5VSB
0
3 0 6 0
B B
VCC33D3V_SB
10
3 0
R393
6 0
2.2
0603
1UF/16V
5
BOOT
UGATE
VCC
PHASE
LGATE
GND
3
MAX 1.5A
R412
121
R413
200
C414
1UF/10V
C341
0603
U8
1 2 8
4
UP6103
R406 220/NI
3D3V_SB
0805
10UF/10V
4
VDIMM
D11 B5819W
R398 2.2
060
3
R404 1.05K OHM
060
3
C367
060
3
PHASE_2
Q33
1
TBD
3 2
C351
0603
0.01UF/50V/NI
1
VCC
ENVELOP
1 2
BOOT252
Q30 TBD
3 2
L15
1.2UH
C340
0.1UF/50V
0603
5 0 8 0
0603
4700PF/50V
0603
C343
0.1UF/50V
R402
2.2 C350
+
10*12
L16
EC3
SAMXON
1500UF/6.3V
ENVELOP
12
C342
0805
4.7UF/10V
2.0UH
+
10*12
1500UF/6.3V
EC5
EC6
+
10*12
1500UF/6.3V
3
MAX 25A
C345
0603
1UF/16V
SET 1.55V
C348
0805
10UF/16V
V_SM V_SM
EC7
+
10*12
1500UF/6.3V
V_SM
2
C352
1UF/16V
0603
3D3V_SB
3 0 6 0
3 0 6 0
R407 300
1%
R409 140
1%
+12V
U10A
84
LM358M/TO8
3
+
2
-
C800 1000P/10V
0603
R415 1K
1
040
2
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5VSB
040
0805
10UF/10V
1
2
C438
R259
10
VR2
1
VIN
REF3VOUT
UPI7719
ic8_so_b
V_SM_VTT
1A
C356
0805
10UF/10V
V_SM
Q38 TBD
3 2
V_SA
CE28
+
8*12
560UF/4V
C436
1UF/16V
VCCSA_SENSE5
3D3V_SB
0603
VSA_OFFSET
0
R579
6 0 3
2.55K OHM
0
R580
6 0 3
1K OHM
040
2
R583 0 OHM
V_SM
3 0 6 0
R418
3 0 6 0
1K 1%
+12V
84
5
+
6
-
C802 1000P/10V
0603
R582 100 OHM
R414
U10B LM358M/TO8
DDR_VTT
1K
1%
C354
0402
0.1UF/25V
7
R578 1K
040
2
1
040
2
R410 1K
0402
0.1UF/25V
3 0 6 0
C413
0603
1UF/10V
8
7
VCTL1
VCTL25VCTL36VCTL4
GND
GND
2
9
C357
0603
1UF/10V
C437
0805
10UF/10V
1000UF/6.3V
MAX 8.8A
0.925v
CE19
+
8*12
ECD-6-2_5
1000UF/6.3V
V_SM
Q35
1
TBD
3 2
V_1P05_PCH
CE10
C353
+
8*12
1000UF/6.3V
4
CE23
+
+
8*12
8*12
1000UF/6.3V
VCCSA_VID=H 0.85V VCCSA_VID=L 0.95V
6.2A+1.8A
CE21
+
8*12
ECD-6-2_5
1000UF/6.3V
CE22
3D3V_SB
3 0
R416
6 0
1.5K
1%
3 0
0402
R419
C361
6 0
1.8K
0.1UF/25V
A A
1%
1
8
7
VR4
VIN
VCTL25VCTL36VCTL4
REF3VOUT
GND
GND
UPI7719
2
9
ic8_so_b
VCTL1
SET TO 1.8
1.6A MAX
4
0805
C446
10UF/10V
C359
2.2UF/10V
V_1P8_SFR
0
R592
4 0 2
CE12
CE17
+
+
8*12
C360
0.1UF/25V
0402
8*12
1000UF/6.3V
1000UF/6.3V
0603
V_SA
V_CPU_VCCIO
040
R594 100 OHM
VCCSA_VID5
0
R593
4 0 2
1K OHM
10K
2
V_1P8_SFR
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C
C Date: Sheet
Date: Sheet
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Date: Sheet
GM Confidential
MEMORY&MISC POWER
MEMORY&MISC POWER
MEMORY&MISC POWER
Sugar Bay
Sugar Bay
Sugar Bay
1
24 30Monday, June 04, 2012
24 30Monday, June 04, 2012
24 30Monday, June 04, 2012
1.0
1.0
1.0
of
of
of
5
+12V
D D
C C
3 0
RV39
6 0
2.2 D18
1
SOT23
2
BAT54C
PWMS27
3
0603
RV96 1
PWMS
VCC_PDS
CV45
0.1UF/50V
060
3
BOOT_R_PDS
U13
1
BST
2
IN
3
OD
4
VCC
UP6281 PSOP8
9
DRVH
PGND
DRVL
GND
CV41
SW
0.1UF/50V
0603
8 7 6 5
4
VIN
060
3
RV97 1
UGATESBOOT_PDS
PHASES
UGS
040
2
RV98 10K 0402
0603
CV43
220PF/50V/NI
LGS
Q42
1
TBD
3 2
Q43
1
TBD
3 2
SCSP27
SCSN27
0603
RV104 33K 0402 /NI
SCSP
SCSN
CV42
0805
1UF/16V
3 0
RV99
6 0
2.2
SNUBS
4700PF/50V CV44
040
3
RV100
ISEN_SHORT /NI
2
040
RV105 1K 1% 0402
L10
0.5uH/40A/INC0810/D
R50
RV101
ISEN_SHORT /NI
040
IPHASES
040
2
RV103 10K 0402 /NI RT3 10K 1% 0603 SMD /NI
2
2
RV102 9.1K 1% 0402
T
0402
CV46
0.1UF/50V
0402
CV47
0.1UF/50V/NI
V_AXG
2
+
8*8
560UF/4V
EC19
+
8*8
560UF/4V
EC18
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B B
A A
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B
B Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
VAXG
VAXG
VAXG
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
of
of
of
25 30Monday, June 04, 2012
25 30Monday, June 04, 2012
25 30Monday, June 04, 2012
1.0
5
D D
4
3
VIN
2
CE18
+
10*20
1500UF/16V
1
1.05&1V
+
8*12
CE20 560UF/4V
V_CPU_VCCIO
Max 17A
C C
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48A Max
V_CPU_VCCIO
B B
V_CPU_VCCIO
C395
0.1UF/16V
0402
0402
A A
5
4
3
C396
0.1UF/16V
0402
C397
0.1UF/16V
2
0402
C398
0.1UF/16V
C386
C387
0805
0805
22UF/6.3V
22UF/6.3V
0402
C399
0.1UF/16V
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet of
Date: Sheet of
Date: Sheet
C388
0805
22UF/6.3V
0402
0805
22UF/6.3V
C400
0.1UF/16V
C389
C390
0805
22UF/6.3V
0402
C401
0.1UF/16V
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CPU_VCCIO
CPU_VCCIO
CPU_VCCIO
Sugar Bay
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C402
0.1UF/16V
1
0402
BACKSIDECPU CAVITY CAPS
C403
0.1UF/16V
26 30Monday, June 04, 2012
26 30Monday, June 04, 2012
26 30Monday, June 04, 2012
0402
C404
0.1UF/16V
1.0
1.0
1.0
of
5
UP6230 VRD12 POWER CKT
V_CPU_VCCIO
VCC3
0
RV23
4 0
1.2K
2
D D
H_VIDALERT_N_VR5
H_VIDSOUT_VR5 H_VIDSCK_VR5
VR_READY21
VCCP_OFFSET
040
2
RV22 0 OHM
VCCP
VCC_SENSE5 VSS_SENSE5
040
2
RV17 100 OHM
VAXG_OFFSET
040
2
RV40 0
V_AXG
VCCAXG_SENSE5
C C
VSSAXG_SENSE5
040
2
RV44 100 0402
H_PROCHOT_N5
0402
CV9 330PF/50V/NI
RV16 1K 1% 0402
VSS_SENSE
0402
CV19 330PF/50V/NI
RV43 1K 1% 0402
VSSAXG_SENSE
040
2
RV15 0 0402 /NI
040
2
VSS_SENSE
0402
CV15 0.01UF/50V
040
2
RV41 0 0402 /NI
040
2
0402
CV24 0.01UF/50V
2
RV21 10K 1% 0402
2
RV37 10K 1% 0402
R25: RV50=75K
0
0
RV3
RV2
4
4
0
0
100 0402
56 0402
2
2
RV9 0 0402 RV18 0 0402 RV11 0 0402
RV13 0 0402
CORE_TYPE2
040
CV8 0.01UF/50V
CV7
0402
33PF/50V
0402
CV12 100P/50V
040
2
RV30 0 0402
R25: RV31=10K
CORE_TYPE3
040
CV18 0.01UF/50V
CV20
0402
33PF/50V
040
2
RV47 0 0402
R25: RV48=10K
RV50
39K 0402
11.5K OHM 1%
B B
+12VIN
2 0
RV175
4 0
9.1K OHM
ENPWR_6230
0402
CV30
0.1UF/15V/NI
A A
0 4 0 2
2N7002
RV176
VCC
2 0
RV172
4 0
V_CPU_VCCIO
10K OHM
3
Q86
D
G
1
SOT23
S
G
2
Q12
2N3904
R309
2 0 4 0
10K OHM
VBOOT
3
C
B
1
SOT23
BE
2
12.1K OHM 1%
RV177
040
2
0
2N7002
RV174
12.1K OHM 1%
Q87
RV173
S
V_6230
2 0 4 0
D
SOT23
2
0 4 0 2
V_6230
2 0 4
3
0
G
1
G
4
0
RV4
4 0
75 OHM
2
040
2
040
2
040
2
VR_RDY
040
2
RV12 0 0402 /NI
040
2
VRHOT璶Pull High
0402
VCC_SENSE
RV27 NC
0402
CV13 470PF/50V/NI
RV31 4.7K 1% 0402
040
2
RV34 39K 0402
0402
CV16 33PF/50V
R25: RV34=75K
0402
0402
CV23 470PF/50V/NI
RV48 4.7K 1% 0402
2 0
0402
CV25
4 0
33PF/50V
2
2
0
0
RV54
4
4
0
0
RT2
10K 1% /NI
RV77
1K 1% 0402 /NI
RV83
1K 1%/NI
RV171 10K OHM
H_SKTOCC_N 5
SVCLK
COMP
FB
040
2
040
2
SCOMP
SFB
040
2
SIMON
PSI1 PSI2
RV61
22.6K OHM 1%
0
RV58
4 0
39K 0402
2
F=220K
VCC
2 0
RV70
4 0
1K 1% 0402 /NI
2 0 4 0
T
2 0 4 0
2 0 4 0
0402
CV2
1UF/16V
U14
39
ALERT#
38
SDATA
40
SCLK
34
VROK
35
SVROK
43
VRHOT#
18
COMP
17
FB
16
FBRTN
14
TB
15
VOUT
20
DAC/SS
19
EAP
21
IMON
31
SCOMP
30
SFB
29
SFBRTN
27
SDAC/SS
28
SEAP
32
SIMON
37
PSI1
33
PSI2
22
RT
BOTTOM PAD CONNECT TO GND Through 8 VIAs
RV72 1K 1% 0402 /NI
VCORE_TM
CV39 1UF/16V/NI
VCC
V_6230
0603
23
VCC5
PGND
49
0402
1UF/16V/NI
3 0
RV1
6 0
2.2
48
VCC12
4
BOOT2
3
UG2
2
PHASE2
1
LG2/SIMAX
10
ISEN2
44
BOOT1
45
UG1
46
PHASE1
47
LG1/IMAX
11
ISEN1
6
PWM3
9
ISEN3
7
PWM4
8
ISNE4
12
CSP
13
CSN
24
SPWM
25
SCSP
26
SCSN
41
VBOOT
5
ENPWR
42
TMAX
36
TM
UP6230 VQFN48
close PWM Pin
2 0
RV74
4 0
65K 1% 0402
LGATE2
CV35
2 0
RV79
4 0
1K 0402
3
+12V
3 0 6 0
UGATE2 PHASE2 LGATE2
ISEN2 IPHASE2
CBOOT1
UGATE1 PHASE1 LGATE1
ISEN1
PWM3
ISEN3
PWM4
ISEN4
CSP CSN
PWMS
SCSP SCSN
VBOOT ENPWR_6230 TEMP_IMAX
RV5
2.2
0603
CV3 1UF/16V
060
3
RV19 1
040
2
RV29 10K 1% 0402
060
3
RV25 1
040
2
RV14 10K 1% 0402
040
2
RV35 10K 1% 0402
040
2
RV38 0 OHM/MI
PWMS 25
SCSP 25 SCSN 25
231
SOT23
BOOT_R_PD2CBOOT2
BOOT_R_PD1
IPHASE1
IPHASE3
+12V
3 0 6 0
D13 BAT54C
CV5
CV11
VCORE_TM
2 0
RV65
4 0
12.1K OHM 1% /NI
?????
VCCVCC
2 0
RV75
4 0
20K 1% 0402
LGATE1
CV36
2
0402
0
RV82
4 0
1K 0402
1UF/16V/NI
+12V
231
SOT23
D14 BAT54C
CBOOT1 CBOOT2
0.1UF/50V
0603
0.1UF/50V
0603
VCC
060
3
1 2
D15
SOT23
BAT54C
3
RV45 0
PWM3
RV42
2.2
VCC_PD3
0603
CV27
0.1UF/50V
040
2
RV64 12.1K OHM 1%
BOOT_R_PD3
U17
1
BST
2
IN
3
OD
4
VCC
UP6281 PSOP8
2
1
VIN
CV1
0805
3 0 6 0
SNUB2
0603
0805
3 0 6 0
SNUB1
0603
0805
3 0 6 0
SNUB3
0603
RV59 33K 0402 /NI
CSP
CSN
1UF/16V
RV8
2.2
CV6 4700PF/50V
CV10
1UF/16V
RV28
2.2
CV17 4700PF/50V
CV22
1UF/16V
RV51
2.2
CV28 4700PF/50V
040
2
RV10
ISEN_SHORT /NI
RV32
ISEN_SHORT /NI
RV52
ISEN_SHORT /NI
RV57 10K 0402 /NI RT1 10K 1% 0603 SMD /NI
040
2
RV68 1K 1% 0402
L2
0.5uH/40A/INC0810/D
R50
IPHASE2
Rcsp
L4
0.5uH/40A/INC0810/D
R50
IPHASE1
Rcsp
Rcsp
L6
0.5uH/40A/INC0810/D
R50
Rcsp
IPHASE3
040
2
RV6 1
060
3
UG2
RV7 10K 0402
Q50
1
TBD
3 2
040
2
Q51
1
TBD
3 2
VIN
060
3
060
3
UG1
RV26 10K 0402
UG3
RV49 10K 0402
LG3
RV24 1
0.1UF/50V
0603
CV21
DRVH
SW PGND DRVL
GND
9
RV46 1
8
UGATE3BOOT_PD3
7
PHASE3
6 5
Q52
1
TBD
3 2
040
2
Q53
1
TBD
3 2
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VIN
Q54
1
TBD
3 2
040
2
Q55
1
TBD
3 2
V_6230
Rcsn
PWR12V1
4 3 2 1
GND4 GND3 GND2 GND1
+12VIN
PW2
8
12V4
7
12V3
6
12V2
5
12V1
L12
1 2
ENVELOP
1.2UH
VIN
+
10*20
1500UF/16V
EC27
EC25
+
10*20
1500UF/16V
+
10*20
1500UF/16V
EC26
RV106
ISEN_SHORT /NI
040
2
RV20 28K 1% 0402
RV33
ISEN_SHORT /NI
040
2
RV36 28K 1% 0402
RV53
ISEN_SHORT /NI
040
2
RV55 28K 1% 0402
T
0402
CV29
0.1UF/50V
Ccs
0402
CV31
0.1UF/50V/NI
VCCP
+
8*8
+
8*8
EC10
560UF/4V
EC22
560UF/4V
+
8*8
560UF/4V
+
8*8
560UF/4V
EC11
EC15
1K OHM
GM Confidential
GM Confidential
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev C
C
C Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
GM Confidential
VRM12
VRM12
VRM12
Sugar Bay
Sugar Bay
Sugar Bay
1
1.0
1.0
27 30Monday, June 04, 2012
27 30Monday, June 04, 2012
27 30Monday, June 04, 2012
1.0
of
of
of
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