MSI MS-7103 Schematics
8
MS-7103
7
6
5
4
3
2
1
Version 100
09/13/2004 Update
Cover Sheet
1
D D
* Intel LGA775 Processor
*SIS 648/ 648FX / 661FX + 964 / 964L
*REALTEK RTL8201BL LAN
*Winbond 83687THF I/O
*USB 2 .0 support x8
*ALC 655 AC97 CODEC
Block Diagram
MAIN CLOCK GEN & DDR CLOCK BUFFER
LGA775 INTEL CPU Sockets
SIS 648FX / 661FX
DDR SLOT
DDR TERMINATOR
SIS 964 / 964L
AGP SLOT
PCI SLOTS
C C
LAN CONTROLLER & RJ45 CONNECTOR
ERP BOM Function Description
501/601-7301
501/601-7301
Opt :Std
Opt :A
661FX+964/L,W/LAN, ALC655 Ver:100 PCB:Red
Inte l p i n define
648(C0)+964L,W/LAN, ALC655 Ver:110 PCB:Green
PS2 CONNECTOR
IDE CONNECTOR
USB CONNECTOR
AC'97 CODEC
AUDIO CO NNECTOR & V GA
FAN
2
3
4 - 6
7 - 9
10
11
12 - 15
16
17
18
19
20
21
22
23
24
Title
25
26
27
28
29
30
MS7103
Cover Sheet
Sheet of
Rev
10A
131
1
B B
LPC I/O(W83687THF)
PARALLEL & SERIAL PORT
ACPI CONTROLLER
VRM 10
ATX POWER CON & FRONT PANEL
Decou p ling Capacitor
A A
0923 - update coil2,coil3 p/n.update q28 package.
8
7
6
5
4
3
Micro-Star
Document Number
Last Revision Date:
Friday, October 08, 2004
2
5
4
3
2
1
GPIO Table on SIS964
I/O
GPIO_0
GPIO_1
System Block Diagram
D D
LGA775
Host Bus
VGA
1.5 V ONLY
AGP SLOT
SIS 648FX
SIS 661 FX
C C
HYPERZIP
Support Max to six-PCI Devices
DDR SDRAM
DDR1 DDR2
RTT
ANALOG IN
GPIO_2
GPIO_3 EXTSMI#
GPIO_4
GPIO_5
GPIO_6
GPI_7 RESUME
GPI_8 RING
GPI_9
GPI_10
GPIO_11
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
MAIN
I/O
MAIN
MAIN
I/O
MAIN
I/O
I/O
MAIN
I/O
MAIN
I/O
MAIN
I/O
RESUME
I/O
RESUME
I/O
RESUME
I/O
RESUME
I/O
I/O
RESUME
I/O
RESUME
I/O
RESUME
I/O
RESUME
O
RESUME
O
RESUME
O
I/O
MAIN
I/O
MAIN
I
RESUME
I
RESUME
I
RESUME
I RESUME
Flash Rom protection
Pull-Up
THERM#
Pull-Up
RESERVED
RESERVED
Prescott ratio
RESERVED
RESERVED
Pull-Down
Pull-DownGPIO_12 RESUME
Pull-Up
Pull-Down
KBDAT
KBCLK
MSDAT
MSCLK
SMBCLK
SMBDAT
RESERVED
RESERVED
RESERVED
RESERVED
PCI SLOT 2 PCI SLOT 1
AC'97
AUDIO CODEC
SIS 964
IDE 1
B B
IDE 2
KEYBOARD
/MOUSE
Lan
FAN1 FAN2
PS/2
FAN CONTROL
MII
LPC BUS
H/W MONITOR
USB 0
USB 1
USB 2 USB 3
USB 5
LPC SUPER I/O
LEGACY
ROM
GPIOS IR/CIR
A A
5
4
COM PRINTER FLOPPY
3
ANALOG OUT
PCI Config.
6 CHANNEL
USB 4
USB 6
USB 7
DEVICE
PCI Slot 2
PIRQ#B
PIRQ#C
PIRQ#D
PIRQ#A
PIRQ#C
PIRQ#D
PIRQ#A
PIRQ#B
IDSEL
PCI_REQ#0PCI Slot 1 AD17
PCI_GNT#0
PCI_REQ#1 AD18 PCICLK2
PCI_GNT#1
CLOCKREQ#/GNT#MCP1 INT Pin
PCICLK1
PCI RES E T DEVICE
Signals
SATA_1
SATA_2
PCIRST#1
PCIRST_964
HDDRST#
Northbridge,S/IO
PCI1~2PCIRST#2
AGP
Primary, Scondary IDE
2
Target
Micro-Star
Title
Document Number
Last Revision Date:
Friday, October 08, 2004
MS7103
System B lo ck Diagram
Sheet of
1
Rev
10A
231
5
4
3
2
1
VCC3
D D
VCC3
CB17
0.1U
CB101
0.1U
FS2
475RST
CB94
0.1U
CB4
0.1U
CB92
0.1U
Q30
2N3904S
R243
10K
C159
4.7U/0805
CB95
X_0.1u
VCC3 VCC3
R244
C233
X_10p
VCCM
10K
Q27
2N3904S
C C
VCCP
R214
10K
B B
CB102
0.1U
CB103
0.1U
R196
CB15
0.1U
Main Clock Generator
U13
ICS952019
1
VDDREF
11
VDDZ
13
VDDPCI
19
VDDPCI
28
VDD48
29
VDDAGP
42
VDDCPU
48
VDDSD
5
VSSREF
8
VSSZ
18
VSSPCI
24
VSSPCI
25
VSS48
32
VSSAGP
41
VSSCPU
45
GNDSRC
12
PCICLK5/FS2*
33
PD#/VTT_PWRGD
38
IREF
36
VDDA
CB93
102p
37
VSSA
XIN
6
C263
14M-32pf-HC49S-D
27p
Y2
CPUCLK0
CPUCLK#0
CPUCLK1
CPUCLK#1
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
PCICLK6/FS3**
PCICLK7/FS4
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK8
REF0/FS0
REF1/FS1
RESET#
12/48M
24_48M/MULTISEL
SCLK
SDATA
SRCCLKT
SRCCLKC
XOUT
7
C248
27p
0
0
0133
0
1
R206
R207
R204
R205
40
39
44
43
31
30
9
10
FS3
14
FS4
15
16
17
20
21
22
23
FS0
2
FS1
3
4
27
26
35
34
47
46
R209
R252
R253
RN48 8P4R-33
RN47 8P4R-33
SEL12_48
MULTISEL
R211
R212
R202
R203
V_FSB_VTT4,5,7,27
H_FSBSEL04,5
H_FSBSEL14,5
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
FS0
FS2
FS1FS4
0100
1
0
0
0000
CPUCLK1
33
CPUCLK-1
33
CPUCLK0
33
CPUCLK-0
33
AGPCLK0
33
AGPCLK1
33
ZCLK0
22
ZCLK1
22
96XPCLK
SIOPCLK
PCICLK1
PCICLK2
REFCLK1
DCLK
REFCLK2
OSC12
22
SIO48M
22
SMBCLK
SMBDAT
SATACLK
33
SATACLK-
33
V_FSB_VTT
R251
4.7K
Q36
N-MMBT3904_SOT23
Q39
N-MMBT3904_SOT23
CPU
100
12MHz
48MHz
R262
4.7K
SRC
ZCLK
133
133
100
133 66 33100200
CPUCLK1 7
CPUCLK-1 7
CPUCLK0 4
CPUCLK-0 4
AGPCLK0 7
AGPCLK1 16
ZCLK0 9
ZCLK1 12
96XPCLK 12
SIOPCLK 25
PCICLK1 17
PCICLK2 17
REFCLK1 13
DCLK 9
REFCLK2 22
FP_RST# 4,27,29
OSC12 14
SIO48M 25
SMBCLK 10,13,17,27
SMBDAT 10,13,17,27
SATACLK 14
SATACLK- 14
VCC3
R260
2.7K
PCIFS3
AGP
660
330
66
33
MULT IS EL i nt ern al P ul l-Up 120K
MULTISEL
0=48MHZ,1=24MHZ
SEL12_48
0=48MHZ,1=12MHZ
R261
2.7K
F0~F4 int ern al Pul l -Do wn 120K
R254
R258
VCC3
CB5
0.1u
R213 4.7K
R210 4.7K
FS2
10K
FS3
10K
EMI
VCC3
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
SATACLK
SATACLK-
AGPCLK0
AGPCLK1
PCICLK2
PCICLK1
SIOPCLK
96XPCLK
REFCLK2
DCLK
REFCLK1
SIO48M
OSC12
R192
R193
R194
R195
R190
R191
CN10 X_8P4C_10p
CN11 8P4C_10p
C379 X_10p
C380 X_10pR208
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
C226 X_10p
C225 X_10p
49.9RST
49.9RST
49.9RST
49.9RST
49.9RST
49.9RST
U5
CBVDD
VCCM
A A
VCC3
option mounted
for RTM680-627
5
CB16
0.1U
FWDSDCLKO8
R34 X_4.7K
SMBCLK
SMBDAT
FWDSDCLKO
D2#/D6_SEL
12
23
10
22
20
18
21
4
3
7
8
9
ICS93732
VDD
VDD
VDD
AVDD
SCLK
SDATA
CLK_IN
FB_IN
NC
NC
NC
GND11GND15GND
GND
6
28
Clock Buffer (DDR)
DDRCLK0
2
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK#0
CLK#1
CLK#2
CLK#3
CLK#4
CLK#5
FB_OUT
DDRCLK3
4
DDRCLK2
13
DDRCLK1
17
DDRCLK8
24
DDRCLK7
26
DDRCLK-0
1
DDRCLK-3
5
DDRCLK-2
14
DDRCLK-1
16
DDRCLK-8
25
DDRCLK-7
27
R35
19
DDRCLK0 10
DDRCLK3 10
DDRCLK2 10
DDRCLK1 10
DDRCLK8 10
DDRCLK7 10
DDRCLK-0 10
DDRCLK-3 10
DDRCLK-2 10
DDRCLK-1 10
DDRCLK-8 10
DDRCLK-7 10
10
FB_OUT
C28
10p
3
VCC3
CB21
X_0.1u
FOR EMI
0.1u
CB22
Micro-Star
Document Number
Last Revision Date:
2
Friday, October 08, 2004
Title
MS7103
MAIN CL O CK GEN & BUFFER
Sheet of
1
Rev
10A
331
8
7
6
5
4
3
2
1
RN14
VTT_OUT_RIGHT
D D
C C
B B
A A
VTT_OUT_RIGHT
H_FSBSEL03,5
H_FSBSEL13,5
H_FSBSEL25
HD#[0..63]7
HDBI#[0..3]7
R58 X_1KR
R77
X49.9RST
EDRDY#
R74
X_49.9RST
IERR#5
FERR#5,13
STPCLK#13
HINIT#13
HDBSY#7
HDRDY#7
HTRDY#7
HADS#7
HLOCK#7
HBNR#7
HIT#7
HITM#7
HBPRI#7
HDEFER#7
CPU_TMPA25
VTIN_GND25
THERMTRIP#5,13
PROCHOT#5,13
IGNNE#13
SMI#13
A20M#13
CPUSLP#13
C31 X_C0.1U25Y
H_PWRGD
CPURST#5,7
HD#[0..63]
HDBI#0
HDBI#1
HDBI#2
HDBI#3
EDRDY#
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
CPU_BOOT
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
HA#[3..31]7
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
U6A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
HD#53
HA#[3..31]
D53#
D52#
C14
HD#52
HD#51
CPU SIGNAL BLOCK
HA#27
HA#26
HA#25
HA#31
AJ6
AJ5
AH5
AH4
AG5
A35#
A34#
A33#
A32#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
A14
E22
C15
D17
D20
D22
G22
G21
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#30
HA#29
HA#28
AG4
AG6
AF4
AF5
AB4
AC5
AB5
AA5
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
F21
F20
F18
F17
E21
E19
E18
G17
HD#36
HD#41
HD#39
HD#38
HD#37
HD#43
HD#42
HD#40
HA#16
HA#13
HA#12
HA#14
HA#15
AD6
AA4
AB6
A23#
A22#
A21#
A20#Y4A19#Y6A18#W6A17#
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
F15
F14
E16
E15
G18
HD#35
HD#34
HD#33
E13
G16
HD#32
D13
G15
G14
G13
HD#28
HD#30
HD#29
HD#31
HD#27
HD#26
HD#25
HA#11
HA#10
U6
D25#
D24#
F12
F11
HD#24
HD#23
HA#9
HA#8
HA#7
HA#6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
E10
D10
HD#19
HD#22
HD#21
HD#20
HA#5
HA#3
HA#4
L5
AC2
DBR#
D14#
D11
C12
HD#15
HD#14
HD#18
HD#17
HD#16
R50 X1KR
VID4
VID5
AN6
AN5
AN3
AN4
RSVD
RSVD
VSS_SENSE
VCC_SENSE
D13#
D12#D8D11#
D10#
D9#
B12
B10
A11
C11
HD#13
HD#12
HD#11
HD#10
HD#9
AJ3
AK3
ITP_CLK1
ITP_CLK0
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
A10
HD#7
HD#6
HD#5
HD#8
HD#4
AM5
HD#3
AL4
RSVD
HD#2
AK4
VID5#
VID4#
HD#1
VID0
VID1
VID3
VID2
AL6
AM3
AL5
AM2
VID3#
VID2#
VID1#
VID0#
GTLREF
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
RSVD
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
B4
ZIF-SOCK775-15u
HD#0
FP_RST# 3,27,29
VID[0..5] 28
CPU_GTLREF
H1
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2
PCREQ#
G5
HREQ#4
J6
HREQ#3
K6
HREQ#2
M6
HREQ#1
J5
HREQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
H_TESTHI2_7
F25
H_TESTHI1
W3
H_TESTHI0
F26
RSVD_AK6
AK6
RSVD_G6
G6
G28
F28
HRS#2
A3
HRS#1
F5
HRS#0
B3
T1
U3
T2
U2
BREQ#0
F3
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
T5
T8
T6
T7
HADSTB#1
HADSTB#0
HDSTB3
HDSTB2
HDSTB1
HDSTB0
HDSTB#3
HDSTB#2
HDSTB#1
HDSTB#0
NMI
INTR
H_TESTHI9
H_TESTHI10
H_TESTHI11
H_TESTHI12
HREQ#4 7
HREQ#3 7
HREQ#2 7
HREQ#1 7
HREQ#0 7
R71 62R
R87 62R
R54 62R
R85 62R
R45 X_62R
R70 X_62R
CPUCLK-0 3
CPUCLK0 3
HRS#2 7
HRS#1 7
HRS#0 7
BREQ#0 5,7
R60 100R1%
R72 100R1%
R59 60.4R1%
R80 60.4R1%
PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE
HADSTB#1 7
HADSTB#0 7
HDSTB3 7
HDSTB2 7
HDSTB1 7
HDSTB0 7
HDSTB#3 7
HDSTB#2 7
HDSTB#1 7
HDSTB#0 7
NMI 13
INTR 13
8P4R-62R
1 2
3 4
5 6
7 8
R55 X_49.9RST
CPU_GTLREF 5
VTT_OUT_RIGHTPCREQ#
VTT_OUT_LEFT
C40
X_C0.1U25Y
VTT_OUT_LEFT
V_FSB_VTT 3 ,5,7,27
VTT_OUT_RIGHT 5
VTT_OUT_LEFT 5
GPIO713
PWRGD_CPU7
VTT_OUT_RIGHT
C35 0.1U
C38 0.1U
PWRGD_CPU H_PWRGD
CPU STRAPPING RESISTORS
STPCLK#
HINIT#
SMI#
CPUSLP#
A20M#
INTR
NMI
IGNNE#
PLACE BPM TERMINATION NEAR CPU
Micro-Star
Document Number
Last Revision Date:
8
7
6
5
4
3
Friday, October 08, 2004
2
VCC3
R56
470
R57
1K
Q6 2N3904S
R53 X_0
CLOS ED T O SOCKET478
R65 49.9RST
R62 49.9RST
R61 49.9RST
R67 49.9RST
RN16
7 8
5 6
3 4
1 2
8P4R-56
CPU ITP BLOCK
CLOS ED T O SOCKET478
RN2
X_8P4R-680R
VID3
1
VID1
VID4
VID2
VID0
VID5
RN5 8P4R-51R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN7 8P4R-51R
R52 X49.9R1%
R49 X49.9R1%
R47 49.9RST
2
3
4
5
6
7
8
R42 X_680R
R40 X_680R
Title
mPGA478 CPU-1
Plase near CPU
For 661FX
VTT_OUT_RIGHT
For 964
VTT_OUT_RIGHT
H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
H_TDI
H_BPM#2
H_BPM#4
H_TDO
H_TMS
H_TCK
H_TRST#
MS7103
Sheet of
H_PWRGD 5
Rev
10A
431
1
8
VCCP
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
U6B
VCCP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
VCCP
D D
C C
7
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
VCC
VCC
VCC
VCC
VCC
VCC
U26
U27
U28
U29
U30
W23
W24
W25
W26
W27
W28
W29
VCC
VCC
AH28
AH29
AH30
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
VCC
T26
T27
T28
T29
T30
U23
U24
U25
VCC
VCC
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
6
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN8VCCP8VCCR8VCC
T23
N30
N23
N24
N25
N26
N27
N28
N29
M24
M25
M26
M27
M28
M29
M30
5
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
J22
J23
J24
J25
J26
J27
J28
J29
J30
K23
K24
K25
K26
K27
K28
K29
K30
M23
4
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
RSVD
VCC-IOPLL
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTTPWRGD
VTT_OUT
VTT_OUT
VTT_SEL
RSVD/VTT_PKGSENSE
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
AN9
AN8
HS11HS22HS33HS4
4
AN25
AN26
AN29
AN30
H_VCCA
A23
H_VSSA
B23
D23
H_VCCA
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
ZIF-SOCK775-15u
3
VTT_SEL
R92 X_1KR
V_FSB_VTT
0
1
VCC3
TEJ/PSC
RSVD
2
V_FSB_VTT
C81
X_C10U10Y0805
1
C69 C1U16Y0805
C84 C10U10Y0805
CAPS FOR FSB GENERIC
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
100 OHMS OVER 210 OHMS RESISTORS
VTT_OUT_LEFT CPU_GTLREF
B B
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
R68 49.9RST
R64
100R1%
C50
0.1U
C57
C220P50N
CPU_GTLREF 4
V_FSB_VTT
PLACE AT CPU END OF ROUTE
FERR#
THERMTRIP#
IERR#
CPURST#
7
PROCHOT#
H_PWRGD
BREQ#0
PROCHOT# 4,13
H_PWRGD 4
BREQ#0 4,7
FERR# 4,13
THERMTRIP# 4,13
IERR# 4
CPURST# 4,7
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
6
5
RN27
1
3
5
7
8P4R-470R
2
4
6
8
VTT_OUT_RIGHT4
VTT_OUT_LEFT4
VTT_OUT_RIGHT
VTT_OUT_LEFT
R44 120R
R63 100R
R78 62R
PLACE AT ICH END OF ROUTE
A A
V_FSB_VTT3,4,7,27
V_FSB_VTT
8
RN8
1 2
3 4
5 6
7 8
8P4R-62R
R83 62R
L4 X_10U100m_0805
CP4
X_COPPER
VID_GD27,28
H_FSBSEL1
H_FSBSEL2
H_FSBSEL0
4
5VSB
H_FSBSEL1 3,4
H_FSBSEL2 4
H_FSBSEL0 3,4
VTT_OUT_LEFT
R37
1KR
H_VSSA
C68
C10U10Y1206
R38
680R
R39
1KR
Q4
N-MMBT3904_SOT23
3
C70
X_C1U10Y
H_VCCA
1.25 V V T T _ P WRGOOD
VTT_PWG
Micro-Star
Document Number
Last Revision Date:
Friday, October 08, 2004
2
Title
MS7103
mPGA478 CPU-2
Sheet of
531
1
Rev
10A
5
4
3
2
GTLREF_SEL 7
1
D D
T9
T11
T12
T10
AC4
AE3
AE4
D14
E23
E24
F23
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
VSS
AF20
AF23
AF24
AF25
VSS
RSVDF6RSVD
VSS
AF26
B13
AF27
U6C
RSVD
RSVD
RSVD
RSVDD1RSVD
RSVD
AE5
VSS
AE7
VSS
RSVD
VSS
VSS
VSS
VSS
AF10
AF13
AF16
AF17
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
AA23
VSS
AA24
VSS
AA25
VSS
AA26
VSS
AA27
VSS
AA28
VSS
C C
B B
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE29
AE30
VSS
T3
T4
V30
V29
V28
V27
V26
V25
V24
VSS
VSS
VSS
VSS
V23
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
J2
T2
H2
P5
Y3
RSVD
COMP4
RSVDJ3RSVDN4RSVD
RSVDV1RSVDW1RSVD
COMP5
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSSV3VSS
R30
R29
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
P23
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
L30
L29
VSSL3VSS
L28
VSS
L27
VSS
L26
VSS
L25
VSS
L24
VSS
L23
VSS
K5
VSSK7VSS
K2
H29
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
H23
H24
H25
H26
H27
H28
VSS
VSS
VSS
VSS
VSS
GTLREF_SEL
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VID7#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AF3
AF6
AF7
AF28
AF29
AF30
AG10
AG13
AG16
AH1
AG7
AH10
AG17
AG20
AH13
AG23
AG24
AH3
AH6
AH7
AJ10
AJ13
AJ16
AJ17
AJ20
AJ23
AH16
AH17
AH20
AH23
AH24
AJ24
AJ7
AJ27
AJ28
AJ29
AJ30
AK2
AK10
AK13
AK16
AK17
AK20
AK23
AK5
AK7
AL10
AL13
AL16
AK24
AK27
AK28
AK29
AK30
AL17
AL20
AL23
AL24
AL27
AL28
AL3
AL7
AM1
AM10
AM13
AM16
AM17
AM20
AM23
AN1
AM4
AM7
AM24
AM27
AM28
AN2
AN10
AN13
AN16
AN17
AN20
AN23
AN24
AN27
AN28
H22
VSS
VSS
AN7
VSS
VID_SELECT
H21
VSS
VSSB1VSS
H20
B11
H17
H18
H19
VSS
VSS
VSS
VSS
VSS
ZIF-SOCK775-15u
B14
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
A A
Micro-Star
Docume nt Number
Last Revision Date:
5
4
3
2
Friday, October 08, 2004
Title
MS7103
mPGA478 CPU-2
Sheet of
1
Rev
10A
631
5
4
3
2
1
AGPST[0..2]16
NB_VREF
C4XAVSS
C4XAVDD
C1XAVSS
C1XAVDD
D D
CPUCLK13
CPUCLK-13
HLOCK#4
HDEFER#4
HTRDY#4
CPURST#4,5
PWRGD_CPU4
HBPRI#4
BREQ#04,5
HADS#4
HDRDY#4
HDBSY#4
HBNR#4
HREQ#44
HREQ#34
HREQ#24
HREQ#14
C C
HA#[3..31]4
B B
A A
HREQ#04
HADSTB#14
HADSTB#04
CPUCLK1
CPUCLK-1
HLOCK#
HDEFER#
HTRDY#
CPURST#
HBPRI#
BREQ#0
HRS#2
HRS#24
HRS#1
HRS#14
HRS#0
HRS#04
HADS#
HITM#
HITM#4
HIT#
HIT#4
HDRDY#
HDBSY#
HBNR#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
HADSTB#1
HADSTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
HD#[0..63]4
5
AJ31
AJ33
W34
W35
W31
W33
AG31
AA33
AH33
AG33
AJ35
AF32
AJ34
AH32
AG35
AE31
AH35
AF35
AE35
AE33
AE34
AF33
AG34
AC33
AD32
AD33
AC35
AD35
AC31
AC34
AB35
AB32
AB33
AA35
AA31
AA34
T33
T35
V32
B23
F22
R34
U31
R33
T32
U35
V35
R35
U34
U33
V33
Y33
Y35
Y32
U7A
CPUCLK
CPUCLK#
HLOCK#
DEFER#
HTRDY#
CPURST#
CPUPWRGD
BPRI#
BREQ0#
RS#2
RS#1
RS#0
ADS#
HITM#
HIT#
DRDY#
DBSY#
BNR#
HREQ4#
HREQ3#
HREQ2#
HREQ1#
HREQ0#
HASTB1#
HASTB0#
HA31#
HA30#
HA29#
HA28#
HA27#
HA26#
HA25#
HA24#
HA23#
HA22#
HA21#
HA20#
HA19#
HA18#
HA17#
HA16#
HA15#
HA14#
HA13#
HA12#
HA11#
HA10#
HA9#
HA8#
HA7#
HA6#
HA5#
HA4#
HA3#
661FX
AL36
AJ36
AK34
AK35
AA26
W26
HVREF0
C1XAVDD
C4XAVSS
C4XAVDD
HVREF1
C1XAVSS
HOST
HD63#
HD62#
HD61#
HD60#
HD59#
HD58#
HD57#
HD56#
HD55#
HD54#
HD53#
F24
E23
B24
B25
C24
HD#62
HD#63
B26
D23
D25
C26
D27
D26
HD#53
HD#54
HD#60
HD#57
HD#61
HD#55
HD#59
HD#56
HD#58
GTLREF_SEL6
For Support LGA 775 Extreme Edition Processor.
HNCVREF
HPCOMP
HNCOMP
AGPST0
AGPST2
AGPST1
D22
B5
B22
U26
R26
L20
C22
HVREF2
HVREF3
ST0B6ST1F7ST2
HVREF4
HCOMP_P
HCOMP_N
HCOMPVREF_N
GAD6
GAD5
GAD7
GAD3
GAD4
GAD9
GAD8
GAD2
GAD1
GAD0
AAD0Y5AAD1W4AAD2V2AAD3W6AAD4V4AAD5U2AAD6V5AAD7U4AAD8R2AAD9
GAD14
GAD11
GAD10
T4
GAD17
GAD15
AAD10R3AAD11T5AAD12P2AAD13R4AAD14N2AAD15R6AAD16L3AAD17L4AAD18K2AAD19L6AAD20J2AAD21J3AAD22K4AAD23J4AAD24J6AAD25H4AAD26G3AAD27H5AAD28F2AAD29G4AAD30E2AAD31
GAD24
GAD23
GAD19
GAD18
GAD26
GAD25
GAD27
GAD21
GAD20
GAD22
GAD16
GAD13
GAD12
GAD29
GAD30
GAD28
AGP
SIS648-1
HD52#
HD51#
HD50#
HD49#
HD48#
HD47#
HD46#
HD45#
HD44#
HD43#
HD42#
HD41#
HD40#
HD39#
HD38#
HD37#
HD36#
HD35#
HD34#
HD33#
HD32#
HD31#
HD30#
HD29#
HD28#
HD27#
HD26#
HD25#
HD24#
HD23#
HD22#
HD21#
HD20#
HD19#
HD18#
HD17#
HD16#
HD15#
HD14#
HD13#
HD12#
HD11#
J34
J33
J31
J35
F28
E27
B27
B28
E29
B29
B30
B31
B33
B35
D28
C28
C30
HD#49
HD#45
HD#42
HD#44
HD#47
HD#50
HD#51
HD#52
HD#43
HD#46
HD#48
VCCP
4
C32
D29
HD#41
HD#40
R88
X_180R1%
181R
Q12
X_2N7002S
B34
C33
D32
HD#39
HD#36
HD#35
HD#38
HD#37
F33
F32
E31
HD#34
E33
D31
D33
D35
C35
G31
HD#28
HD#27
HD#30
HD#32
HD#33
HD#29
HD#31
R112
100R1%
R111
210RST
F35
E35
D34
H35
G34
HD#23
HD#22
HD#24
HD#21
C99
X_103P
C105
0.1U
HD#18
HD#19
HD#20
HD#26
HD#25
V_FSB_VTT 3,4,5,27
H33
G35
HD#16
HD#17
C103
X_103P
K32
HD#13
HD#14
HD#15
NB_VREF
L31
K33
N33
HD#12
HD#11
GAD[0..31] 16 SBA[0..7] 16
SBA6
SBA4
SBA5
SBA3
SBA7
SBA7E3SBA6F4SBA5D2SBA4F5SBA3E4SBA2B2SBA1E6SBA0
HD10#
HD9#
HD8#
HD7#
HD6#
HD5#
L35
K35
P32
P33
M35
M33
HD#6
HD#8
HD#9
HD#5
HD#4
HD#7
VCCP
3
HD4#
SBA2
L34
HD#3
SBA1
HD3#
N34
HD#2
R102
150RST
R103
75RST
HD2#
SBA0
B3
N35
HD#1
HD1#
P35
HD#0
AC/BE3#
AC/BE2#
AC/BE1#
AC/BE0#
AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
APAR
WBF#
AGP8XDET#
ADBIH/PIPE#
ADBIL
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
AGPCLK
AGPCOMP_P
AGPCOMP_N
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
AGPVSSREF
HDSTBN3#
HDSTBN2#
HDSTBN1#
HDSTBN0#
HDSTBP3#
HDSTBP2#
HDSTBP1#
HDSTBP0#
HD0#
DBI3#
DBI2#
F26
B32
E34
HDBI#3
HDBI#1
HDBI#2
C97
X_103P
HNCVREF
C98
103P
RBF#
DBI1#
HDBI#0
DBI0#
R31
K5
M5
P4
U6
C6
E8
N6
M4
N4
L2
P5
M2
N3
D7
B4
C7
C4
D6
C2
D3
T2
U3
G2
H2
D8
R147 44.2RST
W2
R148 49.9RST
Y2
B8
C8
A7
B7
W3
Y4
HDSTB#3
D24
HDSTB#2
F30
HDSTB#1
G33
HDSTB#0
N31
HDSTB3
E25
HDSTB2
D30
HDSTB1
H32
HDSTB0
M32
HDBI#[0..3] 4
GC/BE#3
GC/BE#2
GC/BE#1
GC/BE#0
GREQ#
GGNT#
GFRAME#
GIRDY#
GTRDY#
GDEVSEL#
GSERR#
GSTOP#
GPAR
RBF#
WBF#
8X_DET
DBIH
DBIL
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
GREQ# 16
GGNT# 16
GFRAME# 16
GIRDY# 16
GTRDY# 16
GDEVSEL# 16
GSERR# 16
GSTOP# 16
GPAR 16
RBF# 16
WBF# 16
8X_DET 16
DBIH 16
DBIL 16
SBSTB
SBSTB#
ADSTB0
ADSTB#0
ADSTB1
ADSTB#1
AGPCLK0 3
VREF4X_IN 16
HDSTB#3 4
HDSTB#2 4
HDSTB#1 4
HDSTB#0 4
HDSTB3 4
HDSTB2 4
HDSTB1 4
HDSTB0 4
VCCP
GAD31
G6
L33
HD#10
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
GC/B E#[0..3] 16
SBSTB 16
SBSTB# 16
ADSTB0 16
ADSTB#0 16
ADSTB1 16
ADSTB#1 16
VDDQ
AGP3.0 = 50 ohm
R99 R109
648
20 1% 110 1%
648FX
14 1% 100 1%
R99 15RST
R109 100RST
2
HNCOMP
HPCOMP
Rds-on(n) = 10 ohm
HNCVERF = 1/3 VCCP
Rds-on(p) = 56 ohm
HPCVERF = 2/3 VCCP
VCC3
CP16
X_COPPER
C1XAVDD
CB51
0.1U
C1XAVSS
CP17
X_COPPER
VCC3 VCC3
CP15
X_COPPER
C4XAVDD A4XAVDD
CB50
0.1U
C4XAVSS
CP14
X_COPPER
Closed to SIS648(U8)
Micro-Star
Title
Document Number
Last Revision Date:
Friday, October 08, 2004
SIS648FX-Host & AGP
VCC3
MS7103
1
CP23
X_COPPER
A1XAVDDPWRGD_CPU
CB77
0.1U
A1XAVSS
CP22
X_COPPER
CP24
X_COPPER
CB79
0.1U
A4XAVSS
CP26
X_COPPER
Sheet of
731
Rev
10A
5
RMD0
RMD1
RMD2
RMD3
RMD4
RMD5
D D
C C
Add for EMI
2004.0726
VCCM
CB60
CB36
X_0.1u
CB44
X_0.1u
IVDD
1.0 Revise
RN68
8P4R-2.7K
B B
X_0.1u
CB28
X_0.1u
CB85
CB73
X_0.1u
X_0.1u
12
34
56
78
RMD6
RMD7
RDQM0
RDQS0
RMD8
RMD9
RMD10
RMD11
RMD12
RMD13
RMD14
RMD15
RDQM1
RDQS1
RMD16
RMD17
RMD18
RMD19
RMD20
RMD21
RMD22
RMD23
RDQM2
RDQS2
RMD24
RMD25
RMD26
RMD27
RMD28
RMD29
RMD30
RMD31
RDQM3
RDQS3
RMD32
RMD33
RMD34
RMD35
RMD36
RMD37
RMD38
RMD39
RDQM4
RDQS4
RMD40
RMD41
RMD42
RMD43
RMD44
RMD45
RMD46
RMD47
RDQM5
RDQS5
RMD48
RMD49
RMD50
RMD51
RMD52
RMD53
RMD54
RMD55
RDQM6
RDQS6
RMD56
RMD57
RMD58
RMD59
RMD60
RMD61
RMD62
RMD63
RDQM7
RDQS7
648NC 648NC648NC
AN35
AP36
AK33
AM33
AN34
AK32
AR34
AN33
AR35
AP34
AM32
AL31
AR31
AL30
AN32
AR33
AN31
AM31
AR32
AP32
AP30
AR30
AM29
AL27
AN30
AN29
AL28
AN28
AL29
AR29
AP26
AN25
AR24
AL24
AL25
AR26
AM25
AN24
AP24
AR25
AN21
AP20
AN20
AL18
AM21
AR21
AL19
AM19
AL20
AR20
AL15
AL14
AN15
AR15
AN16
AM15
AN14
AL13
AP16
AR16
AM13
AL12
AL11
AR12
AP14
AR14
AN13
AP12
AN12
AR13
AL10
AR11
AM9
AR9
AM11
AN11
AP10
AN9
AN10
AR10
4
VDDQ
AA1
AA2
AA3
AA4
U7B
MD0
VDDQ
VDDQ
VDDQ
VDDQ
SIS648-2
Memory
VSS
VSS
VSS
VSS
A22
A24
A26
A28
F11
E16
E11
C16
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0/CSB0#
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1/CSB1#
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2/CSB2#
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3/CSB3#
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4/CSB4#
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5/CSB5#
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB6#
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB7#
NC
NC
NC
NC
AA5
A30
AA6
VDDQ
VDDQ
VSS
VSS
A32
AB1
VDDQ
VSS
A34
AB2
VDDQ
VSS
C23
AB3
C25
AB4
VDDQ
VSS
C27
AB5
VDDQ
VSS
C29
AB6
VDDQ
VSS
C31
AC1
VDDQ
VSS
C34
AC2
VDDQ
VSS
C36
AC3
VDDQ
VSS
E22
AC4
VDDQ
VSS
E24
AC5
AC6
L11
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
SRAS#
SCAS#
SWE#
S3AUXSW#
FWDSDCLKO
SDRCLKI
DLLAVDD
DLLAVSS
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
DRAM_SEL
DDRCOMP_P
DDRCOMP_N
VSS
VSS
VSS
VSS
E26
E28
E30
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
CS0#
CS1#
CS2#
CS3#
CS4#
CS5#
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
NC
NC
NC
NC
NC
NC
NC
NC
L12
L13
M11
M12
M13
M14
M15
M16
N11
N12
P12
R12
T12
U12
V12
AR23
AN23
AN22
AM23
AL23
AL26
AN26
AN27
AR27
AR28
AP22
AN18
AR22
AP28
AM27
AL33
AL17
AR19
AN19
AM17
AL16
AN17
AR17
AP18
AR18
AP4
AT3
AR3
AP3
AR2
AN4
AP2
AL21
AL22
AL35
AL34
AM35
AN36
AF16
AF23
AP1
AR8
AP8
D4
D5
AM5
AM34
B16
F15
F13
D16
661FX
R134 22
R117 33
3
RMA0
RMA1
RMA2
RMA3
RMA4
RMA5
RMA6
RMA7
RMA8
RMA9
RMA10
RMA11
RMA12
RMA13
RMA14
RMA15
RSRAS#
RSCAS#
RSWE#
RCS-0
RCS-1
RCS-2
RCS-3
CKE0
CKE1
CKE2
CKE3
10p
C114
DLLAVDD
DLLAVSS
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
R135 X_4.7K
R123 40.2RST
R127 40.2RST
RSRAS# 10,11
RSCAS# 10,11
RSWE# 10,11
S3AUXSW#
FWDSDCLKO
VCCM
S3AUXSW# 27
FWDSDCLKO 3
RMD[0..63]
RDQM[0..7]
RDQS[0..7]
RMA[0..15]
RCS-[0..3]
CKE[0..3]
RMD[0..63] 10,11
RDQM[0..7] 10,11
RDQS[0 ..7] 10,11
RMA[0..15] 10,11
RCS-[0 ..3] 10,11
CKE[0..3] 10
2
Add for EMI
2004.0726
VCCM VCC5
VCC3 VCC3
C82
0.1U
150RST_8P4R
RN38
5 6
150RST_8P4R
78
RN38
CB8 X_0.1u
CB39 X_0.1u
CB23 X_0.1u
CB80 X_0.1u
CB75 X_0.1u
CB81 X_0.1u
CP8
X_COPPER
DLLAVDD
CB47
X_103P
DLLAVSS
CP9
X_COPPER
C134
103P
C132
X_103P
150RST_8P4R
RN38
DDRVREFA DDRVREFB
150RST_8P4R
RN38
1
VCC3VCCM
IVDDVCCM
CP12
X_COPPER
DDRAVDD
CB52
C86
0.1U
X_103P
DDRAVSS
CP13
X_COPPER
VCCMVCCM
C131
X_103P
3 4
12
C129
103P
Place these capacitors under SIS648 solder side
VCC1_8
A A
VCCM
C149
X_0.1u
C59
X_0.1u
C150
0.1U
C63
X_0.1u
C151
0.1U
C109
X_0.1u
5
C166
X_0.1u
C80
X_1u
VCCP
C138
X_1u
C87
X_4.7U/0805
C111
X_0.1u
C94
X_10u/0805
C128
4.7U/0805
C107
0.1U
VDDQ
C89
10U/1206
C207
X_0.1u
4
C210
0.1U
C158
0.1U
C148
1U-0805
VCCP
VCCM VCC1_8
C357
C358
X_0.1u
X_0.1u
C359
X_0.1u
3
C361
X_0.1u
C366
X_0.1u
C369
X_0.1u
VDDQ
X_1u
C373
X_0.1u
C362
X_1u
C372
X_0.1u
C365
2
Micro-Star
Title
Document Number
Last Revision Date:
Friday, October 08, 2004
MS7103
SIS648FX-Memory
Sheet of
1
Rev
10A
831
5
VCCP
A17
A18
A19
A20
A21
B17
B18
B19
B20
B21
C17
C18
C19
C20
C21
D17
D18
D19
D20
D21
E17
E18
E19
E20
E21
F17
F18
F19
F20
F21
VCCM
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
AL7
VDDM
AL8
VDDM
AL9
VDDM
AM6
VDDM
AM7
VDDM
D D
C C
B B
A A
AM8
AN5
AN6
AN7
AN8
AP5
AP6
AP7
AR4
AR5
AR6
AR7
AT4
AT5
AT6
AT7
AB24
AC13
AD14
AD16
AD18
AD20
AD22
AB25
AC25
AD12
AD25
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AE26
AF11
AF12
AF25
AF26
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
V14
V15
V16
V17
V18
V19
V20
V21
V22
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
T18
VSS
T19
VSS
T20
VSS
T21
VSS
T22
VSS
T23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Y14
Y15
AL32
AT24
AT26
AT28
AT30
AT32
AT34
5
SIS648-3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
AA14
VTT
Power
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA15
AA16
AA17
AA18
AA19
AA20
L25
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V23
W14
W15
W16
W17
AA21
AA22
4
VTT
VSS
U7D
V25
W25
Y25
AA25
VTT
VTT
VTT
VTT
AD3
VDDZ
AE1
VDDZ
AF3
VDDZ
AG1
VDDZ
AH3
VDDZ
AJ1
VDDZ
AK3
VDDZ
AM3
VDDZ
W11
VDDZ
W12
VDDZ
Y11
VDDZ
Y12
VDDZ
AA12
VDDZ
A9
VDD3.3
L17
VDD3.3
M17
VDD3.3
N17
VDD3.3
AB12
AUX1.8
AC12
AUX3.3
AA23
VSS
AB14
VSS
AB15
VSS
AB16
VSS
AB17
VSS
AB18
VSS
AB19
VSS
AB20
VSS
AB21
VSS
AB22
VSS
AB23
VSS
AC14
VSS
AC15
VSS
AC16
VSS
AC17
VSS
AC18
VSS
AC19
VSS
AC20
VSS
AC21
VSS
AC22
VSS
AC23
VSS
E32
VSS
E36
VSS
F34
VSS
G32
VSS
G36
VSS
H34
VSS
J32
VSS
J36
VSS
K34
VSS
L32
VSS
L36
VSS
M34
VSS
N32
VSS
N36
VSS
P34
VSS
R32
VSS
R36
VSS
T34
VSS
U32
VSS
U36
VSS
V34
VSS
W32
VSS
W36
VSS
Y34
VSS
AA32
VSS
AA36
VSS
AB34
VSS
AM10
VSS
AM12
VSS
AM14
VSS
AM16
VSS
AM18
VSS
AM20
VSS
AM22
VSS
AM24
VSS
AM26
VSS
AM28
VSS
AM30
VSS
AP9
VSS
AP11
VSS
AP13
VSS
AP15
VSS
AP17
VSS
AP19
VSS
AP21
VSS
AP23
VSS
AP25
VSS
AP27
VSS
AP29
VSS
AP31
VSS
AP33
VSS
AP35
VSS
AT8
VSS
AT10
VSS
AT12
VSS
AT14
VSS
AT16
VSS
AT18
VSS
AT20
VSS
AT22
VSS
VSS
661FX
AJ32
VCC1_8
VCC3
SB1.8V
VCC3SBY
ZAD[16..0]12
IVDD
1.0 Revise
C237
C161
0.1U
VCC3
C136
X_1u-0805
SB1.8V
VCC3SBY
C163
0.1U
Closed to SIS648
VCC3 SB1.8VVCC3SBY
Place under 648 solder side
L26
M18
M19
M20
M21
M22
M23
M24
M25
M26
N25
P25
R25
T25
U25
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
W18
W19
W20
W21
W22
W23
AF34
AE32
AE36
AC32
AC36
AD34
AH34
AG32
AG36
4
X_0.1u
C168
0.1U
C363
X_0.1u
C119
0.1U
C164
X_1u
C147
X_0.1u
C370
X_0.1u
3
C133
0.1U
3
C235
ZCLK03
ZUREQ12
ZDREQ12
ZSTB012
ZSTB-012
ZSTB112
ZSTB-112
X_0.1u
C371
X_0.1u
VCC1_8
IVDD
1.0 Revise
N13
N14
N16
N18
IVDD
IVDD
AL6
ZUREQ
AL4
ZDREQ
AK5
ZSTB0
AJ2
ZSTB-0
AJ3
ZSTB1
AE3
ZSTB-1
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
ZVREF
ZCMP_N
ZCMP_P
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
AF2
AH5
AK2
AJ4
AJ6
AH2
AH4
AG3
AG6
AF4
AG2
AF5
AG4
AD2
AE6
AE2
AE4
AL3
AK4
AD5
AD4
AN1
AM2
AL2
AL1
C360
C364
G_1u
G_1u
50205020
VCC3 VCC1_8
CP28
X_COPPER
Z4XAVDD
CB86
0.1U
Z4XAVSS
CP27
X_COPPER
VCC3
IVDD
ZCLK
ZUREQ
ZDREQ
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
ZVREF
ZCOMP_N
ZCOMP_P
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
VSSA3VSSA5VSSC1VSSC3VSSC5VSSE1VSSE5VSSE7VSSE9VSSF3VSSG1VSSG5VSSH3VSSJ1VSSJ5VSSK3VSSL1VSSL5VSSM3VSSN1VSSN5VSSP3VSSR1VSSR5VSST3VSSU1VSSU5VSSV3VSSW1VSSW5VSSY3VSS
CP30
X_COPPER
Z1XAVDD
CB87
0.1U
Z1XAVSS
CP29
X_COPPER
2
N19
N21
N23
N24
P13
P24
PVDD
T24
R24
T13
IVDD
IVDD
IVDD
IVDD
PVDD
PVDD
N20
N22
IVDD
IVDD
IVDD
PVDD
SIS648-4
HyperZip
CP32
X_COPPER
R156 56.2RST
CB89
0.1U
R154 56.2RST
CP31
X_COPPER
C124
ROUT
22P
C123
GOUT
22P
C121
BOUT
22P
2
1
Enable Disable
panel link
A15
L12 G_60
B12
L13 G_60
B13
L14 G_60
A13
A11
B11
E13
C11
R122
C10
CSYNC
D12
RSYNC
E12
LSYNC
D11
VCOMP
E15
VRSET
D15
VVBWN
E14
DACAVDD
D13
DACAVDD
D14
DACAVSS
C12
DACAVSS
C13
DCLKAVDD
B15
DCLKAVSS
C15
ECLKAVDD
B14
ECLKAVSS
C14
RSMRST#
AN3
MS7_POK
AM4
PCIRST1#
AN2
R120 4.7K
D9
E10
B10
B9
C9
D10
R121 X_4.7K
F9
C110
G_1u
R115 G_130RST
CP19
X_COPPER
ECLKAVDD
ECLKAVSS
CP21
X_COPPER
Title
VGA
RSYNC
LSYNC
V24
W13
Y24
AA24
AB13
AC24
AD13
AD15
AD17
AD19
AD21
IVDD
IVDD
C146
X_0.1u
ZVREF
C145
0.1U
IVDD
IVDD
ZCMP_N
ZCMP_P
AD23
IVDD
IVDD
IVDD
U24
V13
W24
Y13
IVDD
IVDD
IVDD
IVDD
IVDD
VCC1_8
PVDD
PVDD
R143
150RST
R146
49.9RST
IVDD
PVDD
PVDD
AD24
AE5
N15
IVDD
PVDD
VSS
AG5
R13
IVDD
DACAVDD1
DACAVDD2
DACAVSS1
DACAVSS2
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
TESTMODE0
TESTMODE1
TESTMODE2
VSS
AJ5
CSYNC VB
U13
AA13
VOSCI
IVDD
IVDD
ROUT
GOUT
BOUT
HSYNC
VSYNC
VGPIO0
VGPIO1
INT#A
CSYNC
RSYNC
LSYNC
VCOMP
VRSET
VVBWN
AUXOK
PWROK
PCIRST#
ENTEST
DLLEN#
TRAP0
TRAP1
VSS
U7C
AL5
661FX
VCC1_8
L9
80S/0603
C115
G_0.1u
L10
80S/0603
CB68
C120
G_0.1u
X_0.1u
Micro-Star
Document Number
Last Revision Date:
Friday, October 08, 2004
SIS648FX-Power & HyperZip
1
1
1
DCLK 3
ROUT 23
GOUT 23
BOUT 23
HSYNC 23
VSYNC 23
DDC1CLK 23
DDC1DATA 23
G_0
INTA# 12,16,17
R124 G_4.7K
R126 G_4.7K
R125 G_4.7K
HSYNC
VSYNC
RSMRST# 13,18,27
MS7_POK 13,27
PCIRST1# 25,27
VCC3
C118 G_0.1u
C116 G_0.1u
DACAVDD
DACAVSS
VRSET
VCC3VCC3
C117
X_0.1u
MS7103
Sheet of
1
0
0
0
VCC3
C381 330P
C382 330P
VVBWN
VCOMP
CP18
X_COPPER
DCLKAVDD
CB67
G_0.1u
DCLKAVSS
CP20
X_COPPER
Rev
10A
931
Loading...