Page 1
1
Cover Sheet, Block diagram, Reset/PWRGD Map
Intel LGA775 CPU - Signals/Power/GND
Intel Grantsdale - CPU/Memory/PCI_E/GND
DDR II DIMM 1 , 2
1-4
5-7
8-11
12-13
MS-7059D2
Intel (R) Grantsdale (GMCH) + ICH6 Chipset
Version: X00
Intel Tejas & Prescott LGA775 Processor
PCI Express X16 SLOT 14
CLOCK - ICS954101
ICH6
PCI SLOT & FWH & LPC DEBUG PORT
LAN - BCM4401KQL
1394 TSB43AB23
LPC I/O - SMSC 47M584 & Serial Port
Audio - AC'97/Azalia AD1980/86
MDC 1.0 Interface & Internal 1394a/USB
A A
IDE & SATA & ITP
USB Connectors
VGA Connector
ATX & Front Panel & FAN & Daig LED
DC POWER
VRM 10.1 - ADP3168 + ADP3418 4 PHASES
GPIO & JUMPER SETTING
Manual Parts & Power Delivery
Clock Distribution
SMBUS/I2C Distribution Map
15
16-18
19
20
21
22
23
24
25
26
27
28
29-31
32
33
34
35
36 Power Map
37
CPU:
Intel Tejas/Prescott - 3.0G & Above
System Chipset:
Intel Grantsdale - GMCH (North Bridge)
Intel ICH6 (South Bridge)
On Board Chipset:
BIOS -- FWH FLASH 4Mb
Audio - AC'97/Azalia AD1980/86
LPC Super I/O -- SMSC47M584
LAN - Broadcom 4401KQL
1394 -- TSB43AB23
CLOCK -- ICS954101
Main Memory:
2 CHANNEL DDR II * 2 (Max 2GB)
Expansion Slots:
PCI Express X16 SLOT * 1
PCI 2.2 SLOT * 1
ADI PWM:
Controller: ADP3168/3188
Driver: ADP3418
Revision History
Population Option Parts. 40
38-39
MSI
Title
Size Document Number Rev
1
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
COVER SHEET
Rickles
1 40 Tuesday, February 24, 2004
X00
Page 2
1
P.30
P.14
P.27
P.25
P.25
P.25
P.26
P.23
VID
PCI Express X16
RGB
UltraDMA
33/66/100
SATA
USB2.0
AC Link
Intel LGA775 Processor
FSB
Grantsdale-G
P.8~11
DMI
ICH6
P.16~18
PCI
P.5~7
CHANNEL A
CHANNEL B
LPC Bus
P.19
Block Diagram
DDR2
DIMM 1
Module
P.12
DDR2
DIMM 2
Module
P.12
LPC SIO
47M584
P.22
Floopy
P.22
Parallel FWH
P.25
Serial
P.25
VRM 10.1
ADP 3168
4-Phases PWM
PCI
EXPRESS
X16
Connector
Analog
Video
Out
IDE Primary
SERIAL ATA1
A A
SERIAL ATA2
USB2.0
USB Port0~ 7
AD1980
AC'97 Codec
LAN
BCM4401KQL
P.20
1394
TSB43AB23
P.21
PCI Slot
1
P.19
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
Date: Sheet of
BLOCK DIAGRAM
Rickles
2 40 Tuesday, February 24, 2004
X00
Page 3
8
7
6
5
4
3
2
1
VRM 10.1
ADP 3168
D D
4-Phases PWM
P.30
Intel LGA775 Processor
P.5~7
~H_RESET
ITP PORT
~H_RESET_R
P.25
RESET MAP
DDR2
DIMM 1
Module
P.12
Grantsdale-G
Analog
Video
Out
C C
SERIAL ATA1
SERIAL ATA2
P.27
P.25
P.25
ICH6
USB2.0
USB Port0~ 7
B B
AD1980
AC'97 Codec
LAN
P.26
~AC97_RESET
P.23
~PCI_RST
BCM4401KQL
P.20
P.8~11
~PLT_RST
P.16~18
~PB_RESET
~ICH_RSMRST
~EXP_RST_SLOTS
PCI
EXPRESS
X16
Connector
LPC SIO
47M584
P.22
~IDE_PRST
IDE Primary
P.14
DDR2
DIMM 2
Module
FWH
PCI_RST_SLOTS
PCI Slot
P.25
P.12
P.19
P.19
LPC DEBUG
PORT
P.19
1394
TSB43AB23
P.21
A A
8
Diag LED
P.22
7
6
RESET SW
5
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
4
3
Date: Sheet of
2
Reset Map
Rickles
3 40 Tuesday, February 24, 2004
1
X00
Page 4
8
7
6
5
4
3
2
1
H_VTT_PWRGOOD
VRM 10.1
ADP 3168
D D
4-Phases PWM
P.30
Intel LGA775 Processor
P.5~7
H_PWRGOOD
PCI
EXPRESS
X16
Connector
P.14
Grantsdale-G
3P3V_PWRGOOD
Analog
Video
Out
C C
IDE Primary
P.27
P.25
P.8~11
VTT_OUT
DDR2
DIMM 1
Module
P.12
DDR2
DIMM 2
Module
P.12
VTT PWRGOOD
DELAY
CIRCUIT
VTT_PWRGOOD signal must be delayed 1-10ms
after VTT_FSB for proper clock/cpu function
P.12
PWROK MAP
SERIAL ATA1
SERIAL ATA2
P.25
P.25
ICH6
P.16~18
3P3V_PWRGOOD
USB2.0
USB Port0~ 7
B B
AD1980
AC'97 Codec
P.26
P.23
~ICH_SLP_S4
~ICH_SLP_S3
LPC SIO
47M584
~PWR_PS_ON
PS_PWRGOOD
P.22
POWER CONN
LAN
BCM4401KQL
P.20
1394
TSB43AB23
P.21
A A
8
PCI Slot
P.19
7
6
~ICH_PWRBTN
FP
5
FWH
P.19
Floopy Parallel Serial
4
P.22 P.25 P.25
3
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
Date: Sheet of
2
PWROK MAP
Rickles
4 40 Tuesday, February 24, 2004
1
X00
Page 5
8
7
6
5
4
3
2
1
VID Pull-Up Resistor
H_VID2
H_VID1
AM3
AL5
VID3#
VID2#
VID1#
GTLREF
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
RSVD
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
D0#
LGA775
H_VID0
AM2
~H_PB_RESET 17,25
H_VCCSENSE 32
H_VSSSENSE 32
H_AN5 32
H_AN6 32
~CK_100M_ITP 15,25
CK_100M_ITP 15,25
H_VID[0..5] 32
VID0#
H1
~H_BPM5/PREQ
AG3
~H_BPM4/PRDY
AF2
~H_BPM3
AG2
~H_BPM2
AD2
~H_BPM1
AJ1
~H_BPM0
AJ2
~H_PCREQ
G5
~H_REQ4
J6
~H_REQ3
K6
~H_REQ2
M6
~H_REQ1
J5
~H_REQ0
K4
TESTHI_PU_12
W2
TESTHI_PU_11
P1
TESTHI_PU_10
H5
TESTHI_PU_9
G4
TESTHI_PU_8
G3
F24
G24
G26
G27
G25
TESTHI_PU_2
F25
TESTHI_PU_1
W3
TESTHI_PU_0
F26
AK6
G6
G28
F28
~H_RS2
A3
~H_RS1
F5
~H_RS0
B3
U3
U2
F3
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
H_GTLREF_CPU
R161 62/4
R262 62/4
R162 62/4
R260 100/4/1
R254 100/4/1
R261 60.4/4/1
R206 60.4/4/1
3
H_GTLREF_CPU 6
H_TMS
R264 39/4
H_TDO
R267 75/4/1
H_TDI
R265 150/4/1
R291 62/4
R289 62/4
R286 62/4
R285 62/4
R284 62/4
R282 62/4
~H_PCREQ 8
~H_REQ[0..4] 8
R263 62/4
R259 62/4
R257 62/4
R255 62/4
R256 62/4
~CK_100M_CPU 15
CK_100M_CPU 15
~H_RS[0..2] 8
~H_BREQ0 6,8
PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE
~H_ADSTB1 8
~H_ADSTB0 8
~H_DSTBP3 8
~H_DSTBP2 8
~H_DSTBP1 8
~H_DSTBP0 8
~H_DSTBN3 8
~H_DSTBN2 8
~H_DSTBN1 8
~H_DSTBN0 8
H_NMI 16
H_INTR 16
VTT_OUT
VTT_OUT
MSI
Title
Size Document Number Rev
Date: Sheet of
VTT_OUT
C334 0.1u/16V/4
C328 0.1u/16V/4
V_CPU_VTT
VTT_OUT
C1517
X_0.1u/16V/4
MICRO-STAR INt'L CO., LTD.
2
VTT_OUT
RN14
1K/4/8P4R
H_VID1
1
H_VID2
H_VID4
H_VID3
H_VID0
H_VID5
~H_TRST
H_TCK
~H_BPM5/PREQ
~H_BPM4/PRDY
~H_BPM3
~H_BPM2
~H_BPM1
~H_BPM0
VTT_OUT 6,18,22,25,29,32
2
3
4
5
6
7
8
R243 1K/4
R244 1K/4
R268 680/4
R266 27/4
~H_BPM5/PREQ 25
~H_BPM4/PRDY 25
~H_BPM[0..3] 25
Intel LGA775 CPU - Signals
Rickles
5 40 Tuesday, February 24, 2004
X00
1
H_VCCSENSE
CPU SIGNAL BLOCK
D D
~H_INIT 16
~H_BPRI 8
H_TDI 25
H_TDO 25
H_TMS 25
~H_TRST 25
H_TCK 25
~H_SMI 16
~H_A20M 16
NC_H_BOOTSELECT
H_BSEL0 6,10,15
H_BSEL1 6,10,15
H_BSEL2 6,10,15
~H_DBI0
~H_DBI1
~H_DBI2
~H_DBI3
H_TDI
H_TDO
H_TMS
~H_TRST
H_TCK
H_LL_ID0
NC_H__LL_ID1
~H_D63
~H_D62
~H_D61
~H_D60
~H_D59
~H_D58
~H_D57
~H_D56
~H_D55
~H_D54
7
~H_DBI[0..3] 8
~H_EDRDY 8
~H_IERR 6
~H_FERR 6,16
~H_STPCLK 16
C C
B B
A A
8
~H_DBSY 8
~H_DRDY 8
~H_TRDY 8
~H_ADS 8
~H_LOCK 8
~H_BNR 8
~H_HIT 8
~H_HITM 8
~H_DEFER 8
H_THRM_ANODE 22
H_THRM_CATHODE 22
~H_THRMTRP 6,16
~H_PROCHOT 6,22
~H_IGNNE 16
~H_CPUSLP 16
H_LL_ID0 32
H_PWRGOOD 6,16
~H_RESET 6,8,25
~H_D[0..63] 8
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
~H_A[3..31] 8
CPUA
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
~H_D53
D53#
D52#
C14
~H_D52
D51#
D50#
C15
A14
~H_D50
~H_D51
AJ6
A35#
D49#
D48#
D17
D20
~H_D48
~H_D49
AJ5
AH5
A34#
A33#
D47#
D46#
G22
D22
~H_D47
~H_D46
~H_A31
AH4
AG5
A32#
A31#
D45#
D44#
E22
G21
~H_D45
~H_D44
~H_A30
~H_A29
AG4
AG6
A30#
A29#
D43#
D42#
F21
E21
~H_D43
~H_D42
6
~H_A27
~H_A28
AF4
AF5
A28#
A27#
D41#
D40#
F20
E19
~H_D40
~H_D41
~H_A26
AB4
A26#
D39#
E18
~H_D39
~H_A19
~H_A24
~H_A25
AC5
AB5
A25#
A24#
D38#
D37#
F18
F17
~H_D37
~H_D38
~H_A23
AA5
AD6
A23#
A22#
D36#
D35#
G17
G18
~H_D36
~H_D35
~H_A15
~H_A18
~H_A20
~H_A16
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5
A21#
A20#
A19#
A18#
A17#
A16#
A15#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
E16
E15
G16
G15
F15
G14
F14
~H_D30
~H_D28
~H_D33
~H_D31
~H_D34
~H_D29
~H_D32
~H_A17
~H_A21
~H_A22
~H_A13
~H_A14
A14#
A13#
D27#
D26#
G13
E13
~H_D26
~H_D27
~H_A12
~H_A11
A12#
A11#
D25#
D24#
D13
F12
~H_D25
~H_D24
5
~H_A7
~H_A8
~H_A9
~H_A10
A9#
A8#
A7#
A10#
D23#
D22#
D21#
D20#
F11
D10
E10D7E9F9F8G9D11
~H_D22
~H_D23
~H_D21
~H_D20
~H_A5
~H_A6
A6#
A5#
D19#
D18#
~H_D19
~H_D18
~H_A4
~H_A3
A4#
A3#
D17#
D16#
~H_D17
~H_D16
~H_PB_RESET
AC2
DBR#
D15#
D14#
C12
~H_D14
~H_D15
AN3
RSVD
D13#
D12#
B12D8C11
~H_D12
~H_D13
AN4
AN5
RSVD
VCC_SENSE
D11#
D10#
B10
~H_D10
~H_D11
H_VSSSENSE
AN6
AJ3
AK3
AM5
RSVD
ITP_CLK1
ITP_CLK0
VSS_SENSE
D9#
D8#
D7#
D6#
D5#
D4#
D3#
A11
A10A7B7B6A5C6A4C5B4
~H_D8
~H_D6
~H_D5
~H_D7
~H_D9
~H_D4
~H_D3
4
H_AN5
H_AN6
H_VID5
H_VID4
AL4
AK4
VID5#
VID4#
D2#
D1#
~H_D1
~H_D2
H_VID3
AL6
LINT0/INTR
~H_D0
Page 6
8
7
6
5
4
3
2
1
+CPUCORE
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
CPUB
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U26
U27
U28
U29
U30U8V8
W23
W24
W25
W26
W27
W28
W29
W30W8Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y30
Y8
+CPUCORE
D D
C C
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
RSVD
VCC-IOPLL
VTTPWRGD
VTT_OUT
VTT_OUT
VTT_SEL
RSVD/VTT_PKGSENSE
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AN8
AN9
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
K26
K27
K28
K29
K30K8L8
M23
M24
M25
M26
M27
M28
M29
M30M8N23
N24
N25
N26
N27
N28
N29
N30N8P8R8T23
T24
T25
T26
T27
T28
T29
T30T8U23
U24
U25
AN30
AN29
AN26
AN25
LGA775
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
A23
B23
D23
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6
AA1
J1
F27
F29
VTT_OUT
VTT_OUT
VCC_IO_PLL_A_H
VSS_A_H
VCC_IO_PLL_A_H
H_VTT_PWRGOOD
V_CPU_VTT
H_VTT_PWRGOOD 29,32
VTT_OUT 5,18,22,25,29,32
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
+CPUCORE
B B
V_CPU_VTT
C1518 10u/10V/8
C1519 10u/10V/8
V_CPU_VTT
L30 X_10uH/8
VCC_IO_PLL_A_H
VSS_A_H
L58 FB600/6
C186
22u/6.3V/1206
V_CPU_VTT
DC voltage drop should
be less than 70mV.
R174 470/4
R175 470/4
R154 470/4
4
L31 X_10uH/8
L59 FB600/6
H_BSEL0
H_BSEL1
H_BSEL2
H_BSEL0 5,10,15
H_BSEL1 5,10,15
H_BSEL2 5,10,15
3
49.9 OHM OVER 100 OHM RESISTORS
V_CPU_VTT
VTT_OUT
R277
49.9/4/1
R278
100/4/1
PLACE AT CPU END OF ROUTE
R163 62/4
R246 X_120/4
R258 100/4
R253 62/4
R1334 62/4
PLACE AT ICH END OF ROUTE
R455 62/4
R456 62/4
7
C338
1u/10V/6
~H_RESET
~H_PROCHOT VTT_OUT
H_PWRGOOD
~H_BREQ0
~H_IERR
~H_THRMTRP
~H_FERR
H_GTLREF_CPU
C333
220p/25V/4
~H_RESET 5,8,25
~H_PROCHOT 5,22
H_PWRGOOD 5,16
~H_BREQ0 5,8
~H_IERR 5
C1680 X_0.1u/16V/4
~H_THRMTRP 5,16
~H_FERR 5,16
H_GTLREF_CPU 5
6
5
VTT_OUT
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
A A
8
C190
X_10u/10V/8
MSI
Title
Size Document Number Rev
Date: Sheet of
C189
X_1u/10V/6
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Power
Rickles
2
6 40 Tuesday, February 24, 2004
X00
1
Page 7
8
AC4
AE3
AE4D1D14
CPUC
D D
C C
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AE10
AE13
AE16
AE17
AE20
AE24
AE25
AE26
AE27
AE28
A12
A15
A18
A21
A24
AA3
AA6
AA7
AB1
AB7
AC3
AC6
AC7
AD4
AD7
AE2
RSVD
RSVD
VSS
VSS
VSS
A2
VSS
VSS
VSS
A6
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE29
AE30
AE5
AE7
7
E23
E24E5E6E7F23F6B13H2J2J3N4P5T2V1W1Y3Y7Y5Y2W7W4V7V6
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF10
AF13
AF16
AF17
AF20
AF23
AF24
AF25
AF26
AF27
AF28
AF29
AF3
AF30
AF6
AF7
AG10
AG13
AG16
AG17
VSS
VSS
AG20
VSS
VSS
AG23
VSS
VSS
AG24
AG7
VSS
VSS
AH1
VSS
VSS
6
AH10
VSS
VSS
VSS
VSS
AH13
VSS
VSS
AH16
V30V3V29
VSS
VSS
VSS
VSS
AH17
AH20
AH23
VSS
VSS
V28
VSS
VSS
AH24
V27
AH3
V26
V25
V24
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH6
AH7
AJ10
AJ13
AJ16
VSS
VSS
AJ17
VSS
VSS
AJ20
VSS
VSS
AJ23
VSS
VSS
AJ24
VSS
VSS
AJ27
VSS
VSS
AJ28
VSS
VSS
5
AJ29
VSS
VSS
R29
AJ30
VSS
VSS
4
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
P28
P27
P26
P25
P24
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
AL17
AL20
AL23
VSS
VSS
AL24
VSS
VSS
AL27
VSS
VSS
AL28
VSS
VSS
L28
L27
L26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL3
AL7
AM1
AM10
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23K7K5
VSS
VSS
VSS
VSS
AM20
AM23
VSS
VSS
AM24
VSS
VSS
AM27
3
VSS
VSS
AM28
AM4
VSS
VSS
AM7
VSS
VSS
AN1
VSS
VSS
VSS
VSS
AN10
VSS
VSS
AN13
VSS
VSS
AN16
H29H3H6H7H8H9J4J7K2
VSS
VSS
AN17
H28
AN2
VSS
VSS
H27
AN20
VSS
VSS
H26
VSS
VSS
AN23
H25
VSS
VSS
AN24
H24
VSS
VSS
AN27
H23
VSS
VSS
AN28
H21
H22
VSS
VSS
VSS
VSS
AN7B1B11
2
H17
H18
H19
H20
VSS
VSS
VSS
VSS
VSS
B14
VSS
LGA775
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
1
B B
+CPUCORE +CPUCORE +CPUCORE +CPUCORE
C261 10u/10V/8
C266 10u/10V/8
C278 10u/10V/8
C235 10u/10V/8
C236 10u/10V/8
C275 10u/10V/8
C274 10u/10V/8
C254 10u/10V/8
A A
C255 10u/10V/8
PLACE CAPS WITHIN CPU CAVITY PLACE CAPS AT NORTH OF CPU PLACE CAPS AT EAST OF CPU
8
7
C253 10u/10V/8
C260 10u/10V/8
C247 10u/10V/8
C238 10u/10V/8
C232 10u/10V/8
C239 10u/10V/8
C227 10u/10V/8
C225 10u/10V/8
C234 10u/10V/8
C245 10u/10V/8
C249 10u/10V/8
C267 10u/10V/8
C259 10u/10V/8
C279 10u/10V/8
C286 10u/10V/8
C282 10u/10V/8
6
5
C1717 10u/10V/8
C1718 10u/10V/8
C1719 10u/10V/8
C1720 10u/10V/8
C1721 10u/10V/8
C1722 10u/10V/8
C1723 10u/10V/8 C180 220u/2V/SP
C1724 10u/10V/8
C1725 10u/10V/8
C1726 10u/10V/8
4
MSI
Title
Size Document Number Rev
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - GND
Rickles
2
7 40 Tuesday, February 24, 2004
X00
1
Page 8
8
7
6
5
4
3
2
1
+1_5V
AC11
AB11
Y20
Y19
Y17
Y16
W20
W16
U20
U16
T20
T19
T17
T16
AA13
AA14
AA16
AA18
AA20
AA21
AA22
AA23
AA24
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB24
N13
N14
N15
N16
N18
N20
N21
P13
P14
P15
P17
P19
P21
P22
R13
R14
R15
R16
R18
R20
R22
R23
T13
T14
T15
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
V21
V23
V24
W13
W14
W22
W24
Y13
Y14
Y15
Y21
Y23
VCCNCTF
VCCNCTF
AP1
B35B1A34
VCCNCTF
VCCNCTF
VCCNCTF
Grantsdale-G
A2
Y24
VCCNCTF
VCCNCTF
DINV_0#
DINV_1#
DINV_2#
DINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
J33
H33
J34
G35
H35
G34
F34
G33
D34
C33
D33
B34
C34
B33
C32
B32
E28
C30
D29
H28
G29
J27
F28
F27
E27
E25
G25
J25
K25
L25
L23
K23
J22
J24
K22
J21
M21
H23
M19
K21
H20
H19
M18
K18
K17
G18
H18
F17
A25
C27
C31
B30
B31
A31
B27
A29
C28
A28
C25
C26
D27
A27
E24
B25
E34
J26
K19
B26
E33
E35
H26
F26
J19
F19
B29
C29
~H_D0
~H_D1
~H_D2
~H_D3
~H_D4
~H_D5
~H_D6
~H_D7
~H_D8
~H_D9
~H_D10
~H_D11
~H_D12
~H_D13
~H_D14
~H_D15
~H_D16
~H_D17
~H_D18
~H_D19
~H_D20
~H_D21
~H_D22
~H_D23
~H_D24
~H_D25
~H_D26
~H_D27
~H_D28
~H_D29
~H_D30
~H_D31
~H_D32
~H_D33
~H_D34
~H_D35
~H_D36
~H_D37
~H_D38
~H_D39
~H_D40
~H_D41
~H_D42
~H_D43
~H_D44
~H_D45
~H_D46
~H_D47
~H_D48
~H_D49
~H_D50
~H_D51
~H_D52
~H_D53
~H_D54
~H_D55
~H_D56
~H_D57
~H_D58
~H_D59
~H_D60
~H_D61
~H_D62
~H_D63
~H_DBI0
~H_DBI1
~H_DBI2
~H_DBI3
~H_DSTBP0 5
~H_DSTBN0 5
~H_DSTBP1 5
~H_DSTBN1 5
~H_DSTBP2 5
~H_DSTBN2 5
~H_DSTBP3 5
~H_DSTBN3 5
~H_D[0..63] 5
~H_DBI[0..3] 5
U17A
~H_A3
~H_A[3..31] 5
D D
C C
~H_ADSTB0 5
~H_ADSTB1 5
~H_PCREQ 5
~H_BREQ0 5,6
~H_BPRI 5
~H_BNR 5
~H_LOCK 5
~H_ADS 5
~H_REQ[0..4] 5
~H_HIT 5
~H_HITM 5
~H_DEFER 5
~H_TRDY 5
~H_DBSY 5
~H_DRDY 5
~H_EDRDY 5
B B
~H_RS[0..2] 5
20/4/1
R213
CK_100M_MCH 15
~CK_100M_MCH 15
3P3V_PWRGOOD 17,22
~H_RESET 5,6,25
~PLT_RST 16,19,21,22,28
~ICH_SYNC 17
HXRCOMP
HXSCOMP
HXSWING
MCH_GTLREF
~H_A4
~H_A5
~H_A6
~H_A7
~H_A8
~H_A9
~H_A10
~H_A11
~H_A12
~H_A13
~H_A14
~H_A15
~H_A16
~H_A17
~H_A18
~H_A19
~H_A20
~H_A21
~H_A22
~H_A23
~H_A24
~H_A25
~H_A26
~H_A27
~H_A28
~H_A29
~H_A30
~H_A31
~H_REQ0
~H_REQ1
~H_REQ2
~H_REQ3
~H_REQ4
~H_RS0
~H_RS1
~H_RS2
M30
M28
M26
M35
M31
M32
M23
M22
AG7
M14
H29
K29
G30
G32
K30
K27
K33
R29
N26
N31
P26
N29
P28
R28
N33
T27
T31
U28
T26
T29
N27
E31
R33
E30
F33
E32
H31
G31
F31
N35
N34
P33
K34
P34
G24
AF7
B23
D24
A23
A24
J29
L29
L31
L28
J28
L26
J31
L33
L34
J35
L35
J32
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
HDRCOMP
HDSCOMP
HDSWING
HDVREF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
AK21
AJ21
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AK24
AL21
AL20
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AK18
AJ24
AJ23
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AJ18
AJ20
V31
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
V30
U30
V32
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
Y30
AB29
R31
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
R30
AA31
AA30
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AC12
AC13
AC14
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AC15
AC16
AC17
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AC18
AC19
AC20
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
RSVRD
RSVRD
RSVRD
N12
N22
N23
N24
P12
P23
P24
R12
R24
T12
U12
V12
W12
Y12
AA12
AB12
AC23
AC24
AN19
AL28
AJ14
AH24
AG6
AD30
P30
L19
L12
K12
J12
H17
H15
H12
G12
F24
F12
E16
C16
AR35
AC21
AC22
AR34
VCCNCTF
VCCNCTF
VCCNCTF
AR2
AR1
AP35
VCCNCTF
A A
V_CPU_VTT V_CPU_VTT V_CPU_VTT
8
R219
60.4/4/1 R195
C257
X_2.2p/25V/4
HXSCOMP MCH_GTLREF
7
HSWING S/B 1/4*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R218 301/4/1
R217
102/4/1
6
5
HXSWING
C264
0.01u/16V/4
MCH_GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.8V
49.9 OHM OVER 100 RESISTORS
R207 49.9/4/1
3
C244
220p/25V/4
100/4/1
4
C231
1u/10V/6
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale - CPU Signals
Rickles
2
8 40 Tuesday, February 24, 2004
1
X00
Page 9
8
7
6
5
4
3
2
1
M_CHA_CKE[0..1] 12,13
M_CHA_DM[0..7] 12
M_CHA_DQ[0..63] 12
M_CHA_DM6
M_CHA_DM2
M_CHA_DM7
M_CHA_DM3
M_CHA_DM5
M_CHA_DM4
M_CHA_DQ37
M_CHA_DQ17
M_CHA_DQ16
M_CHA_DQ15
M_CHA_DQ18
AP3
AR5
AP6
AP9
SADQ14
SADQ15
SADQ16
SADQ17
SBDQ12
SBDQ13
SBDQ14
SBDQ15
AL7
AG10
AG11
AF13
M_CHA_DQ22
M_CHA_DQ21
M_CHA_DQ20
M_CHA_DQ19
AN9
AN5
AP5
AN8
SADQ18
SADQ19
SADQ20
SADQ21
SBDQ16
SBDQ17
SBDQ18
SBDQ19
AH12
AD14
AD15
AD12
M_CHA_DQ25
M_CHA_DQ23
M_CHA_DQ26
M_CHA_DQ24
AR8
AL17
AJ17
AF19
SADQ22
SADQ23
SADQ24
SADQ25
SBDQ20
SBDQ21
SBDQ22
SBDQ23
AE13
AG14
AF14
AK19
M_CHA_DQ29
M_CHA_DQ28
M_CHA_DQ27
AH18
AK16
AF16
SADQ26
SADQ27
SADQ28
SADQ29
SBDQ24
SBDQ25
SBDQ26
SBDQ27
AH19
AH21
AD21
M_CHA_DQ30
M_CHA_DQ32
M_CHA_DQ31
M_CHA_DQ33
AD17
AE19
AK27
AJ28
SADQ30
SADQ31
SADQ32
SADQ33
SBDQ28
SBDQ29
SBDQ30
SBDQ31
AD18
AL18
AE22
AF22
M_CHA_DQ34
AL31
AF24
AH3
SADQ1
SADQ2
SBDQ0
AH4
AJ2
AJ6
AE2
SADQ3
SADQ4
SBDQ1
SBDQ2
AL6
AE1
AN6
AG3
SADQ5
SADQ6
SBDQ3
SBDQ4
AG9
AH2
SADQ7
SBDQ5
AH7
AK2
SADQ8
SBDQ6
AL5
M_CHA_DQ9
AK3
AN4
AP4
AJ1
SADQ9
SADQ10
SADQ11
SBDQ7
SBDQ8
SBDQ9
AM5
AJ8
AL8
AF11
AJ3
AP2
SADQ12
SADQ13
SBDQ10
SBDQ11
AE11
AJ7
D D
~M_CHA_CS[0..1] 12,13
~M_CHA_RAS 12,13
~M_CHA_CAS 12,13
~M_CHA_WE 12,13
M_CHA_MA[0..13] 12,13
M_CHA_ODT[0..1] 12,13
M_CHA_BA[0..2] 12,13
C C
B B
M_CHA_DQS0 12
~M_CHA_DQS0 12
M_CHA_DQS1 12
~M_CHA_DQS1 12
M_CHA_DQS2 12
~M_CHA_DQS2 12
M_CHA_DQS3 12
~M_CHA_DQS3 12
M_CHA_DQS4 12
~M_CHA_DQS4 12
M_CHA_DQS5 12
~M_CHA_DQS5 12
M_CHA_DQS6 12
~M_CHA_DQS6 12
M_CHA_DQS7 12
~M_CHA_DQS7 12
M_CHA_SCK0 12
~M_CHA_SCK0 12
M_CHA_SCK1 12
~M_CHA_SCK1 12
M_CHA_SCK2 12
~M_CHA_SCK2 12
~M_CHA_CS0
~M_CHA_CS1
~M_CHA_RAS
~M_CHA_CAS
~M_CHA_WE
M_CHA_MA0
M_CHA_MA1
M_CHA_MA2
M_CHA_MA3
M_CHA_MA4
M_CHA_MA5
M_CHA_MA6
M_CHA_MA7
M_CHA_MA8
M_CHA_MA9
M_CHA_MA10
M_CHA_MA11
M_CHA_MA12
M_CHA_MA13
M_CHA_ODT0
M_CHA_ODT1
M_CHA_BA0
M_CHA_BA1
M_CHA_BA2
M_CHA_DQS0
~M_CHA_DQS0
M_CHA_DQS1
~M_CHA_DQS1
M_CHA_DQS2
~M_CHA_DQS2
M_CHA_DQS3
~M_CHA_DQS3
M_CHA_DQS4
~M_CHA_DQS4
M_CHA_DQS5
~M_CHA_DQS5
M_CHA_DQS6
~M_CHA_DQS6
M_CHA_DQS7
~M_CHA_DQS7
M_CHA_SCK0
~M_CHA_SCK0
M_CHA_SCK1
~M_CHA_SCK1
M_CHA_SCK2
~M_CHA_SCK2
TP_SA_RCVENOUT
TP_SA_RCVENIN
BUFFER_SLEW_A
SM_VREF
SM_RCOMP_1
SM_RCOMP_0
SM_OCDCOMP_1
SM_OCDCOMP_0
AR29
AP32
AR28
AN31
AP27
AN29
AN28
AP26
AR24
AL24
AP23
AR23
AP22
AN23
AP21
AN22
AN21
AM27
AM21
AR20
AP31
AP30
AN32
AP29
AP33
AR27
AN27
AN20
AF17
AG17
AM30
AL29
AG35
AG33
AA34
AA35
AN26
AP25
AC34
AC35
AN25
AM24
AC33
AB34
AB33
AH15
AE16
AJ12
AK12
AG1
AG2
AL3
AL2
AP7
AR7
U34
U35
AM2
AM3
AN3
AN2
AE7
AG8
AG4
AE5
AF5
U17B
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
SAODT0
SAODT1
SAODT2
SAODT3
SABA0
SABA1
SABA2
SADQS0
SADQS0#
SADQS1
SADQS1#
SADQS2
SADQS2#
SADQS3
SADQS3#
SADQS4
SADQS4#
SADQS5
SADQS5#
SADQS6
SADQS6#
SADQS7
SADQS7#
SACK0
SACK0#
SACK1
SACK1#
SACK2
SACK2#
SACK3
SACK3#
SACK4
SACK4#
SACK5
SACK5#
SADDR1MA13
SARCVENOUT#
SARCVENIN#
SMXSLEWIN
SMXSLEWOUT
SMVREF0
SMRCOMPP
SMRCOMPN
SMOCDCOMP1
SMOCDCOMP0
AE3
SADQ0
AF3
Grantsdale-G
M_CHA_DQ0
M_CHA_DQ10
M_CHA_DQ13
M_CHA_DQ12
M_CHA_DQ14
M_CHA_DQ11
M_CHA_DQ8
M_CHA_DQ4
M_CHA_DQ2
M_CHA_DQ1
M_CHA_DQ3
M_CHA_DQ6
M_CHA_DQ5
M_CHA_DQ7
M_CHA_DQ36
M_CHA_DQ38
M_CHA_DQ35
AK31
AH27
AL27
AN30
SADQ34
SADQ35
SADQ36
SADQ37
SBDQ32
SBDQ33
SBDQ34
SBDQ35
AF25
AL26
AJ26
AF23
M_CHA_DQ42
M_CHA_DQ40
M_CHA_DQ39
M_CHA_DQ41
AL30
AH33
AH35
AF33
SADQ38
SADQ39
SADQ40
SADQ41
SBDQ36
SBDQ37
SBDQ38
SBDQ39
AD23
AL25
AJ25
AK32
M_CHA_DQ44
M_CHA_DQ46
M_CHA_DQ43
M_CHA_DQ45
AE33
AJ33
AJ34
SADQ42
SADQ43
SADQ44
SADQ45
SBDQ40
SBDQ41
SBDQ42
SBDQ43
AJ31
AG31
AF28
M_CHA_DQ47
M_CHA_DQ48
M_CHA_DQ49
AG32
AF34
AD31
SADQ46
SADQ47
SADQ48
SBDQ44
SBDQ45
SBDQ46
AJ29
AK33
AG30
M_CHA_DQ51
M_CHA_DQ50
M_CHA_DQ52
AD35
Y33
W34
SADQ49
SADQ50
SADQ51
SBDQ47
SBDQ48
SBDQ49
AG27
AF27
AE27
AE35
SADQ52
SBDQ50
AC26
M_CHA_DQ54
M_CHA_DQ57
M_CHA_DQ55
M_CHA_DQ56
M_CHA_DQ53
AE34
AA32
Y35
V34
V33
SADQ53
SADQ54
SADQ55
SADQ56
SBDQ51
SBDQ52
SBDQ53
SBDQ54
AB26
AE31
AE29
AC28
AB27
M_CHA_DQ60
M_CHA_DQ58
M_CHA_DQ61
M_CHA_DQ59
R32
R34
W35
W33
SADQ57
SADQ58
SADQ59
SADQ60
SBDQ55
SBDQ56
SBDQ57
SBDQ58
AA28
W29
V28
V29
M_CHA_DQ62
M_CHA_DQ63
T33
T35
SADQ61
SADQ62
SADQ63
SBDQ59
SBDQ60
SBDQ61
Y26
AA29
M_CHA_CKE0
M_CHA_CKE1
AP19
AM18
AN18
SACKE0
SACKE1
SBDQ62
SBDQ63
W26
U26
AP10
AR19
SACKE2
SACKE3
SBCKE0
SBCKE1
AN10
AR9
M_CHA_DM1
M_CHA_DM0
AF2
AL1
AN7
SADM0
SADM1
SADM2
SBDM7
SBCKE2
SBCKE3
W31
AM9
AH16
SADM3
SBDM6
AD24
AK29
AH31
AG34
AA33
SADM4
SADM5
SADM6
SBRCVENOUT#
SBDM3
SBDM4
SBDM5
AG20
AG24
U33
SBCS0#
SBCS1#
SBCS2#
SADM7
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
SBODT0
SBODT1
SBODT2
SBODT3
SBBA0
SBBA1
SBBA2
SBDQS0
SBDQS0#
SBDQS1
SBDQS1#
SBDQS2
SBDQS2#
SBDQS3
SBDQS3#
SBDQS4
SBDQS4#
SBDQS5
SBDQS5#
SBDQS6
SBDQS6#
SBDQS7
SBDQS7#
SBCK0
SBCK0#
SBCK1
SBCK1#
SBCK2
SBCK2#
SBCK3
SBCK3#
SBCK4
SBCK4#
SBCK5
SBCK5#
SBDDR1MA13
SBRCVENIN#
SMYSLEWIN
SMYSLEWOUT
SMVREF1
SBDM0
SBDM1
SBDM2
AJ5
AH9
AH13
~M_CHB_CS0
AN33
~M_CHB_CS1
AM34
AP34
AN34
~M_CHB_RAS
AN17
~M_CHB_CAS
AP18
~M_CHB_WE
AP17
M_CHB_MA0
AM15
M_CHB_MA1
AR15
M_CHB_MA2
AN15
M_CHB_MA3
AL15
M_CHB_MA4
AP14
M_CHB_MA5
AM12
M_CHB_MA6
AP13
M_CHB_MA7
AL12
M_CHB_MA8
AN13
M_CHB_MA9
AR12
M_CHB_MA10
AP15
M_CHB_MA11
AP11
M_CHB_MA12
AR11
M_CHB_MA13
AL33
M_CHB_ODT0
AM33
M_CHB_ODT1
AL34
AL35
AK34
M_CHB_BA0
AR16
M_CHB_BA1
AN16
M_CHB_BA2
AN11
M_CHB_DQS0
AK5
~M_CHB_DQS0
AL4
M_CHB_DQS1
AK10
~M_CHB_DQS1
AH10
M_CHB_DQS2
AK13
~M_CHB_DQS2
AL14
M_CHB_DQS3
AD20
~M_CHB_DQS3
AF20
M_CHB_DQS4
AH25
~M_CHB_DQS4
AG26
M_CHB_DQS5
AH28
~M_CHB_DQS5
AH30
M_CHB_DQS6
AB31
~M_CHB_DQS6
AC30
M_CHB_DQS7
W27
~M_CHB_DQS7
Y28
M_CHB_SCK0
AH22
~M_CHB_SCK0
AG23
M_CHB_SCK1
AK9
~M_CHB_SCK1
AL9
M_CHB_SCK2
AE26
~M_CHB_SCK2
AE25
AL23
AK22
AJ11
AL11
AD28
AD29
AD32
TP_SB_RCVENOUT
AK15
TP_SB_RCVENIN
AN14
BUFFER_SLEW_B
AF9
AE10
SM_VREF
AE8
~M_CHB_CS[0..1] 12,13
~M_CHB_RAS 12,13
~M_CHB_CAS 12,13
~M_CHB_WE 12,13
M_CHB_MA[0..13] 12,13
M_CHB_ODT[0..1] 12,13
M_CHB_BA[0..2] 12,13
M_CHB_DQS0 12
~M_CHB_DQS0 12
M_CHB_DQS1 12
~M_CHB_DQS1 12
M_CHB_DQS2 12
~M_CHB_DQS2 12
M_CHB_DQS3 12
~M_CHB_DQS3 12
M_CHB_DQS4 12
~M_CHB_DQS4 12
M_CHB_DQS5 12
~M_CHB_DQS5 12
M_CHB_DQS6 12
~M_CHB_DQS6 12
M_CHB_DQS7 12
~M_CHB_DQS7 12
M_CHB_SCK0 12
~M_CHB_SCK0 12
M_CHB_SCK1 12
~M_CHB_SCK1 12
M_CHB_SCK2 12
~M_CHB_SCK2 12
M_CHB_DQ14
M_CHB_DQ15
M_CHB_DQ21
M_CHB_DQ23
M_CHB_DQ27
M_CHB_DQ11
M_CHB_DQ17
M_CHB_DQ16
M_CHB_DQ13
M_CHB_DQ20
M_CHB_DQ18
M_CHB_DQ19
M_CHB_DQ24
M_CHB_DQ22
M_CHB_DQ25
M_CHB_DQ26
M_CHB_DQ10
M_CHB_DQ5
M_CHB_DQ7
M_CHB_DQ8
M_CHB_DQ6
M_CHB_DQ12
M_CHB_DQ9
M_CHB_DQ4
M_CHB_DQ3
M_CHB_DQ0
M_CHB_DQ2
M_CHB_DQ[0..63] 12
M_CHB_DQ1
M_CHB_DQ31
M_CHB_DQ30
M_CHB_DQ28
M_CHB_DQ29
M_CHB_DQ34
M_CHB_DQ32
M_CHB_DQ35
M_CHB_DQ33
M_CHB_DQ36
M_CHB_DQ39
M_CHB_DQ37
M_CHB_DQ38
M_CHB_DQ40
M_CHB_DQ44
M_CHB_DQ43
M_CHB_DQ42
M_CHB_DQ41
M_CHB_DQ45
M_CHB_DQ46
M_CHB_DQ48
M_CHB_DQ47
M_CHB_DQ51
M_CHB_DQ52
M_CHB_DQ50
M_CHB_DQ49
M_CHB_DQ55
M_CHB_DQ56
M_CHB_DQ54
M_CHB_DQ53
M_CHB_DQ57
M_CHB_DQ59
M_CHB_DQ58
M_CHB_DQ60
M_CHB_DQ61
M_CHB_CKE0
M_CHB_DQ63
M_CHB_DQ62
M_CHB_CKE1
M_CHB_DM7
M_CHB_DM6
M_CHB_DM5
M_CHB_DM4
M_CHB_DM2
M_CHB_DM3
M_CHB_DM1
M_CHB_DM0
M_CHB_CKE[0..1] 12,13
M_CHB_DM[0..7] 12
P1V8STBY
R276
C331
0.1u/16V/4
80.6/4/1
A A
R271 80.6/4/1
SM_RCOMP_0
SM_RCOMP_1
R269 40.2/4/1
R272 40.2/4/1
SM_OCDCOMP_1
SM_OCDCOMP_0
P1V8STBY
R275 1K/4/1
R270
1K/4/1
PLACE CLOSE TO MCH
8
7
6
5
4
PLACE 0.1UF CAP CLOSE TO MCH
SM_VREF
C332
0.1u/16V/4
C329
0.1u/16V/4
MSI
Title
Size Document Number Rev
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale - Memory Signals
Rickles
2
9 40 Tuesday, February 24, 2004
X00
1
Page 10
8
7
6
5
4
3
2
1
AB1
W18
VCC
VCC
VSSNCTF
VSSNCTF
AC25
AB25
V19
V17
VCC
VSSNCTF
AA25
AA11
U18
VCC
VCC
VSSNCTF
VSSNCTF
VSSNCTF
Y25
Y18
P1V8STBY
AR33
AR31
VCCSM
VSSNCTF
VSSNCTF
Y11
W25
W11
AR26
AR22
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
V25
V20
AR18
AR14
VCCSM
VCCSM
VSSNCTF
VSSNCTF
V16
V11
AP28
AR10
VCCSM
VCCSM
VSSNCTF
VSSNCTF
U25
U11
AP24
AP20
VCCSM
VSSNCTF
T25
T18
AP16
AP12
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
T11
R25
AN35
AM32
VCCSM
VSSNCTF
R11
P25
AM28
AM26
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
P11
N25
AM25
AM23
VCCSM
VCCSM
VSSNCTF
VSSNCTF
AD25
N11
AM22
AM20
VCCSM
VCCSM
VSSNCTF
VSSNCTF
M11
AA15
AM19
AM17
VCCSM
VCCSM
VSSNCTF
VSSNCTF
AA17
AA19
AM16
AM14
VCCSM
VCCSM
VSSNCTF
VSSNCTF
N17
N19
AM11
AM13
VCCSM
VCCSM
VSSNCTF
VSSNCTF
P16
P18
AM10
AK35
VCCSM
VCCSM
VSSNCTF
VSSNCTF
P20
R17
VCC3G
VSSNCTF
VSSNCTF
R19
R21
VCC3G
VCC3G
VSSNCTF
VSSNCTF
T22
U15
VCC3G
VCC3G
VSSNCTF
VSSNCTF
U21
U23
VCC3G
VCC3G
VSSNCTF
VSSNCTF
V22
W15
VCC3G
VCC3G
VSSNCTF
VSSNCTF
W21
W23
VCC3G
VCC3G
VSSNCTF
Y22
VCC3G
VCC3G
VCC3G
CRTDDCDATA
V_1P5_EXP
Y9Y8Y7Y6Y5Y4Y3Y2Y1W9W8W7W6W4W3W2W1
VCC3G
VCC3G
VCC3G
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXPACOMPO
EXPACOMPI
CRTHSYNC
CRTVSYNC
CRTRED
CRTGREEN
CRTBLUE
CRTREDB
CRTGREENB
CTRBLUEB
CRTDDCCLK
DREFCLKINP
DREFCLKINN
CRTIREF
PMEXTTS
PMBMBUSY#
TESTIN#
MCHDETECT
EXP_MCH_G_P0
C10
~EXP_MCH_G_P0
C9
EXP_MCH_G_P1
A9
~EXP_MCH_G_P1
A8
EXP_MCH_G_P2
C8
~EXP_MCH_G_P2
C7
EXP_MCH_G_P3
A7
~EXP_MCH_G_P3
A6
EXP_MCH_G_P4
C6
~EXP_MCH_G_P4
C5
EXP_MCH_G_P5
C2
~EXP_MCH_G_P5 EXP_G_MCH_P7_C
D2
EXP_MCH_G_P6
E3
~EXP_MCH_G_P6 EXP_G_MCH_P8_C
F3
EXP_MCH_G_P7
F1
~EXP_MCH_G_P7
G1
EXP_MCH_G_P8
G3
~EXP_MCH_G_P8
H3
EXP_MCH_G_P9
H1
~EXP_MCH_G_P9
J1
EXP_MCH_G_P10 ~EXP_G_MCH_P11_C
J3
~EXP_MCH_G_P10
K3
EXP_MCH_G_P11
K1
~EXP_MCH_G_P11
L1
EXP_MCH_G_P12
L3
~EXP_MCH_G_P12
M3
EXP_MCH_G_P13
M1
~EXP_MCH_G_P13
N1
EXP_MCH_G_P14
N3
~EXP_MCH_G_P14
P3
EXP_MCH_G_P15
P1
~EXP_MCH_G_P15
R1
DMI_MCH_ICH_P0
R3
~DMI_MCH_ICH_P0
T3
DMI_MCH_ICH_P1
T1
~DMI_MCH_ICH_P1
U1
DMI_MCH_ICH_P2
U3
~DMI_MCH_ICH_P2
V3
DMI_MCH_ICH_P3
V5
~DMI_MCH_ICH_P3
W5
Y10
W10
GRP_HSYNC_3V_R
E12
GRP_VSYNC_3V_R
D12
GRP_RED
F14
GRP_GREEN
D14
GRP_BLUE
H14
G14
E14
J14
GRP_DDC_DATA_3V
L14
GRP_DDC_CLK_3V
M15
CK_96M_DOT
M13
~CK_96M_DOT
M12
MCH_REFSET
A15
~EXTTS
K16
G16
R35
A35
R248 24.9/4/1
EXP_RCOMP
R215 255/6/1
R216 8.2K/4
EXP_RCOMP
EXP_MCH_G_P0 14
~EXP_MCH_G_P0 14
EXP_MCH_G_P1 14
~EXP_MCH_G_P1 14
EXP_MCH_G_P2 14
~EXP_MCH_G_P2 14
EXP_MCH_G_P3 14
~EXP_MCH_G_P3 14
EXP_MCH_G_P4 14
~EXP_MCH_G_P4 14
EXP_MCH_G_P5 14
~EXP_MCH_G_P5 14
EXP_MCH_G_P6 14
~EXP_MCH_G_P6 14
EXP_MCH_G_P7 14
~EXP_MCH_G_P7 14
EXP_MCH_G_P8 14
~EXP_MCH_G_P8 14
EXP_MCH_G_P9 14
~EXP_MCH_G_P9 14
EXP_MCH_G_P10 14
~EXP_MCH_G_P10 14
EXP_MCH_G_P11 14
~EXP_MCH_G_P11 14
EXP_MCH_G_P12 14
~EXP_MCH_G_P12 14
EXP_MCH_G_P13 14
~EXP_MCH_G_P13 14
EXP_MCH_G_P14 14
~EXP_MCH_G_P14 14
EXP_MCH_G_P15 14
~EXP_MCH_G_P15 14
DMI_MCH_ICH_P0 16
~DMI_MCH_ICH_P0 16
DMI_MCH_ICH_P1 16
~DMI_MCH_ICH_P1 16
DMI_MCH_ICH_P2 16
~DMI_MCH_ICH_P2 16
DMI_MCH_ICH_P3 16
~DMI_MCH_ICH_P3 16
GRP_HSYNC_3V_R 27
GRP_VSYNC_3V_R 27
GRP_RED 27
GRP_GREEN 27
GRP_BLUE 27
GRP_DDC_DATA_3V 27
GRP_DDC_CLK_3V 27
CK_96M_DOT 15
~CK_96M_DOT 15
V_2P5_DAC
P1V8STBY
C339 2.2u/16V/8
C346 2.2u/16V/8
C347 2.2u/16V/8
C348 2.2u/16V/8
C349 2.2u/16V/8
C350 2.2u/16V/8
V_CPU_VTT
HS1
HK1*3(-2)
1
2
BSEL
2
0
1
0
0
0
0
0
1
0
1
0
+1_5V
C325
C324
C262
10u/10V/8
C271
10u/10V/8
Place close to GMCH
HS2
HK1*3(-2)
1
2
~GPI_HS_DET 16
TABLE
PSB FREQUENCY
RESERVED
133 MHZ (533)
200 MHZ (800)
1 2
+
C321
470u/10V/8*11.5
C280
10u/10V/8
10u/10V/8
10u/10V/8
+1_5V
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AC10
AC9
AC8
AC7
AC2
AC6
AC5
AC4
AD10
C241
U17C
E11
F11
J11
H11
F9
E9
F7
E7
B3
B4
D5
E5
G6
G5
H8
H7
J6
J5
K8
K7
L6
L5
P10
R10
M8
M7
N6
N5
P7
P8
R6
R5
U5
U6
T9
T8
V7
V8
V10
U10
A11
B11
K13
J13
H16
E15
D17
M16
F15
C15
A16
B15
C14
K15
L10
M10
A17
B17
A12
B13
A14
A13
E13
D13
F13
Grantsdale-G
EXPARXP0
EXPARXN0
EXPARXP1
EXPARXN1
EXPARXP2
EXPARXN2
EXPARXP3
EXPARXN3
EXPARXP4
EXPARXN4
EXPARXP5
EXPARXN5
EXPARXP6
EXPARXN6
EXPARXP7
EXPARXN7
EXPARXP8
EXPARXN8
EXPARXP9
EXPARXN9
EXPARXP10
EXPARXN10
EXPARXP11
EXPARXN11
EXPARXP12
EXPARXN12
EXPARXP13
EXPARXN13
EXPARXP14
EXPARXN14
EXPARXP15
EXPARXN15
DMI RXP0
DMI RXN0
DMI RXP1
DMI RXN1
DMI RXP2
DMI RXN2
DMI RXP3
DMI RXN3
GCLKINP
GCLKINN
SDVOCTRLDATA
SDVOCTRLCLK
BSEL0
BSEL1
BSEL2
RSV
RSV
MTYPE
EXP_SLR
RSV
RSV
RSV
VCC
VSS
VCCAHPLL
VCCAMPLL
VCCADPLLA
VCCADPLLB
VCCA3GPLL
VCCHV
VCCACRTDAC
VCCACRTDAC
VSSACRTDAC
V_CPU_VTT
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
G22
H22
G21
F22
F21
F20
E22
E21
E20
SDVO_DATA 14
SDVO_CLK 14
+
H_BSEL0 5,6,15
H_BSEL1 5,6,15
H_BSEL2 5,6,15
C242
0.1u/16V/4
EXP_G_MCH_P0_C
~EXP_G_MCH_P0_C
EXP_G_MCH_P1_C
~EXP_G_MCH_P1_C
EXP_G_MCH_P2_C
~EXP_G_MCH_P2_C
EXP_G_MCH_P3_C
~EXP_G_MCH_P3_C
EXP_G_MCH_P4_C
~EXP_G_MCH_P4_C
EXP_G_MCH_P5_C
~EXP_G_MCH_P5_C
EXP_G_MCH_P6_C
~EXP_G_MCH_P6_C
~EXP_G_MCH_P7_C
~EXP_G_MCH_P8_C
EXP_G_MCH_P9_C
~EXP_G_MCH_P9_C
EXP_G_MCH_P10_C
~EXP_G_MCH_P10_C
EXP_G_MCH_P11_C
EXP_G_MCH_P12_C
~EXP_G_MCH_P12_C
EXP_G_MCH_P13_C
~EXP_G_MCH_P13_C
EXP_G_MCH_P14_C
~EXP_G_MCH_P14_C
EXP_G_MCH_P15_C
~EXP_G_MCH_P15_C
DMI_ICH_MCH_P0
~DMI_ICH_MCH_P0
DMI_ICH_MCH_P1
~DMI_ICH_MCH_P1
DMI_ICH_MCH_P2
~DMI_ICH_MCH_P2
DMI_ICH_MCH_P3
~DMI_ICH_MCH_P3
EXP_CK_100M_MCH
~EXP_CK_100M_MCH
V_2P5_DAC
SDVO_DATA
SDVO_CLK
MTYPE
EXP_SLR
+1_5V
V_1P5_HPLL
V_1P5_MPLL
V_1P5_DPLL_A
V_1P5_DPLL_B
V_1P5_EXPPLL
V_2P5_DAC_F
0.01u/16V/4
EXP_G_MCH_P0_C 14
~EXP_G_MCH_P0_C 14
EXP_G_MCH_P1_C 14
D D
C C
B B
V_2P5_DAC
~EXP_G_MCH_P1_C 14
~EXP_G_MCH_P2_C 14
~EXP_G_MCH_P3_C 14
~EXP_G_MCH_P4_C 14
~EXP_G_MCH_P5_C 14
~EXP_G_MCH_P6_C 14
~EXP_G_MCH_P7_C 14
~EXP_G_MCH_P8_C 14
~EXP_G_MCH_P9_C 14
~EXP_G_MCH_P10_C 14
~EXP_G_MCH_P11_C 14
~EXP_G_MCH_P12_C 14
~EXP_G_MCH_P13_C 14
~EXP_G_MCH_P14_C 14
~EXP_G_MCH_P15_C 14
~DMI_ICH_MCH_P0 16
~DMI_ICH_MCH_P1 16
~DMI_ICH_MCH_P2 16
~DMI_ICH_MCH_P3 16
~EXP_CK_100M_MCH 15
R1354 X_1K/4
I=70mA
FB180/6/1.5A
220u/10V/6.3*7
EXP_G_MCH_P2_C 14
EXP_G_MCH_P3_C 14
EXP_G_MCH_P4_C 14
EXP_G_MCH_P5_C 14
EXP_G_MCH_P6_C 14
EXP_G_MCH_P7_C 14
EXP_G_MCH_P8_C 14
EXP_G_MCH_P9_C 14
EXP_G_MCH_P10_C 14
EXP_G_MCH_P11_C 14
EXP_G_MCH_P12_C 14
EXP_G_MCH_P13_C 14
EXP_G_MCH_P14_C 14
EXP_G_MCH_P15_C 14
DMI_ICH_MCH_P0 16
DMI_ICH_MCH_P1 16
DMI_ICH_MCH_P2 16
DMI_ICH_MCH_P3 16
EXP_CK_100M_MCH 15
R212 2K/4
C1520 X_0.1u/16V/4
L39
C222
AC3
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
C22
E19
D22
D21
D20
D19
C21
C20
C19
AB4
AB9
AB8
AB7
AB6
AB5
AB3
AC1
AB10
VCC
VCC
VTT
VTT
B21
B22
AB2
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VCC
VTT
VTT
VTT
VTT
VTT
VTT
B20
B19
A22
A21
A20
A19
+1_5V
+1_5V
A A
8
L34 10uH/8
L35 10uH/8
V_1P5_HPLL
+
C223
470u/10V/6.3*11
+
C224
470u/10V/6.3*11
7
I=45mA
0.1u/16V/4
I=60mA
C252
0.1u/16V/4
+1_5V
+1_5V
6
L36 10uH/8
L37 10uH/8
5
V_1P5_DPLL_A
+
C220
220u/10V/6.3*7
V_1P5_DPLL_B
+
C221
220u/10V/6.3*7
I=55mA
C272
0.1u/16V/4
I=55mA
C273
0.1u/16V/4
+1_5V
4
+1_5V
L38 1uH/8/0.5A
L40 0.15uH/1210/1.45A
+
V_1P5_EXPPLL V_1P5_EXPPLL V_1P5_MPLL
ANALOG FILTERS
3
C308
220u/10V/6.3*7
V_1P5_EXP
R211 1/4/1
R1355 1/4/1
C315
C316 10u/10V/8 C251
C240
10u/10V/8
10u/10V/8
C1681
0.1u/16V/4
I=45mA
C270
0.1u/16V/4
MICRO-STAR INt'L CO., LTD.
MSI
Title
Intel Grantsdale PCI-Express & RBG Signals
Size Document Number Rev
Date: Sheet of
2
Rickles
10 40 Tuesday, February 24, 2004
1
X00
Page 11
8
7
6
5
4
3
2
1
D D
A10
A18
A26
A30
A33
B10
B12
B14
B16
B18
B24
B28
C C
B B
C11
C13
C17
C18
C23
C35
D10
D11
D15
D16
D18
D23
D25
D26
D28
D30
D31
D32
E10
E17
E18
E23
E26
E29
F10
F16
F18
F23
F25
F29
F30
F32
F35
AR25
AR30
U17D
VSS
VSS
A3
VSS
A5
VSS
VSS
VSS
VSS
VSS
VSS
B2
VSS
B5
VSS
B6
VSS
B7
VSS
B8
VSS
B9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C1
VSS
C3
VSS
C4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D3
VSS
D4
VSS
D6
VSS
D7
VSS
D8
VSS
D9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E1
VSS
E2
VSS
E4
VSS
E6
VSS
E8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F2
VSS
F4
VSS
F5
VSS
F6
VSS
F8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G2G4G7
AR21
VSS
VSS
AR17
VSS
VSS
AR13
VSS
VSS
AR6
G10G9G8
VSS
VSS
AR3
G11
VSS
VSS
AP8
G13
VSS
VSS
AN1
VSS
VSS
G15
AM31
VSS
VSS
G17
AM29
VSS
VSS
G19
AM8
G20
VSS
VSS
AM7
G23
VSS
VSS
AM6
G26
VSS
VSS
AM4
G27
VSS
VSS
AL32
VSS
VSS
AL22
VSS
VSS
AL19
VSS
VSS
AL16
VSS
VSS
AL13
VSS
VSS
AL10
VSS
VSS
AK30
H10H9H6H5H4H2G28
VSS
VSS
AK28
VSS
VSS
H13
AK26
H21
VSS
VSS
AK25
VSS
VSS
H24
AK23
H25
VSS
VSS
AK20
H27
VSS
VSS
AK17
H30
VSS
VSS
AK14
H32
VSS
VSS
AK11
VSS
VSS
AK8
VSS
VSS
AK7
VSS
VSS
AK6
VSS
VSS
AK4
VSS
VSS
AK1
VSS
VSS
AJ35
J10J9J8J7J4J2H34
VSS
VSS
AJ32
VSS
VSS
J15
AJ30
J16
VSS
VSS
AJ27
J17
VSS
VSS
AJ22
J18
VSS
VSS
AJ19
J20
VSS
VSS
AJ16
J23
VSS
VSS
AJ15
VSS
VSS
AJ13
VSS
VSS
AJ10
VSS
VSS
AH26
AH29
AH32
AH34
AJ4
AJ9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K11
K10K9K6K5K4K2J30
K14
AH23
K20
VSS
VSS
AH20
K24
VSS
VSS
AH17
VSS
VSS
K26
AH14
K28
VSS
VSS
AH11
VSS
VSS
K31
AH8
K32
VSS
VSS
AH6
VSS
VSS
AH5
VSS
VSS
AH1
VSS
VSS
AG29
VSS
VSS
AG28
VSS
VSS
L8L7L4L2K35
AG25
VSS
VSS
L9
AG22
VSS
VSS
L11
AG21
VSS
VSS
L13
AG19
VSS
VSS
L15
AG18
VSS
VSS
L16
AG16
VSS
VSS
L17
AG15
VSS
VSS
L18
AG13
VSS
VSS
L20
AG12
VSS
VSS
L21
AG5
VSS
VSS
L22
AF30
AF31
AF32
AF35
VSS
VSS
VSS
VSS
VSS
VSS
L24
L27
L30
L32M2M4M5M6M9M17
VSS
VSS
AF29
VSS
VSS
AF26
VSS
VSS
AF21
VSS
VSS
AF18
VSS
VSS
AF15
VSS
VSS
AF12
VSS
VSS
AF10
VSS
VSS
M20
AF8
M24
VSS
VSS
AF6
M25
VSS
VSS
AF4
VSS
VSS
M27
AE24
AE28
AE30
AE32
AF1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M29
M34N2N4N7N8N9N10
AE23
VSS
VSS
AE21
VSS
VSS
AE20
VSS
VSS
AE18
VSS
VSS
N28
AE17
VSS
VSS
N30
AE9
AE12
AE14
AE15
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N32P2P4P5P6P9P27
AE6
VSS
VSS
AE4
VSS
VSS
AD34
VSS
VSS
AD27
P29
VSS
VSS
AD26
VSS
VSS
P31
AD19
AD22
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Grantsdale-G
AD16
AD13
AD11
AC32
AC31
AC29
AC27
AB35
AB32
AB30
AB28
AA27
AA26
AA10
AA9
AA8
AA7
AA6
AA5
AA4
AA3
AA2
AA1
Y34
Y32
Y31
Y29
Y27
W32
W30
W28
W19
W17
V35
V27
V26
V18
V9
V6
V4
V2
V1
U32
U31
U29
U27
U19
U17
U9
U8
U7
U4
U2
T34
T32
T30
T28
T10
T7
T6
T5
T4
T2
R27
R26
R9
R8
R7
R4
R2
P35
P32
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale - GND
Rickles
2
11 40 Tuesday, February 24, 2004
X00
1
Page 12
5
M_CHA_DQ[0..63] 9
D D
C C
B B
M_CHA_DQ0
M_CHA_DQ1
M_CHA_DQ2
M_CHA_DQ3
M_CHA_DQ4
M_CHA_DQ5
M_CHA_DQ6
M_CHA_DQ7
M_CHA_DQ8
M_CHA_DQ9
M_CHA_DQ10
M_CHA_DQ11
M_CHA_DQ12
M_CHA_DQ13
M_CHA_DQ14
M_CHA_DQ15
M_CHA_DQ16
M_CHA_DQ17
M_CHA_DQ18
M_CHA_DQ19
M_CHA_DQ20
M_CHA_DQ21
M_CHA_DQ22
M_CHA_DQ23
M_CHA_DQ24
M_CHA_DQ25
M_CHA_DQ26
M_CHA_DQ27
M_CHA_DQ28
M_CHA_DQ29
M_CHA_DQ30
M_CHA_DQ31
M_CHA_DQ32
M_CHA_DQ33
M_CHA_DQ34
M_CHA_DQ35
M_CHA_DQ36
M_CHA_DQ37
M_CHA_DQ38
M_CHA_DQ39
M_CHA_DQ40
M_CHA_DQ41
M_CHA_DQ42
M_CHA_DQ43
M_CHA_DQ44
M_CHA_DQ45
M_CHA_DQ46
M_CHA_DQ47
M_CHA_DQ48
M_CHA_DQ49
M_CHA_DQ50
M_CHA_DQ51
M_CHA_DQ52
M_CHA_DQ53
M_CHA_DQ54
M_CHA_DQ55
M_CHA_DQ56
M_CHA_DQ57
M_CHA_DQ58
M_CHA_DQ59
M_CHA_DQ60
M_CHA_DQ61
M_CHA_DQ62
M_CHA_DQ63
DIMM_1
3
4
9
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
102195156627278
18
55
NC
RC1
RC0
NC/TEST
VSS
VSS
VSS
VSS
100
103
106
109
68
112
191
194
181
175
170535964197
VDD7
VSS
172
69
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
145
148
151
154
157
160
163
166
75
NC
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
115
VSS
118
121
124
127
130
133
136
139
142
187
VDDQ6
VSS
169
184
198
178
VDDQ7
VDDQ7
VSS
VSS
201
+3_3V
18967238
VDDQ8
VDDQ9
VSS
VSS
204
207
210
VSS
213
VDDSPD
VSS
4
42434849161
CB0
VSS
VSS
216
219
222
CB1
CB2
CK1#(CK0#)
VSS
VSS
225
228
162
167
CB3
CB4
CB5
CB6
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
SA0
SA1
SA2
VSS
VSS
VSS
VSS
231
234
237
168
CB7
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
57
A11
176
A12
196
A13
174
A14
173
A15
54
190
71
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
119
1
239
240
101
DDR2/BLACK
3
M_CHA_DQS0
~M_CHA_DQS0
M_CHA_DQS1
~M_CHA_DQS1
M_CHA_DQS2
~M_CHA_DQS2
M_CHA_DQS3
~M_CHA_DQS3
M_CHA_DQS4
~M_CHA_DQS4
M_CHA_DQS5
~M_CHA_DQS5
M_CHA_DQS6
~M_CHA_DQS6
M_CHA_DQS7
~M_CHA_DQS7
M_CHA_MA0
M_CHA_MA1
M_CHA_MA2
M_CHA_MA3
M_CHA_MA4
M_CHA_MA5
M_CHA_MA6
M_CHA_MA7
M_CHA_MA8
M_CHA_MA9
M_CHA_MA10
M_CHA_MA11
M_CHA_MA12
M_CHA_MA13
M_CHA_BA2
M_CHA_BA1
M_CHA_BA0
~M_CHA_WE
~M_CHA_CAS
~M_CHA_RAS
M_CHA_DM0
M_CHA_DM1
M_CHA_DM2
M_CHA_DM3
M_CHA_DM4
M_CHA_DM5
M_CHA_DM6
M_CHA_DM7
M_CHA_ODT0
M_CHA_ODT1
M_CHA_CKE0
M_CHA_CKE1
~M_CHA_CS0
~M_CHA_CS1
M_CHA_SCK0
~M_CHA_SCK0
M_CHA_SCK1
~M_CHA_SCK1
M_CHA_SCK2
~M_CHA_SCK2
VMAIN_SMB_CLK
VMAIN_SMB_AD
M_CHA_VREF
M_CHB_DQ[0..63] 9
M_CHA_DQS0 9
~M_CHA_DQS0 9
M_CHA_DQS1 9
~M_CHA_DQS1 9
M_CHA_DQS2 9
~M_CHA_DQS2 9
M_CHA_DQS3 9
~M_CHA_DQS3 9
M_CHA_DQS4 9
~M_CHA_DQS4 9
M_CHA_DQS5 9
~M_CHA_DQS5 9
M_CHA_DQS6 9
~M_CHA_DQS6 9
M_CHA_DQS7 9
~M_CHA_DQS7 9
M_CHA_MA[0..13] 9,13 M_CHB_MA[0..13] 9,13
M_CHA_BA[0..2] 9,13
~M_CHA_WE 9,13
~M_CHA_CAS 9,13
~M_CHA_RAS 9,13
M_CHA_DM[0..7] 9
M_CHA_ODT[0..1] 9,13
M_CHA_CKE[0..1] 9,13
~M_CHA_CS[0..1] 9,13
M_CHA_SCK0 9
~M_CHA_SCK0 9
M_CHA_SCK1 9
~M_CHA_SCK1 9
M_CHA_SCK2 9
~M_CHA_SCK2 9
VMAIN_SMB_CLK 15,22
VMAIN_SMB_AD 15,22
M_CHB_DQ10
M_CHB_DQ11
M_CHB_DQ12
M_CHB_DQ13
M_CHB_DQ14
M_CHB_DQ15
M_CHB_DQ16
M_CHB_DQ17
M_CHB_DQ18
M_CHB_DQ19
M_CHB_DQ20
M_CHB_DQ21
M_CHB_DQ22
M_CHB_DQ23
M_CHB_DQ24
M_CHB_DQ25
M_CHB_DQ26
M_CHB_DQ27
M_CHB_DQ28
M_CHB_DQ29
M_CHB_DQ30
M_CHB_DQ31
M_CHB_DQ32
M_CHB_DQ33
M_CHB_DQ34
M_CHB_DQ35
M_CHB_DQ36
M_CHB_DQ37
M_CHB_DQ38
M_CHB_DQ39
M_CHB_DQ40
M_CHB_DQ41
M_CHB_DQ42
M_CHB_DQ43
M_CHB_DQ44
M_CHB_DQ45
M_CHB_DQ46
M_CHB_DQ47
M_CHB_DQ48
M_CHB_DQ49
M_CHB_DQ50
M_CHB_DQ51
M_CHB_DQ52
M_CHB_DQ53
M_CHB_DQ54
M_CHB_DQ55
M_CHB_DQ56
M_CHB_DQ57
M_CHB_DQ58
M_CHB_DQ59
M_CHB_DQ60
M_CHB_DQ61
M_CHB_DQ62
M_CHB_DQ63
M_CHB_DQ0
M_CHB_DQ1
M_CHB_DQ2
M_CHB_DQ3
M_CHB_DQ4
M_CHB_DQ5
M_CHB_DQ6
M_CHB_DQ7
M_CHB_DQ8
M_CHB_DQ9
DIMM_2
3
4
9
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
DDR2 DIMM1 DDR2 DIMM2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
68
102195156627278
18
55
NC
RC1
RC0
NC/TEST
VSS
VSS
VSS
VSS
100
103
106
109
112
191
194
181
175
170535964197
75
NC
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD3
VDDQ0
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
115
118
121
124
VSS
127
130
133
136
139
142
145
148
VDDQ1
VSS
151
VDDQ2
VSS
154
VDDQ3
VSS
157
VDDQ4
VSS
160
69
163
172
VDDQ5
VDDQ4
VSS
VSS
166
187
169
2
184
VDDQ6
VDDQ7
VSS
VSS
198
18967238
178
VDDQ8
VDDQ7
VSS
VSS
201
204
VDDQ9
VSS
207
+3_3V P1V8STBY P1V8STBY
VSS
210
42434849161
VDDSPD
VSS
VSS
213
216
219
CB0
VSS
CB1
VSS
222
CB2
CB3
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(CK0#)
VSS
VSS
225
228
162
167
CB4
CB5
CB6
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A16/BA2
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
VREF
VSS
VSS
VSS
231
234
237
168
CB7
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
57
A11
176
A12
196
A13
174
A14
173
A15
54
190
BA1
71
BA0
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
SCL
119
SDA
1
239
SA0
240
SA1
101
SA2
DDR2/BLACK
M_CHB_DQS0
~M_CHB_DQS0
M_CHB_DQS1
~M_CHB_DQS1
M_CHB_DQS2
~M_CHB_DQS2
M_CHB_DQS3
~M_CHB_DQS3
M_CHB_DQS4
~M_CHB_DQS4
M_CHB_DQS5
~M_CHB_DQS5
M_CHB_DQS6
~M_CHB_DQS6
M_CHB_DQS7
~M_CHB_DQS7
M_CHB_MA0
M_CHB_MA1
M_CHB_MA2
M_CHB_MA3
M_CHB_MA4
M_CHB_MA5
M_CHB_MA6
M_CHB_MA7
M_CHB_MA8
M_CHB_MA9
M_CHB_MA10
M_CHB_MA11
M_CHB_MA12
M_CHB_MA13
M_CHB_BA2
M_CHB_BA1
M_CHB_BA0
~M_CHB_WE
~M_CHB_CAS
~M_CHB_RAS
M_CHB_DM0
M_CHB_DM1
M_CHB_DM2
M_CHB_DM3
M_CHB_DM4
M_CHB_DM5
M_CHB_DM6
M_CHB_DM7
M_CHB_ODT0
M_CHB_ODT1
M_CHB_CKE0
M_CHB_CKE1
~M_CHB_CS0
~M_CHB_CS1
M_CHB_SCK0
~M_CHB_SCK0
M_CHB_SCK1
~M_CHB_SCK1
M_CHB_SCK2
~M_CHB_SCK2
VMAIN_SMB_CLK
VMAIN_SMB_AD
M_CHB_VREF
+3_3V
M_CHB_DQS0 9
~M_CHB_DQS0 9
M_CHB_DQS1 9
~M_CHB_DQS1 9
M_CHB_DQS2 9
~M_CHB_DQS2 9
M_CHB_DQS3 9
~M_CHB_DQS3 9
M_CHB_DQS4 9
~M_CHB_DQS4 9
M_CHB_DQS5 9
~M_CHB_DQS5 9
M_CHB_DQS6 9
~M_CHB_DQS6 9
M_CHB_DQS7 9
~M_CHB_DQS7 9
M_CHB_BA[0..2] 9,13
~M_CHB_WE 9,13
~M_CHB_CAS 9,13
~M_CHB_RAS 9,13
M_CHB_DM[0..7] 9
M_CHB_ODT[0..1] 9,13
M_CHB_CKE[0..1] 9,13
~M_CHB_CS[0..1] 9,13
M_CHB_SCK0 9
~M_CHB_SCK0 9
M_CHB_SCK1 9
~M_CHB_SCK1 9
M_CHB_SCK2 9
~M_CHB_SCK2 9
1
ADDR.=1010000B(A0H) ADDR.=1010001B(A2H)
A A
P1V8STBY
PLACE CLOSE TO CH_A DIMMS
5
PLACE 0.1UF CAP CLOSE TO RESISTOR DIVIDER
R338 1K/4/1
R339
1K/4/1
M_CHA_VREF
C375
0.1u/16V/4
P1V8STBY
PLACE CLOSE TO CH_B DIMMS
4
3
PLACE 0.1UF CAP CLOSE TO RESISTOR DIVIDER
R362 1K/4/1
R363
1K/4/1
2
C414
0.1u/16V/4
M_CHB_VREF
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
DDR II DIMM 1 & 2
Rickles
1
12 40 Tuesday, February 24, 2004
X00
Page 13
CH A +0_9V DECOULPING CAPS
8
+0_9V
C402
0.1u/16V/4
C398
0.1u/16V/4
C397
0.1u/16V/4
C368
0.1u/16V/4
D D
PLACED AT LEFT AND RIGHT ENDS OF
VTT ISLAND
C399
0.1u/16V/4
C403
0.1u/16V/4
C396
0.1u/16V/4
+0_9V
C408
4.7u/10V/8
C441
4.7u/10V/8
+0_9V
P1V8STBY
+0_9V
C407
0.1u/16V/4
C370
0.1u/16V/4
C395
0.1u/16V/4
C371
0.1u/16V/4
C401
0.1u/16V/4
C369
0.1u/16V/4
C372
0.1u/16V/4
C440
4.7u/10V/8
C392
4.7u/10V/8
CH B +0_9V DECOULPING CAPS
+0_9V
C C
C452
0.1u/16V/4
C443
0.1u/16V/4
C447
0.1u/16V/4
C436
0.1u/16V/4
C442
0.1u/16V/4
C433
0.1u/16V/4
C439
0.1u/16V/4
+0_9V
P1V8STBY
C445
0.1u/16V/4
C451
0.1u/16V/4
C437
0.1u/16V/4
C449
0.1u/16V/4
C438
0.1u/16V/4
C435
0.1u/16V/4
C434
0.1u/16V/4
7
P1V8STBY
+
C464
1 2
1000u/6.3V/8*11.5
+
C465
1 2
1000u/6.3V/8*11.5
+
C1514
1 2
1000u/6.3V/8*11.5
6
5
~M_CHA_RAS 9,12
~M_CHA_CAS 9,12
~M_CHA_WE 9,12
M_CHA_MA[0..13] 9,12
M_CHA_BA[0..2] 9,12
~M_CHA_CS[0..1] 9,12
M_CHA_CKE[0..1] 9,12
M_CHA_ODT[0..1] 9,12
M_CHA_MA13
~M_CHA_RAS
~M_CHA_CAS
~M_CHA_WE
M_CHA_BA0
M_CHA_BA1
M_CHA_MA10
M_CHA_MA0
M_CHA_MA1
M_CHA_MA2
M_CHA_MA3
M_CHA_MA4
M_CHA_MA6
M_CHA_MA8
M_CHA_MA5
M_CHA_MA9
M_CHA_MA7
M_CHA_MA11
M_CHA_BA2
M_CHA_MA12
M_CHA_ODT1
~M_CHA_CS1
~M_CHA_CS0
M_CHA_CKE0
M_CHA_ODT0
M_CHA_CKE1
4
+0_9V
R330 33/4
R328 33/4
R313 33/4
R357 33/4
1 2
RN24
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
33/4/8P4R
RN26
33/4/8P4R
RN28
33/4/8P4R
RN30
33/4/8P4R
R335 40.2/4/1
R333 40.2/4/1
R332 40.2/4/1
R317 40.2/4/1
R336 40.2/4/1
R314 40.2/4/1
3
2
1
+0_9V
M_CHB_MA13
~M_CHB_CAS 9,12
~M_CHB_RAS 9,12
~M_CHB_WE 9,12
M_CHB_MA[0..13] 9,12
M_CHB_BA[0..2] 9,12
~M_CHB_CAS
~M_CHB_RAS
~M_CHB_WE
M_CHB_BA1
M_CHB_BA0
M_CHB_MA0
M_CHB_MA10
M_CHB_MA1
M_CHB_MA2
M_CHB_MA3
M_CHB_MA4
M_CHB_MA6
M_CHB_MA8
M_CHB_MA5
M_CHB_MA9
M_CHB_MA7
M_CHB_MA11
M_CHB_MA12
M_CHB_BA2
M_CHB_CKE1
M_CHB_CKE0
~M_CHB_CS1
~M_CHB_CS0
M_CHB_ODT1
M_CHB_ODT0
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN21
33/4/8P4R
RN23
33/4/8P4R
RN25
33/4/8P4R
RN27
33/4/8P4R
RN29
33/4/8P4R
R383 40.2/4/1
R382 40.2/4/1
R403 40.2/4/1
R411 40.2/4/1
R406 40.2/4/1
R407 40.2/4/1
~M_CHB_CS[0..1] 9,12
M_CHB_CKE[0..1] 9,12
M_CHB_ODT[0..1] 9,12
P5VAUX
R430
220/4
2 1
AUX_PWR
LED-Y_D5
B B
A A
C359
1u/10V/6
C357
1u/10V/6
C358
1u/10V/6
C360
1u/10V/6
C1524
1u/10V/6
C1526
1u/10V/6
C1528
1u/10V/6
8
P1V8STBY P1V8STBY
C412
1u/10V/6
C411
1u/10V/6
C418
1u/10V/6
C419
1u/10V/6
C1525
1u/10V/6
C1527
1u/10V/6
C1529
1u/10V/6
MSI
Title
Size Document Number Rev
7
6
5
4
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
DDR2 VTT DECOUPLING
Rickles
2
13 40 Tuesday, February 24, 2004
X00
1
Page 14
8
D D
C C
B B
7
EXP_MCH_G_P0 10
~EXP_MCH_G_P0 10
SDVO_CLK 10
EXP_MCH_G_P1 10
~EXP_MCH_G_P1 10
EXP_MCH_G_P2 10
~EXP_MCH_G_P2 10
EXP_MCH_G_P3 10
~EXP_MCH_G_P3 10
SDVO_DATA 10
EXP_MCH_G_P4 10
~EXP_MCH_G_P4 10
EXP_MCH_G_P5 10
~EXP_MCH_G_P5 10
EXP_MCH_G_P6 10
~EXP_MCH_G_P6 10
EXP_MCH_G_P7 10
~EXP_MCH_G_P7 10
EXP_MCH_G_P8 10
~EXP_MCH_G_P8 10
EXP_MCH_G_P9 10
~EXP_MCH_G_P9 10
EXP_MCH_G_P10 10
~EXP_MCH_G_P10 10
EXP_MCH_G_P11 10
~EXP_MCH_G_P11 10
EXP_MCH_G_P12 10
~EXP_MCH_G_P12 10
EXP_MCH_G_P13 10
~EXP_MCH_G_P13 10
EXP_MCH_G_P14 10
~EXP_MCH_G_P14 10
EXP_MCH_G_P15 10
~EXP_MCH_G_P15 10
~GPI_PEG_PRSNT 16
6
~EXP_MCH_G_P0
SDVO_CLK
~EXP_MCH_G_P1
EXP_MCH_G_P2
~EXP_MCH_G_P2
EXP_MCH_G_P3
~EXP_MCH_G_P3
SDVO_DATA
EXP_MCH_G_P4
~EXP_MCH_G_P4
EXP_MCH_G_P5
~EXP_MCH_G_P5
EXP_MCH_G_P6
~EXP_MCH_G_P6
EXP_MCH_G_P7
~EXP_MCH_G_P7
EXP_MCH_G_P8
~EXP_MCH_G_P8
EXP_MCH_G_P9
~EXP_MCH_G_P9
EXP_MCH_G_P10
~EXP_MCH_G_P10
EXP_MCH_G_P11
~EXP_MCH_G_P11
EXP_MCH_G_P12
~EXP_MCH_G_P12
EXP_MCH_G_P13
~EXP_MCH_G_P13
EXP_MCH_G_P14
~EXP_MCH_G_P14
EXP_MCH_G_P15
~EXP_MCH_G_P15
~GPI_PEG_PRSNT
PCI_SMB_CLK 19,22
PCI_SMB_AD 19,22
P3V3AUX
~EXP_WAKE 17
C195 0.1u/16V/4
C200 0.1u/16V/4
C204 0.1u/16V/4
C208 0.1u/16V/4
C212 0.1u/16V/4
C214 0.1u/16V/4
C219 0.1u/16V/4
C226 0.1u/16V/4
C237 0.1u/16V/4
C243 0.1u/16V/4
C250 0.1u/16V/4
C258 0.1u/16V/4
C263 0.1u/16V/4
C268 0.1u/16V/4
C281 0.1u/16V/4
C283 0.1u/16V/4
C287 0.1u/16V/4
C289 0.1u/16V/4
C294 0.1u/16V/4
C296 0.1u/16V/4
C298 0.1u/16V/4
C299 0.1u/16V/4
C304 0.1u/16V/4
C305 0.1u/16V/4
C307 0.1u/16V/4
C309 0.1u/16V/4
C311 0.1u/16V/4
C314 0.1u/16V/4
C317 0.1u/16V/4
C318 0.1u/16V/4
C327 0.1u/16V/4
C330 0.1u/16V/4
5
V_12P0_DIG
PCI_SMB_CLK
PCI_SMB_AD
+3_3V
~EXP_WAKE
EXP_MCH_G_P0_C EXP_MCH_G_P0
~EXP_MCH_G_P0_C
EXP_MCH_G_P1_C EXP_MCH_G_P1
~EXP_MCH_G_P1_C
EXP_MCH_G_P2_C
~EXP_MCH_G_P2_C
EXP_MCH_G_P3_C
~EXP_MCH_G_P3_C
EXP_MCH_G_P4_C
~EXP_MCH_G_P4_C
EXP_MCH_G_P5_C
~EXP_MCH_G_P5_C
EXP_MCH_G_P6_C
~EXP_MCH_G_P6_C
EXP_MCH_G_P7_C
~EXP_MCH_G_P7_C
EXP_MCH_G_P8_C
~EXP_MCH_G_P8_C
EXP_MCH_G_P9_C
~EXP_MCH_G_P9_C
EXP_MCH_G_P10_C
~EXP_MCH_G_P10_C
EXP_MCH_G_P11_C
~EXP_MCH_G_P11_C
EXP_MCH_G_P12_C
~EXP_MCH_G_P12_C
EXP_MCH_G_P13_C
~EXP_MCH_G_P13_C
EXP_MCH_G_P14_C
~EXP_MCH_G_P14_C
EXP_MCH_G_P15_C
~EXP_MCH_G_P15_C
4
3
2
1
PEG
B1
12V
B2
12V
B3
12V
B4
GND
B5
SMCLK
B6
SMDAT
B7
GND
B8
3.3V
B9
JTAG1
B10
3.3VAUX
B11
WAKE#
B12
RSVD
B13
GND
B14
HSOP0
B15
HSON0
B16
GND
B17
PRSNT2#
B18
GND
B19
HSOP1
B20
HSON1
B21
GND
B22
GND
B23
HSOP2
B24
HSON2
B25
GND
B26
GND
B27
HSOP3
B28
HSON3
B29
GND
B30
RSVD
B31
PRSNT2#
B32
GND
B33
HSOP4
B34
HSON4
B35
GND
B36
GND
B37
HSOP5
B38
HSON5
B39
GND
B40
GND
B41
HSOP6
B42
HSON6
B43
GND
B44
GND
B45
HSOP7
B46
HSON7
B47
GND
B48
PRSNT2#
B49
GND
B50
HSOP8
B51
HSON8
B52
GND
B53
GND
B54
HSOP9
B55
HSON9
B56
GND
B57
GND
B58
HSOP10
B59
HSON10
B60
GND
B61
GND
B62
HSOP11
B63
HSON11
B64
GND
B65
GND
B66
HSOP12
B67
HSON12
B68
GND
B69
GND
B70
HSOP13
B71
HSON13
B72
GND
B73
GND
B74
HSOP14
B75
HSON14
B76
GND
B77
GND
B78
HSOP15
B79
HSON15
B80
GND
B81
PRSNT2#
B82
RSVD
PRSNT1#
GND
JTAG2
JTAG3
JTAG4
JTAG5
PWRGD
GND
REFCLK+
REFCLK-
GND
HSIP0
HSIN0
GND
RSVD
GND
HSIP1
HSIN1
GND
GND
HSIP2
HSIN2
GND
GND
HSIP3
HSIN3
GND
RSVD
RSVD
GND
HSIP4
HSIN4
GND
GND
HSIP5
HSIN5
GND
GND
HSIP6
HSIN6
GND
GND
HSIP7
HSIN7
GND
RSVD
GND
HSIP8
HSIN8
GND
GND
HSIP9
HSIN9
GND
GND
HSIP10
HSIN10
GND
GND
HSIP11
HSIN11
GND
GND
HSIP12
HSIN12
GND
GND
HSIP13
HSIN13
GND
GND
HSIP14
HSIN14
GND
GND
HSIP15
HSIN15
GND
3.3V
3.3V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
V_12P0_DIG
NC_G_TCK
NC_G_TDI
NC_G_TDO
NC_G_TMS
+3_3V
~EXP_RST_SLOTS
EXP_CK_100M_16X
~EXP_CK_100M_16X
EXP_G_MCH_P0_C
~EXP_G_MCH_P0_C
EXP_G_MCH_P1_C
~EXP_G_MCH_P1_C
EXP_G_MCH_P2_C
~EXP_G_MCH_P2_C
EXP_G_MCH_P3_C
~EXP_G_MCH_P3_C
EXP_G_MCH_P4_C
~EXP_G_MCH_P4_C
EXP_G_MCH_P5_C
~EXP_G_MCH_P5_C
EXP_G_MCH_P6_C
~EXP_G_MCH_P6_C
EXP_G_MCH_P7_C
~EXP_G_MCH_P7_C
EXP_G_MCH_P8_C
~EXP_G_MCH_P8_C
EXP_G_MCH_P9_C
~EXP_G_MCH_P9_C
EXP_G_MCH_P10
~EXP_G_MCH_P10_C
EXP_G_MCH_P11_C
~EXP_G_MCH_P11_C
EXP_G_MCH_P12_C
~EXP_G_MCH_P12_C
EXP_G_MCH_P13_C
~EXP_G_MCH_P13_C
EXP_G_MCH_P14_C
~EXP_G_MCH_P14_C
EXP_G_MCH_P15_C
~EXP_G_MCH_P15_C
~EXP_RST_SLOTS 22
EXP_CK_100M_16X 15
~EXP_CK_100M_16X 15
EXP_G_MCH_P0_C 10
~EXP_G_MCH_P0_C 10
EXP_G_MCH_P1_C 10
~EXP_G_MCH_P1_C 10
EXP_G_MCH_P2_C 10
~EXP_G_MCH_P2_C 10
EXP_G_MCH_P3_C 10
~EXP_G_MCH_P3_C 10
EXP_G_MCH_P4_C 10
~EXP_G_MCH_P4_C 10
EXP_G_MCH_P5_C 10
~EXP_G_MCH_P5_C 10
EXP_G_MCH_P6_C 10
~EXP_G_MCH_P6_C 10
EXP_G_MCH_P7_C 10
~EXP_G_MCH_P7_C 10
EXP_G_MCH_P8_C 10
~EXP_G_MCH_P8_C 10
EXP_G_MCH_P9_C 10
~EXP_G_MCH_P9_C 10
EXP_G_MCH_P10_C 10
~EXP_G_MCH_P10_C 10
EXP_G_MCH_P11_C 10
~EXP_G_MCH_P11_C 10
EXP_G_MCH_P12_C 10
~EXP_G_MCH_P12_C 10
EXP_G_MCH_P13_C 10
~EXP_G_MCH_P13_C 10
EXP_G_MCH_P14_C 10
~EXP_G_MCH_P14_C 10
EXP_G_MCH_P15_C 10
~EXP_G_MCH_P15_C 10
12V
12V
PCIEX16CONN
A A
+3_3V P3V3AUX V_12P0_DIG +3_3V
C1693
0.1u/16V/4
C1694
0.1u/16V/4
C1695
0.1u/16V/4
PEG_CLIP
8
7
6
5
4
V_12P0_DIG
+
EC2
470u/16V/8*11.5
C1696
0.1u/16V/4
3
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
PCI EXPRESS X16
Rickles
2
14 40 Tuesday, February 24, 2004
1
X00
Page 15
8
7
6
5
4
3
2
1
Clock Generator - ICS954101
U13
42 43
CPU_VDD CPU0#
45
CPU_GND
21 19
SRC_VDD SRC1
28 22
SRC_VDD SRC2
34
SRC_VDD
C178
0.1u/16V/4
29
SRC_GND
37
VDDA
38
VSSA
1
PCI_VDD
2
PCI_GND
7
PCI_VDD
6
PCI_GND
11
48_VDD
13
48_GND
48
REF_VDD
51
REF_GND
46
SCLK
47
SDATA
18
FSA
16
FSB/TEST_MODE
53
FSC/TEST_SEL
ICS954101DF
VMAIN_SMB_CLK 12,22
VMAIN_SMB_AD 12,22
V3_SRC_CPU_CLKGEN
C170
0.1u/16V/4
+
C199
10u/10V/8
V_3P3_CLKPWR_L
+
C130
10u/10V/8
H_BSEL0 5,6,10
H_BSEL1 5,6,10
H_BSEL2 5,6,10
C201
0.1u/16V/4
C202
0.1u/16V/4
C185
0.1u/16V/4
C129
0.1u/16V/4
C132
0.1u/16V/4
C142
0.1u/16V/4
C156
0.1u/16V/4
+3_3V
D D
+3_3V
C C
B B
L32 FB80/6
C196
0.1u/16V/4
C179
0.1u/16V/4
L23 FB80/6
C197
0.1u/16V/4
C146
0.1u/16V/4
CPU0
CPU1
CPU1#
CPU2_ITP/SRC7
CPU2_ITP#/SRC7#
SRC1#
SRC2#
SRC3
SRC3#
SRC4_SATA
SRC4_SATA#
SRC5
SRC5#
SRC6
SRC6#
DOT96
DOT96#
PCIF0/ITP_EN
PCIF1
PCIF2
PCI0
PCI1
PCI2
PCI3
PCI4
PCI5
USB_48M
REF
VTT_PWRGD#/PD
IREF
X1
X2
Simulation
VCC
J1
SIM1
J2
SIM2
Trace length less than 0.5inchs
CK_100M_CPU_R
44
~CK_100M_CPU_R
CK_100M_MCH_R
41
~CK_100M_MCH_R
40
CK_100M_ITP/EXP_R
36
~CK_100M_ITP/EXP_R
35
20
23
CK_100M_SATA_R
24
~CK_100M_SATA_R
25
EXP_CK_100M_16X_R
26
~EXP_CK_100M_16X_R
27
EXP_CK_100M_ICH_R
31
~EXP_CK_100M_ICH_R
30
EXP_CK_100M_MCH_R
33
~EXP_CK_100M_MCH_R
32
CK_96M_DOT_R
14
~CK_96M_DOT_R
15
8
PCI_CK_33M_ICH_R
9
PCI_CK_33M_LAN_R
10
PCI_CK_33M_SIO_R
54
PCI_CK_33M_FWH_R
55
PCI_CK_33M_SLT1_R
56
3
4
PCI_CK_33M_1394_R PCI_CK_33M_1394
5
CK_48M_ICH_R
12
CK_14M_SPLIT_R CK_14M_ICH
52
CK410_XTAL_OUT
50
49
CK410_XTAL_IN
~CK_VTT_POWERGOOD
17
IREF
39
R116 33/4
R121 33/4
R128 33/4
R131 33/4
R138 33/4
R142 33/4
R124 33/4
R127 33/4
R1531 8.2K/4
R108 33/4
R113 33/4
R1467 33/4
R120 33/4
7 8
5 6
3 4
1 2
X14MHZ
14M/32p/HC49S-D
R1364 475/4/1
R151 33/4
R156 33/4
R165 33/4
R169 33/4
R170 33/4
R172 33/4
R157 33/4
R166 33/4
7 8
5 6
3 4
1 2
RN37
15/4/8P4R
56p/50V/4 C133
56p/50V/4 C134
~CK_100M_CPU
CK_100M_MCH
~CK_100M_MCH
CK_100M_ITP
~CK_100M_ITP
CK_100M_SATA
~CK_100M_SATA
EXP_CK_100M_16X
~EXP_CK_100M_16X
EXP_CK_100M_ICH
~EXP_CK_100M_ICH
EXP_CK_100M_MCH
~EXP_CK_100M_MCH
CK_96M_DOT
~CK_96M_DOT
V_3P3_CLKPWR_L
PCI_CK_33M_ICH
PCI_CK_33M_LAN
RN36
33/4/8P4R
CK_48M_ICH
CK_14M_AUD_CODEC
CK_14M_SIO
Clock Generator VTT Power Down Block
SOT23EBC
Q33
2N2222S
ECB
+CPUCORE
R179 220/4
CK_96M_DOT 10
~CK_96M_DOT 10
PCI_CK_33M_SIO
PCI_CK_33M_FWH
PCI_CK_33M_SLT1
CK_48M_ICH 17
CK_14M_AUD_CODEC 23
CK_14M_SIO 22
CK_14M_ICH 17
R1365
V_3P3_CLKPWR_L ~CK_VTT_POWERGOOD
8.2K/4
CK_100M_CPU 5
~CK_100M_CPU 5
CK_100M_MCH 8
~CK_100M_MCH 8
CK_100M_ITP 5,25
~CK_100M_ITP 5,25
CK_100M_SATA 17
~CK_100M_SATA 17
EXP_CK_100M_16X 14
~EXP_CK_100M_16X 14
EXP_CK_100M_ICH 16
~EXP_CK_100M_ICH 16
EXP_CK_100M_MCH 10
~EXP_CK_100M_MCH 10
PCI_CK_33M_ICH 16
PCI_CK_33M_LAN 20
PCI_CK_33M_SIO 22
PCI_CK_33M_FWH 19
PCI_CK_33M_SLT1 19
PCI_CK_33M_1394 21
CK_100M_CPU
~CK_100M_CPU
~CK_100M_MCH
CK_100M_ITP
~CK_100M_ITP
CK_100M_SATA
~CK_100M_SATA
EXP_CK_100M_16X
~EXP_CK_100M_16X
EXP_CK_100M_ICH
~EXP_CK_100M_ICH
EXP_CK_100M_MCH
~EXP_CK_100M_MCH
CK_96M_DOT
~CK_96M_DOT
MH1
1
2
(NPTH)
3
4
8
9
GNDCLP1
1
2
(NPTH)
3
4
8
9 10
GNDCLIP
R117 49.9/4/1
R122 49.9/4/1
R129 49.9/4/1
R132 49.9/4/1
R139 49.9/4/1
R143 49.9/4/1
R150 49.9/4/1
R155 49.9/4/1
R164 49.9/4/1
R168 49.9/4/1
R171 49.9/4/1
R173 49.9/4/1
R158 49.9/4/1
R167 49.9/4/1
R123 49.9/4/1
R126 49.9/4/1
Mounting Holes
5
6
7
GNDCLP2
5
1
2
3
(NPTH)
4
9 10
GNDCLIP
5
6
7
8
6
7
Optics Orientation Holes
FM1
FM2 FM3
FM6
FM7
FM12
FM11
FM16
FM15
PCI_CK_33M_SLT1
PCI_CK_33M_FWH CK_100M_MCH CK_100M_CPU
CK_48M_ICH
PCI_CK_33M_SIO
PCI_CK_33M_1394
PCI_CK_33M_LAN
PCI_CK_33M_ICH
CK_96M_DOT
~CK_96M_DOT
CK_14M_AUD_CODEC
CK_14M_SIO
CK_14M_ICH
EMC HF filter capacitors
GNDCLP3
1
2
(NPTH)
3
4
GNDCLIP
FM8
FM13
FM17
CK_48M_ICH
5
6
7
8
9 10
FM4
FM9
FM14
FM18
FM5
FM10
GNDCLP4
1
2
3
GNDCLIP
(NPTH)
4
X_10p/50V/4 C135
X_10p/50V/4 C137
X_10p/50V/4 C168
X_10p/50V/4 C143
X_10p/50V/4 C1682
X_10p/50V/4 C157
X_10p/50V/4 C151
X_10p/50V/4 C169
X_10p/50V/4 C173
X_10p/50V/4 C1645
X_10p/50V/4 C1646
X_10p/50V/4 C1647
X_10p/50V/4 C1648
5
6
7
8
9 10
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
CLOCK GEN ICS954101
Rickles
2
15 40 Tuesday, February 24, 2004
X00
1
Page 16
8
D D
C C
~PCI_RST 20,22
B B
A A
8
R373 22/4
~GPI_FRONT_CABLE_DET 28
~GPI_AUD_CABLE_DET 23
~GPI_AUD_CABLE_DET
~GPI_FRONT_CABLE_DET
~GPI_PEG_PRSNT
~GPI_HS_DET
~GPI_PEG_PRSNT 14
~PCI_INTA 19
~PCI_INTB 19
~PCI_INTC 19,21
~PCI_INTD 19,20
7
PCI_AD[31..0] 19,20,21
~PCI_C/BE[0..3] 19,20,21
~PCI_DEVSEL 19,20,21
~PCI_FRAME 19,20,21
~PCI_IRDY 19,20,21
~PCI_TRDY 19,20,21
~PCI_STOP 19,20,21
PCI_PAR 19,20,21
~PCI_LOCK 19
~PCI_SERR 19,20,21
~PCI_PERR 19,20,21
~PCI_PME 19,20,21
PCI_CK_33M_ICH 15
~PCI_REQ_[0..3] 19,20,21
~GPI_PEG_PRSNT
~GPI_HS_DET 10
~PCI_GNT_[0..2] 19,20,21
~GPI_HS_DET
+3_3V
~GPI_FRONT_CABLE_DET
~GPI_AUD_CABLE_DET
IDE_IRQ14 25
R368 8.2K/4
R470 8.2K/4
R305 8.2K/4
R349 8.2K/4
7
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
~PCI_C/BE0
~PCI_C/BE1
~PCI_C/BE2
~PCI_C/BE3
~PCI_REQ_0
~PCI_REQ_1
~PCI_REQ_2
~PCI_REQ_3
R1532 8.2K/4
~PCI_GNT_0
~PCI_GNT_1
~PCI_GNT_2
GPI_SKU0
GPI_SKU1
SERIRQ 22
+3_3V
AB20
AB16
E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4
J5
K2
K5
D4
L6
G3
H4
H2
H5
B3
M6
B2
K6
K3
A5
L1
K4
J6
H6
G4
G2
C3
J3
A3
J2
J1
E1
C5
G5
E3
P6
G6
R2
L5
B5
M5
B8
F7
E8
B7
C1
B6
F1
C8
E7
F6
D8
N2
L2
M1
L3
D9
C7
C6
M3
6
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#
PCICLK
PCIRST#
REQ0#
REQ1#
REQ2#
REQ3#
GPI40/REQ4#
GPI1/REQ5#
GPI0/REQ6#
GNT0#
GNT1#
GNT2#
GNT3#
GPO48/GNT4#
GPO17/GNT5#
GPO16/GNT6#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
GPI2/PIRQE#
GPI3/PIRQF#
GPI4/PIRQG#
GPI5/PIRQH#
SERIRQ
IDEIRQ
VSS_0
VSS_1
VSS_2
A1
A12
A15
A19
6
VSS_3
VSS_4
A21
VSS_5
A23
PCI INTERFACE INTERRUPT
PART 1/3
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
A26A4A7A9AA11
AA13
AA16
AA4
5
ICH 6
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
AB1
AB10
AB19
AB2
AB7
AB9
5
VSS_20
AC10
VSS_21
AC12
AC22
VSS_22
VSS_23
AC23
AC24
CPU LAN PCI EXPRESS DIRECT MEDIA
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
AC26
AC3
AC6
AD1
AD10
AD15
AD18
AD2
GPO49/CPUPWRGD
VSS_33
VSS_34
VSS_35
VSS_36
AD24
AD6
AE10
AE11
AE12
4
U20A
A20M#
CPUSLP#
FERR#
IGNNE#
INIT3_3V#
STPCLK#
A20GATE
THRMTRIP#
PLTRST#
PERN_1
PERP_1
PETN_1
PETP_1
PERN_2
PERP_2
PETN_2
PETP_2
PERN_3
PERP_3
PETN_3
PETP_3
PERN_4
PERP_4
PETN_4
PETP_4
DMI_0RXN
DMI_0RXP
DMI_0TXN
DMI_0TXP
DMI_1RXN
DMI_1RXP
DMI_1TXN
DMI_1TXP
DMI_2RXN
DMI_2RXP
DMI_2TXN
DMI_2TXP
DMI_3RXN
DMI_3RXP
DMI_3TXN
DMI_3TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
VSS_37
VSS_38
VSS_39
VSS_40
AE2
AE21
AE25
4
INIT#
INTR
NMI
SMI#
RCIN#
ICH6_716
AF23
AE27
AF24
AG26
AF27
AE22
AG24
AF25
AG27
AE26
AD23
AF22
AE23
AG25
R5
H25
H24
G27
G26
K25
K24
J27
J26
M25
M24
L27
L26
P24
P23
N27
N26
T25
T24
R27
R26
V25
V24
U27
U26
Y25
Y24
W27
W26
AB24
AB23
AA27
AA26
AD25
AC25
F24
F23
F12
B11
E12
E11
C13
C12
C11
E13
D12
F13
D11
B12
~ICH_PLT_RST
DMI_COMP
3
R376 22/4
R367 24.9/4/1
3
~H_A20M 5
~H_CPUSLP 5
~H_FERR 5,6
~H_IGNNE 5
~H_INIT 5
~ICH_INIT3_3V 19
H_INTR 5
H_NMI 5
~H_SMI 5
~H_STPCLK 5
~KB_RST 22
~KB_GATE_A20 22
~H_THRMTRP 5,6
H_PWRGOOD 5,6
~PLT_RST
~DMI_MCH_ICH_P0 10
DMI_MCH_ICH_P0 10
~DMI_ICH_MCH_P0 10
DMI_ICH_MCH_P0 10
~DMI_MCH_ICH_P1 10
DMI_MCH_ICH_P1 10
~DMI_ICH_MCH_P1 10
DMI_ICH_MCH_P1 10
~DMI_MCH_ICH_P2 10
DMI_MCH_ICH_P2 10
~DMI_ICH_MCH_P2 10
DMI_ICH_MCH_P2 10
~DMI_MCH_ICH_P3 10
DMI_MCH_ICH_P3 10
~DMI_ICH_MCH_P3 10
DMI_ICH_MCH_P3 10
~EXP_CK_100M_ICH 15
EXP_CK_100M_ICH 15
V_1P5B_ICH 18
MSI
Title
Size Document Number Rev
Date: Sheet of
2
~PLT_RST 8,19,21,22,28
Maybe remove later
+3_3V
X_10K/4
R344 220/4
R342 220/4
GPI_SKU0
GPI_SKU1
MICRO-STAR INt'L CO., LTD.
Intel ICH6 - PCI & DMI & CPU & IRQ
Rickles
2
R1470
R1471
X_10K/4
16 40 Tuesday, February 24, 2004
1
X00
1
Page 17
8
7
6
5
4
3
2
1
LPC_AD[0..3] 19,22
D D
Place 33ohm
resistors
close to
ICH6.
C C
B B
~LPC_DRQ0 22
~LPC_FRAME 19,22
AC97_BITCLK 23
~AC97_RESET_MDC 24
~AC97_RESET 23
AC97_SDATA_IN 23
AC97_SDATA_IN_MDC 24
AC97_SDATA_OUT_MDC 24
AC97_SDATA_OUT 23
AC97_SYNC_MDC 24
AC97_SYNC 23
~USB_OC012 26
~USB_OC3 24
~USB_OC45 28
~USB_OC67 26
VAUX_SMB_CLK 22
~ICH_RSMRST 22
~ICH_PWRBTN 28
3P3V_PWRGOOD 8,22
~PB_RESET 28
~SIO_PWUREQ 22
C386 0.1u/16V/4
C384 0.1u/16V/4
C389 0.1u/16V/4
C382 0.1u/16V/4
R352 22.6/4/1
VAUX_SMB_AD 22
R1369 10K/4
~ICH_SLP_S3 22,30,31
~ICH_SLP_S4 22,30,31
~EXP_WAKE 14
~ICH_SYNC 8
ICH_SPKR 25
CK_14M_ICH 15
CK_48M_ICH 15
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
~LPC_FRAME
AC97_BITCLK
R1488 33/4 Cfg-A = X
R351 33/4
R1489 33/4 Cfg-A = X
R350 33/4
R1490 33/4 Cfg-A = X
R348 33/4
USB_P0- 26
USB_P0+ 26
USB_P1- 26
USB_P1+ 26
USB_P2- 26
USB_P2+ 26
USB_P3- 24
USB_P3+ 24
USB_P4- 28
USB_P4+ 28
USB_P5- 28
USB_P5+ 28
USB_P6- 26
USB_P6+ 26
USB_P7- 26
USB_P7+ 26
USB_RBIAS
VAUX_SMB_CLK
VAUX_SMB_AD
~ICH_SMBALERT
ICH_SMLINK0
ICH_SMLINK1
~ICH_LINKALERT
~ICH_RSMRST
LAN_RST#
3P3V_PWRGOOD
ICH_VRM_PWRGD
~PB_RESET
TP_SUSCLK
TP1
~ICH_INTRUDER
~EXP_WAKE
~SIO_PWUREQ
ICH_THRM
~ICH_SYNC
ICH_SPKR
ICH_TP0
TP_1
TP_2
TP_3
TP_4
AF21
AC20
AG21
AD27
AE24
P2
N3
N5
N4
N6
P4
P3
C10
A10
F11
F10
B10
C9
B9
C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14
C27
B27
B26
C26
C23
D23
C25
C24
B22
A22
Y4
W5
W6
W4
U6
Y5
Y3
V5
U1
AA1
U2
T4
T5
T6
W3
V6
AA3
U5
T2
F8
V2
U3
E10
A27
LAD0/FB0
LAD1/FB1
LAD2/FB2
LAD3/FB3
LDRQ_0#
LDRQ_1#/GPI41
LFRAME#/FB4
ACZ_BIT_CLK
ACZ_RST#
ACZ_SDIN_0
ACZ_SDIN_1
ACZ_SDIN_2
ACZ_SDOUT
ACZ_SYNC
USBP_0N
USBP_0P
USBP_1N
USBP_1P
USBP_2N
USBP_2P
USBP_3N
USBP_3P
USBP_4N
USBP_4P
USBP_5N
USBP_5P
USBP_6N
USBP_6P
USBP_7N
USBP_7P
OC_0#
OC_1#
OC_2#
OC_3#
GPI9/OC_4#
GPI10/OC_5#
GPI14/OC_6#
GPI15/OC_7#
USBRBIAS
USBRBIAS#
SMBCLK
SMBDATA
GPI11/SMBALERT#
SMLINK_0
SMLINK_1
LINKALERT#
RSMRST#
LAN_RST#
PWRBTN#
PWROK
VRMPWRGD
SYS_RESET#
SLP_S3#
SLP_S4#
SLP_S5#
LPCPD#/SUSSTAT#
SUSCLK
INTRUDER#
WAKE#
RI#
THRM#
MCH_SYNC#
SPKR
BATLOW#/TP_0
DPSLP#/TP2
TP_3
DPRSLP#/TP_4
CLK14
CLK48
ICH 6
PART 2/3
MISC POWER MGNT SM BUS USB AC-LINK LPC
P-ATA S-ATA
GPIO RTC
GPIO26/SATA_0GP
GPIO29/SATA_1GP
GPIO30/SATA_2GP
GPIO31/SATA_3GP
BMBUSY/GPI6
STP_PCI#/GPO18
STP_CPU#/GPO20
CLKRUN#/GPIO32
DDACK#
DDREQ
DIOR#
DIOW#
IORDY
DCS1#
DCS3#
DD_0
DD_1
DD_2
DD_3
DD_4
DD_5
DD_6
DD_7
DD_8
DD_9
DD_10
DD_11
DD_12
DD_13
DD_14
DD_15
SATA_0RXN
SATA_0RXP
SATA_0TXN
SATA_0TXP
SATA_1RXN
SATA_1RXP
SATA_1TXN
SATA_1TXP
SATA_2RXN
SATA_2RXP
SATA_2TXN
SATA_2TXP
SATA_3RXN
SATA_3RXP
SATA_3TXN
SATA_3TXP
SATA_CLKN
SATA_CLKP
SATARBIAS#
SATARBIAS
SATALED#
GPI7
GPI8
GPI12
GPI13
GPO19
GPO21
GPO23
GPIO24
GPIO25
GPIO27
GPIO28
GPIO33
GPIO34
VCCRTC
INTVRMEN
RTCRST# DPRSLPVR/TP_1
RTCX1
RTCX2
AB15
AB14
AE16
AC14
AF16
AC16
DA0
AB17
DA1
AC17
DA2
AD16
AE17
AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13
AE3
AD3
AG2
AF2
AC5
AD5
AF4
AG4
AD7
AC7
AF6
AG6
AC9
AD9
AF8
AG8
AC2
AC1
AG11
AF11
AC19
AF17
AE18
AF18
AG18
AD19
AE19
R1
M2
R6
AC21
AB21
AD22
AD20
AD21
V3
P5
R3
T3
AF19
AF20
AC18
AB3
AA5
AA2 AE20
Y1
Y2
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
SATA_BIAS
R449 24.9/4/1
~SATA_HDLED
~GPI_VGA_CABLE_DET
ICH_GPI29
ICH_GPI30
ICH_GPI31
~GPI_MODEM_CABLE_DET
GPI_IDE_P66_DET
ICH_GPI8
GPI_1394_CABLE
ICH_GPI13
ICH_2P5_EN
~LOM_LOWPWR
INTVRMEN
R444 390K/4
~RTCRST
ICH_RTCX1
X32KHZ
32.768K/12.5p
ICH_RTCX2
~IDE_PDDACK 25
IDE_PDDREQ 25
~IDE_PDIOR 25
~IDE_PDIOW 25
IDE_PIORDY 25
IDE_PDA0 25
IDE_PDA1 25
IDE_PDA2 25
~IDE_PDCS1 25
~IDE_PDCS3 25
IDE_PDD[0..15] 25
SATA_0_RX-_C 25
SATA_0_RX+_C 25
SATA_0_TX- 25
SATA_0_TX+ 25
~CK_100M_SATA 15
CK_100M_SATA 15
~SATA_HDLED 22
~GPI_VGA_CABLE_DET 27
~GPI_MODEM_CABLE_DET 23
GPI_IDE_P66_DET 25
~GPI_1394_CABLE 24
GPO_DIAG_DATA 28
GPO_DIAG_CLK 28
~LOM_LOWPWR 20
V_3P0_BAT
V_3P0_BAT
10p/25V/4 C432
R426
10M/6
10p/25V/4 C431
ICH6 STRAPPING RESISTORS
ALL COMPONENTS CLOSE TO ICH6
Trace length is less than 3inchs to ICH6.
ICH_SMLINK0
ICH_SMLINK1
~ICH_LINKALERT
ICH_TP0
~ICH_SMBALERT
~PB_RESET
~SIO_PWUREQ
~LOM_LOWPWR
~EXP_WAKE
ICH_2P5_EN
ICH_GPI8
ICH_GPI13
~GPI_VGA_CABLE_DET
ICH_GPI29
ICH_GPI30
ICH_GPI31
ICH_SPKR
~GPI_MODEM_CABLE_DET
ICH_THRM
ICH_VRM_PWRGD
~ICH_RSMRST
~ICH_INTRUDER
R448 10K/4
R379 10K/4
R432 10K/4
R410 10K/4
R429 10K/4
R413 10K/4
R377 10K/4
R1523 8.2K/4
R414 1K/4
R374 1K/4
R375 10K/4
R372 10K/4
R462 27K/4
R452 8.2K/4
R450 8.2K/4
R451 8.2K/4
R347 X_2.7K/4
R1512 8.2K/4
R453 8.2K/4
R454 8.2K/4
R476 8.2K/4
R428 1M/4
P3V3AUX
P3V3AUX
V_3P0_BAT
P3V3AUX
+3_3V
+3_3V
V_3P0_BAT
3
R441 220K/4
C471
1u/10V/6
Close to Pin AA2 of ICH6.
CLEAR CMOS JUMPER
CMOS
CLEAR
BAT54C D17
2
P3V3AUX
1
1PS226
D16
1
2
BAR43FILM/SOT23
~RTCRST
C467
0.1u/25V/8
~RTCRST
3
R1368
100/4
DEFAULT
NORMAL
(1-2) JBAT1
R503 1K/4
PH1*3/BLACK
JBAT1
BATTERY
SIO_VBAT
1
2
3
CLEAR
(2-3)
B1
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
U20B
ICH6_716
A A
~H_PB_RESET 5,25
R412 is for proto only , place it close to ICH6
8
R412 0/4
AE6
AE7
Cfg-STD = X
Cfg-A = X
7
AF1
AF12
AF26
AF3
~PB_RESET
AF7
AG1
AG12
AG14
AG17
AG20
AG22
AG3
AG7
B13
B15
B19
B21
B23
B25
C14
C18
C20
C22C4D1
D10
D13
D14
D18
D20
D22D7E14
E15
E18
E19
6
VSS_85
E25
F17
F19
F22F4G1
G12
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
5
4
3
Date: Sheet of
2
Intel ICH6 - LPC & ATA & USB & GPIO
Rickles
17 40 Tuesday, February 24, 2004
1
X00
Page 18
8
V_1P5B_ICH
C426
0.1u/16V/4
C454
0.1u/16V/4
C429
0.1u/16V/4
PLACE THESE CAPS NEAR
F27,P27,AB27
D D
V_1P5B_ICH 16
+1_5V
C C
B B
A A
L44
0.47uH/1210/1.1A
PLACE THESE CAPS AT ENDS OF POWER
CORRIDORS
+1_5V
C485 0.1u/16V/4
C404 0.01u/16V/4
C483 0.01u/16V/4
C417 0.1u/16V/4
C486 0.01u/16V/4
C480 0.1u/16V/4
C481 0.1u/16V/4
C410 0.1u/16V/4
C405 0.1u/16V/4
C406 0.01u/16V/4
C482 0.1u/16V/4
C381 0.1u/16V/4
8
220u/10V/6.3*7
+1_5V
C428
+
AA22
AA23
AA24
AA25
AB25
AB26
AB27
W21
W22
AA19
AA20
AA21
G22
G23
G24
G25
H21
H22
K21
K22
M21
M22
N21
N22
N23
N24
N25
P21
P25
P26
P27
R21
R22
T21
T22
U21
U22
V21
V22
Y21
Y22
AA6
AB4
AB5
AB6
AC4
AD4
AE4
AE5
AG5
AF5
AA7
AA8
AA9
AB8
AC8
AD8
AE8
AE9
AF9
AG9
M11
M17
P11
P17
T11
T17
U11
U12
U14
U16
U17
D24
D25
D26
D27
E20
E21
E22
E23
E24
F20
G20
F25
F26
F27
J21
J22
L21
L22
L11
L12
L14
L16
L17
G8
F9
7
VCCDMIPWR-1
VCCDMIPWR-2
VCCDMIPWR-3
VCCDMIPWR-4
VCCDMIPWR-5
VCCDMIPWR-6
VCCDMIPWR-7
VCCDMIPWR-8
VCCDMIPWR-9
VCCDMIPWR-10
VCCDMIPWR-11
VCCDMIPWR-12
VCCDMIPWR-13
VCCDMIPWR-14
VCCDMIPWR-15
VCCDMIPWR-16
VCCDMIPWR-17
VCCDMIPWR-18
VCCDMIPWR-19
VCCDMIPWR-20
VCCDMIPWR-21
VCCDMIPWR-22
VCCDMIPWR-23
VCCDMIPWR-24
VCCDMIPWR-25
VCCDMIPWR-26
VCCDMIPWR-27
VCCDMIPWR-28
VCCDMIPWR-29
VCCDMIPWR-30
VCCDMIPWR-31
VCCDMIPWR-32
VCCDMIPWR-33
VCCDMIPWR-34
VCCDMIPWR-35
VCCDMIPWR-36
VCCDMIPWR-37
VCCDMIPWR-38
VCCDMIPWR-39
VCCDMIPWR-40
VCCDMIPWR-41
VCCDMIPWR-42
VCCDMIPWR-43
VCCDMIPWR-44
VCCDMIPWR-45
VCC1_5-3
VCC1_5-4
VCC1_5-5
VCC1_5-6
VCC1_5-7
VCC1_5-8
VCC1_5-9
VCC1_5-10
VCC1_5-11
VCC1_5-12
VCC1_5-13
VCC1_5-14
VCC1_5-15
VCC1_5-16
VCC1_5-17
VCC1_5-18
VCC1_5-19
VCC1_5-20
VCC1_5-21
VCC1_5-22
VCC1_5-23
VCC1_5-24
VCC1_5-25
VCC1_5-26
VCC1_5-27
VCC1_5-28
VCC1_5-29
VCC1_5-30
VCC1_5-31
VCC1_5-32
VCC1_5-33
VCC1_5-34
VCC1_5-35
VCC1_5-36
VCC1_5-37
VCC1_5-38
VCC1_5-39
VCC1_5-40
VCC1_5-41
VCC1_5-42
VCC1_5-43
VCC1_5-44
VCC1_5-45
VCC1_5-46
VCC1_5-47
VCC1_5-48
VCC1_5-49
VCC1_5-50
VCC1_5-51
VCC1_5-52
VCC1_5-53
VCC1_5-54
U20C
ICH6_716
7
VSS_167
VSS_168
Y27
Y6
VSS_165
VSS_166
Y26
6
1.5V DMI POWER 1.5V CORE WELL POWER
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
T16
T23
T26
T27T7U13
U15
U23
U24
U25
V23
V26
V27V4W1
W23
W24
W25W7Y23
6
ICH 6
PART 3/3
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
R14
R15
R16
R17
R23
R24
R25R4T1
T12
T13
T14
T15
5
VSS_131
VSS_132
R12
R13
5
VSS_129
VSS_130
P22
R11
VSS_127
VSS_128
P15
P16
VSS_125
VSS_126
P13
P14
VSS_122
VSS_123
VSS_124
N17N7P12
VSS_120
VSS_121
N15
N16
VSS_118
VSS_119
N13
N14
VSS_116
VSS_117
N11
N12
4
S0 POWER MISC S5 POWER
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
M16
M23
M26
M27M4N1
4
VCCLAN3_3-1/VCCSUS3_3-1
VCCLAN3_3-2/VCCSUS3_3-2
VCCLAN3_3-3/VCCSUS3_3-3
VCCLAN3_3-4/VCCSUS3_3-4
VCC_CPU_IO-1
VCC_CPU_IO-2
VCC_CPU_IO-3
VCCA3GBG/VCC3_3
VSSA3GBG/VSS
VCCASATABG/VCC3_3
VSSASATABG/VSS
VCCAUBG/VCCSUS3_3
VSSAUBG/VSS
VCCSUS3_3-1
VCCSUS3_3-2
VCCSUS3_3-3
VCCSUS3_3-4
VCCSUS3_3-5
VCCSUS3_3-6
VCCSUS3_3-7
VCCSUS3_3-8
VCCSUS3_3-9
VCCSUS3_3-10
VCCSUS3_3-11
VCCSUS3_3-12
VCCSUS3_3-13
VCCSUS3_3-14
VCCSUS3_3-15
VCCSUS3_3-16
VCCSUS3_3-17
VCCSUS3_3-18
VCCSUS3_3-19
VCCSUS1_5-1
VCCSUS1_5-2
VCCSUS1_5-3
VCC1_5-1/VCCSUS1_5
VCC1_5-2/VCCSUS1_5
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
L15
L23
L24
L25
M12
M13
M14
M15
V5REF1
V5REF2
VCC3_3-1
VCC3_3-2
VCC3_3-3
VCC3_3-4
VCC3_3-5
VCC3_3-6
VCC3_3-7
VCC3_3-8
VCC3_3-9
VCC3_3-10
VCC3_3-11
VCC3_3-12
VCC3_3-13
VCC3_3-14
VCC3_3-15
VCC3_3-16
VCC3_3-17
VCC3_3-18
VCC3_3-19
VCC3_3-20
VCC2_5-2
VCC2_5-4
VCCDMIPLL
VCCSATAPLL
VCCUSBPLL
V5REF_SUS
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_97
VSS_98
VSS_99
VSS_100
K23
K26
K27K7L13
VSS_96
K1
A8
AA18
AA10
AA12
AA14
AA15
AA17
AC15
AD17
AG13
AG16
AG19
A6
B1
E4
H1
H7
J7
L4
L7
M7
P1
A13
F14
G13
G14
AB18
P7
AB22
AD26
AG23
E26
E27
AG10
AF10
A24
B24
AC27
AE1
A25
F21
A11
U4
V1
V7
W2
Y7
A17
B17
C16
C17
D16
E16
F15
F16
F18
G15
G16
G17
G18
R7
U7
G19
G10
G11
G21
G7
G9
H23
H26
H27
J23
J24
J25
J4
3
V_5P0_REF_ICH
C490
0.1u/16V/4
VTT_OUT
C492
0.1u/16V/4
PLACE NEAR E26
C1540
X_0.1u/16V/4
C1542 0.01u/16V/4
VCCDMIPLL
C459 X_0.01u/16V/4
C1543 X_0.01u/16V/4
C385 X_0.01u/16V/4
C427
0.1u/16V/4
V_1P5_AUX_B
V_1P5_AUX_C
V_1P5_AUX_A
3
C479 0.01u/16V/4
C478 0.01u/16V/4
C377 0.01u/16V/4
2
+3_3V
P3V3AUX
V_2P5_ICH
VTT_OUT 5,6,22,25,29,32
PLACE NEAR ONE OF PINS:
AB22,AD26 OR AG23
+3_3V
+3_3V
C1541
X_0.1u/16V/4
PLACE NEAR A24
R417 1/4/1
P3V3AUX
PLACE NEAR AG10
P3V3AUX
+1_5V
+1_5V
+1_5V
P5VAUX
MSI
Title
Size Document Number Rev
Date: Sheet of
2
5VREF Sequencing Circuit
D11
1
3
2
BAR43FILM/SOT23
V_5P0_REF_ICH
+3_3V
P3V3AUX
220u/10V/6.3*7
VCCDMIPLL
R306 1K/4
C364 1u/10V/6
PLACE THESE CAPS AT ENDS OF POWER
CORRIDORS
C425 0.1u/16V/4
C422 0.1u/16V/4
C487 0.1u/16V/4
C489 0.1u/16V/4
C488 0.1u/16V/4
C423 0.1u/16V/4
PLACE THESE CAPS AT ENDS OF POWER
CORRIDORS
C379 0.1u/16V/4
C475 0.1u/16V/4
C383 0.1u/16V/4
C484 0.1u/16V/4
C378 0.1u/16V/4
C380 0.1u/16V/4 L45 1uH/8/0.5A
C470
10u/10V/8
P3V3AUX
+
1 2
EC3
MICRO-STAR INt'L CO., LTD.
Intel ICH6 - POWER
Rickles
1
VCC +3_3V
18 40 Tuesday, February 24, 2004
1
X00
Page 19
8
7
6
5
4
3
2
1
PCI SLOT 1 (PCI VER: 2.2 COMPLY)
-12V
PCI1
B1
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B2
B3
B4
B5
B6
B7
B8
B9
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V
PCICONN
RESERVED
+5V(I/O)
RESERVED
RESERVED
+5V(I/O)
RESERVED
FRAME#
TRDY#
STOP#
SDONE
C/BE#0
+5V(I/O)
REQ64#
TCK
D D
C C
B B
VCC
~PCI_INTB
~PCI_INTD
+3_3V
PCI_CK_33M_SLT1 15
~PCI_REQ_1 16
PCI_AD31 16,20,21
PCI_AD29 16,20,21
PCI_AD27 16,20,21
PCI_AD25 16,20,21
~PCI_C/BE3 16,20,21
PCI_AD23 16,20,21
PCI_AD21 16,20,21
PCI_AD19 16,20,21
PCI_AD17 16,20,21
~PCI_C/BE2 16,20,21
~PCI_IRDY 16,20,21
~PCI_DEVSEL 16,20,21
~PCI_LOCK 16
~PCI_PERR 16,20,21
~PCI_SERR 16,20,21
~PCI_C/BE1 16,20,21
PCI_AD14 16,20,21
PCI_AD12 16,20,21
PCI_AD10 16,20,21
PCI_AD8 16,20,21
PCI_AD7 16,20,21
PCI_AD5 16,20,21
PCI_AD3 16,20,21
PCI_AD1 16,20,21
ACK#64 REQ#64
IDSEL = AD16
MASTER = ~PCI_REQ_1
TRST#
+12V
TMS
INTA#
INTC#
GND
GND
RST#
GNT#
GND
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
AD22
AD20
GND
AD18
AD16
+3.3V
GND
GND
+3.3V
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
+3.3V
AD6
AD4
GND
AD2
AD0
+5V
+5V
+3.3
+5V
+5V
V_12P0_DIG
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
TRST#
TMS
TDI
~PCI_INTA
~PCI_INTC
+3_3V
~PCI_RST_SLOTS 22
~PCI_GNT_1 16
~PCI_PME 16,20,21
ID1
R1370 300/4
PCI_SMB_CLK
PCI_SMB_AD
VCC
P3V3AUX
PCI_AD30 16,20,21
PCI_AD28 16,20,21
PCI_AD26 16,20,21
PCI_AD24 16,20,21
PCI_AD22 16,20,21
PCI_AD20 16,20,21
PCI_AD18 16,20,21
PCI_AD16 16,20,21
~PCI_FRAME 16,20,21
~PCI_TRDY 16,20,21
~PCI_STOP 16,20,21
PCI_PAR 16,20,21
PCI_AD15 16,20,21
PCI_AD13 16,20,21
PCI_AD11 16,20,21
PCI_AD9 16,20,21
~PCI_C/BE0 16,20,21
PCI_AD6 16,20,21
PCI_AD4 16,20,21
PCI_AD2 16,20,21
PCI_AD0 16,20,21
0.1u/16V/4
PCI_AD16
PCI_SMB_CLK 14,22
PCI_SMB_AD 14,22
P3V3AUX
C1727
-12V +3_3V V_12P0_DIG +3_3V +3_3V +3_3V VCC VCC
C1699
0.1u/16V/4
C1700
0.1u/16V/4
C1701
0.1u/16V/4
+3_3V
LPC_AD0 17,22
LPC_AD1 17,22
LPC_AD2 17,22
C1702
0.1u/16V/4
R504 4.7K/4
R505 4.7K/4
C1703
0.1u/16V/4
FIRMWARE HUB (FWH)
+3_3V
U28_X1
1
2
3
4
5
6
7
8
9
10
FWH_ID0
C553
0.1u/16V/4
11
12
13
14
15
16 17
BIOS_4Mbit
C554
0.1u/16V/4
FWH RESISTORS
GPI_BRD_REV1
GPI_BRD_REV0
C1704
0.1u/16V/4
C555
C1705
0.1u/16V/4
VCC
FGPI4
IC(VIL)
GNDA
VCCA
GND
VCC
INIT#
FWH4
RFU
RFU
RFU
RFU
RFU
0.1u/16V/4
VPP
RST#
FGPI3
FGPI2
FGPI1
FGPI0
WP#
TBL#
ID3
ID2
ID1
ID0
FWH0
FWH1
FWH2
GND FWH3
+3_3V
32
31
CLK
30
29
28
27
26
25
24
23
22
21
20
19
18
C552
0.1u/16V/4
R524 X_4.7K/4
R523 2.7K/4
R521 X_4.7K/4
R522 2.7K/4
C1706
0.1u/16V/4
GPI_BRD_REV1 GPI_BRD_REV0
+3_3V +3_3V +3_3V +3_3V +3_3V
VCC
R525
4.7K/4
~ICH_INIT3_3V 16
~LPC_FRAME 17,22
LPC_AD3 17,22
C1499
4.7u/10V/8
+3_3V
+3_3V
+
EC4
X_470u/10V/6.3*11
PCI_CK_33M_FWH 15 ~PLT_RST 8,16,21,22,28
+3_3V
+3_3V
+
EC5
X_1000u/6.3V/8*11.5
~PCI_INTA
PCI PULL-UP / DOWN RESISTORS
~PCI_REQ_1
~PCI_REQ_3 16
~PCI_REQ_0 16,20
~PCI_REQ_2 16,21
A A
8
~PCI_REQ_3
~PCI_REQ_0
~PCI_REQ_2 ~PCI_INTB
1 2
VCC
3 4
RN41
5 6
2.7K/4/8P4R
7 8
~PCI_DEVSEL
~PCI_TRDY
~PCI_IRDY
~PCI_FRAME
~PCI_SERR
~PCI_PERR
~PCI_LOCK
~PCI_STOP
7
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
~PCI_INTA 16
~PCI_INTC 16,21
~PCI_INTD 16,20
~PCI_INTB 16
RN43
2.7K/4/8P4R
RN44
2.7K/4/8P4R
6
VCC
VCC
~PCI_INTA
~PCI_INTC
~PCI_INTD
REQ#64
ACK#64
TDI
TMS
TRST#
TCK
+3_3V
7 8
5 6
3 4
1 2
R1371 4.7K/4
R1372 4.7K/4
RN45
4.7K/4/8P4R
1 2
3 4
5 6
7 8
5
RN42
8.2K/4/8P4R
VCC
Proto type only , be
depop for production.
4
LPC DEBUG PORT
R510
0/4
Cfg-STD = X
Cfg-A = X
3
+3_3V VCC
LPC
~PLT_RST
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
~LPC_FRAME
Title
Size Document Number Rev
Date: Sheet of
1 2
3 4
5
7 8
9 10
11 12
13 14
BH2*7/2mm
Cfg-STD = X
Cfg-A = X
MSI
MICRO-STAR INt'L CO., LTD.
PCI & FWH & LPC DEBUG PORT
2
6
Rickles
~ICH_INIT3_3V PCI_CK_33M_LPC_HDR PCI_CK_33M_FWH
FWH_ID0
19 40 Tuesday, February 24, 2004
1
X00
Page 20
8
7
6
5
4
3
2
1
BROADCOM BCM4401KQL LOM
IDSEL = PCI_AD23
MASTER = ~PCI_REQ_0 / ~PCI_GNT_0
INT = ~PCI_INTD
D D
PCI_AD[31..0] 16,19,21
C C
~PCI_C/BE[3:0] 16,19,21
~PCI_FRAME 16,19,21
~PCI_IRDY 16,19,21
~PCI_TRDY 16,19,21
~PCI_DEVSEL 16,19,21
~PCI_STOP 16,19,21
~PCI_PERR 16,19,21
~PCI_SERR 16,19,21
PCI_PAR 16,19,21
~PCI_INTD 16,19
B B
PCI_AD23
R1461
300/4
R1462 1K/4
A A
CLKRUN#
PCI_CK_33M_LAN 15
C1643
27p/50V/4
~PCI_GNT_0 16
~PCI_REQ_0 16,19
~PCI_PME 16,19,21
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
~PCI_C/BE3
~PCI_C/BE2
~PCI_C/BE1
~PCI_C/BE0
~LAN_PCI_RST
Y1
25M/18p/HC49S-D
L_XI
XOXO
R1464
200/4
C1644
27p/50V/4
U38
122
PCI_AD31
123
PCI_AD30
124
PCI_AD29
126
PCI_AD28
127
PCI_AD27
128
PCI_AD26
1
PCI_AD25
3
PCI_AD24
6
PCI_AD23
8
PCI_AD22
9
PCI_AD21
10
PCI_AD20
11
PCI_AD19
14
PCI_AD18
15
PCI_AD17
16
PCI_AD16
33
PCI_AD15
34
PCI_AD14
36
PCI_AD13
37
PCI_AD12
38
PCI_AD11
39
PCI_AD10
41
PCI_AD9
42
PCI_AD8
45
PCI_AD7
48
PCI_AD6
49
PCI_AD5
50
PCI_AD4
51
PCI_AD3
53
PCI_AD2
54
PCI_AD1
55
PCI_AD0
4
PCI_CBE_L3
18
PCI_CBE_L2
32
PCI_CBE_L1
43
PCI_CBE_L0
20
PCI_FRAME_L
21
PCI_IRDY_L
23
PCI_TRDY_L
26
PCI_DEVSEL_L
27
PCI_STOP_L
28
PCI_PERR_L
29
PCI_SERR_L
31
PCI_PAR_L
116
PCI_INT_L
117
PCI_RST_L
118
PCI_CLK
119
PCI_GNT_L
121
PCI_REQ_L
113
PCI_PME_L
5
PCI_IDSEL
22
PCI_CLKRUN_L
67
XTAL_IN
66
XTAL_OUT
BCM4401KQL/LQFP-128
P3V3AUX
1142556
P3V3AUX P3V3AUX VCC18_LAN
115
125193040527106799465969791921121744
VESD
VESD
VESD
VDDIO_PCI
VDDIO_PCI
VSS
1246111
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VSS
VSS
VSS
VSS
10084224741347
VDDIO
VDDIO_PCI
VSS
VSS
VSS
VDDIO
VDDIO
VSS
VSS
120
XTAL_AVDD
REGULATOR_AVDD
VSS
VSS
35
VDDCORE
VDDCORE
REGULATOR_AVDD
REGULATOR_VOUT1
REGULATOR_VOUT2
EPHY_BIAS_AVDD
EPHY_TESTMODE
GPIO2/VAUXAVAIL
XTAL_AVSS
EPHY_BIAS_AVSS
EPHY_AGND
EPHY_PLLGND
687058
63
VDDCORE
EPHY_LED_L0
EPHY_LED_L1
EPHY_LED_L2
EPHY_LED_L3
EPHY_AVDD
EPHY_PLLVDD
EPHY_VREF
EPHY_VDAC
EPHY_TDP
EPHY_TDN
EPHY_RDP
EPHY_RDN
GPIO1
GPIO0
BOOTROM_SCL
BOOTROM_SDA
SPROM_CS
SPROM_CLK
SPROM_DOUT
SPROM_DIN
EXT_POR_L
JTAG_TDP
JTAG_TCK
JTAG_TDI
JTAG_TRST_L
JTAG_TMS
75
76
77
78
69
57
64
71
72
88
62
61
59
60
104
NC
105
NC
103
NC
108
NC
102
NC
109
NC
110
NC
107
NC
87
86
85
90
93
98
95
101
99
89
83
80
82
73
81
Note:EXT_POR_L is an
active low signal used
to place the BCM4401L
into IDDQ mode, <5mA
current consumption
CB14
0.1u/16V/4
CB16
0.1u/16V/4
CB18
0.1u/16V/4
CB20
0.1u/16V/4
CB22
0.1u/16V/4
10_LED#
100_LED#
TR_LED
R1452 1.27K/6/1
TR_D0+
R1442 49.9/4/1
TR_D0-
R1443 49.9/4/1
TR_D1+
R1444 49.9/4/1
TR_D1-
R1445 49.9/4/1
R1453 0/4
VAUX
R1455 1K/4
EE_CS
EE_CLK
EE_DO
EE_DI
EXT_POR_L
S
P3V3AUX P3V3AUX
C1636
0.1u/16V/4
R1460 4.7K/4
D
Q57
D
X_2N7002S
G S
R1515
G
X_1K/4
~LOM_LOWPWR
L = Power Apply
H = Power off
CB15
0.1u/16V/4
CB17
0.1u/16V/4
CB19
0.1u/16V/4
CB21
0.1u/16V/4
CB23
0.1u/16V/4
AVDD
C1635
0.1u/16V/4
FB19 FB80/6
FB20 FB80/6
C1637
1000p/16V/4
C1666 0.1u/16V/4
C1667 0.1u/16V/4
P3V3AUX
~LOM_LOWPWR 17
P3V3AUX
FB18 FB80/6
0.1u/16V/4
C1638
2.2u/16V/8
P3V3AUX
CB3
0.1u/16V/4
CB5
0.1u/16V/4
CB7
0.1u/16V/4
CB9
10u/10V/8
CB11
0.1u/16V/4
C1634
VCC18_LAN
P3V3AUX
VCC18_LAN
CB4
0.1u/16V/4
CB6
0.1u/16V/4
CB8
0.1u/16V/4
CB10
0.1u/16V/4
CB12
0.1u/16V/4
LAN Decoupling Capacitors
Close chipset, and trace length is less than 20mils.
LAN EEPROM
U36
1
CS
2
SK
3
DI
4
DO
AT93C46/1M/SOIC8
~PCI_RST 16,22
8
VCC
7
NC
6
ORG
5
GND
R1466 X_0/4
D18
1
2
BAT54A-S-SOT23
SOT23
3
~GPO_LAN_RST 22
EE_CS
EE_CLK
EE_DO
EE_DI
LAN CONNECTOR
P3V3AUX
P3V3AUX
P3V3AUX
100_LED#
10_LED#
TR_LED
R1450
150/4
R1509
8.2K/4
P3V3AUX
R1458 150/4
X_1000p/16V/4 C1639
X_1000p/16V/4 C1640
R1463
150/4
P3V3AUX
C1641 0.1u/16V/4
C1642
X_1000p/16V/4
R1508
1K/4
R1468 4.7K/4
~LAN_PCI_RST
TR_D0+
TR_D0ÂTR_D1+
TR_D1-
P3V3AUX
CB1
0.1u/16V/4
+3_3V
NIC_USB2B
GREEN
19
ORANGE
20
13
18
12
17
11
16
10
15
9
14
AMBER
21
22
RJ45(10/100)+USB*2
10/100 LAN PN:22F0051-S42
POWER
TD1+
TD1ÂTD2+
TD2ÂTD3+
TD3ÂTD4+
TD4-
GND
LEFT RIGHT
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
BROADCOM BCM4401KQL LOM
Rickles
2
20 40 Tuesday, February 24, 2004
1
X00
Page 21
5
4
3
2
1
FB30
FB80/8
PTPA0+
PTPA0ÂPTPB0+
PTPB0-
L54
X_CMC_90ohm_0603
4 3
L55
X_CMC_90ohm_0603
4 3
IEEE1394a Interface
Trace width 5 mils & 7.5 mils space.
Trace mismatch < 150 mils.
Maintain 110 +/- 6 ohm differential
impedance.
J3
IEEE1394-6-S
7
SHLD
1
PWR
6
TPA+
5
TPA-
4
TPB+
3
TPB-
2
GND
8
SHLD
9
SHLD
PTPB0ÂPTPB0+
PTPA0ÂPTPA0+
D14
A C
MBRS340
C1577
1000p/16V/4
FB33 0/4
FB34 0/4
FB35 0/4
FB36 0/4
TPBIAS1
R1472
56.2/4/1
R1474
5.11K/4/1
C1651
220p/25V/4
TPBIAS0
R1406
56.2/4/1
R1409
5.11K/4/1
C1581
220p/25V/4
VCC_BUS
1 2
1 2
1394a OHCI Link Layer Controller
IDSEL = PCI_AD26
MASTER = ~PCI_REQ_2 / ~PCI_GNT_2
INT = ~PCI_INTC
D D
All components
Cfg-A= X in this
page.
FB5
FB60/8
+3_3V
C C
B B
PCI_AD26
C1574
0.1u/16V/4
PCI_AD[31..0] 16,19,20
~PCI_C/BE[3:0] 16,19,20
R1414 300/4
PCI_CK_33M_1394 15
~PCI_GNT_2 16
~PCI_REQ_2 16,19
~PCI_PME 16,19,20
1 2
C1575
1000p/16V/4
~PLT_RST 8,16,19,22,28
C1571
0.1u/16V/4
PCI_AD[31..0]
~PCI_C/BE[3:0]
PME Support for Low Power Modes
C1572
X_0.1u/16V/4
R1402 220/4
R1403 4.7K/4
+3_3V
10u/10V/8
C1576
~PCI_FRAME 16,19,20
~PCI_IRDY 16,19,20
~PCI_TRDY 16,19,20
~PCI_DEVSEL 16,19,20
~PCI_STOP 16,19,20
~PCI_PERR 16,19,20
~PCI_SERR 16,19,20
PCI_PAR 16,19,20
~PCI_INTC 16,19
~PLT_RST
PCI_CK_33M_1394
~PCI_GNT_2
~PCI_REQ_2
R1420 10K/4
R1421 X_0/4
C1573
1000p/16V/4
1 2
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
~PCI_C/BE3
~PCI_C/BE2
~PCI_C/BE1
~PCI_C/BE0
~PCI_FRAME
~PCI_IRDY
~PCI_TRDY
~PCI_DEVSEL
~PCI_STOP
~PCI_PERR
~PCI_SERR
PCI_PAR
~PCI_INTC
54
55
103
104
118
120
121
122
124
125
127
128
10
11
13
14
29
31
33
34
35
37
38
39
42
44
45
47
48
49
50
52
15
28
41
17
18
20
21
22
24
25
26
109
53
112
114
115
108
117
5
6
8
9
2
4
CYCLEOUT
CYCLEIN
PLL_VDD
PLLGND
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CBE3
CBE2
CBE1
CBE0
FRAME
IRDY
TRDY
DEVSEL
STOP
PERR
SERR
PAR
INTA
IDSEL
PCIRST#
PCI_CLK
GNT#
REQ#
CLKRUN#
PME#
+3_3V
AVDD3_3V
R1401
4.7K/4
VCC
463016
3
1166168
VDDP
VDDP
VDDP
VDDP
VDDP
PHY_TEST_MA
TSB43AB23
REG_EN#
REG18
DGND
DGND
DGND
DGND
DGND
REG18
126
107
DGND
112233236435166113
7072859093987
81
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
DGND
DGND
DGND
DGND
AGND
AGND
AGND
1197173
76
AGND
80
FB25
FB80/8
1927405665
DVDD
DVDD
AGND
AGND
848997
DVDD
DVDD
GROM_SCL
GROM_SDA
AGND
+3_3V
1 2
1 2
111
123
U34
DVDD
DVDD
DVDD
DVDD
R1479 470/4
62
PC2
R1480 470/4
63
PC1
R1481 8.2K/4
64
PC0
100
RI0
99
RI1
91
TPB2N
92
TPB2P
94
TPA2N
95
TPA2P
96
TPBIAS2
82
TPB1N
83
TPB1P
86
TPA1N
87
TPA1P
88
TPBIAS1
74
TPB0N
75
TPB0P
77
TPA0N
78
TPA0P
79
TPBIAS0
106
XO
105
XI
69
CPS
67
CNA
59
60
101
FILTER0
102
FILTER1
57
GPIO3
58
GPIO2
110
G_RST#
TSB43AB23/SPQFP-128
C1657
0.1u/16V/4
C1559
0.1u/16V/4
C1561
0.01u/16V/4
C1563
0.01u/16V/4
C1565
0.01u/16V/4
C1567
1000p/16V/4
C1569
1000p/16V/4
R1404 6.34K/4/1
R1405 1K/4
R1477 1K/4
C1579
1u/10V/6
TPB1ÂTPB1+
TPA1ÂTPA1+
TPBIAS1
TPB0ÂTPB0+
TPA0ÂTPA0+
TPBIAS0
C1584 0.1u/16V/4
R1418 220/4
R1419 220/4
~G_RST
X1
24.576M/16p/HC49S-D
1 2
AVDD3_3V
GROM_SCL
GROM_SDA
R1478 47K/4
C1659
0.1u/16V/4
AVDD3_3V
1 2
1 2
+3_3V
C1582 22p/50V/4
C1583 22p/50V/4
R1413 4.7K/4
R1416
220/4
R1417
220/4
C1658
0.1u/16V/4
C1560
0.1u/16V/4
C1562
0.01u/16V/4
C1564
0.01u/16V/4
C1566
0.01u/16V/4
C1568
1000p/16V/4
C1570
1000p/16V/4
+3_3V
+3_3V
V_12P0_DIG
F1
1.5A_miniSMDM150/24
+
EC1
470u/16V/8*11.5
PLACE CLOSE TO 1394 connector
TPB0-
TPB0+
TPA0-
TPA0+
R1475
56.2/4/1
R1476
56.2/4/1
R1473
56.2/4/1
C1650
1u/10V/6
TPA1+
TPA1+ 24
TPA1-
TPA1- 24
TPB1+
TPB1+ 24
TPB1-
TPB1- 24
PLACE CLOSE TO TSB43AB23
TPA0+
TPA0-
TPB0+
TPB0-
C1578
1u/10V/6
R1410
56.2/4/1
R1411
56.2/4/1
R1407
56.2/4/1
A A
C1587
0.1u/16V/4
C1586
0.1u/16V/4
5
R1422
470/4
4
3
2
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
1394 - TSB43AB23
Rickles
21 40 Tuesday, February 24, 2004
1
X00
Page 22
8
SERIRQ 16
~PLT_RST
PCI_CK_33M_SIO
SERIRQ
~LPC_DRQ0
~LPC_FRAME
~SIO_LPCPD
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
~ICH_RSMRST
3P3V_PWRGOOD
~PWR_PS_ON
~SIO_PCI_RST_SLOTS
~SIO_EXP_RST_SLOTS
~SIO_IDE_PRST
FAN_PWM
D2_SIO_CATHODE
D2_SIO_ANODE
H_THRM_CATHODE
H_THRM_ANODE
SIO_TACH3
SIO_TACH2
~FAN_TACH
~H_PROCHOT
SIO_GREEN_LED
SIO_YELLOW_LED
CK_14M_SIO
VAUX_SMB_CLK
VAUX_SMB_AD
VMAIN_SMB_CLK
VMAIN_SMB_AD
PCI_SMB_CLK
PCI_SMB_AD
~SIO_PWUREQ
~KB_GATE_A20
~KB_RST
~IDE_HDLEDP
~GPI_PSWD
~SATA_HDLED
GPI_FAN_ID
SYSOPT0
~GPO_LAN_RST
~CPU_PSNT
~FNT_HDLED
DB_SW
R420 0/4
~ICH_SLP_S4
~ICH_SLP_S3
~PLT_RST 8,16,19,21,28
PCI_CK_33M_SIO 15
~LPC_DRQ0 17
~LPC_FRAME 17,19
LPC_AD0 17,19
D D
C C
B B
LPC_AD1 17,19
LPC_AD2 17,19
LPC_AD3 17,19
~ICH_RSMRST 17
3P3V_PWRGOOD 8,17
~PWR_PS_ON 28
FAN_PWM 28
~FAN_TACH 28
~H_PROCHOT 5,6
SIO_GREEN_LED 28
SIO_YELLOW_LED 28
CK_14M_SIO 15
VAUX_SMB_CLK 17
VAUX_SMB_AD 17
VMAIN_SMB_CLK 12,15
VMAIN_SMB_AD 12,15
PCI_SMB_CLK 14,19
PCI_SMB_AD 14,19
~SIO_PWUREQ 17
~KB_GATE_A20 16
~KB_RST 16
~IDE_HDLEDP 25
~SATA_HDLED 17
GPI_FAN_ID 28
~GPO_LAN_RST 20
~FNT_HDLED 28
PS_PWRGOOD 28
~ICH_SLP_S4 17,30,31
~ICH_SLP_S3 17,30,31
PASSWORD CLEAR JUMPER
+3_3V
A A
8.2K/4
~GPI_PSWD
PSWD
1
2
3
PH1*3/BLACK
DEFAULT
NORMAL CLEAR
(2-3) PSWD
8
(1-2)
R440 0/4
7
LPC SUPER I/O 47M584
U22
16
PCI_RESET#
18
PCI_CLK
1
SER_IRQ
15
LDRQ#
14
LFRAME#
17
LPC_PD#
10
LAD0
11
LAD1
12
LAD2
13
LAD3
60
RSMRST#/GP84
59
PWR_GD_3V/GP83
58
LATCHED_BF_CUT/GP82
56
BACKFEED_CUT/GP81
55
PS_ON/GP80
54
PCI_RST_SLOTS/GP77
53
PCI_RST_SYS/GP76
52
IDE_RSTDRV/GP75
51
PWM3
50
PWM2
49
PWM1/TEST_OUT
46
REMOTE2-
45
REMOTE2+
44
REMOTE1-
43
REMOTE1+
41
TACH3
40
TACH2
39
TACH1
38
PROCHOT_IO#
27
GREEN/GP61
26
YELLOW/GP60
9
CLK_14M
29
SCLK/GP34
32
SDATA/GP26
28
SCLK_1/GP35/LED1
31
SDAT_1/GP27/IO_SMI#
30
SCLK_2/GP43/DDRC
33
SDAT_2/GP25
113
GP57/DTR2#
112
GP56/CTS2#
110
GP55/RTS2#
108
GP54/DSR2#
111
GP53/TXD2
109
GP52/RXD2
107
GP51/DCD2#
114
GP50/RI2#
25
GP42/IO_PME#
121
GP37/A20M
120
GP36/KBDRST#
8
GP33/PRIMARY_HD#
7
GP32
5
GP31/SECONDARY_HD#
4
GP30/SCSI#
35
GP24/SYSOPT0
21
GP23/INTRD_OUT#
36
GP20/P17/THERM#
2
GP17
128
CPU_PSNT#/GP15
127
GP14/HD_LED#
126
DB_SW/GP13
125
PWRGD_PS/GP12
124
SLP_S5#/GP11
123
SLP_S3#/GP10
LPC47M584/QFP128
Place close to SIO
+3_3V
0.1u/16V/4
7
6
DRVDEN0/GP40
DRVDEN1/GP41
INDEX#
MTR#0
DS#1/GP21/P16
DS#0
MTR#1/GP22/P12
DIR#
STEP#
WDATA#
WGATE#
TRACK0#
WP#
RDATA#
HEAD#
DSKCHG#
SLCT
BUSY
ACK#
SLCTIN#
INIT#
ERR#
ALF#
STB#
RI#1
RXD1
CTS#1
DCD#1
DSR#1
TXD1
RTS#1
DTR#1/SYSOPT1
MDATA
MCLK
KDATA
KCLK
INTRD_IN#
VCC6
VCC34
VCC79
VCC106
VCC122
VCCP
VBAT
VTR24
VTR57
HVTR
VSS3
VSS19
VSS37
VSS61
VSS69
VSS92
VSS119
AVSS
HVSS
+3_3V
C457
0.1u/16V/4
6
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PE
0.1u/16V/4
C476
78
77
76
75
74
73
72
71
70
68
67
66
65
64
63
62
91
90
89
88
87
86
85
84
80
81
82
83
93
94
95
96
97
105
100
103
98
99
102
101
104
118
117
116
115
~SIO_INTRD_IN
22
6
34
79
106
122
48
23
24
57
47
3
19
37
61
69
92
119
20
42
C456
R1505 10K/4
R1506 10K/4
~SER1_RI
SER1_SIN
~SER1_CTS
~SER1_RLSD
~SER1_DSR
SER1_SOUT
~SER1_RTS
~SER1_DTR
+3_3V
R494 0/4
P3V3AUX
0.1u/16V/4
C524
0.1u/16V/4
1 2
3 4
5 6
7 8
7 8
5 6
3 4
1 2
C539
0.1u/16V/4
C534
0.1u/16V/4
C503
5
+3_3V
RN46
10K/4/8P4R
RN47
10K/4/8P4R
+3_3V
R465 390K/4
C507
1u/10V/6
VTT_OUT 5,6,18,25,29,32
C509
0.1u/16V/4
C528 X_0.1u/16V/4
C458
0.1u/16V/4
C510
0.1u/16V/4
0.1u/16V/4
5
SIO_VBAT
C504
+3_3V
+3_3V
SIO_VBAT
0.1u/16V/4
+
1 2
P3V3AUX
C512
C521
22u/25V/5*11
4
C532,R1491 should be
placed near the SIO
~PCI_RST 16,20
VCC
COM_SER1_SOUT
COM_SER1_DSR
COM_SER1_CTS
COM_SER1_RI
COM_SER1_RLSD
COM_SER1_RTS
COM_SER1_SIN
COM_SER1_DTR
STRAPPING RESISTOR
SIO_TACH3
SIO_TACH2
~GPO_LAN_RST
~SIO_LPCPD
SERIRQ
FAN_PWM
~GPI_AUD_PCSPK_DET
~KB_GATE_A20
~KB_RST
3P3V_PWRGOOD
4
SYSOPT0
~CPU_PSNT
DB_SW
R489 8.2K/4
R488 8.2K/4
R1 1K/4
R461 4.7K/4
R439 8.2K/4
R298 X_4.7K/4
R443 8.2K/4
R423 2.7K/4
R424 2.7K/4
R480 4.7K/4
R418 220/4 R447
R419 4.7K/4
R422 8.2K/4
3
C532
2200p/16V/4
R1491
1K/4
~PCI_RST
~SIO_PCI_RST_SLOTS ~PCI_RST_SLOTS
~SIO_EXP_RST_SLOTS ~EXP_RST_SLOTS
H_THRM_CATHODE
H_THRM_ANODE
D2_SIO_ANODE
D2_SIO_CATHODE
R530 X_0/4
R497 33/4
R496 33/4
R495 33/4
SERIAL PORT 1
2
4
6
8
2
4
6
8
U39
20
VCC
2
RIN1
3
RIN2
4
RIN3
7
RIN4
9
RIN5
16
DIN1
15
DIN2
13
DIN3
11
GND
75232/SSOP20
CN8
180p/50V/6/8P4C
CN9
180p/50V/6/8P4C
+3_3V
V+
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
DOUT1
DOUT2
DOUT3
V-
COM_SER1_RLSD
COM_SER1_SIN
COM_SER1_SOUT
COM_SER1_DTR
C453 X_0.01u/16V/4
VAUX_SMB_CLK
VAUX_SMB_AD
C468 X_0.01u/16V/4
VMAIN_SMB_AD
VMAIN_SMB_CLK
PCI_SMB_CLK
PCI_SMB_AD
MSI
Title
Size Document Number Rev
Date: Sheet of
C1690 0.1u/16V/4
COM_SER1_RLSD ~SER1_RLSD
COM_SER1_SIN
COM_SER1_DSR
COM_SER1_CTS
COM_SER1_RI
SER1_SOUT
~SER1_DTR
~SER1_RTS
1
3
5
7
1
3
5
7
3
2
H_THRM_CATHODE 5
H_THRM_ANODE 5
~PCI_RST_SLOTS 19
~IDE_PRST ~SIO_IDE_PRST
+12COM
1
19
SER1_SIN
18
~SER1_DSR
17
~SER1_CTS
14
~SER1_RI
12
COM_SER1_SOUT
5
COM_SER1_DTR
6
COM_SER1_RTS
8
-12COM
10
~EXP_RST_SLOTS 14
~IDE_PRST 25
D26 1N4148S
C1691 0.1u/16V/4
D27 1N4148S
C1692 0.1u/16V/4
10 11
COM1
1
6
2
7
3
8
4
9
5
COMCONN
R427 2.7K/4
R431 2.7K/4
R471 2.7K/4
R467 2.7K/4
R445 4.7K/4
R442 4.7K/4
V_12P0_DIG
-12V
COM_SER1_DSR
COM_SER1_RTS
COM_SER1_CTS
COM_SER1_RI
P3V3AUX
+3_3V
P3V3AUX
MICRO-STAR INt'L CO., LTD.
LPC SUPER I/O & CONNECTORS
Rickles
2
1
22 40 Tuesday, February 24, 2004
1
X00
Page 23
AD1986 - POP R1543,DEPOP R1544
, R55,R1492 = 0 ohm.
AD1980 - POP R1544,DEPOP R1543
, R55,R1492 = 33 ohm.
Place
R1492,R55,R1493
close to U9.
C1707 X_10p/25V/4
CK_14M_AUD_CODEC 15
AC97_SDATA_OUT 17
AC97_BITCLK_MDC 24
AC97_BITCLK 17
AC97_SDATA_IN 17
AC97_SYNC 17
~AC97_RESET 17
MODEM
AUX1*4/GREEN
1
2
3
4
R1542 X_10K/4
R1543 X_10K/4
R1544 0/4
R1524 X_10/4
R1492 33/4 Cfg-A = X
R55 33/4
R1493 33/4
R1516
8.2K/4
MODEM
THE AD1986 CAN OPERATE IN AZALIA MODE BUT
IT WILL NOT SUPPORT JACK SENSING AND
DEVICE ENUMERATION , THESE FEATURES
REQUIRE AZALIA STYLE JACKS AND FRONT
PANEL.
L8 FB60/8
+3_3V
EC6
C1673
4.7u/10V/8
0.1u/16V/4
P5VAUX
R1510
X_300/4/1
V_12P0_DIG
C127
X_0.1u/16V/4
R1511
X_100/4/1
VR1
X_LT1087S/0.8A/SOT89
1
ADJ
2 4
Vout
3
Vin
22u/10V/1206
1980
1980
V_3P3_AUD
V_3P3_AUD
C1593
10p/25V/4
C1683 1u/10V/6
~GPI_MODEM_CABLE_DET 17
C1684 1u/10V/6
R1517
8.2K/4
Place C53,C57
close to U9
V_3P3_AUD
1 2
+
C53
0.1u/16V/4
L60 FB60/8
1 2
+
EC7
R43 1K/4
R42 1K/4
1
DVDD1
2
XTL_IN
3
XTL_OUT
4
DVSS1
5
SDATA_OUT
6
BIT_CLK
7
DVSS2
8
SDATA_IN
9
DVDD2
10
SYNC
11
RESET#
12
NC/JS3
C1708
10p/25V/4
AUD_MODEM_IN
AUD_MODEM_OUT
C57
0.1u/16V/4
V_5P0_AUD
C36
0.1u/16V/4
1986
R1540
X_0/4
V_5P0_AUD
R1541
0/4
1980
4847464544424140394338
ID1#
ID0#
EAPD
SPDIFO
AD1980_86
PHONE
AUXL
AUXR
JS1
1314151617181920212223
R1537 2.2K/4
NC
AVSS3
AVSS2
AVDD3
LOUT_R
JS0
CDL
CD_GND
CDR
MIC1
C1765 X_1u/10V/6
C1766 X_1u/10V/6
R1547 X_2.2K/4
R1548 X_2.2K/4
R1495 X_2.2K/4
R77 X_2.2K/4
37
MONO
AVDD2
LOUT_L
SR_OUTR
AVSS4/JS2
CENTER_OUT
VREF_OUT
MIC2
LINL
LINR
24
SOT23SGD
FRONTPANEL JACK SENSING
C1715
0.1u/16V/4
C73
C72
AUD_LINE_OUT_R
AUD_LINE_OUT_L
C1711
1u/10V/6
AUD_LINE_OUT_R
AUD_LINE_OUT_L
AUD_MODEM_OUT
U9
SR_OUTL
AVDD4
LEF_OUT
AFILT2
AFILT1
VREF
AVSS1
AVDD1
AD1980
AUD_LINE_IN_R
AUD_LINE_IN_L
AUD_MICIN
1986
1986
1986
1986
1980
1980
R1536 4.7K/4
D
Q59
D
2N7002S
G S
G
S
+
1 2
+
1 2
C1716
0.1u/16V/4
AUD_HPOUT_L
AUD_BP_LOUT_L_MUTR
AUD_HPOUT_R
AUD_BP_LOUT_R_MUTR
~GPI_AUD_CABLE_DET
V_5P0_AUD
C94 0.1u/16V/4
C35 0.1u/16V/4
AUD_SR_OUT_R
36
AUD_SR_OUT_L
35
C45 0.1u/16V/4
34
R1545 0/4
33
AUD_LFE_OUT
32
AUD_CENT_OUT
31
AC_AFLIT2
30
AC_AFLIT1
29
AUD_VREFOUT
28
AC_VREF
27
26
C1588 0.1u/16V/4
25
C33 1u/16V/8
C19 1u/16V/8
C11 0.1u/16V/4
V_5P0_AUD
+3_3V
R1538 X_0/4
R1539 20K/4
220u/10V/6.3*7
220u/10V/6.3*7
R532
20K/4
AUD_HPOUT_L
AUD_BP_LOUT_L_MUTR
AUD_HPOUT_R
AUD_BP_LOUT_R_MUTR
NC_AUD_FD_MICIN
NC_AUD_VREFOUT_FD
NC_AUD_MICIN_MUTR
~GPI_AUD_CABLE_DET 16
LINE_INR
LINE_INL
AUD_MICIN_FILT
AUD_BP_LOUT_L_MUTR
V_5P0_AUD
AUD_BP_LOUT_L_MUTR
R41 75/4
R37 75/4
R48 75/4
R533
R46 75/4
20K/4
C1652 X_470p/50V/4
C1653 X_470p/50V/4
C1654 X_470p/50V/4
C1655 X_470p/50V/4
C1656 X_470p/50V/4
R1429 0/4
Cfg-A = X
1980
R1546 X_0/4
C74 270p/50V/4
C84 270p/50V/4
C95 0.1u/16V/4
C88 1u/10V/6
AUD_HPOUT_R
AUD_BP_LOUT_R_MUTR
AUD_BP_LOUT_L_MUTR
AUD_HPOUT_L
FRONTAUDIO
1
2
3
4
5
6
8
9
10
BH1*10(-7)/2mm/WHITE
Place R1429 close to U9
SPDIFO
LINE_INR
LINE_INL
1986
1980
1980
AUD_BP_LOUT_R_MUTR
AUD_BP_LOUT_L_MUTR
V_5P0_AUD
AUD_VREFOUT
R1525 X_2.7K/4
C1709
4.7u/10V/8
AUD_LFE_OUT
AUD_CENT_OUT
AUD_SR_OUT_R
AUD_SR_OUT_L
RN6
8.2K/4/8P4R
1 2
3 4
5 6
7 8
C1668
+
100u/10V/5*7
1 2
C1669
+
100u/10V/5*7
1 2
R7
2.7K/4
R1526 1.5K/4
AUD_MICIN_FILT
Place close to CODEC
C1598 2.2u/16V/8
C1599 2.2u/16V/8
C1600 2.2u/16V/8
C1601 2.2u/16V/8
Place close to jacks
AUD_LINE_IN_R_FILT
AUD_LINE_IN_L_FILT
470p/50V/4
R1503
R1504
10K/4
10K/4
470p/50V/4
AUD_MIC_PWR_FILT
C1594
470p/50V/4
R1498
R1497
47K/4
47K/4
R1500
R1499
47K/4
47K/4
SPDIFO
SP/DIFO components
Cfg-A= X
AUDIO JACK CHANGE TO W/O
SP/DIFO CONNECTOR
C10
C1595
470p/50V/4
C1674
470p/50V/4
L7 FB80/6
L4 FB80/6
C31
470p/50V/4
L5 FB80/6
L6 FB80/6
C1590
470p/50V/4 C1589
L2 FB80/6
L1 FB80/6
C1671
470p/50V/4
L52 FB600/6
L53 FB600/6
C1675
470p/50V/4
LFE_OUT
CENT_OUT
LINE IN
AUDIO1C
AUD_LINE_IN_R_JACK
AUD_LINE_IN_L_JACK
C27
470p/50V/4
C24
470p/50V/4
10
11
12
13
18
CONN-AUDIOJACKX5_SPDIFX1
Cfg-STD = JACK1
Cfg-A = JACK2
JACK1,JACK2 is on Page 40.
LINE OUT
AUDIO1B
AUD_BP_LINE_OUT_R_JACK
AUD_BP_LINE_OUT_L_JACK
C1591
470p/50V/4
AUD_MIC_PWR_JACK
C1596
470p/50V/4
C1676
470p/50V/4
R1430
1K/4
Cfg-A = X
C1592
470p/50V/4
AUD_MICIN_JACK
C1597
470p/50V/4
C1672
470p/50V/4
SR_OUT_R
SR_OUT_L
C1677
470p/50V/4
VCC
C1603
X_100p/16V/4
Cfg-A = X
MSI
Title
Size Document Number Rev
Date: Sheet of
6
7
8
9
17
CONN-AUDIOJACKX5_SPDIFX1
Cfg-STD = JACK1
Cfg-A = JACK2
MIC
AUDIO1A
1
2
4
5
3
CONN-AUDIOJACKX5_SPDIFX1
Cfg-STD = JACK1
Cfg-A = JACK2
LFE/CEN
AUDIO1D
29
30
31
32
33
CONN-AUDIOJACKX5_SPDIFX1
Cfg-STD = JACK1
Cfg-A = JACK2
SUR
AUDIO1E
25
26
27
28
23
CONN-AUDIOJACKX5_SPDIFX1
Cfg-STD = JACK1
Cfg-A = JACK2
AUDIO1F
VCC
20
SPDIF_OUT
19
21
GND
22
GND
24
CONN-AUDIOJACKX5_SPDIFX1
Cfg-STD = JACK1
Cfg-A = JACK2
MICRO-STAR INt'L CO., LTD.
Audio - AC'97/Azalia AD1980/86
Rickles
LINE_IN
LINE_OUT
MIC_IN
SR_OUT
C/W_OUT
SPDIF
14
15
16
23 40 Tuesday, February 24, 2004
X00
Page 24
5
4
3
2
1
1394a PORT 1
SCREW1
MDC_SCREW
Cfg-A = X
D D
Keep P3V3AUX signal to
pin17 thick
AC97_SDATA_OUT_MDC 17
C C
SCREW2
MDC_SCREW
Cfg-A = X
C1714
10u/10V/8
Cfg-A = X
~AC97_RESET_MDC 17
C1604
0.1u/16V/4
Cfg-A = X
AC97_SDATA_OUT_MDC
~AC97_RESET_MDC
P3V3AUX
MDC MODULE
MDC1
36
38 37
32
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
35
CN-IOC-BB-S-M30-A10
Cfg-A = X
34
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
33
MDC Module Cfg-A= X
Place R1431
close to
MDC1.
AC97_SYNC_MDC PTPB1+
R1431 33/4
Cfg-A = X
AC97_BITCLK_MDC
AC97_SYNC_MDC 17
AC97_SDATA_IN_MDC 17
AC97_BITCLK_MDC 23
1394a components
Cfg-A= X
TPB1- 21
TPB1+ 21
TPA1- 21
TPA1+ 21
V_12P0_DIG
A C
D20
EC8
+
470u/16V/8*11.5
Cfg-A = X
MBRS340
Cfg-A = X
TPB1ÂTPB1+
TPA1ÂTPA1+
VCC_BUS1
C1649
1000p/16V/4
Cfg-A = X
FB31
FB80/8
Cfg-A = X
FB21 0/4
1 2
FB22 0/4
FB23 0/4
1 2
FB24 0/4
PTPA1+
Cfg-A = X
L50
X_CMC_90ohm_0603
Cfg-A = X
4 3
Cfg-A = X
Cfg-A = X
L51
X_CMC_90ohm_0603
Cfg-A = X
4 3
Cfg-A = X
1 2
3 4
5
7 8
FP1394
BH2*5/2mm
Cfg-A = X
PTPA1-
~GPI_1394_CABLE
PTPB1-
6
10 9
CB13
0.1u/16V/4
Cfg-A = X
PTPB1ÂPTPB1+
PTPA1ÂPTPA1+
+3_3V
R1502
1K/4
Cfg-A = _
C1678
0.1u/16V/4
Cfg-A = X
~GPI_1394_CABLE 17
USB PORT 3
B B
FB6 0/4
L14
X_CMC_90ohm_0603
USB_P3+ 17
USB_P3- 17
A A
5
FB7 0/4
4 3
1 2
~USB_OC3 17
~USB_OC3
0.1u/16V/4
0.1u/16V/4
4
V_5P0_DUAL
C71
USB_P3+_L
USB_P3-_L
USB_OC_READER
R57
27K/4
R59
47K/4 C1632
FPUSB
1
2
3
4
6
BH1*6(-5)/2mm/WHITE
MSI
Title
Size Document Number Rev
3
2
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
MDC 1.0 INTERFACE & Internal USB/1394
Rickles
24 40 Tuesday, February 24, 2004
1
X00
Page 25
5
PRIMARY IDE BLOCK
R487
4.7K/4
~IDE_PRST
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0
R514
8.2K/4
~IDE_PRST 22
IDE_PDD[0..7] 17
D D
IDE_PDDREQ 17
~IDE_PDIOW 17
~IDE_PDIOR 17
IDE_PIORDY 17
~IDE_PDDACK 17
IDE_IRQ14 16
IDE_PDA1 17
IDE_PDA0 17
~IDE_PDCS1 17
~IDE_HDLEDP 22
4
IDE IDE/BLACK/90D
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
R513
4.7K/4
+3_3V
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
C1611
X_4700p/50V/6
IDE_PDD[8..15] 17
GPI_IDE_P66_DET 17
IDE_PDA2 17
~IDE_PDCS3 17
R515
10K/4
3
2
1
SERIAL ATA CONNECTOR BLOCK
SATA0
SATACONN/90D/BLUE
1
SATA_0_TX+ 17
SATA_0_TX- 17
SATA_0_RX-_C 17
SATA_0_RX+_C 17
C546 0.01u/16V/4
C545 0.01u/16V/4
C544 0.01u/16V/4
C543 0.01u/16V/4
SATA_0_TX+_C
SATA_0_TX-_C
SATA_0_RXÂSATA_0_RX+
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
C C
C1713
X_1000p/16V/4
X_0.1u/16V/4
X_0.1u/16V/4
X_0.1u/16V/4
VCC
C1730
C1756
C1762
SOT23EBC
Q58
2N3904S
ECB
R1530
X_1K/6
X_0.1u/16V/4
X_0.1u/16V/4
X_0.1u/16V/4
C1731
C1757
C1763
C1732
X_0.1u/16V/4
C1758
X_0.1u/16V/4
C1764
X_0.1u/16V/4
SPKR
1
2
SAT-1205
Reserved caps for EMI
X_0.1u/16V/4
4
SPEAKER
ICH_SPKR 17
B B
A A
R1529 1K/6
C1728
X_0.1u/16V/4
C1754
X_0.1u/16V/4
C1760
X_0.1u/16V/4
5
VCC
X_0.1u/16V/4
VCC
X_0.1u/16V/4
VCC
X_0.1u/16V/4
C1729
C1755
C1761
For proto type only , be depop
for production.
H_TDI 5
~H_TRST 5
H_TCK 5
H_TDO 5
~H_BPM5/PREQ 5
~H_BPM4/PRDY 5
~H_BPM[0..3] 5
~H_PB_RESET 5,17
VTT_OUT
V_5P0_DUAL
C1733
X_0.1u/16V/4
V_12P0_DIG
C1745
C1746
X_0.1u/16V/4
3
C1751
X_0.1u/16V/4
CK_100M_ITPCONN
R281 150/4/1
Cfg-STD = X
Cfg-A = X
X_0.1u/16V/4
P1V8STBY P3V3AUX
VCC
ITP PORT
ITP700
1 2
3 4
6
5
~CK_100M_ITPCONN
7 8
10 9
11 12
13 14
15 16
~H_BPM3
17 18
~H_BPM2
19 20
~H_BPM1
21 22
~H_BPM0
23 24
25 26
27 28
ITP1*28
Cfg-STD = X
Cfg-A = X
+3_3V +1_5V
C1747
C1752
X_0.1u/16V/4
+3_3V
X_0.1u/16V/4
C1737
C1748
X_0.1u/16V/4
X_0.1u/16V/4
C1736
X_0.1u/16V/4
X_0.1u/16V/4
C1738
C1749
X_0.1u/16V/4
P3V3AUX
C1753
2
H_TMS 5
~H_RESET_R
C340
R295 150/4/1
VTT_OUT 5,6,18,22,29,32
0.1u/16V/4
Cfg-STD = X
Cfg-A = X
Place as close to CPU socket as possible
~CK_100M_ITPCONN
CK_100M_ITPCONN
Place on bottom side
C1739
X_0.1u/16V/4
C1750
X_0.1u/16V/4
VCC
X_0.1u/16V/4
MSI
Title
Size Document Number Rev
Date: Sheet of
R292
VTT_OUT
62/4
Cfg-STD = X
Cfg-A = X
R527 0/4
R526 0/4
C1741
~H_RESET 5,6,8
Cfg-STD = X Cfg-A = X
Cfg-STD = X Cfg-A = X
X_0.1u/16V/4
Cfg-STD = X
Cfg-A = X
C1740
X_0.1u/16V/4
C1759
X_0.1u/16V/4
VCC
MICRO-STAR INt'L CO., LTD.
IDE,SATA,ITP CONNECTORS
Rickles
1
~CK_100M_ITP 5,15
CK_100M_ITP 5,15
C1742
25 40 Tuesday, February 24, 2004
C1743
X_0.1u/16V/4
X00
Page 26
E
D
C
B
A
POWER CIRCUIT FOR USB PORT 0 ~ 2
4 4
FS1
~USB_OC012 17
MINISMDC200
0.1u/16V/4
R58
27K/4
R60
47K/4 C1631
C1616
0.1u/16V/4
NEAR USB CONNECTOR
V_5P0_DUAL
3 3
V_5P0_BP012
R1434
1K/4
POWER CIRCUIT FOR USB PORT 6,7
FS2
~USB_OC67 17
MINISMDC150
C1633
0.1u/16V/4
R66
27K/4
R65
47K/4
NEAR USB CONNECTOR
V_5P0_DUAL
C1618
0.1u/16V/4
V_5P0_BP67
R1436
1K/4
REAR USB CONNECTOR FOR USB PORT 0 ~ 2
USB_P2- 17
USB_P2+ 17
2 2
USB_P1- 17
USB_P1+ 17
USB_P0- 17
USB_P0+ 17
FB8 0/4
FB9 0/4
FB11 0/4
FB13 0/4
FB15 0/4
4 3
1 2
4 3
1 2
4 3
1 2
L13
X_CMC_90ohm_0603
L18
X_CMC_90ohm_0603
L17
X_CMC_90ohm_0603
C34
0.1u/16V/4
USB_P2-_L
USB_P2+_L
USB_P1-_L
USB_P1+_L
USB_P0-_L
USB_P0+_L
V_5P0_BP012
+
USB1
12
11
10
9
8
7
6
5
4
3
2
1
C93
1000u/6.3V/8*11.5
TOP
MID
DOWN
USB*3P
USB_P7- 17
USB_P7+ 17
USB_P6- 17
13
14
15
16
USB_P6+ 17
REAR USB CONNECTOR FOR USB PORT 6,7
FB10 0/4
L15
X_CMC_90ohm_0603
4 3
1 2
FB12 0/4
FB14 0/4
L16
X_CMC_90ohm_0603
4 3
1 2
FB16 0/4
NEAR USB CONNECTOR
C80
0.1u/16V/4
USB_P7-_L
USB_P7+_L
USB_P6-_L
USB_P6+_L
V_5P0_BP67
5
6
7
8
1
2
3
4
NIC_USB2A
UP
DOWN
RJ45(10/100)+USB*2
23
24
25
26
27
28
29
30
+
C102
1000u/6.3V/8*11.5
FB17 0/4
NEAR USB CONNECTOR
1 1
MSI
Title
Size Document Number Rev
E
D
C
B
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
USB Connectors
Rickles
26 40 Tuesday, February 24, 2004
A
X00
Page 27
8
7
6
5
4
3
2
1
Video Connector
PLACE CLOSE TO MCH,
WITHIN 750 MIL OF
PIN
D D
C C
B B
A A
GRP_DDC_DATA_3V 10
GRP_RED 10
GRP_GREEN 10
GRP_BLUE 10
GRP_DDC_CLK_3V 10
8
GRP_RED
GRP_GREEN
GRP_BLUE
VCC
V_2P5_DAC
R83
4.7K/4
GRP_DDC_CLK_3V
V_2P5_DAC
R84
4.7K/4
GRP_DDC_DATA_3V
1 2
R67
150/4/1
1 2
R68
150/4/1
1 2
R69
150/4/1
GRP_DDC_CLK VGA_15
GRP_HSYNC_5V_R
D7 1N4001S
+3_3V
+3_3V
D
G S
G
D
G S
G
7
R80
2.2K/4
GRP_DDC_CLK
D
Q23
2N7002S
SOT23SGD
S
R72
2.2K/4
GRP_DDC_DATA
D
Q14
2N7002S
SOT23SGD
S
R71 39/4
R70 39/4
3
3
3
GRP_VSYNC_5V GRP_VSYNC_5V_R
GRP_HSYNC_5V
6
1PS226
D21
X_BAV99
1PS226
D22
X_BAV99
1PS226
D23
X_BAV99
GRP_HSYNC_3V_R 10
2
V_2P5_DAC
1
L10 FB80/6
2
1
R194 0/4
R193 0/4
1 2
1 2
1 2
135
246
R208
150/4/1
R210
150/4/1
R209
150/4/1
7
CN7
X_22p/50V/6/8P4C
8
GRP_HSYNC_3V
GRP_VSYNC_3V
4
VCC
FS4
MINISMDC150
V_5P0_DDC_FS
2
V_2P5_DAC
1
2
V_2P5_DAC
1
VCC VCC
1PS226
3
D24
X_BAV99
GRP_VSYNC_3V_R 10
1PS226
2
3
1
D25
X_BAV99
5
C82
3.3p/25V/4
L11 FB80/6
C79
3.3p/25V/4
L12 FB80/6
C83
3.3p/25V/4
1 2
C76
0.1u/16V/4
SER1_VGA
15
10
14
9
13
VCC
1
2
VCC
1
2
8
12
7
11
6
VGACONN/BLUE
5 3
74AHCT1G08GV/SOT753
5 3
74AHCT1G08GV/SOT753
3
VGA_12 GRP_DDC_DATA
U11
4
U3
4
C60
3.3p/25V/4
C61
3.3p/25V/4
C62
3.3p/25V/4
17
5
4
GRP_BLUE_L
3
GRP_GREEN_L
2
GRP_RED_L
1
16
GRP_HSYNC_5V_R
GRP_VSYNC_5V_R
~GPI_VGA_CABLE_DET 17
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
Date: Sheet of
2
VIDEO Connectors
Rickles
27 40 Tuesday, February 24, 2004
1
X00
Page 28
8
ATX CONNECTOR Diagnostic LED
~PWR_PS_ON 22
D D
C529
X_0.1u/16V/4
P5VAUX
R460
8.2K/4
+3_3V
-12V
0.1u/16V/4
C1622
X_1000p/16V/4
~NC_N5V
0.1u/16V/4
C541
C516
7
VCC
POWER
11
3.3V
12
-12V
13
GND
14
PSON
15
GND
16
GND
17
GND
18
-5V
19
5V
20
5V
PWRCONN2*10
3.3V
3.3V
GND
GND
GND
POK
5VSB
6
1
2
3
4
5V
5
6
5V
7
8
9
10
12V
C455
0.1u/16V/4
C551
0.1u/16V/4
C1623
0.1u/16V/4
P5VAUX
V_12P0_DIG
C473
0.1u/16V/4
+3_3V
VCC
VCC
R482
8.2K/4
PS_PWRGOOD 22
C1630
X_1000p/16V/4
5
4
+3_3V
GPO_DIAG_DATA 17
~PLT_RST 8,16,19,21,22
GPO_DIAG_CLK 17
GPO_DIAG_DATA
~PLT_RST
GPO_DIAG_CLK
+3_3V
C70
0.1u/16V/4
3
U10
14
VCC
1
A
2
B
9
CLR
8 13
CLK QH
74HC164/SOIC14
GND
2
DIAG_LED2_GRN
DIAG_LED1_GRN
3
QA
4
QB
5
QC
6
QD
10
QE
11
QF
12
QG
7
DIAG_LED1_YEL
DIAG_LED2_YEL
DIAG_LED3_YEL
DIAG_LED4_YEL
DIAG_LED4_GRN
DIAG_LED3_GRN
R1437 220/4
R1438 220/4
2
Y
4
Y
Y
R1439 220/4
R1440 220/4
DIAG_LED
LED1*4/GY
G Y
1
G
3
G
5 6
G
7 8
1
FAN_PWM 22
+3_3V
+
C335
220u/16V/8*11
R446
8.2K/4
P5VAUX
P5VAUX
CPU FAN
GPI_FAN_ID 22
C C
B B
R1535 220/4
V_12P0_DIG
SIO_GREEN_LED 22
SIO_YELLOW_LED 22
FAN_PWM
C343
0.01u/16V/4
R437
8.2K/4
R434
8.2K/4
V_12P0_DIG
SOT23SGD
D
D
G S
G
SOT23SGD
D
D
G S
G
R290
8.2K/4
R1441 4.7K/4
R436
220/4
Q45
2N7002S
S
R435
220/4
Q46
2N7002S
S
5
4
3
2
1
FAN
FAN1*5/WHITE
FNT_GLEDVCC
FNT_YLEDVCC
+3_3V
R296
4.7K/4
SOT23EBC
Q42
2N2222S
ECB
~FAN_TACH 22
RESET SWITCH POWER SWITCH
RESET_SW
1 2
5
4
3
SW_5P
Cfg-STD = X
Cfg-A = X
Front Panel
C1744
R466 1K/4
X_0.1u/16V/4
FRONTPANEL
1 2
3
5
9
11
13
15 16
17 18
19 20
23 24
25 26
27 28
29 30
31 32
33 34
BH2*17(-21)/2mm
+3_3V
C518
0.1u/16V/4
+3_3V P3V3AUX
V_12P0_DIG
USB_P4+ 17
USB_P5- 17
FNT_GLEDVCC
FNT_YLEDVCC
V_5P0_FP
R457
27K/4
R458
47K/4
4
6
8 7
10
12
14
22
C499 0.1u/16V/4
~GPI_FRONT_CABLE_DET
~ICH_PWRBTN
~FNT_HDLED
~PB_RESET 17
Proto type only , be
depop for production.
FS6
MINISMDC150
V_5P0_DUAL
~USB_OC45 17
C494
0.1u/16V/4
~GPI_FRONT_CABLE_DET 16
USB_P4- 17
USB_P5+ 17
~ICH_PWRBTN 17
~FNT_HDLED 22
1 2
3
SW_5P
Cfg-STD = X
Cfg-A = X
POWER_SW
5
4
~ICH_PWRBTN
A A
8
7
6
5
~ICH_PWRBTN
~FNT_HDLED
~GPI_FRONT_CABLE_DET
C496 X_0.1u/16V/4
C497 X_0.1u/16V/4
C519 X_0.1u/16V/4
4
MSI
Title
Size Document Number Rev
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
ATX & Front Panel & FAN & Diag LED
Rickles
2
28 40 Tuesday, February 24, 2004
1
X00
Page 29
5
4
3
2
1
V_12P0_DIG
D D
R146
5.11K/4/1
C C
B B
R365
X_8.2K/4/1
A A
R147
8.2K/4/1
R366
X_8.2K/4/1
P5VAUX
0.1u/16V/4
5
6
P1V8STBY
R359
X_1K/4/1
R361
X_1K/4/1
5
R148
10K/4/1
C184
+
-
4 8
3
+
2
-
R145
0/4
U19B
X_LM358/SOIC8
7
C409
X_0.01u/16V/4
C420
X_0.01u/16V/4
LM358/SOIC8
4 8
-12V
C175
0.01u/16V/4
U14A
1
C183
1000p/16V/4
R160
1K/4/1
R337
X_10/4/1
R136
100/4/1
R159
100/4/1
C394
X_0.01u/16V/4
R183
10K/4/1
C188
4.7u/10V/8
R308
X_0/4
+1_5V
V_12P0_DIG
3
+
2
-
4 8
4
Q32
P75N02LD/TO252
1 2
C205
+
1800u/6.3V/8*20
R364
X_10/4/1
U19A
X_LM358/SOIC8
1
C366
X_220p/25V/4
R307
X_1K/4/1
680u/6.3V/8*11.5
C424
P5VAUX
C1506
1u/10V/6
V_CPU_VTT
C421
X_0.01u/16V/4
R309
X_0/4
R310
X_5.11K/4/1
+
1 2
680u/6.3V/8*11.5
C192
0.01u/16V/4
+
1 2
C400
C193
0.1u/16V/4
P1V8STBY
Q43
X_Si4501DY/SOIC8/6.2A
1
3
4
C363
680u/6.3V/8*11.5
+
1 2
S1
DRN1
G1
DRN2
S2
DRN3
G2 DRN4
8
7 2
6
5
C365
1u/10V/6
CPU_VTT
C416
X_1u/10V/6
Input
Output
S3/S5 Max Current
Dest
VTT_OUT 5,6,18,22,25,32
R1336
R1342
10K/4/1
R1335
1K/4/1
1K/4/1
VTT_OUT
R274
5.11K/4/1
Q54
2N2222S
+1.5V
+1.2V
?AS0/S1 Max Current
OFF
GMCH, CPU
P5VAUX
R273
51.1/6/1
Q53
2N7002S
1u/10V/6
R280
10K/4/1
C336
R252
8.2K/4/1
Q39
2N7002S
R251
680/4
H_VTT_PWRGOOD
Q38
2N7002S
H_VTT_PWRGOOD 6,32
0.9V
Input
Max Current
+0_9V
R1341
0/4
VTT_SENSE
R311
100/4/1
3
VTT_SENSE 31
Dest
2
MSI
Title
Size Document Number Rev
Date: Sheet of
+1.8VSTBY
+0.9VOutput
1A
DDR TERMINATION
MICRO-STAR INt'L CO., LTD.
MEM_VTT & CPU_VTT
Rickles
29 40 Tuesday, February 24, 2004
1
X00
Page 30
8
7
6
5
4
3
2
1
P5VAUX
C474
X_1u/10V/6
1
4
5 6
9
C302
0.1u/16V/4
5
VCC
6
FB
3 4
GND LGATE
C313
100p/16V/4
R239
4.99K/4/1
~ICH_SLP_S3
~ICH_SLP_S4
D D
C C
B B
R245
30K/4
C306
0.01u/16V/4
R240
5.11K/4/1
~ICH_SLP_S3 17,22,31
~ICH_SLP_S4 17,22,31
R236
20K/4
5VDLSB 31
U21
5VDLSB
VCC
5VDUAL S3#
3V3AUX
S5#
GND_1 DLA
GND_2
X_ISL6506BCB/SOIC8
U16
ISL6520ACB/SOIC8
DLA 31
C301
1u/10V/6
BOOT
PHASE COMP/OCSET
UGATE
P5VAUX
Q47
PNP/SI3443DV/TSOP-6/4.4A
4 6
5VDLSB
P3V3AUX
C300
X_1u/10V/6
3
DLA
4.99K/4/1
7
8 3
2
1
8 7
2
C1712
0.1u/16V/4
R1339
0/4
R1338
4.99K/4/1
R1340
0/4
R1337
5
2
1
D S
G
Q48
DLA
P75N02LD/TO252
V_12P0_DIG
R438
8.2K/4
+3_3V
D S
Q40
G
P75N02LD/TO252
D S
Q41
G
P75N02LD/TO252
G
D S
Q24
IRLR024/TO252
D S
Q44
G
P75N02LD/TO252
231
V_5P0_DUAL
+
1 2
C103
X_22u/25V/6.3*5.4/SMD
+
1 2
C310
1500u/6.3V/10*12.5
D9
BAR43FILM/SOT23
C322
0.1u/16V/4
C344
1000p/16V/4
R288
2.2/4
R528
X_1K/4/1
PLACE NEAR REAR USB
VCC
P3V3AUX
+
1 2
C450
150u/6.3V/8*6.9/SMD/OSCON
+
1 2
C295
1500u/6.3V/10*12.5
L43
1.2uH/18A/7.5mm/1.2
1500u/6.3V/10*12.5
C354
R529
X_1K/4/1
+
1 2
+
1 2
C326
1500u/6.3V/10*12.5
+
1 2
C355
1500u/6.3V/10*12.5
L41
L42
BLM41P600S
BLM41P600S
C351
1u/10V/6
VCC
+1_5V
3.3V_AUX
Input
Output
S0/S1 Max Current
S3/S5 Max Current 880mA(Assumes NIC+1 PCI active)
Dest
+5V_AUX and 3.3V Main
+3.3V_AUX
2.3A
PCI Aux, SIO, NIC & ICH reg
5V_DUAL
+5V_AUX and +5VInput
Output +5V_DUAL
12AS0/S1 Max Current
S3 Max Current
1A
S5 Max Current OFF
Dest
C337
X_1u/10V/6
2.6V_REG, USB
1.5V
Input
Max Current
Dest
+5V
+1.5VOutput
15A
GMCH, ICH6, CPU/GMCH_VTT
R249
X_1K/4
R250
2.2K/4
C320
X_470p/50V/4
6
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
5
4
3
Date: Sheet of
1.5V & 5V_DUAL
2
Rickles
30 40 Tuesday, February 24, 2004
1
X00
A A
8
7
Page 31
8
R469
R473
X_30K/4
C520
R478
X_20K/4
C523
X_100p/16V/4
R477
X_2.74K/4/1
VCC VCC
D D
X_0.01u/16V/4
X_4.99K/4/1
C C
7
C515
X_0.1u/16V/4
5
VCC
7
COMP/OCSET
6
FB
3 4
GND LGATE
X_ISL6520ACB/SOIC8
X_1u/10V/6
U23
BOOT
UGATE
PHASE
R481
X_1K/4
1
2
8
R479
X_2.2K/4
C514
X_1u/10V/6 C517
HDRV_1P8
LDRV_1P8
C526
X_470p/50V/4
231
D13
C527
X_0.1u/16V/4
PHASE_1P8
6
X_BAR43FILM/SOT23
R1326
0/4
R1327
4.99K/4/1
R1324
0/4
R1325
4.99K/4/1
D S
G
D S
G
1 2
+
C461
1000u/6.3V/8*11.5
Q50
P75N02LD/TO252
P75N02LD/TO252
5
1 2
+
C462
1000u/6.3V/8*11.5
L46
1.1uH/20A/HORIZONTAL
C511
1000p/16V/4
R472
2.2/4
FIL_V_5P0_DUAL
1 2
+
C463
1000u/6.3V/8*11.5
C472
1u/10V/6 Q51
4
P1V8STBY
L48
BLM41P600S
L47
BLM41P600S
1 2
+
C1515
1000u/6.3V/8*11.5
C508
X_1u/10V/6
~ICH_SLP_S3
3
V_5P0_DUAL
R137
8.2K/4/1
P5VAUX
1.8VSTBY
Input
Output
Max Current
Dest
2.5V_DAC
Input
Output
S0/S1 Max Current
S3/S5 Max Current OFF
Dest
R115
10/4
Q30
2N7002S
Q28
2N7002S
2
D8
BAR43FILM/SOT23
231
1
+5V_DUAL
+1.8V
15A
GMCH, MEMORY, FSB_VTT REG
+5V
+2.5V
100mA
GMCH
V_2P5_DAC
+1_5V
R1331
C1511
VCC
R1329
100K/4/1
U29
8.2K/4
14
17
18
13
15
16
21
20
PGOOD_5068
B B
~ICH_SLP_S3 17,22,30
~ICH_SLP_S4 17,22,30
5VDLSB 30
P3V3AUX
0.1u/16V/4
A A
C1510
8
DLA 30
P5VAUX
~ICH_SLP_S3
~ICH_SLP_S4
PGOOD_5068
5VDLSB
DLA
4
3
1
2
5VMAIN
5VSB
S3I
EN
PGOOD
SBSW
3P3ALW
S3O
G1P2
FB1P2
SS
ILIM
FAN5068
0.1u/16V/4
BOOT
HDRV
ISNS
LDRV
COMP
VDDQIN
REFIN
VTTOUT
VTTSNS
GND
7
R125
Rickles
+3_3V
+
1 2
Q29
2N7002S
C149
22u/25V/5*11
C174
1u/10V/6
31 40 Tuesday, February 24, 2004
1
V_2P5_DAC
X00
V_12P0_DIG
+3_3V
R101
15.8K/6/1
R102
5.11K/4/1
C141
0.1u/16V/4
U14B
LM358/SOIC8
5
+
6
-
4 8
R109
0/4
MSI
Title
Size Document Number Rev
Date: Sheet of
2
R130
7
0/4
5.11K/4/1
C152
1000p/16V/4
R110
226/4/1
MICRO-STAR INt'L CO., LTD.
1.8VSTBY&2.5_DAC
R1328
1K/4/1
P1V8STBY
C1512
X_470p/50V/4
~ICH_SLP_S3
+1_5V
4
R144
3.9K/4
R107
8.2K/4/1
R153
4.99K/4/1
P5VAUX
Q27
2N7002S
Q31
2N2222S
2P5_ENABLE
Q26
2N7002S
R111
X_100/4
3
C1505
8
9
10
SW
11
12
23
FB
22
7
24
6
5
19
HDRV_1P8
PHASE_1P8
LDRV_1P8
+0_9V
0.1u/16V/4
R1323
2.49K/4/1
C1508
X_0.01u/16V/4
C1509
X_0.01u/16V/4
VTT_SENSE 29
6
P1V8STBY
R1319
1K/4/1
R1318
1K/4/1
C1507
0.01u/16V/4
R1330
11.8K/4/1
C1504
220p/25V/4
X_100K/4/1
R1321
5
R1320
X_1K/4
R1322
1K/4/1
Page 32
8
VRM_12V
H_VID[0..5] 5
D D
C284
1000p/16V/4 C285
R222 1K/4/1
R223
X_100K/4
VR_VSSSENSE
VR_VCCSENSE
Q16_X
MOS-HEATSINK
47p/50V/4
C290
330p/50V/4
C292
47000p/16V/4
C291
R228
X_0/4
C C
B B
R229
R230
249K/6/1
H_VTT_PWRGOOD
X_0.1u/16V/4
Q18_X
MOS-HEATSINK
24K/4/1
R233
X_100K/4
+CPUCORE
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0
H_VID5
10
11
12
13
14 15
R224
200K/4/1
H_VTT_PWRGOOD 6,29
C162
1800u/6.3V/8*20
C163
1800u/6.3V/8*20
C160
1800u/6.3V/8*20
C139
1800u/6.3V/8*20
C167
1800u/6.3V/8*20
C161
1800u/6.3V/8*20
C150
1800u/6.3V/8*20
C145
1800u/6.3V/8*20
C164
1800u/6.3V/8*20
C165
1800u/6.3V/8*20
MOS-HEATSINK
R225
249K/6/1
1
VID4
2
VID3
3
VID2
4
VID1
5
VID0
6
VID5
8
FB
9
COMP
7
FBRTN
PWRGD
EN
DELAY
RT
RAMPADJ ILIMIT
U15
ADP3188/TSSOP28
Q20_X
7
VCC
PWM1
PWM2
PWM3
PWM4
SW1
SW2
SW3
SW4
GND
CSCOMP
CSSUM
CSREF
150K/4
+CPUCORE
Put this NTC
thermistor
closed by
the output
inductor
Q22_X
MOS-HEATSINK
6
R191
10/4
C293
28
27
26
25
24
23
22
21
20
19
18
17
16
R192
0.47u/25V/8
R202 0/4
R203 0/4
R204 0/4
R205 0/4
R190
41.2K/4/1
R187
0/4
TH1
100K/6/THERMISTOR
+CPUCORE
H_AN5 5
H_AN6 5
C228 8200p/50V/6
C229 2200p/16V/4
R227 X_0/4
H_AN5
R235 0/4
H_AN6
R231 0/4
R221 X_0/4
R189
41.2K/4/1
R1333 220K/4 C1513
R188
0/4
C217 47000p/16V/4
Q36
X_2N7002S
LOAD_LINE_SELECT
X_0/4
R201
R199
100K/4
R241
X_0/4
R237
X_0/4
X_0/4
R200
R198
100K/4
VR_VCCSENSE
H_VCCSENSE
H_VSSSENSE
VR_VSSSENSE
VRM_PWM4A
VRM_PWM3A
R182
220K/4
33p/50V/4
R197
100K/4
R181
220K/4
R196
100K/4
DRV_OD
5
VRM_PWM1A
VRM_PWM2A
VRM_PWM3A
VRM_PWM4A
VRM_PHASE1B_SENSE
VRM_PHASE2B_SENSE
VRM_PHASE3B_SENSE
VRM_PHASE4B_SENSE
H_VCCSENSE 5
H_VSSSENSE 5
VRM_12V
BST_DIODE_A
VRM_PWM1A
VRM_12V
VRM_PHASE1B_SENSE
BST_DIODE_B
VRM_PWM2A
VRM_PHASE2B_SENSE
VRM_PWM3A
VRM_PHASE3B_SENSE
VRM_PWM4A
DRV_OD
VRM_PHASE4B_SENSE
4
0.47u/25V/8
D6 1N4148S
C40
5.1/6
R38
C42
0.47u/25V/8
0.47u/25V/8
D3 1N4148S
C49
5.1/6
R35
C41
0.47u/25V/8
D5 1N4148S
C64
0.47u/25V/8
5.1/6
R32
C54
0.47u/25V/8
C50
0.47u/25V/8
5.1/6
R28
C48
0.47u/25V/8
0/4
R33
0/4
R27
0/4
R25
0/4
R31
3
PHASE 1
C30 0.1u/16V/4
1
BST
DRVH
2
IN
SW
3
OD#
PGND
4 5
VCC DRVL
U6
ADP3418/SOIC8
PHASE 2
C44 0.1u/16V/4
1
BST
DRVH
2
IN
SW
3
OD#
PGND
4 5
VCC DRVL
U4
ADP3418/SOIC8
PHASE 3
C47 0.1u/16V/4
1
BST
DRVH
2
IN
SW
3
OD#
PGND
4 5
VCC DRVL
U7
ADP3418/SOIC8
PHASE 4
C46 0.1u/16V/4 D4 1N4148S
1
BST
DRVH
2
IN
SW
3
OD#
PGND
4 5
VCC DRVL
U5
ADP3418/SOIC8
2
Q11
IPD06N03LA/50A/5.7m/TO252
C104
4.7u/35V/1206
Q10
8
7
6
R53
4.7K/4
R75
4.7K/4
IPD06N03LA/50A/5.7m/TO252
8
7
6
R52
R74
4.7K/4
4.7K/4
IPD06N03LA/50A/5.7m/TO252
8
7
6
R82
R54
4.7K/4
IPD06N03LA/50A/5.7m/TO252
4.7K/4
8
7
6
R49
R89
4.7K/4
4.7K/4
IPD06N03LA/50A/5.7m/TO252
IPD06N03LA/50A/5.7m/TO252
IPD06N03LA/50A/5.7m/TO252
Q19
Q20
IPD06N03LA/50A/5.7m/TO252
Q6
Q7
IPD06N03LA/50A/5.7m/TO252
IPD06N03LA/50A/5.7m/TO252
Q16
Q15
IPD06N03LA/50A/5.7m/TO252
Q13
Q12
IPD06N03LA/50A/5.7m/TO252
IPD06N03LA/50A/5.7m/TO252
Q22
Q21
IPD06N03LA/50A/5.7m/TO252
Q8
Q9
IPD06N03LA/50A/5.7m/TO252
IPD06N03LA/50A/5.7m/TO252
Q18
Q17
C119
1000p/16V/4
R93
3/1206
C65
4.7u/35V/1206
C113
1000p/16V/4
R88
3/1206
C117
4.7u/35V/1206
C123
1000p/16V/4
R85
3/1206
C118
4.7u/35V/1206
C114
1000p/16V/4
R92
3/1206
L19
0.65uH/30A
L22
0.65uH/30A
L21
0.65uH/30A
L20
0.65uH/30A
1
C194
X_150u/6.3V/8*6.9/SMD/OSCON
+CPUCORE
+12V
A A
+12V
L27
BLM41P600S
L28
BLM41P600S
L29
BLM41P600S
C172
0.47u/25V/8
8
POWER_12V
3
12V
4
12V
PWRCONN2*2
1000u/16V/8*20/Ripp=2220
+
1 2
C51
1000u/16V/8*20/Ripp=2220
1
GND
2
GND
1000u/16V/8*20/Ripp=2220
+
1 2
+
1 2
C52
C121
VRM_12V
+
1 2
C120
1000u/16V/8*20/Ripp=2220
7
4
VRM_12V
MBZ5235B/6.8V
R24
R21
R20
D1
1K/4/1
301/6/1
27.4/6/1
C E
Q5
B
2N2222S
C22
0.47u/25V/8
3
R22
C215
27.4/6/1
Q4
2N2222S
C55
0.47u/25V/8
0.1u/16V/4
BST_DIODE_B
BST_DIODE_A
MSI
Title
Size Document Number Rev
Date: Sheet of
2
MICRO-STAR INt'L CO., LTD.
VRM 10.1 - ADP3168+ADP3418 4 Phase
Rickles
32 40 Tuesday, February 24, 2004
1
X00
C E
B
VRM_12V
VTT_OUT
VTT_OUT 5,6,18,22,25,29
H_LL_ID0
H_LL_ID0 5
6
R247
X_8.2K/4
C210
R184
X_8.2K/4
X_0.1u/16V/4
B
C E
Q34
X_2N2222S
R177
X_2.7K/4
5
R185
X_8.2K/4
C211
X_0.1u/16V/4
Q35
X_2N2907S
R186
X_8.2K/4
LOAD_LINE_SELECT
C216
X_0.1u/16V/4
Page 33
1
ICH6
GPIO Alt Func Pin I/O/NC Power PU SMI Tol Default Rickles Signal Name
GPI[0] PCIREQ[6]# B7 I V5REF N Y 5 N/A NC
GPI[1] PCIREQ[5]# E8 I V5REF N Y 5 N/A ~GPI_HS_DET
GPI[2] PIRQE# D9 I V5REF N Y 5 N/A ~GPI_FRONT_CABLE_DET
GPI[3] PIRQF# C7 I V5REF N Y 5 N/A GPI_SKU0
GPI[4] PIRQG# C6 I V5REF N Y 5 N/A GPI_SKU1
GPI[5] PIRQH# M3 I V5REF N Y 5 N/A GPI_AUD_CABLE_DET
GPI[6] unmuxed AD19 I Vcc3p3 N Y 3.3 N/A ~GPI_MODEM_CABLE_DET
GPI[7] unmuxed AE19 I Vcc3p3 N Y 3.3 N/A GPI_IDE_P66_DET
GPI[8] unmuxed R1 I VccSus3p3 N Y 3.3 N/A strapped hi
GPI[9] OC[4]# C23 I VccSus3p3 N Y 3.3 N/A ~USB_OC45
GPI[10] OC[5]# D23 I VccSus3p3 N Y 3.3 N/A ~USB_OC45
GPI[11] SMBALERT# W6 I VccSus3p3 N Y 3.3 N/A SMB_ALERT
GPI[12] unmuxed M2 I Vcc3p3 N Y 3.3 N/A ~GPI_1394_CABLE
GPI[13] unmuxed R6 I VccSus3p3 N Y 3.3 N/A strapped hi
GPI[14] OC[6]# C25 I VccSus3p3 N Y 3.3 ~USB_OC67
GPI[15] OC[7]# C24 I VccSus3p3 N Y 3.3 ~USB_OC67
GPO[16] PCIGNT[6]# D8 O Vcc3p3 U N 3.3 1 NC
GPO[17] PCIGNT[5]# F6 O Vcc3p3 U N 3.3 1 NC
GPO[18] blink AC21 O Vcc3p3 N N 3.3 1 NC
GPO[19] blink AB21 O Vcc3p3 N N 3.3 1 NC
GPO[20] unmuxed AD22 O Vcc3p3 N N 3.3 1 GPO_DIAG_DATA
GPO[21] unmuxed AD20 O Vcc3p3 N N 3.3 1 GPO_DIAG_CLK
GPO[23] unmuxed AD21 O Vcc3p3 N N 3.3 0 NC
GPIO[24] unmuxed V3 I/O VccSus3p3 N N 3.3 Out-1 ~GPO_LAN_DISABLE
GPIO[25] Internal 2.5V p5 I/O VccSus3p3 D N 3.3 Out-1 strapped low for 2.5v reg internal
GPI[26] SATA[0]GP AF17 I Vcc3p3 N N 3.3 N/A ~GPI_VGA_CABLE_DET/strapped hi
GPIO[27] unmuxed R3 I/O VccSus3p3 N N 3.3 Out-1 ~LOM_LOWPWR
GPIO[28] unmuxed T3 I/O VccSus3p3 N N 3.3 Out-1 NC
GPI[29] SATA[1]GP AE18 I Vcc3p3 N N 3.3 ICH_GPI29/strapped hi
GPI[30] SATA[2]GP AF18 I Vcc3p3 N N 3.3 ICH_GPI30/strapped hi
GPI[31] SATA[3]GP AG18 I Vcc3p3 N N 3.3 ICH_GPI31/strapped hi
GPIO[32] unmuxed AF19 I/O Vcc3p3 N N 3.3 Out-1 NC
GPIO[33] unmuxed AF20 I/O Vcc3p3 N N 3.3 Out-1 NC
GPIO[34] unmuxed AC18 I/O Vcc3p3 N N 3.3 Out-1 NC
GPIO[40] REQ4# F7 I V5REF N N 5 ~GPI_PEG_PRSNT
GPIO[41] LDRQ1# P4 I Vcc3p3 U N 3.3 NC
GPIO[48] GNT4# E7 O Vcc3p3 N N 3.3 NC
A A
GPIO[49] CPUPWRGD AG25 OD V_CPU_IO N N 3.3 H_PWRGOOD
Note: All inputs are sticky. The status bit remains set as long as the input was asserted for two clocks.
GPI's are sampled on PCI clocks in S0/S1. GPIs are sampled on RTC clocks in S3/S4/S5.
Note: FWH GPs should only be used for static options,
FWH
do not put dynamic nets on these
GPIO Pin# Power Tol Signal Name
FPGI[0] 6 Main 3.3 NC
FPGI[1] 5 Main 3.3 NC
FPGI[2] 4 Main 3.3 NC
FPGI[3] 3 Main 3.3 GPI_BRD_REV0
FPGI[4] 30 Main 3.3 GPI_BRD_REV1
PCI Config.
DEVICE
PCI Slot 1
LOM ~PCI_INTD
DDRII DIMM Config.
DEVICE
DIMM 1
DIMM 2 A2H
MCP1 INT Pin
~PCI_INTA
~PCI_INTB
~PCI_INTC
~PCI_INTD
~PCI_INTC ~PCI_REQ_2
ADDRESS
AOH
REQ#/GNT#
~PCI_REQ_1
~PCI_GNT_1
~PCI_REQ_0
~PCI_GNT_0
~PCI_GNT_2
CLOCK
MCLK_A0/MCLK_A#0
MCLK_A1/MCLK_A#1
MCLK_A2/MCLK_A#2
MCLK_B0/MCLK_B#0
MCLK_B1/MCLK_B#1
MCLK_B2/MCLK_B#2
IDSEL
AD16
AD23
AD26
CLOCK
PCI_CK_33M_SLT1
PCI_CK_33M_LAN
PCI_CK_33M_1394 1394
JUMPER SETTING
(1-2)NORMAL (2-3)CLEAR
JBAT1
PASSWORD CLEAR
PSWD
(1-2)
Normal
CLEAR PASSWORD
(2-3)
SIO SMSC 47M584
584 Pin Name Pin# Power VTRPOR Signal name
GP10/SLP_S3 123 VCC In ~ICH_SLP_S3
GP11/SLP_S5 124 VCC In ~ICH_SLP_S4
PWRGD_PS/GP12 125 VCC In PS_PWRGOOD
GP13/DB_SW 126 VCC In DB_SW , Pulled down
GP14/HD_LED# 127 VCC In ~FNT_HDLED
CPU_PSNT#/GP15 128 VCC In pulled down
SER_IRQ 1 VCC In SERIRQ
GP17 2 VCC In NC
Therm#/GP20/P17 36 VCC In ~GPO_LAN_RST
GP21/P16/nDS1 74 VCC In NC
GP22/P12/nMTR1 72 VCC In NC
GP23/INTRD_OUT# 21 VTR In,Out NC
GP24/SYSOPT0 35 VCC In SYSOPT0,Pulled down
SDAT_2/GP25 33 VTR In PCI_SMB_AD
SDAT/GP26 32 VTR In VAUX_SMB_AD
SDAT_1/GP27/IOSMI# 31 VCC In VMAIN_SMB_AD
GP30/SCSI# 4 VCC In GPI_FAN_ID
GP31/SECONDARY_HD# 5 VCC In ~SATA_HDLED
GP32 7 VCC In ~GPI_PSWD
GP33/PRIMARY_HD# 8 VCC In ~IDE_HDLEDP
SCLK/GP34 29 VTR In VAUX_SMB_CLK
SCLK_1/GP35/LED1 28 VTR In VMAIN_SMB_CLK
GP36/KBDRST# 120 VCC In ~KB_RST
GP37/A20M 121 VCC In ~KB_GATE_A20
GP40/DRVDEN0 78 VCC In NC
GP41/DRVDEN1 77 VCC In NC
GP42/IO_PME# 25 VTR In SIO_PWUREQ
SCLK_2/GP43/DDRC 30 VCC In PCI_SMB_CLK
PROCHOT_IO# 38 VCC In ~H_PROCHOT
TACH1 39 VCC/HVTR In ~FAN_TACH
TACH2 40 VCC/HVTR In PU
TACH3 41 VCC/HVTR In PU
584 Pin Name Pin# Power VTRPOR Signal name
GP50/RI2# 114 VCC In NC
GP51/DCD2 107 VCC In NC
GP52/RXD2 109 VCC In NC
GP53/TXD2 111 VCC In NC
GP54/DSR2# 108 VCC In NC
GP55/RTS2# 110 VCC In NC
GP56/CTS2# 112 VCC In NC
GP57/DTR2# 113 VCC In NC
GP60/YELLOW 26 VTR OD Out SIO_YELLOW_LED
GP61/GREEN 27 VTR OD Out SIO_GREEN_LED
HVSS 42 VCC/HVTR In GND
REMOTE1+ 43 VCC/HVTR In H_THRM_ANODE
REMOTE1- 44 VCC/HVTR In H_THERM_CATHODE
REMOTE2+ 45 VCC/HVTR In 1K to pin46
REMOTE2- 46 VCC/HVTR In 1K to pin47
VCCP 48 VCC/HVTR In VTT_OUT
PWM1 49 VCC/HVTR In FAN_PWM
PWM2 50 VCC/HVTR In NC
PWM3 51 VCC/HVTR In NC
IDE_RSTDRV#/GP75 52 VCC/VTR In ~SIO_IDE_PRST
PCIRSTSYS#/GP76 53 VCC/VTR In ~SIO_PCIE_RST_SLOTS
PCIRSTSLOTS#/GP77 54 VCC/VTR In ~SIO_PCI_RST_SLOTS
PS_ON#/GP80 55 VCC/VTR In ~PWR_PS_ON
BACKFEED_CUT#/GP81 56 VCC/VTR In NC
LATCHED_BFCUT/GP82 58 VCC/VTR In NC
PWR_GOOD_3V/GP83 59 VCC/VTR In 3P3V_PWRGOOD
RSMRST#/GP84 60 VCC/VTR In ~ICH_RSMRST
Vss 19 Vss
HVTR 47 VCC/HVTR 3.3V_AUX
VTR 57 VCC/VTR 3.3V_AUX
1
MSI
MICRO-STAR INt'L CO., LTD.
Title
General Purpose Spec & JUMPER SETTING
Size Document Number Rev
Date: Sheet of
Rickles
33 40 Tuesday, February 24, 2004
X00
Page 34
8
POWER DELIVERY MAP
7
ATX 12V POWER Supply
+3.3V VCC +5V_
AUX
+12V
_DIG
6
12V POWER
+12V -12V
5
4
V_CPU_VTT
1.2V
3
2
1
D D
+CPUCORE
VRD10.1
+1_5V
Processor Core Icc(max)=119A
1.2V FSB Vtt TBDA
GMCH Core Icc(max)=9.6A
Processor
GMCH-Grantsdale
GMCH Vtt Icc(max)=1.2A
2.5V
P1V8STBY
1.8V
+0_9V
DDRVREF
0.9V
C C
P3V3AUX
3.3V
GMCH DAC 2.5V Icc(max)=70mA V_2P5_DAC
GMCH PCI_E Icc(max)=1.06A
GMCH DDR I/O Icc(max)=5.5A
2 CHANNEL DDR MODULE Icc(max)=6A
2 CHANNEL DDR MODULE Icc(max)=1.8A
2 CHANNEL DDR MODULE Icc(max)=16µA
ICH CPU IO Icc(max)=tbdA
ICH DMI Icc(max)=290mA
ICH Core Icc(max)=2.58A
ICH VCC3_SB Icc(max)=330mA
ICH VCCRTC Icc(max)=5µA
DDR MODULE
ICH6
ICH 3.3V Icc(max)=180mA
ICH 5VREF Icc(max)=tbdA
ICH 5VREF_SUS Icc(max)=tbdA
LPC FWH 3.3V Icc(max)=107mA
V_5P0_DUAL
5V
V_5P0_AUD
5V
8 PORT USB & PS2(MS/KB)
Icc(max)=0.5A*8(S0/S1),20mA(S3/S5)
+5V
VCC3
VCC12V Icc(max)=4.4A
B B
VCC3.3 Icc(max)=3A
VCC3SUS Icc(max)=375mA
VCC5V Icc(max)=5A
LPC FWH FLASH
USB PORT
AC'97 CODEC
PCI_E x 16
PCI CON
VCC12V Icc(max)= 0.5A
VCC3.3 Icc(max)= 7.6A
PCI 3.3V_SUS Icc(max)= 375mA
VCC3_SUS Icc(max)=330mA
VCC3
VCC12V
LAN BCM4401KQL
IEEE1394
TSB43AB23
A A
HEAT SINK
HS3
Grantsdale_HS
8
MANUAL PART
U28
BIOS_PLCC32
PCB1
7059-X00
7
B1_X1
+
BATTERY HOLDER, 3PIN
6
JBAT1(1-2)
JMP/GREEN/A
PSWD(2-3)
JMP/GREEN/A
5
MSI
Title
Size Document Number Rev
4
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
POWER DELIVERY MAP & MANUAL PART
Rickles
2
34 40 Tuesday, February 24, 2004
1
X00
Page 35
8
7
6
5
4
3
2
1
DIMMS
DDRA_SCLK[2:0]
D D
CK_96M_DOT
CK_100M_MCM
EXP_CK_100M_MCH
EXP_CK_100M_X16
CK_100M_CPU
CPU-Socket T
C C
CK_100M_ITP
CK 410
CLOCK
CHIP
GRANTDALE-G
GMCH
PEG CONNECTOR
CK_100M_SATA
PCI_CK_33M_ICH
CK_48M_USB
EXP_CK_100M_ICH
PCI_CK_33M_SLT1
CHANNEL A
ICH6
CK_14M_AUD_CODEC
ONE
DDRB_SCLK[2:0]
AC97_BIT _CLK
ONE
CHANNEL B
AC97
CODEC
PCI_SLT1
ITP
CK_100M_ITP_CONN
PCI_CK_33M_LPC_HDR
CK_14M_SPLIT
CK_14M_ICH
SHARE
LPC HDR
SIO_CK_14M
B B
FWH
PCI_CK_33M_FWH
PCI_CK_33M_SIO
SUPER IO
LOM
A A
8
PCI_CK_33M_1394
7
PCI_CK_33M_LAN
6
LOM
Title
Size Document Number Rev
5
4
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
MSI
CLOCKS DISTRIBUTION
Rickles
2
35 40 Tuesday, February 24, 2004
1
X00
Page 36
8
7
6
5
4
3
2
1
CPU_CORE
CPU_VTT
PROCESSOR
+12V
D D
POWER SUPPLY
KB=160W
JAZZ=210W
SD=250W
+12V
+5V
+3.3V
+5V_AUX
-12V
+1.2V_PG
+3.3V
+12V
VRM 10.1
CPU_VTT
VREG
+1.2V
+3.3V
C C
+5V_AUX
ONBOARD REG
POWER SEQUENCER
(ISL6505)
+5V
+5V
2.5V_DAC
VREG
B B
+5V_DUAL
+12V
ONBOARD VREG
CPU_CORE
CPU_VTT
+1.2V
+1.2V_PG
+3.3V_AUX
+5V_DUAL
2.5V_DAC
+1.8VSTBY
+0.9V
+3.3V
CPU_VTT
+1.5V
+1.8VSTBY
+1.5V
+2.5V_DAC
+1.5V
+3.3V
+3.3V_AUX
+5V_AUX
V_BAT
CPU_CORE
+1.8VSTBY
+0.9V
+1.5V
CLOCK
GRANTSDALE
ICH6
(REF)
DDRII
MEM
PCI_E
16X
+12V
+5V
+3.3V
+12V
+5V
+12V
+5V
+3.3V
+3.3V_AUX
V_BAT
+5V_DUAL
+12V
+5V
+5V
+5V_DUAL
HDD
(SATA)
CDROM
FLOPPY
SUPER I/O
PS2 KB/M
SERIAL
PARALLEL
USB 8 PORT
+5V_DUAL
+12V
BATTERY
3V COIN CELL
CR2031
A A
8
7
6
V_BAT
+3.3V_AUX
5
4
ONBOARD
5V REG
ONBOARD
VREG
+5V
+3.3V_LAN
+1.5V_LAN
+2.5V_LAN
+3.3V
+3.3V_AUX
+5V
+12V
-12V
3
AUDIO
NIC
PCI
MSI
Title
Size Document Number Rev
Date: Sheet of
+3.3V
+12V
MICRO-STAR INt'L CO., LTD.
POWER MAP
2
Rickles
FWH
(OPT)
FAN
36 40 Tuesday, February 24, 2004
1
X00
Page 37
8
D D
7
6
5
4
3
2
1
LOM
SMBUS HOST CONTROLLER
SMSC x584 SIO
SMBUS HOST CONTROLLER
C C
SMBUS SLAVE INTERFACE
AUX SMBUS
BUS SWITCH
BUS SWITCH
MAIN SMBUS
BIOS CONTROL
BIOS CONTROL
ICH6
CLOCK GEN
PCI_E SLOT
DIMMS
B B
PCI SMBUS
PCI SLOT
A A
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
2
SMBUS MAP
Rickles
37 40 Tuesday, February 24, 2004
1
X00
Page 38
8
Ver : X00
2004/02/02
First release
2004/02/03
Page 9. Change net name from M_CHA_DQ[0..63] to ~M_CHA_CS[0..1] for U17/AR29,U17/AP32.
Page 10. Change net name from 1.8VSTBY to P1V8STBY for U17 DDR power pins.
Change L40 value from 90nH/8 to 47uH_1206
Page 16. Reserve R1469 for GPO17 pull down.
Reserve R1470,R1471 for GPI_SKU[0..1] pull high.
No pop for R1366.
D D
2004/02/04
C C
B B
2004/02/05
A A
Add Net ~PCI_REQ_3 for U20/B8
Page 18. Change L44 value from 0.47uH_1206 to 47uH_1206
Page 19. ~PCI_REQ_3 pull high to VCC.(RN41)
Page 20. Change IDSEL to PCI_AD27 , INT to ~PCI_INTD. The same as Riptide X00.
Remove U37.
Page 21. Change net name from PCIRST_4 to ~PCI_RST for U34/110.
Add circuit for internal 1394a pin header.
Page 22. Change value of R519,RN13 from 150 ohm to 1K ohm.
Add R423,R424 for ~KB_GATE_A20 , ~KB_RST to pull high to +3_3V
Change R471,467 value from 100K to 2.7K (VMIN_SMB_AD/CLK)
Reserved R530 between ~PCI_RST and ~PCI_RST_SLOTS
Page 26. Change discription to USB PORT 6,7 for rear USB conn NIC_USB2.
Change net name from USB_P7+_L to USB_6+_L for NIC_USB2 pin3.
Page 23. Reserve EMI caps C1652 ~ C1656 for FRONTAUDIO1 pin header.
Page 33. Change PCI Config table for LOM. IDSEL=AD23,INT= INTD
Page 6. Remove R1346,R1347 , connect CPU/D29,D30 to V_CPU_VTT.
C190 changes to Non-pop
Page 8. C257 changes to the input side (pulled up to VTT) of R219
Change C231 to 1uF (Populated) and C244 to 220pF (Not-Populated)
Page 10. Value change :
C241 -> 0.01uF ; C308 -> 220uF ; C321 -> 470uF ; L34,L35 -> 10uH
C339,C346~C350 -> 2.2uF
Page 13. Change all 39ohm resistors(RN22,RN33,RN34,RN35) to 40.2ohm.
Page 14. Connect PEG/Pin A1 (16PRSNT_A1) to ground.
Page 15. Change mounting holes(MH1,GNDCLIP1~4) to be the same as Dell's format.
Page 16. Delete net ~GPI_SER2_DET ; delete R346
Delete JLPC1 and R1469
Page 17. Delete net ~GPI_RISER_DET ; delete R371
Change LAN_REST# pull-down resistor R1369 to 10K ohm
Add testpoint TP1 on top side of board for SUSCLK
Add C466 0.1uf cap from ~ICH_INTRUDER to gnd.
Delete net ~GPI_INTRUD_CABLE_DET ; delete R370
Change net name ~USB_OC01/~USB_OC23 to ~USB_OC012/~USB_OC3
Change R441 value to 220K ohm
Page 21. Separate AVDD3_3V(AVDD) & +3_3V(DVDD) by adding FB6
PC0(Pin 64) connects to +3_3V ; CPS(Pin 69) connects to AVDD3_3V
TPB2N/TPB2N pull down to 1K ohm(R1405/R1477) respectively.
Connect SCL/SDA(Pin 59/60) to PCI_SMD_CLK/PCI_SMD_AD
Connect G_RST#(Pin 110) to RC time delay circuit. R1478=47K; C1659= 0.1uF
Move Port 1 circuit to Page 24.
Page 22. Remove Floppy , LPT port , Serial port circuit and nets.
Page 23. Change Part reference from FRONTAUDIO1 to FRONTAUDIO due to exceed 10 characters.
Page 24. Move USB Port 3 and 1394a Port 1 circuit to this page. Add 2*8 pin header.
Page 25. Remove Serial Port and LPT Port circuit. Change SATA Connector as 2 ports stack.
Page 25. Change USB1 Connector as 3-ports stack.
Change FS1 as 2A fuse ; FS5 as 1.1A fuse ; Change nets as : ~USB_OC012 , V_5P0_BP012.
Page 26. Add D21 ~ D25 ESD protect Diode.
Page 29. R280,R252,R274 connect to P5VAUX.
U19/4 connect to GND, separate from U19/2.
Page 30. Change C149 value to 22uF 25V 5*11
Page 31. Change High/Low side MOSFET value to IPD06N03LA.
Change Part reference from 12VPOWER to POWER_12V due to non-letter in first.
Page 14. Connect PEG/Pin A1 (16PRSNT_A1) to ground.
Page 17. Change LAN_REST# pull-down resistor R1369 to 10K ohm
Delete net ~GPI_RISER_ID; delete R297
Remove C356 , C1500
Page 21. Pull-Up PC0 to 3.3V with R1481 8.2K.
Pull-Down PC1 and PC2 to ground with R1479,R1480 470ohm.
REG_EN# - pin 107 pulled down through R1422 470Ohm
Remove U35, R1416, R1417, R1422, C1585. Pull SCL and SDA low with R1417,R1417 220Ohm.
Add a ferrite bead FB30 to the VCC_BUS node for EMI
Page 22. Add KB/MS circuit
Add R1485 8.2k pull up to 3.3V for SIO pin104.
R298 change to No-pop
Add C521 22uF Capacitor off of the V_3P3_SIO to GND.
R484 - Remove, and connect directly
Change net GPI_FVS to GPI_FAN_ID ; Remove R446
Page 28. Change C343 value to 0.01uF.
Connect FAN Pin 5 to net ~GPI_FAN_ID with R446 8.2K pull up to +3_3V.
Page 33. Add FWH GPIO Table.
Modify SIO GPIO Table :
584 Pin Name Pin# Power VTRPOR Signal name
LATCHED_BFCUT/GP82 58 VCC/VTR In NC
PWR_GOOD_3V/GP83 59 VCC/VTR In 3P3V_PWRGOOD
GP11/SLP_S5 124 VCC In ~ICH_SLP_S4
GP13/DB_SW 126 VCC In DB_SW , Pulled down
Therm#/GP20/P17 36 VCC In ~GPO_LAN_RST
GP23/INTRD_OUT# 21 VTR In,Out NC
GP24/SYSOPT0 35 VCC In SYSOPT0,Pulled down
GP32 7 VCC In ~GPI_PSWD
GP50/RI2# 114 VCC In NC
GP51/DCD2 107 VCC In NC
GP52/RXD2 109 VCC In NC
GP53/TXD2 111 VCC In NC
GP54/DSR2# 108 VCC In NC
GP55/RTS2# 110 VCC In NC
GP56/CTS2# 112 VCC In NC
GP57/DTR2# 113 VCC In NC
8
7
7
6
2004/02/06
* Add component property "Cfg-A" for Rickles low cost SKU.
Cfg-A= X means No-POP(display). Cfg-A= _ means POP(no display).
PS. Component value is for Rickles Multi Media SKU.
EX: "X_1K/4" means No-POP 1Kohm 0402 resistor. "1K/4" means POP.
Page 14. Add PEG "Cfg-A= X" note
Page 17. Add R1488 ~ R1490 to separate ~AC97_RESET,AC97_SDATA_OUT,AC97_SYNC between Codec and MDC.
Page 20. R1464 change value to 200ohm
C1643 and C1644 change value to 27pF
R1460 change value to 4.7K ohm.
Remove R1456 and R1457
Pin 90 and 93 change to N.C
R1442 and R1443 connect C1666 0.1uF to GND , disconnect P3V3AUX
R1444 and R1445 connect C1667 0.1uF to GND , disconnect P3V3AUX
Add CB14 ~ CB23 0.1uF for P3V3AUX decoupling.
Connect NIC_USB2 pin13 to P3V3AUX
Page 21. Add 1394a "Cfg-A= X" note
Page 22. Remove Q37 and C537. Put R1491 1Kohm resistor between pins 45 and 46.
Remove R1482.
R1485 pull up change to V_3P3_SIO
Page 23. Add R1492 to separate AC97_BITCLK between Codec and MDC.
Add damping res R1493 33ohm for AC97_SDATA_IN
Add CP4,CP5 copper pad to connect Analog GND and the Main GND
R1423 change to 1Kohm
R1424 change to No-POP , Add R1494,R1495 2.2Kohm but No-POP
U9 pin22 connect C1670 0.1uF Cap in series and connect to signal AUD_MICIN_FILT
Add R1496 470 Ohm Resistor pulled up to V_5P0_AUD for AUD_MICIN_FILT.
R7 change to 470 ohm.
Place C1673 0.1uF Cap to GND between 3.3V and L8
Place R1501 0 Ohm 0805 "DePop" Resistor between V_5P0_AUD and P5VAUX
Change signal name AUD_LEFT_OUT to AUD_LFE_OUT. And change signal name LEFT_OUT to LFE_OUT
R1425, R1426, R1427, R1428 change to 100 Ohm
Add C1671,C1672 470pF caps to GND for signals LFE_OUT and CENT_OUT
Add R1497,R1498 47k Ohm resistors to GND between C1598 to R1425 and between C1599 to R1426
Add R1499,R1500 47k Ohm resistors to GND between C1600 to R1427 and between C1601 to R1428
Between R1427 and jack, add pie filter C1674 of 470pF cap to GND then L52 series inductor
(600 Ohm/200mA) then C1676 470pF cap to GND
Between R1428 and jack, add pie filter C1675 of 470pF cap to GND then L53 series inductor
(600 Ohm/200mA) then C1677 470pF cap to GND
Remove C1602 and connect signal directly, change R1429 to a 0 Ohm, and change R1430 to a 1k Ohm
Remove signals AUD_SPKOUT1 AUD_SPKOUT2
Add C1688,C1689 100uF ,R1503,R1504 10Kohm ,C1589,C1590 470pF for Line out circuit.
Add SP/DIFO "Cfg-A= X" note
Page 24. Remove C1605 & C1606. MDC pin21 is NC
Put a schematic note: "Keep P3V3AUX signal to pin17 thick"
Change MDC AC97 signal as AC97_BITCLK_MDC , AC97_SYNC_MDC , ~AC97_RESET_MDC , AC97_SDATA_IN_MDC
NC pin4, pin16 & pin24 , AC97_SDATA_IN_MDC connect to pin26)
Add MDC , 1394a "Cfg-A= X" note
Add FP1394 connector and finish the circuit.
Add FPUSB connector and finish the circuit.
Page 28. U11 change to NC7WZ07P6X , SC70-6pin for easy to layout.
Page 33. Update ICH6 GPIO Map.
2004/02/09
Page 7. Add +CPUCORE deculping caps within CPU cavity and east.
Page 7. Correct U17 Pin AN17 net name to ~M_CHB_RAS.
Page 13. Change RN20 to 4 resistors due to routing issue.
Page 21. Change FRONTAUDIO conn to box header symbol.
Page 24. Modify internal USB circuit.
Change FP1394 conn to box header symbol.
Page 25. Change SATA conn to 2 separate connectors.
Page 26. Change USB1 Pin 9 to GND.
Page 28. Change FRONTPANEL conn to box header symbol.
2004/02/10
Page 5. Move R412 to page 17.
Page 14. Remove Note for Cfg-A= X , and set property Cfg-A= _ for all parts this page.
Page 17. R462 change value to 27K ohm.
Place schematic Note for 33 Ohm parts: "Place resistors close to ICH6"
U20 pin B26 (OC_2#) connect to ~USB_OC012.
Page 18. C426,C454,C429 change value to 0.1uF.
C404,C483,C486,C406 change value to 0.01uF.
Page 20. C1644 change value to 27pF
Add net name 10_LED# for U38 pin 75 and connect to NIC_USB2 pin 20 , pull up 330 ohm(R1450).
Change 100_LED# to connect to NIC_USB2 pin 19. (Orange)
Page 21. R1422 change value to 470 ohm.
Page 22. FS7 change value to 2A fuse.
Add R1505,R1506,R1507,RN46,RN47,RN48 to pull up SIO pins
76,66,65,64,62,80,81,82,83,95,105,100,103,98,99, 10K ohm to +3_3V.
Change R1483, R1484, R1486, and R1487 value to 2.7K ohm.
Change C1661, C1662, C1664, and C1665 value to 470pf.
Add pi-filter C1660,FB32.C1663 and a 22uf bulk cap C1679 for KBMSVCC between FS1 and the connectors.
Page 23. Remove CD_IN1 connector and associated circuit.
Change C1670 to connect to AUD_MIC_PWR_FILT
Page 25. Add note "For proto type only , be depop for production." fot ITP port.
Page 28. Remove C1620,C1624,C1625
C1630 change to depop.
Page 33. Update SIO GPIO map. Pin 72,74,77,78 change to NC.
2004/02/11
Page 7. Remove C256,C277 ,change value of caps placed in CPU cavity from 10uF to 22uF by Design guide 1.1.
Page 17. Add net name GPI_1394_CABLE for ICH6 pin M2 (GPI12)
Page 20. R1450,R1458,R1463 change value to 150 ohm.
Add R1508 1K ohm pull up to P3V3AUX at U36 pin 6.
Add R1509 150 Ohm pull-up to P3V3AUX on the TR_LED
Page 21. Add ferrite bead FB33 ~ FB36 ( pop 0 ohm) and common choke L54,L55(depop) in front of J3.
R1414 change to 300 ohm.
Page 23. R1423 change to depop. EC7 change value to 10uF. C1652 ~ C1656 change value to 470pF(depop).
Change C1652 ~ C1656 connection to GNDF.
Page 24. Add R57,R59 for ~USB_OC3 resistor divider.
Page 27. U11 pin 5 change connection to V_2P5_DAC. Add R1510,R1511 1K ohm pull-up to VCC at U11 pin 6,4.
Page 28. C1622 change to depop.
Page 31. Add input caps C461,C462,C463,C1515 for net FIL_V_5P0_DUAL.
6
Page 33. Update ICH6 GPI12 pin M2 signal name as GPI_1394_CABLE.
5
5
4
4
3
2004/02/12
Page 6. Add C1680 0.1uF from ~H_THRMTRP to GND and depop it.
Page 8. Change C244 to POP.
Page 10. L39 change value to FB180/6/1.5A
L40 change value to 0.15uH/1210/1.45A
Change net name NC_EXP_SLR to EXP_SLR.
Add C1681 0.1uF for V_1P5_EXP
Page 15. Add C1682 HF filter cap for EMI on PCI_CK_33M_1394 , and depop.
Page 17. Net GPI_1394_CABLE change to ~GPI_1394_CABLE
Page 18. L44 change value to 0.47uH/1210/1.1A
Page 19. Remove R1301 ~ R1306 , ~GPI_CHAS[0..2] and Chassis ID table.
Add note "Proto type only , be depop for production." for LPC debug
port.
Page 22. PSWD change to 3 pins Header. and update PSWD table.
Page 23. VR1 change to LT1087S/0.8A/SOT89 and add R1510 , R1511.
Add AUX_IN connector and assiciated circuit.
Page 24. Net GPI_1394_CABLE change to ~GPI_1394_CABLE
Page 27. U11 change to 2 74AHCT1G08 AND gates ( U3,U11).
Page 33. Update FWH GPs table. Pin 4,5,6 = NC.
2004/02/13
2004/02/17
3
Update PSWD table. (1-2) = Normal , (2-3) = Clear PSWD.
Page 1. Add Page 39 for schematics history and Page 40 for population
option parts.
Page 6. C333 change to population.
Page 17. Add net ~GPI_MODEM_CABLE_DET on ICH6 GPI6 ( Pin AD19)
Add R1512 8.2Kohm pull-up to +3_3V for ~GPI_MODEM_CABLE_DET
Add net CDC_DWN_ENABLE on ICH6 GPI27 ( Pin R3 )
Page 20. Add low-power-mode cut-off FET circuit .change all pull-ups for
the LOM to the +3V3SB_LAN. Also, implement EXT_POR_L with
CDC_DWN_ENABLE.
Page 23. Update AUX_IN circuit.
Display property Cfg-STD = JACK1 , and Cfg-A = JACK2 for AUDIO1
Jack connector.
Add note : " JACK1,JACK2 is on Page 40."
Page 32. Correct net name for U15 Pin 20,21,22,23 to VRM_PHASE[1..4]B_SENSE
Add 1 MOS-HEATSINK
Page 33. Update ICH6 GPI6 to ~GPI_MODEM_CABLE_DET
Update ICH6 GPI27 to CDC_DWN_ENABLE.
2004/02/16
* Add component property "Cfg-P" for Rickles proto type BOM.
Cfg-STD stands for Multi media SKU production BOM.
Cfg-A stands for Low cost SKU production BOM.
Page 3. Update Reset Map. Connect ~PLT_RST to 1394a TSB43AB23 and Diag LED.
Page 6. Remove R1348 and leave Pin F27 NC.
Page 9. C331 change to Population.
Page 12. DIMM_1,DIMM_2 change value to DDR2/BLACK
Page 14. Add C1693 for PCI_E P3V3AUX decoupling
Add C1694,C1695 for PCI_E +3_3V decoupling.
Add C1696 for PCI_E V_12P0_DIG decoupling.
Correct C219/C226 left side net to EXP_MCH_G_P3_C/~EXP_MCH_G_P3_C
Page 19. Add C1699 for PCI1 -12V decoupling
Add C1700 for PCI1 V_12P0_DIG decoupling.
Add C1701,C1702 for VCC decoupling.
Add C1703,C1704,C1705,C1706 for +3_3V decoupling.
C1499 change value to 4.7uF.
Display property Cfg-STD= X , Cfg-A= X for LPC Debug port components.
Page 21. CP1 ~ CP3 change to R1518 ~ R1520 0 ohm 0603.
Change PCI_RESET to net ~PLT_RST
Page 23. AUX_IN chage Reference name to MODEM.
Page 23. CP4,CP5 change to R1521,R1522 0 ohm 0603.
Page 24. FP1394 PIN4 trace name change to ~GPI_1394_CABLE.
Remove F2 , connect directly.
Page 25. Change SATA0 value to SATACONN/90D/BLUE
Display property Cfg-STD= X , Cfg-A= X for ITP port components.
Page 28. Change U10 Pin 9 net to ~PLT_RST
Page 7. Change caps in CPU cavity to 15 10u/10V/8 caps and a 220uF SP-Cap.
Move caps in east of CPU cavity to north of CPU cavity and change to
10 caps.
Page 17. Remove SATA1 signals SATA_1_RX-_C , SATA_1_RX+_C , SATA_1_TX- , SATA_1_TX+
Net CDC_DWN_ENABLE change name to ~LOM_LOWPWR
Remove R433 and C466 and net ~INTRUDER.
Add Note " DEFAULT" for JBAT1 Table.
Add R1523 8.2K for ~LOM_LOWPWR pull-up to P3V3AUX
Page 20. Depop Q57 and R1515.
Change net P3V3AUX on U36 pin8 and NIC_USB2 to +3VSB_LAN.
Page 21. Remove CP1 ~ CP3 and connect J3 pin 2,7,8,9 to GND directly.
Page 22. Remove net ~GPI_AUD_PCSPK_DET , leave GP17 NC.
Add Note " DEFAULT" for PSWD Table.
Remove L49 , and connect +3_3V to V_3P3_SIO , Change all net
V_3P3_SIO to +3_3V.
Page 23. Add C1707 0.1uF for CK_14M_AUD_CODEC decoupling.
Add C1708 0.1uF for U9 pin 6 decoupling.
Remove R1494 , R1424 , add R1524 10ohm for U9 pin3 pull-down.
Net AUD_MODEM_IN change connection to U9 pin13.
Net AUD_MODEM_OUT change connection to U9 pin37.
Change GND of C53 , C57 to GNDF , and add Note " Place close to U9".
EC7 change value to 22u/10V/1206 and add C1710 1uF for
V_5P0_AUD decoupling.
Connect pins of AUDIO1 to GNDF : Pin 11,12,7,8,30,31,26,27.
Add Note " Place close to U9" for R1429.
Page 25. Remove SATA1 and associated circuit.
Add BUZZER circuit.
Page 27. Add D7 to R80 and R72 VCC pin.
Page 28. Add Power Switch and add note " For proto type only, ...".
2
MSI
Title
Size Document Number Rev
2
Date: Sheet of
1
MICRO-STAR INt'L CO., LTD.
Schematics History
Rickles
1
X00
38 40 Tuesday, February 24, 2004
Page 39
2004/02/17
Page 28. Remove net ~INTRUDER and ~GPI_AUD_PCSPK_DET.
Page 29. Depop R366,R365,U19,R359,R361,C409,C420,R337,
C394,R308,R364,C366,R307,C421,R309,R310,Q43,C416.
Page 30. Depop C474,U21.
Page 31. Depop R469,R473,R478,C520,C523,C477,U23,R479,R481,C526,
C515,C517,C514,D13,C527.
D D
Page 32. U15 change value to ADP3188.
Page 33. Update ICH6 GPI27 to ~LOM_LOWPWR.
Page 34. Add connection From +5V_AUX to V_5P0_AUD.
2004/02/17
Page 3. Add L58,L59 parallel to L30,L30 and Depop L30,L31.
Page 7. Change Note to "Palce caps at east of CPU".
Page 15. Add R1531 8.2Kohm pull-up to V_3P3_CLKPWR_L for U13 pin 8.
Page 16. Add R1532 8.2Kohm pull-up to +3_3V for ICH6 GPI0.
Page 17. Depop R347. Remove R486.
Page 20. R1509 change value to 10Kohm.
Page 21. U34 pin 4 ( IDSEL ) change to connect PCI_AD26. Update Note at left top.
Page 23. Add Frontaudio jack sensing circuit.
C C
Page 24. Add C1714 10uF to P3V3AUX at MDC1.
Page 25. Change "Buzzer" to "Speaker".
Page 26. Pop R1434,R1436.
Page 27. Depop D21 ~ D25.
Page 28. Add R1535 220ohm between R446 and GPI_FAN_ID.
Page 29. Pop R311.
Page 30. Change GND of C1712 to VCC.
Page 33. Update PCI Cfg Table , 1394 IDSEL change to AD26.
2004/02/18
Page 7. Add C1717 ~ C1726 10uF at the east of CPU.
Page 14. Add PEG_CLIP for PCI_E clip.
Page 24. Add 2 screws for MDC module.
Page 25. Reserve caps C1728 ~ C1753 by EMI Sean request.
Page 30. C295,C326,C310,C354,C355 change value to 1500u/6.3V/10*12.5 due to high limit for layout.
Page 32. Remove C166 due to layout space issue.
2004/02/23
Page 20. Remove +3VSB_LAN circuit.
Page 22. Remove KB/MS circuit and add Serial circuit.
Page 23. Depop R1524.
Page 25. Reserve caps for EMI.
2004/02/24
B B
Page 1. Change P23 description to "Audio - AC'97/Azalia AD1980/86".
Page 23. Add series 0 ohm R1545 from pin 33 of U9 to GND.
8
Remove C498 , change C499 to P3V3AUX decoupling and pop.
POP R1341.
Add C1712 0.1uF to GND for DLA.
Pop R1331,R1511,C1510,R1329,U29,C1505,R1323,R1319,R1318,
C1507,R1330,C1504,R1328,R1322.
Move C180 to Page 7.
Update SIO GP17 to NC.
Update SIO Pin45 to 1K to pin46.
Update SIO Pin46 to 1K to pin45.
Add Note " Maybe Remove later " for R342,R344.
Change R1502 to L60 , and pop it. Depop VR1,C127,R1510,R1511.
R41,R37,R48,R46 change value to 75 ohm.
Remove R1496,R1527,R1528,C1710,R1521,R1522.
R7,R1525 change value to 2.7K ohm.
R1526 change value to 1.5K ohm.
C1598,C1599 change value to 2.2uF.
Remove R1425,R1426,R1427,R1428 and connect both side of the resistor directly.
Change all GNDF net to GND.
Modify Jack symbol so that can distinguish ring/tip of MIC jack.
Depop C1707.
R193,R194 change value to 0 ohm.
L10,L11,L12 change value to FB80/6.
Connect pin 42 (N/C) of U9 to V_5P0_AUD.
Add series 0 ohm R1541 from pin 43 (AVDD3) to V_5P0_AUD
Add pull-up (No Installed) R1540 from pin 46 to V_5P0_AUD.
Add 0 ohm series resistor R1544 to pin2 of U9 and include pull-down/up
R1543/R1542 (No Installed) off of pin 2.
Add pull-down resistors R1547/R1548 and caps C1765/C1766 to pin16/17 for Azalia.
Add Note for not supporting jack sensing and enumeration for Azalia.
Add note 1980/1986 to know which part should be pop for different codec.
7
6
5
4
3
2
1
A A
MSI
MICRO-STAR INt'L CO., LTD.
Title
Schematics History
Size Document Number Rev
8
7
6
5
4
3
2
Date: Sheet of
Rickles
1
X00
39 40 Tuesday, February 24, 2004
Page 40
8
7
6
5
4
3
2
1
D D
C C
B B
Multi Media SKU = Cfg-STD Low Cost SKU = Cfg-A
JACK1
LIN IN LFE
LINE OUT
MIC
CONN-AUDIOJACKX5_SPDIFX1
SUR
SPDIF
Cfg-STD = _
Cfg-A = X
JACK2
LIN IN LFE
LINE OUT
SUR
MIC
X_CONN-AUDIOJACKX5_W/O_SPDIF
Cfg-STD = X
Cfg-A = _
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Population Option Parts
Rickles
2
40 40 Tuesday, February 24, 2004
X00
1