Page 1
5
4
3
2
1
MS-7034 VER:10A Micro ATX
Version 10A
05/26/2004 Update
*AMD PGA 754 K8-Processor (DDR 400)
*nFORCE3 250Gb
D D
*Winbond 83627THF S/IO
*VT6306 1394a OHCI Link Layer Controller
*RTL 8110S Giga & RTL8100C 10/100 Bit LAN Support
*AC'97 Codec ALC655
*USB 2.0 support (8 ports integrated into nFORCE3)
*SATA*2 nFORCE3 250Gb
*AGP SLOT * 1 ( 8X )
*PCI SLOT * 3
C C
*DDR DIMM * 2
*Vcore Jumpless support
Title
Cover Sheet
Block Diagram
GPIO SPEC
AMD K8 -> 754 PGA Socket
nFORCE3 CK8S-1000
System Memory
DDR DIMM 1 & 2
DDR Terminations R & C
DDR Damping R & Bypass Cap.
AGP SLOT 8X
PCI Connectors * 3
IDE ATA 66/100/133 Connectors * 2
LPC I/O W83627THF & Floppy
LPT/COM Port
FAN & BIOS
Keyboard/Mouse Connectors
LAN RTL8201BL & RTL8110S
1394a Controller VT6306
AC'97 Codec ALC655
Front USB Port *2
Rear USB Port *2
SYSTEM VOLTAGE REGULATOR
ACPI Power CONTROLLER (MS-6)
K8 Vcore
B B
Front Panel & POWER OK CIRCUIT
Decoupling Cap.
POWER MAP
History-01
Page
1
2
3
4,5,6
7~12
13
14
15
16
17,18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
History-02 36
OPTION PARTS
37
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
1
Cover Sheet
MS-7034
Last Revision Date:
Sheet
Rev
10A
Wednesday, May 26, 2004
1 39
of
Page 2
5
nFORCE3
4
3
2
1
250Gb
DDR400
AMD K8 Socket 754
D D
Block
Diagram
HT
IDE Slot
==>ATA66,100,133 *2
A
G
AGP 8X /Fast Write
C C
5 PCI Slots
P
S
L
O
T
nFORCE3 250Gb
Dual ATA
100/133
MII BUS 10/100 LAN PHY
LPC BUS
PCI-33
Codec ALC655
B B
1394
Front-Port *2
1394 Host
Controller
VT6306
SERIAL ATA *2
AC97
USB
SUPER I/O
W83627THF
DDR * 2
(RTL8201BL)
(Reserved)
ROM
X BUS
Giga Bit LAN
RTL8110S/8100C
A A
5
4
3
Dual USB 1.1 OHCI
/2.0 EHCI 8 Ports
==> Front-Port *4 ,
Back-Port *4
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
Block Diagram
MS-7034
1
Last Revision Date:
Sheet
Rev
Monday, May 10, 2004
2 39
of
10A
Page 3
5
4
3
2
1
CK8S-1000 GPIO FUNCTION
NAME
GPIO1
D D
(page#11)
GPIO2
GPIO4
GPIO5
GPIO6
LID#/GPIO7
GPIO8
GPIO9
GPIO10/HT1_REQ#
GPIO11/STOP_AGPCLK#
GPIO12
C C
GPIO13/ASF0
GPIO14/ASF1
GPIO15
GPIO16
GPIO17
GPIO18
MII_RXER/GPIO21
RI#/GPIO30
SPDIF/GPIO51
FANRPM/GPIO52
B B
FANCTL0/GPIO53
FANCTL1/GPIO54
BUF_14MHZ/GPIO55
CPU_SLP/GPIO56
SLP_S1/GPIO57
SPIO_20/SATALED*
Pin
Y6
AE2
E14
D14
F12
E8
B15
B14
B17
E11
E13
F13
B7
F8
D3
D2
C4
AN33
B5
B16
E6
D5
C5
B6
C3
C8
E4
Function define RESET
ATADET0=>Detect IDE1 ATA100/66
ATADET1=>Detect IDE2 ATA100/66
VSET0
(Vocre Adjust)
VSET1
(Vocre Adjust)
NA
NA
NA
NA
VSET2
(Vocre Adjust)
NA
NA
Pull Up to 3.3V (BIOS protect)
1394 Enable/Disable
NA
NA
NA
NA
NA
NA (Exteranl Pull up to 3VDUAL)
NA (Exteranl Pull up to VCC3)
NA
NA
NA
NA
NA (Exteranl Pull up to 3VDUAL)
NA
SATA_LED#
S/IO GPIO Function Define
NAME Pin
GPBX/GP13
GPAY/GP15
GPSA1/GP10
GPSA2/GP17
GPX1/GP12
GPY2/GP14
GPSB1/GP11
GPSB2/GP16
125
123
128
121
126
124
127
122
Function define
DLED#4
DLED#2
DLED1
DLED4
DLED#3
DLED#1
DLED2
DLED3
PCI Routing
DEVICES
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
Giga-Bit
LAN
1394 INT#D(PIRQ#D) AD28
FWH
SIO
MS6 PCIRST#4
INT#
INT#A(PIRQ#A)
INT#B(PIRQ#B)
INT#C(PIRQ#C)
INT#D(PIRQ#D)
INT#B(PIRQ#B)
INT#C(PIRQ#C)
INT#D(PIRQ#D)
INT#A(PIRQ#A)
INT#C(PIRQ#C)
INT#D(PIRQ#D)
INT#A(PIRQ#A)
INT#B(PIRQ#B)
IDSEL
AD22
AD23
AD24
INT#E(PIRQ#E) AD29
REQ#/GNT#
PREQ#0
PGNT#0
PREQ#1
PGNT#1
PREQ#2
PGNT#2
PREQ#4
PGNT#4
PREQ#3
PGNT#3
CLOCK
PCICLK0
PCICLK1
PCICLK2
PCICLK5
PCICLK3
PCICLK4
PCICLK6
PCIRST#1
PCIRST#1
PCIRST#1
PCIRST#3
PCIRST#2
PCIRST#3
PCIRST#3
USB_OC5#/GPIO26 D17 LAN_RST#
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
GPIO Spec.
MS-7034
Last Revision Date:
Monday, May 10, 2004
Sheet
3 39
1
Rev
10A
of
Page 4
5
4
3
2
1
MEMZN
MEMZP
MD63
MD62
MD61
MD60
MD59
MD58
MD57
MD56
MD55
MD54
MD53
MD52
MD51
MD50
MD49
MD48
MD47
MD46
MD45
MD44
MD43
MD42
MD41
MD40
MD39
MD38
MD37
MD36
MD35
MD34
MD33
MD32
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
-MDQS7
-MDQS6
-MDQS5
-MDQS4
-MDQS3
-MDQS2
-MDQS1
-MDQS0
AE13
AG12
D14
C14
A16
B15
A12
B11
A17
A15
C13
A11
A10
C11
AC1
AC3
AC2
AD1
AE1
AE3
AG3
AJ4
AE2
AF1
AH3
AJ3
AJ5
AJ6
AJ7
AH9
AG5
AH5
AJ9
AJ10
AH11
AJ11
AH15
AJ15
AG11
AJ12
AJ14
AJ16
A13
AA1
AG1
AH7
AH13
A14
AB1
AJ2
AJ8
AJ13
C53
X_102P
B9
C7
A6
A9
A5
B5
C5
A4
E2
E1
A3
B3
E3
F1
G2
G1
L3
L1
G3
J2
L2
M1
W1
W3
W2
Y1
R1
A7
C2
H1
T1
A8
D1
J1
VTT_SENSE
MEMVREF1
MEMZN
MEMZP
MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
MEMDATA4
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0
MEMDQS17
MEMDQS16
MEMDQS15
MEMDQS14
MEMDQS13
MEMDQS12
MEMDQS11
MEMDQS10
MEMDQS9
MEMDQS8
MEMDQS7
MEMDQS6
MEMDQS5
MEMDQS4
MEMDQS3
MEMDQS2
MEMDQS1
MEMDQS0
U1B
RSVD_MEMADDA15
RSVD_MEMADDA14
RSVD_MEMADDB15
RSVD_MEMADDB14
MEMORY INTERFACE
VTT_A4
VTT_A1
VTT_A2
VTT_A3
VTT_B1
VTT_B2
VTT_B3
VTT_B4
MEMRESET_L
MEMCKEA
MEMCKEB
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H3
MEMCLK_L3
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
MEMCS_L7
MEMCS_L6
MEMCS_L5
MEMCS_L4
MEMCS_L3
MEMCS_L2
MEMCS_L1
MEMCS_L0
MEMRASA_L
MEMCASA_L
MEMWEA_L
MEMBANKA1
MEMBANKA0
MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0
MEMRASB_L
MEMCASB_L
MEMWEB_L
MEMBANKB1
MEMBANKB0
MEMADDB13
MEMADDB12
MEMADDB11
MEMADDB10
MEMADDB9
MEMADDB8
MEMADDB7
MEMADDB6
MEMADDB5
MEMADDB4
MEMADDB3
MEMADDB2
MEMADDB1
MEMADDB0
MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0
4
D17
A18
B17
C17
AF16
AG16
AH16
AJ17
AG10
AE8
AE7
D10
C10
E12
E11
AF8
AG8
AF10
AE10
V3
V4
K5
K4
R5
P5
P3
P4
D8
C8
E8
E7
D6
E6
C4
E5
H5
D4
G5
K3
H3
E13
C12
E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5
H4
F5
F4
L5
J5
E14
D12
E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3
N3
N1
U3
V1
N2
P1
U1
U2
VTT_DDR_SUS
MCKE0
MCKE1
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
-MCS3
-MCS2
-MCS1
-MCS0
-MSRASA
-MSCASA
MAA13
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0
MAB13
MAB12
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
MCKE0 <13,14>
MCKE1 <13,14>
MEMCLK_H[7..0]
MEMCLK_L[7..0]
-MCS[3..0]
-MCS[3..0] <13,14>
-MSRASA <13,14>
-MSCASA <13,14>
-MSWEA <13,14>
MEMBANKA1 <13,14>
MEMBANKA0 <13,14>
MAA[13..0] <13,14>
-MSRASB <13,14>
-MSCASB <13,14>
-MSWEB <13,14>
MEMBAKB1 <13,14>
MEMBAKB0 <13,14>
MAB[13..0] <13,14>
MEMCLK_H[7..0] <13,14>
MEMCLK_L[7..0] <13,14>
CADIP[0..15]<7>
CADIN[0..15]<7>
CLKIP1<7>
CLKIN1<7>
CLKIP0<7>
CLKIN0<7>
CTLIP0<7>
CTLIN0<7>
3
VLDT0
VREF routed as 40~50 mils trace wide ,
Space>25 mils
D D
DDR_VREF<13>
VDD_25_SUS
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
R67 44.2R1%
R66 44.2R1%
C1000P50X
nVIDIA check@010693
MD[63..0]<15>
C C
B B
DM[7..0]<15>
-MDQS[7..0]<15>
A A
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
5
VDD_12_A
VDD_12_A
CADIN15
CADIN14
CADIN13
CADIN12
CADIN11
CADIN10
CADIN9
CADIN8
CADIN7
CADIN6
CADIN5
CADIN4
CADIN3
CADIN2
CADIN1
CADIN0
CLKIP1
CLKIN1
CLKIP0
R56 49.9R1%
R58 49.9R1%
CLKIN0
CTLIP0
CTLIN0
C179
X_0.22u
CADIP15
CADIP14
CADIP13
CADIP12
CADIP11
CADIP10
CADIP9
CADIP8
CADIP7
CADIP6
CADIP5
CADIP4
CADIP3
CADIP1
CADIP0
CTLIP1
CTLIN1
C177
C0.22U16Y
D29
D27
D25
C28
C26
B29
B27
T25
R25
U27
U26
V25
U25
W27
W26
AA27
AA26
AB25
AA25
AC27
AC26
AD25
AC25
T27
T28
V29
U29
V27
V28
Y29
W29
AB29
AA29
AB27
AB28
AD29
AC29
AD27
AD28
Y25
W25
Y27
Y28
R27
R26
T29
R29
C178
C0.22U16Y
U1A
N12-7540010-F02
VLDT0_A6
VLDT0_A5
VLDT0_A4
VLDT0_A3
VLDT0_A2
VLDT0_A1
VLDT0_A0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
HYPER TRANSPORT - LINK0
2
C171
X_0.22u
C170
C172
C0.22U16Y
C0.22U16Y
VLDT0_B6
VLDT0_B5
VLDT0_B4
VLDT0_B3
VLDT0_B2
VLDT0_B1
VLDT0_B0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
Title
Document Number
C284
C0.22U16YC39
AH29
AH27
AG28
AG26
AF29
AE28
AF25
CADOP15
N26
CADON15
N27
CADOP14
L25
CADON14
M25
CADOP13
L26
CADON13
L27
CADOP12
J25
CADON12
K25
CADOP11
G25
CADON11
H25
CADOP10
G26
CADON10
G27
CADOP9
E25
CADON9
F25
CADOP8
E26
CADON8
E27
CADOP7
N29
CADON7
P29
CADOP6
M28
CADON6
M27
CADOP5
L29
CADON5
M29
CADOP4
K28
CADON4
K27
CADOP3
H28
CADON3
H27
CADOP2CADIP2
G29
CADON2
H29
CADOP1
F28
CADON1
F27
CADOP0
E29
CADON0
F29
CLKOP1
J26
CLKON1
J27
CLKOP0
J29
CLKON0
K29
N25
P25
CTLOP0
P28
CTLON0
P27
Micro Star Restricted Secret
K8 DDR & HT
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-7034
VLDT0
VLDT0 <5>
CADOP[0..15] <7>
CADON[0..15] <7>
CLKOP1 <7>
CLKON1 <7>
CLKOP0 <7>
CLKON0 <7>
CTLOP0 <7>
CTLON0 <7>
Last Revision Date:
Monday, May 24, 2004
Sheet
1
C92
C4.7U10Y0805
4 39
of
Rev
10A
Page 5
5
D D
4
C62
X_102P
VDDIO_SENSE
3
VCCA_PLL trace length from the VR1 to the
PGA must be 0.75".
2
1
Place al filters close to the PGA.
Keep all power and signal trce away from
the VR1.
Place a cut in the GND plane around the
VCCA_PLL regulator circuit.
VCC2_5
LAYOUT: Route VDDA trace approx. 50 mils wide (use 2x25 mil
VCC2_5
C C
VLDT0<4>
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
HDT Test Port Signal .
B B
DBREQ_L
DBRDY
TMS
TDI
TCK
TRST_L
NC_AG18
NC_AH18
A A
NC_AJ18
NC_AG17
NC_D18
NC_C19
NC_B19
NC_D20
NC_C21
5
R36 X_1KR
R37 X_1KR
3 4
5 6
7 8
R322 1KR
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R65 1KR
X_8P4R-1KR1 2
RN42
VCC2_5
RN11
8P4R-1KR
8P4R-1KR
RN43
traces to exit ball field) and 500 mils long.
FB1 0.18U450m_1210
VLDT0
R55 44.2R1%
R57 44.2R1%
4
CPU_VDDA_25
C101
C1000P50X
VDD_25_SUS
C103
C1000P50X
C4.7U10Y0805
CPURST#<7>
CPU_GD<7>
LDTSTOP#<7>
COREFB_H<31>
COREFB_L<31>
Differential , "10:10:5:10:10" .
CPUCLK0_H<7>
Near CPU in 0.5" .
CPUCLK0_L<7>
3
C48
L0_REF1
L0_REF0
C61 C0.039U16X
C60 C0.039U16X
R39 820R
VTT_DDR_SUS
VCC2_5
nVIDIA check@010693
C55
X_C0.22U16Y
CPURST#
CPU_GD
LDTSTOP#
VDDIO_SENSE
R48 10P
R63 680R
R62 680R
3 4
5 6
7 8
C44
C1000P50X
NC_AJ23
NC_AH23
DBRDY
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
NC_AE23
NC_AF23
NC_AF22
NC_AF21
RN13
X_8P4R-1KR
1 2
CLKIN_H
CLKIN_L
C4.7U10Y0805
AH25
VDDA1
AJ25
VDDA2
AF20
RESET_L
AE18
PWROK
AJ27
LDTSTOP_L
AF27
L0_REF1
AE26
L0_REF0
A23
COREFB_H
A24
COREFB_L
B23
CORE_SENSE
AE12
VDDIOFB_H
AF12
VDDIOFB_L
AE11
VDDIO_SENSE
AJ21
CLKIN_H
AH21
CLKIN_L
AJ23
NC_AJ23
AH23
NC_AH23
AE24
NC_AE24
AF24
NC_AF24
C16
VTT_A5
AG15
VTT_B5
AH17
DBRDY
C15
NC_C15
E20
TMS
E17
TCK
B21
TRST_L
A21
TDI
C18
NC_C18
A19
NC_A19
A28
KEY1
AJ28
KEY0
AE23
NC_AE23
AF23
NC_AF23
AF22
NC_AF22
AF21
NC_AF21
C1
FREE29
J3
FREE31
R3
FREE33
AA2
FREE35
D3
FREE1
AG2
FREE37
B18
FREE4
AH1
FREE38
AE21
FREE41
C20
FREE7
AG4
FREE11
C6
FREE12
AG6
FREE13
AE9
FREE14
AG9
FREE40
C45
CPURST#
CPU_GD
LDTSTOP#
2
1 2
3 4
5 6
U1C
THERMTRIP_L
G_FBCLKOUT_H
G_FBCLKOUT_L
RN10
8P4R-330R
7 8
THERMDA
THERMDC
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
NC_AF18
RSVD_SCL
RSVD_SDA
FREE26
FREE28
FREE30
FREE32
FREE34
FREE36
FREE10
FREE18
FREE19
FREE42
FREE24
FREE25
FREE27
A20
A26
A27
AG13
VID4
AF14
VID3
AG14
VID2
AF15
VID1
AE15
VID0
AG18
AH18
AG17
AJ18
AH19
AJ19
AE19
D20
C21
D18
C19
B19
A22
TDO
AF18
D22
C22
B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
CP6 X_COPPER
FB3
X_120S/0603
THRM#
THERMDA_CPU
THERMDC_CPU
VID4
VID3
VID2
VID1
VID0
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
FBCLKOUT_H
FBCLKOUT_L
Zdiff = 80 ohm
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
TDO
LAYOUT: Route
FBCLKOUT_H/L differentially
R38
with 20/8/5/8/20 spacing and
80.6R1%R40 820R
trace width. ( In CPU
breakout => routed 5:5:5 )
R64
X_1KR
VID0
1 2
VID1
3 4
VID2
5 6
VID3
7 8
X_8P4R-4.7K
VID4
R29 X_4.7K
Micro Star Restricted Secret
K8 HDT & MISC
020493
THERMDC_CPU
THRM# <30>
THERMDA_CPU <20>
THERMDC_CPU <20>
VID[4..0] <31>
VDD_25_SUS
RN6
MS-7034
Last Revision Date:
Monday, May 24, 2004
Sheet
1
VCC2_5
5 39
of
Rev
10A
Page 6
5
4
3
2
1
U1F
1
U1E
B2
VSS1
AH20
VSS3
AB21
VSS4
W22
VSS5
M23
VSS6
L24
VSS7
AG25
VSS8
AG27
VSS9
D D
C C
B B
A A
D2
VSS10
AF2
VSS11
W6
VSS12
Y7
VSS13
AA8
VSS14
AB9
VSS15
AA10
VSS16
J12
VSS17
B14
VSS18
Y15
VSS19
AE16
VSS20
J18
VSS21
G20
VSS22
R20
VSS23
U20
VSS24
W20
VSS25
AA20
VSS26
AC20
VSS27
AE20
VSS28
AG20
VSS29
AJ20
VSS30
D21
VSS31
F21
VSS32
H21
VSS33
K21
VSS34
M21
VSS35
P21
VSS36
T21
VSS37
V21
VSS38
Y21
VSS39
AD21
VSS40
AG21
VSS41
B22
VSS42
E22
VSS43
G22
VSS44
J22
VSS45
L22
VSS46
N22
VSS47
R22
VSS48
U22
VSS49
AG29
VSS50
AA22
VSS51
AC22
VSS52
AG22
VSS53
AH22
VSS54
AJ22
VSS55
D23
VSS56
F23
VSS57
H23
VSS58
K23
VSS59
P23
VSS60
T23
VSS61
V23
VSS62
Y23
VSS63
AB23
VSS64
AD23
VSS65
AG23
VSS66
E24
VSS67
G24
VSS68
J24
VSS69
N24
VSS70
R24
VSS71
U24
VSS72
W24
VSS73
AA24
VSS74
AC24
VSS75
AG24
VSS76
AJ24
VSS77
B25
VSS78
C25
VSS79
B26
VSS80
D26
VSS81
H26
VSS82
M26
VSS83
T26
VSS84
Y26
VSS85
AD26
VSS86
AF26
VSS87
AH26
VSS88
C27
VSS89
B28
VSS90
D28
VSS91
G28
VSS92
F15
VSS187
H15
VSS188
AB17
VSS206
AD17
VSS207
B16
VSS208
G18
VSS209
AA18
VSS210
AC18
VSS211
D19
VSS212
F19
VSS213
H19
VSS214
K19
VSS215
Y19
VSS216
AB19
VSS217
AD19
VSS218
AF19
VSS219
J20
VSS220
L20
VSS221
N20
VSS222
GND
GROUND
5
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS189
VSS190
VSS191
VSS192
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS223
VSS201
VSS202
VSS203
VSS204
VSS205
L28
R28
W28
AC28
AF28
AH28
C29
F2
H2
K2
M2
P2
T2
V2
Y2
AB2
AD2
AH2
B4
AH4
B6
G6
J6
L6
N6
R6
U6
AA6
AC6
AH6
F7
H7
K7
M7
P7
T7
V7
AB7
AD7
B8
G8
J8
L8
N8
R8
U8
W8
AC8
AH8
F9
H9
K9
M9
P9
T9
V9
Y9
AD9
B10
G10
J10
L10
N10
R10
U10
W10
AC10
AH10
F11
H11
K11
Y11
AB11
AD11
B12
G12
AA12
AC12
AH12
F13
H13
K13
Y13
AB13
AD13
AF17
G14
J14
AA14
AC14
AE14
D16
E15
K15
AB15
AD15
AH14
E16
G16
J16
AA16
AC16
AE29
AJ26
E18
F17
H17
K17
Y17
VCORE
AC15
AB14
AA15
AB16
AA17
AC17
AE17
AB18
AD18
AG19
AC19
AA19
AB20
AD20
AA21
AC21
AB22
AD22
AA23
AC23
AB24
AD24
AH24
AE25
GND
H18
B20
E21
H22
J23
H24
F26
V10
G13
K14
Y14
G15
J15
H16
K16
Y16
G17
J17
F18
K18
Y18
E19
G19
J19
F20
H20
K20
M20
P20
T20
V20
Y20
G21
J21
L21
N21
R21
U21
W21
F22
K22
M22
P22
T22
V22
Y22
E23
G23
L23
N23
R23
U23
W23
B24
D24
F24
K24
M24
P24
T24
V24
Y24
K26
P26
V26
U1D
L7
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
N7
VDD10
L9
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD39
VDD38
VDD37
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
VDD77
VDD78
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92
POWER
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50
VDDIO6
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133
VDD93
VDD94
VDD95
VDD_25_SUS
E4
G4
J4
L4
N4
U4
W4
AA4
AC4
AE4
D5
AF5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
D7
G7
J7
AA7
AC7
AF7
F8
H8
AB8
AD8
D9
G9
AC9
AF9
F10
AD10
D11
AF11
F12
AD12
D13
AF13
F14
AD14
F16
AD16
D15
R4
N28
U28
AA28
AE27
R7
U7
W7
K8
M8
P8
T8
V8
Y8
J9
N9
R9
U9
W9
AA9
H10
K10
M10
P10
T10
Y10
AB10
G11
J11
AA11
AC11
H12
K12
Y12
AB12
J13
AA13
AC13
H14
AB26
E28
J28
4
VCORE
LAYOUT: Place 6 EMI caps along bottom right side of Clawhammer,
2 in middle of HT link, and 12 along bottom left side of Claw-hammer.
VCORE
C122
VCORE
C86
C0.22U16Y
VDD_25_SUS VTT_DDR_SUS
VDD_25_SUS
GND
2
GND
3
GND
4
GND
5
GND
6
GND
7
GND
8
GND
9
GND
10
GND
C123
C121
{nopop}
C1U10Y
C1U10Y
In CPU.
C34
C180P50N
C0.22U16Y
C43
X_0.22u
{nopop}
Place between DIMN1 & 2
VDD_25_SUS
C79
X_C0.1U25Y
GND
C120
C82
{nopop}
X_0.22u
X_4.7u/0805
C1U10Y
11
GND
12
GND
13
GND
14
GND
15
GND
16
GND
17
GND
18
GND
19
GND
20
GND
GND
C107
{nopop}
C111
{nopop}
C1U10Y
C188
C8.2P50N
C110
C106
C1U10Y
C119
C180P50N C399
X_6.8pF
C85
C0.22U16Y
C1U10Y
22U
LAYOUT: Place beside processor.
0.22u
3
{nopop}
C160
C0.1U25Y
C176
X_4.7u/0805
C93
C51
X_4.7u/0805
C63
C28
C0.22U16Y
C157
0.22u
22U
C137
C46
22U
C116
22U
C115
22U
GND
VCORE
C105
C8.2P50N
X_C0.22U16Y/BACK
X_C8.2P50N/BACKC78
solder side
C184
C0.22U16Y C398
VTT_DDR_SUS
C42
C50
C4.7U10Y0805
104P
GND
C94
C132
X_C4.7U10Y0805
104P
C131
X_C0.22U16Y
C71
BACK decoupling Cap.
X_22U/BACK
C401
X_22U/BACK
C180
X_C0.22U16Y
2
C396
X_22U/BACK
solder side
C54
X_0.22u
C0.22U16Y
GND
C403
C145
C4.7U10Y0805
X_C0.1U16X
C402
X_22U/BACK
C96
C0.1U16X
BACK
C400
X_6.8pF
close to C457
solder side
VDD_25_SUS
C197
GND
C397
X_6.8pF
solder side
VDD_25_SUS
C405
X_104P
close to C29
solder side
GND
C77
X_104P
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
C395
X_104P
K8 POWER & GND
close to C456
solder side
C404
X_104P
Reserved for EMI
MS-7034
Last Revision Date:
Monday, May 10, 2004
Sheet
1
6 39
of
Rev
10A
Page 7
5
4
3
2
1
VCC1_6
U2A
PBGA708_CK8G
AJ26
SP_VDD
D D
C C
B B
C300
C0.1U25Y
TP_SP_TEST1
C299
3VDUAL
C0.1U25Y
TP_SP_TEST1
R168 12.7KR1%
R187 8.66KR1%
R169 0R
12/24 NVIDIA RECOMMEND
CADIP0 CADOP0
CADIP1
CADIP2
CADIP3
CADIP4
CADIP5
CADIP6
CADIP7
CADIP8
CADIP9
CADIP10
CADIP11
CADIP12
CADIP13
CADIP14
CADIP15
CADIN0
CADIN1
CADIN2
CADIN3
CADIN4
CADIN5
CADIN6
CADIN7
CADIN8
CADIN9
CADIN10
CADIN11
CADIN12
CADIN13
CADIN14
CADIN15
CLKIP0<4>
CLKIN0<4>
CLKIP1<4>
CLKIN1<4>
CTLIP0<4>
CTLIN0<4>
CPUVDD_EN
HTVDD_EN
HT_VLD#
MEM_VLD#
CPU_VLD#
A21
B21
C24
E21
F21
AL30
AL29
AL27
AJ29
AK28
AK25
AL26
AM25
AJ25
AP18
AP17
AN16
AP15
AN13
AP12
AP11
AN10
AL18
AJ16
AJ15
AL15
AJ13
AL12
AJ12
AJ10
AN18
AN17
AM16
AN15
AM13
AN12
AN11
AM10
AM18
AK16
AK15
AM15
AK13
AM12
AK12
AJ11
AP14
AN14
AJ14
AK14
AP9
AN9
A2
C2
B1
B4
B2
NC1
NC3
V3P3_DEEP
NC5
SLP_DEEP#
SP_TEST
SP_TERM
SP_RBIA S
SP_TEST_CLK
NC7
NC8
NC9
NC10
NC11
HT1_TXD0
HT1_TXD1
HT1_TXD2
HT1_TXD3
HT1_TXD4
HT1_TXD5
HT1_TXD6
HT1_TXD7
HT1_TXD8
HT1_TXD9
HT1_TXD10
HT1_TXD11
HT1_TXD12
HT1_TXD13
HT1_TXD14
HT1_TXD15
HT1_TXD0*
HT1_TXD1*
HT1_TXD2*
HT1_TXD3*
HT1_TXD4*
HT1_TXD5*
HT1_TXD6*
HT1_TXD7*
HT1_TXD8*
HT1_TXD9*
HT1_TXD10*
HT1_TXD11*
HT1_TXD12*
HT1_TXD13*
HT1_TXD14*
HT1_TXD15*
HT1_TXCLK0
HT1_TXCLK0*
HT1_TXCLK1
HT1_TXCLK1*
HT1_TXCTL
HT1_TXCTL*
CPUVDD_EN
HT1VDD_EN
HT1_VLD*
MEM_VLD*
CPU_VLD*
?
A A
1 OF 7
CK8S
SP_3.3V
NC12
NC13
SP_TX0+
SP_TX0-
SP_RX0SP_RX0+
SP_TX1+
SP_TX1-
SP_RX1SP_RX1+
HT1_RXD0
HT1_RXD1
HT1_RXD2
HT1_RXD3
HT1_RXD4
HT1_RXD5
HT1_RXD6
HT1_RXD7
HT1_RXD8
HT1_RXD9
HT1_RXD10
HT1_RXD11
HT1_RXD12
HT1_RXD13
HT1_RXD14
HT1_RXD15
HT1_RXD0*
HT1_RXD1*
HT1_RXD2*
HT1_RXD3*
HT1_RXD4*
HT1_RXD5*
HT1_RXD6*
HT1_RXD7*
HT1_RXD8*
HT1_RXD9*
HT1_RXD10*
HT1_RXD11*
HT1_RXD12*
HT1_RXD13*
HT1_RXD14*
HT1_RXD15*
HT1_RXCLK0
HT1_RXCLK0*
HT1_RXCLK1
HT1_RXCLK1*
HT1_RXCTL
HT1_RXCTL*
HT1_STOP*
HT1_RSET
CPU_SLP*/GPIO
THERMTRIP*/GPIO
CPU_RST*
CPU_PWROK
CPU_CLK
CPU_CLK*
CPU_COMP
AP24
AK27
AM27
AP26
AN26
AN27
AP27
AN28
AM29
AP29
AN29
AL1
AM1
AN1
AN2
AN4
AN5
AN6
AM7
AM4
AL5
AJ5
AL6
AJ7
AJ8
AK10
AM9
AL2
AM2
AP1
AP2
AP4
AP5
AP6
AN7
AM3
AL4
AK5
AK6
AK7
AK8
AK9
AL9
AN3
AP3
AM6
AM5
AN8
AP8
AK17
AL3
C3
AJ19
AL20
AK19
AN19
AM19
AP20
CADOP1
CADOP2
CADOP3
CADOP4
CADOP5
CADOP6
CADOP7
CADOP8
CADOP9
CADOP10
CADOP11
CADOP12
CADOP13
CADOP14
CADOP15
CADON0
CADON1
CADON2
CADON3
CADON4
CADON5
CADON6
CADON7
CADON8
CADON9
CADON10
CADON11
CADON12
CADON13
CADON14
CADON15
LDTSTOP#
HT_RSET
CPU_SLP#
OVT1#
CPURST#
CPU_GD
CPUCLK0_H
CPUCLK0_L
CPU_COMP
C283
C0.1U25Y
2200PC280
2200PC281
2200PC269
2200PC270
CLKOP0 <4>
CLKON0 <4>
CLKOP1 <4>
CLKON1 <4>
CTLOP0 <4>
CTLON0 <4>
LDTSTOP# <5>
C271
X_C0.1U25Y
TXP1
TXN1
RXN1
RXP1
TXP2
TXN2
RXN2
RXP2
24.9R1%
R201
CPURST# <5>
CPU_GD <5>
CPUCLK0_H <5>
CPUCLK0_L <5>
R188
549R1%
L10 300L700m_250_0805
CP8 X_COPPER
SATA1
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
CONN-SATA_white
SATA2
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
CONN-SATA_white
12/23 A02 CHANGE
VCC3
MEM_VLD#
C374
X_C0.1U25Y
N-MMBT3904_SOT23
CPU_VLD#
C350
X_C0.1U25Y
N-MMBT3904_SOT23
HT_VLD#
C351
C0.1U25Y
N-MMBT3904_SOT23
N-MMBT3904_SOT23
Q30
Q27
Q29
3VDUAL
3VDUAL
3VDUAL
CE
R284
R260
R252
4.7KR
4.7KR
4.7KR
Q37
B
R283
1KR
R262
1KR
R278
1KR
R905
1K
SLP_S5# <11,30>
CPUVDD_EN
HTVDD_EN
HT_PWRGD <30>
OVT1#
CPU_SLP#
VCC3 3VDUAL
R196
4.7KR
R254
X_4.7KR
CADIP[0..15]<4>
CADIN[0..15]<4>
CADOP[0..15]<4>
CADON[0..15]<4>
5
4
CADIP[0..15]
CADIN[0..15]
CADOP[0..15]
CADON[0..15]
3
2
Micro Star Restricted Secret
Title
nFORCE3-1(HDT)
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-7034
Last Revision Date:
Monday, May 24, 2004
Sheet
7 39
1
Rev
10A
of
Page 8
5
4
3
2
1
U2B
PBGA708_CK8G
M33
AD32
AC33
AB30
AC30
AG33
AG29
AC29
AH29
AG31
AK34
AJ33
AJ32
AH33
P32
P33
N33
T33
T32
U32
U33
R33
R34
V33
L33
M32
L34
N32
M34
R29
T30
U30
U29
P34
R32
R30
AGP_SBA0*
AGP_SBA1*
AGP_SBA2*
AGP_SBA3*
AGP_SBA4*
AGP_SBA5*
AGP_SBA6*
AGP_SBA7*
AGP_SBSTBF
AGP_SBSTBS
AGP_ADSTBF0
AGP_ADSTBS0
AGP_ADSTBF1
AGP_ADSTBS1
AGP_CBE0
AGP_CBE1
AGP_CBE2
AGP_CBE3
AGP_ST0
AGP_ST1
AGP_ST2
AGP_RBF
AGP_WBF
AGP_FRAME
AGP_IRDY
AGP_TRDY
AGP_REQ
AGP_GN T
AGP_STOP
AGP_DEVSEL
AGP_PAR
AGP_DBI1
AGP_DBI0
AGP_CAL_VDDQ
AGP_CAL_GND
AGP_8XDE*
SBA0<16>
SBA1<16>
AD_STBF0<16>
AD_STBS0<16>
AD_STBF1<16>
AD_STBS1<16>
GC/BE#[3..0]
GDEVSEL<16>
VDDQ
SBA2<16>
SBA3<16>
SBA4<16>
SBA5<16>
SBA6<16>
SBA7<16>
SB_STBF<16>
SB_STBS<16>
ST0<16>
ST1<16>
ST2<16>
RBF<16>
WBF<16>
GFRAME<16>
GIRDY<16>
GTRDY<16>
GREQ<16>
GGNT<16>
GSTOP<16>
GPAR<16>
DBIH<16>
DBIL<16>
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
R224 51.1R1%
R227 51.1R1%
D D
GC/BE#[3..0]<16>
C C
AGP8XDET#<16>
2 OF 7
CK8S
AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31
AGP_PME*
AGP_CLK
APG_VREF
AA33
AA32
AB32
Y33
AB33
Y32
AC32
W33
V32
AE32
AD33
AF33
AE33
AG32
AF32
AH32
AJ30
AF31
AF29
AE30
AF30
AD30
AD29
AC31
AA29
AA30
Y29
Y31
Y30
W30
V30
U31
E26
W32
V29
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
AGP_PME#
R221 22R
C313
C10P50N
C306
C0.1U25Y
GAD[31..0] <16>
AGP_PME# <16>
AGP_CLK <16>
AGPVREF_GC<16>
AGP_PME#
3VDUAL
R272
4.7KR
?
B B
A A
Micro Star Restricted Secret
Title
nFORCE3-2(AGP8X)
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
MS-7034
1
Last Revision Date:
Monday, May 24, 2004
Sheet
8 39
Rev
10A
of
Page 9
5
4
3
2
1
U2C
PBGA708_CK8G
D D
C C
AD[31..0]<17,18,24,25>
C_BE#[3..0]<17,18,24,25>
8P4R-8.2KR
RN72
RN71
8P4R-8.2KR
RN74
8P4R-8.2KR
PCI_PME#
12
34
56
78
12
34
56
78
12
34
56
78
DEVSEL#
TRDY#
IRDY#
FRAME#
SERR#
PERR#
STOP#
CLKRUN#
PREQ#0
PREQ#1
PREQ#2
PREQ#3
DEVSEL#<17,18,24,25>
PCI_PME#<17,18,24>
AGPRST#<16>
PCIRST#1<17,18>
PCIRST#2<25>
PCIRST#1
PCIRST#2
PCIRST#3<20,22,24>
R271 8.2KR
3VDUAL
VCC3
B B
PCIRST#4<30>
R213 8.2KR
RN69
8P4R-8.2KR
PIRQ#A
PIRQ#C
12
PIRQ#D
34
PIRQ#E
56
PIRQ#B
78
VCC3
AD0
C33
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
FRAME#
FRAME#<17,18,24,25>
IRDY#
IRDY#<17,18,24,25>
TRDY#
TRDY#<17,18,24,25>
STOP#
STOP#<17,18,24,25>
DEVSEL#
PAR
PAR<17,18,24,25>
SERR#
SERR#<17,18,24>
PERR#
PERR#<17,18,24,25>
PCI_PME#
CLKRUN#
PCI_AD0
D30
PCI_AD1
E33
PCI_AD2
C31
PCI_AD3
D34
PCI_AD4
F28
PCI_AD5
B33
PCI_AD6
E32
PCI_AD7
B31
PCI_AD8
D33
PCI_AD9
A32
PCI_AD10
C34
PCI_AD11
E31
PCI_AD12
B34
PCI_AD13
D32
PCI_AD14
E34
PCI_AD15
G32
PCI_AD16
F33
PCI_AD17
G33
PCI_AD18
H32
PCI_AD19
H34
PCI_AD20
H33
PCI_AD21
H30
PCI_AD22
J30
PCI_AD23
J34
PCI_AD24
K33
PCI_AD25
J29
PCI_AD26
J33
PCI_AD27
K30
PCI_AD28
K29
PCI_AD29
K32
PCI_AD30
L32
PCI_AD31
G29
PCI_CBE0*
B32
PCI_CBE1*
F34
PCI_CBE2*
J32
PCI_CBE3*
J31
PCI_FRAME*
G30
PCI_IRDY*
F29
PCI_TRDY*
F31
PCI_STOP*
F30
PCI_DEVSEL*
F32
PCI_PAR
A33
PCI_SERR
C32
PCI_PERR*
F26
PCI_PME*
B24
PCI_CLKRUN*
P29
PCI_RST0*
L30
PCI_RST1*
C25
PCI_RST2*
K5
PCI_RST3*
H6
PCI_RST4*
?
C7
X_33P
3 OF 7
CK8S
PCI_REQ0*
PCI_REQ1*
PCI_REQ2*
PCI_REQ3*
PCI_REQ4*
PCI_REQ5*
PCI_GNT0*
PCI_GNT1*
PCI_GNT2*
PCI_GNT3*
PCI_GNT4*
PCI_GNT5*
PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_INTE*
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
PCI_CLK6
PCI_CLKFB
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME*
LPC_DRQ0*
LPC_DRQ1*
SERIRQ
PCI_CLK7
PREQ#0
C29
E29
D27
D26
A30
A31
E27
D29
E28
C26
B29
B30
M30
N29
M29
N30
P30
A29
C28
B28
B27
A27
B26
A26
B25
H1
H2
H3
G2
F2
J3
F1
G3
E2
PREQ#0 <17>
PREQ#1
PREQ#1 <17>
PREQ#2
PREQ#2 <18>
PREQ#3
PREQ#3 <25>
PREQ#4
PREQ#4 <24>
PREQ#5
PGNT#0
PGNT#0<17>
PGNT#1
PGNT#1<17>
PGNT#2
PGNT#2<18>
PGNT#3
PGNT#3<25>
PGNT#4
PGNT#4<24>
PGNT#5
PIRQ#A
PIRQ#A <16,17,18>
PIRQ#B
PIRQ#B <16,17,18>
PIRQ#C
PIRQ#C <17,18>
PIRQ#D
PIRQ#D <17,18,25>
PIRQ#E
PIRQ#E <24>
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
PCI_CLK6
PCICLKFB
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#
FLASH_CS#
SERIRQ
PCI_CLK7 PCICLKFB
R249 22R
C332
X_10P
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN75
8P4R-22R
RN78
8P4R-22R
LPC_AD[3..0] <20,22>
LPC_FRAME# <20,22>
LPC_DRQ# <20>
SERIRQ <20>
PCICLK0 <17>
PCICLK1 <17>
PCICLK2 <18>
PCICLK3 <25>
PCICLK4 <22>
PCICLK5 <24>
PCICLK6 <20>
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
PCI_CLK6
LPC_DRQ#
FLASH_CS#
SERIRQ
CN22
1 2
3 4
5 6
7 8
8P4C-10P50N
CN23
1 2
3 4
5 6
7 8
8P4C-10P50N
R235 8.2KR
R237 8.2KR
R236 8.2KR
VCC3
PREQ#5
PREQ#4
A A
R257 8.2KR
R256 8.2KR
5
Micro Star Restricted Secret
Title
nFORCE3-3(PCI&LPC)
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
4
3
2
http://www.msi.com.tw
MS-7034
1
Last Revision Date:
Monday, May 24, 2004
Sheet
9 39
Rev
10A
of
Page 10
5
BUF_SIO_CLK_SELECT
0=14.318MHZ
1=24MHZ(default)
AC_RST#(BUF_125_25MHZ SELECT)
0=25MHZ
1=125MHZ(default)
AC_SYNC
0=RESEVED
1=NORMAL MODE
(default)
D D
AC_24<26> USBP2 <28>
AC_BITCLK<26>
VCC3
R264
8.2KR
R261
X_8.2KR
R255
8.2KR
AC_RST#
SB_SPDO
AC_SYNC
R267
X_8.2KR
R308
8.2KR
Stuff by nVIDIA
check@010693
C C
[AC_SYNC, EE_DATAO] straps [0,0] for "No External SATA PHY". Please remove R355 and stuff R373.@010693
AC_SDOUT<26>
AC_SDIN0<26>
SB_SPDO<26>
AC_RST#<26>
AC_SYNC<26>
VCC3
L11 X_300L700m_250_0805
CP9 X_COPPER
3VDUAL
B B
L12 X_300L700m_250_0805
CP10 X_COPPER
C359 C18P50N
C360 C18P50N
C371
X_10P
R280 22R
SB_SPDO
AC_RST#
AC_SYNC
C345
104P
Y4
32.768KHZ12.5P_D
4
4 OF 7
CK8S
USB_OC1*/GPIOAUX
USB_OC2*/GPIOAUX
USB_OC3*/GPIOAUX
USB_OC4*/GPIOAUX
USB_OC5*/GPIOAUX
USB_OC6*/GPIOAUX
USB_OC7*/GPIOAUX
+3.3V_USB_DUAL
+3.3V_USB_DUAL
C330
104P
R903
R281
8.2KR
AJ24
AJ23
AJ22
AJ21
AJ20
AK24
AK23
AK22
AK20
AL23
AL21
AM24
AM23
AM22
AM21
AN24
AN23
AN22
AN21
AN25
AP23
AP21
AM28
C15
C16
F17
F16
E15
B16
E16
E17
E1
C324
X_105P
C1
A11
B11
U2D
PBGA708_CK8G
AC97_CLK
AC_BITCLK
AC_SDATA_OU T
AC_SDATA_IN0
AC_SDATA_IN1
SPDIF
AC_RESET*
AC_SYNC
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29
NC30
NC31
NC32
NC33
NC34
NC35
NC36
+3.3V_PLL
+3.3V_PLL_DUAL
XTALIN_RTC
XTALOUT_RTC
?
X_10M
3
D20
USB0
C20
USB0*
E22
USB1
F22
USB1*
D21
USB2
C21
USB2*
E23
USB3
F23
USB3*
E24
USB4
F24
USB4*
E25
USB5
F25
USB5*
A20
USB6
B20
USB6*
A23
USB7
B23
USB7*
USB signal are worse than others
D18
USB_OC0*
E18
B18
C17
XTALIN
XTALOUT
USB_RBIA S
A18
D17
B22
C22
B19
C19
D24
E19
A17
R263
732R1%
LAN_RST#
USBP2
USBN2
USBP3
USBN3
USBP0
USBN0
USBP1
USBN1
USBP6
USBN6
USBP7
USBN7
USBP4
USBN4
USBP5
USBN5
USBN2 <28>
USBP3 <28>
USBN3 <28>
USBP0 <27>
USBN0 <27>
USBP1 <27>
USBN1 <27>
USBP6 <28>
USBN6 <28>
USBP7 <28>
USBN7 <28>
USBP4 <27>
USBN4 <27>
USBP5 <27>
USBN5 <27>
2
USBP0
USBN0
USBP1
USBN1
USBN3
USBP3
USBN2
USBP2
USBN5
USBP5
USBN4
USBP4
front side USB port
USBP7
USBN7
USBP6
USBN6
front side USB port
RN83
12
34
56
78
8P4R-15KR
RN76
12
34
56
78
8P4R-15KR
RN79
12
34
56
78
8P4R-15KR
RN80
12
34
56
78
8P4R-15KR
1
Swap(U2.A20, B20, A23, B23, C21, D21, E23, F23 to front side USB port)
& (U2.C20, D20, E22, F22, E24, F24, F25, E25 to rear side USB port)for EMI modify @011993
USB_OC#1 <28>
USB_OC#5 <27>
LAN_RST# <24>
020493
C368 C18P50N
3VDUAL
Y3
25MHZ18P_D-1
C369 C18P50N
C411
X_C0.1U25Y/BACK
solder side
VCC3
C386
C352
A A
X_104P
close to Y2 for EMI @011993
5
4
VCC3 VCC
X_104P
close to RN14 @020393
Micro Star Restricted Secret
Title
nFORCE3-4(AC97&USB)
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
3
2
http://www.msi.com.tw
MS-7034
1
Last Revision Date:
Monday, May 24, 2004
Sheet
10 39
Rev
10A
of
Page 11
5
D D
MII_RXD0
MII_RXD1
MII_RXD2
MII_RXD3
RN66
12
34
56
78
X_8P4R-10KR
MII_RX_ER
MII_RXCTL
MII_TXCLK
MII_RXCLK
RN68
12
34
56
78
X_8P4R-10KR
C C
No stuff RTL8201BL=>must pull
down@930106
MII_TXD[3..0]<24>
R294
10KR
3VDUAL
MII_TXCLK<24>
R186
1KRST
R170
1KR
C282
C0.1U25Y
LAN_EEDO LAN_EE_CLK
0 0
001
1
1 1
No stuff RTL8201BL=>MII_VREF must pull down@930106
MII_VREF:R186=1KRST @930427
B B
(EXTRNAL SATA SELECT)
NO EXTERNAL SATA PHY
RSPI INTERFACE FOR EXTERNAL
SATA PHY
RESERVED
RESERVED
SATA STRAPS
LAN_EE_CLK
LAN_EE_DO
R295
10KR
3VDUAL
R171
R268
1.5KR
2.2KR
MII_MDIO
LID#
MII:R186=1KRST, R171=1.5K
A A
RGMII:R186=1.56KRST, R171=2.2K
MII_TXCLK
MII_TXCTL<24>
MII_RXCLK<24>
MII_RXCTL<24>
C273
R181 22R
MII_RXD0<24>
MII_RXD1<24>
MII_RXD2<24>
MII_RXD3<24>
MII_RX_ER<24>
MII_COL<24>
MII_MDIO<24>
MII_CRS<24>
MII_MDC<24>
ATADET0<19>
ATADET1<19>
VSET0<22>
VSET1<22>
VSET2<22>
BIOS_DIS#<22>
SATALED#<32>
X_10P
3VDUAL
VCC3
4
C322
X_10P
C274
X_10P
RN67 8P4R-0R
MII_TXD0
MII_TXD1
MII_TXD2
MII_TXD3
MII_TXCTL
MII_RXD0
MII_RXD1
MII_RXD2
MII_RXD3
MII_RXCLK
MII_RXCTL
MII_RX_ERMII_RX_ER
MII_COL
MII_MDIO
MII_CRS
MII_MDC
LAN_EE_CLK
LAN_EE_DO
ATADET0
ATADET1
VSET0
VSET1
020493
LID#
VSET2
BIOS_DIS#
SATALED#
R299 10KR
R211 60.4R1%
R212 60.4R1%
SATAREF
7 8
5 6
3 4
1 2
AP31
AP32
AL32
AL31
AM31
AP33
AN32
AN34
AM33
AM34
AL33
AP34
AM32
AJ27
AN33
AK31
AK33
AN31
AL34
AK32
B12
A12
B13
C13
AE2
E14
D14
F12
B15
B14
B17
E11
E13
F13
AG1
N6
N5
P5
P6
N3
N2
P3
P2
P1
R3
R2
J5
M2
K2
L3
L2
L1
L6
L5
M5
M6
M3
M1
J2
R1
K6
E3
J1
K3
Y6
E8
B7
F8
D3
D2
C4
E4
E9
U2E
PBGA708_CK8G
SATA_TD0 / TXD0
SATA_TD1 / TXD1
SATA_TD2 / TXD2
SATA_TD3 / TXD3
SATA_TD4 / TXD4
SATA_TD5 / TXD5
SATA_TD6 / TXD6
SATA_TD7 / TXD7
SATA_TD8 / TXD8
SATA_TD9 / TXD9
SATA_CTL_T / NC
SATA_TCK / TBC
SATA_COMWAKE / RXD0
SATA_RD0 / RXD1
SATA_RD1 / RXD2
SATA_RD2 / RXD3
SATA_RD3 / RXD4
SATA_RD4 / RXD5
SATA_RD5 / RXD6
SATA_RD6 / RXD7
SATA_RD7 / RXD8
SATA_RD8 / RXD9
SATA_RD9 / RXD_VALID
SATA_PHY_RDY / RBC1
SATA_CTL_R / NC
SATA_RCK / ASIC_CLK
SATA_VREF
SATA_COMINIT / RBC0
SATA_CLK
BUF_25MHZ
G/MII_TXD0
G/MII_TXD1
G/MII_TXD2
G/MII_TXD3
G/MII_TXCLK
G_TXCTL/MII_TXEN
G/MII_RXD0
G/MII_RXD1
G/MII_RXD2
G/MII_RXD3
G/MII_RXCLK
G_RXCTL/MII_RXDV
MII_VREF
MII_RXER
MII_COL
G/MII_MDIO
MII_CRS
G/MII_MDC
MII_PWRDWN
EE_SEL
EE_CLK
EE_DATAO
EE_DATAI
GPIO_1
GPIO_2
GPIO_4
GPIO_5
GPIO_6
LID*/GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
SPIO_20/SATALED*
LLB*
IDE_COMP
?
CK8S
5 OF 7
3
IDE_DATA_P0
IDE_DATA_P1
IDE_DATA_P2
IDE_DATA_P3
IDE_DATA_P4
IDE_DATA_P5
IDE_DATA_P6
IDE_DATA_P7
IDE_DATA_P8
IDE_DATA_P9
IDE_DATA_P10
IDE_DATA_P11
IDE_DATA_P12
IDE_DATA_P13
IDE_DATA_P14
IDE_DATA_P15
IDE_ADDR_P0
IDE_ADDR_P1
IDE_ADDR_P2
IDE_CS1_P*
IDE_CS3_P*
IDE_DACK_P*
IDE_IOW_P*
IDE_INTR_P
IDE_DREQ_P
IDE_IOR_P*
IDE_RDY_P
IDE_DATA_S0
IDE_DATA_S1
IDE_DATA_S2
IDE_DATA_S3
IDE_DATA_S4
IDE_DATA_S5
IDE_DATA_S6
IDE_DATA_S7
IDE_DATA_S8
IDE_DATA_S9
IDE_DATA_S10
IDE_DATA_S11
IDE_DATA_S12
IDE_DATA_S13
IDE_DATA_S14
IDE_DATA_S15
IDE_ADDR_S0
IDE_ADDR_S1
IDE_ADDR_S2
IDE_CS1_S*
IDE_CS3_S*
IDE_DACK_S*
IDE_IOW_S*
IDE_INTR_S
IDE_DREQ_S
IDE_IOR_S*
IDE_RDY_S
A20GATE/GPIO
INTRUDER*
EXT_SMI*
RI*/GPIO
SPKR
PWRBTN*
SUSCLK
SIO_PME*/GPIO
KBRDRSTIN*/GPIO
SMB_CLK0
SMB_DATA0
SMB_CLK1
SMB_DATA1
3.3V_VBAT
SMB_ALERT*
BUF_SIO_CLK
BUF_14MHZ/GPIO
THERM*
RSTBTN*
SLP_S5*
SLP_S3*
SLP_S1*
PWRGD_SB
PWRGD
FANRPM/GPIO
FANCTL0/GPIO
FANCTL1/GPIO
TEST
V1
V5
U6
U1
U3
T3
T5
R6
R5
T6
T2
U2
V3
U5
V6
V2
Y1
Y5
AA3
AA1
AA2
W6
W2
W5
W3
Y3
Y2
AD1
AC1
AC3
AD5
AC6
AB5
AA6
AB3
AB2
AA5
AB6
AC5
AD6
AC2
AD3
AD2
AF3
AE3
AF2
AF1
AG3
AG5
AE5
AG6
AE6
AF5
AF6
A20GATE
F9
INTRUDER#
D11
EXTSMI#
A5
RI#
B5
SPKR
E10
PWRBTN#_1
C6
D1
SIO_PME#
C11
KBRST#
A3
SMB_MEM_CLK
H5
SMB_MEM_DATA
G5
SMBCLK1
B10
SMBDATA1
B9
F11
SMB_ALERT#
C10
A4
B6
OVT#
F7
FP_RST#
A8
SLP_S5#
D9
SLP_S3#
C7
C8
RSMRST#
D6
PW_OK
B3
E6
D5
C5
B8
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
R276
1KR
PDD[0..15] <19>
PDA0 <19>
PDA1 <19>
PDA2 <19>
PDCS#1 <19>
PDCS#3 <19>
PDDACK# <19>
PDIOW# <19>
IRQ14 <19>
PDREQ <19>
PDIOR# <19>
PIORDY <19>
SDD[0..15] <19>
SDA0 <19>
SDA1 <19>
SDA2 <19>
SDCS#1 <19>
SDCS#3 <19>
SDDACK# <19>
SDIOW# <19>
IRQ15 <19>
SDREQ <19>
SDIOR# <19>
SIORDY <19>
A20GATE <20>
R266 1MR
SPKR <32>
SIO_PME# <20>
KBRST# <20>
SMB_MEM_CLK <13>
SMB_MEM_DATA <13>
SMBCLK1 <30>
SMBDATA1 <30>
VBAT
SMB_ALERT# <20>
OVT# <20>
FP_RST# <32>
SLP_S5# <7,30>
SLP_S3# <20,30>
RSMRST# <30>
PW_OK <30,32>
VBAT
2
5VSB
VBAT1
BAT-2P_SO41
R269 22R
12
C342
X_C10P50N
C362
X_C10P50N
R316 560R
R315 1.5KR
S-BAT54C_SOT23
R305 1KR
PWRBTN#<20,32>
SIO_24M
D15
VBAT
12
3
ESD Diode close to DIMM slot@051793
D17
X_BAV99W
3VDUAL 3VDUAL
2
1
3
SMB_MEM_CLK SMB_MEM_DATA
C443
X_5p
PWRBTN#_1
R904 20K
PWRBTN#
SMBCLK1
SMBDATA1
SMB_MEM_CLK
SMB_MEM_DATA
SMB_ALERT#
SIO_PME#
RI#
EXTSMI#
R342 2.7KR
R343 2.7KR
R344 2.7KR
R345 2.7KR
KBRST#
OVT#
A20GATE
SIO_24M <20>
BOOT MODE SELECT
0=User Mode Boot Init table
1=Safe Mode Boot Init table(default)
1
JBAT1
1
2
3
N31+N33,1*3
R314
1KR
close to VBAT1 for EMI @011993
D18
X_BAV99W
R265
330R
RN84 8P4R-10KR
12
34
56
78
RN81 8P4R-10KR
12
34
VCC3
56
78
VCC3
SPKR
231
C444
X_5p
3VDUAL
VCC3
3VDUAL
R289
10KR
R297
X_10KR
VCC3
C323
X_104P
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
nFORCE3-5(SATA&GMII&IDE)
MS-7034
Last Revision Date:
Tuesday, May 25, 2004
Sheet
1
11 39
Rev
10A
of
Page 12
5
4
3
2
1
Connect to VCC by 100R from nVIDIA AP
note(External SATA Related Electrical
Overstress)@031893
C419
D D
Connect to GND by nVIDIA AP note(External SATA
Related Electrical Overstress)@031693
solder side
12/23 A02 CHANGE
C C
VCC3 VDD_12_A VDDQ
C325
C318
C0.1U25Y
C0.1U25Y
B B
VCC1_6 3VDUAL
C289
C0.1U25Y
C290
C0.1U25Y
D0G-2310903-I05:DIS,EMI/ESD protection for
I/O,INPAQ/MLVS0603M07,235p/205p(1KHz/1MHz),7Vac/9Vdc,±20%
D0G-2310903-I05:DIS,EMI/ESD protection for
I/O,INPAQ/MLVS0603M04,300p,4Vac/5Vdc,20%
X_235p
C315
C0.1U25Y
C0.1U25Y
R332
100R
VCC3
3VDUAL
X_C0.1U25Y
C288
VCC
3VDUAL
1_6VDUAL
C334
C0.1U25Y
C291
E30
AA4
A14
D12
E20
D15
C30
H29
H4
V31
V4
AD31
AD4
AF4
E5
M31
L4
R4
D8
C23
F27
G6
AK30
AJ28
F15
F19
F4
F5
F6
C309
C0.1U25Y
C406
X_300p
solder side
U2G
PBGA708_CK8G
+5V
+5V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
VDD_SATAD
VDD_SATAD
+3.3V_DUAL
+3.3V_DUAL
+3.3V_DUAL
+3.3V_DUAL
+3.3V_DUAL
+3.3V_DUAL
+5V_DUAL
+5V_DUAL
+1.6V_DUAL
+1.6V_DUAL
+1.6V_DUAL
?
C238
C0.1U25Y
C0.1U25Y
C266
CK8S
7 OF 7
X_C0.1U25Y
C272
C0.1U25Y
C412
X_300p
C409
C361
C0.1U25Y
R31
+1.5V
U34
+1.5V
Y34
+1.5V
AA31
+1.5V
AC34
+1.5V
AF34
+1.5V
AG30
+1.5V
AJ34
+1.5V
AG2
+1.6V
AH2
+1.6V
AH3
+1.6V
AH5
+1.6V
AH6
+1.6V
AJ1
+1.6V
AJ2
+1.6V
AJ3
+1.6V
AJ4
+1.6V
AK1
+1.6V
AK2
+1.6V
AK3
+1.6V
AK4
+1.6V
AL8
+1.2V_HT
AL11
+1.2V_HT
AL14
+1.2V_HT
AL17
+1.2V_HT
AK18
+1.2V_HT
C407
X_300p
solder side
C394
C0.1U25Y
VDDQ
VCC1_6
VDD_12_A
C303
C0.1U25Y
C316
C0.1U25Y
C294
C0.1U25Y
VCC 1_6VDUAL
C331
C0.1U25Y
C372
C0.1U25Y
A34
A24
A15
C27
C18
C14
C12
D31
D23
E12
F20
F18
F14
F10
H31
L31
L29
N22
N21
N20
N19
N18
N17
N16
N15
N14
N13
P31
P22
P21
P20
P19
P18
P17
P16
P15
P14
P13
R22
R21
R20
R19
R18
R17
R16
R15
R14
R13
T29
T22
T21
T20
T19
T18
T17
T16
T15
T14
T13
U22
U21
U20
U19
U18
U17
U16
U15
U14
U13
A9
A6
A1
C9
D4
E7
F3
J6
J4
M4
P4
U4
U2F
PBGA708_CK8G
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
?
6 OF 7
CK8S
V34
GND
V22
GND
V21
GND
V20
GND
V19
GND
V18
GND
V17
GND
V16
GND
V15
GND
V14
GND
V13
GND
W29
GND
W22
GND
W21
GND
W20
GND
W19
GND
W18
GND
W17
GND
W16
GND
W15
GND
W14
GND
W13
GND
Y22
GND
Y21
GND
Y20
GND
Y19
GND
Y18
GND
Y17
GND
Y16
GND
Y15
GND
Y14
GND
Y13
GND
Y4
GND
AA34
GND
AA22
GND
AA21
GND
AA20
GND
AA19
GND
AA18
GND
AA17
GND
AA16
GND
AA15
GND
AA14
GND
AA13
GND
AB29
GND
AB22
GND
AB21
GND
AB20
GND
AB19
GND
AB18
GND
AB17
GND
AB16
GND
AB15
GND
AB14
GND
AB13
GND
AC4
GND
AD34
GND
AE29
GND
AG34
GND
AG4
GND
AH30
GND
AJ31
GND
AJ18
GND
AJ17
GND
AJ9
GND
AJ6
GND
AK29
GND
AK26
GND
AK21
GND
AK11
GND
AL24
GND
AM30
GND
AM26
GND
AM20
GND
AM17
GND
AM14
GND
AM11
GND
AM8
GND
AN30
GND
AN20
GND
AP30
GND
VCORE
VCC3 1_6VDUALVDDQ
C420
C421
X_300p
C422
X_300p
X_300p
A A
VDD_12_A
VCORE
C417
X_C0.1U25Y
solder side
solder side; Reserved for EMI closed to C408
5
solder side
4
C252
C0.22U16Y
C408
X_C0.22U16Y
solder side
Close to CK8S side
Return Path for Vcore at CK8S side
3
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
nFORCE3-6/7(POWER&GND)
MS-7034
Last Revision Date:
Wednesday, May 26, 2004
Sheet
1
12 39
Rev
10A
of
Page 13
5
C10
C0.1U25Y
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
WP1
-MSWEA
DR_MD[63..0]<14,15>
D D
C C
B B
VDD_25_SUS
R109 4.7KR
-MSWEA<4,14>
DDR_VREF
VREF routed as 40~50
mils trace wide ,
Space>25 mils
2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
90
63
1
9
101
102
Place 104p and 1000p Cap. near the DIMM
Place near the DIMM
VDD_25_SUS
R22
1KR1%
A A
R26
1KR1%
C25
X_104P
DDR_VREF
C35
X_C1U16Y0805/BACK
VREF routed as 40~50 mils trace wide ,
Space>25 mils
DDR_VREF <4>
5
VDD_25_SUS
738467085
108
VDD0
VDD1
VDD2
VDD3
VDD4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
WP(NC)
WE#
VREF
NC2
NC3
NC4
VSS0
VSS1
3111826344250586674818993
120
148
168223054627796
VDD5
VDD6
VDD7
VDD8
VSS2
VSS3
VSS4
VSS5
VDDQ0
VDDQ1
VSS6
VSS7
4
SYSTEM MEMORY
104
112
128
136
143
156
164
172
1801582
184
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
184
DDR DIMM
SOCKET
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
100
116
124
132
DIMM1 SLAVE ADDRESS
= (1010000X)B = A0
4
VDDQ11
VDDQ12
PIN
VSS17
VSS18
139
145
152
VDDQ13
VDDQ14
VDDQ15
CK1#(CK0#)
NC(RESET#)
VSS19
VSS20
VSS21
160
176
VDDID
VDDSPD
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
NC5
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DDR1
DIMM-184_green
N13-1840061-K06
157
158
71
163
5
14
25
36
56
67
78
86
47
103
48
43
41
130
37
32
125
29
122
27
141
118
115
167
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
21
111
65
154
97
107
119
129
149
159
169
177
140
-MCS0
-MCS1
-DR_MDQS0
-DR_MDQS1
-DR_MDQS2
-DR_MDQS3
-DR_MDQS4
-DR_MDQS5
-DR_MDQS6
-DR_MDQS7
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
SMB_MEM_CLK
SMB_MEM_DATA
MEMCLK_H5
MEMCLK_L5
MEMCLK_H0
MEMCLK_L0
MEMCLK_H7
MEMCLK_L7
MCKE0
MCKE1
-MSCASA
-MSRASA
DR_DM0
DR_DM1
DR_DM2
DR_DM3
DR_DM4
DR_DM5
DR_DM6
DR_DM7
-MCS0 <4,14>
-MCS1 <4,14>
-DR_MDQS0 <14,15>
-DR_MDQS1 <14,15>
-DR_MDQS2 <14,15>
-DR_MDQS3 <14,15>
-DR_MDQS4 <14,15>
-DR_MDQS5 <14,15>
-DR_MDQS6 <14,15>
-DR_MDQS7 <14,15>
MAA[13..0]
MEMBANKA0 <4,14>
MEMBANKA1 <4,14>
MEMCLK_H5 <4,14>
MEMCLK_L5 <4,14>
MEMCLK_H0 <4,14>
MEMCLK_L0 <4,14>
MEMCLK_H7 <4,14>
MEMCLK_L7 <4,14>
MCKE0 <4,14>
MCKE1 <4,14>
-MSCASA <4,14>
-MSRASA <4,14>
DR_DM[7..0]
3
MAA[13..0] <4,14>
SMB_MEM_CLK <11>
SMB_MEM_DATA <11>
DR_DM[7..0] <14,15>
3
-MSWEB<4,14>
DDR_VREF
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
WP1
-MSWEB
2
VDD_25_SUS
738467085
108
120
148
168223054627796
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
NC4
VDD7
VSS0
VSS1
VSS2
VSS3
VSS4
3111826344250586674818993
DIMM2 SLAVE ADDRESS
= (1010001X)B = A2
2
104
112
128
136
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
184
DDR DIMM
SOCKET
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
100
116
124
143
156
164
172
1801582
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDID
FETEN
A10_AP
VDDQ10
PIN
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
132
139
145
152
160
176
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
184
VDDSPD
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
Micro Star Restricted Secret
System Memory : DDR DIMM 1
-MCS2
157
-MCS3
158
71
163
-DR_MDQS0
5
-DR_MDQS1
14
-DR_MDQS2
25
-DR_MDQS3
36
-DR_MDQS4
56
-DR_MDQS5
67
-DR_MDQS6
78
-DR_MDQS7
86
47
103
MAB0
48
MAB1
43
MAB2
41
MAB3
130
MAB4
37
MAB5
32
MAB6
125
MAB7
29
MAB8
122
MAB9
27
MAB10
141
MAB11
118
MAB12
115
MAB13
167
MEMBAKB0
59
MEMBAKB1
52
113
SMB_MEM_CLK
92
SMB_MEM_DATA
91
181
182
183
44
45
49
51
134
135
142
144
MEMCLK_H4
16
MEMCLK_L4
17
MEMCLK_H1
137
MEMCLK_L1
138
MEMCLK_H6
76
MEMCLK_L6
75
173
10
MCKE0
21
MCKE1
111
-MSCASB
65
-MSRASB
154
97
107
119
129
149
159
169
177
140
DDR2
DIMM-184_green
N13-1840061-K06
MS-7034
1
-MCS2 <4,14>
-MCS3 <4,14>
MAB[13..0] <4,14>
MEMBAKB0 <4,14>
MEMBAKB1 <4,14>
VDD_25_SUS
MEMCLK_H4 <4,14>
MEMCLK_L4 <4,14>
MEMCLK_H1 <4,14>
MEMCLK_L1 <4,14>
MEMCLK_H6 <4,14>
MEMCLK_L6 <4,14>
DIMM2@921231
-MSCASB <4,14>
-MSRASB <4,14>
DR_DM0
DR_DM1
DR_DM2
DR_DM3
DR_DM4
DR_DM5
DR_DM6
DR_DM7
Last Revision Date:
Monday, May 24, 2004
Sheet
13 39
1
Rev
10A
of
Page 14
5
4
3
2
1
DDR Terminations
VTT_DDR_SUS VTT_DDR_SUS
MEMBAKB0
MEMBAKB0<4,13>
DR_MD39
DR_MD38
D D
DR_MD59
DR_MD63
DR_MD58
DR_MD62
DR_MD51
DR_MD55
DR_MD50
DR_MD54
-DR_MDQS6
DR_DM6
MAA13
DR_MD53
C C
B B
MEMBANKA0<4,13>
MAB13
DR_MD49
DR_MD52
DR_MD48
DR_MD47
DR_MD46
DR_MD43
DR_MD42
-MCS0
-MCS0<4,13>
-MCS2
-MCS2<4,13>
-MSCASA
-MSCASA<4,13>
-MSCASB
-MSCASB<4,13>
DR_MD41
-MSWEA
-MSWEA<4,13>
DR_DM5
-DR_MDQS5
-MCS1
-MCS1<4,13>
-MCS3
-MCS3<4,13>
DR_MD45
-MSWEB
-MSWEB<4,13>
-MSRASB
-MSRASB<4,13>
-MSRASA
-MSRASA<4,13>
DR_MD44
DR_MD40
DR_MD35
MEMBANKA0
RN64 8P4R-47R
7 8
5 6
3 4
1 2
RN60 8P4R-47R
7 8
5 6
3 4
1 2
RN59 8P4R-47R
7 8
5 6
3 4
1 2
RN57 8P4R-47R
7 8
5 6
3 4
1 2
RN55 8P4R-47R
7 8
5 6
3 4
1 2
RN52 8P4R-47R
7 8
5 6
3 4
1 2
RN50 8P4R-47R
7 8
5 6
3 4
1 2
RN53 8P4R-47R
7 8
5 6
3 4
1 2
RN49 8P4R-47R
7 8
5 6
3 4
1 2
RN47 8P4R-47R
7 8
5 6
3 4
1 2
MEMBAKB1<4,13>
DR_MD34
DR_DM4
-DR_MDQS4
DR_MD37
DR_MD33
DR_MD31
MAB2
MAA2
DR_MD27
MEMBAKB1
MAB10
MAA10
MAA0
MAB0
MAB1
MAA1
MAA4
DR_DM3
MAB4
-DR_MDQS3
DR_MD30
DR_MD26
MAB3
MAA3
DR_MD25
DR_MD29
DR_MD28
MAA6
DR_MD23
DR_MD19
MAA8
MAB8
RN46 8P4R-47R
7 8
5 6
3 4
1 2
RN44 8P4R-47R
7 8
5 6
3 4
1 2
RN37 8P4R-47R
7 8
5 6
3 4
1 2
RN39 8P4R-47R
7 8
5 6
3 4
1 2
RN38 8P4R-47R
7 8
5 6
3 4
1 2
RN34 8P4R-47R
7 8
5 6
3 4
1 2
RN35 8P4R-47R
7 8
5 6
3 4
1 2
RN33 8P4R-47R
7 8
5 6
3 4
1 2
RN30 8P4R-47R
7 8
5 6
3 4
1 2
MAB7
DR_MD22
MAA7
DR_MD18
DR_DM2
MAB9
MAA9
MAB11
DR_MD36
DR_MD32
MEMBANKA1
RN31 8P4R-47R
7 8
5 6
3 4
1 2
RN29 8P4R-47R
7 8
5 6
3 4
1 2
RN26 8P4R-47R
7 8
5 6
3 4
1 2
RN22 8P4R-47R
7 8
5 6
3 4
1 2
RN25 8P4R-47R
7 8
5 6
3 4
1 2
RN20 8P4R-47R
7 8
5 6
3 4
1 2
RN17 8P4R-47R
7 8
5 6
3 4
1 2
RN9 8P4R-47R
7 8
5 6
3 4
1 2
RN7 8P4R-47R
7 8
5 6
3 4
1 2
RN4 8P4R-47R
7 8
5 6
3 4
1 2
RN41 8P4R-47R
7 8
5 6
3 4
1 2
DR_DM[7..0]<13,15>
MAA12
MAB12
DR_MD57
DR_MD61
DR_MD56
DR_MD60
DR_DM7
-DR_MDQS7
VTT_DDR_SUS
R51 47R
R50 47R
RN62 8P4R-47R
7 8
5 6
3 4
1 2
R96 47R
R105 47R
DR_DM[7..0]
MEMBAKB1<4,13>
MEMBANKA1<4,13>
MEMBAKB0<4,13>
MEMBANKA0<4,13>
MAB6
DR_MD24
MAB5
MAA5
DR_MD16
DR_MD20
MCKE0
MCKE0<4,13>
DR_MD11
MAA11
DR_MD21
-DR_MDQS2
DR_MD17
MCKE1
MCKE1<4,13>
DR_MD10
DR_MD15
DR_MD14
DR_DM1
DR_MD13
-DR_MDQS1
DR_MD12
DR_MD9
DR_MD8
DR_MD3
DR_MD7
DR_MD6
DR_MD2
DR_DM0
-DR_MDQS0
DR_MD1
DR_MD5
DR_MD4
DR_MD0
MEMBANKA1<4,13>
-MSCASB
-MSCASB<4,13>
-MCS2
-MCS2<4,13>
-MSCASA
-MSCASA<4,13>
-MSRASB<4,13>
-MSWEB<4,13>
-MSRASA<4,13>
-MSWEA<4,13>
-MCS3
-MCS3<4,13>
MAB12
MAA12
MAB11
MAA11
MAA3
MAB3
MAA2
MAB2
MAB6
MAA6
MAB4
MAA4
MAB8
MAA8
MAA5
MAB5
MAA0
MAA10
MAB10
MAB0
-MCS0
-MCS0<4,13>
-MCS1
-MCS1<4,13>
MAB13
MAA13
MAA9
MAB9
MAB7
MAA7
-MSRASB
-MSWEB
-MSRASA
-MSWEA
MCKE1<4,13>
MCKE0<4,13>
VTT_DDR_SUS
MAA1
MAB1
CN19
8P4C-10P50N
CN6
8P4C-10P50N
C126
C10P50N
C130
C10P50N
CN12
8P4C-10P50N
CN11
8P4C-10P50N
CN10
8P4C-10P50N
CN14
8P4C-10P50N
CN20
8P4C-10P50N
CN8
8P4C-10P50N
CN17
8P4C-10P50N
CN16
8P4C-10P50N
C72
C10P50N
C75
C10P50N
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
MEMCLK_L[7..0]<4,13>
A A
For DIMM1 Clock For DIMM2 Clock
MEMCLK_H5 MEMCLK_L5 MEMCLK_L4
MEMCLK_H7
MEMCLK_H0
R323 C10P50N
R325 C10P50N
R327 C10P50N
MEMCLK_L7
MEMCLK_L0
close to DIMM slot
5
MEMCLK_H4
MEMCLK_H6
R324 C10P50N
R326 C10P50N
R328 C10P50N
4
MEMCLK_L6
MEMCLK_L1MEMCLK_H1
close to DIMM slot
DIMM2@921231
3
MEMCLK_H[7..0]<4,13>
-DR_MDQS[7..0]<13,15>
DR_MD[63..0]<13,15>
MAB[13..0]<4,13>
MAA[13..0]<4,13>
MEMCLK_L[7..0]
MEMCLK_H[7..0]
-DR_MDQS[7..0]
DR_MD[63..0]
MAB[13..0]
MAA[13..0]
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
DDR Terminations Bank 0
MS-7034
Last Revision Date:
Monday, May 24, 2004
Sheet
1
14 39
of
Rev
10A
Page 15
5
4
3
2
1
LAYOUT: Place on backside,
DDR Damping R & Bypass Cap.
-MDQS0 -DR_MDQS0
D D
C C
B B
A A
R35 10R
RN5 8P4R-10R
MD0
1 2
MD4
3 4
MD5
5 6
MD1
7 8
RN8 8P4R-10R
DM0
1 2
3 4
MD6 DR_MD6
5 6
MD7 DR_MD7
7 8
RN12 8P4R-10R
1 2
MD8 DR_MD8
3 4
MD9 DR_MD9
5 6
7 8
MD15
R49 10R
RN15 8P4R-10R
-MDQS1
1 2
MD13 DR_MD13
3 4
DM1
5 6
MD14 DR_MD14
7 8
RN23 8P4R-10R
1 2
-MDQS2
3 4
MD21 DR_MD21
5 6
DM2
7 8
MD18
R53 10R
RN19 8P4R-10R
MD10
1 2
3 4
MD20 DR_MD20
5 6
MD16 DR_MD16
7 8
RN28 8P4R-10R
1 2
MD19 DR_MD19
3 4
5 6
MD24
7 8
RN32 8P4R-10R
1 2
MD29
3 4
5 6
-MDQS3
7 8
RN36 8P4R-10R
MD26
1 2
3 4
MD27
5 6
MD31 DR_MD31
7 8
-MDQS[7..0]<4>
-DR_MDQS[7..0]<13,14>
DR_MD[63..0]<13,14>
MD[63..0]<4>
DR_DM[7..0]<13,14>
DM[7..0]<4>
-MDQS[7..0]
-DR_MDQS[7..0]
DR_MD[63..0]
MD[63..0]
DR_DM[7..0]
DM[7..0]
5
DR_MD0
DR_MD4
DR_MD5
DR_MD1
DR_DM0
DR_MD2MD2
DR_MD3MD3
DR_MD12MD12
DR_MD15
-DR_MDQS1
DR_DM1
DR_MD17MD17
-DR_MDQS2
DR_DM2
DR_MD18
DR_MD10
DR_MD11MD11
DR_MD22MD22
DR_MD23MD23
DR_MD24
DR_MD28MD28
DR_MD29
DR_MD25MD25
-DR_MDQS3
DR_MD26
DR_MD30MD30
DR_MD27
RN40 8P4R-10R
MD32 DR_MD32
1 2
3 4
5 6
7 8
RN45 8P4R-10R
1 2
DM4 DR_DM4
3 4
MD34
5 6
MD38 DR_MD38
7 8
MD42
R79 10R
RN48 8P4R-10R
MD39 DR_MD39
1 2
MD35 DR_MD35
3 4
5 6
MD44 DR_MD44
7 8
RN51 8P4R-10R
1 2
MD41 DR_MD41
3 4
-MDQS5 -DR_MDQS5
5 6
DM5 DR_DM5
7 8
RN54 8P4R-10R
MD43
1 2
MD46 DR_MD46
3 4
MD47 DR_MD47
5 6
7 8
RN56 8P4R-10R
1 2
3 4
MD53 DR_MD53
5 6
7 8
MD51
R88 10R
RN58 8P4R-10R
1 2
3 4
MD50
5 6
MD55
7 8
RN61 8P4R-10R
1 2
MD56
3 4
MD61 DR_MD61
5 6
MD57 DR_MD57
7 8
RN63 8P4R-10R
DM7
1 2
-MDQS7
3 4
MD62 DR_MD62
5 6
MD58
7 8
R107 10R
MD63
R106 10R
DM3
R59 10R
4
DR_MD36MD36
DR_MD33MD33
DR_MD37MD37
-DR_MDQS4-MDQS4
DR_MD34
DR_MD42
DR_MD40MD40
DR_MD45MD45
DR_MD43
DR_MD48MD48
DR_MD52MD52
DR_MD49MD49
DR_DM6DM6
-DR_MDQS6-MDQS6
DR_MD54MD54
DR_MD50
DR_MD55
DR_MD60MD60
DR_MD56
DR_DM7
-DR_MDQS7
DR_MD58
DR_MD59MD59
DR_MD63
VDD_25_SUS VDD_25_SUS VDD_25_SUS VDD_25_SUS VDD_25_SUS
DR_MD51
VTT_DDR_SUS
VTT_DDR_SUS
VTT_DDR_SUS
DR_DM3
VTT_DDR_SUS
evenly spaced around VTT fill.
C83
C0.1U25Y
C185
C0.1U25Y
C80
68p
C181
68p
C73
C0.1U25Y
C165
103p
C58
C0.1U25Y
LAYOUT: Place alternating caps to GND and VDD_2.5_SUS in a single line along VTT island.
C166
C59
C0.22U16Y
C11
102PC23
3
68p
C0.1U25Y
C40
C1000P50XC169
C175
C66
C4.7U10Y0805
C68
C0.1U25Y
C0.1U25Y
X_0.22uC17
4.7u/0805
C182
103p
C74
C0.1U25Y
C222
X_C4.7U10Y0805
C186
C0.1U25Y
103p
C81
C27
X_4.7u/0805
VDD_25_SUS
C198
68p
C98
C0.1U25Y
C195
C0.1U25Y
C89
C0.1U25Y
C192
103p
C174
C0.1U25Y
C69
C0.1U25Y
68p
C193
C196
C90
C84
C0.1U25Y
C13
X_4.7u/0805
68pC37
C167
C4.7U10Y0805
VTT_DDR_SUS
C49
C1000P50X
C41
0.22u
C36
103p
C24
0.22u
C199
C0.1U25Y
68p
C1000P50XC156
X_100PC15
GND
C1000P50XC26
C99
103p
C0.1U25Y
C0.22U16YC57
C128
C0.1U25Y
C215
C0.1U25Y
C124
103p
C201
X_C0.1U25Y
C117
C0.1U25Y
C202
C0.1U25Y
C108
68p
C203
C0.1U25Y
103p
C109
C218
C4.7U10Y0805
GND
C216
C134
C118
C148
C0.1U25Y
C0.1U25Y
C125
C0.1U25Y
LAYOUT: Locate close to
Clawhammer socket.
2
C0.1U25Y
68p
C129
C0.1U25Y
C190
C136
C19
C0.1U25Y
C152
C0.1U25Y
C140
C0.1U25Y
C155
C0.1U25Y
C135
68p
C18
C0.1U25Y
C212
C0.1U25Y
103p
C141
EC6
.CD1000U6.3EL15
VTT_DDR_SUSVTT_DDR_SUSVTT_DDR_SUSVTT_DDR_SUSVTT_DDR_SUS
C22
C0.1U25Y
C162
C0.1U25Y
C158
68p
C211
C0.1U25Y
C146
103p
C38
C168
C151
C0.1U25Y
C147
C0.1U25Y
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
C0.1U25Y
C0.1U25Y
68p
C153
C159
C0.1U25Y
Micro Star Restricted Secret
DDR Damping R & Bypass Cap.
LAYOUT: Locate close
to Clawhammer socket.
VTT_DDR_SUS
+
+
C31
C0.1U25Y
GND
103p
C163
GND
MS-7034
Last Revision Date:
Monday, May 24, 2004
Sheet
1
C0.1U25Y
C0.1U25Y
EC10
X_CD1000U6.3EL15
GND
15 39
of
Rev
10A
Page 16
5
4
3
2
1
R139
1KR
VDDQ
R133
R163
X_0
X_C1U16Y0805/BACK
solder side
5.6KR
VCC3
AGP8XDET#
C410
+12V
R125
1KR
Q19
N-MMBT3904_SOT23
GGNT
ST1
WBF
SBA1
SBA3
SB_STBS
SBA5
SBA7
GAD30
GAD28
GAD26
GAD24
AD_STBS1
GC/BE#3
GAD22
GAD20
GAD18
GAD16
GFRAME
GTRDY
GSTOP
AGP_PME#
GPAR
GAD15GC/BE#1
GAD13
GAD11
GAD9
GC/BE#0
GAD6
GAD4
GAD2
GAD0
G
1 : 4X
0 : 8X
AGP8XDET# <8>
PIRQ#A <9,17,18>
AGPRST# <9>
GGNT <8>
DBIH <8>
WBF <8>
SB_STBS <8>
GFRAME <8>
GTRDY <8>
GSTOP<8>
AGP_PME# <8>
GPAR <8>
AD_STBS0 <8>
AGPVREF_GC <8>
2.32KR1%
VREF_CG
R158
1.02KR1%
DS
Q15
N-2N7002_SOT23
R157
VDDQ
VDDQ
VCC3
3VDUAL
VCC5
VCC12
R166
2.32KR1%
2
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
http://www.msi.com.tw
AGP PRO
Connector
VCC
D D
C C
B B
A A
C254
C0.1U25Y
PIRQ#B<9,17,18>
AGP_CLK<8>
GREQ<8>
RBF<8>
DBIL<8>
SB_STBF<8>
AD_STBF1<8> AD_STBS1 <8>
GIRDY<8>
GDEVSEL<8>
AD_STBF0<8>
AGP "Vref" => 4X : 0.5*1.5V=0.75 Volt ,
8X : 0.23*1.5 =0.345 Volt
4X : 0.75V
8X : 0.35V
VCC3
12V
USB-
GND
-RST
-GNT
3.3V
ST1
GND
3.3V
GND
3.3V
GND
GND
-PME
GND
PAR
GND
AD9
AD6
GND
AD4
AD2
AD0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
+12V
VCC3
VDDQ
VCC
AGP1
SLOT-AGP1.5LATCH_red
N11-1240131-A10
B1
-OVRCNT
B2
5V
B3
5V
B4
USB+
B5
GND
B6
-INTB
B7
GREQ
ST0
ST2
RBF
DBIL
SBA0
SBA2
SB_STBF
SBA4
SBA6
3VDUAL
GAD31
GAD29
GAD27
GAD25
AD_STBF1
GAD23
GAD21
GAD19
GAD17
GC/BE#2
GIRDY
GDEVSEL
GAD14
GAD12
GAD10
GAD8
AD_STBF0 AD_STBS0
GAD7
GAD5
GAD3
GAD1
VREF_CG
C259
1u
CLK
B8
-REQ
B9
3.3V
B10
ST0
B11
ST2
B12
-RBF
B13
GND
B14
RESERVED
B15
SBA0
B16
3.3V
B17
SBA2
B18
SB_STB
B19
GND
B20
SBA4
B21
SBA6
B22
RSVD/KEY
B23
GND/KEY
B24
AUX3V/KEY
B25
3.3V/KEY
B26
AD31
B27
AD29
B28
3.3V
B29
AD27
B30
AD25
B31
GND
B32
AD_STB1
B33
AD23
B34
VDDQ
B35
AD21
B36
AD19
B37
GND
B38
AD17
B39
C/-BE2
B40
VDDQ
B41
-IRDY
B42
AUX3V/KEY
B43
GND/KEY
B44
RSVD/KEY
B45
3.3V/KEY
B46
-DEVSEL
B47
VDDQ
B48
-PERR
B49
GND
B50
-SERR
B51
C/-BE1
B52
VDDQ
B53
AD14
B54
AD12
B55
GND
B56
AD10
B57
AD8
B58
VDDQ
B59
AD_STB0
B60
AD7
B61
GND
B62
AD5
B63
AD3
B64
VDDQ
B65
AD1
B66
VREF_CG
930326 modify for
VREF_CG fail
issue
-TYPEDET
RESERVED
-INTA
RESERVED
-PIPE
-WBF
SBA1
SBA3
-SB_STB
SBA5
SBA7
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
AD30
AD28
AD26
AD24
-AD_STB1
C/-BE3
VDDQ
AD22
AD20
AD18
AD16
VDDQ
-FRAME
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-TRDY
-STOP
AD15
VDDQ
AD13
AD11
C/-BE0
VDDQ
-AD_STB0
VDDQ
VREF_GC
R165
X_0
CP7 X_COPPER
AGP8XDET#
1 : 4X
"AGP8XDET_GC#"
=>4X=High,8X=Low
5
4
0 : 8X
3
GAD[31..0]<8>
GC/BE#[3..0]<8>
Add-in Card Power
Imax
2.0A
6.0A
0.75A
2.0A
1.0A
Micro Star Restricted Secret
GAD[31..0]
SBA[7..0]
SBA[7..0]<8>
ST[2..0]
ST[2..0]<8>
GC/BE#[3..0]
V_Min V_MaxVUnits
1.425 1.575
3.15 3.45
3.15 3.45VV
4.75 5.25
11.4 12.6
AGP 8X Slot
MS-7034
Last Revision Date:
Monday, May 24, 2004
Sheet
1
GAD31
GAD30
GAD29
GAD28
GAD27
GAD26
GAD25
GAD24
GAD23
GAD22
GAD21
GAD20
GAD19
GAD18
GAD17
GAD16
GAD15
GAD14
GAD13
GAD12
GAD11
GAD10
GAD9
GAD8
GAD7
GAD6
GAD5
GAD4
GAD3
GAD2
GAD1
GAD0
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
ST0
ST1
ST2
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
16 39
of
V
V
Rev
10A
Page 17
5
PCI
Connectors
D D
PIRQ#B<9,16,18>
PIRQ#D<9,18,25>
PCICLK0<9> PCICLK1<9>
PREQ#0<9>
C C
IRDY#<9,18,24,25>
DEVSEL#<9,18,24,25>
PLOCK#<18>
PERR#<9,18,24,25>
SERR#<9,18,24>
B B
ACK64#<18>
VCC3 VCC3 VCC3
VCC VCC VCC VCC
-12V
PIRQ#B PIRQ#C
PIRQ#D
PCICLK0
PREQ#0
AD31 AD30
AD29
AD27 AD26
AD25
C_BE#3
AD23
AD21 AD20
AD19
AD17 AD16
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR# SDONE
SERR#
C_BE#1 AD15
AD14
AD12 AD11
AD10
AD8 C_BE#0
AD7
AD5 AD4
AD3
AD1 AD0
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B1
B2
B3
B4
B5
B6
B7
B8
B9
PCI1
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
RSVD2
PRSNT2#
GND
GND
RSVD5
GND
CLK
GND
REQ#
+5V
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3#
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2#
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE1#
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V
ACK64#
+5V
+5V
4
TRST#
+12V
TMS
+5V
INTA#
INTC#
+5V
RSVD1
+5V
RSVD3
GND
GND
RSVD4
RST#
+5V
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
+5V
REQ64#
+5V
+5V
3
AD[31..0]<9,18,24,25>
C_BE#[3..0]<9,18,24,25>
+12V
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
PIRQ#A
PIRQ#A <9,16,18>
PIRQ#C <9,18>
PCIRST#1
PGNT#0
PCI_PME#
AD28
AD24
AD22
AD18
FRAME#
TRDY#
STOP#
SBO#
PAR
AD13
AD9
AD6
AD2
REQ64#ACK64# ACK64# REQ64#
PCIRST#1<9,18>
PGNT#0<9>
PCI_PME# <9,18,24>
FRAME# <9,18,24,25>
TRDY# <9,18,24,25>
STOP# <9,18,24,25>
SDONE <18>
SBO# <18>
PAR <9,18,24,25>
REQ64# <18>
AD[31..0]
C_BE#[3..0]
-12V
PIRQ#C
PIRQ#A
PCICLK1
PREQ#1
PREQ#1<9>
AD31
AD29
AD27
AD25
AD22 AD23
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B1
B2
B3
B4
B5
B6
B7
B8
B9
2
PCI2
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
RSVD2
PRSNT2#
GND
GND
RSVD5
GND
CLK
GND
REQ#
+5V
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3#
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2#
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE1#
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V
ACK64#
+5V
+5V
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
REQ64#
TDI
+5V
+5V
+5V
+5V
+5V
+5V
+5V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
VCC3
+12V
PIRQ#B
PIRQ#D
3VDUAL3VDUAL
PCIRST#1
PGNT#1
PCI_PME#
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
1
PGNT#1 <9>
R247 100RR209 100R
SLOT-PCI
N11-1200031-A10
VCC3
PLOCK#
ACK64#
REQ64#
SBO#
SDONE
R205 2.7KR
1 2
3 4
5 6
7 8
C277
X_104P
A A
close to PCI1 for EMI @011993
5
RN73
8P4R-4.7KR
VCC3
4
3VDUAL
3
C310
X_104P
SLOT-PCI
N11-1200031-A10
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
http://www.msi.com.tw
PCI Connector 1 & 2
MS-7034
Last Revision Date:
Monday, May 24, 2004
Sheet
17 39
1
Rev
10A
of
Page 18
5
4
3
2
1
PCI
Connectors
D D
PIRQ#D<9,17,25>
PIRQ#B<9,16,17>
PCICLK2<9>
PREQ#2<9>
C C
IRDY#<9,17,24,25>
DEVSEL#<9,17,24,25>
PLOCK#<17>
PERR#<9,17,24,25>
SERR#<9,17,24>
B B
ACK64#<17> REQ64# <17>
VCC3 VCC3
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
+12V
PIRQ#C
3VDUAL
PCIRST#1
PGNT#2
PCI_PME#
AD28
AD24
AD22
AD18
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD13
AD9
AD6
AD2
REQ64#
VCC VCC
-12V
PIRQ#D PIRQ#A
PIRQ#B
PCICLK2
PREQ#2
AD31 AD30
AD29
AD27 AD26
AD25
C_BE#3
AD23
AD21 AD20
AD19
AD17 AD16
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1 AD15
AD14
AD12 AD11
AD10
AD8 C_BE#0
AD7
AD5 AD4
AD3
AD1 AD0
ACK64#
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B1
B2
B3
B4
B5
B6
B7
B8
B9
PCI3
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
RSVD2
PRSNT2#
GND
GND
RSVD5
GND
CLK
GND
REQ#
+5V
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3#
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2#
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE1#
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V
ACK64#
+5V
+5V
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
C/BE0#
+3.3V
GND
REQ64#
TDI
+5V
+5V
+5V
+5V
AD9
AD6
AD4
AD2
AD0
+5V
+5V
+5V
R258 100R
AD[31..0]<9,17,24,25>
C_BE#[3..0]<9,17,24,25>
PIRQ#C <9,17>
PIRQ#A <9,16,17>
PCIRST#1 <9,17>
PGNT#2 <9>
PCI_PME# <9,17,24>
FRAME# <9,17,24,25>
TRDY# <9,17,24,25>
STOP# <9,17,24,25>
SDONE <17>
SBO# <17>
PAR <9,17,24,25>
AD[31..0]
C_BE#[3..0]
AD24
SLOT-PCI
N11-1200031-A10
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
PCI Connector 3
MS-7034
Last Revision Date:
Monday, May 24, 2004
Sheet
18 39
1
Rev
10A
of
Page 19
5
4
3
2
1
ATA 33/66/100 Connector
D D
PDD[15..0]<11>
PDA[2..0]<11>
SDA[2..0]<11>
SDD[15..0]<11>
PRIMARY IDE CONN.
R142
HDDRST#<30>
C C
PDDACK#<11>
IDEACTP#<32>
HDDRST#
PDREQ<11>
PDIOW#<11>
PDIOR#<11>
PIORDY<11>
IRQ14<11>
PDCS#1<11>
33R
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
PDREQ
PDIOW#
PDIOR#
PIORDY
PDDACK#
IRQ14
PDA1
PDA0 PDA2
PDCS#1
IDEACTP#
IDE1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
IDE CONNECTOR
N32-2201091-H06
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
ATADET0
PDCS#3
PDCS#3 <11>
PDD[15..0]
PDA[2..0]
SDA[2..0]
SDD[15..0]
ATADET0 <11>
R74
15KR
SECONDARY IDE CONN .
R147
HDDRST#
HDDRST#<30>
SDREQ<11>
SDIOW#<11>
SDIOR#<11>
SIORDY<11>
SDDACK#<11>
IRQ15<11>
IDEACTS#<32>
33R
SDD7
SDD6
SDD5
SDD4 SDD11
SDD3 SDD12
SDD2
SDD1 SDD14
SDD0 SDD15
SDREQ
SDIOW#
SDIOR#
SIORDY
SDDACK#
IRQ15
SDA1
SDA0
SDCS#1
IDEACTS#
IDE2
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
IDE CONNECTOR
N32-2201091-H06
SDD8
SDD9
SDD10
SDD13
ATADET1
SDA2
SDCS#3
SDCS#3 <11>SDCS#1<11>
ATADET1 <11>
R72
15KR
B B
VCC
IDEACTP#
IDEACTS#
R70 10KR
R68 10KR
Near SB < 1" ( or Damping Rs)
PIORDY
SIORDY
A A
IRQ14
IRQ15
R85
10KR
R83 4.7KR
R84 X_10KR
R76 X_10KR
R77
10KR
5
PDREQ
SDREQ
PDD7
SDD7
R91 5.6KR
R89 5.6KRR81 4.7KR
R145 10KR
R220 10KR
4
Micro Star Restricted Secret
Title
Document Number
3
2
ATA 33/66/100 Connector
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-7034
Last Revision Date:
Monday, May 24, 2004
Sheet
19 39
1
Rev
10A
of
Page 20
5
4
3
2
1
Super I/O
PCIRST#3<9,22,24>
PCICLK6<9>
SERIRQ<9>
LPC_DRQ#<9>
LPC_FRAME#<9,22>
OVT#<11>
THERMDA_CPU<5>
CPU_CTRL<22>
CPU_FAN<22>
SIO_PME#<11>
PWRBTN#<11,32>
SLP_S3#<11,30>
SIO_24M<11>
CB2
C0.1U25Y
LPC_AD0<9,22>
LPC_AD1<9,22>
LPC_AD2<9,22>
LPC_AD3<9,22>
VCORE
NB_CTRL<22>
NB_FAN<22>
VBAT
VCC3
VCC
VCC
VCC3
OVT#
CB5
C0.1U25Y
DLED#4
DLED#2
DLED1
DLED4
DLED#3
DLED#1
DLED2
DLED3
R44 10KR
VREF
VTIN1
-12VIN
+12VIN
R43 0
CHASISS
PWRBTN#
X_10KR
CB1
C0.1U25Y
D D
C C
5VSB
B B
LPC I/O W83627THF
U6
30
LRESET#
21
LCLK
23
SERIRQ
22
LDRQ#
29
LFRAME#
27
LAD0
26
LAD1
25
LAD2
24
LAD3
125
GPX2/GP13
123
GPY1/GP15
128
GPSA1//GP10
121
GPSA2/GP17
126
GPX1/GP12
124
GPY2/GP14
127
GPSB1/GP11
122
GPSB2/GP16
120
MSO/IRQIN0/GP20
119
MSI/GP21
101
VREF
102
VTIN/TS3
103
CPUTIN/TS2
104
SYSTIN/TS1
93
GP26
94
GP25
95
GP24
96
GP23
97
VIN2
98
VIN1
99
VIN0
100
VCOREA
106
GP54
107
GP53
108
GP52
109
GP51
110
GP50
116
FANOUT1
113
FANIN1
115
FANOUT2
112
FANIN2
111
OVT#
105
GP55
118
GP22
76
CASEOPEN#
19
PME#
89
WDTO/GP33
91
GP31
92
GP30
67
PSOUT#/GP47
R329
68
PSIN/GP46
64
SUSLED/GP37
90
PLED/GP32
72
PWRCTL#/GP42
73
SLP_SX#/GP41
18
CLKIN
61
VSB
74
VBAT
28
VCC3
12
VCC_1
48
VCC_2
77
GP36
114
VCC_4
W83627HF-J
Version : J
DRVDEN0
SMI#/IRQIN1
INDEX#
MOA#
FANIN3
DSA#
FANOUT3
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#
IRRX/GP34
GP45
IRTX
GP40/SUSCLK
DCDA#
DSRA#
SINA
RTSA#
SOUTA
CTSA#
DTRA#
RIA#
DCDB#
DSRB#
SINB
RTSB#
SOUTB
CTSB#
DTRB#
RIB#
GA20
KBRST
KBDATA
KBCLK
MSDATA
MSCLK
BEEP
RSMRST#/GP44
PWROK/GP43
VSS1
VSS2
GP35
VSS4
DRVDEN0
1
SMB_ALERT#
2
INDEX#
3
MOA#
4
5
DSA#
6
7
DIR#
8
STEP#
9
WRDATA#
10
WE#
11
TRACK0#
13
WP#
14
RDDATA#
15
HEAD#
16
DSKCHG#
17
PD0
42
PD1
41
PD2
40
PD3
39
PD4
38
PD5
37
PD6
36
PD7
35
31
32
PE
33
34
43
44
45
46
47
IRRX
88
69
IRTX
87
GP40
75
56
50
53
RTSA#
51
SOUTA
54
49
DTRA#
52
57
DCDB#
84
DSRB#
79
SINB
82
RTSB#
80
SOUTB
83
CTSB#
78
DTRB#
81
RIB#
85
59
60
KBDAT#
63
KBCLK#
62
MSDAT#
66
MSCLK#
65
BEEP
58
70
71
20
55
86
THERMDC_CPU
117
FLOPPY CONNECTOR
SMB_ALERT# <11>
PD[7..0]
RSLCT <21>
RPE <21>
RBUSY <21>
RACK# <21>
RSLIN# <21>
RINIT# <21>
RERR# <21>
RAFD# <21>
RSTB# <21>
VCC
R18
4.7KR
DCDA# <21>
DSRA# <21>
SINA <21>
RTSA# <21>
SOUTA <21>
CTSA# <21>
DTRA# <21>
RIA# <21>
DCDB# <21>
DSRB# <21>
SINB <21>
RTSB# <21>
SOUTB <21>
CTSB# <21>
DTRB# <21>
RIB# <21>
KBDAT# <23>
KBCLK# <23>
MSDAT# <23>
MSCLK# <23>
THERMDC_CPU <5>
CP4
X_COPPER
PD[7..0] <21>
R335 10K
R336 10K
R337
20K
FDD1
12
34
56
78
910
1112
1314
1516
1718
1920
2122
2324
2526
2728
2930
3132
3334
CONN-FDD(4)(5)(6)V
N32-2173021-H06
BEEP
COM2@921231
A20GATE <11>
KBRST# <11>
R338
20K
VCC
R2
10KR5%
R3
4.7KR
Hardware Monitor
R42
10KR1%
R41
30KR1%
R46 28KR1%
R28 232KR1%
ALARM <32>
+12V
-12V
VCC
R1
4.7KR
Q1
N-MMBT3904_SOT23
VREF
RT1
10KRT1%
SMD SYSTEM Thermal
VTIN1
THERMDA_CPU
+12VIN
-12VIN
R27
56KR1%
R45
10KR1%
VREF
Power-on strap, enable24MHz
SOUTB
RN1 8P4R-4.7KR
7 8
5 6
3 4
1 2
L: 24MHZ
L: CFAD=2E
L: PNP Default
RN3 8P4R-4.7KR
7 8
5 6
3 4
1 2
R12
X_4.7KR
R25
4.7KR
RTSA#
DTRA#
SOUTA
SOUTA L: Disable KBC
SOUTB
DTRA#
CTSB#
DSRB#
DCDB#
RIB#
VCC
VCC
H: Enable KBC
H: 48MHZ
H: CFAD=4ERTSA#
H: PNP no Default
VCC
MSI/Intel IR
Distribute near the VCC
power pin of the LPC
VCC
A A
C47
X_104P
C30
X_104P
5
DLED#4
DLED#3
C298
DLED#2
X_104P
DLED#1 DLED1
DELD
JLED1
12
34
56
78
10
H2X5(9)_black
N31-2051051-P05
DLED4
DLED3
DLED2
4
VCC
VCC
RN16
8P4R-680R
RN14
8P4R-680R
DLED4
12
DLED3
34
DLED#2
56
DLED#1
78
DLED#4
12
DLED1
34
DLED2
56
DLED#3
78
3
Chasiss Intrusion Header
VBAT
R14
1MR
CHASISS
JCASE1
1
2
X_H1X2_black
2
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
http://www.msi.com.tw
HEADER
JIR1
CUT
1
VCC
NA
3
GND
+5V
5 6
IRTX IRRX
X_H2X3(5)_black
N31-2031031-C09
Micro Star Restricted Secret
Winbond W697HF
MS-7034
2
4
IRRXIRTX
Last Revision Date:
Monday, May 24, 2004
Sheet
20 39
1
Rev
10A
of
Page 21
5
LPT / COM PORTS
PD[7..0]
PD[7..0]<20>
D D
RSTB#<20>
RACK#<20>
RBUSY<20>
RPE<20>
RSLCT<20>
RINIT#<20>
RSLIN#<20>
RAFD#<20>
RERR#<20>
C C
RSTB#
RACK#
RBUSY
RPE
RSLCT
PD2
PD3
RINIT#
RSLIN#
PD0
PD1
RAFD#
RERR#
PD4
PD5
PD6
PD7
4
VCC
D3
1N4148_SOD123
R54 4.7KR CN7
RN18
7 8
5 6
3 4
1 2
8P4R-4.7KR
RN24
7 8
5 6
3 4
1 2
8P4R-4.7KR
RN27
8P4R-4.7KR
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN21
8P4R-4.7KR
3
For EMI
RACK#
RBUSY
RPE
RSLCT
PD2
PD3
RINIT#
RSLIN#
PD0
PD1
RAFD#
RERR#
PD4
PD5
PD6
PD7
RSTB#
CN4
1 2
3 4
5 6
7 8
8P4C-180P50N
1 2
3 4
5 6
7 8
8P4C-180P50N
CN9
1 2
3 4
5 6
7 8
8P4C-180P50N
CN5
1 2
3 4
5 6
7 8
8P4C-180P50N
C97 C180P50N
Reserved for EMI@020293
must close to CN16
PGND
2
FB2
X_300L300m_450
1
LPT1
51
RSLIN#RSLIN#
12
48
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
52
RSLCT
RPE
RBUSY
RACK#
PD7
PD6
PD5
PD4
PD3
RSLIN#
PD2
RINIT#
PD1
RERR#
PD0
RAFD#
RSTB#
PGND
CONN-LPT
N51-25F0041-F02
C16
C0.1U25Y
+12V
NRTSA
NDSRA#
NCTSA#
NRIA#
NDCDA#
NSOUTA
NSINA
NDTRA
RESVD
-12V
CN3
1 2
3 4
5 6
7 8
8P4C-180P50N
CN2
1 2
3 4
5 6
7 8
8P4C-180P50N
L6 X_80S/1206
1 2
CP3 X_COPPER
B B
A A
5
D1
1N4148_SOD123
RTSA#<20>
DTRA#<20>
SOUTA<20>
RIA#<20>
CTSA#<20>
DSRA#<20>
SINA<20>
DCDA#<20>
D2
1N4148_SOD123
PGND
PGND
U7
1
VDD(12V)
RTSA# NRTSA
DTRA# NDTRA
SOUTA NSOUT A
RIA# NRIA#
CTSA# NCTSA#
DSRA# NDSRA#
SINA NSINA
DCDA# NDCDA#
16
DA1
15
DA2
13
DA3
19
RA1
18
RA2
17
RA3
14
RA4
12
RA5
10
VSS(-12V)
GD75232_SSOP20
I95-7523212-T07
VCC(5V)
DY1
DY2
DY3
RY1
RY2
RY3
RY4
RY5
GND
20
5
6
8
2
3
4
7
9
11
Multiple RS232 Drivers and Receivers
NDCDA# NDSRA#
NSINA
NSOUTA
NDTRA
1
2
3
4
5
11 10
COM1
6
NRTSA
7
NCTSA#
8
NRIA#
9
CONN-COM
N51-09M0021-F02
PGND
4
VCC
NDCDB#
NSINB
NSOUTB
NDTRB NRIB#
-12V
+12V
C100
C0.1U25Y
1
2
3
4
5
11 10
1N4148_SOD123
D5
1N4148_SOD123
C138
X_104P
COM2
NDSRB#
6
NRTSB
7
NCTSB#
8
9
CONN-COM
N51-09M0021-F02
PGND
D4
RTSB# NRTSB
RTSB#<20>
DTRB# NDTRB
DTRB#<20>
SOUTB NSOUT B
SOUTB<20>
RIB# NRIB#
RIB#<20>
CTSB# NCTSB#
CTSB#<20>
DSRB# NDSRB#
DSRB#<20>
SINB NSINB
SINB<20>
DCDB# NDCDB#
DCDB#<20>
3
U8
1
VDD(12V)
16
DA1
15
DA2
13
DA3
19
RA1
18
RA2
17
RA3
14
RA4
12
RA5
10
VSS(-12V)
GD75232_SSOP20
I95-7523212-T07
Multiple RS232 Drivers and Receivers
NRTSB
NDSRB#
NCTSB#
NRIB#
NDCDB#
NSOUTB
NSINB
NDTRB
CN13
1 2
3 4
5 6
7 8
8P4C-180P50N
CN15
1 2
3 4
5 6
7 8
8P4C-180P50N
VCC(5V)
DY1
DY2
DY3
RY1
RY2
RY3
RY4
RY5
GND
PGND
PGND
20
5
6
8
2
3
4
7
9
11
COM2@921231
2
VCC
CP5 X_COPPER
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
http://www.msi.com.tw
LPT / COM Port
USBGND
MS-7034
PGND
CP12 X_COPPER
USBGND <23,25,28>
Last Revision Date:
Monday, May 24, 2004
Sheet
21 39
1
PGND
Rev
10A
of
Page 22
5
CPU FAN
U10
CPU_CTRL
CPU_CTRL<20>
D D
+12V
C217
C0.1U25Y
NB_CTRL<20>
NB_CTRL
C225
C0.1U25Y
CB10
C0.1U25Y
1
2
3
4
5
6
7
FAN1_IN
FAN2_IN
VCC12
C1
C2
CHRPMP
GND
W83391TS
FAN1_DRV
FAN1_SEN
FAN2_DRV
FAN2_SEN
FAN3_DRV
FAN3_SEN
FAN3_IN
14
13
12
11
10
9
8
FAN2DRV
FAN2SEN
CHIP FAN
8
C C
FAN2SEN
R143
6.49K1%
FAN2DRV
123
R144
10KR
8
7
123
R103
6.49K1%
7
6
6
Q14
NN-P07D03LV_SO8
4 5
R102
10KR
20 mils
Q21
NN-P07D03LV_SO8
4 5
4
+12V
D9
R94
R93
X_0R1206
+
+12V
CB9
C0.1U25Y
C205
C10U16EL
R199
X_0R1206
+
C279
CB11
C0.1U25Y
C10U16EL
4.7KR
3
2
1
C_FAN1
FAN1X3_white
R175
4.7KR D10
3
2
1
NB_FAN1
FAN1X3_white
X_1N4148_SOD123
R90 27KR
X_1N4148_SOD123
R183 27KR
R87
10KR
R192
10KR
CPU_FAN <20>
NB_FAN <20>
3
2
1
LPC Flash Rom
VCC3
R248 X_8.2KR
R246 8.2KR
PCIRST#3
RN70 8P4R-10KR
VCC3
BIOS_DIS#<11>
X_H1X2_black
78
56
34
12
J1
LPC_AD0<9,20>
LPC_AD1<9,20>
LPC_AD2<9,20>
F_GP13
F_GP12
F_GP11
F_GP10
R253 4.7KR
1
2
LPC_AD0
LPC_AD1
LPC_AD2
VCC3
U19
1
VPP
2
RST#
3
FGPI3
4
FGPI2
5
FGPI1
6
FGPI0
7
WP#
8
TBL#
9
ID3
10
ID2
11
ID1
12
ID0
13
FWH0
14
FWH1
15
FWH2
16 17
GND FWH3
X_PLCC-32
{1ST PART FIELD}
VCC3
VCC
CLK
FGPI4
IC(VIL)
GNDA
VCCA
GND
VCC
INIT#
FWH4
RFU
RFU
RFU
RFU
RFU
C364 C0.1U16X
C363 X_C2.2U6.3Y
C343 C0.1U16X
C333 X_0.1u
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
VCC3
LPC_FRAME#
LPC_AD3
R274 X_8.2KR
R273 8.2KR
R270 4.7KR
LPC_FRAME# <9,20>
LPC_AD3 <9,20>
VCC3
PCICLK4 <9>PCIRST#3<9,20,24>
SYSTEM FAN
+12V
CD100U25EL11
B B
1 2
+
C367
C10U16EL
+12V
1 2
L16
X_0/0805
3
2
1
S_FAN2
FAN1X3_white
A A
+
C383
C10U16EL
5
4
L13
X_0/0805
3
2
SYSTEM FAN
1
S_FAN1
FAN1X3_white
+
EC28
FB_ISL
FB_ISL<31>
R306
R307
R309
10K
30K
20K
Q35
2N7002S
TO SB
VSET0 <11>
VSET1 <11>
RN85
8P4R-10KR
VSET2 <11>
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
http://www.msi.com.tw
Micro Star Restricted Secret
FAN AND BIOS
MS-7034
Last Revision Date:
Sheet
1
Rev
10A
Wednesday, May 26, 2004
22 39
of
Q36
2N7002S
Q34
2N7002S
3
2
123456
78
Page 23
5
4
3
2
1
Keyboard/Mouse Ports
D D
C5
C0.1U25Y
L3
1 2
X_121S/0603
L5
1 2
X_121S/0603
L4
1 2
X_121S/0603
L2
1 2
X_121S/0603
KBVCC
RESVD
L1 X_80S/1206
1 2
CP1 X_COPPER
R17
X_330
XKBDAT1
XMSCLK1
XMSDAT1
XKBCLK1
XMSCLK1
XKBDAT1
XMSDAT1
C1
C0.1U25Y
PGND
1 2
3 4
5 6
7 8
CN1
8P4C-180P50N
STACKED PS2 CONNECTOR
JKBMS1
14
4
6
2
13
1
5
3
15 17
PGND PGND
CONN-KB_MS
N56-12F0031-F02
16
10
12
8
7
11
9
PGND
CP13 X_COPPER
CP14 X_COPPER
USBGND
USBGND <21,25,28>
KBVCC
EC3
+
X_10U/16V/S
PGND PGND
C C
B B
KBDAT#<20>
KBCLK#<20>
MSCLK#<20>
MSDAT#<20>
KBDAT#
KBCLK# XKBCLK1
MSCLK#
MSDAT#
MSDAT#
KBDAT#
MSCLK#
KBCLK#
RN2
1 2
3 4
5 6
7 8
8P4R-4.7KR
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
KeyBoard / Mouse Port
MS-7034
Last Revision Date:
Sheet
1
Monday, May 24, 2004
23 39
Rev
10A
of
Page 24
5
GIGA LAN RTL8110S
GIGA LAN RTL8110SB
RTL8110S X
RTL8110SB 0 OHM
VDD253VDUAL
X_0/0805
R334
For 8110SB=>stuff R334 & R114
D D
AD[31..0]<9,17,18,25>
C C
C_BE#[3..0]<9,17,18,25>
PIRQ#E<9>
020493
B B
RTL8100C R99=5.6K1%
RTL8110S R99=2.49K1%(R11-2491T13-Y01)
RTL8201BL R99=5.9K1%(R11-0592T13-Y01)
RTL8201CL R99=2K1%(R11-0202T13-Y01)
PREQ#4<9>
PGNT#4<9>
PCICLK5<9>
PCIRST#3<9,20,22>
PCI_PME#<9,17,18>
DEVSEL#<9,17,18,25>
FRAME#<9,17,18,25>
IRDY#<9,17,18,25>
TRDY#<9,17,18,25>
PAR<9,17,18,25>
SERR#<9,17,18>
PERR#<9,17,18,25>
STOP#<9,17,18,25>
AD29
C_BE#0
C_BE#1
C_BE#2
C_BE#3
PIRQ#E
PREQ#4
PGNT#4
PCICLK5
PCIRST#3
PCI_PME#
DEVSEL#
FRAME#
IRDY#
TRDY#
PAR
SERR#
PERR#
STOP#
R141 X_100R
R99
2KR1%
10/100 LAN PHY(RTL8201BL)
LAN LED define(00)
(1)Giga LAN:
Stuff R82,R104,R78,R318
(2)ELAN(10/100 LAN):
Stuff R92,R317,R320
Stuff R95,R101,R110,R108
A A
(3)Note:
10/100 LAN:USB2=N58-22F0061-S42
GIGA LAN:USB2=N58-22F0031-S42
5
RTL8110S 0 OHM
RTL8100C X
VAUX_18
R114 X_0
AD0
104
AD0
AD1
103
AD1
AD2
102
AD2
AD3
98
AD3
AD4
97
AD4
AD5
96
AD5
AD6
95
AD6
AD7
93
AD7
AD8
90
AD8
AD9
89
AD9
AD10
87
AD10
AD11
86
AD11
AD12
85
AD12
AD13
83
AD13
AD14
82
AD14
AD15
79
AD15
AD16
59
AD16
AD17
58
AD17
AD18
57
AD18
AD19
55
AD19
AD20
53
AD20
AD21
50
AD21
AD22
49
AD22
AD23
47
AD23
AD24
43
AD24
AD25
42
AD25
AD26
40
AD26
AD27
39
AD27
AD28
37
AD28
AD29
36
AD29
AD30
34
AD30
AD31
33
AD31
92
CBE0B
77
CBE1B
60
CBE2B
44
CBE3B
25
INTAB
30
REQB
29
GNTB
28
CLK
27
RSTB
31
PMEB
68
DEVSELB
61
FRAMEB
63
IRDYB
67
TRDYB
76
PAR
75
SERRB
70
PERRB
69
STOPB
46
IDSEL
RST
127
RSET
MII_RXD0<11>
MII_RXD1<11>
MII_RXD2<11>
MII_RXD3<11>
LAN LED define(01)
Modify at 0B:
(1)USB2B.19 add 330R connect to
U12.13 as( "1000ACT")
(2)USB2B.22 add 0R connect to
U12.9 as( "LED_CTL")
(3)Remove LED_TRAFFIC & LINK1G#
to U12.9 &U12.13
R152
X_0R0805
U11
22
MII_RXD0
MII_RXD1
MII_RXD3
*AMBER:Blinking
*GREEN:Link
VAUX_18
24
45
64
110
116
126
NC
VDD18/NC
VDD18/NC
VDD18/NC
VDD18/NC
VDD18/NC
VDD18/NC
GND/NC
GND/NC
GND/NC
GND/NC
GND/NC
GND/NC
48
62
73
112
118
RN65
7 8
5 6
3 4
1 2
8P4R-0R
PLACE NEAR PHY
99
VDD18/VDD25
GND
GND
35
52
MII_RXCLK<11>
VDD25
32
54
78
VDD18/VDD25
VDD18/VDD25
VDD18/VDD25
GND
GND
80
100
RXD0
RXD1
RXD2MII_RXD2
RXD3
3VDUAL
VDDH
NC/AVDD25
VSS
VSS
4
17
123
4
101112
120
AVDDH/NC
VSS
VSS
124
128
MII_TXD[3..0]<11>
4
3VDUAL
56
71
84
94
107
VDD33
VDD33
VDD33
VDD33
AVDDH/NC
VSS/NC
VSS/NC
VSSPST
C221
VSSPST
9
13
21
38
51
MII_MDC<11>
MII_MDIO<11>
MII_TXCTL<11>
MII_TXCLK<11>
MII_RXCTL<11>
10P
VSS
R113 22R
MII_RX_ER<11>
R148 4.7KR
R138 4.7KR
R136 4.7KR
R115 4.7KR
R135 4.7KR
020493
26
41
VDD33
VDD33
VSSPST
VSSPST
66
81
MII_COL<11>
MII_CRS<11>
3VDUAL
VAUX_25
7
20
VDD33
AVDDL/AVDD33
AVDDL/AVDD33
VSSPST
VSSPST
VSSPST
VSSPST
91
101
119
MII_COL
MII_CRS
MII_RX_ER
GX1
GX2
R154
X_0R
RTL8110S 0 OHM
RTL8100C X
3
16
MDI0+/TX+
AVDDL/NC
MDI1+/RX+
AVDDL/AVDD33
LANWAKEUP
CTRL18/NC
SMBDATA
M66EN/NC
ISOLATEB
MII_MDC
MII_MDIO
MII_TXD0
MII_TXD1
MII_TXD2
MII_TXD3
MII_TXCTL
MII_TXCLK
MII_RXCTL
RXD0
RXD1
RXD2
RXD3
LED_CTL
VCC_LAN
MDI0-/TXMDI1-/RX-
MDI2+/NC
MDI2-/NC
MDI3+/NC
MDI3-/NC
LED0
LED1
LED2
LED3/NC
EECS
EESK
EEDI
EEDO
CTRL25
XTAL1
XTAL2
SMBCLK
CLKRUNB
100ACT
MX0+
1
MX0-
2
MX1+
5
MX1-
6
MX2+
14
MX2-
15
MX3+
18
MX3-
19
105
117
115
114
113
106
111
109
108
125
8
121
GX2
122
25MHZ18P_D-1
74
72
88
65
23
U12
25
MDC
26
MDIO
6
TXD0
5
TXD1
4
TXD2
3
TXD3
2
TXEN
7
TXC
22
RXDV
21
RXD0
20
RXD1
19
RXD2
18
RXD3
16
RXC
1
COL
23
CRS
24
RXER/FXEN
46
X1
47
X2
9
LED0/PHYAD0
10
LED1/PHYAD1
12
LED2/PHYAD2
13
LED3/PHYAD3
15
LED4/PHYAD4
8
DVDD25
14
DVDD33
48
DVDD33
11
DGND
17
DGND
45
AGND
3
C227
LED_TRAFFIC
LINK10/100#
LINK1G#
CTRL18
CTRL25
GX1
Y1
3
X_C0.01U50X
R123 X_49.9R1%
C210
E_RTL8201CL-D
Place near Controllor
C0.01U50X
C214
C226
X_C0.01U50X
R108 49.9R1%
R119 X_49.9R1%
R122 X_49.9R1%
R98 X_5.6KR
R97 X_10K
X_AT93C46-3GR/SIC8
R120 X_49.9R1%
U9
1
CSDOVCC
2
SK
NC
3
DI
NC
4
GND
M33-93C4653-A26
R110 49.9R1%
8
7
6
5
C22P50N
C209 C22P50N
R127
X_1KR
R132
X_15KR
AVDD25
AVDD33
AGND
AGND
TPRX+
TPRX-
TPTX-
TPTX+
RTSET
ISOLATE
RPTR
SPEED
DUPLEX
LDPS
MII/SNIB/RTT3
RESETB
C207
NC
ANE
C0.01U50X
R95 49.9R1%
R101 49.9R1%
VCC
32
36
29
35
27
31
30
33
34
28
43
40
39
38
37
41
44
42
C260
X_104P
close to C288
for EMI
@011993
close to EC6 for
EMI @011993
10/100 LAN For RTL8201BL & RTL8201CL
RTL8201BL:
(1)R99=5.9K,Reserved R330,R331,C415
RTL8201CL:
(1)R99=2K,stuff R330,R331,C415
3VDUAL
VCC_LAN
C200
X_104P
R86
X_0
3VDUAL VAUX_25
RTL8110S X
RTL8100C 0 OHM
VAUX_18 VDD25
VCC_LAN
3VDUAL
Swap pin
MX1+
MX1-
MX0MX0+
LAN_RST# <10>
R137
R112 0R
R111 0R
R118 0R
R117 0R
RST
LAN_RST#
X_4.7KR
2
3VDUALVCC
C224
X_104P
EC17
+
C47U16EL
VAUX_25
300L700m_250_0805
L17
RTL8110S X
RTL8100C 0 OHM
R155
X_0/0805
RTL8110S 0 OHM
RTL8100C X
R100
3VDUAL VDDH
X_0R0805
R116
X_0/0805
3VDUAL
020493
2
3VDUAL
C237
C0.1U25Y
RTL8100C X
RTL8110S STUFF
R104
X_G_0R/0805
R330 E_0R
MX0+
MX0MX1+
MX1MX2+
MX2MX3+
MX3-
X_G_0R/0805
CTRL25
VCC
C240
X_104P
close to EC7
for EMI
@011993
CTRL18
X_0R
CTRL25
1
VAUX_18
C223
C249
C0.1U25Y
C0.1U25Y
Place near GIGA-bits PCI controlor .
C220
C234
X_C0.1U25Y
X_C0.1U25Y
C208
G_C0.1U25Y
R331
E_0R
R78
C415
C0.1U25Y
VCC3VAUX_25
C213
X_C0.1U25Y
C233
C239
X_C1000P50X
X_C0.1U25Y
C312
C241
X_C0.1U25Y
X_C0.1U25Y
USB2B
XX
AMBER+
19
AMBER-
20
POWER
13
18
12
17
11
16
10
15
9
14
GND
GREEN+
21
GREEN-
22
N58-18F0031-S42
FootPrint="USB_RJ45_TR"
***Without LAN LED***
10/100:N58-18F0031-S42
GIGA LAN:N58-18F0041-S42
***With LAN LED***
10/100:N58-22F0061-S42
GIGA LAN:N58-22F0031-S42
3VDUAL
32
1
Near LAN Controllor
Q23
X_P-BCP69_SOT223
4
C236
X_0.1u
VAUX_25
+
X_C47U16EL
EC16
RTL8110S 2.5V
RTL8100C X
C257
X_C0.1U25Y
Near LAN Controllor
3VDUAL
R161
R160
X_0
32
1
4
RTL8110S 1.8V
RTL8100C 2.5V
Q22
X_P-BCP69_SOT223
VAUX_18
C256
X_0.1u
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
http://www.msi.com.tw
RTL8110S/8100C
MS-7034
Last Revision Date:
Sheet
1
Wednesday, May 26, 2004
24 39
of
C219
X_C0.1U25Y
C348
X_C0.1U25Y
TD1+
TD1TD2+
TD2TD3+
TD3TD4+
TD4-
EC18
+
X_C47U16EL
Rev
10A
Page 25
5
1394a OHCI Link Layer Controller
D D
5
AD[31..0]
C_BE#[3..0]
FRAME#<9,17,18,24>
IRDY#<9,17,18,24>
TRDY#<9,17,18,24>
STOP#<9,17,18,24>
DEVSEL#<9,17,18,24>
PREQ#3<9>
PGNT#3<9>
PERR#<9,17,18,24>
PIRQ#D<9,17,18>
PCICLK3<9>
C319
X_104P
C321
C0.1U25Y
PAR<9,17,18,24>
C293
C0.1U25Y
C317
C0.1U25Y
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C_BE#3
C_BE#2
C_BE#1
C_BE#0
PAR
FRAME#
IRDY#
TRDY#
STOP#
R225 100R
DEVSEL#
PREQ#3
PGNT#3
PERR#
PIRQ#D
PCICLK3
1394_PCIRST#2PCIRST#2
VCC3
R191
4.7K
R223
4.7K
C320
C0.1U25Y
C275
C0.1U25Y
VCC3
C286
C0.1U25Y
97
AD31
98
AD30
99
AD29
100
AD28
101
AD27
104
AD26
105
AD25
106
AD24
109
AD23
110
AD22
112
AD21
116
AD20
117
AD19
118
AD18
119
AD17
120
AD16
5
AD15
6
AD14
7
AD13
10
AD12
11
AD11
12
AD10
13
AD9
14
AD8
17
AD7
18
AD6
19
AD5
21
AD4
22
AD3
23
AD2
27
AD1
28
AD0
107
CBE3#
122
CBE2#
4
CBE1#
15
CBE0#
3
PAR
123
FRAME#
124
IRDY#
126
TRDY#
128
STOP#
108
IDSEL
127
DEVSEL#
96
REQ#
95
GNT#
2
PERR#
91
INTA#
93
PCICLK
92
PCIRST#
37
PME#
C268
X_104P
VCC3 VCC3
R174
4.7KR
EEDI
AD[31..0]<9,17,18,24>
C C
C_BE#[3..0]<9,17,18,24>
AD28
PCIRST#2<9>
B B
VCC3
C308
X_104P
VCC3
C292
C0.1U25Y
A A
C263
C0.1U25Y
C297
C0.1U25Y
C314
X_C68P50N
C265
C0.1U25Y
C307
C0.1U25Y
102
94
R182
4.7KR
4
113
VDD1
VSS1
103
4
125
VDD2
VDD3
VSS2
VSS3
111
EECK
8
121
VCC3
20
VDD4
VSS4
1
33
VDD5
VSS5
9
VDD6
VSS6
VSS7
16
114
VDDC1
VSS8
26
34 35
24
VSS9 VDDC2
RAMVDD
GNDATX0
GNDARX0
59
64
68
GNDARX2
GNDATX1
GNDARX1
83
82
69
39
49
PVDD1
PVDD2
GNDATX2
25
62
76
75
65
VDDATX0
VDDATX1
VDDARX0
VSSC1
RAMVSS
VSSC2
115
36
+12V
S-MBRS340_CASE403
90
89
XTPBIAS0
XTPA0P
XTPA0M
VDDATX2
VDDARX2
VDDARX1
XTPB0P
XTPB0M
XTPBIAS1
XTPA1P
XTPA1M
XTPB1P
XTPB1M
XTPBIAS2
XTPA2P
XTPA2M
XTPB2P
XTPB2M
XREXT
D6/CMCJMP
PHYRESET
CTL0/PC0JMP
CTL1/PC1JMP
D7/PC2JMP
LINKON/TSIJMP
LREQ/TSOJMP
LPS/CMC
SCL/EECK
SDA/EEDI
PGND1
PGND2
41
50
D14
A C
3
U17
74
73
72
71
70
81
80
79
78
77
88
87
86
85
84
63
XCPS
66
52
58
54
55
53
57
56
51
D5
48
D4
47
D3
46
D2
45
D1
44
D0
43
MODE0
42
MODE1
40
SCLK
38
67
NC
32
31
30
EEDO
29
EECS
60
XI
61
XO
VT6307-CD
B07-0630704-V01
3
TPBIAS0
TPA0+
TPA0TPB0+
TPB0-
TPBIAS1
TPA1+
TPA1TPB1+
TPB1-
R172 11KR1%
R173 1KR1%
C267
C0.1U25Y
R184 2.7KR
EECK
EEDI
R190
4.7K
R162
1MR
F4
F-MINISMDM150/24
R185 6.34KR1%
C276
C68P50N
VCC3
VCC3
C262 C10P50N
Y2
24.576MHZ16P_D
C251
C10P50N
CPWR_1
+
EC35
CD47U50EL11
CPWR_0
C1000P50X
C392
2
swap pin at 0B@031693
CPWR_0
C149
C0.1U25Y
USBGND<21,23,28>
TPA0+
TPA0TPB0+
TPB0-
USBGND
TPA1+
TPB1+ TPB1-
CPWR_1
I1394_USB1B
9
PWR
14
TPA+
13
TPA-
12
TPB+
11
TPB-
10
GND
I1394+USBx2-D20-BK
KEY
For MSI 1394 Front-pinheader
+12V
D6
S-MBRS340_CASE403
Every 1394-port
should support
1.5A current .
Near 1394 Controllor .
C295 C270P50N/10%
R206 4.99KR1%
Near 1394 Controllor .
C285 C270P50N/10%
R194 4.99KR1%
2
TPBIAS1
TPBIAS0
A C
R204 54.9R1%
R207 54.9R1%
R214 54.9R1%
R217 54.9R1%
C302
C0.33U16Y
R195 54.9R1%
R197 54.9R1%
R198 54.9R1%
R200 54.9R1%
C287
C0.33U16Y
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
http://www.msi.com.tw
F-MINISMDM150/24
C150
C1000P50X
TPB0TPB0+
TPA0TPA0+
Micro Star Restricted Secret
1394a Link Layer Controller
MS-7034
1
J1394_1
1 2
3 4
5 6
7 8
9 10
YJ205/Green
N31-2051201-H06
F1
EC7
CD47U50EL11
TPB1TPB1+
TPA1TPA1+
Last Revision Date:
Monday, May 24, 2004
Sheet
1
TPA1-
CPWR_1
CPWR_0
+
25 39
of
Rev
10A
Page 26
5
4
3
2
1
AUDIO CODE REGULATORS
U18
YLT1087S-0.8A
3 2
VIN VOUT
EC26
ADJ
1
SPEAKER OUT JACK
17
10
11
12
13
14
15
16
18
LINE_OUTR
LINE_OUTL
BASS
MIC_IN
LINE_R
LINE_L
C235
560P
C232
560P
Place near AUDIO connector
1
2
4
5
3
6
7
8
9
C229
1000P
R226
AUDIO1
L_OUT_IN_MIC
C231
C228
560P
1000P
100R1%
R234
300R1%
N54-13F0031-F02
C230
560P
+
EC25
ELS10/16-B
AVDD5
C328
X_0.1u
Line_IN
Line_OUT
MIC_IN
12
C356
X_47000P
+12V
C329
0.1u
+
X_ELS10/16-B
BASS
MIC_IN
LINE_OUTR
LINE_OUTL
LINE_R
LINE_L
ALC655 AC97 CODEC
VCC
C390
X_4.7u
VCC3
SB_SPDO<10>
C380 0.1u
AC_24
EM1
X_0.1u
R279
33R
D D
Connect to CK8S.C15 by nVIDIA
check@010693
AC_SDOUT<10>
AC_BITCLK<10>
AC_SDIN0<10>
AC_SYNC<10>
AC_RST#<10>
AC_24<10>
R282 22R
C377 21
22P
AUDIO CODE CD IN HEADERS
C C
B B
VCC
C378
X_104P
close to C494 for
EMI @011993
JCD1
CD-D1x4-BK-SBTJ
1
R245 1K
2
R244 1K
3
4
R243 1K
R232
R231
X_2.2K
X_2.2K
VDD3
R233
X_2.2K
SB_SPDO
1
2
3
4
5
6
7
8
9
10
11
12
C3371u12
C336
1u
C3351u12
YJ103-B
JSP1
123
N32-1030071-H06
C379
560P
R290
X_0
R291
X_0
4847464544424140394338
NC
NC
TEST6
TEST5
TEST4
TEST1
DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
PC_BEEP
PHONE
1314151617181920212223
AVSS2
AUXL
AUXR
VIDEOL
VIDEOR
CDL
CDLX
CDGNDX
12
CDRX
TEST2
DACOUTL
DACOUTR
CDGND
CDR
MIC1
MONO_OUT
37
MONO
AVDD2
MIC2
1 2
1 2
C341
1u
U20
LOUTR
LOUTL
NC
NC
VRDA
VRAD
AFILT2
AFILT1
NC
VREF
AVSS1
AVDD1
LINL
LINR
ALC655
24
C339
VREF_OUT
C340
1u
VREF_OUT
C338
36
35
34
33
32
31
30
29
28
27
26
25
12
C327
X_10000p
AVDD5
C381
39P
C382
0.1u
1 2
LINE_ROUT
LINE_LOUT
C370
1u
R259
X_4.7K
VREF_OUT
AVDD5
C344
0.1u
1 2
1u
LIN_IN_L
1u
R250 33K
R240 33K 1 2
R228
X_4.7K
R241
1K
1 2
R242
1K
R229 4.7K1 2
FMIC
AVDD5
EC27
4.7u
VREF_OUT
EC30
ELS10/16-B
+
+
(Install for ALC650)
EC29
ELS10/16-B
R277
1K
12
12
C349
12
0.1u
C354
C346
0.1u
1 2
1000P
BASS
MIC_IN
FMIC_IN
R230
X_1K
(Install for ALC202A)
12
C353
1000P
R238
0
1 2
1 2
R239
0
R275
X_4.7K
FMIC_IN
12
FMIC
C358
1 2
X_0.22u
C357
1u
LINE_RLIN_IN_R
LINE_L
12
C365
1u
SPEAKER_R
SPEAKER_L
Intel Front Audio Connector
AVDD5 AVDD5
SPEAKER_R
SPEAKER_L
12
EM3
1000P
C387
1000P
FMIC_IN
1
MIC
3 4
MICPWR VCC5
5
FLINE OUTR
7
HPON
9 10
FLINE OUTLLINE NEXT L
12
JAUD1
EM2
D2x5-1:3-BK(N31+N33*2)
1000P
LINE NEXT R
4
GND
C388
0.1u
2
LINE_OUTR
6
8
LINE_OUTL
3
R301
R303
4.7K
R302
4.7K
X_0
A A
5
DECOUPLING CAPACITOR
CP111 2
CP15
1 2
C261
0.1u
2
Micro Star Restricted Secret
Title
ALC655 CODEC
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-7034
1
Last Revision Date:
Monday, May 24, 2004
Sheet
26 39
Rev
10A
of
Page 27
5
FRONT USB PORT
4
3
2
1
D D
USBN5<10>
USBP5<10>
USBN4<10>
C C
USB_D0- USB_D4-
USB_D0+
USB_D1-
B B
USB_D1+
USBP4<10>
C427
X_5p
C429
X_5p
C431
X_5p
C433
X_5p
USBN1<10>
USBP1<10>
USBN0<10>
USBP0<10>
USBP5
USBP4
USB_D4+
USB_D5-
USB_D5+
USBN1
USBP1
USBN0
USBP0
5VDUAL
L15
8
7
6
5
CMC-L02-9007020-C71
C428
X_5p
C430
X_5p
C432
X_5p
C434
X_5p
L14
8
7
6
5
CMC-L02-9007020-C71
F-MINISMDM260
USB_OC#5<10>
1
2
3
4
1
2
3
4
F3
USB_D5-USBN5
USB_D5+
USB_D4-USBN4
USB_D4+
USB_D1+
USB_D0USB_D0+
V_FUSB
USB_OC#5
C355
X_104P
+
R298
22K
R311
43KR
USB_D4USB_D4+
V_FUSB
EC34
CD1000U6.3EL15
KEY
USB 2.0 PIN HEADER
(BLUE)
KEY
USB 2.0 PIN HEADER
(BLUE)
C385
X_104P
JUSB1
1 2
3 4
5 6
7 8
9 10
BH2X5(9)USB_yellow
N31-2051131-H06
JUSB2
1 2
3 4
5 6
7 8
9 10
BH2X5(9)USB_yellow
N31-2051131-H06
USB_D5USB_D5+
USB_D0-USB_D1USB_D0+
USB_D0-
USB_D0+
USB_D1-
USB_D1+
ESD Diode close to Front USB@052493
V_FUSB
D19
X_BAV99W
2
1
3
D21
X_BAV99W
2
1
3
D23
X_BAV99W
2
1
3
D25
X_BAV99W
1
2
3
USB_D5-
USB_D5+
USB_D4-
USB_D4+
D20
X_BAV99W
231
D22
X_BAV99W
231
D24
X_BAV99W
231
D26
X_BAV99W
231
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Front USB Port
MS-7034
Last Revision Date:
Sheet
1
Monday, May 24, 2004
27 39
Rev
10A
of
Page 28
5
REAR USB PORT
KBVCC
4
3
2
1
STACKED USB CONNEC TOR
EC9
+
D D
Swap L7.1/2/3/4/5/6/7/8 pin from
VCC
C161
X_104P
close to L17 for EMI @011993
C C
B B
USBN3<10>
USBP3<10>
USBN2<10>
USBP2<10>
USB_D6-
USB_D6+ USB_D2+
USB_D7-
USB_D7+
USBN3
USBN2
USBP2
VCC
D6-/D6+/D7-/D7+/P7/N7/P6/N6 to
N6/P6/N7/P7/D7+/D7-/D6+/D6- for layout routing@042893
USBN6<10>
USBP6<10>
USBN7<10>
USBP7<10>
C435
X_5p
C437
X_5p
C439
X_5p
C441
X_5p
CMC-L02-9007020-C71
USB_D2-
USB_D3-
USB_D3+
L9
1
8
2
7
3
6
4
5
.CD1000U6.3EL15
USBN6
USBP6
USBN7
C436
X_5p
C438
X_5p
C440
X_5p
C442
X_5p
USB_D3- USB_OC#1
USB_D3+USBP3
USB_D2USB_D2+
C173
X_104P
L7
1
8
2
7
3
6
4
5
CMC-L02-9007020-C71
5VDUAL
USB_D6USB_D6+
USB_D7USB_D7+USBP7
F2
F-MINISMDM260
USB_OC#1<10>
KBVCC
C164
X_C0.1U25Y
R73
22K
R71
43KR
5
6
7
8
1
2
3
4
I1394_USB1A
UP
DOWN
I1394+USBx2-D20-BK
USB_D2USB_D2+
USB_D3USB_D3+
15
16
17
18
19
20
21
22
C183
104P
USB2A
5
6
7
8
UP
1
2
3
4
DOWN
XX
N58-18F0031-S42
USBGND
USBGND <21,23,25>
R75
X_47K
USBGND
23
24
25
26
27
28
29
30
USBGND
ESD Diode close to Rear USB@051993
D27
X_BAV99W
USB_D2-
USB_D2+
USB_D3-
D29
X_BAV99W
D31
X_BAV99W
D33
X_BAV99W
USB_D3+
KBVCC
D28
USB_D6-
USB_D6+
USB_D7-
USB_D7+
X_BAV99W
231
D30
X_BAV99W
231
D32
X_BAV99W
231
D34
X_BAV99W
231
231
231
231
231
C206
X_104P
A A
close to L18 for EMI @011993
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Rear USB Port
MS-7034
Last Revision Date:
Sheet
1
Monday, May 24, 2004
28 39
Rev
10A
of
Page 29
System Voltage Regulator
9VSB
VCC3
EC22
+
CD1000U6.3EL15
1.25VREF<30>
1.25VREF
1.25VREF
R210
1KR
R215
1KR
C0.01U50X
C0.01U50X
C296
C304
R203
1KR1%
1KR1%
9VSB
84
5
+
6
-
R202
287R1%
U16A
84
LM358MX_SOIC8
3
+
2
-
R218
287R1%R208
U16B
LM358MX_SOIC8
7
1
CD1000U6.3EL15
3VDUAL
G
D
G
S
+
EC21
Q28
D
N-NDS351AN_SOT23
S
1_6VDUAL
Q26
IPB15N03L
VCC1_6
VDD_25_SUS
+12V
Q2
D S
G
X_N-2N7002_SOT23
CP2 X_COPPER
VCC2_5
12
+
EC2
CD100U16EL11
C8
X_104P
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
System Voltage Regulators
MS-7034
Last Revision Date:
Monday, May 24, 2004
Sheet
29 39
of
Rev
10A
Page 30
8
3VSB MODE SELECT
3VSB MODE
SINGLE MOSFET
DUAL MOSFET
D D
3VDLDEC#
PULL HIGH
PULL LOW
MS6 VERSION: RBC
VAGP SEQUENCE MODE SELECT
VAGP SEQUENCE MODE PIN 47
VAGP ON BEFORE PWR_OK L TO H
VAGP ON AFTER PWR_OK L TO H
*VAGP=VDDQ @022493
VDIMM LINEAR OR PWM SELECT
VDIMM MODE
LINEAR REGULATOR
PWM REGULATOR
C C
FRONT PANEL RESET BUTTON
PCIRST# INPUT
PCIRST# BUFFER OUTPUT
PCI SOLT PCIRST# BUFFER OUTPUT
B B
CONNECT TO SOUTH BRIDGE SUSB# SIGNAL
THE TWO BLOCK CHOICE ONE
SUPPORT SYSTEM POWER CONTROL
SLP_S3#
DDR TERMINATION
3VDUAL
8
C2
C0.1U25Y
U3
7
ENABLE
6
VCNTL
5
BOOT_SEL
W83310DS_SOIC8
VREF1
VOUT
9
A A
EXTRAM
PULL LOW
PULL HIGH
PS_OUT#<32>
VINVREF2
GND
GND
7
R146
4.7KR
VDD_25_SUS
18
2
3
4
7
R19
+
PLED1<32>
PULL LOW
PULL HIGH
SUSLED<32>
N-MMBT3904_SOT23
PCIRST#4<9>
HDDRST#<19>
PG_VCORE<31>
VCORE_EN#<31>
1.25VREF<29>
CLOSE TO CHIP
5VSB
R124
4.7KR R131
10KR
Q20
N-MMBT3904_SOT23
R20 100R1%
100R1%
VTT_DDR_SUS
12
EC1
+
EC13
X_CD1000U6.3EL15
N-MMBT3904_SOT23
Ver:
RAC
RBC
Q24
VCC3
VCC2_5
5VSB
C244
C0.1U25Y
12
EC4
+
CD1000U6.3EL15
X_CD1000U6.3EL15
6
5VSB
5VSB
R193
Q25
R156
5VSB
330R
VCC
R189
330R
330R
VCC
5VSB
R178
4.7KR
5VSB
R159
4.7KR
VCC3
R321
4.7KR
C248 C0.1U25Y
C246 C0.1U25Y
C245 C4.7U10Y0805
5VSB
R129
R128 4.7KR
R180
R179
R167
X_1KR
R164
10KR
X_4.7KR
X_1KR
10KR
3VDLDEC#
EXTRAM
1
FP_RST#
2
PCIRST#
3
HDD_RST#
4
DEV_RST#
5
VDD_GD
6
VDD_EN
7
1.25VREF
8
VCC5
9
SLOT_RST#
10
VCC3
11
2.5VDDA
12
AGND0
C243 C0.22U10X
R130
3.3R
DDR AND DDR II VOLT SELECT
DDRTYPE
PULL LOW
PULL HIGH
RAC: R149=1K Ohm(R11-0102T13-Y01)
R140=2.2K Ohm(R11-0222T13-Y01)
RBF: R149= 100 Ohm, R140=100 Ohm(R11-0101T13-Y01)
C14
C0.1U25Y
6
VDIMM
2.5V
1.8V
5
3VDUAL 3VDUAL
48
I2C_CLK
I2C_DATA
CPU_PWGD
CHIP_PWGD
PLED1/EXTRAM
PLED0/3VDLDEC#
PSIN#
PSOUT#
MEMBTSS5VSB
DDRTYPE
1314151617181920212223
C242
C0.1U25Y
R140
100R1%
C12
X_C1U16Y0805
5
R177
330R
C0.1U25Y
3738394041424344454647
S3#
S5#
5VSB
PWR_OK
RSMRST#
5VUSB_DRV
1.2VLDT_DRV
1.2VLDT_SEN
TMP_FAULT#
VDIMM_LSEN
VDIMM_LDRV
VDIMM_HSEN
VDIMM_HDRV
3VSB_SEN
24
R149
100R1%
+
EC8
X_1000U/6.3V
4
3
LINEAR MODE
THESE OUTPUT AND INPUT PIN MUST
BE PULL HIGH
R176
10KR
HT_PWRGD <7>
SMBCLK1 <11>
SMBDATA1 <11>
C258
C0.1U16X
5VSB_DRV
5V_DRV
R151
X_10K
5VSB
TIMER
CD1000U6.3EL15
RSMRST# <11>
SLP_S3# <11,20>
PW_OK <11,32>
+
EC23
CHARGE PUMP
VOLTAGE
9VSB
OUTPUT
C253
C1U16Y0805
THRM# <5>
R153
10KR
OFFPULL LOW
ON
CONNECT TO CPU
THE TWO MODE ONLY ONE MODE PRESENT
THIS MODE SELECT BY PIN
47 PULL HIGH 5VSB
THE VDIMM_HSEN IN LINEAR MODE
DDRTYPE
DDR
DDR II
VCC3
C416
VCC
Reserved C416 close to EC20
THIS POINT VOLT CAN'T SETTING
BELOW 2.9V
3
SLP_S5#_1
5VSB
C264
U14
GND
36
C1
35
C2
34
CHRPMP
33
AGND1
32
31
5V_DRV
30
VAGP_DRV
29
VAGP_SEN
28
WD_DET
27
26
25
X_MS6-RBF
R150
3VSB_DRV
10KR
VCC2_5
WATCHING DOG TIMER SELECT
WD_DET
PULL HIGH
VCC3
EC20
S
Q3
D
D
N-AP40N03H/J_TO252
S
+
+
EC11
CD1000U6.3EL15
4
+
VDD_25_SUS
N-AP40N03H/J_TO252
G
Q4
G
EC5
CD1000U6.3EL15
2
For MS6-RAC Shutdown issue@031893
R333 0R
D16
X_1N4148_SOD123
C418
X_C1U10Y
RAC:R333=3.4KR1%(R11-0342T13-Y01) ;stuff R333,D16
CPU PWR_GD OUTPUT
CHIP PWR_GD OUTPUT
I2C BUS
I2C BUS
CONNECT TO SOUTH BRIDGE RSMRST# SIGNAL
SOUTH BRIDGE POWER CONTROL(SLP_S4# OR SUSB#) SIGNAL
SOUTH BRIDGE POWER CONTROL(SLP_S3# OR SUSC#) SIGNAL
ATX POWER OK INPUT
VCC
+
EC19
X_1000U/6.3V
CD1000U6.3EL15
C250
X_C2200P16X
SINGLE MODE DUAL MODE
VDIMM_HSEN
VREF
2.0V
1.7V
X_C0.1U25Y
RBF:R333=0R(R11-0000013-Y01) ;Reserved R333,D16
5VSB
Q33
1
2
VCC
C247
X_C2200P16X
Q17
4 5
3
2
1
NN-P07D03LV_SO8
+
EC12
CD1000U6.3EL15
12
+
EC24
CD1000U6.3EL15
Title
Document Number
3
4 5
NN-P07D03LV_SO8
close to Rear USB
port@011393
VCC3
6
7
8
VDD_12_A
THIS MODE SELECT BY
PIN 47 PULL LOW
3VSB REGULATE BY 5VSB AND VCC3
VCC3
5V_DRV
3VSB_DRV
1
2
3
4 5
NN-P07D03LV_SO8
Micro Star Restricted Secret
ACPI POWER CONTOLLER (MS-6)
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
8
7
6
Q32
G
MS-7034
1
SLP_S5#SLP_S5#_1
SLP_S5# <7,11>
+
EC32
D
Q13
N-AP40N03H/J_TO252
S
VCC
VCC3
D
Q16
N-40N030B_TO252
G
S
VDDQ
+
EC15
CD1000U6.3EL15
5VSB3VDUAL
8
7
6
Last Revision Date:
Wednesday, May 26, 2004
Sheet
30 39
1
CD1000U6.3EL15
5VDUAL
12
+
EC33
X_CD470U10EL11.5
Rev
10A
of
Page 31
5
4
3
2
1
K8 Voltage Regular Module
VCC
D D
C6
X_104P
close to U28 for
EMI @011993
VCORE_EN#<30>
C C
VCC
Droop Compensation
FB_ISL<22>
B B
VCORE_EN#
R6 10KR
VCC
PG_VCORE<30>
R31 10KR1% R61
R32
X_270K
R14 ORIGNAL 154KST R11-1543T13-Y01
POWER FREQENCY ADIUSTING
R33
0R
VCORE
GND
+12VA
VCC
R4
4.7KR
VID4<5>
VID3<5>
VID2<5>
VID1<5>
VID0<5>
R5 154KR1%
COMP1
C22P50NC33
COREFB_H<5>
R11 X_51R1%
R10 X_51R1%
COREFB_L<5>
R11-0304T13-Y01300KRST
C0.1U25Y X_39p/50V
VID4
VID3
VID2
VID1
VID0
PG_VCORE
FS_ISL
C32 C5600P50X
COMP
FB_ISL
R34
1KR1%
VDIFF
IDROOP
CHOK2 CH-1.1U25A-2
C113
C3
X_104P
U5
ISL6569B_SOIC24
I32-6569B02-I11
24
EN
3
VID4
4
VID3
5
VID2
6
VID1
7
VID0
22
PGOOD
23
FS/DIS
9
COMP
10
FB
12
VDIFF
11
IDROOP
C65C114
C1000P50X
VCC
GND
GND
GND
PWM1
ISEN1
PWM2
ISEN2
OFS
OVP
VSEN
RGND
C144
X_39p/50V
VCC
R9
0R
VDD5_I
16
18
15
1
20
21
19
17
8
2
13
14
CB4
C1U16Y0805
ISEN1
R7 3.4KR1%
Power team thermal
balance=>R8=4.02K@022593
ISEN2
R8 4.02KR1%
OFS
Offset Adjustment
VCORE
VDD_12_VRM
CT11
CT2
CD820U25EL25
CD820U25EL25 C4.7U16Y1206
+12VA
R15
5.1R/0805
VDD_P0
CB6
C1U16Y0805
PWM1
+12VA
R13
5.1R/0805
R30
0R
VDD_P1
CB3
C1U16Y0805
CT1
.CD1500U6.3EL20
PWM2
CT10
CT3
CD820U25EL25
CD820U25EL25
U4A
HIP6602B_SO14
I33-6602B03-I11
14
VCC
3
GND
1
PWM1
U4B
5 9
PVCC U_G2
6
PGND
2
PWM2
HIP6602B_SO14
CT8
.CD1500U6.3EL20
C88
U_G1
BOOT1
PHASE1
L_G1
BOOT2
PHASE2
L_G2
CT12
.CD1500U6.3EL20
12
11
13
L_G1 L_G1A
4
10
R23
10R
8
L_G2
7
CT6
.CD1500U6.3EL20
C52
C4.7U16Y1206
PBT1
U_G1
R24
C21
10R
C0.1U25X
PBT2
BOOT2
C20
C0.1U25X
BOOT1
2.2R0805
R47
2.2R0805
R16
0R0805
R69
0R0805
U_G1A
PHASE1
U_G2AU_G2
PHASE2
L_G2A
DS
G
Q8
N-IPD09N03LA_TO252
DS
Q5
N-IPD06N03LA_TO252
G
DS
G
Q9
N-IPD09N03LA_TO252
DS
Q11
G
N-IPD06N03LA_TO252
CB8
C1U16Y0805
DS
Q7
G
N-IPD06N03LA_TO252
CB7
C1U16Y0805
103P/X7R
DS
Q12
G
N-IPD06N03LA_TO252
0.8V~1.55V/62A
CH-0.8U35A
R21
2.2R/0805
CH-0.8U35A
R60
2.2R/0805
C143
103P/X7R
VCORE
CHOK1
C9
CHOK3
VID4 VID3 VID2 VID1 VID0 Vout
1 1 1 1 0 0.800
1 1 1 0 1 0.825
1 1 1 0 0 0.850
1 1 0 1 1 0.875
1 1 0 1 0 0.900
1 1 0 0 1 0.925
1 1 0 0 0 0.950
VID4 VID3 VID2 VID1 VID0 Vout
0 1 1 1 0 1.200
0 1 1 0 1 1.225
0 1 1 0 0 1.250
0 1 0 1 1 1.275
0 1 0 1 0 1300
0 1 0 0 1 1.325
0 1 0 0 0 1.350
CT5
.CD1500U6.3EL20
CT7
.CD1500U6.3EL20
MOSFET Heat-Sink
Q8_Heatsink
12
12
Q9_Heatsink
CT4
.CD1500U6.3EL20
12
12
CT9
.CD1500U6.3EL20
0 0 1 1 1 1.3751 0 1 1 1 0.975
1 0 1 1 0 1.000
1 0 1 0 1 1.025
A A
1 0 1 0 0 1.050
1 0 0 1 1 1.075
1 0 0 1 0 1.100
1 0 0 0 1 1.125
1 0 0 0 0 1.150
0 1 1 1 1 1.175
5
0 0 1 1 0 1.400
0 0 1 0 1 1.425
0 0 1 0 0 1.450
0 0 0 1 1 1.475
0 0 0 1 0 1.500
0 0 0 0 1 1.525
0 0 0 0 0 1.550
1 1 1 1 1 Shutdown
4
HS-0500261-K08
+12VA
C91
C0.1U25Y
Near to Vcore Input-Chock ( CHOK1 )
60MIL
HS-0500261-K08
JPW1
3
12V
4
12V
PWR-2X2M
GND
GND
1
2
3
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
K8 CORE POWER
MS-7034
Last Revision Date:
Monday, May 24, 2004
Sheet
1
31 39
of
Rev
10A
Page 32
5
4
3
2
1
FRONT PANEL
VCC
HDD+
330R
C391
X_104P
R902
20K
R285
330R
SUSLED<30>
PLED1<30>
R310
VCC3
For MSI / Intel Front Panel
JFP1
H2X5(10)_black-N31-2051231
N31-2051231-H06
1
HDDLED
3
5 6
7
9
C376
C424
1u
X_10p
SUSLED
PLED1
ALARM<20>
SPKR<11>
1 2
3
5
R293
1KR
PLED
HDD+
SLED
HDDRESET- PWSW+
RESET+
PWSW-
NC
GND SPEAKER
BUZ+
SLED
BUZ-
PLED
VCCSPK
JFP2
H2X4(7)_color-N31-2041101
N31-2041101-H06
R304
220R0805
DS
Q31
G
N-2N7002_SOT23
PLED1
2
SUSLED
4
PWRSW
C389
X_104P
VCC
R300 100R
ALARM<20>
C375
1u
RN77
1 2
3 4
5 6
7 8
X_8P4R-150
8
4
6
8
HDDLED
PWRBTN#<11,20>
C423
X_10p
C366
X_0.1u
A C
D12
X_1N4148S
D8
1N4148_SOD123
D7
1N4148_SOD123
D13
1N4148_SOD123
VCC
X_BUZZER-SAT1205-85dB-D
BZ1
IDEACTP# <19>
IDEACTS# <19>
SATALED# <11>
Reserved on Board
Buzzer@921231
D D
FP_RST#<11>
close to U2.A8
pin for nVIDIA AP
note @051193
C C
VCC
B B
close to JFP2 for
EMI @011993
VCC3
C154
C142
104P
-12V
PS_OUT#<30>
A A
PS_OUT#
C127
102P
VCC +12V
C112
C95
X_104P
X_104P
X_104P
JWR1
11
3.3V
12
-12V
13
GND
14
PS_ON
15
GND
16
GND
17
GND
18
-5V
PW_OK
19
5V
20
5V
PWR-ATX20
Add C535~C532 decoupling CAP for EMI @011393
5
4
3.3V
3.3V
GND
GND
GND
5V_SB
12V
VCC3
C29
104P
VCC
VCC
1
2
3
4
5V
5
6
5V
7
8
9
10
C0.1U25Y
C70
C102
104P
5VSB
C76
C0.1U25Y
R52
4.7KR
C87
C0.1U25Y
VCC3
3
Q38
2N3904S
B
CE
R907
4.7KR
VCC3
R906
4.7KR
PW_OK <11,30>
Micro Star Restricted Secret
Title
Front Panel &Power OK Circuits
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
MS-7034
Last Revision Date:
Wednesday, May 26, 2004
Sheet
32 39
1
Rev
10A
of
Page 33
5
4
3
2
1
M-ATX VIA-Hole * 6
PLACE IDE
VCC3 VCC
C305
D D
X_104P
VCC
MH3
1
CENTER
2
GND
GND
3
GND
GND
4
GND
GND
5
GND
GND
X_150 Drill / 300 Pad-0
6
7
8
9
X_104P
C255
X_104P
C104
X_104P
C4
C393
X_104P
C326
X_104P
VCC3
C373
104P
C278
X_104P
C C
C301
X_104P
C384
X_104P
C311
X_104P
C347
X_104P
C56
X_104P
MH5
1
CENTER
2
GND
GND
3
GND
GND
4
GND
GND
5
GND
GND
X_150 Drill / 300 Pad-0
MH4
1
CENTER
2
GND
3
GND
4
GND
5
GND
6
7
8
9
6
GND
7
GND
8
GND
9
GND
X_150 Drill / 300 Pad-0
Stuff for EMI @042793
B B
FM12
FM11
FM5
FM14
FM4
X
X_FM
X
X_FM
FM6
X
X
X
X
X_FM
X_FM
X_FM
X_FM
FM2
FM17
FM13
FM16
X
X
X
X
X_FM
X_FM
X_FM
X_FM
5
FM8
X
A A
X_FM
F_PAD_M100
FM1
X
X_FM
F_PAD_M120
FM15
X
FM10
X_FM
X
X_FM
FM9
FM7
FM3
X
X
X
X_FM
X_FM
X_FM
T2
1
2
X_YJ102
Impedance Test
T1
1
2
X_YJ102
3
2
VCC
4
MH7
1
CENTER
2
GND
GND
3
GND
GND
4
GND
GND
5
GND
GND
X_150 Drill / 300 Pad-0
MH6
1
CENTER
2
GND
GND
3
GND
GND
4
GND
GND
5
GND
GND
X_150 Drill / 300 Pad-0
6
7
8
9
6
7
8
9
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
http://www.msi.com.tw
BULK / Decopuling
MH2
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MS-7034
Last Revision Date:
Sheet
1
6
GND
7
GND
8
GND
9
GND
PGNDPGND
Monday, May 10, 2004
33 39
of
Rev
10A
Page 34
5
K8 CPU Power
4
CK8S & AGP Power
3
2
1
Other Power
DDR SideCPU Side
K8 Vcore ->
"VCORE" (60A)
D D
VDDA_2.5 Power ->
"VDDA_25" (0.11A)
DDR Power ->
"VDD_25_SUS"
(9.5A)
DDR-VTTPower ->
HT Power ->
"VDD_12_A"&"VLDT0"
"VTT_DDR_SUS"
(5.21A)
CK8S Core-Power ->
"VCC1_6" (?A)
CK8S Core-Suspend Power
-> "VSUS1_6" (?A)
AGP8X Power ->
"VDDQ" (1.5A)
5VDUL
3VDUL
DDR_3VDUAL
9VSB
(2A)
ATX Power
Supply
C C
+5VSB
5VDUAL 3VDUAL
( Q23.5) ( Q28.3 )
VSUS1_6
( Q20/S )
VCC
Charge Pump
-> 9VSB
MS-6.34
VCORE ->
B B
+12V
K8 CPU
( CHOK2/2 )
+5VR ->
Audio
DDR_25_SUS
-> DDR
( Q29/S )
( U23/2 )
VCC1_8 ->
VCC3
SATA
( VR1/2 )
VDDA_25 ->
K8 CPU(I/O)
VTT_DDR_SUS
-> DDR
( Q268/4 )
FB1
A A
-12V
5
VDDQ ->
AGP
( Q24/S )
VCC1_6 ->
CK8S
( Q19/S )
4
VDD_12_A
-> HT
( Q25/1 )
3
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
Power Generation
MS-7034
Last Revision Date:
Monday, May 10, 2004
Sheet
1
34 39
Rev
10A
of
Page 35
5
MS-7034 VER:0A
1.Page#25:Remove J1394_0(Only support 1394x2 port)/VT6307@010693
--->modify from 7030-0B@12/31/2003
4
3
2
1
2.Page#4: MEMZN and MEMZP resistors, R1 and R2, should be 44.2 ohm +/-1% for K8-754 with 2-dimms.nVIDIA check@010693
Page#5:R12 and R13 are 680 ohm recommended by nVIDIA CRB@010693
Page#10:(1)Please connect CK8S.C15 (AC97_CLK) to ALC655.2 (XTAL_IN) to save the BOM cost.@010693
(2)There is not necessary to connect CK8S SPDIF_OUT to ALC655 SPDIF_IN. Please remove R420.@010693
D D
(3)[AC_SYNC, EE_DATAO] straps [0,0] for "No External SATA PHY". Please remove R355 and stuff R373.@010693
Page#11:(1)For RSPI (SATA PHY interface) without using, please pull down SATA_VREF to GND though a 10K ohm resistor and leave other signals N/C@010693
(2)Please connect MII interface with RTL8201BL (Page 24). If you are not going to stuff RTL8201BL, please pull down mii_rxd[3:0], mii_rx_er, mii_rx_dv, mii_txclk, mii_rxclk,
mii_vref (tie all the signal together and connect to GND though a 10K series resistor) and leave other signals N/C@010693
(3)EE_CLK straps "0" for "MII interface". Please remove R56 and stuff R59.@010693
Page#12: Please power VDD_SATAD balls, CK8S.L4 and CK8S.R4, with VCC3@010693
Page#14:C527~C532 For DIMM1 & DIMM2 CLOCK@010693
Page#16: Please reserve a resistor nearby AGP_slot.A66 and remove it by default. nVIDIA CRB do recommend AGPVREF_GC
and AGPVREF_CG are provided by on-board circuitry@010693
Page#20:Reserve R460 for support other SIO.@010893
3.Page#24:Remove Y5.@010893
4.Page#22:Remove EC40.@010993
5.Page#11,#24:Rename RGMII_* to MII_* for 10/100 LAN PHY .@011293
6.Page#30:Reserved Q41,R461,C534 for Rear USB port @011393
7.Page#29,#25,#22,#21,#18,#17,#16:change +12VA to +12V( +12VA only support PWM for clear source)@011393
8.Page#32:Add C535~C532 decoupling CAP for EMI @011393
9.Page#32:modify JWR1 footprint to ATX_POWER @011493
C C
10.Page#28:Swap CN25.2 & CN25.6 ;CN25.4 & CN25.8 for layout modify@011493
11.Page#4,#14:Remove -MCS4,-MCS5 & remove C141,C142 @011593
12.Page#22:FAN2DRV connect to Q40; L20.1 connect to S_FAN2.2 @011593
13.Page#9:Reserved C540 for PCIRST#3 @011593
14.Page#14:Swap pin for layout modify @011593
15.Page#14:Remove CN5 & CN14 and change to single CAPx4 pcs @011593
16.Page#4,#13,#14,#15:Remove ECC function of DDR(DEL DM8,-MDQS8,MEMCHECK[7..0] signal & RN29,RN38,R87@011593
17.Page#9:Remove MS1 (U17) @011593
18.Page#3:modify PCI Routing @011593
19.Page#15:Swap RN53 & RN54 for layout modify @011693
20.Page#9:Remove RN84 & add R462,R463 for layout modify @011693
21.Page#10:Swap(U2.A20, B20, A23, B23, C21, D21, E23, F23 to front side USB port) & (U2.C20, D20, E22, F22, E24, F24, F25, E25 to rear side USB port)for EMI modify @011993
22.Page#28,#24,#25,#26,#32,#31:Reserved 104p CAP to VCC/GND for EMI @011993
22.Page#10,#11,#17:Reserved 104p CAP to VCC3/GND for EMI @011993
B B
23.Page#20:Add R464=10K & change R460 to 4.7K@012093
24.Page#14:Change DDR termination from 27R to 47R(31+4pcs) for two DIMM support from nVIDIA suggestion@012093
25.Page#14:Swap RN32 & RN35 for layout modify@012793
26.Page#21:Reserver FB3=300R Bead on RSLIN# close to CN16 for EMI@020393
27.Page#21:LPT1.52 change to PGND from GND@020393
28.Page#6:Reserved C558,C559,C560 close to C457,C29,C456 for EMI@020393
29.Page#21,#23,#25,#28:CP9,I1394_USB1,USB2,R287,C397,CP30,CP29 change to USBGND for EMI@020393
30.Page#10:Reserved C561 close to RN14 for EMI@020393
31.Page#26:JSP1..3 change to GND from AGND for EMI@020393
32.Page#26:Reserved R465 & connect SB_SPDO to CK8S@020493
33.Page#25:Add R473,Remove Q39 & add D16,reserved R466~R467@020493
34.Page#12:Reserved C562,C563 for Vcore return path at CK8s side@020493
35.Page#10,#11,#22,#31,#32:Swap pin for layout modify@020493
36.Page#10,#24:Add R468~R472;Remove R392~R395;LAN_RST#@020493
37.Page#11:Vset0~1 move to GPIO 4&5@020493
A A
38.Page#20:SIO_PME# direct connect to U9.19@020493
39.Page#5:Add CP36@020493
40.Page#33:remove MH6,MH3,MH2@020493
41.Page#30:remove EC29@020493
42.Page#33:Remove FM18@020693
43.Page#24:Remove C285@020693
44.Page#26:Remove C522@020693
5
4
3
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
http://www.msi.com.tw
History-01
MS-7034
Last Revision Date:
Sheet
1
Monday, May 10, 2004
35 39
of
Rev
10A
Page 36
5
4
3
2
1
45.Page#All:Rename@020693
46.Page#25:Reserved C392 for be changed to solder side@0207693
47.Page#25:J1394_1 change footprint from CON2X5_FOR1394 to J1394-1@0207693
48.Page#26:change JSP1 footprint from JSP1 to CONPSH3@0207693
49.Page#16:change C259 from 0.1u to 1u for AGP VREF @0209693
50.Page#20:change R2 from 1% to 5% @0209693
D D
51.Page#22:Reserved J1 & No-stuff@0209693
52.Page#31:Stuff VRM SNBER at R21,C9 & R60,C143@0209693
53.Page#31:Change R24,R23 from 2.2R to 10R for protect MOS-Driver@0209693
54.Page#32:No-stuff JGS1@0209693
55.Page#9:R256,R257 change to 8.2k to follow CRB design from nVIDIA confirm@0209693
56.Page#30:Stuff R80,Q13 for USB droop; Stuff EC32 for 5VSB @021093
57.Page#37:Change U19 to U19_Flash & 60 level and change U14 to U14_Mark @021093
58.Page#11,#24:Change U9 & U21 to M33-93C4653-A26 @021193
59.Page#6:Change C107,C110,C111,C121,C122,C123 to C11-1053023-T04@021193
60.Page#30,#31:Change C253,CB3,CB4,CB6,CB7,CB8 to C11-1053024-T04@021193
61.Page#4,#5,#6,#15,#30:Change C131,C132,C167,C218,C45,C40,C45,C48,C92 to C11-4753014-T04@021193
C C
62.Page#24:Change BOM to support 10/100 LAN(RTL8201BL) @021293
63.Page#24,#28:Change USB2B to without LAN LED;no-stuff C187,C204,R92,R115,R135,R136,R138,R148@022493
64.Page#11:No-stuff RN66,RN68;Stuff R186@022493
65.Page#30:Change MS6 to RBC ;Stuff R180 ;No-stuff R179 ;Change R140,R149 to 100R1%@022593
66.Page#11:Remove U21(LAN EEPROM)@022593
67.Page#31:Change R8 from 3.4K to 4.02K for thermal balance@022593
MS-7034 VER:0B
--->modify from 7034-0A@03/16/2004
1.Page#25,#11:Swap I1394_USB1B for Rear1394 ; Remove D11,R219,R216,R222 & 1394ON_OFF ; Reserved U15(1394 Flash)@031693
2.Page#11,#24:Reserved RN66,RN68 & stuff R186, R113 for 10/100 LAN ; Remove U21,R312,R313,R288,R296,R286,R287 & BIOS0,BIOS1@031693
3.Page#24:Remove R134,U13,R121,R126,Q18,EC14 ; Reserved R317~R320 & C413,C414 for LAN LED @031693
4.Page#30:U14.1 pull up to VCC3 by R321@031693
B B
5.Page#32:Remove JGS1 ; Change Q31 to mosfet/n-channel,2N7002@031693
6.Page#29:Change Q26 to TO-263(D2PAKSGD) ; stuff EC2@031893
7.Page#25: C392 chang to top side & stuff@031693
8.Page#20:Stuff R43 ; Connect U6.67 to PWRBTN# ; Reserved R329 for S3 KB wake up issue ; Q16 change to 40N03@031693
9.Page#12:U2.L4 & U2.R4 (VDD_SATA) both connect to GND for EOS issue without External SATA PHY@031693
10.Page#5:TRST_L pull up to VCC2_5 by R322@031793
11.Page#14:Change C67,C194,C139,C64,C191,C133 to R323~R328@031793
12.Page#37:Add CPU_RM & CPU_BP ; U2-HS1 change to E31-0400484-K08@031793
13.Page#30:Change MS6 to RAC ;Stuff R179 ;No-stuff R180;Change R140 to 2.2KR1%,R149 to 1KR1%@031793
14.Page#24:For RTL8201CL:(1)R99=2K,stuff R330,R331,C415 @031793
15.Page#12,#30:Reserved C416 & C417 for EMI @031793
16.Page#26,#27,#28:Stuff C183,C261=104P ; CB18,CN21,CN24=10p @031793
A A
17.Page#25:Stuff C23,C36,C37,C49,C50,C66,C68,C69,C80,C81,C89,C90,C108,C109,C124,C125,C134,C135,C136,C146,C147,C148,C151 FOR EMI@031893
18.Page#30:Modify Q13.S to VCC & Q13.D to 5VDUAL for S3 will leakage voltage to VCC from Mos-Diode @031893
19.Page#12:Add R332(100R) for U2.E30 & U2.AA4 for EOS issue@031893
12.Page#11:Remove R251 and connect U2.E3 to GND for EOS issue@031893
13.Page#30:Add D16,R333,C418 for MS6-RAC Shutdown issue @031893
14.Page#17,#18:Add net SDONE to PCI1~PCI3 @031893
5
4
3
2
Title
History-02
Size Document Number Rev
MS-7034 10A
B
Date: Sheet of
36 39Monday, May 10, 2004
1
Page 37
5
4
3
2
1
15.Page#30:For MS6-RAC=>R149=1K,R140=2.2K,R179=10K ; Change R80 to 0R for ADV check @032393
(For MS6-RBD=>R149=100R,R140=100R,R180=1K@032393)
16.Page#38:Add CPU_RM & CPU_BP ; Change U2-HS1 to E31-0400484-K08 @032393
17.Page#30:EC24 change to 1000u ; Q16 change to 40N03@032393
18.Page#20:Reserved JCASE1@032393
19.Page#25,27:Change J1394_1 & JUSB1,JUSB2 without housing@032493
D D
20.Page#24:Change 10/100 LAN PHY to RTL8201CL@032493
21.Page#11:Change R316=560R,R315=1.5K for S0 VBAT1 leakage current issue@032493
22.Page#24:stuff R110,R108,C214,R101,R95,C207 for 10/100 LAN@032493
23.Page#11:JBAT1 change to N41-1030111-H06 as main source@032693
24.Page#16:Change R139=1K,R133=5.6K for VREF_CG fail issue at 4x mode@032693
25.Page#24:Stuff C208=0.1u for RTL8201CL@032693
26.Page#5:Change R48=10P for CPUCLK Tr & Tf fail issue@032693
27.Page#25:Stuff R190 for reserved U15 to disable EEPROM@032693
MS-7034 VER:100
--->modify from 7034-0B@04/27/2004
01.Page#38:change U14_mark to E31-0401030-K08 ,U2-HS1 add Fan E32-0400690-A58@043093
02.Page#30:Remove R80 and direct short,Remove C189 @042793
C C
03.Page#24:Reserved R334 for RTL8110SB @042793
03.Page#20:Add R335~R338 for nVIDIA AP note(3.3V level) @042793
04.Page#22:Stuff R306,R307,R309,Q34~Q36,RN85 for Vcore adjust@042793
05.Page#24:Stuff R148,R138,R136,R115,R135 for 100LAN controller disappear issue @042793
06.Page#11:Change R186=1KRST & R171=1.5K for MII only @042793
07.Page#21:direct short FB2 @042793
08.Page#27,#28:Stuff L7,L9,L15,L14 for EMI suggestion @042793
09.Page#15,:Stuff 68p For EMI(C37,C90,C125,C147,C166,C193,C80,C108,C135,C158,C181,C198)@042793
Stuff 103p For EMI(C36,C124,C146,C165,C192,C81,C109,C182,C136,C159,C199)@042793
10.Page#24:Swap U12.31/U12.30=>MX1+/MX1- ; U12.34/U12.33=>MX0+/MX0-@042793
11.Page#24:Change U11.27 to PCIRST#3 from LAN_RST# for GigaLAN @042793
12.Page#11: Pull up SMB_MEM_CLK & DATA to VCC3 from 3VDUAL@042793
B B
13.Page#11: Add Q37,R341,R340 ; Reserved R339,C419 for SMB_MEM_DATA(ESD)@042793
14.Page#11:Remove RN82 & add R342~R345 for layout routing@042893
15.Page#28:Swap L7.1/2/3/4/5/6/7/8 pin from D6-/D6+/D7-/D7+/P7/N7/P6/N6 to N6/P6/N7/P7/D7+/D7-/D6+/D6- for layout routing@042893
16.Page#5:Change CP1~CP15 footprint to NC_T from NC for layout update@042993
17.Page#:Change EC2 & EC28 footprint to 100UF_25V@042993
18.Page#31:Change CT12,CT9,CT8,CT7,CT5,CT4,CT6,CT1 footprint to 560UF_4V@042993
19.Page#11,#24:Create cfg7034-Giga@050593
1)Stuff:RN66,RN68,R152,R154,R141,U11,R123,R122,C227,R120,R119,C226,R110,R108,C214,R101,R95,C207,R98,U9,C210,Y1,C209,R127,R132,R100
2)Stuff:Q22,EC18,R161,Q23,EC16,C257,EC17,C239,C233,C219,C220,C234,C213,C241,C312,C348,R104,C208,R78
3)Remove:RN67,R181,R186,U12,RN65,C221,R113,R148,R138,R136,R115,R135,R111,R112,R117,R118,C415
4)Opt-Part:R900=2.2K for R171 ; R901=2.49K for R9 ; USB9=N58-18F0041-S42 for USB2
A A
Title
History-03
Size Document Number Rev
MS-7034 10A
B
5
4
3
2
Date: Sheet of
37 39Monday, May 10, 2004
1
Page 38
MS-7034 VER:10A
5
--->modify from 7034-100@05/11/2004
4
3
2
1
1.Page#11:Remove C419,R339,R340,R341,Q37 ; Change R344,R345 to 4.7K for nVIDIA AP note request@051193
2.Page#13:Change DDR1.184/DDR2.184 pin to "3VDUAL" ; Change DDR1.91/DDR2.91 pin to "SMBDATA1" ; Change DDR1.92/DDR2.92 to "SMBCLK1" from nVIDIA AP note@051193
3.Page#27:Remove "USB_OC#5" of JUSB1.10/JUSB2.10 pin for nVIDIA AP note@051193
4.Page#32:Add R902 close to U2.A8 pin ; Remove R292 ; Change R285=330R ; Stuff C376=1u for nVIDIA AP note@051193
5.Page#12:Stuff C406,C407,C412 & Add C419~C422 MLVS CAP to solder side for ESD issue@051493
D D
6.Page#11:Remove LAN_EE_SEL & LAN_EE_DI for unuse.@051493
7.Page#27,28:Change R298,R73 to 22k & R311,R71 to 43k from nVIDIA AP note.@051493
8.Page#10:Swap U2.A11 from "XTALIN_RTC" to "XTALOUT_RTC" (U2.B11)@051793
Swap U2.B11 from "XTALOUT_RTC" to "XTALIN_RTC" (U2.B11)@051793
9.Page#10:Reserved R903 for Y4@051793
10.Page#11:Change R344,R345 to 2.7K and pull up to 3VDUAL ; Add U21,U22 ESD diode for ESD protection @051893
11.Page#13:Change DDR1.184/DDR2.184 pin to "VDD_25_SUS" ; Change DDR1.91/DDR2.91 pin to "SMB_MEM_DATA" ; Change DDR1.92/DDR2.92 to "SMB_MEM_CLK" from nVIDIA AP note@051893
12.Page#27,#28:Add U23~U38 ESD protection diode from nVIDIA AP note-2@051893
13.Page#32:Add vport C424,C423 closed to JFP1 ; C375=1u for ESD protection@051893
14.Page#11:Add R904 before PWRBTN# close to U2 ; change R265=330R for ESD protection@051893
15.Page#25:Remove L8 & U15 for ESD diode space@051893
C C
16.Page#24:Remove R318,R319,R82,R317,C413,C187,R92,R320,C414,C204 for ESD diode space@051893
17.Page#11:R344,R345 pull up to VCC3 from nVIDIA Charles change@052193
18.Page#11,#27,#28:Add D17~D34 to footprint "SOT323" for BAV99W from vVIDIA AP note-2 @052493
18.Page#27,#28:Remove CN25,CN24,CN21,CN18 ; Reserved Vport Cap C427~C442 for ESD@052493
19.Page#7#11:Add Q37,R905 for HT_PWRGD ; U2.B3 change to PW_OK about clock after Vcore Power sequence issue@052493
20.Page#32:Add Q38,R906,R907 to PW_OK for CK8S VCC3 level@052493
21.Page#11:Reserved vport CAP for DDR(C443,C444)@052593
22.Page#30:Change MS6(U14) to RBF ;R333=0R; Reserved D16,C418 ; change R149,R140 to 100R@052593
23.Page#22,#39:Reserved U19 ; Change U19_Flash to 5010 level@052693
24.Page#24:Add L17 for EMI issue at RTL8201CLl@052693
25.Page#11,#27,#28,#30:Reserved MS6(U14) & D17~D34 for without MSI PN@052693
B B
A A
Title
{Title}
Size Document Number Rev
MS-7034 10A
B
5
4
3
2
Date: Sheet of
38 39Wednesday, May 26, 2004
1
Page 39
5
D D
4
USB9A
5
6
7
8
UP
1
2
3
4
DOWN
XX
N58-18F0041-S42
23
24
25
26
27
28
29
30
19
20
13
18
12
17
11
16
10
15
14
21
22
9
3
USB9B
XX
AMBER+
AMBER-
GREEN+
GREEN-
POWER
TD1+
TD1TD2+
TD2TD3+
TD3TD4+
TD4-
GND
2
1
N58-18F0041-S42
R900
2.2KR
R901
2.49KR1%
U1_RM
C C
CPU_RM
PCB1
For GigaLAN Opt-Part@93/05/04
U1_BP
CPU_BP
_ P01-703410A-D05
U2-HS1
B B
BAT1-S1
E32-0400690-A58
U19_Flash
PLCC-32
BAT-BCR2032P
U14_Mark
MSI
Core Cell
E31-0401030
A A
Title
Manual Part
Size Document Number Rev
MS-7034 10A
B
5
4
3
2
Date: Sheet of
39 39Wednesday, May 26, 2004
1
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