MOTOROLA TL072CDR2, TL072CD, TL074ACN, TL074CN, TL072ACP Datasheet

TL071 (Top View)

TL072 (Top View)

TL074 (Top View)

D SUFFIX

PLASTIC PACKAGE

CASE 751

(SO–8)

P SUFFIX

PLASTIC PACKAGE

CASE 626

N SUFFIX

PLASTIC PACKAGE

CASE 646

(TL074 Only)

PIN CONNECTIONS

Offset Null

Noninvt Input

Inv + Input

Inputs A

Output A

Inputs 1

Output 1

Inputs 2

Output 2

NC V

Output Offset Null

Inputs B

Output B

Output 4

Inputs 4

Inputs 3

Output 3

–

––

7 6 5

2 3 4

7 6 5

2 3 4

114

13 12 11 10

9 8

2 3 4 5 6 7

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SEMICONDUCTOR

TECHNICAL DATA

LOW NOISE, JFET INPUT

OPERATIONAL AMPLIFIERS

Order this document by TL071C/D

MOTOROLA ANALOG IC DEVICE DATA

     

These low noise JFET input operational amplifiers combine two state–of–the–art analog technologies on a single monolithic integrated circuit. Each internally compensated operational amplifier has well matched high voltage JFET input device for low input offset voltage. The BIFET technology provides wide bandwidths and fast slew rates with low input bias currents, input offset currents, and supply currents. Moreover, the devices exhibit low noise and low harmonic distortion, making them ideal for use in high fidelity audio amplifier applications.

These devices are available in single, dual and quad operational amplifiers which are pin–compatible with the industry standard MC1741, MC1458, and the MC3403/LM324 bipolar products.

• Low Input Noise Voltage: 18 nV/ Hz

Typ

• Low Harmonic Distortion: 0.01% Typ

• Low Input Bias and Offset Currents

• High Input Impedance: 10

Ω Typ

• High Slew Rate: 13 V/µs Typ

• Wide Gain Bandwidth: 4.0 MHz Typ

• Low Supply Current: 1.4 mA per Amp

ORDERING INFORMATION

Op Amp

Function

Device

Operating

Temperature Range

Package

TL071CD

SO–8

Single

TL071ACP

= 0° to +

70°C

Plastic DIP

TL072CD

SO–8

Dual

TL072ACP

= 0° to +

70°C

Plastic DIP

Quad TL074CN, ACN TA = 0° to +70°C Plastic DIP

 Motorola, Inc. 1997 Rev 1

TL071C,AC TL072C,AC TL074C,AC

MOTOROLA ANALOG IC DEVICE DATA

MAXIMUM RATINGS

Rating Symbol Value Unit

Supply Voltage V

18 V

–18

Differential Input Voltage V

±30 V

Input Voltage Range (Note 1) V

IDR

±15 V

Output Short Circuit Duration (Note 2) t

Continuous

Power Dissipation

Plastic Package (N, P) P

680 mW

Derate above TA = 47°C 1.0/θ

10 mW/°C

Operating Ambient Temperature Range T

0 to +70 °C

Storage Temperature Range T

stg

–65 to +150 °C

NOTES: 1. The magnitude of the input voltage must not exceed the magnitude of the supply voltage or

15 V, whichever is less.

2.The output may be shorted to ground or either supply. Temperature and/or supply voltages must be limited to ensure that power dissipation ratings are not exceeded.

3.ESD data available upon request.

ELECTRICAL CHARACTERISTICS (V

= 15 V, VEE = –15 V , TA = T

high

to T

low

[Note 1])

Characteristics Symbol Min Typ Max Unit

Input Offset Voltage (RS ≤ 10 k, VCM = 0) V

mV TL071C, TL072C – – 13 TL074C – – 13 TL07_AC – – 7.5

Input Offset Current (VCM = 0) (Note 2) I

nA TL07_C – – 2.0 TL07_AC – – 2.0

Input Bias Current (VCM = 0) (Note 2) I

nA TL07_C – – 7.0 TL07_AC – – 7.0

Large–Signal Voltage Gain (VO = ±10 V, RL ≥ 2.0 k) A

VOL

V/mV TL07_C 15 – – TL07_AC 25 – –

Output Voltage Swing (Peak–to–Peak) V

V (RL ≥ 10 k) 24 – – (RL ≥ 2.0 k) 20 – –

NOTES: 1. T

low

=0°C for TL071C,AC T

high

=70°C for TL071C,AC

0°C for TL072C,AC T

high

=70°C for TL072C,AC

0°C for TL074C,AC T

high

=70°C for TL074C,AC

2.Input Bias currents of JFET input op amps approximately double for every 10°C rise in junction temperature as shown in Figure 3. To maintain junction temperature as close to ambient temperature as possible, pulse techniques must be used during testing.

Figure 1. Unity Gain Voltage Follower Figure 2. Inverting Gain of 10 Amplifier

– +

RL = 2.0 k

CL = 100 pF

– +

CL = 100 pF

10 k

1.0 k

TL071C,AC TL072C,AC TL074C,AC

MOTOROLA ANALOG IC DEVICE DATA

ELECTRICAL CHARACTERISTICS (V

= 15 V, VEE = –15 V , TA = 25°C, unless otherwise noted.)

Characteristics Symbol Min Typ Max Unit

Input Offset Voltage (RS ≤ 10 k, VCM = 0) V

mV TL071C, TL072C – 3.0 10 TL074C – 3.0 10 TL07_AC – 3.0 6.0

Average Temperature Coefficient of Input Of fset Voltage ∆VIO/∆T – 10 – µV/°C

RS = 50 Ω, TA = T

low

to T

high

(Note 1)

Input Offset Current (VCM = 0) (Note 2) I

pA TL07_C – 5.0 50 TL07_AC – 5.0 50

Input Bias Current (VCM = 0) (Note 2) I

pA TL07_C – 30 200 TL07_AC – 30 200

Input Resistance r

– 10

– Ω

Common Mode Input Voltage Range V

ICR

V TL07_C ±10 15, –12 – TL07_AC ±11 15, –12 –

Large–Signal Voltage Gain (VO = ±10 V, RL ≥ 2.0 k) A

VOL

V/mV TL07_C 25 150 – TL07_AC 50 150 –

Output Voltage Swing (Peak–to–Peak) V

24 28 – V

(RL = 10 k)

Common Mode Rejection Ratio (RS ≤ 10 k) CMRR dB

TL07_C 70 100 – TL07_AC 80 100 –

Supply Voltage Rejection Ratio (RS ≤ 10 k) PSRR dB

TL07_C 70 100 – TL07_AC 80 100 –

Supply Current (Each Amplifier) I

– 1.4 2.5 mA Unity Gain Bandwidth BW – 4.0 – MHz Slew Rate (See Figure 1) SR – 13 – v/µs

Vin = 10 V, RL = 2.0 k, CL = 100 pF

Rise Time (See Figure 1) t

– 0.1 – µs Overshoot (Vin = 20 mV, RL = 2.0 k, CL = 100 pF) OS – 10 – % Equivalent Input Noise Voltage e

– 18 –

nV/ Hz√

RS = 100 Ω, f = 1000 Hz

Equivalent Input Noise Current i

– 0.01 –

pA/ Hz√

RS = 100 Ω, f = 1000 Hz

Total Harmonic Distortion THD – 0.01 – %

VO (RMS) = 10 V, RS ≤ 1.0 k, RL ≥ 2.0 k, f = 1000 Hz

Channel Separation CS – 120 – dB

AV = 100

NOTES: 1. T

low

=0°C for TL071C,AC T

high

=70°C for TL071C,AC

0°C for TL072C,AC T

high

=70°C for TL072C,AC

0°C for TL074C,AC T

high

=70°C for TL074C,AC

2. Input Bias currents of JFET input op amps approximately double for every 10°C rise in junction temperature as shown in Figure 3. To maintain junction temperature as close to ambient temperature as possible, pulse techniques must be used during testing.

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