LG Display LC420DUJ-SFE2 Specification
LC420DUJ
Product Specification
SPECIFICATION
FOR
APPROVAL
)
(
(
Preliminary Specification
●
)
Final Specification
Title 42.0” WUXGA TFT LCD
BUYER SKYWORTH
MODEL
APPROVED BY
/
/
/
SIGNATURE
DATE
SUPPLIER LG.Display Co., Ltd.
*MODEL LC420DUJ
SUFFIX SFE2 (RoHS Verified)
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
J.T. Kim / Team Leader
REVIEWED BY
J.K. Park / Project Leader
PREPARED BY
J.K. Kim / Engineer
SIGNATURE
DATE
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 0.2
TV Products Development Dept.
LG. Display LCD Co., Ltd
Product Specification
CONTENTS
LC420DUJ
Number ITEM
COVER
CONTENTS
RECORD OF REVISIONS
1
2
3
3-1
3-2
3-3
3-4
3-5
4
5
6
GENERAL DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
INTERFACE CONNECTIONS
SIGNAL TIMING SPECIFICATIONS
PANEL PIXEL STRUCTURE
POWER SEQUENCE
OPTICAL SPECIFICATIONS
MECHANICAL CHARACTERISTICS
RELIABILITY
Page
1
2
3
4
5
6
6
8
10
11
12
13
20
22
7
7-1
8
8-1
9
9-1
9-2
9-3
9-4
9-5
Ver. 0.2
INTERNATIONAL STANDARDS
ENVIRONMENT
PACKING
PACKING FORM
PRECAUTIONS
ASSEMBLY PRECAUTIONS
OPERATING PRECAUTIONS
ELECTROSTATIC DISCHARGE CONTROL
PRECAUTIONS FOR STRONG LIGHT EXPOSURE
STORAGE
23
23
24
24
25
25
25
26
26
26
1 / 36
Product Specification
RECORD OF REVISIONS
Revision No. Revision Date Page Description
0.1 Nov, 13, 2012 - Preliminary Specification (First Draft)
0.2 Nov, 21, 2012 General Description
LC420DUJ
Ver. 0.2
2 / 36
LC420DUJ
Product Specification
1. General Description
The LC420DUJ is a Color Active Matrix Liquid Crystal Display with an integral the Source PCB and Gate
implanted on Panel (GIP). The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 42.02 inch diagonally measured
active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7M(true) colors.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
EPI(RGB)
Control
Signals
Power Signals
Source Driver Circuit
S1 S1920
G1
TFT - LCD Panel
(1920 × RGB × 1080 pixels)
[Gate In Panel]
G1080
Back light Assembly
LVDS
2Port
LVDS
Select
+12.0V
LED Anode
LED Cathode
LED Anode
LED Cathode
CN1
(51pin)
LVDS 1,2
Option
signal
I2C
EEPROM
SCL
Timing Controller
LVDS Rx + DGA
Power Circuit
SDA
Integrated
Block
CN201 (7pin)
General Features
Active Screen Size 41.92 inches(1064.77mm) diagonal
Outline Dimension
Pixel Pitch 0.4833 mm x 0.4833 mm
Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Color Depth 8bit, 16.7Million colors
Drive IC Data Interface
Transmittance (With POL) 5.54%(Typ.) (TBD)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Weight 1.5 Kg (Typ.) (TBD)
Display Mode Transmissive mode, Normally black
Surface Treatment (Top) Hard coating(3H), Anti-glare treatment of the front polarizer (Haze < 1%),
946.9(H) X 542.1(V) X 1.3(D)) mm (Typ.)
Source D-IC : 8-bit EPI, gamma reference voltage, and control signals
Gate D-IC : Gate In Panel
Ver. 0.2
3 / 36
LC420DUJ
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Unit Note
Min Max
Power Input Voltage LCD Circuit VLCD -0.3 +14.0 VDC
Value
T-Con Option Selection Voltage VLOGIC
Operating Temperature TOP 0 +50
Storage Temperature TST -20 +60
Panel Front Temperature TSUR
-0.3 +4.0 VDC
°C
°C
- +68
°C
Operating Ambient Humidity HOP 10 90 %RH
Storage Humidity HST 10 90 %RH
notes:
1. Ambient temperature condition (Ta = 25 2 °C )
2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature
should be Max 39 °C and no condensation of water.
3. Gravity mura can be guaranteed below 40℃ condition.
4. The maximum operating temperature is based on the test condition that the surface temperature
of display area is less than or equal to 68 ℃ with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in final product design to prevent the surface
temperature of display area from being over 68 ℃. The range of operating temperature may
degrade in case of improper thermal management in final product design.
90%
60
60%
1
2,3
4
2,3
Ver. 0.2
Wet Bulb
Temperature [°C]
20
10
0
10 20 30 40 50 60 70 80 0 -20
Dry Bulb Temperature [°C]
30
40
50
40%
10%
Storage
Operation
Humidity
[(%)RH]
4 / 36
LC420DUJ
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight .
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
Min Typ Max
Value
Unit Note
Circuit :
Power Input Voltage VLCD 10.8 12.0 13.2 VDC
Power Input Current ILCD
Power Consumption PLCD 6.4 8.3 Watt 1
Rush current IRUSH - - 3.0 A 3
Note
1. The specified current and power consumption are under the V
condition, and mosaic pattern(8 x 6) is displayed and fV is the frame frequency.
2. The current is specified at the maximum current pattern.
- 530 690 mA 1
- 770 1000 mA 2
=12.0V, Ta=25 2°C, fV=60Hz
LCD
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. Ripple voltage level is recommended under ± 5% of typical voltage
Ver. 0.2
White : 255 Gray
Black : 0 Gray
Mosaic Pattern(8 x 6)
5 / 36
LC420DUJ
Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, a 51-pin connector is used for the module
electronics and 2pin,2pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN1): FI-RE51S-HF(manufactured by JAE) or GT05P-51S-H38(manufactured by LSM)
or IS050-C51B-C39(manufactured by UJU)
- Mating Connector : FI-R51HL(JAE) or compatible
Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION
No Symbol Description No Symbol Description
1
2
3
4
5
6
7
8
9
10
11 GND
12 R1AN
13 R1AP
14 R1BN
15
16 R1CN
17 R1CP
18 GND
19 R1CLKN
20
21 GND
22 R1DN
23 R1DP
24
25
26
NC
NC
NC
NC
NC
NC
LVDS Select
NC
NC
NC
R1BP
R1CLKP
NC
NC
NC or GND
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
‘H’ =JEIDA , ‘L’ or NC = VESA
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
No Connection
No Connection
No Connection or Ground
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
- - -
NC
R2AN
R2AP
R2BN
R2BP
R2CN
R2CP
GND
R2CLKN
R2CLKP
GND
R2DN
R2DP
NC
NC
NC or GND
NC or GND
GND Ground
GND Ground
GND Ground
NC No connection
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
No Connection
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
No Connection
No Connection
No Connection or Ground
No Connection or Ground
Note
1. All GND(ground) pins should be connected together to the LCD module‟s metal frame.
2. All VLCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. #1~#6 & #8~#10 NC (No Connection): These pins are used only for LGD (Do not connect)
5. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
Ver. 0.2
6 / 36
LC420DUJ
Product Specification
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE (DE Only Mode)
ITEM Symbol Min Typ Max Unit Note
Horizontal
Vertical
Frequency
Display
Period
Blank tHB 100 140 240 tCLK 1
Total tHP 1060 1100 1200 tCLK
Display
Period
Blank tVB
Total tVP
ITEM Symbol Min Typ Max Unit Note
DCLK fCLK 63.00 74.25 78.00 MHz
Horizontal fH 57.3 67.5 70 KHz 2
Vertical fV
tHV 960 960 960 tCLK 1920 / 2
tVV 1080 1080 1080 Lines
20
(228)
1100
(1308)
57
(47)
45
(270)
1125
(1350)
60
(50)
69
(300)
1149
(1380)
63
(53)
Lines 1
Lines
Hz
NTSC : 57~63Hz
(PAL : 47~53Hz)
2
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
3. Spread Spectrum Rate (SSR) for 50KHz ~ 100kHz Modulation Frequency(FMOD) is calculated by
(7 – 0.06*Fmod), where Modulation Frequency (FMOD) unit is KHz.
LVDS Receiver Spread spectrum Clock is defined as below figure
※ Timing should be set based on clock frequency.
Ver. 0.2
7 / 36
LC420DUJ
Product Specification
※ Please pay attention to the followings when you set Spread Spectrum Rate(SSR) and Modulation Frequency(FMOD)
1. Please set proper Spread Spectrum Rate(SSR) and Modulation Frequency (FMOD) of TV system LVDS output.
2. Please check FOS after you set Spread Spectrum Rate(SSR) and Modulation Frequency(FMOD) to avoid
abnormal display. Especially, harmonic noise can appear when you use Spread Spectrum under FMOD 30 KHz.
Ver. 0.2
8 / 36
3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
LC420DUJ
Product Specification
DE, Data
DCLK
First data
Second data
0.7VDD
0.3VDD
tCLK
DE(Data Enable)
0.5 VDD
Invalid data
Invalid data
Valid data
Pixel 0,0 Pixel 2,0
Valid data
Pixel 1,0 Pixel 3,0
tHP
Invalid data
Invalid data
tHV
DE(Data Enable)
Ver. 0.2
1 1080
tVV
tVP
9 / 36
3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LVDS +
LC420DUJ
Product Specification
0 V
# V
= { ( LVDS +) + ( LVDS - ) } / 2
CM
V
CM
V
IN _ MAX V IN _ MIN
Description Symbol Min Max Unit Note
LVDS Common mode Voltage V
LVDS Input Voltage Range V
CM
IN
1.0 1.5 V -
0.7 1.8 V -
Change in common mode Voltage ΔVCM - 250 mV -
2) AC Specification
2) AC Specification
T
clk
LVDS Clock
A
LVDS Data
( F
= 1 / T
)
clk
A
LVDS 1‟st Clock
LVDS 2nd Clock
tSKEW
tSKEW
t
SKEW_min tSKEW_max
clk
T
clk
80%
20%
t
RF
Description Symbol Min Max Unit Note
VTH 100 600 mV
LVDS Differential Voltage
VTL -600 -100 mV
LVDS Clock to Data Skew t
LVDS Clock/DATA Rising/Falling time t
Effective time of LVDS t
LVDS Clock to Clock Skew (Even to Odd) t
1. All Input levels of LVDS signals are based on the EIA 644 Standard.
Note
2. If tRF isn‟t enough, t
should be meet the range.
eff
SKEW
RF
eff
SKEW_EO
3. LVDS Differential Voltage is defined within t
Ver. 0.2
- |(0.25*T
260 |(0.3*T
|± 360|
- |1/7* T
eff
)/7| ps
clk
)/7| ps 2
clk
- ps
| ps -
clk
Tested with Differential Probe
3
-
-
10 / 36
Product Specification
LC420DUJ
LVDS Data
0V
(Differential)
LVDS CLK
0.5tui
360ps
tui
VTH
VTL
360ps
teff
tui : Unit Interval
0V
(Differential)
* This accumulated waveform is tested with differential probe
Ver. 0.2
11 / 36
Loading...