LENOVO YOGA 910 Schematics
5
4
3
2
1
Agera-SVT
CYG50 NM-A901
Schematic Block Diagram
D D
DDR4
NGFF SSD
WiFi/BT
PAGE 17-19
PAGE 21
PAGE 20
Right IO Board
USB3.0 Port
C C
HP/MIC COMBO JACK
PI2546
LPDDR3 Channel A&B
1600MHz
SATA/PCIE
PCIE for WiFi & USB2.0 for BT
ALC298
USB3.0 & USB2.0
mHDA
KBL-U MCP
PAGE 2--15
EDP
SPI
USB2.0
I2C
LCD
SPI BIOS
CAMERA
TOUCHPANEL
PAGE 24
PAGE 9
PAGE 24
PAGE 24
3V/5V
PAGE 29
1.00V
PAGE 29
0.6V/1.2V
PAGE 29
1.5V
I2C
Left IO Board
Typc-C DC-in Port
Typc-C Std Port
B B
PS8740
USB2.0 & Charger
USB3.0 & USB2.0 & DDI
LPC
SMLink
LPC BUSI2C
TOUCH PAD
@TPM
@NFC
PAGE 26
PAGE 16
PAGE 33
PAGE 29
SWITCH POWER
PAGE 31
WALKPORT
PAGE 29
2nd G-SENSOR and P-Sensor
PAGE 23
I2C
Sensor on FPC
G-SENSOR
ALS I2C
A A
5
I2C
EC
PAGE 22
SMBUS
80 Port
Battery
PAGE 33
PAGE 33
KB
PAGE 33
4
3
2
CPU_CORE
GTX_CORE
PAGE 32
CHARGER
PAGE 30
GT3e Power
PAGE 34
Title
Title
Title
Kaby Lake Block Diagram
Size Document Number
Size Document Number
Size Document Number
C
YOGA910
Date: Sheet
Date: Sheet
Date: Sheet
"PROPERTY NOTE: this document cont ains information confidential and
"PROPERTY NOTE: this document cont ains information confidential and
"PROPERTY NOTE: this document cont ains information confidential and
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
1
Rev
Rev
Rev
1 37Monday, July 27, 2015
1 37Monday, July 27, 2015
1 37Monday, July 27, 2015
of
of
of
V1.0C
V1.0C
V1.0
5
D D
DDI1_DN033
DDI1_DP033
DDI1_DN133
DDI1_DP133
DDI1_DN233
DDI1_DP233
DDI1_DN333
DDI1_DP333
C C
TOUCH_RST_N24
EDP_COMP
4
DDPB_CLK
DDPB_DATA
U95A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
E52
EDP_RCOMP
SKL_ULT
REV = 1
3
SKL_ULT
DDI
DISPLAY SIDEBANDS
GPP_E23/DDPD_CTRLDATA
?
1 OF 20
EDP
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
C47
C46
D46
C45
A45
B45
A47
B47
E45
F45
B52
G50
F50
E48
F48
G46
F46
L9
L7
L6
N9
L10
R12
R11
U13
2
DP_UTIL
DDPB_HPD
KBSMI_N 27
SCI_N 27
EDP_HPD 24
LCD_BL_EN 24
LCD_BL_PWM_PCH 22
EDP_VDD_EN 22,24
27,
1
TP4TESTPAD
33
1
EDP_TX0_DN 24
EDP_TX0_DP 24
EDP_TX1_DN 24
EDP_TX1_DP 24
EDP_TX2_DN 24
EDP_TX2_DP 24
EDP_TX3_DN 24
EDP_TX3_DP 24
EDP_AUX_DN 24
EDP_AUX_DP 24
DDI1_AUX_DN 33
DDI1_AUX_DP 33
?
+3V
+VCCIO
B B
EDP_COMP
1 2
R1 24.9_0402_1%
SCI_N
KBSMI_N
DDPB_HPD
12
R12610K_0402_5%
12
R9510K_0402_5%
1 2
R157 100K_0402_5%
DDPB_CLK
DDPB_DATA
RP30
2 3
1 4
2.2K_0404_4P2R_5%
+3V
COMPENSATION PU FOR DP
A A
LENOVO.CRDN
LENOVO.CRDN
1
LENOVO.CRDN
2 37Monday, July 27, 2015
2 37Monday, July 27, 2015
2 37Monday, July 27, 2015
ion confidential and
ion confidential and
ion confidential and
Rev
Rev
Rev
V1.0
V1.0
V1.0
of
of
of
Title
Title
Title
BROADWELL MCP (DDI,EDP)
BROADWELL MCP (DDI,EDP)
BROADWELL MCP (DDI,EDP)
Size Document Number
Size Document Number
Size Document Num
C
C
C
e: Sheet
e: Sheet
Dat
Dat
Date: Sheet
"PROPERTY NOTE: this document cont ains informat
"PROPERTY NOTE: this document cont ains informat
"PROPERTY NOTE: this document cont ains informat
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
5
4
3
2
YOGA4
YOGA4
YOGA4
ber
5
D D
C C
M_A_DQ[15:0]17
M_A_DQ[47:32]17
M_B_DQ[15:0]18
M_B_DQ[47:32]18
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
U95B
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
SKL_ULT
REV = 1
SKL_ULT
4
?
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/D
DDR0_MA[6]/DDR0_CAA[2]/D
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/D
DDR0_BA[2]/DDR0_CAA[5]/D
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7
DDR0_MA[15]/DDR0_CAA[8
DDR0_MA[14]/DDR0_CAA[9
DDR0_MA[13]/DDR0_CAB[0
DDR0_CAS#/DDR0_CAB[1
DDR0_WE#/DDR0_CAB[2]/D
DDR0_RAS#/DDR0_CAB[3
DDR0_BA[0]/DDR0_CAB[4]/D
DDR0_MA[2]/DDR0_CAB[5]/D
DDR0_BA[1]/DDR0_CAB[6]/D
DDR0_MA[10]/DDR0_CAB[7
DDR0_MA[1]/DDR0_CAB[8]/D
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5
DDR_VREF_CA
DDR CH - A
2 OF 20
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DR0_MA[9]
DR0_MA[6]
DR0_MA[7]
DR0_BG[0]
]/DDR0_MA[11]
]/DDR0_ACT#
]/DDR0_BG[1]
]/DDR0_MA[13]
]/DDR0_MA[15]
DR0_MA[14]
]/DDR0_MA[16]
DR0_BA[0]
DR0_MA[2]
DR0_BA[1]
]/DDR0_MA[10]
DR0_MA[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_ALERT#
DDR0_PAR
]
]
]
]
]
?
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
AM70
AM69
AT69
AT70
BA
AY64
AY
BA60
BA
AY38
AY
BA34
BA
AY30
AY
BA26
AW50
AT52
AY67
AY68
BA67
AW67
64
60
38
34
30
26
M_A_CLK_DDR0_DN 17,19
M_A_CLK_DDR0_DP 17,19
1
TP71 TESTPAD
1
TP72 TESTPAD
M_A_CKE0 17,19
1
TP75 TESTPAD
1
TP76 TESTPAD
1
TP82 TESTPAD
M_A_CS0_N 17,19
1
TP83 TESTPAD
M_A_ODT0 17,19
1
M_A_MA5 17,19
M_A_MA9 17,19
M_A_MA6 17,19
M_A_MA8 17,19
M_A_MA7 17,19
M_A_BG0 17,19
M_A_MA12 17,19
M_A_MA11 17,19
M_A_ACT_N 17,19
M_A_BG1 17
M_A_MA13 17,19
M_A_MA15 17,19
M_A_MA14 17,19
M_A_MA16 17,19
M_A_BA0 17,19
M_A_MA2 17,19
M_A_BA1 17,19
M_A_MA10 17,19
M_A_MA1 17,19
M_A_MA0 17,19
M_A_MA3 17,19
M_A_MA4 17,19
M_A_ALERT_N 17,19
M_A_PAR 17,19
+V_DDR_CA_VREF 19
1
TP91 TESTPAD
+V_DDR1_DQ_VREF 19
DDR_PG_CTRL_R 8
TP68 TESTPAD
M_A_DQS_DN0 17
M_A_DQS_DP0 17
M_A_DQS_DN1 17
M_A_DQS_DP1 17
M_A_DQS_DN4 17
M_A_DQS_DP4 17
M_A_DQS_DN5 17
M_A_DQS_DP5 17
M_B_DQS_DN0 18
M_B_DQS_DP0 18
M_B_DQS_DN1 18
M_B_DQS_DP1 18
M_B_DQS_DN4 18
M_B_DQS_DP4 18
M_B_DQS_DN5 18
M_B_DQS_DP5 18
3
M_A_DQ[31:16]17
M_A_DQ[63:48]17
M_B_DQ[31:16]18
M_B_DQ[63:48]18
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
2
U95C
AF65
DDR1_DQ[0]/DDR0_DQ[16]
AF64
DDR1_DQ[1]/DDR0_DQ[17]
AK65
DDR1_DQ[2]/DDR0_DQ[18]
AK64
DDR1_DQ[3]/DDR0_DQ[19]
AF66
DDR1_DQ[4]/DDR0_DQ[20]
AF67
DDR1_DQ[5]/DDR0_DQ[21]
AK67
DDR1_DQ[6]/DDR0_DQ[22]
AK66
DDR1_DQ[7]/DDR0_DQ[23]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
SKL_ULT
REV = 1
?
SKL_ULT
DDR1_MA[5]/DDR1_CAA[0]/D
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/D
DDR1_MA[8]/DDR1_CAA[3]/D
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/D
DDR1_MA[12]/DDR1_CAA[6
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8
DDR1_MA[14]/DDR1_CAA[9
DDR1_MA[13]/DDR1_CAB[0
DDR1_CAS#/DDR1_CAB[1
DDR1_WE#/DDR1_CAB[2]/D
DDR1_RAS#/DDR1_CAB[3
DDR1_BA[0]/DDR1_CAB[4]/D
DDR1_MA[2]/DDR1_CAB[5]/D
DDR1_BA[1]/DDR1_CAB[6]/D
DDR1_MA[10]/DDR1_CAB[7
DDR1_MA[1]/DDR1_CAB[8]/D
DDR1_MA[0]/DDR1_CAB[9]/D
DDR CH - B
3 OF 20
]/DDR1_MA[12]
]/DDR1_MA[13]
]/DDR1_MA[15]
]/DDR1_MA[16]
]/DDR1_MA[10]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]
DR1_MA[5]
DR1_MA[6]
DR1_MA[8]
DR1_BG[0]
]/DDR1_ACT#
]/DDR1_BG[1]
DR1_MA[14]
DR1_BA[0]
DR1_MA[2]
DR1_BA[1]
DR1_MA[1]
DR1_MA[0]
DDR1_MA[3]
DDR1_MA[4]
DDR1_PAR
]
]
]
]
]
]
?
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
AH66
AH65
AG69
AG70
AR6
AR65
AR6
AR60
AT
AR38
AT
AR32
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
6
1
38
32
1
1
DDR_RESET_R
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
1
M_B_CLK_DDR0_DN 18,19
1
TP92 TESTPAD
M_B_CLK_DDR0_DP 18,19
1
TP97 TESTPAD
M_B_CKE0 18,19
1
TP98 TESTPAD
1
TP99 TESTPAD
1
TP104 TESTPAD
M_B_CS0_N 18,19
TP105 TESTPAD
M_B_ODT0 18,19
1
TP70 TESTPAD
M_B_MA5 18,19
M_B_MA9 18,19
M_B_MA6 18,19
M_B_MA8 18,19
M_B_MA7 18,19
M_B_BG0 18,19
M_B_MA12 18,19
M_B_MA11 18,19
M_B_ACT_N 18,19
M_B_BG1 18
M_B_MA13 18,19
M_B_MA15 18,19
M_B_MA14 18,19
M_B_MA16 18,19
M_B_BA0 18,19
M_B_MA2 18,19
M_B_BA1 18,19
M_B_MA10 18,19
M_B_MA1 18,19
M_B_MA0 18,19
M_B_MA3 18,19
M_B_MA4 18,19
M_A_DQS_DN2 17
M_A_DQS_DP2 17
M_A_DQS_DN3 17
M_A_DQS_DP3 17
M_A_DQS_DN6 17
M_A_DQS_DP6 17
M_A_DQS_DN7 17
M_A_DQS_DP7 17
M_B_DQS_DN2 18
M_B_DQS_DP2 18
M_B_DQS_DN3 18
M_B_DQS_DP3 18
M_B_DQS_DN6 18
M_B_DQS_DP6 18
M_B_DQS_DN7 18
M_B_DQS_DP7 18
M_B_ALERT_N 18,19
M_B_PAR 18,19
TP98 TESTPAD
B B
U17
1
DDR_PG_CTRL_R
NC1
2
A
3
GND
Vcc
NC2
Y
+1.2VSUS
2
C28
6
0.1u_0201_10V6K
1
5
4
+3V
R192
100K_0402_5%
1 2
DDR_VTT_PG_CTRL 29
R183 200_0402_1%
1 2
R291 80.6_0402_1%
2
R186
12
1
100_0402_1%
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
74AUP1G07FW4-7_DFN1010-6_1X1
+1.2VSUS
2
C30 @
0.1u_0201_10V6K
A A
DDR_RESET_R
5
4
R209
470_0402_1%
1 2
R332
1
1
2
0_0402_1%
3
1
LENOVO.CRDN
LENOVO.CRDN
1
LENOVO.CRDN
3 37Monday, July 27, 2015
3 37Monday, July 27, 2015
3 37Monday, July 27, 2015
and
and
and
Rev
Rev
Rev
V1.0
V1.0
V1.0
of
of
of
DDR_RESET_N 17, 18
2
Title
Title
Title
BROADWELL MCP ( PROCESSOR LPDDR3)
BROADWELL MCP ( PROCESSOR LPDDR3)
BROADWELL MCP ( PROCESSOR LPDDR3)
Size Document Number
Size Document Number
Size Document Number
C
C
C
YOGA4
YOGA4
YOGA4
Date: Sheet
Date: Sheet
Date: Sheet
"PROPERTY NOTE: this document cont ains information confidential
"PROPERTY NOTE: this document cont ains information confidential
"PROPERTY NOTE: this document cont ains information confidential
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
5
Vinafix
4
3
2
1
I2C3_SDA
?
U95F
LPSS ISH
GPP_B15/GSPI0_CS#
GPP_B16/GSPI0_CLK
GPP_B17/GSPI0_MISO
GPP_B18/GSPI0_MOSI
GPP_B19/GSPI1_CS#
GPP_B20/GSPI1_CLK
GPP_B21/GSPI1_MISO
GPP_B22/GSPI1_MOSI
GPP_C8/UART0_RXD
GPP_C9/UART0_TXD
GPP_C10/UART0_RTS#
GPP_C11/UART0_CTS#
GPP_C20/UART2_RXD
GPP_C21/UART2_TXD
GPP_C22/UART2_RTS#
GPP_C23/UART2_CTS#
GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL
GPP_F4/I2C2_SDA
GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA
GPP_F7/I2C3_SCL
GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL
SKL_ULT
REV = 1
I2C1_SDA
I2C1_SCL
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
1
1
1
1
UART2_RXD
UART2_TXD
UART2_RTS_N
UART2_CTS_N
AN8
AP7
AP8
AR7
AM5
AN7
AP5
AN5
AB1
AB2
W4
AB3
AD1
AD2
AD3
AD4
U7
U6
U8
U9
AH9
AH10
AH11
AH12
AF11
AF12
12
R73
100K_0402_5%
@
12
R79
100K_0402_5%
+3V
12
R68
100K_0402_5%
12
@
R75
100K_0402_5%
M.2_WLAN_WAKE_CTRL_N20
M.2_WLAN_WIFI_WAKE_R_N20
RF_KILL_N_WIFI_NGFF20
M.2_WIFI_RST_N20
12
R69
100K_0402_5%
12
@
R76
100K_0402_5%
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
I2C0_SDA
I2C0_SCL
I2C1_SDA
I2C1_SCL
I2C2_SDA
I2C2_SCL
I2C3_SDA_R
I2C3_SCL_R
12
R70
100K_0402_5%
@
12
R77
100K_0402_5%
TP40
TP41
TP39
TP25
TP58TESTPAD
TP79TESTPAD
TP80TESTPAD
TP81TESTPAD
12
R71
100K_0402_5%
@
12
R78
100K_0402_5%
D D
C C
B B
SKL_ULT
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
6 OF 20
25
0_0402_5%
R
26 0_0402_5%
R
1
2
1
2
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6
I2C1_SDA_TCD
I2C1_SCL_TCD
I2C1_SDA
I2C1_SCL
+3V
P2
P3
P4
P1
M4
N3
N1
N2
AD11
AD12
U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
?
1
2
3
BOARD_ID4
@
U16
VCCA
A1
A2
GND4OE
PI4ULS5V202XVE_1P2X1P6
VCCB
8
7
B1
6
B2
5
H_DCI_CLK 33
H_DCI_DATA 33
NFC_DWL_REQ 25
FPBACK 24
EC_SENSOR_INT 2
SENSOR_PWR_EN 31
AUDIO_PWR_EN 31
FP_PWR_EN 26
TOUCHPANEL_PWR_EN 31
CAMERA_PWR_EN 31
SATA_PWR_EN 29
SE_PWR_EN 25
+3VDX_TCH_PAD
7
I2C1_SDA_TCD 26
I2C1_SCL_TCD 26
I2C3_SCL
I2C2_SDA
I2C2_SCL
+1.8VDX_SENSORHUB_IT8353
+3V
+3VDX_TCH_PAD
+3VDX_TOUCHPANEL
R23 0_0402_5%
R24 0_0402_5%
R29 0_0402_5%@
R27 0_0402_5%@
12
12
12
12
R43 2.2K_0402_5%
R44 2.2K_0402_5%
UART2_RXD
UART2_TXD
UART2_RTS_N
UART2_CTS_N
12
12
2
2
R64 1 @
R65 1 @
2 @
R91
2 @
R122
12
12
1
1
2
2
1
1
R249 49.9K_0402_1%
R250 49.9K_0402_1%
R251 49.9K_0402_1%
R252 49.9K_0402_1%
R80 2.2K_0402_5%
R66 2.2K_0402_5%
R62
R63
1K_0402_5%
1K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
I2C3_SDA_HUB 27
I2C3_SCL_HUB 27
I2C2_SDA_SENSORHUB 23
I2C2_SCL_SENSORHUB 23
I2C1_SDA
I2C1_SCL
I2C1_SDA_TCD
I2C1_SCL_TCD
I2C0_SDA
I2C0_SCL
I2C2_SDA
I2C2_SCL
SENSORHUB_INT_N
+3VAUX
12
12
12
12
+3V
A A
LENOVO.CRDN
LENOVO.CRDN
LENOVO.CRDN
4 37Monday, July 27, 2015
4 37Monday, July 27, 2015
ains information confidential and
ains information confidential and
ains information confidential and
1
4 37Monday, July 27, 2015
Rev
Rev
Rev
V1.0
V1.0
V1.0
of
of
of
Title
Title
Title
BROADWELL MCP ( PCIE USB GPIO)
BROADWELL MCP ( PCIE USB GPIO)
BROADWELL MCP ( PCIE USB GPIO)
Size Document
Size Document
Size Document
Date: Sheet
Date: Sheet
Date: Sheet
"PROPERTY NOTE: this document cont
"PROPERTY NOTE: this document cont
"PROPERTY NOTE: this document cont
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
5
4
3
2
Number
Number
Number
C
C
C
YOGA4
YOGA4
YOGA4
5
+3V
1 2
R48 10K_0402_5%@
D D
C C
PCIE Port 9 SSD
8,28,31 PM_SLP_S0_N
PM_SLP_S0IX_R_N
Wlan
R500
0_0402_5%
PCIE5_WLAN_RX_DN20
PCIE5_WLAN_RX_DP20
PCIE5_WLAN_TX_DN20
PCIE5_WLAN_TX_DP20
1 2
@
PCIE9_RN21
PCIE9_RP21
PCIE9_TN21
PCIE9_TP21
PCIE10_RN21
PCIE10_RP21
PCIE10_TN21
PCIE10_TP21
R298 100_0402_1%
TP11TESTPAD
TP12TESTPAD
PCIE11_RN21
PCIE11_RP21
PCIE11_TN21
PCIE11_TP21
SATA2_RN21
SATA2_RP21
SATA2_TN21
SATA2_TP21
12
PCIE_COMP
1
1
PM_SLP_S0IX_R_N
4
U95H
PCIE/USB3/SATA
H13
PCIE1_RXN/US
G13
PCIE1_RXP/US
B17
PCIE1_TXN/USB3_5_TXN
A17
PCIE1_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/US
D16
PCIE2_TXN/U
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
7
D1
PCIE3_TXN
7
C1
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B
19
PCIE4_TXN
19
A
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D1
9
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
0
D2
PCIE6_TXN
C2
0
PCIE6_TXP
F20
PCIE7_RXN/SA
E20
PCIE7_RXP/S
B21
PCIE7_TXN/S
A21
PCIE7_TXP
G21
PCIE8_RXN/SA
F21
PCIE8_RXP/S
D21
PCIE8_TXN/S
C21
PCIE8_TXP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A
23
PCIE9_TXP
F25
PCIE10_RXN
E
25
PCIE10_RXP
3
D2
PCIE10_TXN
C2
3
PCIE10_TXP
F5
PCIE_RCOMPN
E
5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA
E28
PCIE11_RXN/S
E27
PCIE11_RXP
D24
PCIE11_TXN/SATA1B_TXN
C24
PCIE11_TXP
E30
PCIE12_RXN/S
F30
PCIE12_RXP
A25
PCIE12_TXN/S
B25
PCIE12_TXP
SKL_ULT
REV = 1
B3_5_RXN
B3_5_RXP
/USB3_5_TXP
B3_6_RXP
SB3_6_TXN
TA0_RXN
ATA0_RXP
ATA0_TXN
/SATA0_TXP
TA1A_RXN
ATA1A_RXP
ATA1A_TXN
/SATA1A_TXP
#
ATA1B_RXN
/SATA1B_RXP
/SATA1B_TXP
ATA2_RXN
/SATA2_RXP
ATA2_TXN
/SATA2_TXP
SKL_ULT
?
8 OF 20
USB2
SSIC / USB3
GPP_E0/SAT
GPP_E1/SAT
GPP_E2/SAT
3
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_2_RXN/SS
IC_1_RXN
SIC_1_RXP
USB3_2_RXP/S
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP
/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/S
SIC_2_RXP
SIC_2_TXN
USB3_3_TXN/S
USB3_3_TXP
/SSIC_2_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
ENSE
USB2_VBUSS
OC0#
GPP_E9/USB2_
OC1#
GPP_E10/USB2_
GPP_E11/USB2_
OC2#
OC3#
GPP_E12/USB2_
GPP_E4/DEVS
GPP_E5/DEVS
GPP_E6/DEVSLP2
AXPCIE0/SATAGP0
AXPCIE1/SATAGP1
AXPCIE2/SATAGP2
GPP_E8/SAT
ALED#
?
2
H8
G8
C1
3
3
D1
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
5
C1
5
D1
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
USB2_COMP
AB6
AG3
AG4
A9
C9
D9
B9
J1
LP0
J2
LP1
J3
H2
H3
G4
H1
R299 113_0402_1%
USB_OC_N0
12
1
TP11 TESTPAD
1
TP12 TESTPAD
USB_OC_N1 33
NFC_IRQ_MGP5 25
USB_OC_N3 33
SSD_SATA_PCIE_DET_N 21
12
USB3_RX1_N 33
USB3_RX1_P 33
USB3_TX1_N 33
USB3_TX1_P 33
USB3_RX3_N 33
USB3_RX3_P 33
USB3_TX3_N 33
USB3_TX3_P 33
USB_PN1 24
USB_PP1 24
USB_PN3 33
USB_PP3 33
USB_PN4 33
USB_PP4 33
USB_PN5 26
USB_PP5 26
USB_PN6 33
USB_PP6 33
USB_PN7 33
USB_PP7 33
USB_PN8 20
USB_PP8 20
USB_PN9 33
USB_PP9 33
SATA2_DEVSLP 21
+3V
R4910K_0402_5%
USB3.0 PORT (LIO Type-C)
USB3.0 PORT (RIO1)
CAMERA
USB3.0 PORT (LIO Type-C)
USB3.0 PORT (LIO Type-C)
Finger Print
DC_IN USB2.0 PORT
USB3.0 PORT (RIO1)
BT
DC_IN USB2.0 PORT
R20
1 2
1K_0402_5%
USB_OC_N1
USB_OC_N0
USB_OC_N3
NFC_IRQ_MGP5
USB2_ID
1
1 2
R81 10K_0402_5%
1 2
R82 10K_0402_5%
1 2
R87 10K_0402_5%
1 2
R86 10K_0402_5%
12
R450 100K_0402_5%@
+3VAUX
B B
A36
CSI2_DN0
B36
CSI2_DP0
C38
CSI2_DN1
D38
CSI2_DP1
C36
CSI2_DN2
D36
CSI2_DP2
A38
CSI2_DN3
B38
CSI2_DP3
C31
CSI2_DN4
D31
CSI2_DP4
C33
CSI2_DN5
D33
CSI2_DP5
A31
CSI2_DN6
B31
CSI2_DP6
A33
CSI2_DN7
B33
CSI2_DP7
A29
CSI2_DN8
B29
CSI2_DP8
C28
CSI2_DN9
D28
CSI2_DP9
A27
CSI2_DN10
B27
CSI2_DP10
C27
CSI2_DN11
D27
CSI2_DP11
A A
5
4
U95I
CSI-2
SKL_ULT
REV = 1
SKL_ULT
?
9 OF 20
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHT
EMMC
C_DATA0
GPP_F13/EMM
GPP_F14/EMM
C_DATA1
GPP_F15/EMM
C_DATA2
C_DATA3
GPP_F16/EMM
GPP_F17/EMM
C_DATA4
GPP_F18/EMM
C_DATA5
C_DATA6
GPP_F19/EMM
GPP_F20/EMM
C_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMM
C_CMD
GPP_F12/EMM
EMMC_RCOMP
?
C_CLK
C37
D3
7
C32
2
D3
C29
9
D2
B26
A
26
CSI2_COMP
E13
B7
RIG
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
EMMC_COMP
A
T1
3
12
R300 100_0402_1%
12
R191 200_0402_1%
LENOVO.CRDN
LENOVO.CRDN
Title
Title
Title
BROADWELL MCP ( PCIE USB GPIO)
BROADWELL MCP ( PCIE USB GPIO)
BROADWELL MCP ( PCIE USB GPIO)
Size Document Number
ument Number
ument Number
Size Doc
Size Doc
C
C
C
YOGA4
YOGA4
YOGA4
Date: Sheet of
Date: Sheet
Date: Sheet
"PROPERTY NOTE: this document
"PROPERTY NOTE: this document
"PROPERTY NOTE: this document
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
2
LENOVO.CRDN
5 37Monday, July 27, 2015
5 37Monday, July 27, 2015
contains information confidential and
contains information confidential and
contains information confidential and
1
5 37Monday, July 27, 2015
Rev
Rev
Rev
V1.0
V1.0
V1.0
of
of
5
4
3
2
1
RP2
?
7 OF 20
SDIO/SDXC
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A17/SD_PWR_EN#/ISH_GP7 GPP_A16/
SD_1P8_SEL
SD_RCOMP
GPP_F23
?
HDA_BCLK_I2S_SCLK 33
HDA_SYNC_I2S_SFRM 33
HDA_SDO_I2S_TXD 33
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
SD_COMP
R184
TOUCHPAD_PWR_EN 31
1
2
200_0402_1%
2
1
SKL_ULT
1 8
2 7
3 6
4 5
22_0804_8P4R_5%
U95G
AUDIO
HDA_SYNC_I2S0_SFRM_R
D D
C C
27 HDA_SDO_I2S0_TXD_R
33 HDA_SDI_I2S_RXD
33 PCH_BEEP
HDA_BCLK_I2S0_SCLK_R
HDA_RST_N_R
1
TP42
1
TP32
1
TP32
1
TP32
BA22
HDA_SYNC/I2S0_SFRM
AY22
HDA_BLK/I2S0_SCLK
BB22
HDA_SDO/I2S0_TXD
BA21
HDA_SDI0/I2S0_RXD
AY21
HDA_SDI1/I2S1_RXD
AW22
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
AY20
I2S1_SFRM
AW20
I2S1_TXD
AK7
GPP_F1/I2S2_SFRM
AK6
GPP_F0/I2S2_SCLK
AK9
GPP_F2/I2S2_TXD
AK10
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
AW5
GPP_B14/SPKR
HDA_BCLK_I2S0_SCLK_R
HDA_SYNC_I2S0_SFRM_R
SKL_ULT
REV = 1
HDA_SDO_I2S0_TXD_R
C10
2P_0402_50V8J
B B
+VCCPAZIO
HDA_SDO_I2S0_TXD_R
R379
@
2
1
1K_0402_5%
+3V
PCH_BEEP
A A
5
4
3
R177
@
2
1
100K_0402_5%
LENOVO.CRDN
LENOVO.CRDN
Title
Title
Title
BROADWELL MCP ( RTC AZLIA SATA PCH JTAG)
BROADWELL MCP ( RTC AZLIA SATA PCH JTAG)
BROADWELL MCP ( RTC AZLIA SATA PCH JTAG)
Size Document Number
Size Document
Size Document
Date: Sheet
Date: Sheet
Date: Sheet
"PROPERTY NOTE: this document cont
"PROPERTY NOTE: this document cont
"PROPERTY NOTE: this document cont
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
2
Number
Number
C
C
C
YOGA4
YOGA4
YOGA4
LENOVO.CRDN
6 37Monday, July 27, 2015
6 37Monday, July 27, 2015
ains information confidential and
ains information confidential and
ains information confidential and
1
6 37Monday, July 27, 2015
Rev
Rev
Rev
V1.0
V1.0
V1.0
of
of
of
5
D D
+3V
RP3
1 8
2 7
3 6
4 5
10K_8P4R_5%
1 2
R36 10K_0402_5%
1 2
R37 10K_0402_5%
C C
SRCCLKREQ0_N
SRCCLKREQ2_N
SRCCLKREQ4_N
SRCCLKREQ5_N
CK_REQ_WLAN_N
CK_REQ_SSD_N
CLK_SRC1_M.2_SSD_DN21
CLK_SRC1_M.2_SSD_DP21
4
U95J
D42
CLKOUT_PCIE_N0
C42
SRCCLKREQ0_N
CK_REQ_SSD_N21
SRCCLKREQ2_N
CK_WLAN_DN20
CK_WLAN_DP20
CK_REQ_WLAN_N20
SRCCLKREQ4_N
SRCCLKREQ5_N
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
SKL_ULT
REV = 1
SKL_ULT
CLOCK SIGNALS
3
?
10 OF 20
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
RTCX1
RTCX2
SRTCRST#
RTCRST#
F43
E43
BA17
XTAL24_IN
E37
XTAL24_OUT
E35
XCLK_BIASREF
E42
RTC_X1
AM18
RTC_X2
AM20
SRTC_RST_N
AN18
RTC_RST_N
AM16
?
TP90
TP89
TESTPAD
TESTPAD
2
SUS_CLK 20,21
XCLK_BIASREF
SUS_CLK
1
R121 2.7K_0402_0.5%
R143 1K_0402_5%@
12
12
+VCCCLK5
VCCRTC
R114 1M_0402_5%
1 2
R111 20K_0402_1%
1 2
B B
A A
R112 20K_0402_1%
5
SRTC_RST_N
1
C11
1U_0201_10V6K
2
1
C12
1U_0201_10V6K
2
RTC_RST_N 27
ME RESET
SAVE ME = PU (Default)
CLEAR ME = PD
CMOS RESET
TP87
SAVE CMOS = PU (Default)
TESTPAD
CLEAR CMOS = PD
TP88
TESTPAD
4
8P_0402_50V8J
1423
1
C13
2
3
12
Y2
24MHZ_8PF_EXS00A-CS07257
XTAL24_OUTXTAL24_IN
1
C14
8P_0402_50V8J
2
2
3.9P_0402_50V8J
1 2
C4
12
Y1
32.768KHZ_9PF_CM8V-T1A
C6
1 2
3.9P_0402_50V8J
Title
Title
Title
BROADWELL MCP (CLK)
BROADWELL MCP (CLK)
BROADWELL MCP (CLK)
ber
YOGA4
YOGA4
YOGA4
ber
Size Document Num
Size Document Num
Size Document Number
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
"PROPERTY NOTE: this document cont ains
"PROPERTY NOTE: this document cont ains
"PROPERTY NOTE: this document cont ains
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
R83
10M_0402_5%
1 2
information confidential and
information confidential and
information confidential and
1
RTC_X1
RTC_X2
LENOVO.CRDN
LENOVO.CRDN
LENOVO.CRDN
7 37Monday, July 27, 2015
7 37Monday, July 27, 2015
7 37Monday, July 27, 2015
Rev
Rev
Rev
V1.0
V1.0
V1.0
of
of
of
5
+3VAUX
12
R148 8.2K_0402_5%
1 2
R149 10K_0402_5%
2
1
1 2
1 2
1 2
100K_0402_5%
R152
D D
R150 100K_0402_5%@
R151 10K_0402_5%@
+3V
R182 10K_0402_5%
PM_BATLOW_N_R
AC_PRESENT_R
PCH_PWRBTN_N
PM_PCH_PWROK
SYS_PWROK
SYS_RESET_N
4
H_VCCST_PWRGD
PCIE_WAKE_N20,21,33
3
?
U95K
PLT_RST_N_R
SYS_RESET_N
RSMRST_N
H_CPUPWRGD
1
TP69
1 2
R193 60.4_0402_1%
SYS_PWROK_R
PCH_PWROK
DPWROK
SUS_PWR_ACK
SUSACK_N
SMC_WAKE_SCI_N
PM_LANPHY_ENABLE MPHY_EXT_PWR_GATEB
1
TP73
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SKL_ULT
REV = 1
SKL_ULT
SYSTEM POWER MANAGEMENT
11 OF 20
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
SLP_SUS#
SLP_LAN#
GPD9/SLP_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#
GPP_A11/PME#
INTRUDER#
GPP_B11/EXT_PWR_GATE#
GPP_B2/VRALERT#
AT11
AP15
BA16
AY16
AN15
AW15
BB17
AN16
BA15
AY15
AU13
AU11
AP16
AM10
AM11
?
SLP_S5_N
SLP_SUS_N
SLP_LAN_N
SLP_A_N
PM_BATLOW_N_R
SLP_S0_N
SM_INTRUDER_N
2
SLP_S3_N 27,28
SLP_S4_N 27,29
SLP_WLAN_N 31
PCH_PWRBTN_N 27
AC_PRESENT_R 27
GP_VRALERTB 32
TP15
TP47
TP16
TP14
TP74
1
1
1
1
1
1
TP54
1
PCIE_WAKE_N
SMC_WAKE_SCI_N
GP_VRALERTB
MPHY_EXT_PWR_GATEB
SLP_WLAN_N
1 2
R140 1K_0402_5%
1 2
R12 10K_0402_5%
1 2
R42 10K_0402_5%
R140
1 2
R113 20K_0402_1%
1 2
R45 10K_0402_5%@
+3VAUX
1
+3VAUX
27 PM_RSMRST_N
C C
B B
27 SYS_PWROK
27 PM_PCH_PWROK
5,28,31 PM_SLP_S0_N
27 PCH_SUSACK_N
27 SUS_PWR_ACK_R
DPWROK
VCCRTC
R85 330K_0402_5%
16,20,21,27 PLT_RST_N
1 2
R142 0_0402_5%
1 2
R144 0_0402_5%
1 2
R145 10K_0402_5%
1 2
R136 0_0402_5%
1 2
R137 0_0402_5%
1 2
R147 0_0402_5%@
1 2
R131 0_0402_5%@
+3VAUX
@
R132
10K_0402_5%
1 2
1 2
R135 0_0402_5%
12
2
R141
100K_0402_5%
1 2
R166
0_0402_5%
1
RSMRST_N
SYS_PWROK_R
PCH_PWROK
SLP_S0_N
SUSACK_N
@
R133
0_0402_5%
1 2
SUS_PWR_ACK
SM_INTRUDER_N
PLT_RST_N_R
28,29 VCCIO_PWRGD
27,28,29 1.2VSUS_PWRGD
8,27,28,32,34 ALL_SYS_PWRGD_PMIC
8,27,28,32,34 ALL_SYS_PWRGD_PMIC
28,29 1.00VAUX_PWRGD
10,27,29,30,32 H_PROCHOT_N
27 H_PROCHOT
1.00V_PWRGD_R
R211
0_0402_5%
R213
@
0_0402_5%
C47
0.1u_0201_10V6K
74AUP1G07FW4-7_DFN1010-6_1X1
@
12
12
@
R232 0_0402_5%
@
@
@
@
@
@
1
C110
22U_0402_4V6M
2
@
@
U18
NC11Vcc
2
A
NC2
3
GND
Y
27 EC_VCCST_PWRGD
6
5
4
U36
SLG4V4891_2X1D6
+3VAUX
2
@
C44
0.1u_0201_10V6K
1
R226
0_0402_5%
R217
0_0402_5%
@
@
R234 0_0402_5%
R224 0_0402_5%
R228 0_0402_5%
R229 0_0402_5%
R230 0_0402_5%
R231 0_0402_5%
+VCCST_CPU
12
R19
1K_0402_5%
H_VCCST_PWRGD
12
12
@
@
@
@
@
@
DDR_VTT_PG_CTRL 3,29
PWR_LED 27,33
H_VCCST_PWRGOOD
VCCST_PWRGOOD_IN-
VCCST_PWRGOOD_IN+
DDR_PG_CTRL_R 3
+1.00VAUX
R198
10K_0402_1%
VCCST_PWRGD_IN-
@
1.00V_PWRGD_R
A A
5
4
+3VAUX
1
C43
1U_0201_10V6K
2
U10
6
5
VEE
VCC
2
+IN
VCC
AZV3001FZ4-7
@
100K_0402_1%
-IN3VOUT
1
VCCST_PWRGD_IN+
4
1 2
2
1
1 2
@
C41
0.068U_0201_10V6K
@
12
R205 1K_0402_5%
12
R206 1K_0402_5%@
1
C42
2.2U_0402_6.3V6M
@
2
+VCCSTG
+VCCST_CPU
LENOVO.CRDN
LENOVO.CRDN
1
LENOVO.CRDN
8 37Monday, July 27, 2015
8 37Monday, July 27, 2015
8 37Monday, July 27, 2015
Rev
Rev
Rev
V1.0
V1.0
V1.0
of
of
of
Title
Title
Title
BROADWELL MCP (PM)
BROADWELL MCP (PM)
BROADWELL MCP (PM)
Size Document Number
Size Document Number
Size Document Number
C
C
C
YOGA4
YOGA4
YOGA4
Date: Sheet
Date: Sheet
Date: Sheet
"PROPERTY NOTE: this document cont ains information confidential and
"PROPERTY NOTE: this document cont ains information confidential and
"PROPERTY NOTE: this document cont ains information confidential and
property
property
property
to LENOVO PND and shall not be reproduced or transferred to other documents
to LENOVO PND and shall not be reproduced or transferred to other documents
to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
2
@
R201
3
5
+3VAUX
1 2
R527 0_0402_5%
+3VALW
1
R539
PCH_SCE0_N
PCH_SO_R
PCH_WP_R_N
+3VAUX_SPI
1
R403
1
R570
U6
@
1
CS
2
DO
3
WP
4
GND
W25Q64FVSSIG_SO8
U7
1
CS#
2
SO(IO1)
3
WP#(IO2)
4
VSS
W25Q64FVZPIQ_WSON8_6x5
R164 33_0402_5%
R167 33_0402_5%
2
D D
C C
PCH_SCE0_N
PCH_SO_R
PCH_WP_R_N
16,27 PCH_SCK
16,27 PCH_SO
16,27 PCH_SI
B B
2
2
150K_0402_5%
2
150K_0402_5%
VCC
HOLD
CLK
DI
HOLD#(IO3)
SCLK
SI(IO0)
0_0402_5%
8
7
6
5
VCC
12
12
1
33_0402_5%R167
+3VAUX_SPI
3VAUX_SPI_R
8
7
6
5
2
2
592 @
R
100K_0402_5%
100K_0402_5%
PCH_SCE0_N
PCH_SCE0_R
3VAUX_SPI_R
PCH_HOLD_R_N
PCH_SCK_R
PCH_SI_R
PCH_HOLD_R_N
PCH_SCK_R
PCH_SI_R
1
1
591 @
R
PCH_SCK_R
PCH_SO_R
PCH_SI_R
R568
1
0_0402_5%
+3VAUX_SPI
2
4
PCH_SCK
PCH_SO
PCH_SI
PCH_WP_N
27 PCH_SCE0_N
16 PCH_SCE1_N
27 INT_SERIRQ
2
C16
0.1u_0201_10V6K
1
+3VAUX_SPI
PCH_WP_N PCH_WP_R_N
+3VAUX_SPI
PCH_HOLD_N PCH_HOLD_R_N
PCH_HOLD_N
1
TP19
1
TP20
1
TP21
27 H_RCIN_N
SML0_ALERT_N
1 2
R171 20K_0402_1%
12
R172 33_0402_5%
R174 20K_0402_1%
R175 33_0402_5%
27 SPI_PWR_EN
12
12
@
R38
12
10K_0402_5%
R105
200K_0402_5%
@
AV2
AW3
AV3
AW2
AU4
AU3
AU2
AU1
AW13
AY11
+3VALW
U95E
SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#
M2
GPP_D1/SPI1_CLK
M3
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
V2
GPP_D22/SPI1_IO3
M1
GPP_D0/SPI1_CS#
G3
CL_CLK
G2
CL_DATA
G1
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
SKL_ULT
REV = 1
+3VAUX
1 2
1 2
3
SPI - FLASH
SPI - TOUCH
C LINK
R374
10K_0402_5%
R176
20K_0402_1%
PU44
2
IN
1
ON
SLG59M1558VTR
2
?
SKL_ULT
SMBUS, SMLINK
LPC
GPP_A14/SUS_STAT#/ESPI_RESET#
5 OF 20
@
ESPI OR LPC
HIGH: ESPI IS SELECTED FOR EC
LOW: LPC SELECTED
@
WEAK INTERNAL PD
@
3
OUT
4
GND
1
@
PC316
0.1u_0201_10V6K
2
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
PR213 2 @
1
0_0402_5%
SMB_CLK
R7
SMB_DATA
R8
SMB_ALERT_N
R10
SML0_CLK
R9
SML0_DATA
W2
SML0_ALERT_N
W1
W3
V3
SML1_ALERT_N
AM7
@
1 2
R697 0_0402_5%
@
1 2
R698 0_0402_5%
SML1_CLK 27
SML1_DATA 27
NFC_SML_CLK 25
NFC_SML_DAT 25
R517~R520 should be changed to 15ohm when use eSPI mode.
AY13
1 2
R517 0_0402_5%
BA13
R518 0_0402_5%
BB13
R519 0_0402_5%
AY12
R520 0_0402_5%
BA12
BA11
AW9
AY9
AW11
?
+3VAUX_SPI
1 2
1 2
1 2
CK_LPC_0_R
CK_LPC_1_R
SUS_STAT_N_ESPI_RST_N
1 2
R118 22_0402_1%
1
R120
@
PM_CLKRUN_N 16,27
LPC_AD0_ESPI_IO0 16,27
LPC_AD1_ESPI_IO1 16,27
LPC_AD2_ESPI_IO2 16,27
LPC_AD3_ESPI_IO3 16,27
LPC_FRAME_N_ESPI_CS_N 16,27
2
22_0402_1%
27
CLK_PCI_LPC_ESPI_CLK
PCH_PCI_LPC_TPM
PM_CLKRUN_N
H_RCIN_N
INT_SERIRQ
SMB_CLK
SMB_DATA
SMB_ALERT_N
SML0_CLK
SML0_DATA
SML1_CLK
SML1_DATA
SML1_ALERT_N
SML1_ALERT_N
1
27
_CLK
16
1 2
R1348.2K_0402_5%
12
R3410K_0402_5%
12
R3510K_0402_5%
1
1 2
1 2
12
12
12
12
12
12
12
2
4.7K_0402_1%
R158 1K_0402_5%
R159 1K_0402_5%
R589 2.2K_0402_5%
R155 499_0402_1%
R156 499_0402_1%
R161 1K_0402_5%
R162 1K_0402_5%
R400
R373 150K_0402_5%
R377 10K_0402_5%@
+3V
1
2
+3VAUX
+3V
C79
1U_0201_10V6K
1 2
A A
LENOVO.CRDN
LENOVO.CRDN
1
LENOVO.CRDN
9 37Monday, July 27, 2015
9 37Monday, July 27, 2015
9 37Monday, July 27, 2015
Rev
Rev
Rev
V1.0
V1.0
V1.0
of
of
of
Title
Title
Title
BROADWELL MCP (LPC SPI SMB CLINK)
BROADWELL MCP (LPC SPI SMB CLINK)
BROADWELL MCP (LPC SPI SMB CLINK)
Size Document Number
Size Document Number
Size Document Number
C
C
C
YOGA4
YOGA4
YOGA4
Date: Sheet
Date: Sheet
Date: Sheet
"PROPERTY NOTE: this document cont ains information confidential and
"PROPERTY NOTE: this document cont ains information confidential and
"PROPERTY NOTE: this document cont ains information confidential and
property to LENOVO PND and s
property to LENOVO PND and s
property to LENOVO PND and s
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
5
4
3
2
hall not be reproduced or transferred to other documents
hall not be reproduced or transferred to other documents
hall not be reproduced or transferred to other documents
5
D D
+VCCST_CPU
4
3
2
1
R106
R107
R108
PCH_THRMTRIP_N
H_CATERR_N
TOUCH_PANEL_INTR_N_LS
PCH_JTAG_TDO_CPU
PCH_JTAG_TDI_CPU
PCH_JTAG_TMS_CPU
1
1K_0402_1%
1
499_0402_1%
2
51_0402_5%
OPCE_RCOMP
OPC_RCOMP
CPU_POPIRCOMP
PCH_POPIRCOMP
+VCCSTG
H_PROCHOT_R_N
PCH_THRMTRIP_N
接到
EC 1.00V GPIO
22 PECI_EC
20 RF_KILL_N_BT_NGFF
24 TOUCH_PANEL_INTR_N_LS
26 TOUCHPAD_INTR_N
R212
H_CATERR_N
H_PROCHOT_R_N
PCH_THRMTRIP_N
1
1
1
1
1
TOUCH_PANEL_INTR_N_R
TOUCHPAD_INTR_N_R
CPU_POPIRCOMP
PCH_POPIRCOMP
OPCE_RCOMP
OPC_RCOMP
TP31
TP27
TP23
TP24
2
0_0402_5%
AT16
AU16
D63
A54
C65
C63
A65
C55
D55
B54
C56
A6
A7
BA5
AY5
H66
H65
U95D
CATERR#
PECI
PROCHOT#
THERMTRIP#
SKTOCC#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP
OPC_RCOMP
LT
SKL_U
REV
= 1
R214 1 @
R215 1 @
CPU MISC
2
2
SKL_ULT
0_0402_5%
0_0402_5%
?
4 OF 20
TOUCH_PANEL_INTR_N_R
TOUCHPAD_INTR_N_R
JTAG
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PCH_TRST#
JTAGX
?
B61
D60
A61
C60
B59
B56
D59
A56
C59
C61
A59
PCH_TCK_JTAGX_CPU
PCH_JTAG_TDI_CPU
PCH_JTAG_TDO_CPU
PCH_JTAG_TMS_CPU
XDP_TRST_CPU_N
PCH_JTAG_TCK
PCH_JTAG_TDI_CPU
PCH_JTAG_TDO_CPU
PCH_JTAG_TMS_CPU
XDP_TRST_CPU_N
PCH_TCK_JTAGX_CPU
1
1
TP33 TESTPAD
TP35 TESTPAD
2
2
R240 1 @
2
2
2
2
2
2
2
1
1K_0402_1%
1
49.9_0402_1%
1
100K_0402_5%
R17
R160
2
R185
1
49.9_0402_1%
1
49.9_0402_1%
1
49.9_0402_1%
1
49.9_0402_1%
1
1
1
2
2
0_0402_5%
1
R9
R239 2 @
+3VDX_TOUCHPANEL
R7
+VCCSTG
C C
8,27,29,30,32 H_PROCHOT_N
22 H_THRMTRIP_N
B B
51_0402_5%
51_0402_5%
51_0402_5%
PCH_TCK_JTAGX_CPU
R241
R242
R237
R238
A A
LENOVO.CRDN
LENOVO.CRDN
1
LENOVO.CRDN
10 37Monday, July 27, 2015
10 37Monday, July 27, 2015
10 37Monday, July 27, 2015
Rev
Rev
Rev
V1.0
V1.0
V1.0
of
of
of
Title
Title
Title
BROADWELL MCP (MISC THERM CPU JTAG)
BROADWELL MCP (MISC THERM CPU JTAG)
BROADWELL MCP (MISC THERM CPU JTAG)
Size Document Number
Size Document Number
Size Document Number
C
C
C
YOGA4
YOGA4
YOGA4
Date: Sheet
Date: Sheet
Date: Sheet
"PROPERTY NOTE: this document cont ains information confidential and
"PROPERTY NOTE: this document cont ains information confidential and
"PROPERTY NOTE: this document cont ains information confidential and
prope
prope
prope
rty to LENOVO PND and shall not be reproduced or t ransferred to other documents
rty to LENOVO PND and shall not be reproduced or t ransferred to other documents
rty to LENOVO PND and shall not be reproduced or t ransferred to other documents
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
5
4
3
2
5
+V_EDRAM_VR +V_EOPIO_VR
R245
100_0402_1%
1 2
VCCOPC_SENSE
VSSOPC_SENSE
D D
100_0402_1%
R246
1 2
HSW IP - STUFF R226 EMPTY R210
SKL A0 STUFF R210 EMPTY R226
+1.00VSUS
1 2
R210 0_0402_5%
+1.00VDX
1 2
R227 0_0402_5%
C C
+VCCST_CPU
12
VR_SVID_DATA
100_0402_1%
100_0402_1%
+VCCST_CPU
+VCCSTG
R302
100_0402_1%
R247
R248
1 2
1 2
VCCEOPIO_SENSE
VSSEOPIO_SENSE
@
1
C253
1U_0201_10V6
2
K
+V_EOPIO_VR
1
C31
10U_0402_6.3V
@
2
6M
@
1
C36
10U_0402_6.3V
2
6M
1
C35
10U_0402_6.3V
2
6M
VR_SVID_DATA 32
+VCCST_CPU
R225
56_0402_5%
H_CPU_SVIDALRT_N
12
R202 220_0402_5%
1 2
+VCCST_CPU
PR170
45.3_0402_1%
B B
H_CPU_SVIDCLK
1 2
1 2
R204 0_0402_5%
+VCCIO +1.00VSUS
R307
100_0402_1%
VCCIO_SENSE
VSSIO_SENSE
1 2
R308
100_0402_1%
1 2
A A
5
+V_EDRAM_VR
@
@
1
1
C269
C273
1U_0201_10V6
1U_0201_10V6
2
2
K
K
@
@
VR_SVID_ALERT_N 32
VR_SVID_CLK 32
4
CPU_CORE CPU_CORE
1
TP84
1
TP85
+1.8V
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO_SENSE
VSSEOPIO_SENSE
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40
AM32
AM33
AM35
AM37
AM38
AK32
AB62
AC63
AE63
AE62
AG62
AL63
AJ62
A30
A34
A39
A44
G30
K32
P62
V62
H63
G61
REV = 1
U95L
VCC_A30
VCC_A34
VCC_A39
VCC_A44
VCC_AK33
VCC_AK35
VCC_AK37
VCC_AK38
VCC_AK40
VCC_AL33
VCC_AL37
VCC_AL40
VCC_AM32
VCC_AM33
VCC_AM35
VCC_AM37
VCC_AM38
VCC_G30
RSVD_K32
RSVD_AK32
VCCOPC_AB62
VCCOPC_P62
VCCOPC_V62
VCC_OPC_1P8_H63
VCC_OPC_1P8_G61
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO
VCCEOPIO
VCCEOPIO_SENSE
VSSEOPIO_SENSE
SKL_ULT
?
SKL_ULT
CPU POWER 1 OF 4
12 OF 20
VCC_SENSE
VSS_SENSE
VIDALERT#
VCCSTG_G20
+1.2VSUS
Note：Layout need to follow
CRB to do an Inductor
+1.2VSUS
1
1
C37
C274
1U_0201_10V6K
2
10U_0402_6.3V6M
2
+VCCST_CPU
1U_0201_10V6K
1U_0201_10V6K
C275
C276
1
2
+VCCSTG
1
2
C281
1
1U_0201_10V6
2
K
+1.2V_VCCPLLOC
2
C189
0.1u_0201_10V6K
4
1
VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43
VIDSCK
VIDSOUT
2
C190
0.1u_0201_10V
1
6K
3
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
E32
E33
B63
A63
D64
G20
H_CPU_SVIDALRT_N
H_CPU_SVIDCLK
VR_SVID_DATA
?
?
SKL_ULT
U95N
CPU POWER 3 OF 4
AU23
VDDQ_AU23
AU28
VDDQ_AU28
AU35
VDDQ_AU35
AU42
VDDQ_AU42
BB23
VDDQ_BB23
BB32
VDDQ_BB32
BB41
VDDQ_BB41
BB47
VDDQ_BB47
BB51
VDDQ_BB51
AM40
VDDQC
A18
VCCST
A22
VCCSTG_A22
AL23
VCCPLL_OC
K20
VCCPLL_K20
K21
VCCPLL_K21
SKL_ULT
REV = 1
3
+VCCSTG
14 OF 20
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
CPU_CORE
1 2
1 2
VCCGT_SENSE32
VSSGT_SENSE32
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
?
R233
100_0402_1%
R236
100_0402_1%
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
VCC_SENSE 32
VSS_SENSE 32
R235
100_0402_1%
R304
100_0402_1%
GFX_CORE
+VCCIO
1 2
1 2
+VCCSA
2
GFX_CORE
2
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
A48
A53
A58
A62
A66
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
M62
N63
N64
N66
N67
N69
J70
J69
U95M
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT_SENSE
VSSGT_SENSE
SKL_ULT
REV = 1
SKL_ULT
CPU POWER 2 OF 4
1
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
GTX_CORE
GTX_CORE
1 2
GTX_CORE
R243
100_0402_1%
R244
100_0402_1%
?
13 OF 20
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE
VSSGTX_SENSE
?
1 2
+VCCSA
R309
100_0402_1%
1 2
VCCSA_SENSE32
VSSSA_SENSE32
R310
100_0402_1%
1 2
LENOVO.CRDN
LENOVO.CRDN
Title
Title
Title
BROADWELL MCP (PROCESSOR POWER)
BROADWELL MCP (PROCESSOR POWER)
BROADWELL MCP (PROCESSOR POWER)
Size Document Number
Size Document Number
Size Document Number
C
C
C
YOGA4
YOGA4
YOGA4
Date: Sheet of
Date: Sheet
Date: Sheet
"PROPERTY NOTE: this document cont ains information confidential
"PROPERTY NOTE: this document cont ains information confidential
"PROPERTY NOTE: this document cont ains information confidential
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
LENOVO.CRDN
1
Rev
Rev
Rev
V1.0
V1.0
V1.0
of
of
11 37Monday, July 27, 2015
11 37Monday, July 27, 2015
11 37Monday, July 27, 2015
and
and
and
5
4
3
2
1
+3VAUX
12
R323 0_0402_5%
+VCCPGPPA
+1.00VAUX
D D
+1.00VAUX
+VCCSA
PL15
1
BLM15PX330SN1D_2P
1 2
L15
BLM15PX330SN1D_2P
1 2
L17
BLM15PX330SN1D_2P
2
@
+1.00VAUX
1 2
L16
BLM15PX121SN1D_2P
C C
R375 0_0402_5%
R381 0_0402_5%
R415 0_0402_5%
R416 0_0402_5%
1
C66
47U_0603_4V
2
12
12
12
12
+VCCMPHYAON_1P0_C
1
B B
C55
1U_0201_10V6K
2
+VCCMPHYGTAON_1P0_LS
1 2
L8
BLM15PX330SN1D_2P
12
R376 0_0402_5%
1 2
L9
A A
BLM15PX121SN1D_2P
12
R401 0_0402_5%
5
1
C54
1U_0201_10V6K
2
1
C56
1U_0201_10V6K
2
1
C71
1U_0201_10V6K
2
1
C72
1U_0201_10V6K
2
+VCCMPHYGTAON_1P0_LS
1
PC171
0.1u_0201_10V6K
2
+VCCPRIM_CORE
1
C73
1U_0201_10V6K
2
+VCCPRIM_1P0
+VCCMPHYAON_1P0
+VCCFHV
+VCCDTS_1P0
+VCC19P2_1P0
+1.00VAUX
2
1
1
1
C70
C198
1U_0201_10V6K
47U_0603_4V
2
2
3.5A
2.57A
1
C8
2P_0201_10V6K
+VCCMPHYGT_1P0
+VCCAMPHYPLL_1P0
+VCCSRAM_1P0
+VCCAPLLEBB_1P0
L39
2
BLM15PX330SN1D_2P
+VCCDSW_1P0
1U_0201_10V6K
C7
+1.00VAUX
2
1
4
+VCCPRIM_1P0
+VCCPRIM_CORE
1
+VCCMPHYAON_1P0
+VCCMPHYAON_1P0_C
2
+VCCMPHYGT_1P0
+VCCAMPHYPLL_1P0
+VCCAPLL_1P0
+VCCPDSW_3P3
+VCCPAZIO
+VCCPSPI
+VCCSRAM_1P0
+VCCPRIM_3P3
+VCCFHV
+VCCAPLLEBB_1P0
+VCCAPLL_1P0
C94
0.1u_0201_10V6K
+3VAUX
+3VAUX
L38
1 2
BLM15PX121SN1D_2P
2
C9
2P_0201_50V8J
1
1 2
L10
BLM15PX121SN1D_2P
+3VALW
12
12
RTC_VCC
AB19
AB20
P18
AF18
AF19
V20
V21
AL1
K17
L1
N15
N16
N17
P15
P16
K15
L15
V15
AB17
Y18
AD17
AD18
AJ17
AJ19
AJ16
AF20
AF21
T19
T20
AJ21
AK20
N18
R253
3K_0402_5%
R322
R590
0_0402_5%
R84
U95O
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
DCPDSW_1P0
VCCMPHYAON_1P0
VCCMPHYAON_1P0
VCCMPHYGT_1P0_N15
VCCMPHYGT_1P0_N16
VCCMPHYGT_1P0_N17
VCCMPHYGT_1P0_P15
VCCMPHYGT_1P0_P16
VCCAMPHYPLL_1P0
VCCAMPHYPLL_1P0
VCCAPLL_1P0
VCCPRIM_1P0_AB17
VCCPRIM_1P0_Y18
VCCDSW_3P3_AD17
VCCDSW_3P3_AD18
VCCDSW_3P3_AJ17
VCCHDA
VCCSPI
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCPRIM_3P3_AJ21
VCCPRIM_1P0_AK20
VCCAPLLEBB
SKL_ULT
REV = 1
1
2
D1
D2
@
2
1
2
C77
0.1u_0201_10V6K
1
1
C85
1U_0201_10V6K
2
SKL_ULT
CPU POWER 4 OF 4
45.3K_0402_1%
2
2
45.3K_0402_1%
+VCCPDSW_3P3
?
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
15 OF 20
CH520N4-45GP_DFN1006-2-2
CH520N4-45GP_DFN1006-2-2
+VCCPAZIO
3
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
+3VAUX
+3VAUX
?
AK15
AG15
Y16
Y15
T16
AF16
AD15
V19
T1
AA1
AK17
AK19
BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
AN13
+VCCPRTCPRIM_3P3
1
TP77
1
TP78
VCCRTC
1
C5
1U_0201_10V6K
2
R318 0_0402_5%
R316 0_0402_5%
12
12
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPF
+VCCPGPPG
+VCCPRIM_3P3
+VCCDTS_1P0
+VCCATS_1P8
VCCRTCEXT
+VCC19P2_1P0
+VCCCLK2
+VCCCLK3
+VCCCLK4
+VCCCLK6
2
C93
0.1u_0201_10V6K
1
1
C58
1U_0201_10V6K
2
VCCRTC
2
1
+VCCCLK5
+VCCPRIM_3P3
+VCCPSPI
C430
0.1u_0201_10V6K
2
R325 0_0402_5%
R326 0_0402_5%
R327 0_0402_5%
R329 0_0402_5%
R330 0_0402_5%
1
C65
47U_0603_4V
2
+1.8VAUX
R332 0_0402_5%
R333 0_0402_5%
+3VAUX
R334 0_0402_5%
+1.00VAUX
R417 0_0402_5%
R423 0_0402_5%
R428 0_0402_5%
R429 0_0402_5%
R438 0_0402_5%
12
12
12
12
12
12
12
12
12
12
12
1
C74
1U_0201_10V6K
2
1
C75
1U_0201_10V6K
2
1
C76
1U_0201_10V6K
2
1
C81
1U_0201_10V6K
2
1
C236
1U_0201_1
2
0V6K
+VCCPGPPB
+VCCPGPPC
+VCCPGPPE
+VCCPGPPD
+VCCPGPPG
+VCCPGPPF
+VCCATS_1P8
+VCCPRTCPRIM_3P3
2
C310
0.1u_0201_
1
10V6K
+VCCCLK2
+VCCCLK3
+VCCCLK4
+VCCCLK5
12
12
1
2
Title
Title
Title
BROADWELL MCP (PCH POWER)
BROADWELL MCP (PCH POWER)
BROADWELL MCP (PCH POWER)
Size Document Number
Size Document Num
Size Document Num
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
"PROPERTY NOTE: this document cont ains
"PROPERTY NOTE: this document cont ains
"PROPERTY NOTE: this document cont ains
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
property to LENOVO PND and shall not be reproduced or transf erred to other documents
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
obtained without the expressed written consent of LENOVO PND."
YOGA4
YOGA4
YOGA4
ber
ber
C82
1U_0201_10V6K
1
+VCCCLK6
LENOVO.CRDN
LENOVO.CRDN
LENOVO.CRDN
12 37Monday, July 27, 2015
12 37Monday, July 27, 2015
information confidential and
information confidential and
information confidential and
12 37Monday, July 27, 2015
of
of
of
Rev
Rev
Rev
V1.0
V1.0
V1.0
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