JRC NJG1302V Datasheet

NJG1302V

MEDIUM POWER AMPLIFIER GaAs MMIC

GG2

NJG1302V

nGENERAL DESCRIPTION nPACKAGE OUTLINE
NJG1302V is a GaAs MMIC designed mainly for the
final stage power amplifier of Japanese PHS handset,
but suitable digital wireless phone and wireless LAN.
This amplifier has wide variable gain capability of 20dB
dynamic range.
NJG1302V has input and output matching circuits
internally and features low voltage and high efficiency
operation. The output power of 21dBm is easily available
with very low distortion.

nFEATURES

lVoltage gain under low distortion
lLow voltage operation +3.0V typ.

lLow current consumption 195mA typ. @f= 1.9GHz, P
lHigh gain 32dB
lLow distortion(ACP) -60dBc typ. @f= 1.9GHz, P
lReduction of Parasitic oscillation
lInput and output internal matching circuit
lPackage SSOP14

= 21dBm

out

= 21dBm

OUT

nPIN CONFIGURATION

V Type

(Top View)

1

2

4

5

6

7

14

13

123

11

10

9

8

Pin Connection

1. RF

2. GND

3. V

4. GND

5. V

6. GND

7. V

IN

GG1

CONT

8. RF

9. GND

10. V

11. GND

12. V

13. GND

14. GND

OUT

DD1

DD1

NJG1302V

nABSOLUTE MAXIMUM RATINGS

DD1,VDD2

GG1,VGG2

PARAMETER SYMBOL CONDITIONS RATINGS UNITS
Drain Voltage V
Gate Voltage V
Gain Control Voltage V
Input Power P
Power Dissipation P
Operating Temperature T
Storage Temperature T

CONT

in

D
opr
stg

nELECTRICAL CHARACTERISTICS

PARAMETER SYMBOL CONDITONS MIN TYP MAX UNITS
Operating Frequency freq V
Drain Voltage V
Gate Voltage V
Idle Current *1 I
Operating Current *1 I
Gate Current *2 I
Gain Control Terminal

Current
Gain Control Voltage V

DD1,2
GG1,2

idle
DD
GG

I

CONT

CONT

Small Signal Gain Gain V
Gain Flatness G

Gain Control Range G
Pout at 1dB

Compression point
Adjacent Channel

Leakage Power 1

Adjacent Channel
Leakage Power 2

Harmonics P

P

P

P

flat

CONT

-1dB

acp

acp

SP

Input VSWR VSWRiV
Load VSWR Tolerance -

(Ta=+25oC, Zs=Zl=50Ω)

V

GG1,VGG2

V

DD1,VDD2

V

DD1,VDD2

V

DD1,VDD2

=-0.9V 6 V
=-3.0V -4 V
=-3.0V -4 V
=-3.0V, V

GG1,VGG2

=-0.9V 3 dBm

At on PCB board 600 mW

-30 ~ +85 °C

-40 ~ +150 °C

(Ta=+25 oC, Zs=Zl=50Ω)

=3.0V 1.89 - 1.92 GHz

DD1,2

2.9 3.0 5.0 V

V

=3.0V, I

DD1,2

V

=3.0V, No RF Signal 175 180 185 mA

DD1,2

V

=3.0V, P

DD1,2

V

=3.0V, P

DD1,2

V

=3.0V, P

DD1,2

-2.0<V

CONT

=180mA -1.25 -0.9 -0.6 V

idle

=21dBm 180 195 205 mA

out

=21dBm -150 -70 - uA

out

=21dBm

out

<0.0V

-5 -2 - uA

-2.0 - 0 V

DD1,2

V

DD1,2

V

CONT

I

idle

V

DD1,2

V

DD1,2

offset=600kHz,

1

=3.0V, I
=3.0V, I
=-2~0V, V

=180mA

=3.0V 22 23 - dBm
=3.0V, P

=180mA 29 32 35 dB

idle

=180mA 0 0.5 1.0 dB

idle

=3.0V

DD1,2

=21dBm

out

18 20 23 dB

- -60 -55 dBc
Pin;π/4 DQPSK
V

DD1,2

offset=900kHz,

2

=3.0V, P

=21dBm

out

- -65 -60 dBc
Pin; π/4 DQPSK

V

=3.0V, P

DD1,2

=3.0V - - 2.2

DD1,2

V

=3.0V, P

DD1,2

Load VSWR=4:1,All Phase

=21dBm - -35 -30 dBc

out

=21dBm

out

Parasitic Oscillation for

Fundamental Signal Level

:<-60dBc

*1:V
*2:V

Terminal V

DD1

Terminal V

GG1

Terminal Total Current

DD2

Terminal Total Current

GG2

NJG1302V

nTYPICAL CHARACTERISTICS

(d

Gain vs. Frequency vs. Control Voltage

(VDD=3.0V, IDD=180mA, Ta=25oC)

40

30

P

vs. Operating Current vs. V

acp

(P

=21dBm, V

out

-50

V

=0V

CONT

-55

=0V, f=1.9GHz, Ta=25oC)

cont

DD

20

Gain (dB)

10

0

-10

0.0 1.0 2.0 3.0
Frequency f (GHz)

-1.0V

-1.4V

Bc)

-60

(dBc)

acp

acp

P

P

-65

-70
150 160 170 180 190 200 210

Operating Current IDD (mA)

VDD=2.9V

4.0V

Output Power vs. Input Power

vs. Control Voltage

(VDD=3.0V, I

26

24

22

(dBm)

out

20

18

16

Output Power P

14

=180mA, f=1.9GHz, Ta=25oC)

idle

V

=0V

CONT

3.0V

3.3V

5.0V

-1V -1.2V

-1.4V

12

-20 -15 -10 -5 0 5 10

P

vs. Input Power vs. Control Voltage

acp

(VDD=3.0V, I

-20

-30

-40

-50

(dBc)

acp

-60

P

-70

-80

-90

-20 -15 -10 -5 0 5 10

Input Power Pin (dBm)

=180mA, f=1.9GHz, Ta=25oC)

idle

V

=0V

CONT

Input Power Pin (dBm)

-1V

-1.2V

-1.4V