Intel® NetStructure™
MPCHC5525 System Master
Processor Board IPMI Reference
Driver
User’s Manual
May 2004
Order Number: 301561-001
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6Intel® NetStructure™ MPCHC5525 Syst em Mast er Proc essor Board I PMI Refe rence Dr iver Us er’s Manua l
Using This G uide
Using This Guide1
The Intel® NetStructure™ MPCHC5525 System Master Proces sor Board IPMI Reference Driv er
User’s Guide is intended for users qualified in electronics or electrical engineering. Users should
have a working understanding of PCI, CompactPCI*, telecommuni cations, and the IPMI Specification V1.0 Rev. 1.1.
1.1Terms and Definitions
T able 1. T erms and Definitions
AbbreviationDescription
BIBBoard Information Block
BMCBase Board Management Controller
CMDCommand Code
CPUCentral Processing Unit
CRCCyclic Redundancy Code
ECCError Correction Code
FRUField Replaceable Unit
GPIOGeneral Purpose I/O
2
CIntelligent I/O Controller
I
IBMUIntelligent Board Management Unit
ICMBIntelligent Chassis Management Bus
IPMBIntelligent Peripheral Management Bus
IPMIIntelligent Platform Management Interface
IRQInterr upt Request
KCSKeyboard Controller Style
LSBLeast Significant Byte
MSBMost Significant Byte
NetFnNetwork Function Code
NMINonmaskable Interrupt
OEMOriginal Equipment Manufacturer
PMCPeripheral Management Controller
POSTPower-on Self Test
PSUPower Supply Unit
RAMRandom Acce ss Memory
RTBRear Transition Board
Intel® NetStructure™ MPCHC5525 System Master Processor Board IPMI Reference Driver User’s Guid e 7
Using This G ui de
Table 1. Terms and Definitions
AbbreviationDescription
SDRSensor Data Record
SELSystem Event Log
SMISystem Mana gement Interface
v. 1.0 Rev. 1.1
Platform Management FRU Information Storage
Definition v1.0 Rev. 1.1
Intelligent Chassis Management Bus Bridge Specification
v1.0 Rev. 1.2
PICMG 2.9 R1.0 System Management Specificationwww.picmg.com
Force Computers* PENT/CPCI-735/736 Family
Refere nce Guide
Intel order number 301070
www.intel.com/design/servers/ipmi/spec_old.htm
developer.intel.com
www.intel.com/design/servers/ipmi/spec.htm
www.forcecomputers.com
8Intel
®
NetStructure™ MPCHC5525 Syst em Mas ter Processor Board IPMI Refere nce Dri ver User ’s Gui d e
IBMU Funct i onality
IBMU Functionality2
2.1Introduction
The Intellig ent Board Management Unit (IBMU) equips the Intel® NetStructure™ MPCBL5525
board with Intelligent Platform Manageme nt Interface (IPMI) functionality as designed by Force
Computers*. IPMI is used fo r platform management.
IPMI is completely independent of the software running on the CPU board; it remains operative
even if the board soft ware has crash ed or the boa rd is not power ed. Due to thi s fact, IPMI is used to
log system status informa tio n .
IPMI functionality on the IBMU is based on the Intelligent Platform Management Standards V1.0
Rev. 1.1. In addition, the following optional features applying to the IPMI standard are offered:
• Buses th at allow in t er n al a n d external co m munica ti o n
• Optional IPMI commands
• BMC standby mode
The features of the IBMU allow platform management with devices with and without IPMI
controllers (nonintelligent devices). Both are handled differently in many aspects as explained in
the next sections.
2.1.1Purpo se of IPMI
The purpose of IPMI is to gather information and control dev ices (e.g., fans). The types of
information tha t ca n be gat h er ed ar e:
• Inventory – Board type, manufacturer, se rial number, board revision etc.
• Sensor – Temperature, fan speeds, power supply unit (PSU) voltages.
The system management software can use the gathere d information to monito r system events and
trigger actions, i.e. perform so calle d platform management.
2.1.2Who Gathers the Information?
In a system there are, for examp le, several CPU boards and fans. Each of them has inventory data
and sensors and can provide this inventory data and sensor data. To make communication within
your system easier, your system management software communicates with the CPU boards and
fans via one single IPMI controller on a CPU board. This IPMI controller wil l be the Base Board
Management Controller (BMC) a nd the other IPMI controllers on CPU boards or fans will be
Peripheral Management Controllers (PMs).
The BMC has a central function in gathering inventory and sensor-specific data, whereas the PMs
only provide data . Tha t is why only one BMC is allowed within one system chassis.
Intel® NetStructure™ MPCHC5525 System Master Processor Board IPMI Reference Driver User’s Guid e 9
IBMU Funct i onality
2.1.3Where Is IPMI-Relevant Information Stored?
The following ta ble shows which informati on is stored in which reposi tory of a BMC/PM.
Table 3. Data in Repositories
InformationRepositoryAvailable in
Inventor y info rm atio n on boa rd or de vice: Man uf act ur er I D, pro du ct ID et c.
Messages concerning events, such as abnormal voltages, out-of-range
temperatures etc.
Sensor data records (SDRs) of all sensors on a board. SDRs contain, for
example, thresh old values, conversion factors, and information on
whether events are generated.
SDRs of all sensors available in the entire system. At first, the SDR
repository of the BMC is empty, and the SDRs of all PMs must be copied
into the BMC’s SDR repository (will be explained later).
The IBMU provides approximately 100 Kbytes of flash memory for each repository.
The following figure shows the repositories available in IPMI controllers operated as BMC or PM
after the SDRs of the PMs were copied into the BMC’s SDR repository. Nonintelligent devices
provide none of the repositories.
Figure 1. Repositories of BMC and PMs
Field Replaceable
Unit (FRU)
System E vent Log
(SEL)
Local SDRPM and BMC
SDRBMC
PM and BMC
BMC
10Intel® NetStructure™ MPCHC5525 Syst em Mas ter Processor Board IPMI Refere nce Dri ver User’s Guide
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