Intel® 631xESB/632xESB I/O
Controller Hub for Embedded
Applications
Thermal and Mechanical Design Guidelines
Februa r y 2007
Order Number: 315 263-001
Lega l Li nes and Discl a imers
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5Honeywell PCM45 F TIM Performance as a Function of Attach Pressure ............................25
6Reliabilit y Guidelines.................................................................................................26
7Mechanical Drawing List ...................................................................................... ......28
Revision History
DateRevision Description
February 2007001Initial public release.
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631xESB/632xESB I/O Controller Hub for Embedded Applications
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Introduction—Intel
®
6321ESB ICH
1.0Introduction
As the complexity of computer systems increases, so do the power dissipation
requirements. Care must be taken to ensure that the additional power is properly
dissipated. Typical methods to improve heat dissipation include selective use of
ducting, and/or passive heatsinks.
The goals of this document are to:
• Outline the thermal and mechanical operating limits and specifications for the
Intel® 6321ESB I/O Controller Hub.
• Describe a reference thermal solution that meets the specification of Intel®
6321ESB I/O Controller Hub in Embedded applications.
Properly designed thermal solutions provide adequate cooling to maintain the Intel®
6321ESB I/O Controller Hub component die temperatures at or below thermal
specifications. This is accomplished by providing a low local-ambient temperature,
ensuring adequate local airflow, and minimizing the die to local-ambient thermal
resistance. By maintaining the Intel® 6321ESB I/O Controller Hub component die
temperature at or below the specified limits, a system designer can ensure the proper
functionality, performance, and reliability of the chipset. Operation outside the
functional limits can degrade system performance and may cause permanent changes
in the operating characteristics of the component.
The sim plest and most cost-effective method to improve the inherent system cooling
characteristics is through careful chassis design and placement of fans, vents, and
ducts. When additional cooling is required, component thermal solutions may be
implemented in conjunction with system thermal solutions. The size of the fan or
heatsink can be varied to balance size and space constraints with acoustic noise.
This document addresses thermal design and specifications for the Intel® 6321ESB I/O
Controller Hub component only. For thermal design information on other chipset
components, refer to the respective component datasheet.
1.1Design Flow
To develop a reliable, cost-effective thermal solution, several tools have been provided
to the system designer. Figure 1 illustrates the design process implicit to this document
and the tools appropriate for each step.
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Figure 1.Thermal Design Process
Step 1: Thermal
Simulation
y Thermal Model
y Thermal Model User's Guide
Intel® 6321ESB ICH—Introduction
Step 2: Heatsink Selection
y Thermal Reference
y Mechanical Reference
Step 3: Thermal Validation
y Thermal Testing Software
y Software User's Guide
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Introduction—Intel
®
6321ESB ICH
1.2Definition of Terms
Table 1.Definiti on of Ter ms
TermDefinition
BLT
FCBGA
Intel® 6321ESB I/O Controller Hub
LFM
MCH
Tcase-ma x
Tcase-min
TDP
Ψ
CA
Ψ
CS
Ψ
SA
Bond line thickness. Final settled thickness of the
thermal interface material after installation of
heatsink.
Flip Chip Ball Grid Array. A ball grid array packaging
technology where the die is exposed on the package
substrate.
The chipset component that integrates an Ultra ATA
100 controller, six Serial ATA host controller ports,
one EHCI host controller supporting eight external
USB 2.0 ports, LPC interface controller, flash BIOS
interface controller, PCI/PCI-X interface controller,
PCI Express interface, BMC controller, Azalia / AC'97
digital controller, integrated LAN controller, an ASF
contr oll er an d a ESI fo r comm u nic at ion wit h the MCH.
Linear Feet Per Minute. A measure o f airflow emitted
from a forced convection device, such as an axial fan
or blower.
Memory controller hub. The chipset component that
contains the processor interface, the memory
interface, and the South Bridge Interface.
Maxi mum die temperature allowed. This temp erature
is measured at the geometric center of the top of the
package die.
Minimum die temperature allowed. This temperature
is measured at the geometric center of the top of the
package die.
Thermal Design Power. Thermal solutions should be
designed to dissipate this target power level. TDP is
not the maximum power that the chipset can
dissipate.
Case-to-ambient thermal characterization parameter.
A measure of the thermal solution thermal
performance including the TIM using total package
power. Defined as (TCASE – TLA) / Total P ack age
Power.
Note: Heat source must be specified when using Ψ
calculations.
Case-to-Sink thermal characterization parameter. A
measure of the thermal interface material
performance using total package power. Defined as
(TCASE - TSINK)/ Total Package Power.
Note: Heat source must be specified when using Ψ
calculations.
Sink-to- Ambient thermal c haracterization parameter.
A measure of the heat sink performance using total
package power. Defined as (TSINK - TLA)/Total
Package Power.
Note: Heat source must be specified when using Ψ
calculations.
1.3Reference Documents
The reader of this specification should also be familiar with material and concepts
presented in the following documents:
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Intel® 631xESB/632xESB I/O Controller Hub for Embedded Applications
Intel® 6700PXH 64-bit PCI H ub/6702PX H 64-bi t PCI Hub (PXH/PXHV) Thermal Mechanical Design Guidelines
Intel® 6700PXH 64-bit PCI Hub (PXH) Datasheet
BGA/OLGA Assembly Development Guide
Various system thermal design suggestionshttp://www.formfactors.org
1.Unless otherwise specified, these documents are available through your Intel field sales
representative. Some documents may not be available at this time.
1. Primary datum -C- and seating plan are defined by the spherical crowns of the solder balls (shown before motherboard attach)
2. All dimensions and tolerances conform to AN SI Y14.5M- 1994
3. BGA has a pr e-SMT height of 0.5mm and post-SMT height of 0.41-0.46mm
4. Shown before motherboard atta ch; FCBGA ha s a convex (dome shaped) orientation before reflow and is expect ed to have a slightly concave
(bowl shaped) orientation after reflow
See note 3
Seating Plane
0.20 –C
See note 1.
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Intel® 631xESB/632xESB I/O Controller Hub for Embedded Applications
2.All dimensions and tolerances conform to ANSI Y14.5M-1994.
3.Package Mechanical Requirements
The Intel® 6321ESB I/O Controller Hub package has an exposed bare die which is
capable of sustaining a maximum static normal load of 15-lbf. The package is NOT
capable of sustaining a dynamic or static compressive load applied to any edge of the
bare die. These mechanical load limits must not be exceeded during heatsink
installation, mechanical stress testing, standard shipping conditions and/or any other
use condition.
Notes:
1.The heatsink attach solutions must not include continuous stress onto the chipset package with the
exception of a uniform load to maintain the heatsink-to-package thermal interface.
2.These specifications apply to uniform compressive loading in a direction perpendicular to the bare die/
IHS top surface.
3.These specifications are based on limited testing for design characterization. Loading limits are for the
package only.
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631xESB/632xESB I/O Controller Hub for Embedded Applications
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