Intel® 631xESB/632xESB I/O
Controller Hub for Embedded
Applications
Thermal and Mechanical Design Guidelines
Februa r y 2007
Order Number: 315 263-001
Lega l Li nes and Discl a imers
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5Honeywell PCM45 F TIM Performance as a Function of Attach Pressure ............................25
6Reliabilit y Guidelines.................................................................................................26
7Mechanical Drawing List ...................................................................................... ......28
Revision History
DateRevision Description
February 2007001Initial public release.
®
631xESB/632xESB I/O Controller Hub for Embedded Applications
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Introduction—Intel
®
6321ESB ICH
1.0Introduction
As the complexity of computer systems increases, so do the power dissipation
requirements. Care must be taken to ensure that the additional power is properly
dissipated. Typical methods to improve heat dissipation include selective use of
ducting, and/or passive heatsinks.
The goals of this document are to:
• Outline the thermal and mechanical operating limits and specifications for the
Intel® 6321ESB I/O Controller Hub.
• Describe a reference thermal solution that meets the specification of Intel®
6321ESB I/O Controller Hub in Embedded applications.
Properly designed thermal solutions provide adequate cooling to maintain the Intel®
6321ESB I/O Controller Hub component die temperatures at or below thermal
specifications. This is accomplished by providing a low local-ambient temperature,
ensuring adequate local airflow, and minimizing the die to local-ambient thermal
resistance. By maintaining the Intel® 6321ESB I/O Controller Hub component die
temperature at or below the specified limits, a system designer can ensure the proper
functionality, performance, and reliability of the chipset. Operation outside the
functional limits can degrade system performance and may cause permanent changes
in the operating characteristics of the component.
The sim plest and most cost-effective method to improve the inherent system cooling
characteristics is through careful chassis design and placement of fans, vents, and
ducts. When additional cooling is required, component thermal solutions may be
implemented in conjunction with system thermal solutions. The size of the fan or
heatsink can be varied to balance size and space constraints with acoustic noise.
This document addresses thermal design and specifications for the Intel® 6321ESB I/O
Controller Hub component only. For thermal design information on other chipset
components, refer to the respective component datasheet.
1.1Design Flow
To develop a reliable, cost-effective thermal solution, several tools have been provided
to the system designer. Figure 1 illustrates the design process implicit to this document
and the tools appropriate for each step.
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Figure 1.Thermal Design Process
Step 1: Thermal
Simulation
y Thermal Model
y Thermal Model User's Guide
Intel® 6321ESB ICH—Introduction
Step 2: Heatsink Selection
y Thermal Reference
y Mechanical Reference
Step 3: Thermal Validation
y Thermal Testing Software
y Software User's Guide
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Introduction—Intel
®
6321ESB ICH
1.2Definition of Terms
Table 1.Definiti on of Ter ms
TermDefinition
BLT
FCBGA
Intel® 6321ESB I/O Controller Hub
LFM
MCH
Tcase-ma x
Tcase-min
TDP
Ψ
CA
Ψ
CS
Ψ
SA
Bond line thickness. Final settled thickness of the
thermal interface material after installation of
heatsink.
Flip Chip Ball Grid Array. A ball grid array packaging
technology where the die is exposed on the package
substrate.
The chipset component that integrates an Ultra ATA
100 controller, six Serial ATA host controller ports,
one EHCI host controller supporting eight external
USB 2.0 ports, LPC interface controller, flash BIOS
interface controller, PCI/PCI-X interface controller,
PCI Express interface, BMC controller, Azalia / AC'97
digital controller, integrated LAN controller, an ASF
contr oll er an d a ESI fo r comm u nic at ion wit h the MCH.
Linear Feet Per Minute. A measure o f airflow emitted
from a forced convection device, such as an axial fan
or blower.
Memory controller hub. The chipset component that
contains the processor interface, the memory
interface, and the South Bridge Interface.
Maxi mum die temperature allowed. This temp erature
is measured at the geometric center of the top of the
package die.
Minimum die temperature allowed. This temperature
is measured at the geometric center of the top of the
package die.
Thermal Design Power. Thermal solutions should be
designed to dissipate this target power level. TDP is
not the maximum power that the chipset can
dissipate.
Case-to-ambient thermal characterization parameter.
A measure of the thermal solution thermal
performance including the TIM using total package
power. Defined as (TCASE – TLA) / Total P ack age
Power.
Note: Heat source must be specified when using Ψ
calculations.
Case-to-Sink thermal characterization parameter. A
measure of the thermal interface material
performance using total package power. Defined as
(TCASE - TSINK)/ Total Package Power.
Note: Heat source must be specified when using Ψ
calculations.
Sink-to- Ambient thermal c haracterization parameter.
A measure of the heat sink performance using total
package power. Defined as (TSINK - TLA)/Total
Package Power.
Note: Heat source must be specified when using Ψ
calculations.
1.3Reference Documents
The reader of this specification should also be familiar with material and concepts
presented in the following documents:
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Intel® 6700PXH 64-bit PCI H ub/6702PX H 64-bi t PCI Hub (PXH/PXHV) Thermal Mechanical Design Guidelines
Intel® 6700PXH 64-bit PCI Hub (PXH) Datasheet
BGA/OLGA Assembly Development Guide
Various system thermal design suggestionshttp://www.formfactors.org
1.Unless otherwise specified, these documents are available through your Intel field sales
representative. Some documents may not be available at this time.
1. Primary datum -C- and seating plan are defined by the spherical crowns of the solder balls (shown before motherboard attach)
2. All dimensions and tolerances conform to AN SI Y14.5M- 1994
3. BGA has a pr e-SMT height of 0.5mm and post-SMT height of 0.41-0.46mm
4. Shown before motherboard atta ch; FCBGA ha s a convex (dome shaped) orientation before reflow and is expect ed to have a slightly concave
(bowl shaped) orientation after reflow
See note 3
Seating Plane
0.20 –C
See note 1.
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2.All dimensions and tolerances conform to ANSI Y14.5M-1994.
3.Package Mechanical Requirements
The Intel® 6321ESB I/O Controller Hub package has an exposed bare die which is
capable of sustaining a maximum static normal load of 15-lbf. The package is NOT
capable of sustaining a dynamic or static compressive load applied to any edge of the
bare die. These mechanical load limits must not be exceeded during heatsink
installation, mechanical stress testing, standard shipping conditions and/or any other
use condition.
Notes:
1.The heatsink attach solutions must not include continuous stress onto the chipset package with the
exception of a uniform load to maintain the heatsink-to-package thermal interface.
2.These specifications apply to uniform compressive loading in a direction perpendicular to the bare die/
IHS top surface.
3.These specifications are based on limited testing for design characterization. Loading limits are for the
package only.
®
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Thermal Specifications—Intel
®
6321ESB ICH
3.0Thermal Specifications
3.1Thermal Design Power (TDP)
Analysis indicates that real applications are unlikely to cause the Intel® 6321ESB I/O
Controller Hub component to consume maximum power dissipation for sustained time
periods. Therefore, in order to arrive at a more realistic power level for thermal design
purposes , I ntel cha racterizes power cons ump tio n ba se d on k now n pl at for m ben ch ma rk
applications. The resulting power consumption is referred to as the Thermal Design
Power (TDP). TDP is the target power level that the thermal solutions should be
designed to. TDP is not the maximum power that the chipset can dissipate.
For TDP specifications, see Table 3. Flip chip ball grid array (FC-BGA) packages have
poor heat transfer capability into the board and have minimal thermal capability
without a ther mal s oluti on. I ntel r eco mmends that s ystem d esig ners p lan f or a he atsi nk
when using the Intel® 6321ESB I/O Controller Hub component.
3.2Die Case Temperature
To ensure proper operation and reliability of the Intel® 6321ESB I/O Controller Hub
component, the die temperatures must be at or between the maximum/minimum
operating temperature ranges as specified in Table 3. Sy st em and / or com p on en t leve l
thermal solutions are required to maintain these temperature specifications. Refer to
Chapter 6.0 for guidelines on accurately measuring package die temperatures.
Note:These specifications are based on silicon characterization; however, they may be
updated as further data becomes available.
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4.0Thermal Simulation
Intel provides thermal simulation models of the Intel® 6321ESB I/O Controller Hub
component and associated user's guides to aid system designers in simulating,
analyzing, and optimizing their thermal solutions in an integrated, system-level
environment. The models are for use with the commercially available Computational
Fluid Dynamics (CFD)-based thermal analysis tool Flotherm* (version 5.1 or higher) by
Flomerics, Inc*. These models are also available in IcePak* format. Contact your Intel
field sales representative to order the thermal models and user's guides.
Intel® 6321ESB ICH—Thermal Simulation
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Thermal Solution Requirements—Intel
®
6321ESB ICH
5.0Thermal Solution Requirements
5.1Characterizing the Thermal Solution Requirement
The idea of a “thermal characterization parameter” Ψ (the Greek letter psi), is a
convenient way to characterize the performance needed for the thermal solution and to
compare thermal solutions in identical situations (i.e., heating source, local ambient
conditions, etc.). The thermal characterization parameter is calculated using total
package power, whereas actual thermal resistance, θ (theta), is calculated using actual
power dissipated between two points. Measuring actual power dissipated into the heat
sink is difficult, since some of the power is dissipated via heat transfer into the package
and board .
The case-to-local ambient thermal characterization parameter (Ψ
measure of the thermal performance of the overall thermal solution. It is defined by
Equation 1 and measured in units of °C/W.
Equation 1. Case-to-Local Ambient Therm al Characte rization Para meter (Ψ
T
CASE
Ψ
CA
The case-to-local ambient thermal characterization parameter, Ψ
Ψ
, the thermal interface material (TIM) thermal characterization parameter, and of
CS
Ψ
, the sink-to-local ambient thermal characterization parameter:
SA
Equation 2. Case-to-Local Ambient Therm al Characte rization Para meter (Ψ
Ψ
CA
-------------------------
=
Ψ
CS
TDP
Ψ
+=
TLA–
SA
) is used as a
CA
, is comprised of
CA
CA
CA
)
)
is strongly dependent on the thermal conductivity and thickness of the TIM
Ψ
CS
between the heat sink and device package.
Ψ
is a measure of the thermal characterization parameter from the bottom of the
SA
heat sink to the local ambient air. Ψ
conductivity, and geometry. It is also strongly dependent on the air velocity through
the fins of the heat sink. Figure 5 illustrates the combination of the different thermal
characterization parameters.
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is dependent on the heat sink material, thermal
SA
13
Intel® 6321ESB ICH—Thermal Solution Requirements
S
T
C
A
SA
TIMDevice
T
S
T
C
A
SA
Figure 5.Processor Thermal Characterizatio n Pa ram ete r Relati o nshi ps
T
T
Ψ
HEATSINK
Ψ
Ψ
Ψ
CA
CA
T
Example 1. Calculating the Required Thermal Performance
The cooling performance, Ψ
previously described. The process to determine the required thermal performance to
cool the device includes:
1. Define a target component temperature T
2. Define a target local ambient temperature, T
3. Use Equation 1 and Equation 2 to determine the required thermal performance
needed to cool the device.
The following provides an example of how you might determine the appropriate
performance targets.
Assume:
• TDP = 12.4 W and T
• Local processor ambient temperature, T
Then the following could be calculated using Equation 1 for the given chipset
configuration:
is defined using the thermal characterization parameter
CA,
and corresponding TDP.
CASE
LA
= 105° C
CASE
= 65° C.
LA
Ψ
Ψ
CS
CS
.
T
CASE
-------------------------
Ψ
To determine the required heat sink performance, a heat sink solution provider would
need to determine Ψ
configuration. If the heat sink solution were designed to work with a TIM material
performing at Ψ
the heat sink is:
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===
CA
performance for the selected TIM and mechanical load
CS
≤ 0.35 °C/W, solvin g fro m Equation 2, the performance needed from
CS
TDP
TLA–
10565–
---------------
3.23°
12.4
C
--- -
W
Thermal Solution Requirements—Intel
Ψ
SA
If the local ambient temperature is relaxed to 45° C, the same calculation can be
carried out to determine the new case-to-ambient thermal resistance:
®
6321ESB ICH
C
===
Ψ
CA
Ψ
–3.230.35–2.88°
CS
--- -
W
T
-----------------
Ψ
It is evident from the above calculations that a reduction in the local ambient
temperature has a significant effect on the case-to-ambient thermal resistance
requir em ent. Thi s effe ct ca n con tri bute to a mor e reas ona ble t her mal so lut ion in clu din g
reduced cost, heat sink size, heat sink weight, and a lower system airflow rate.
Table 4 summarizes the thermal budget required to adequately cool the Intel
6321ESB I/O Controller Hub in one configuration using a TDP of 12.4 W. Further
calculations would need to be performed for different TDPs. Since the results are based
on air data at sea level, a correction factor would be required to estimate the thermal
performance at other altitudes.
DeviceΨCA (º C/W) at TLA = 45º CΨCA (º C/W) at TLA = 65º C
®
6321ESB I/O Controller
Intel
Hub @ 12.4 W
===
CA
C
TDP
TLA–
10545–
---------------
12.4
4.843.23
4.84°
C
----
W
®
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Intel® 6321ESB ICH—Thermal Metrology
6.0Thermal Metrology
The system designer must make temperature measurements to accurately determine
the thermal performance of the system. Intel has established guidelines for proper
techniques to measure the Intel® 6321ESB I/O Controller Hub die temperatures.
Section 6.1 provides guidelines on how to accurately measure the Intel
die temperatures. The flowchart in Figure 6 offers useful guidelines for thermal
performance and evaluation.
6.1Die Case Temperature Measurements
To ensure functionality and reliability, the Tcase of the Intel® 6321ESB ICH must be
maintained at or between the maximum/minimum operating range of the temperature
specification as noted in Table 3. The surface temperature at the geometric center of
the die corresponds to Tcase. Measuring Tcase requires special care to ensure an
accurate temperature measurement.
®
6321ESB ICH
Temperature differences between the temperature of a surface and the surrounding
local ambient air can introduce errors in the measurements. The measurement errors
could be due to a poor thermal contact between the thermocouple junction and the
surface of the package , heat loss by radiation and/or convection, conduction through
thermocouple leads, and/or contact between the thermocouple cement and the
heatsink base. For maximize measurement accuracy, only the 0° thermocouple attach
approach is recommended.
6.1.1Zero Deg r ee Angle Attach M e t ho d ol og y
1. Mill a 3.3 m m (0.13 i n.) d iam eter a nd 1.5 m m (0 .06 in. ) dee p hol e cen ter ed on t he
botto m of th e he at s i nk ba se .
2. Mill a 1.3 mm (0.05 in.) wide and 0.5 mm (0.02 in.) deep slot from the centered
hole to one edge of the heatsink. The slot should be parallel to the heatsink fins
(see Figure 7).
3. Attach thermal interface material (TIM) to the bottom of the heatsink base.
4. Cut out portions of the TIM to make room for the thermocouple wire and bead. The
cutouts should match the slot and hole milled into the heatsink base.
5. Attach a 36 gauge or smaller calibrated K-type thermocouple bead or junction to
the center of the top surface of the die using a high thermal conductivity cement.
During this step, ensure no contact is present between the thermocouple cement
and the heatsink base because any contact will affect the thermocouple reading. It
is critical that the thermocouple bead makes contact with the die (see Figure 8).
6. Attach heatsink assembly to the MCH and route thermocouple wires out through
the milled slot.
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631xESB/632xESB I/O Controller Hub for Embedded Applications
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Reference Thermal Solution—Intel
®
6321ESB ICH
7.0Reference Thermal Solution
Intel has developed one reference thermal solution to meet the cooling needs of the
Intel® 6321ESB I/O Controller Hub component under operating environments and
specifications defined in this document. This chapter describes the overall requirements
for the Torsional Clip Heatsink reference thermal solution including critical-to-function
dimensions, operating environment, and validation criteria. Other chipset components
may or may not need attached thermal solutions, depending on your specific system
local-ambient operating conditions.
7.1Operating Environment
The Intel® 6321ESB ICH reference thermal solution was designed assuming a
maximum local- ambient temperature of 65°C. The minimum recommended airflow
velocity through the cross section of the heatsink fins is 150 linear feet per minute
(LFM). The approaching airflow temperature is assumed to be equal to the localambient temperature. The thermal designer must carefully select the location to
measure airflow to obtain an accurate estimate. These local-ambient conditions are
based on a 55°C external-ambient temperature at sea level. (External-ambient refers
to the environment external to the system.)
7.2Heatsink Performance
Figure 9 depicts the measured thermal performance of the reference thermal solution
versus approach air velocity. Since this data was measured at sea level, a correction
factor would be required to estimate thermal performance at other altitudes.
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Intel® 6321ESB ICH—Reference Thermal Solution
Figure 9.Torsional Clip Heatsink Measured Thermal Performance Versus Approach
Velocity and Target at 65C Local-Ambient
8.000
7.000
Thermal Target
6.000
5.000
4.000
3.000
2.000
Psi-ca (mean plus 2.3 sigm a) [C/W]
1.000
0.000
050100150200250300350400
LFM through fin area
Simulation results with
EOLife TI M performance
7.3Mechanical Design Envelope
While each design may have unique mechanical volume and height restrictions or
implement ati on requi re ment s, t he heig ht , wi dth, an d de pt h co nst ra i nts typ ical l y pla ce d
on the Intel
When using heatsinks that extend beyond the Intel® 6321ESB I/O Controller Hub
reference heatsink envelope shown in Figure 10, any motherboard components placed
between the heatsink and motherboard cannot exceed 2.46 mm (0.10 in.) in height.
®
6321ESB ICH thermal solution are shown in Figure 10.
®
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Reference Thermal Solution—Intel
®
6321ESB ICH
Figure 10.Torsional Clip Heatsink Volumetric Envelope for the Intel® 6321ESB I/O
Controller Hub
ESB2
ESB2
ESB2
Passive
Passive
Passive
Passive
Passive
Passive
Heatsink
Heatsink
Heatsink
Heatsink
Heatsink
Heatsink
Die + TIM
Die + TIM
Die + TIM
Die + TIM
Die + TIM
Die + TIM
FCBGA + Solder Balls
FCBGA + Solder Balls
FCBGA + Solder Balls
FCBGA + Solder Balls
FCBGA + Solder Balls
FCBGA + Solder Balls
Motherboard
Motherboard
Motherboard
Motherboard
Motherboard
Motherboard
42.30 mm
42.30 mm
42.30 mm
42.30 mm
42.30 mm
42.30 mm.
42.30 mm.
42.30 mm.
42.30 mm.
42.30 mm.
42.30 mm.
TNB
TNB
TNB
TNB
TNB
TNB
Heatsink
Heatsink
Heatsink
Heatsink
Heatsink
Heatsink
21.33mm
21.33mm
21.33mm
21.33mm
21.33mm
21.33mm
21.33mm
21.33mm21.33mm
21.33mm
21.33mm
21.33mm
21.33 mm
21.33 mm
21.33 mm
21.33 mm
21.33 mm
33.30mm.
33.30mm.
33.30mm.
33.30mm.
33.30mm.
33.30mm.
2.61 mm
2.61 mm
2.61 mm
2.61 mm
2.61 mm
4.30mm
4.30mm
4.30mm
4.30mm
4.30mm
4.30mm
4.30mm
4.30mm
4.30mm
4.30mm
4.30mm
4.30mm.
4.30mm.
4.30mm.
4.30mm.
4.30mm.
4.30mm.
.
.
.
.
.
.m
m
m
m
m
ESB2
ESB2
ESB2
Passive
Passive
Passive
Passive
Passive
Passive
Heatsink
Heatsink
Heatsink
Heatsink
Heatsink
Heatsink
m0m
0m
0m
0m
0m
0m
42.3
42.3
42.3
42.3
42.3
42.3
42.30 mm
42.30 mm
42.30 mm
42.30 mm
42.30 mm
7.4Board-Level Components Keepout Dimensions
The location of holes pattern and keepout zones for the reference thermal solution are
shown in Figure 11. This reference thermal solution has the same mounting hole
pattern as that of the Intel® E7500/E7501/E7505 chipset.
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The reference thermal solution for the Intel® 6321ESB ICH component is a passive
heatsink with thermal interface. It is attached using a clip with each end hooked
through an anchor soldered to the board. Figure 12 shows the reference thermal
solut i on as se m bly an d as so c i ate d co mp one nt s . Th e t or s io na l c l ip a nd th e clip re t en ti on
anchor are the same as the one used on the Intel® E7500/E7501/E7505 and 3100
chipset reference thermal solutions.
Full mechanical drawings of the thermal solution assembly and the heatsink clip are
provided in Appendix B, “Mechanic al Drawings ”. Appendix A, “Thermal Solution
Componen t Supp lier s” contains vendor information for each thermal solution
component.
®
631xESB/632xESB I/O Controller Hub for Embedded Applications
Since this solution is based on a unidirectional heatsink, mean airflow direction must be
aligned with the direction of the heatsink fins.
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Figure 12.Torsional Clip Heatsink Assembly
Intel® 6321ESB ICH—Reference Thermal Solution
7.5.2Mechanical Interface Material
There is no mechanical interface material associated with this reference solution.
7.5.3Ther m a l Int erface M aterial
A Thermal Inte rface Materi al (TIM) prov ides imp roved con ductivi ty between th e die and
heatsink. The reference thermal solution uses Honeywell* PCM45F, 0.254 mm (0.010
in.) thick, 15 mm x 15 mm (0.59 in. x 0.59 in.) square.
Note:Unflowed or "dry" Honewell PCM-45F has a material thickness of 0.010 inch. The
flowed or "wet" Honeywell PCM-45F has a material thickness of ~0.003 inch after it
reaches its phase change temperature.
7.5.3.1Effect of Pressure on TIM Performance
As mechanical pressure increases on the TIM, the thermal resistance of the TIM
decreases. This phenomenon is due to the decrease of the bond line thickness (BLT).
BLT is the final settled thickness of the thermal interface material after installation of
heatsink. The effect of pressure on the thermal resistance of the Honeywell PCM45 F
TIM is shown in Table 5.
Intel provides both End of Line and End of Life TIM thermal resistance values of
Honeywell PCM45F. End of Line and End of Life TIM thermal resistance values are
obtained through measurement on a Test Vehicle similar to the Intel® 631xESB/
632xESB I/O's physical attributes using an extruded aluminum heatsink. The End of
Line value represents the TIM performance post heatsink assembly while the End of
®
631xESB/632xESB I/O Controller Hub for Embedded Applications
Intel
TMDGFebruary 2007
24
Reference Thermal Solution—Intel
®
6321ESB ICH
Life value is the predicted TIM performance when the product and TIM reaches the end
of its life. The heatsink clip provides enough pressure for the TIM to achieve End of Line
thermal resistance of 0.345 °C x in
2
in
/W.
2
/W and End of Life thermal resistance of 0.459°C
Table 5.Honeywell PCM45 F TIM Performance as a Function of Attach Pressure
Pressure on IHS(psi)
Thermal Resistance (°C × in
End of Line End of LifeEnd of Line End of Life
2.180.3910.551
4.350.3450.459
Note: All measured at 50ºC.
2
)/W
7.5.4Heatsink Clip
The reference solution uses a wire clip with hooked ends. The hooks attach to wire
anchors to fasten the clip to the board. See Appendix B, “Mechanical Drawings” for a
mechanical drawing of the clip.
7.5.5Clip Retention Anchors
For Intel® 6321ESB I/O Controller Hub-based platforms that have very limited board
space, a clip retention anchor has been developed to minimize the impact of clip
retention on the board. It is based on a standard three-pin jumper and is soldered to
the board like any common through-hole header. A new anchor design is available with
45° bent leads to increase the anchor attach reliability over time. See Appendix A,
“Thermal Solution Component Suppliers” for the part number and supplier information.
Februa ry 2007TMDG
Intel® 631xESB/632xESB I/O Controller Hub for Embedded Applications
25
8.0Reliability Guidelines
Each motherboard, heatsink and attach combination may vary the mechanical loading
of the component. Based on the end user environment, the user should define the
appropriate reliability test criteria and carefully evaluate the completed assembly prior
to use in high volume. Some general recommendations are shown in Table 6.
Table 6.Reliability Guidelines
Test (1)RequirementPass/Fail Criteria (2)
Mechanical Shock50 g, board level, 11 msec, 3 shocks/axisVisual Check and Electrical Functional Test