Intel® Core™ 2 Duo Mobile
Processors on 45-nm process for
Embedded Applications
Thermal Design Guide
June 2008
Order Number: 320028-001
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Core™2 Duo processor..........................................10
June 2008TDG
Order Number: 320028-0014
Intel® Core™ 2 Duo Mobile Processors on 45-nm process for Embedded Applications
Revision History
DateRevisionDescription
June 20081.0First Public release.
Core™ 2 Duo Mobile Processors—Tables
Intel® Core™ 2 Duo Mobile Processors on 45-nm process-Thermal Design Guide
TDGJune 2008
5Order Number: 320028-001
Introduction—Core™ 2 Duo Mobile Processors
1.0Introduction
The power dissipation of electronic components has risen along with the increase in complexity of
computer systems. T o ensure quality, reliability, and performance goals are met ov er the product’s life
cycle, the heat generated by the device must be properly dissipated. Typical methods to improve heat
dissipation include selective use of airflow ducting, and/or the use of heatsinks.
The goals of this document are to:
• Identify the thermal and mechanical specification for the device.
• Describe a reference thermal solution that meets the specifications.
A properly designed thermal solution will adequately cool the device at or below the thermal
specification. This is accomplished by providing a suitable local-ambient temperature, ensuring
adequate local airflow, and minimizing the die to local-ambient thermal resistance. Operation outside
the functional limits can degrade system performance and may cause permanent changes in the
operating characteristics of the component.
This document describes thermal design guidelines for the Intel® Core™ 2 Duo Mobile Processors on
45-nm process for Embedded Applications in the micro Flip Chip Pin Grid Array (micro-FCPGA)
package and the micro Flip Chip Ball Grid Array (micro-FCBGA) package. The information provided in
this document is for reference only and additional validation must be performed prior to implementing
the designs into final production. The intent of this document is to assist each original equipment
manufacturer (OEM) with the development of thermal solutions for their individual designs. The final
heatsink solution, including the heatsink, attachment method, and thermal interface material (TIM)
must comply with the mechanical design, environmental, and reliability requirements delineated in
the processor datasheet. It is the responsibility of each OEM to validate the thermal solution design
with their specific applications.
This document addresses thermal and mechanical design specifications for the Intel Core 2 Duo
processor only. For thermal design information on other Intel components, refer to the respective
component datasheets.
1.1Design Flow
Several tools are available from Intel to assist with the development of a reliable, cost-effective
thermal solution. Figure 1 illustrates a typical thermal solution design process with available tools
noted. The tools are available through your local Intel field sales representative.
June 2008TDG
Order Number: 320028-0016
Intel® Core™ 2 Duo Mobile Processors on 45-nm process for Embedded Applications
Figure 1.Thermal Design Process
Step 1: Thermal Simulation
Core™ 2 Duo Mobile Processors—Introduction
• P ackage Level Thermal Models
• Therm al Model User’s Guide
Step 2: Heatsink Design
and Selection
• Reference Heatsinks
• Ref erence Mounting Hardware
• Vendor Contacts
1.2Definition of Terms
Table 1.Definition of Terms (Sheet 1 of 2)
TermDefinition
FCPGA
FCBGA
T
JUNCTION-MAX
TDP
T
LA
Ψ
JA
Ψ
TIM
Ψ
SA
°CDegrees in Celsius
CFMVolumetric airflow rate in cubic feet per minute
in.Inches
LFMAirflow velocity in linear feet per minute
PCBPrinted circuit board
T
SINK
Flip Chip Pin Grid Array. A pin grid array packaging tech nology where the die is
exposed on the package substrate.
Flip Chip Ball Grid Array. A ball grid array packaging technology where the die is
exposed on the package substrate.
Maximum allowed component (junction) temperature. Also referred to as T
Thermal Design Power. Thermal solutions should be designed to dissipate this
target power level.
Local ambient temperature. This is the temperature measured inside the chassis,
approximately 1 inch upstream of a component heatsink. Also referred to as T
Junction-to-ambient thermal characterization parameter. A measure of heatsink
thermal performance using the total package power. Defined as (T
Total Package Power
Thermal interface material thermal characterization parameter. A measure of
thermal interface material performance using total package power. Defined as (T
– T
CASE
Sink-to-ambient thermal characterization parameter. A measure of heatsink
thermal performance using total package power. Defined as (T
Total Package Power.
Heatsink temperature measured on the underside of the heatsink base.
)/ Total Package Power. Also referred to as Ψ
JUNCTION
Step 3: Thermal Validation
• Thermal Testing Software
• Thermal Test Vehicle
• User Guides
J-MAX
.
A
– T
– TLA) /
JUNCTION
)/
JUNCTION
JS.
SINK
Intel® Core™ 2 Duo Mobile Processors on 45-nm process-Thermal Design Guide
TDGJune 2008
7Order Number: 320028-001
Introduction—Core™ 2 Duo Mobile Processors
Table 1.Definition of Terms (Sheet 2 of 2)
TermDefinition
TIM
U
WWatt
Thermal Interface Material – the thermally conductive compound between the
heatsink and die. This material fills air gaps and voids, and enhances spreading of
the heat from the die to the heatsink.
A unit of measure used to define server rack spacing height. 1U is equal to 1.75
inches, 2U equals 3.50 inches, etc.
1.3Reference Documents
The reader of this specification should also be familiar with material and concepts presented in the
following documents:
• Intel® Core™2 Duo Processor for Intel® Centrino® Duo Mobile Technology Datasheet
Documents are located at developer.intel.com. Contact your Intel field sales representative for
additional information.
1.4Thermal Design Tool Availability
Intel provides thermal simulation models of the device and a thermal model user’s guide to aid
system designers in simulating, analyzing, and optimizing thermal solutions in an integrated, systemlevel environment. The models are for use with commercially available Computational Fluid Dynamics
(CFD)-based thermal analysis tools including Flotherm* (version 7.1 or higher) by Flomerics, Inc. or
Icepak* by Fluent, Inc. Contact your Intel representative to order the thermal models and associated
user’s guides.
June 2008TDG
Order Number: 320028-0018
Intel® Core™ 2 Duo Mobile Processors on 45-nm process for Embedded Applications
Core™ 2 Duo Mobile Processors—Package Information
2.0Package Information
The Intel® Core™2 Duo Processor (XE and SV) is available in 478-pin Micro-FCPGA packages as well
as 479-ball Micro-FCBGA packages. The Intel® Core™2 Duo Processor SFF processor (LV and ULV) is
available in 956-ball Micro-FCBGA packages. The package mechanical dimensions can be found in the
product’s datasheet.
The Micro-FCBGA package incorporates land-side capacitors. The land-side capacitors are electrically
conductive. Care should be taken to prevent the capacitors from contacting any other electrically
conductive materials. Doing so may short the capacitors and possibly damage the device or render it
inactive.
The processor package has mechanical load limits that are specified in the processor datasheet. These
load limits should not be exceeded during heatsink installation, removal, mechanical stress testing, or
standard shipping conditions. The heatsink mass can also add additional dynamic compressive load to
the package during a mechanical shock event. Amplification factors due to the impact force during
shock must be taken into account in dynamic load calculations. The total combination of dynamic and
static compressive load should not then exceed the processor datasheet compressive dynamic load
specification during a vertical shock. It is not recommended to use any portion of the processor
substrate as a mechanical reference or load bearing surface in either static or dynamic compressive
load conditions.
Intel® Core™ 2 Duo Mobile Processors on 45-nm process-Thermal Design Guide
TDGJune 2008
9Order Number: 320028-001
Thermal Specifications—Core™ 2 Duo Mobile Processors
3.0Thermal Specifications
3.1Thermal Design Power
The Thermal Design Power (TDP) specification is listed in Table 2. Heat transfer through the microFCBGA, micro-FCPGA package and socket via the base board is negligible. The cooling capacity
without a thermal solution is also minimal, so Intel requires the use of a heatsink for all usage
conditions.
3.2Maximum Allowed Component Temperature
The device must maintain a maximum temperature at or below the value specified in Table 2. The
thermal solution is required to meet the temperatures specification while dissipating the Thermal
Design Power.
Table 2.Thermal Specifications for the Intel® Core™2 Duo processor
CPUProcessor SKU#TDP (W)
Intel® Core™ 2 Duo
Mobile Processors
on 45-nm process
=
Standard Voltage (Core 2 Duo-6M, Celeron-2M) 35
Ultra Low Voltage (Core 2 Duo -2M, Celeron)10
T
J-MAX
(°C)
1050Low Voltage (Core 2 Duo -3M)17
T
J-MIN
(°C)
June 2008TDG
Order Number: 320028-00110
Intel® Core™ 2 Duo Mobile Processors on 45-nm process for Embedded Applications
Core™ 2 Duo Mobile Processors—Mechanical Specifications
4.0Mechanical Specifications
4.1Package Mechanical Requirements
4.1.1Die Pressure/Load Upper Limit
From a die mechanical integrity standpoint, the maximum allowable normal die load is the lesser of
15 lbs or 100 psi. Considering the 15 lbs load limit and the nominal die area of 1.45 cm
this equates to a die pressure of 66.7 psi (below 100 psi specification). Considering the maximum
pressure specification, the die load at this pressure would be 22.4 lbs, exceeding the 15 lbs. load
limit. Thus, the heatsink clamping mechanism (spring loaded fasteners, spring clips, etc.) should not
exceed 15 lbs.
2
(0.22 in.2),
4.1.2Die Pressure/Load Lower Limit
From a TIM performance standpoint, a minimum die pressure is required to ensure consistent and
minimal TIM thermal resistance. This lower value is a function of the TIM used. F or the phase-change
TIM specified for thermal solutions mentioned later, die pressure should not be lower than
approximately 138 kPa (20 psi). This will keep TIM resistance better than approximately
0.30 oC-cm2/W.
4.2Package Keep Out Zones Requirements
The heatsink must not touch the package in the areas shown in Figure 2 and Figure 4. The heatsink
should include a means to prevent the heatsink from forming an electrical short with the capacitors
placed on the top side of the package. The reference thermal solutions include z-stops machined into
the base of the heatsink. The z-stops prevent the heatsink from inadvertently tilting when installed.
Other methods are suitable including using electrically insulated gasket material at the base of the
heatsink.
4.3Board Level Keep Out Zone Requirements
A general description of the keep-out zones and mounting hole pattern for the reference thermal
solutions are shown in Figure 2 and Figure 3. Detailed drawings for the PCB keep out zones are in
Appendix B.
Components placed between the underside of the heatsink and motherboard cannot exceed 4.75 mm
in height when using heatsinks that extend beyond the socket envelope shown in Figure 2 for the
micro-FCPGA package.
Intel® Core™ 2 Duo Mobile Processors on 45-nm process-Thermal Design Guide
TDGJune 2008
11Order Number: 320028-001
Mechanical Specifications—Core™ 2 Duo Mobile Processors
Figure 2.Primary Side Keep Out Zone Requirements— Micro-FCPGA
Notes:
1.Dimension in millimeters [inches].
June 2008TDG
Order Number: 320028-00112
Intel® Core™ 2 Duo Mobile Processors on 45-nm process for Embedded Applications
Core™ 2 Duo Mobile Processors—Mechanical Specifications
Figure 3.Primary Side Keep Out Zone Requirements— Micro-FCBGA
Notes:
1.Dimension in millimeters [inches].
Intel® Core™ 2 Duo Mobile Processors on 45-nm process-Thermal Design Guide
TDGJune 2008
13Order Number: 320028-001
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