Intel 317443-001US User Manual

Intel® Core

2 Duo processor with

the Mobile Intel Chipset

Development Kit User’s Manual

May 2007

945GME Express

Order Number: 317443-001US

Legal Lines and Disclaimers

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Intel® CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset Manual May 2007 2 Order Number: 317443-001US

Contents—Intel

945GME Express Chipset

Contents

1.0 About This Manual.....................................................................................................7

1.1 Content Overview................................................................................................7

1.2 Text Conventions ................................................................................................7

1.3 Glossary of Terms and Acronyms........................................................................... 9

1.4 Support Options............................... .. .............................. .. ............................. ..14

1.4.1 Electronic Support Systems ............................... ................................ .. .... 14

1.4.2 Additional Technical Support....................................................................14

1.5 Product Literature .............................................................................................14

1.6 Related Documents ...........................................................................................15

2.0 Getting Started........................................................................................................16

2.1 Overview .........................................................................................................16

2.1.1 Intel

2.2 Included Hardware and Documentation................................................................ 18

2.3 Software Key Features.......................................................................................18

2.3.1 AMI* BIOS ............................................................................................18

2.4 Before You Begin...............................................................................................19

2.5 Setting Up the Evaluation Board..........................................................................20

2.6 Configuring the BIOS.........................................................................................21

3.0 Theory of Operation.................................................................................................22

3.1 Block Diagram ..................................................................................................22

3.2 Mechanical Form Factor......................................................................................23

3.3 Thermal Management........................................................................................23

3.4 System Features and Operation .......................................................................... 23

3.4.1 Intel(R) 945GME GMCH...........................................................................23

3.4.2 ICH7-M.................................................................................................24

3.4.3 System I/O and Connector Summary........................................................ 27

3.4.4 POST Code Debugger..............................................................................29

945GME Express Chipset Development Kit Features........................... 16

3.4.1.1 System Memory .......................................................................24

3.4.1.2 DMI ........................................................................................24

3.4.1.3 Advanced Graphics and Display Interface.....................................24

3.4.2.1 PCI Express* Slots....................................................................24

3.4.2.2 PCI Slots .................................................................................25

3.4.2.3 On-Board LAN .......................................................................... 25

3.4.2.4 AC’97 and High Definition Audio..................................................25

3.4.2.5 ATA / Storage ..........................................................................25

3.4.2.6 USB Connectors........................................................................26

3.4.2.7 LPC Super I/O (SIO)/LPC Slot.....................................................26

3.4.2.8 Serial, IrDA............................................... .. .............................26

3.4.2.9 BIOS Firmware Hub (FWH).........................................................26

3.4.2.10 System Management Controller (SMC)/Keyboard Controller............26

3.4.2.11 Clocks..................................................................................... 27

3.4.2.12 Real Time Clock.............................. .. .............................. ..........27

3.4.2.13 Thermal Monitoring...................................................................27

3.4.3.1 PCI Express* Support................................................................28

3.4.3.2 SATA Support...........................................................................28

3.4.3.3 IDE Support.............................................................................28

3.4.3.4 USB Ports................................................................................28

3.4.3.5 VGA Connector.........................................................................28

3.4.3.6 Keyboard/Mouse.......................................................................29

3.4.3.7 32 bit/33 MHz PCI Connectors....................................................29

3.4.3.8 Ethernet Gigabit LAN Interface connector..................................... 29

3.4.3.9 LVDS Flat Panel Display Interface................................................29

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Intel® 945GME Express Chipset—Contents

3.5 Clock Generation ............................................. ............................. .. .. .................29

3.6 Power Management States....................... .............................. .............................30

3.6.1 Transition to S3................................. ... ............................. .. .. .................31

3.6.2 Transition to S4................................. ... ............................. .. .. .................31

3.6.3 Transition to S5................................. ... ............................. .. .. .................31

3.6.4 Transition to Full-On .......................... ................................ .....................31

3.7 Power Measurement Support..................................................................... .. ........31

4.0 Hardware Reference ................................................................................................35

4.1 Primary Features...............................................................................................35

4.2 Back Panel Connectors .......................................................................................38

4.3 Configuration Settings........................................ ............................. .. .. ... ............39

4.4 Power On and Reset Buttons...............................................................................42

4.5 LEDs................................................................................................................43

4.6 Other Headers, Slots, and Sockets.......................................................................43

4.6.1 H8 Programming Headers........................................................................43

4.6.2 Expansion Slots and Sockets....................................................................44

4.6.2.1 478 Pin Grid Array (Micro-FCPGA) Socket ........................... .. .. .. .. ..44

4.6.2.2 PCI Express* (x16)....................................................................45

4.6.2.3 Media Expansion Card (MEC) Slot................................................47

4.6.2.4 PCI Express* (x1) .....................................................................49

4.6.2.5 IDE Connector ..........................................................................51

4.6.2.6 SATA Pinout ................................. .. ..........................................51

4.6.2.7 Fan Connectors.........................................................................52

A Heat Sink Installation Instructions ..........................................................................53

Figures

1Intel® 945GME Express Chipset Development Kit Block Diagram....................... ..............22

2Intel® 945GME Express Chipset Component Locations.................. .................................35

3 Back Panel Connector Locations..................................................................................38

4 Configuration Jumper and Switch Locations..................................................................39

5Intel

945GME Express Chipset Development Kit Power On and Reset Buttons .................42

6 Heatsink and Backplate.............................................................................................53

7 Backplate Pins..........................................................................................................54

8 Applying the Thermal Grease ........................ .............................................................55

9 Squeezing Activation Arm..........................................................................................55

10 Installing the Heatsink ..............................................................................................56

11 Plugging in the Fan...................................................................................................57

12 Completed Assembly.................................................................................................57

Tables

1 Acronyms................................................................................................................11

2 Intel Literature Centers.............................................................................................14

3 Related Documents...................................................................................................15

4 Primary System Clocks..................................................................... .. .......................29

5Intel 6Intel 7Intel

8 Supported Configuration Jumper/Switch Settings..........................................................40

9Intel

10 H8 Programming Jumpers................... .. ............................. .. .. .............................. .. .. ..44

11 Expansion Slots and Sockets......................................................................................44

12 PCI Express* (x16) Pinout (J6C1)...............................................................................45

945GME Express Chipset Development Kit Power Management States....................30

945GME Express Chipset Development Kit Voltage Rails............... .. ......................32

945GME Express Chipset Component Location Legend .. .......................................36

945GME Express Chipset LED Function Legend.......................... .. .. .. .. .. .. ..............43

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Contents—Intel

945GME Express Chipset

13 MEC Slot (J6C1)........................... ... .. ............................. .............................. .. ..........47

14 PCI Express* (x1) Pinout (J7C1, J8C1)........................................................................49

15 IDE Connector (J7J1)................................................................................................51

16 SATA Port 0 Data Connector Pinout (J7H1)..................................................................51

17 SATA Port 0 Power Connector Pinout (J6H3) ................................................................52

18 SATA Port 2 Mobile Drive Connector Pinout (J8J2) ........................................................52

19 Fan Connectors (J3F1 and J3C1)................................................................................52

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Intel® CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset

Revision History

Date Revision Description

May 2007 001 Initial release

Intel® 945GME Express Chipset—Revision History

CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset

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About This Manual—Intel

945GME Express Chipset

1.0 About This Manual

This user’s manual describes the use of the Intel® CoreTM 2 Duo processor with the Mobile Intel

945GME Express Chipset. This manual has been written for OEMs, system evaluators, and embedded system developers. This document defines all jumpers, headers, LED functions, and their locations on the board, along with subsystem features and POST codes. This manual assumes basic familiarity in the fundamental concepts involved with installing and configuring hardware for a personal computer system.

For the latest information about the Intel visit:

http://developer.intel.com/design/intarch/devkits/index.htm

For design documents related to this platform please contact http://

developer.intel.com/design/intarch/core2duo/tech_docs.htm.

Note: The Intel

Intel Core

945GME Express Chipset supports both Intel® CoreTM Duo processors and

CoreTM 2 Duo processors. For the Intel® 945GME Express Chipset with Intel®

Duo Processors Development Kit User's Manual, visit http://download.intel.com

1.1 Content Overview

Chapter 1.0, “About This Manual” — This chapter contains a description of conventions

used in this manual. The last few sections explain how to obtain literature and contact customer support.

Chapter 2.0, “Getting Started”— Provides complete instructions on how to configure

the evaluation board and processor assembly by setting jumpers, connecting peripherals, providing power, and configuring the BIOS.

945GME Express Chipset Development Kit,

Chapter 3.0, “Theory of Operation” — This chapter provides information on the system

design.

Chapter 4.0, “Hardware Reference”— This chapter provides a description of jumper

settings and functions, board debug capabilities, and pinout information for connectors.

Appendix A, “Heat Sink Installation Instructions” gives detailed installation instructions

for the Intel

CoreTM 2 Duo processor heat sink.

1.2 Text Conventions

The following notations may be used throughout this manual. # The pound symbol (#) appended to a signal name indicates that

the signal is active low. (e.g., PRSNT1#)

Variables Variables are shown in italics. Variables must be replaced with

May 2007 Manual Order Number: 317443-001US 7

correct values.

Intel® CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset

Intel® 945GME Express Chipset—About This Manual

Instructions Instruction mnemonics are shown in uppercase. When you are

programming, instructions are not case-sensitive. Y ou ma y use either uppercase or lowercase.

Numbers Hexadecimal numbers are represented by a string of

hexadecimal digits followed by the character H. A zero prefix is added to numbers that begin with A through F. (For example, FF is shown as 0FFH.) Decimal and binary numbers are represented by their customary notations. (That is, 255 is a decimal number and 1111 1111 is a binary number. In some cases, the letter B is added for clarity.)

Units of Measure The following abbreviations are used to represent units of

measure: A amps, amperes GByte gigabytes KByte kilobytes KΩ kilo-ohms mA milliamps, milliamperes MByte megabytes MHz megahertz ms milliseconds mW milliwatts ns nanoseconds pF picofarads W watts V volts µA microamps, microamperes µF microfarads µs microseconds µW microwatts

Signal Names Signal names are shown in uppercase. When several signals

share a common name, an individual signal is represented by

the signal name followed by a number, while the group is

represented by the signal name followed by a variable (n). For

example, the lower chip-select signals are named CS 0#, CS1#,

CS2#, and so on; they are collectively called CSn#. A pound

symbol (#) appended to a signal name identifies an active-low

signal. Port pins are represented by the port abbreviation, a

period, and the pin number (e.g., P1.0).

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About This Manual—Intel

945GME Express Chipset

1.3 Glossary of Terms and Acronyms

This section defines conventions and terminology used throughout this document.

Aggressor A network that transmits a coupled signal to another network. Anti-etch Any plane-split, void or cutout in a VCC or GND plane. Assisted Gunning Transceiver Logic+

The front-side bus uses a bus technology called AGTL+, or Assisted Gunning Transceiver Logic. AGTL+ buffers are opendrain, and require pull-up resistors to provide the high logic level and termination. AGTL+ output buffers differ from GTL+ buffers with the addition of an active pMOS pull-up transistor to assist the pull-up resistors during the first clock of a low-to-high voltage transition.

Asynchronous GTL+ The processor does not utilize CMOS voltage levels on any

signals that connect to the processor. As a result, legacy input signals such as A20M#, IGNNE#, INIT#, LINT0/INTR, LINT1/ NMI, PWRGOOD, SMI#, SLP#, and STPCLK# utilize GTL+ input buffers. Legacy output signals (FERR# and IERR#) and nonAGTL+ signals (THERMTRIP# and PROCHOT#) also utilize GTL+ output buffers. All of these signals follow the same DC requirements as AGTL+ signals, however the outputs are not actively driven high (during a logical 0 to 1 transition) by the processor (the major difference between GTL+ and AGTL+). These signals do not have setup or hold time specifications in relation to BCLK[1:0], and are therefore referred to as “Asynchronous GTL+ Signals”. However , all of the Asynchrono us GTL+ signals are required to be asserted for at least two BCLKs in order for the processor to recognize them.

Bus Agent A component or group of components that, when combined,

represent a single load on the AGTL+ bus.

Crosstalk The reception on a victim network of a signal imposed by

Flight Time Flight time is a term in the timing equation that includes the

aggressor network(s) through inductive and capacitive coupling between the networks.

• Backward Crosstalk - Coupling that creates a signal in a victim network that travels in the opposite direction as the aggressor’s signal.

• Forward Crosstalk - Coupling that creates a signal in a victim network that travels in the same direction as the aggressor’s signal.

• Even Mode Crosstalk - Coupling from a signal or multiple aggressors when all the aggressors switch in the same direction that the victim is switching.

• Odd Mode Crosstalk - Coupling from a signal or multiple aggressors when all the aggressors switch in the opposite direction that the victim is switching.

signal propagation delay , any effects the system has on the T CO of the driver, plus any adjustments to the signal at the receiver

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Intel® 945GME Express Chipset—About This Manual

needed to ensure the setup time of the receiver . More precisely, flight time is defined as:

• The time difference between a signal at the input pin of a receiving agent crossing the switching voltage (adjusted to meet the receiver manufacturer’s conditions required for AC timing specifications; i.e., ringback, etc.) and the output pin of the driving agent crossing the switching voltage when the driver is driving a test load used to specify the driver’s AC timings.

• Maximum and Minimum Flight Time - Flight time variations are caused by many different parameters. The more obvious causes include variation of the board dielectric constant, changes in load condition, crosstalk, power noise, variation in termination resistance, and differences in I/O buffer performance as a function of temperature, voltage, and manufacturing process. Some less obvious causes include effects of Simultaneous Switching Output (SSO) and packaging effects.

• Maximum flight time is the largest acceptable flight time a network will experience under all conditions.

• Minimum flight time is the smallest acceptable flight time a network will experience under all conditions.

Infrared Data Assoc. The Infrared Data Association (IrDA) has outlined a specification

for serial communication between two devices via a bidirectional infrared data port. The 945GME platform has such a port and it is located on the rear of the platform between the two USB connectors.

IMVP6 The Intel Mobile Voltage Positioning specification for the Intel

Core™ 2 Duo Processor. It is a DC-DC converter module that supplies the required voltage and current to a single processor.

Inter-Symbol Interference

Inter-symbol interference is the effect of a previous signal (or transition) on the interconnect delay. For example, when a signal is transmitted down a line and the reflections due to the transition have not completely dissipated, the following data transition launched onto the bus is affected. ISI is dependent upon frequency, time delay of the line, and the reflection coefficient at the driver and receiver . ISI may impact both timing and signal integrity.

Media Expansion Card

The Media Expansion Card (MEC) provides digital display options through the SDVO interface. The MEC card also incorporates video-in.

Network The network is the trace of a Printed Circuit Board (PCB) that

completes an electrical connection between two or more components.

Overshoot The maximum voltage observed for a signal at the device pad,

measured with respect to VCC.

Pad The electrical contact point of a semiconductor die to the

package substrate. A pad is only observable in simulations.

Pin The contact point of a component package to the traces on a

substrate, such as the motherboard. Signal quality and timings may be measured at the pin.

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About This Manual—Intel

Power-Good “Power-Good, ” “PWRGOOD , ” or “CPUPWRGOOD” (an active high

Ringback The voltage to which a signal changes after reaching its

System Bus The System Bus is the microprocessor bus of the processor. Setup Window The time between the beginning of Setup to Clock (TSU_MIN)

Simultaneous Switching Output

Stub The branch from the bus trunk terminating at the pad of an

Trunk The main connection, excluding interconnect branches, from

System Management Bus

Undershoot The minimum voltage extending below VSS observed for a

(CPU core) VCC (CPU core) is the core power for the processor. The system

Victim A network that receives a coupled crosstalk signal from another

945GME Express Chipset

signal) indicates that all of the system power supplies and clocks are stable. PWRGOOD should go active a predetermined time after system voltages are stable and should go inactive as soon as any of these voltages fail their specifications.

maximum absolute value. Ringback may be caused by reflections, driver oscillations, or other transmission line phenomena.

and the arrival of a valid clock edge. This window may be different for each type of bus agent in the system.

Simultaneous Switching Output (SSO) effects are differences in electrical timing parameters and degradation in signal quality caused by multiple signal outputs simultaneously switching voltage levels in the opposite direction from a single signal or in the same direction. These are called odd mode and even mode switching, respectively . This simultaneous switching of multiple outputs creates higher current swings that may cause additional propagation delay (“push-out”) or a decrease in propagation delay (“pull-in”). These SSO effects may impact the setup and/ or hold times and are not always taken into account by simulations. System timing budgets should include margin for SSO effects.

agent.

one end

A two-wire interface through which various system components may communicate.

signal at the device pad.

bus is terminated to V

network is called the victim network.

(CPU core).

Table 1 defines the acronyms used throughout this document.

Table 1. Acronyms (Sheet 1 of 3)

Acronym Definition

AC Audio Codec ACPI Advanced Configuration and Power Interface AGTL Assisted Gunning Transceiver Logic AMC Audio/Modem Codec. ASF Alert Standard Format AMI American Megatrends Inc. (BIOS developer)

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Table 1. Acronyms (Sheet 2 of 3)

Acronym Definition

ATA Advanced Technology Attachment (disk drive interface) ATX Advance Technology Extended (motherboard form factor) BGA Ball Grid Array BIOS Built-In Self Test CK-SSCD Spread Spectrum Differential Clock CMC Common Mode Choke CMOS Configuration Memory Operating System CPU Central Processing Unit (processor) DDR Double Data Rate DMI Direct Memory Interface ECC Error Correcting Code EEPROM Electrically Erasable Programmable Read-Only Memory EHCI Enhanced Host Controller Interface EMA Extended Media Access EMI Electro Magnetic Interference ESD Electrostatic Discharge EV Engineering Validation EVMC Electrical Validation Margining Card FIFO First In First Out - describes a type of buffer FS Full-speed. Refers to USB FSB Front Side Bus FWH Firmware Hub GMCH Graphics Memory Controller Hub HS High-speed. Refers to USB ICH I/O Controller Hub IDE In tegrated Drive Electronics IMVP Intel Mobile Voltage Positioning IP/IPv6 Internet Protocol/Internet Protocol version 6 IrDA Infrared Data Association ISI Inter-Symbol Interference KBC Keyboard Controller LAI Logic Analyzer Interface LAN Local Area Network LED Light Emitting Diode LOM LAN on Motherboard LPC Low Pin Count LS Low-speed. Refers to USB LVDS Low Voltage Differential Signalling MC Modem Codec MEC Media Expansion Card

Intel® 945GME Express Chipset—About This Manual

CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset

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About This Manual—Intel

945GME Express Chipset

Table 1. Acronyms (Sheet 3 of 3)

Acronym Definition

MHz Mega-Hertz OEM Original Equipment Manufacturer PCIe PCI Express* PCM Pulse Code Modulation POST Power On Self Test PLC Platform LAN Connect RAID Redundant Array of Inexpensive Disks RTC Real Time Clock SATA Serial ATA SIO Super Input/Output SMBus System Management Bus SODIMM Small Outline Dual In-line Memory Module SPD Serial Presence Detect SPI Serial Peripheral Interface SSO Simultaneous Switching Output STR Suspend To RAM TCO Total Cost of Ownership TCP Transmission Control Protocol TDM Time Division Multiplexed TDR Time Domain Reflectometry µBGA Micro Ball Grid Array UDP User Datagram Protocol UHCI Universal Host Controller Interface USB Universal Serial Bus VGA Video Graphics Adapter VID Voltage Identification VREG Voltage Regulator XDP eXtended Debug Port

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Intel® CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset

1.4 Support Options

1.4.1 Electronic Support Systems

Intel’s web site (http://www.intel.com/) provides up-to-date technical information and product support. This information is available 24 hours per day, 7 days per week, providing technical information whenever you need it.

Product documentation is provided online in a variety of web-friendly formats at:

http://www3.hibbertgroup.com/intel/main

1.4.2 Additional Technical Support

If you require additional technical support, please contact your Intel Representative or local distributor.

1.5 Product Literature

You can order product literature from the following Intel literature centers:

Table 2. Intel Literature Centers

Intel® 945GME Express Chipset—About This Manual

Location Telephone Number

U.S. and Canada 1-800-548-4725 U.S. (from overseas) 708-296-9333 Europe (U.K.) 44(0)1793-431155 Germany 44(0)1793-421333 France 44(0)1793-421777 Japan (fax only) 81(0)120-47-88-32

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About This Manual—Intel

945GME Express Chipset

1.6 Related Documents

The table below provides a summary of publicly available documents related to this development kit. For additional documentation, please contact your Intel Representative.

Table 3. Related Documents

Document Title Location

Mobile Intel® 945 Express Chipset Family Datasheet

Intel® I/O Controller Hub 7 (ICH7) Family Datasheet

Mobile Intel® 945 Express Chipset Family Specification Update

Intel® Centrino® Duo Processor Technology Design Guide

Note:

1. Contact your Intel representative for access to this document.

http://www.intel.com/design/mobile/datashts/

309219.htm http://www.intel.com/design/chipsets/datashts/

307013.htm http://www.intel.com/design/mobile/specupdt/

309220.htm

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Intel® CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset

2.0 Getting Started

This chapter identifies the evaluation kit’s key components, features and specifications. It also details basic board setup and operation.

2.1 Overview

Intel® 945GME Express Chipset—Getting Started

The evaluation board consists of a baseboard populated with the Intel® CoreTM 2 Duo processor and the Intel and peripheral connectors.

Note: The evaluation board is shipped as an open system allowing for maximum flexibility in

changing hardware configuration and peripherals. Since the board is not in a protective chassis, take extra precaution when handling and operating the system.

945GME Express Chipset, other system board components,

2.1.1 Intel® 945GME Express Chipset Development Kit Features

Features of the development kit board are summarized below:

Processor

•Intel® CoreTM 2 Duo processor with 4 MByte L2 Cache on 65nm process in the 478 pin Flip Chip Pin Grid Array (Micro-FCPGA) package

Mobile Intel® 945GME Express Graphics Memory Controller Hub (945GME Express GMCH)

• 1466 pin Micro-FCBGA Package

• Supports a 533/667 MHz front side bus

• Supports dual-Channel DDR2 at 400/533/667 MHz

• Two SODIMM slots (one per channel) support DDR2 SODIMMS (unbuffered, nonECC) modules

• Supports 128 MBytes to 4 GBytes using 256 Mbit, 512 Mbit, or 1 Gbit technology

• x16 PCI Express* Graphics or Serial Digital Video Out (SDVO) port

• 18 bpp LVDS, VGA & TV-D connector support

I/O Controller Hub 7 (ICH7-M)

• 652 pin plastic BGA package

• DMI (x4) interface with GMCH

• Two SATA and one IDE (40 pin) Hard Drive interface

• Two PCI 2.3 compliant desktop slots

• 82802AC8 Firmware Hub (FWH)

• 82573E Gigabit Ethernet Controller

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Getting Started—Intel

945GME Express Chipset

• Two x1 PCI Express* slots.

Note: There are actually three x1 PCI Express* slots but slot 2 was used for validation

purposes. Only slots 0 and 1 are supported.

Clocking

• CK-410M and CK-SSCD

• Battery-backed real time clock

Connector Interface Summary

• One x16 PCI Express* Video Interface, doubles as an MEC connector to provide access to dual SDVO ports if PCI Express* is unused

•Two SATA ports

• One Ultra ATA (33/66/100) IDE connector supporting up to two IDE devices

• Eight Universal Serial Bus (USB) 2.0 ports (Five ports provided on rear-panel, three provided via headers (J6H2, J7E2)

• Two PCI 2.3 compliant 33 MHz interface connectors

• PS/2-style keyboard and PS/2 mouse (6-pin mini-DIN) connectors

• TV Out D-connector at back panel interface

• LVDS connector on top of circuit board near GMCH (J5F1)

• One VGA connector provides access to integrated graphics

• One LAN connector providing 10/100/1000 Mbps connectivity from the Intel 82573E Gigabit Ethernet Controller

• One 9-pin serial port connector.

•One IrDA port (U4A1)

• Two PCI Express* slots (x1)

• Two SODIMM connectors on rear side of circuit board

Debug Features

• Extended Debug Port (XDP) connector

• On-board Port 80h display

Miscellaneous Features

• Configurable for A TX 1.1 Power Supply in desktop mode or AC Mobile Brick/Battery Pack for Mobile Mode

• ATX Form Factor eight layer PCB

• AMI* system BIOS

• Two built-in fan power connectors: Chassis Fan and CPU Fan

• Power/Reset buttons

• CMOS clear jumper

• BIOS recovery jumper

• Boot Block protection jumper

• Support for Serial, IrDA, serial mouse, and keyboard

May 2007 Manual Order Number: 317443-001US 17

Intel® CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset

Intel® 945GME Express Chipset—Getting Started

2.2 Included Hardware and Documentation

The following hardware and documentation is included in the development kit:

•One Intel

945GME Express Chipset Development Kit board

CoreTM 2 Duo processor with 4 MB L2 Cache on 65nm process in the

478 pin Flip-Chip Pin Grid Array (Micro-FCPGA) package (Installed)

•One Intel® CoreTM Duo processor with 2 MByte L2 Cache on 65 nm process in the 478 pin Flip Chip Pin Grid Array (Micro-FCPGA) package (included in kit box for evaluation– not populated on board)

• One Firmware Hub (FWH) (Installed)

• One GMCH (945GME) heat sink (Installed)

• One Type 2032, socketed 3 V lithium coin cell battery (Installed)

• One DDR2 SODIMM (200 Pin)

• One CPU thermal solution and CPU back plate (included in kit box – not populated on board)

• One hard drive

•One cable kit

2.3 Software Key Features

The driver CD included in the kit contains all of the software drivers necessary for basic system functionality under the following operating systems: Windows* 2000/XP/XP Embedded, and Linux*.

Note: While every care was taken to ensure the latest versions of drivers were provided on

the enclosed CD at time of publication, newer revisions may be available. Updated drivers for Intel components can be found at: http://developer.intel.com/design/

intarch/software/index.htm

For all third-party components, please contact the appropriate vendor for updated drivers.

Note: Software in the kit is provided free by the vendor and is only licensed for evaluation

purposes. Refer to the documentation in your evaluation kit for further details on any terms and conditions that may be applicable to the granted licenses. Customers using the tools that work with Microsoft* products must license those products. Any targets created by those tools should also have appropriate licenses. Software included in the kit is subject to change.

Refer to http://developer.intel.com/design/intarch/devkits for details on additional software from other third-party vendors.

2.3.1 AMI* BIOS

This development kit ships pre-installed with AMI* BIOS pre-boot firmware from AMI*. AMI* BIOS provides an industry-standard BIOS platform to run most standard operating systems, including Windows* 2000/XP/XP Embedded, Linux*, and others.

The AMI* BIOS Application Kit (available through AMI*) includes complete source code, a reference manual, and a Windows-based expert system, BIOStart*, to enable easy and rapid configuration of customized firmware for your Intel

945GME Express

Chipset.

CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset

Intel Manual May 2007 18 Order Number: 317443-001US

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