Icom IC756PROII Circuit Diagram

CIRCUIT DESCRIPTION

1

1 RECEIVER CIRCUITS

1-1 RF SWITCHING CIRCUIT

(CTRL AND RF-A UNITS)

The RF switching circuit leads receive signals to bandpass
filters from an antenna connector while receiving. However,
the circuit leads the signal from the RF power amplifier to the
antenna connector while transmitting.

RF signals from [ANT 1] or [ANT 2] pass through the anten­na selector (RL3), transmit/receive switching relays (RL1,
RL2, RL4), and low-pass filter (L27, L28, C63–C66, C105),
and are then applied to the RF-A unit via J2.

The signals from the CTRL unit either bypass or pass
through the 6 dB (RF-A unit, RL121, R121) and/or 12 dB
(RF-Aunit, RL122, R123) attenuators via the antenna selec­tor (RL101). By selecting the attenuators, 0 (bypass), 6, 12
and 18 dB attenuations are obtained. The signals are then
applied to the RF filters.

When the [RX ANT] is selected, the RF signals are passed
through the low-pass filter (RF-A unit, L112, L111,
C111–C116), then applied to the antenna selector (RF-A
unit, RL101).

1-2 RF BANDPASS FILTER CIRCUIT

(RF-A UNIT AND BPF BOARD)

RF bandpass filters pass only the desired band signals and
suppress any undesired band signals. The RF circuit has 11
bandpass filters and 1 low-pass filter.

(1) 0.03–1.6 MHz (BPF BOARD)

The signals pass through the low-pass filter (L181–L183,
C181–C185), attenuator (R181–R183), and are then applied
to the RF amplifiers (Q501, Q601).

(2) 1.6–60 MHz (RF-A UNIT AND BPF BOARD)

The signals pass through the high-pass filter (L171–L174,
C171–C174) to suppress excessively strong signals below

1.6 MHz. The filtered signals are applied to one of 11 band­pass filters on the table at right above, and then applied to
or bypassed the pre-amplifier circuit.

1-3 PRE-AMPLIFIER CIRCUITS (RF-A UNIT)

The IC-756PRO™ has 2 gain levels of pre-amplifier circuits.
One has 10 dB gain for the 1.8–21 MHz bands and the other
one has 16 dB gain for the upper 24 MHz bands.

When the [P.AMP] switch is set to [P.AMP1] or [P.AMP2], the
signals are applied to the pre-amplifier 1 (Q441, Q442) or
pre-amplifier 2 (IC451) circuit, respectively. Pre-amplified or
bypassed signals are applied to the RF amplifier circuits
(Q501, Q502 and Q601, Q602).

1-4 RF AMPLIFIER AND 1ST MIXER CIRCUITS

(RF-A UNIT)

The 1st mixer circuit mixes the receive signals with the 1st
LO signal to convert the receive signal frequencies into a

64.455 MHz 1st IF signal. The IC-756PRO

™ has two 1st

mixer circuits for the dualwatch function.
The signals from the pre-amplifier circuit, or signals which

bypass the pre-amplifiers, are divided at L491. Each signal
is applied to a 60 MHz cut-off low-pass filter, RF amplifier
(Q501, Q502 and Q601, Q602) and then to a 1st mixer
(Q511–Q514 or Q611–Q614).

Each 1st LO signal (64.4850–124.4550 MHz) enters the RF

-A unit from the PLL unit via J561 or J661. The LO signals
are amplified at the LO amplifier (Q561 or Q661), filtered by
a low-pass filter, and then applied to each 1st mixer.

• Used RF filter

* : On the BPF board

• Receiver construction

LPF or

BPF

1st LO B

1st LO A

2nd LO

64.0 MHz

Crystal

filter

FI711a/b

1st mixer A

Q511–Q514

1st mixer B

Q611–Q614

2nd mixer

Q941–Q944

3rd LO

491 kHz

3rd mixer

IC151

64.455 MHz

0.03–60.0 MHz

Ceramic

filter

FI132, FI111

455 kHz

to squelch gate
(IC301)

36 kHz

DSP-A

board

RF-A UNIT MAIN-A UNIT

Band

0.03–1.6 MHz

1.6–2 MHz
2–3 MHz
3–4 MHz
4–6 MHz
6–8 MHz

8–11 MHz

Band

11–15 MHz
15–22 MHz
22–30 MHz
30–50 MHz
50–54 MHz
54–60 MHz

Control

signal

B7
B8
B9

B10W

B10

B10W

Control

signal

B0
B1
B2
B3
B4
B5
B6

Input

diode

N/A
*D2001
*D2021
*D2041
*D2061
*D2081

D261

Input

diode

D281
D301
D321
D341
D361
D341

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2

1-5 1ST IF CIRCUIT (RF-A UNIT)

The 1st IF circuit filters and amplifies the 1st IF signal. The
1st IF signal combined at L653 is applied to a pair of MCF
(Monolithic Crystal Filter; FI711a/b) to suppress out-of-band
signals.

The level of converted 1st IF signal is adjusted at the PIN
attenuators (D531–D533, D535 or D631–D633, D635) con­trolled by the [BAL] controller for the dualwatch function. The
signal is applied to the 1st IF amplifier (Q551 or Q651) and
then combined at L653.

The combined signal passes through the 3 dB attenuator
(R711–R713) and MCFs (FI711a/b). The signal is amplified
at the 1st IF amplifier (Q721). The amplified signal is then
applied to the 2nd mixer circuit.

1-6 2ND MIXER CIRCUIT (RF-A UNIT)

The 2nd mixer circuit mixes the amplified 1st IF signal and
2nd LO signal (64.00 MHz) for conversion into the 2nd IF
signal.

The 1st IF signal from the 1st IF amplifier (Q721) is convert­ed into a 455 kHz 2nd IF signal at the 2nd mixer circuit
(D941).

The 2nd IF signal is applied to the noise blanker gate (MAIN­A unit) via the J741.

1-7 NOISE BLANKER CIRCUIT (MAIN-A UNIT)

The noise blanker circuit detects pulse-type noise, and turns
OFF the signal line when the noise appears.

The 2nd IF signal from the RF-A unit is applied to the noise
blanker gate (D112, D116). A portion of the 2nd IF signal
from RF-A unit is amplified at the noise amplifiers
(Q271–Q273, Q279), and is then detected at the noise
detector (D271) to convert the noise components to DC volt­ages.

The signal is then applied to the noise blanker switch (Q276,
Q278). At the moment the detected voltage exceeds Q276’s
threshold level, Q278 outputs a blanking signal to close the
noise blanker gate (D113, D114). The PLL unlock signal are
also applied to Q278, to control the noise blanker gate.

Some DC voltage from the noise detector circuit is fed back
to the noise amplifiers (Q271–Q273) via the DC amplifiers
(Q274, Q275). The DC amplifiers function as an AGC circuit
to reduce average noise. Therefore, the noise blanker func­tion shuts off pulse-type noise only.

1-8 2ND IF CIRCUIT (MAIN-A UNIT)

The 2nd IF circuit amplifies and filters the 2nd IF signal, and
applies the 2nd IF signal to the 3rd mixer circuit.

The 2nd IF signal from the noise blanker gate (D113, D114)
is amplified at the 2nd IF amplifier (Q141) and passed
through the ceramic filter (FI111). The filtered signal is
applied to the 3rd mixer circuit.

1-9 3RD MIXER AND 3RD IF CIRCUITS

(MAIN-A UNIT)

The 3rd mixer circuit mixes the 2nd IF signal and the 3rd LO
signal to obtain the 3rd IF (36 kHz) signal.

The 2nd IF signal from the ceramic filter (FI111) is applied to
the 3rd mixer circuit (IC151, pin 1). The 3rd LO signal from
the PLL unit is applied to the 3rd mixer (IC151, pin 5). The
mixed signal is output from pin 6.

The 3rd IF signal is passed through the low-pass filter
(IC201a) and amplified at the 3rd IF amplifier (IC201b). The
filtered and amplified signal is then applied to the DSP-A
board via DRIF line.

1-10 DSP RECEIVER CIRCUIT (DSP-A BOARD)

The DSP (Digital Signal Processor) circuit enables digital IF
filter, digital noise reduction, digital PSN (Phase Shift
Network)/Low Power/Phase demodulation, digital automatic
notch, and etc.

The 36 kHz 3rd IF signal from the 3rd IF amplifier (MAIN-A
unit, IC201b) is amplified at the differential amplifiers
(IC2301a/b) after being passed through the T/R switch
(IC2291), and is then applied to the A/D converter (IC2321).
The coverted signal is level shifted 5V to 3.3 V at the level
converter (IC2051).

Differential

converter

A/D

converter

DRIF

DRAF

• DSP receiver circuit

6

7

1

IC2291

IC2301b/a IC2321

Level

converter

IC2051

D/A

converter

IC2052

Level

converter

IC2351

DSP IC

IC2001

LPF

IC2401

T/R switch

13

12

14

IC2372x

15

9

1

IC2372y

HPF

IC2441a

Mixer

amplifier

IC2381b

5

3

4

IC2372z

7

4

1

IC2473

MAIN-A unit DSP-A board MAIN-A unit

36 kHz

3rd IF
signal

AF
signals

“TXS” signal

“TXS” signal

“TXS” signal

5

11

10

3

The level shifted signal is applied to the DSP IC (IC2001) for
36 kHz digital IF filter, demodulation, automatic notch and
noise reduction, etc. The output signal is level shifted 3.3 V
to 5V at the level converter (IC2052), and is applied to the
D/A converter (IC2351) to convert into the analog audio sig­nals.

The converted audio signals are passed through the active
filter (IC2371a), AF amplifier (IC2371b), analog switches
(IC2372, pins 14, 13 and pins 1, 15) then applied to the low­pass filter (IC2401). The filtered signals are passed through
the analog switches (IC2372, pins 4, 3 and IC2473, pins 1,

7), high-pass filter (IC2441A) and mixer amplifier (IC2471A),
and then applied to the MAIN-A unit via J2001 (pin 13) as
the DRAF signal.

1-11 TWIN PBT CIRCUIT (DSP-A BOARD)

General PBT (Passband Tuning) circuit shifts the center fre­quency of IF signal to electronically narrow the passband
width. The IC-756PRO

™ uses the DSP circuit for the digital

PBT function and actually shifts the both lower and higher
passbands of 3rd IF filter within ±1.8 kHz.

The twin PBT circuit in DSP IC (IC2001) controlled by the
[TWIN PBT] controller adjusts the 3rd IF passband width
and rejects interference.

1-12 AGC CIRCUIT (DSP-A BOARD)

The AGC (Automatic Gain Control) circuit reduces IF ampli­fier gain and attenuates IF signal to keep the audio output at
a constant level.

The receiver gain is determined by the voltage on the AGC
line (IC2461, pin 4). The D/A converter for AGC (IC2461)
supplies control voltage to the AGC line and sets the receiv­er gain with the [RF/SQL] control.

The 3rd IF signal from the level converter (IC2051) is detect­ed at the AGC detector section in DSP IC (IC2001), and is
applied to the D/A converter for AGC via the level converter
(IC2052). The AGC voltage is amplified at the buffer amplifi­er (IC2471b) and is applied to the MAIN-A unit to control the
AGC line.

When receiving strong signals, the detected voltage increas­es and the AGC voltage decreases via the buffer amplifier
(IC2471b). As the AGC voltage is used for the bias voltage
of the IF amplifier (RF-A unit; Q721), IF amplifier gain is
decreased.

1-13 S-METER CIRCUIT (MAIN-A UNIT)

The S-meter circuit indicates the relative received signal
strength while receiving by utilizing the AGC voltage which
changes depending on the received signal strength.

A portion of the AGC bias voltage from the DSP-A board is
applied to the differential amplifier (IC101a, pin 2) where the
difference between the AGC and reference voltage is detect­ed.

The detected voltage is passed through the analog switch
(IC3631, pins 12, 14) as the SML signal and applied to the
main CPU (IC3501, pin 108) to activate the S/RF meter via
the sub CPU (IC401) on the DISPLAY board.

1-14 SQUELCH CIRCUIT (MAIN-A UNIT)

The squelch circuit mutes audio output when the S-meter
signal is lower than the [RF/SQL] setting level.

The S-meter signal is applied to the main CPU (IC3501, pin

108) and is compared with the threshold level set by the
[RF/SQL] control. The [RF/SQL] setting signal is applied to
the main CPU via the sub CPU (DISPLAY board; IC401, pin

91). The main CPU analyzes the compared signal and out­puts control signal to the squelch gate (IC301, pin 5) via the
interface IC (IC3653, pin 19) to open or close the squelch as
the SQLS signal.

1-15 AF AMPLIFIER CIRCUIT (MAIN-A UNIT)

The AF amplifier amplifies the audio signals to a suitable dri­ving level for the speaker.

The AF signals (DRAF) from the DSP-A board are passed
through the squelch gate (IC301) and amplified at the AF
amplifier section of IC311 (pins 2, 4), and volume is con­trolled by the AFGV signal at the VCA section (pins 7–9).
The volume controlled AF signals are passed through the AF
mute gate (IC331, pins 1, 7), then applied to the AF power
amplifier (IC332, pin 1) via the ripple filter (Q331).

The amplified audio signals are passed through the
[PHONES] and [EXT SP] jacks then applied to the internal
speaker when no plug is connected to the jacks.

The AF mute gate is controlled by the [AF] control via the
sub and main CPUs.

[PHONES]

[EXT SP]

Int. speaker

IC332

AF
power
amp.

DRAF

• AF amplifier circuit

7

6

1

IC301 IC311

Mute switchSquelch gate

Ripple

filter

Q331

MAIN-A unitDSP-A board

“SQLS” signal

“AFGV” signal

5

6

7

1

IC331

“AFMS” signal

2

AMP VCA