HP HPMX-3003-BLK, HPMX-3003-TR1 Datasheet
1.5 – 2.5 GHz LNA Switch PA
Technical Data
HPMX-3003
Features
• GaAs MMIC LNA-SwitchPower Amp for 1.5 – 2.5 GHz
Transceiver Use
• LNA: 2.2 dB NF, 13 dB Ga @
1.9 GHz
• Switch: 55 dBm OIP @
1.9␣ GHz
• Power Amp: +4 dBm in,
+27.5 dBm out, 23.5 dB Gain,
35% η
@ 1.9 GHz
add
• 3 or 5 V Operation
• JEDEC Standard SSOP-28
Surface Mount Package
Applications
• Personal Communications
Systems (PCS)
• Cordless Telephone Systems
• 2400 MHz Wireless LANs
and ISM Band Spread
Spectrum Applications
Functional Block Diagram
LNA out
C1
C2
(VG1)
Plastic SSOP-28
HPMX
3003
Package Pin Configuration
25 PA out
24 Gnd
23 Gnd
22 PA out
Gnd 6
VD1 7
21 PA out
LNA out 8
VD2VD1 VG2
28 Gn
Gnd 1
27 VG2
26 Gnd
Gnd 2
Gnd 3
Gnd 5
PA in 4
LNA in
SW1
Antenna
SW2
PA outPA in
YYWW
20 Gnd
19 Gnd
18 SW2
HPMX
3003
YYWW
Gnd 9
Gnd 10
LNA in 11
17 Gnd
16 C2
Gnd 12
SW1 13
Description
Hewlett-Packard’s HPMX-3003
combines a Low Noise Amplifier,
GaAs MMIC switch, and 27.5 dBm
power amp in a single miniature
28 lead surface mount plastic
package. This RFIC would
typically serve as the “front end”
and power stage of a battery
operated wireless transceiver for
PCS or ISM band use. Each
section of the RFIC can also be
used independently.
The single-supply LNA makes use
of the low noise characteristics of
15 Antenna
GaAs to create a matched, broadband amplifier with target performance of 13 dB gain and 2.2 dB
noise figure. The switch provides
+55 dBm IP3 for linear operation.
The power amplifier produces up
to 820␣ mW with 35% power added
efficiency.
The HPMX-3003 is fabricated with
Hewlett-Packard’s GaAs MMIC
C1 14
process, and features a nominal
0.5 micron recessed Schottkybarrier-gate, gold metallization,
and silicon nitride passivation to
produce MMICs with superior
performance, uniformity and
reliability.
5965-1403E
7-82
HPMX-3003 Absolute Maximum Ratings
[1]
Absolute Absolute Absolute
Symbol Parameter Units Maximum
LNA Switch Power Amp
P
diss
P
in
V
d
V
cont
T
ch
T
STG
Notes:
1. Operation of this device above any of these limits may cause permanent
damage.
case
= 25°C
2. T
3. Derate at 18.2 mW/° C for T
Power Dissipation
CW RF Input Power dBm +20 +33 +20
Device Voltage V 8 — 8
Control Voltage V — -6 —
Channel Temperature °C 175 175 175
Storage Temperature °C -65 to 150 -65 to 150 -65 to 150
> 78°C
C
[2,3]
mW 250
[2,3]
[1]
Maximum
[1]
Thermal Resistance
θjc = 55°C/W
Maximum
[2,3]
1500
[2]
[1]
:
Recommended operating range of Vcc = 2.7 to 5.5 V, T
= -40 to + 85 ° C
a
HPMX-3003 Standard Test Conditions
Unless otherwise stated, all test data was taken on packaged parts
under the following conditions:
T
= 25 ° C, Zo = 50 Ω
a
Vcc = +3.0 V DC, V
= -3.0 V DC, VD1 = +3.6 V DC
control
LNA Pin = -20 dBm, PA Pin = +4 dBm, frequency = 1.9 GHz
Perfomance cited is performance in test circuit shown in Figure 17.
HPMX-3003 Guaranteed Electrical Specifications
Standard test conditions apply unless otherwise noted.
Symbol Parameters and Test Conditions Units Min. Typ. Max.
G
test
P
out
Id LNA LNA bias current mA 6.5 9.5
LNA gain through switch dB 9.0 11
Output power through switch dBm 24.0 25.5
7-83
HPMX-3003 Summary Characterization Information
Standard test conditions apply unless otherwise noted. All information tested in 1900 MHz
Test Circuit, and reflects performance of test circuit at 1900 MHz.
Symbol Parameters and Test Conditions Units Typ
LNA
NF Noise Figure dB 2.2
2
|S21|
IRL Input Return Loss dB 15
ORL Output Return Loss 12
IIP
Switch
P
1dB
where insertion loss is increased by 1 dB
P
1dB
where insertion loss is increased by 1 dB
IP
3
S21 on Insertion Loss, on channel dB 0.8
S21 off Isolation, off channel dB 15
IRL
IRL
off
Power amp (Vg = -.8 V required)
GP Gain VD1 = 3.6 V, Pin = + 4 d Bm d B 23.5
η
PA
add
P
out
Id PA Transmit Current VD1 = 3.6 V, Pin = +4 dBm mA 450
Note:
1. The P
C2 from the normal 3 V (+23 dB P
50 Ω Gain dB 13
Input Third Order Intercept dBm -1
3
Output Power ∆C1 to C2 = 3 V dBm +23
Output Power ∆C1 to C2 = 5 V dBm +29
[1]
Third Order Intercept dBm +55
on
Return Loss, on channel dB 26
Return Loss, off channel dB 0.5
Power Added Efficiency VD1 = 3.6 V % 35
Output Power VD1 = 3.6 V, Pin = + 4 d B m dB m +27.5
of the switch can be improved by increasing the difference between the values of C1 and
1dB
) to 5 V (+29 dB P
1dB
1dB
).
HPMX-3003 Pin Description
Gnd 1
Gnd 2
Gnd 3
PA in 4
Gnd 5
Gnd 6
VD1 7
LNA out 8
Gnd 9
Gnd 10
LNA in 11
Gnd 12
SW1 13
C1 14
Figure 1. HPMX-3003 Pin Outs and Schematic.
28 Gn
27 VG2
26 Gnd
25 PA out
24 Gnd
23 Gnd
22 PA out
21 PA out
20 Gnd
19 Gnd
18 SW2
17 Gnd
16 C2
15 Antenna
7-84
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