HP 4431s Schematics

THIS DRAWING AND SPECIFICATIONS, HEREIN, ARE THE PROPERTY OF INVENTEC CORPORATION AND SHALL NOT BE REPODUCED, COPIED, OR USED IN WHOLE OR IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT WRITTEN PERMISSION, INVENTEC CORPORATION 2009 ALL RIGHT RESERVED

Hublot-Discrete

PV_Build (A01)

DATE

CHANGE NO.

REV

DRAWER DESIGN CHECK RESPONSIBLE

SIZE = FILE NAME : XXXX-XXXXXX-XX

P/N

3

XXXXXXXXXXXX

2009.04.21

DATEDATEEE POWER

INVENTEC

TITLE

SIZE CODE

A3

Hublot-Discrete

DOC. NUMBER REVVER :

CS

1310A22593-0-MTR

SHEET

A01

OF

601

Table Of Contents

Page

5- DC & Battery Charger. 6- Select & Battery connector. 7- System Power (+V3A/+V5A). 8- System Power (+V1.5/+VCCP). 9- Graphic Power (+VDD_CORE & +VPCIE). 10- VRAM Power (+V1.8S). 11- CPU Power (+VCC_CORE). 12- DDR Termination Voltage(+V0.75S). 13- Power (Sleep: +V5S/+V3S/+V1.5S). 14- Power (Sequence).

Page

15- Clock Generator. 16- CPU Penryn-1. 17- CPU Penryn-2.

18- CPU Penryn-3. 19- Thermal & Fan. 20- N/B Cantiga-1.

21- N/B Cantiga-2. 22- N/B Cantiga-3. 23- N/B Cantiga-4.

24- N/B Cantiga-5. 25- N/B Cantiga-6. 26- DDR3-DIMM0.

27- DDR3-DIMM1. 28- DDR3-DAMPING.

29- CRT CONN. 30- HDMI CONN. 31- LCM CONN.

32- S/B ICH9-1. 33- S/B ICH9-2. 34- S/B ICH9-3.

35- S/B ICH9-4. 36- S/B ICH9-5.

Page

37- HDD & ODD CONN & Accelerometer. 38- USB & Finger print CONN. 39- USB_Daughter Board. 40- KBC & BIOS ROM. 41- Internal Keyboard & TouchPad CONN. 42- Audio CODEC & Earphone & Speaker. 43- Audio MIC & MDC CONN.

44- Giga LAN controller. 45- Magnetic & RJ45 CONN. 46- Mini Card & BT CONN.

47- New Card & 2 in 1 Card (SD/MMC). 48- LEDs & Buttons & SW/B CONN. 49- Screws & FixMask.

50- AMD M92_S2-1. 51- AMD M92_S2-2. 52- AMD M92_S2-3. 53- AMD M92_S2-4.

54- Video RAM-1 (DDR2). 55- Video RAM-2 (DDR2). 56- CAP Sense board. 57- HDD Extend board. 58- Finger Print board.

59- USB Extend board. 60- Power Switch & SIM Card board.

CHANGE by

Evan Shih

15-Apr-2009

INVENTEC

TITLE

Hublot_Discrete

SIZE

CODE REVDOC. NUMBER

A3

1310A22593-0-MTR

CS

SHEET

260

A01

OF

HDMI

Penryn

(uFCPGA)

P16~19

V-RAM

P.54~55

TMDS

P30

DDR2 500

FSB

800/1066

ICS9LPRS397

Clock generator

DDR III _SODIMM0

1066

P15

24 Pin Debug port

(LPC, SPI, Serial debug)

DDR III _SODIMM1

P26

1066

P40

P27

Wi-MAX

USB6

Bluetooth

USB7

WWAN+SIM Card

USB8

Finger Print

USB10

Web-Cam

LCM

CRT

P38

P46

P31

LVDS

P31

RGB

P29

AMD M92-S2

USB0USB5

CONN A

USB1

CONN B

P39

ACCELEROMETER

STMicro LIS302DL

P.50~53

SMBUS

PCI-E X16

USB 2.0

P37

CANTIGA

PM

DMI

ICH9-M

P20~25

SATA0

SATA1

PCI_EXPRESS

P32~36

USB2

NEW CARD

P47

HDA

LPC

USB3

SD CARD

P47

DDR3 Interface DDR3 Interface

HDD

ODD

PCIE6

LAN

MARVELL

88E8072

RJ45

P45

P37

PCIE2

WLAN

P44

MINI CARD

P46

BATTERY

P5~6

PCIE3

NEWCARD

P47

USB4

CONN C

P38

MDC_1.5/Modem

Module 56K

P43

Audio CODEC

ADI_1984A

KBC

KBC1091

P42

RJ11

P43

Keyboard

P41

TouchPad

P40

CAP Sense

P41

SPI

P48

BIOS

P40

CHANGE by

Evan Shih

System Charger &

DC/DC System power

INVENTEC

TITLE

Hublot_Discrete

CODE

SIZE

A3

CS

13-Apr-2009

SHEET

P7~13

DOC. NUMBER

1310A22593-0-MTR

OF

360

REV

A01

BATSELB

AC_AND_CHG

CHGCTRL_3

Adapter

(90W)

LIMIT_SIGNAL

Selector

(Discrete)

+VBATR

+VBDC

OCP

Charger

(BQ24740)

+VBATA

BATCON

ADP_EN OCP_OC# ADP_PS0 ADP_PS1

CHGCTRL_3

ADP_PRES

AC_AND_CHG

Main Battery

ADP_PRES

KBC_PW_ON

SLP_S3#_3R

SLP_S4#_3R

5/3.3V

(TPS51125)

IO POWER

(TPS51117)

IO POWER

(TPS51117)

+V5A +V3A

+V5AL +V3AL

VCCP_PG

V1.5_PG

+VCCP

+V1.5

(7A)

(5A)

(9.1A)

SLP_S3#_3R

SLP_S4#_3R

SLP_S3#_3R

LR

(G2997)

+V5S

+V3S

+V3_LAN

+V0.75S

M_VREF

+V1.5S

SLP_S3#_3R

PWR_GOOD_3

PM_DPRSLPVR

PSI#

H_DPRSTP#

IO POWER

(TPS51117)

ATI

GPU POWER

(TPS51511)

IMVP VI

(TPS51620)

V1.8S_PG

VGA_PG

+V1.8S

+VDD_CORE +VPCIE

+VCC_CORE

PM_PWROK

CHANGE by

INVENTEC

TITLE

Hublot_Discrete

SIZE

CODE

CS

SHEET

DOC. NUMBER

460

13-Apr-2009Evan Shih

A3

REV

A011310A22593-0-MTR

OF

+VADPBL

5-,6-

FAIR_FDMC6675BZ_8P

ADP_EN#

1

R150 15K_5%

2

2VREF

7-,14-

14.3K_1%

+VBDC

5-,6-

12

100K_1%

Q25

D

8 7 6 5

G

D1010

14-

CHENKO_LL4148_2P

1

R147 100K_1%

2

1

R146

8.25K_1%

2

1

R143

2

+VADPBL

5-,6-

R131

12

100K_1%

R137

R134

24K_1%

S

1 2 3 4

21

12

23.7K_1%

220K_5%

R1075

100K_5%

12

C1067

R138

R1072

C125

0.22uF_16V

0.1uF_16V

+VADP

1

C1112

2

0.1uF_16V

2

Q1018

3

D

1

G

S

2

SSM3K7002F

12

R145

12

270K_5%

+V5AL

5-,7-,14-

8

3

U1006-A

+

1

OUT

2

-

ON_LM393DR2G_SOP_8P

4

R144

12

1M_5%

+V5AL

5-,7-,14-

8

U1006-B

5

+

OUT

6

4

ON_LM393DR2G_SOP_8P

12

R133

12

1M_5%

U1008

1

+IN5+VS

2

-VS

3

-IN

FAIR_LMV321AS5X_SOT23_5P

1

2

14-

1 2

C1070

0.1uF_25V

1

R1074 220K_5%

2

14-

BATCAL#

+V3AL

5-,6-,7-,14-,32-,40-,41-,46-,48-

R1030

12

7

1

C84

0.1uF_16V

2

+V5AL

5-,7-,14-

OUT

1 2

FAIR_FDMC6675BZ_8P

22K_5%

6-

AC_AND_CHG

R129

12

100K_5%

4

L1005

NFM60R30T222

12

4

C1069

10pF_50V

D1009

B140_SMA

21

D

8 7 6 5

G

ADPDRV# ADP_PRES

5-,6-,40-,44-

CHGCTRL_3

+V3AL

Q1015

2

G1

5

G2

2N7002DW

3

1 2

C1115

10pF_50V

Q26

12

S

1 2

R83

3

47K_5%

4

5-

R1029

12

47K_5%

6-,40-

5-,6-,7-,14-,32-,40-,41-,46-,48-

2

R35

SLP_S3#_3R

10K_5%

1

+V3A

7-,13-,31-,33-,34-,35-,38-,44-,46-,48-

1

S1

6

D1

3

5-

D2

4

S2

VCTRL_3

C1113

0.1uF_25V

2

1

R36

4.7K_5%

2

R71

12

1

294K_1%

1

R78

200K_1%

2

8-,9-,10-,12-,13-,14-,33-,40-,42-,44-,47-

CELLS

R76

453K_1%

ADPDRV#

R1028 422K_1%

12

40-

R1027

1M_1%

5-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

DC CONN

CN1003

1

2

G1

2

G

3

G2

3

G

4

SINGA_2WA1571_004111_4P

+VBAT +VBATR

6-

0.01_1%

12

C1046

C1038 1uF_6.3V

12

1uF_25V

C1043

12

0.1uF_16V

R84

12

300K_5%

R80

1

BQREF

R72

12

40-

0_5%

R77

100K_5%

1

2

C1044

1uF_6.3V

1

C1042 1uF_6.3V

2

20K_5%

2

5-

1

2

7-,8-,9-,10-,11-,13-,31-,40-

C1045

1uF_25V

1 2

+V3S

1

R9572 10K_5%

2

BQREF

ADP_PRES

5-,6-,40-,44-

LS_100R

LIMIT_SIGNAL

12

U1005

2

ACN

3

ACP

5

ACDET

9

AGND

13

EXTPWR

16

SRSET

6

ACSET

10

VREF

8

IADSLP

21

DPMDET

4

LPMD

20

CELLS

1

CHGEN

11

VDAC

12

VADJ

15

IADAPT

PowerPad

TI_BQ24740_QFN_28P

5-

ICS

C1039 100pF_50V

ICS

2

5

2N7002DW

14-

5-

PVCC

HIDRV

PH

BTST

REGN

LODRV

PGND

SRP

SRN

BAT

LPREF

ISYNSET

R1069

12

5-

10K_5%

R1070

12

5-

178K_1%

Q1050

1

S1

G1

6

D1

3

D2

G2

4

S2

R140

12

100_5%

VBIAS

28

1

C1006

1uF_25V

2

26

25

R32

12

27

0_5%

24

1

C1004 1uF_10V

2

23

22

19

18

17

7

14

29

1

2

S

G

1

14-

0.1uF_25V

13

R79

24.9K_1%

C1111

12

0.22uF_16V

1

R1071

53.6K_1%

2

3

D

Q1017

BSS84_3P

C25

D1003

BAT54

1 2

5-,11-,13-,14-,19-,29-,30-,33-,35-,37-,41-,42-,49-

U14

1

+IN5+VS

2

-VS

3

-IN

FAIR_LMV321AS5X_SOT23_5P

OUT

2K_1%

D12

DAN202K

2

3

R1060

3.9K_1%

C28

4.7uF_25V

1 2

C27

4.7uF_25V

1 2

C1005

12

0.1uF_16V

C1040

0.1uF_25V

BAT_AMBER_LED#

BAT_GRN_LED#

LIMIT_SIGNAL

4

R1073

1

2

1

C1068 3900pF_16V

2

1

C26

4.7uF_25V

2

CHANGE by

+V5S

ON_LM339DR2G_SOP_14P

1

C127

0.1uF_16V

2

R1061

12

1

B

100K_5%

G

3

41S2

5

G

4

+V3AL

1

R9568

750_1%

2

40405-

Evan Shih

1

R5079

U1007-A

330K_5%

2

1

R160

3.9K_5%

2

3

C

Q1016

E

D_MMST3904

2

8765

D

Q1008

FDMC8884

76

8

D

Q1007

FDMC8884

S

123

5-,6-,7-,14-,32-,40-,41-,46-,48-

1

R9569

750_1%

2

CN1002

1

2

3

ACES_87213_0300N_3P

+V3S

+V5S

5-,11-,13-,14-,19-,29-,30-,33-,35-,37-,41-,42-,49-

3

5

+

2

OUT

4

12

14-

OCP_OC

L1001

PCMB0603T_8R2MS

12

1

C1009

4.7uF_25V

2

G1

G G

G2

13-Apr-2009

5-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

1

R162

R5080

133K_1%

10K_5%

2

C124

1

R142

2

80.6K_1% 2

D11

21R87

CHENKO_LL4148_2P

3

D

Q1014

G

1

SSM3K7002F

S

2

R161

12

10K_5%

R1411

12

100K_5%

3

U1007-B

7

+

1

OUT

6

-

ON_LM339DR2G_SOP_14P

12

R139

12

604K_1%

0.027uF_10V

11-,14-,40-,51-

33-

PWR_GOOD_3

OCP_OC#

OCP

C1007

4.7uF_25V

C1041

1 2

1uF_25V

DOC. NUMBER

OF

+VBDC

1 2

5-,6-

1 2

C1047

4.7uF_25V

REV

A01

605

+VBDCR

12

1

C1008

4.7uF_25V

2

0.033uF_16V

Kevin sense

C1002

1 2

1uF_25V

INVENTEC

TITLE

Hublot_Discrete

DC & Battery Charger

CODE

SIZE

A3

CS

SHEET

R1031

0.01_1%

C1037 12

1310A22593-0-MTR

CHGCTRL_3

CHENKO_LL4148_2P

1000pF_50V

2

5-,40-

D1

C16

+V3AL

5-,6-,7-,14-,32-,40-,41-,46-,48-

+VBAT

5-

+VBDC

+VADPBL

5-

5-,40-,44-

5-

D1008

1

2

MMGZ2548B

Q1004

SSM3K7002F

2

3

D

S

G

1

2

+V3AL

5-,6-,7-,14-,32-,40-,41-,46-,48-

12

R12

220K_5%

Q17

1

S

2 3 4

AM4825P_AP

+VBATA

6-

8

D

7 6 5

G

1

R20 10K_5%

2

R1032

1

3K_5%

+V3AL

5-,6-,7-,14-,32-,40-,41-,46-,48-

1

1 2

G

1

R1002 470K_5%

2

3

D

S

2

Q1003

SSM3K7002F

5

U1001

4

74HC1G14GV

3

AC_AND_CHG

C15

0.047uF_10V

1

R14

1

2

1K_5%

1

2

1

R13 470K_5%

2

ADP_PRES

5-

Q13

8

D

7 6 5

AM4825P_AP

R1003

2

1

G

2N7002DW

S

5

2

1 2 3 4

Q1001

G2

G1

S2 D2

D1 S1

+VBATA

4 3

6 1

6-

1

R37 470K_5%

2

1

R38

4.7K_5%

2

1

R1007

10K_5%

1

R1009 10K_5%

2

1 R1011

100K_5% 2

MAIN BATT

CN1001

8

6

8

12

SDA_MAIN SCL_MAIN

4040-

+V3AL

5-,6-,7-,14-,32-,40-,41-,46-,48-

1

6-

CFET#

D1004

2

BAV99

THM_MAIN#

R1010 R1008

1

3

2

BAV99

40-

100_5%

12

100_5%

1

D1005

D1006

2

BAV99

3

R1005

12

1K_5%

1

C1012 470pF_50V

2

6

7

5

7

5

4

3

2

1

ALLTOP_C144L4_106A1_L_6P

1

C1010

0.1uF_25V

2

1.5M_5%

+V3AL

5-,6-,7-,14-,32-,40-,41-,46-,48-

SSM3K7002F

+V3AL

1

3

Q1002

D

G

1

S

2

CFET# BATCON

D2

6-

CHENKO_LL4148_2P

R11

12

0_5%_OPEN

R1001 220K_5%

2

21

5-,6-,7-,14-,32-,40-,41-,46-,48-

5

U2

2

74HC1G14GV

3

C1001

1 2

4

40-

0.1uF_16V

INVENTEC

TITLE

Hublot_Discrete

Selector & Battery CONN

CHANGE by

Evan Shih

13-Apr-2009

SIZE

A3

CODE

CS

SHEET

DOC. NUMBER

OF

660

REV

A011310A22593-0-MTR

(6.1A)

+V3A

5-,13-,31-,33-,34-,35-,38-,44-,46-,48-

PAD10

POWERPAD_2_0610

1uF_10V

C564

KBC_PW_ON

VCC1_POR#_3

4.7uF_25V

1

1 2

2

Q54

2

40-

G1

5

14-,40-

G2

2N7002DW

R1249

12

6.49K_1%

+VBATP

7-

1

C1327

CYNTEC_PCMC063_3R3

2

L37

12

C537

0402_OPEN

C565

330uF_6.3V

R385

0402_OPEN

EMI OPTION

1

S1

6

D1

3

D2

4

S2

12

10K_1%

C1325

4.7uF_25V

Q1026

SIS412DN

1 2

2

1

+V5AL

5-,7-,14-

1

R1226

330K_5%

2

R1251

51125GND

8765

D

G

1S23

4

6

5

8

7

D

G

S

123

4

Q43

VISHAY_SI7720DN_8P

1 2

RF option

C1333

2200pF_50V

C563

0.1uF_16V

12

2

G1

5

G2

2N7002DW

1

C538

0.1uF_25V

2

R423

12

4.7_5%

+V3AL

Q53

1

S1

6

D1

3

D2

4

S2

5-,6-,14-,32-,40-,41-,46-,48-

1

C562

2

4.7uF_6.3V

R1252 75K_1%

R1253

12

0_5% R414

12

0_5%

25

TML

7

VO2

8

VREG3 VBST2

10 11

DRVL2

5

6

VFB2

ENTRIP2

EN0

SKIPSEL

14

13

1

2

4

TONSEL

GND

15

1 2

VREF

VIN

3

2

VFB1

PGOOD

DRVH1DRVH2

DRVL1

VREG5

16

17

C529

2.2uF_25V

1

R1246

61.9K_1%

2

51125GND

POWERPAD1x1m

1

ENTRIP1

24

VO1

23 229

VBST1

21 20

LL1LL2

1912

U26

TI_TPS51125_QFN_24P

VCLK

18

PAD1005

+V5AL

5-,7-,14-

1 2

2VREF

1 2

51125GND

C1326

4.7uF_6.3V

5-,14-

C1342

1uF_6.3V

33-,40-

+VBATP

7-

RSMRST#

5-,8-,9-,10-,11-,13-,31-,40-

2 3 4

POWERPAD_4A

0.1uF_25V

R413

12

4.7_5%

0.1uF_16V

PAD1003

1

C11038

2

C1330

2200pF_50V

C526

VISHAY_SI7720DN_8P

+VBATR

1 2

51125GND

RF option

1

0.1uF_25V

2

C11037

For EMI

0.1uF_25V

R1248

12

10K_1%

1

C1328

2

5

Q42

41

R1247

12

15K_1%

65

87

D

G

Q1025

SIS412DN

41S23

6

87

D

G

S

23

C1329

1

2

4.7uF_25V

CYNTEC_PCMC063_3R3

1

C533 0402_OPEN

2

R383

0_5%_OPEN

12

EMI OPTION

+VBATP

C1332

4.7uF_25V

L36

1 2

7-

C1331

4.7uF_25V

12

C525

1uF_10V

1 2

PAD8

POWERPAD_2_0610

1

C524

330uF_6.3V

2

(6A)

+V5A

8-,9-,10-,11-,12-,13-,31-,35-,38-,39-

CHANGE by

Evan Shih 13-Apr-2009

INVENTEC

TITLE

Hublot_Discrete

System Power(+V5A/+V3A)

CODE

SIZE

A3

DOC. NUMBER

CS

1310A22593-0-MTR

SHEET

REV

A01

OF

607

5-,9-,10-,12-,13-,14-,33-,40-,42-,44-,47-

SLP_S3#_3R

VCCP_PG

R1272

0_5%

C1373

0402_OPEN

14-

7-,8-,9-,10-,11-,12-,13-,31-,35-,38-,39-

R5074

12

10_5%

R5075

2

1

330K_1%

12

1 2

C102

1 2

1uF_10V

U1026

1

EN_PSV TON VOUT V5FILT VFB PGOOD GND

DRVH

V5DRV

DRVL

PGND

VBST

TRIP

LL

TML

2 3 4 5 6 7

TI_TPS51117_QFN_14P

PAD1007

POWERPAD1x1m

+V5A

Q50

C5061

R158

12

1 2

2.2_5%

C5060

1uF_10V

14 13 12 11 10 9 8 15

12

0.1uF_16v

1

R159

15.4K_1%

2

VCCPGNDVCCPGND

SIS412DN

Q1030

FDS6690AS

+VBATR_CPU

11-

C551

4.7uF_25V

8

765

1

D

G

4

2

C550

4.7uF_25V

S

123

7654

8

D

G

S

123

1

2

C553

4.7uF_25V

L1020

12

PCMC063T_2R2MN

1

R1245

0_5%_OPEN

2

C1369

1 2

0.1uF_10V_OPEN

EMI OPTION

1 2

C548

0.1uF_25V

VCCPGND

1

C549

2200pF_50V

2

1

R5076

12.1K_1%

2

1

R5077

30K_1%

2

(10A)

+VCCP

11-,15-,16-,17-,18-,20-,21-,23-,24-,32-,35-,49-

PAD1006

POWERPAD_2_0610

1

C1375

220uF_2v_15mR_Panasonic

2

SLP_S4#_3R

V1.5_PG

14-,20-

12-,33-

C554

4.7uF_25V 1

2

8

D

S

123

8765

R410

D

0_5%_OPEN

S

C552

0.1uF_10V_OPEN

EMI OPTION

+VBATR

1 2

C555

4.7uF_25V

1

2

1 2

C557

2200pF_50V

1

C556

0.1uF_25V

2

L1019

12

PCMC063T_2R2MN

12

51117GND

R187

30.9K_1%

R5078

30K_1%

12-,13-,20-,23-,24-,26-,27-

POWERPAD_2_0610

1

C1318

470uF_2.5V

2

(10A)

+V1.5

PAD1004

5-,7-,9-,10-,11-,13-,31-,40-

7-,8-,9-,10-,11-,12-,13-,31-,35-,38-,39-

+V5A

R5070

12

10_5%

R459

2

1

0_5%

C5058

1 2

1uF_6.3v

51117GND

R157

12

300K_1%

U1025

1

EN_PSV TON VOUT V5FILT VFB PGOOD GND

VBST DRVH

TRIP

V5DRV

DRVL PGND

LL

TML

2 3 4 5 6 7

TI_TPS51117_QFN_14P

PAD1008

POWERPAD1x1m

SIS412DN

FDS6690AS

12

1

R5073

2

51117GND

15.4K_1%

C100

0.1uF_16v

12

1 2

R5072

2.2_5%

C5059

1uF_10V

14 13 12 11 10 9 8 15

Q48

Q1031

765

G

4

G

41

23

INVENTEC

TITLE

Hublot_Discrete

CHANGE by

Evan Shih

13-Apr-2009

System Power(+V1.5/+VCCP)

SIZE

A3

DOC. NUMBER

1310A22593-0-MTR A01

CS

SHEET

REVCODE

OF

608

(2.6A)

+VPCIE

51-,52-

POW_SW0

PAD1001

POWERPAD_2_0610

C39

1uF_10V

50-

1 2

1

C1015 22uF_6.3V

2

POWERPAD1x1m

SLP_S3#_3R

PAD1009

12

R1013

9.31K_1%

1

R1014 20K_1%

2

VGAP_AGND

5-,8-,10-,12-,13-,14-,33-,40-,42-,44-,47-

1

R1015 120K_1%

2

R1019

12

10K_1%

C8

12

10uF_6.3V

U5

2

NC

3

VLDO

4

VLDOFB

5

GND

6

ODOFF

7

OD

8

COMP

9

VOSW

21

TML-PAD

1

C1016

0.1uF_16V

2

R58

0_5%

+V1.8S

10-,50-,51-,52-,53-,54-,55-

20

1

VBST

VLDOIN

PGOOD

VSWFB

ENLDO

TI_TPS51511_RHL_20P

11

10

2

12

0_5%

DRVH

DRVL PGND

ENSW

R56

POW_SW1

+VBATR

5-,7-,8-,10-,11-,13-,31-,40-

RF option

8765

1

123

8

7

9

D

S

123

Q1

FDMS8670S

2

C1022

4.7uF_25V 1

2

1

R3

0_5%_OPEN

2

1

C9

0.1uF_10V_OPEN

2

C1021

4.7uF_25V

1 2

R1020

12

2.2_5%

19 18

LL

17 16

12

15

CS

14 13 12

9.76K_1%

12

1 C44

0.1uF_16V

V5IN

R1021

R1018

10K_5%

14-

2

VGA_PG

12

C1017

0.1uF_16V

+V5A

1 2

7-,8-,10-,11-,12-,13-,31-,35-,38-,39-

C45

4.7uF_6.3V

SI7230DN

Q1009

G

4

6

5

G

4

1

C1020

C1019

4.7uF_25V

2200pF_50V

2

L2

12

PCMC063T_1R0MN

1

C40 1000pF_50V

2

VGAP_AGND

1 R5023

8.06K_1% 2

1 R1016

30K_1% 2

1 2

1000pF_50V

C49

0.1uF_25V

1

R53 12K_1%

2

1 2

C42

Q18

SSM3K17FU

D

G

S

G

VGAP_AGND

1 2

0 0 1

R1041

2

1

1K_5%

C1049 1000pF_50V

POW_SW0

0 1 0

50-

POW_SW1

+VDD_CORE

1.05V

1.0V

0.95V

POWERPAD_2_0610

1

C56

330uF_2v_9mR_Panasonic

2

PAD2

(12A)

+VDD_CORE

52-

1

C1018 22uF_6.3V

2

CHANGE by

Evan Shih

13-Apr-2009

INVENTEC

TITLE

Hublot_Discrete

Graphic Power (+VDD_CORE & +VPCIE)

SIZE

CODE DOC. NUMBER

A3

CS

SHEET

OF

960

REV

A011310A22593-0-MTR

+VBATR

5-,7-,8-,9-,11-,13-,31-,40-

SLP_S3#_3R

R9574

5-,8-,9-,12-,13-,14-,33-,40-,42-,44-,47-

1

2

0_5%

1

C11032

2

0402_OPEN

V1.8S_PG

14-

1uF_6.3v

C11030

1 2

R9579

12

10_5%

U5002

1

EN_PSV

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

7

GND

TI_TPS51117_QFN_14P

PAD6003

POWERPAD1x1m

V1.8SGND

R9578

1

300K_1%

VBST DRVH

TRIP

V5DRV

DRVL PGND

TML

7-,8-,9-,11-,12-,13-,31-,35-,38-,39-

+V5A

2

12

1

2

V1.8SGND

R9576

11.8K_1%

C11029

0.1uF_16v

12

1 2

R9577

C11031

1uF_10v

0_5%

14 13 12

LL

11 10 9 8 15

SIS412DN

VISHAY_SI7720DN_8P

Q1053

Q1052

4.7uF_25v

G

41S23

5

G

4

C11024

8765

D

76

8

D

S

123

1

C11023

2

4.7uF_25v

1

R9575

0_5%_OPEN

2

1 2

C11026

0.1uF_10V_OPEN

1

2

C11028

2200pF_50V_OPEN

L5003

2

PCMC063T_2R2MN

1

C11027

0.1uF_25V_OPEN

2

1

12

R9581

43.2K_1%

1

2

V1.8SGND

R9580

30K_1%

9-,50-,51-,52-,53-,54-,55-

1

C11025

2

220uF_2.5V

(5A)

+V1.8S

PAD6002

POWERPAD_2_0610

INVENTEC

TITLE

Hublot_Discrete

VRAM Power (+V1.8S)

Evan Shih

13-Apr-2009

CODESIZE REVDOC. NUMBER

A3

CS

SHEETCHANGE by

10 60

A011310A22593-0-MTR

OF

5-,13-,14-,19-,29-,30-,33-,35-,37-,41-,42-,49-

11-

CSP1

2

C1172

1

47pF_50V

1 2

C1173

2

1

47pF_50V

11-

CSN1

11-

CSN2

1

2 C1175

47pF_50V

CSP2

AGND_VCORE

2 C1177

VSSSENSE

VCCSENSE

1 2

1

11-

18-

R1113

12

332_1%

C1174 47pF_50V

R1114

12

332_1%

R1115

2

1

332_1%

C1176 47pF_50V

R1116

12

332_1%

R1117

12

0_5%

R1120

12

0_5%

0402_OPEN

PM_DPRSLPVR

VR_PWRGD_CK505#

+V5S

PWR_GOOD_3

0_5%_OPEN

C1214

0.22uF_6.3V

1 2

AGND_VCORE

1

AGND_VCORE

2

1 2

1

C1180

2

AGND_VCORE

PM_PWROK

R1159

R1160

0_5%

C1179 0402_OPEN

C1178 0402_OPEN

H_DPRSTP#

H_VID6 H_VID5 H_VID4 H_VID3 H_VID2 H_VID1 H_VID0

1

2

AGND_VCORE

C1171

330pF_50V

12

AGND_VCORE

PSI#

20-,33-,40-

20-,33-

33-

5-,14-,40-,51-

PAD4

POWERPAD1x1m

5.1K_1%

1 2

R1118

12

20K_1%

R1164

0402_OPEN

17-,20-,32-

17-

18181818181818-

R278

12

0_5%

R1162

12

499_1%

R1156

12

0_5% R280

12

0_5%

R279

12

124K_1%

C1170

12

2.2uF_16V

R1112

1

2

41

PwPd

1

DROOP

2

VREF

3

GND

4

CSP1

5

U1011

CSN1

TI_TPS51620RHAR_QFN_40P

6

CSN2

7

CSP2

8

GNDSNS

9

VSNS

10

THERM

+VCCP

8-,15-,16-,17-,18-,20-,21-,23-,24-,32-,35-,49-

1

R1119 56_5%

1

2

R1161

12

30 29 28

LL1

27 26 25 24 23

LL2

22 21

+V3S

R1163

4.7_5%

12

R282

4.7_5%

C1215

0.22uF_16V 12

2

1

C1217

0.22uF_16V

+V5A

7-,8-,9-,10-,12-,13-,31-,35-,38-,39-

1 2

5-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

10K_5%_OPEN

TP7

35

33

38

32

34

31

37

36

40

39

ISLEW

V5FILT

VR_ON

DRVH1

PGOOD

TONSEL

OSRSEL

TRIPSEL

CLK_EN#

PWRMON

VBST1

DPRSLPVR

DRVL1

V5IN

PGND

DRVL2

VBST2 DRVH2

VID0

VID119VID2

VID316VID4

VID5

20

18

17

15

11

DPRSTP#

VR_TT#

12

PSI#

VID6

13

14

C363

68uF_25V

C1216

2.2uF_16V

C1218

2200pF_50V

+VBATR_CPU

8-

1

2

1 2

C1219

0.1uF_25V

POWERPAD_4A

C1249

4.7uF_25V

1 2

PAD1002

1

1 2

C1250

1 2

2 3 4

1 2

C1246

4.7uF_25V

C1248

1 2

C1252

1 2

C417

2200pF_50V

1 2

C1251

4.7uF_25V

+VBATR

5-,7-,8-,9-,10-,13-,31-,40-

PAD1012

11-

CSN1

1

R10024

2

0402_OPEN

11-

CSP1

1

C1253

0.1uF_25V

2

1 2

C1247

4.7uF_25V

5

4

41

G

23

4

5

6

G

4

G

23

G

23

8765

S

1

8D7

S

123

876

Q1021

TPCA8030_H

S

1

8765

D

Q34

TPCA8A04_H

S

Q1022

TPCA8030_H

Q35

TPCA8A04_H

CSP2

CSN2

0805_OPEN

C360

0603_OPEN

11-

R337

12

37.4K_1%

NTC_Thermistor, place near L29

1

R1202

0805_OPEN

2

1

C1254 0603_OPEN

2

1

R284

2

1 2

1

R10025

0402_OPEN

2

POWERPAD1x1m

1

C11034

0.015uF_10V

2

C409

12

0402_OPEN

R335

1

2

549K_1%

R336

12

220K_5%

SPM10040T_R36M170

R338

12

63.4K_1%

L29

1

2

L30

12

SPM10040T_R36M170

NTC_Thermistor, place near L30

1

C11033

2

0.015uF_10V

R341

12

220K_5%

549K_1%

2

R285 C364

12

0402_OPEN

POWERPAD1x1m

PAD1011

1

R340

12

37.4K_1%

R342

12

63.4K_1%

(36A) <35W>

+VCC_CORE

18-

CHANGE by

Evan Shih 13-Apr-2009

INVENTEC

TITLE

Hublot_Discrete

CPU Power (+VCC_CORE)

CODE

SIZE

A3

DOC. NUMBER

1310A22593-0-MTRA01

CS

SHEET

REV

OF

6011

SLP_S4#_3R

SLP_S3#_3R

8-,33-

5-,8-,9-,10-,13-,14-,33-,40-,42-,44-,47-

+V5A

7-,8-,9-,10-,11-,13-,31-,35-,38-,39-

+V1.5

8-,13-,20-,23-,24-,26-,27-

1 2

C1321

4.7uF_6.3V

(1A)

+V0.75S

26-,27-,28-

U1012

GMT_G2997F6U_MSOP10_10P

TML11VDDQSNS

10 2

VIN

9

S5 GND8PGND

7

S3

6

C1323 1uF_10V

1 2

VTTREF

C1324

0.1uF_16V

11 2

20-,26-,27-

VLDOIN

VTTSNS

VTT

1

3 4 5

M_VREF

1

C1320

2

10uF_6.3V

2

C1322 10uF_6.3V

NOTE: DDR3 REGULATOR

CHANGE by

Evan Shih 13-Apr-2009

INVENTEC

TITLE

Hublot_Discrete

DDR Termination Voltage (+V0.75S)

CODE

SIZE

A3

1310A22593-0-MTRA01

CS

OFSHEET

REVDOC. NUMBER

6012

5-,7-,13-,31-,33-,34-,35-,38-,44-,46-,48-

13-

GATE_3S

D18

BAT54

13

12

R424 120K_1%

+V3A

6 5

2

13

FDC655BN

C619

12

0.01uF_16V

(4.2A)

+V3S

5-,11-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

+V5A

Q55

4

D

S

G

GATE_3S

1

1 R477 47_5%

C622

10uF_6.3V

2

12

13-

R411 120K_1%

7-,8-,9-,10-,11-,12-,31-,35-,38-,39-

6 5

2

1

FDC655BN

C559

12

0.01uF_16V

(3.7A) (3A)

+V5S

5-,11-,14-,19-,29-,30-,33-,35-,37-,41-,42-,49-

Q51

4

D

S

3

G

R1101

120K_1%

13-

R412

100_5%

GATE_3S

1

C560

2

10uF_6.3V

1

2

12

1

2

C1161

0.01uF_16V

+V1.5

8-,12-,20-,23-,24-,26-,27-

6

D

5 2

13

FDC655BN

Q1051

G

S

R1098 100_5%

+V1.5S

4

18-,24-,35-,46-,47-,49-

1 2

10uF_6.3V

1

2

C1163

SLP_S3_3R

30-

SLP_S3#_3R

Q56

3

D

1

G

S

2

SSM3K7002F

C1337

0402_OPEN

SLP_S3#_3R

5-,7-,13-,31-,33-,34-,35-,38-,44-,46-,48-

5-,8-,9-,10-,12-,13-,14-,33-,40-,42-,44-,47-

1 2

Q1024

G

1

SSM3K7002F

+VBATR

5-,7-,8-,9-,10-,11-,13-,31-,40-

1

R1238 47K_5%

2

Q1027

MMBT3904

+V3A

1

R1240 100K_5%

2

3

D

S

2

3

C

1

B

E

SSM3K7002F

2

1

R1236 130K_1%

2

Q1028

Q1029

+VBATR

5-,7-,8-,9-,10-,11-,13-,31-,40-

1

R1239

2.7K_5%

2

E

1

B

C

3

MMBT3906

3

D

1

G

S

2

Q52

1

G

SSM3K7002F

R1225

12

1K_5%

3

D

S

2

1

R1222

1

D1013

MMGZ2548B2

2

1

2

0_5%

R1224 0_5%

13-

GATE_3S

Q29

1

G

SSM3K7002F

3

D

S

2

INVENTEC

TITLE

Hublot_Discrete

Power (Sleep: +V5S/+V3S/+V1.5S)

DOC. NUMBER

CODE

SIZE

A3

CHANGE by OF

Evan Shih

13-Apr-2009

CS

SHEET

13 60

REV

A011310A22593-0-MTR

9-

12

68.1K_1%

12

102K_1%

12

1K_5%

V1.8S_PG

VCCP_PG

R24

R23

1

R132 137K_1%

2

1

R135 10K_1%

2

12

R30

1K_5%

D1001

DAP202K

R19

10-

8-

R70

12

1M_5%

29.4K_1%

10K_1%

12

R15

12

10K_5%

R22

12

10K_5%

R18

12

10K_5%

49.9K_1%

+VADP

5-,14-

1

2

1

2

+VADP

5-,14-

1

R130

2

1

R136

2

3

R16

R74

22.6K_1%

R69 10K_1%

ON_LM393DR2G_SOP_8P

SLP_S3#_3R

NB_SM_PWROK

V1.5_PG

5-,8-,9-,10-,12-,13-,14-,33-,40-,42-,44-,47-

20-

1

8-,20-

3

VGA_PG

D10005

BAT54C

2

+V3S

5-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

+V5S

5-,11-,13-,14-,19-,29-,30-,33-,35-,37-,41-,42-,49-

5-

LS_100R VBIAS

1

2

C17

1

1000pF_50V

2

100K_5%

R27

12

20K_5%

5-

U1004-A

3

+

2

-

R5021

12

1M_5%

5

+

6

-

U1004-B

5-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

2VREF

5-,7-,14-

2

R21

1

C19

1 2

0.1uF_16V

+VADP

8

1

OUT

ON_LM393DR2G_SOP_8P

4

1

R68 47K_5%

2

8

CHENKO_LL4148_2P

7

OUT

4

1 2

5-,14-

1

R29 1_5%

2

C1003

5-

1uF_25V

1

2

D1002

1

ADP_EN#

+V5AL

5

+

6

-

R73 10K_5%

40-

2

R1004

220K_5%

R17

12

1M_5%

5-,7-,14-

8 U1002-B

7

OUT

ON_LM393DR2G_SOP_8P

4

ADP_ID

+VADP

5-,14-

1

R28 220K_5%

2

Q1005

1

G

1

SSM3K7002F

2

+V3S

1

R25 10K_5%

2

+V3AL

5-,6-,7-,14-,32-,40-,41-,46-,48-

1

R34 47K_5%

2

5-,8-,9-,10-,12-,13-,14-,33-,40-,42-,44-,47-

R5022

12

100K_5%

3

D

S

2

C18

1

1000pF_50V

2

C

1

B

E

5-,11-,40-,51-

5-

3

Q1006

D_MMST3904

2

40-

PWR_GOOD_3

SLP_S3#_3R BATCAL#

ADP_EN

R1088

23.7K_1%

R1087

51.1K_1%

+V3AL

5-,6-,7-,14-,32-,40-,41-,46-,48-

12

1

C1135

2200pF_50V

2

0.1uF_16V

71.5K_1%

3.48K_1%

OCP_OC

D1011

12

DAN202K

3

1

R1106

57.6K_1%

2

R1107

12

1M_5%

+V5AL

5-,7-,14-

R1089

12

23.7K_1%

12

+V5AL

5-,7-,14-

R82

12

1M_5%

12

R1108

Q1020

100K_5%

1

SSM3K7002F

1

C1165

2

+V3S

5-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

1

R184

2

R190

12

10K_5%

1

R1092

21K_1%

2

R1090

12

21K_1%

1

R1091

2

R188

12

47K_5%

2

C216

1

R195

12

470K_5%

Evan Shih 13-Apr-2009

5-

1uF_6.3V

CHANGE by

3 2

3

D

G

S

2

+V5S

5-,11-,13-,14-,19-,29-,30-,33-,35-,37-,41-,42-,49-

2

0.1uF_16V

1

8

+

OUT

-

U1002-A

4

ON_LM393DR2G_SOP_8P

2VREF

5-,7-,14-

12

1M_5%

9

+

8

-

12

1M_5%

11

+

10

-

C217

1

R1104

115K_1%

2

+V3AL

1

R189

OUT

R193

OUT

1

R191 10K_5%

3

2

14

U1007-C

ON_LM339DR2G_SOP_14P

12

+V3S

5-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

1

R186 10K_5%

3

2

13

U1007-D

ON_LM339DR2G_SOP_14P

12

5-,6-,7-,14-,32-,40-,41-,46-,48-

1

R1105 10K_5%

2

7-,40-

+V3AL

5-,6-,7-,14-,32-,40-,41-,46-,48-

1

6.04K_1%

2

1

R1102

2

VCC1_POR#_3

40-

Thermistor

ADP_PS0

ADP_PS1

INVENTEC

TITLE

Hublot_Discrete

Power (Sequence)

SIZE

A3

DOC. NUMBER

1310A22593-0-MTRA01

CS

SHEET

R1103

100K_5%

OF

_NTC

REVCODE

6014

(500mA)

+VCCP

8-,11-,15-,16-,17-,18-,20-,21-,23-,24-,32-,35-,49-

L1022

BLM18AG471SN1D

1

2

1

10uF_6.3V

2

Layout note: All decoupling 0.1uF disperse closed to pin

C1343

C569

C1401

1

0.1uF_16V

2

1

2

0.1uF_16V

1 2

0.1uF_16V

1 2

C1398C1396

0.1uF_16V

1 2

C570

0.1uF_16V

1 2

C1344

47pF_50V

(351mA)

+V3S

5-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

1

L1023

BLM18AG471SN1D

2

C1400

1 2

10uF_6.3V

1 2

0.1uF_16V

C1399

1 2

0.1uF_16V

C1345

1 2

0.1uF_16V

C1349

1 2

0.1uF_16V

C1336

1 2

0.1uF_16V

Layout note: All decoupling 0.1uF disperse closed to pin

C1404

RF option

C1348

1 2

47pF_50V

CPU_BSEL1

CPU_BSEL2

FSA

1 0 0

FSB

17-,2017-,20-

FSC

1

0

1

0

R438

12

FSB CLOCK FREQUENCY

667 800 1067

10K_5%_OPEN

10K_5%

R437

10K_5%

*CLKREQ# pin controls SRC Table.

Byte5:bit7=0 , disable CR#_A ; enable CR#_A

CR#_A

Byte5:bit6=0 (PWD)

SRC0

Byte5:bit4=0 (PWD) , disable CR#4 ; 1, enable CR#4

CR#_4

SRC4

+VCCP

8-,11-,15-,16-,17-,18-,20-,21-,23-,24-,32-,35-,49-

1

R431

2

1

R432 10K_5%

1

2

HOST CLOCK FREQUENCY

166 200 266

Byte5:bit6=1

SRC2

8-,11-,15-,16-,17-,18-,20-,21-,23-,24-,32-,35-,49-

CPU_BSEL0

17-,20-

RF option

12pF_50V_OPEN

CLK_R3S_ICH48

CLK_R3S_CARD48

CLK_R3S_KBC14

CLK_R3S_ICH14

CLK_R3S_MINICARD

CLK_R3S_KBPCI

33-

47-

403346-

40-

C1402

12pF_50V_OPEN

1 2

12pF_50V_OPEN

RF option

ICH_3S_SMCLK

ICH_3S_SMDATA

C1347

33pF_50V

CLK_PWRGD

1 2

3319-,26-,27-,33-,37-,5119-,26-,27-,33-,37-,51-

X1001

12

1

14.31818MHZ

2

30PPM

C1346 33pF_50V

Please place close to CLKGEN within 500mils

Byte5:bit5=0 (PWD) , disable CR#3 ; 1, enable CR#3

CR#_3

SRC3

Byte5:bit3=0 (PWD) , disable CR#6 ; 1, enable CR#6

CR#_6

SRC6

RF option

+VCCP

1

R1288

10K_5%_OPEN

R1289

12

2.2K_5%

12

C1403

R1287

R1286 33_5%

1

1 2

5-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

C1350

12pF_50V_OPEN

CLKREQ_SATA#

C578

2

CLKREQ_MCH#

CLKREQ_NC#

1

R1290

10K_5%

2

33_5%

12

R439

R10027

C5741

+V3S

2

5.6pF_50V

15-,2015-,33-

15-,47-

2

33_5%R1259

12

33_5%

12

33_5%

12 12

33_5%R1260

R430

12

10K_5%

CR#_7

CR#_9

CR#_10

CR#_11

U1013

62

VDDSRC_IO

52

VDDSRC_IO

38

VDDSRC_IO

23

VDD96_IO

55

VDDSRC

6

VDDREF

31

VDDPLL3_IO

66

VDDCPU_IO

CPUC2_ITP_LPR_SRCC8_LPR

19

VDD48

CPUT2_ITP_LPR_SRCT8_LPR VDDPCI VDDCPU VDDPLL3

USB_48MHZ_FSLA

2

FSLB_TEST_MODE

7

FSLC_TEST_SEL_REF0

8

REF1

PCI1 PCI2_TME PCI3

1

CK_PWRGD_PD#

SCLK

9

SDATA

5

X1

4

X2

GNDPCI GND48

3

GND GND GNDSRC GNDSRC GNDCPU GNDREF GNDSRC

NC CR#7

CR#3 CR#4 TML-PAD TML-PAD TML-PAD TML-PAD

SRCT2_LPR_SATAT_LPR

SRCC2_LPR_SATAC_LPR

27MHz_NonSS_SRCT1_LPR_SE1

27MHz_SS_SRCC1_LPR_SE2

SRCT0_LPR_DOTT_96_LPR

SRCC0_LPR_DOTC_96_LPR

ICS_ICS9LPRS397_MLF_72P

CLK_3S_ICH48

CPU_BSEL2_R_14M

CLK_ICH14

CLK_PCI_MINICARD

CLK_PCI_KBC

12 72 27

20

13 14 15

10

18 22 26 30 42 59 69

34

11 65 21 37 41 73 74 75 76

Byte5:bit2=0 (PWD) , disable CR#7 ; 1, enable CR#7

SRC8

Byte5:bit1=0 (PWD) , disable CR#9 ; 1, enable CR#9

SRC9

Byte5:bit0=0 (PWD) , disable CR#10 ; 1, enable CR#10

SRC10

Byte6:bit7=0 (PWD) , disable CR#11 ; 1, enable CR#11

SRC11

PCI_STOP#

CPU_STOP#

CPUT1_LPR_F CPUC1_LPR_F

CPUT0_LPR_F CPUC0_LPR_F

SRCT11_LPR SRCC11_LPF

SRCT10_LPR SRCC10_LPR

SRCT9_LPR

SRCC9_LPR

SRCT7_LPR

SRCC7_LPR

SRCT6_LPR

SRCC6_LPR

PCI4_27_Select PCI_F5_ITP_EN

SRCT4_LPR

SRCC4_LPR

SRCT3_LPR

SRCC3_LPR

CR#9CR#A CR#11 CR#10

CR#6

+V3S

5-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

1

R1258

10K_5%

54 53

68 67

71 70

63 64

48 47

50 51

44 45

61 60

57 56

CLK_3S_DEBUG

16

CLK_3S_ICHPCI

17

39 40

35 36

32 33

28 29

24 25

CLKREQ_LAN#

43 46 49 58

1

R1257 10K_5%

2

33_5%

12

5-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

+V3S

ITP_EN =0 SRC8/SRC8#

ITP_EN =1 ITP/ITP#

CLKREQ_MCH#

CLKREQ_SATA#

CLKREQ_NC#

CLKREQ_MINI_WLAN#

CHANGE by

R129212 R129133_5%

R491

2

10K_5%

Evan Shih

15-,2015-,3315-,47-

15-,46-

1

+V3S

R433

12

10K_5%

12

R1237

12 1

R1256

33-

PCISTOP#_3

33-

CPUSTOP#_3

21-

CLK_MCHBCLK

21-

CLK_MCHBCLK#

16-

CLK_CPUBCLK

16-

CLK_CPUBCLK#

46-

CLK_PCIE_MINI_WLAN

46-

CLK_PCIE_MINI_WLAN#

44-

CLK_PCIE_LAN

44-

CLK_PCIE_LAN#

20-

CLK_PEG_MCH

20-

CLK_PEG_MCH#

40-

CLK_R3S_DEBUG

34-

CLK_R3S_ICHPCI

47-

CLK_PCIE_NC

47-

CLK_PCIE_NC#

33-

CLK_PCIE_ICH

33-

CLK_PCIE_ICH#

32-

CLK_SATA1

32-

CLK_SATA1#

51-

CLK_PEG_REF

51-

CLK_PEG_REF#

44-

CLKREQ_LAN#

15-,46-

CLKREQ_MINI_WLAN#

27_Selet =0

LCD_SST 100MHZ

27_Selet =1

27MHZ non-spread clock

+V3S

5-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,39-,40-,41-,42-,43-,44-,46-,47-,48-,49-,51-,52-

10K_5% 10K_5%R1285 1 2 10K_5%R1254

2

10K_5%

INVENTEC

TITLE

Hublot_Discrete

Clock Generator

CODE

13-Apr-2009

SIZE

A3

CS

SHEET

DOC. NUMBER

OF

15 60

REV

A011310A22593-0-MTR

H_A#(35:3)

21-

H_A#(3) H_A#(4) H_A#(5) H_A#(6) H_A#(7) H_A#(8) H_A#(9) H_A#(10) H_A#(11) H_A#(12) H_A#(13) H_A#(14) H_A#(15) H_A#(16)

H_REQ#(4:0) H_RS#(2:0)

H_A#(17) H_A#(18) H_A#(19) H_A#(20) H_A#(21) H_A#(22) H_A#(23) H_A#(24) H_A#(25) H_A#(26) H_A#(27) H_A#(28) H_A#(29) H_A#(30) H_A#(31) H_A#(32) H_A#(33) H_A#(34) H_A#(35)

21-

H_ADSTB#0

H_REQ#(0) H_REQ#(1) H_REQ#(2) H_REQ#(3) H_REQ#(4)

H_ADSTB#1

H_STPCLK#

21-

32-

H_A20M#

32-

H_FERR#

32-

H_IGNNE#

3232-

H_INTR

32-

H_NMI

32-

H_SMI# CLK_CPUBCLK#

CN14-1

J4

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

ADDR GROUP 0

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

ADDR GROUP 1

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

ICH

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD01

N5

RESERVED

RSVD02

T2

RSVD03

V3

RSVD04

B2

RSVD05

C3

RSVD06

D2

RSVD07

D22

RSVD08

D3

RSVD09

F6

RSVD010

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

CONTROL

LOCK#

RESET#

RS0# RS1# RS2#

TRDY#

HIT#

HITM#

BPM0# BPM1# BPM2# BPM3# PRDY# PREQ#

TCK

TDI TDO TMS

XDP/ITP SIGNALS

TRST#

DBR#

THERMAL

PROCHOT#

THERMDA THERMDC

THERMTRIP#

H CLK

BCLK0 BCLK1

H1 E2 G5

H5 F21 E1

F1

D20 B3

H4

C1 F3 F4 G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20

D21 A24 B25

C7

A22 A21

PROCHOT#

TP1037 TP1038 TP1039 TP1040 TP1041

TP1042

TP1043

R345

10mils/10mils

212121-

21-

32-

21-

2121-

161616-

16-

33-

XDP_DBRESET#

+VCCP

8-,11-,15-,16-,17-,18-,20-,21-,23-,24-,32-,35-,49-

56_5%12

19-

H_THERMDA

19-

H_THERMDC

20-,32-

PM_THRMTRIP#

1515-

H_ADS# H_BNR# H_BPRI#

H_DEFER# H_DRDY# H_DBSY#

H_BREQ#0

H_INIT#

H_LOCK#

H_TRDY# H_HIT#

H_HITM#

H_BPM5_PREQ# H_TCK TDI_FLEX

H_TMS

CLK_CPUBCLK

+VCCP

8-,11-,15-,16-,17-,18-,20-,21-,23-,24-,32-,35-,49-

51 ohm +/-1% pull-up to +VCCP

1

2

(VCCP) if ITP is implemented.

R1167

R343

51_5%_OPEN

56_5%

1

2

Close to CPU.

H_CPURST#

21-

H_RS#(0) H_RS#(1) H_RS#(2)

+VCCP

FOX_PZ4782K_274M_41_478P

21-

8-,11-,15-,16-,17-,18-,20-,21-,23-,24-,32-,35-,49-

R1235

12

54.9_1%

R1229

12

54.9_1%

R1228

12

54.9_1%

R1227

12

54.9_1%

16-

H_BPM5_PREQ#

TDI_FLEX

H_TMS

H_TCK

GMCH CPU

ICH8

+VCCP

0"~2"

1"~6"

1"~10"

0"~2"

PM_THRMTRIP# should be T at CPU

CHANGE by

Evan Shih

13-Apr-2009

INVENTEC

TITLE

Hublot_Discrete

CPU Penryn-1

SIZE

A3

DOC. NUMBER

1310A22593-0-MTR A01

CS

SHEET

REVCODE

OF

6016

Layout note: Zo=55 ohm,

0.5" max for GTLREF.

H_D#(63:0)

+VCCP

8-,11-,15-,16-,18-,20-,21-,23-,24-,32-,35-,49-

1

R387

1K_1%

2

1

R386

2K_1%

2

17-,21-

GTLREF

212121-

17-,21-

2121-

15-,2015-,2015-,20-

H_DSTBN#0 H_DSTBP#0

H_DINV#0

H_DSTBN#1 H_DSTBP#1

H_DINV#1

CPU_BSEL0 CPU_BSEL1 PSI# CPU_BSEL2

H_D#(0) H_D#(1) H_D#(2) H_D#(3) H_D#(4) H_D#(5) H_D#(6) H_D#(7) H_D#(8) H_D#(9) H_D#(10) H_D#(11) H_D#(12) H_D#(13) H_D#(14) H_D#(15)

H_D#(16) H_D#(17) H_D#(18) H_D#(19) H_D#(20) H_D#(21) H_D#(22) H_D#(23) H_D#(24) H_D#(25) H_D#(26) H_D#(27) H_D#(28) H_D#(29) H_D#(30) H_D#(31)

TP1014 TP1013

1 2

C464

0.1uF_16V_OPEN

CN14-2

E22

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

DATA GRP 0

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

DATA GRP 1

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

C366

1 2

0.1uF_16V_OPEN

MISC

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

FOX_PZ4782K_274M_41_478P

Place the capacitance close to the TEST3,TEST5 pin. Make sure TEST3,TEST5 routing is reference to GND and away from other noisy signals.

D32# D33# D34# D35# D36# D37# D38# D39# D40#

DATA GRP 2DATA GRP 3

D41# D42# D43# D44# D45# D46#

D47# DSTBN2# DSTBP2#

DINV2#

D48#

D49#

D50#

D51#

D52#

D53#

D54#

D55#

D56#

D57#

D58#

D59#

D60#

D61#

D62#

D63# DSTBN3# DSTBP3#

DINV3#

COMP0 COMP1 COMP2 COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

CPU_COMP0

R26

CPU_COMP1

U26

CPU_COMP2

AA1

CPU_COMP3

Y1

E5 B5 D24 D6 D7 AE6

R389

R388 R1165 R1166

H_D#(32) H_D#(33) H_D#(34) H_D#(35) H_D#(36) H_D#(37) H_D#(38) H_D#(39) H_D#(40) H_D#(41) H_D#(42) H_D#(43) H_D#(44) H_D#(45) H_D#(46) H_D#(47)

H_D#(48) H_D#(49) H_D#(50) H_D#(51) H_D#(52) H_D#(53) H_D#(54) H_D#(55) H_D#(56) H_D#(57) H_D#(58) H_D#(59) H_D#(60) H_D#(61) H_D#(62) H_D#(63)

12

27.4_1%

12

54.9_1%

12

27.4_1%

12

54.9_1%

11-,20-,32-

212121-21-

Close to CPU. COMP0, 2: 18mils.

32-

H_DPSLP#

21-

H_DPWR#

21-

H_CPUSLP#

11-

17-,21-

212121-

17-,21-

H_DSTBN#3 H_DSTBP#3 H_DINV#3

H_DPRSTP#

H_D#(63:0)

H_DSTBN#2 H_DSTBP#2 H_DINV#2

H_D#(63:0)

32-

H_PWRGD

CHANGE by

Evan Shih 13-Apr-2009

INVENTEC

TITLE

Hublot_Discrete

CPU Penryn-2

DOC. NUMBERSIZE

CODE

A3

CS

1310A22593-0-MTR

REV

A01

OFSHEET

6017

+VCC_CORE

C5028

22uF_6.3V_OPEN

(36A) <35W>

+VCC_CORE

11-,18-

CN14-3

A7

VCC001

A9

VCC002

A10

VCC003

A12

VCC004

A13

VCC005

A15

VCC006

1 2

C5027

22uF_6.3V_OPEN

1 2

C5026

22uF_6.3V

1 2

C5025

22uF_6.3V

1 2

C5024

22uF_6.3V

1 2

C5023

22uF_6.3V

1

C5022

3

900uF_2.5V

2

A17

VCC007

A18

VCC008

A20

VCC009

B7

VCC010

B9

VCC011

B10

VCC012

B12

VCC013

B14

VCC014

B15

VCC015

B17

VCC016

B18

VCC017

B20

VCC018

C9

VCC019

C10

VCC020

C12

VCC021

C13

VCC022

C15

VCC023

C17

VCC024

C18

VCC025

D9

VCC026

D10

VCC027

D12

VCC028

D14

VCC029

D15

VCC030

D17

VCC031

D18

VCC032

E7

VCC033

E9

VCC034

E10

VCC035

E12

VCC036

E13

VCC037

E15

VCC038

E17

VCC039

E18

VCC040

E20

VCC041

F7

VCC042

F9

VCC043

F10

VCC044

F12

VCC045

F14

VCC046

F15

VCC047

F17

VCC048

F18

VCC049

F20

VCC050

AA7

VCC051

AA9

VCC052

AA10

VCC053

AA12

VCC054

AA13

VCC055

AA15

VCC056

AA17

VCC057

AA18

VCC058

AA20

VCC059

AB9

VCC060

AC10

VCC061

AB10

VCC062

AB12

VCC063

AB14

VCC064

AB15

VCC065

AB17

VCC066

AB18

VCC067

FOX_PZ4782K_274M_41_478P

VCC068 VCC069 VCC070 VCC071 VCC072 VCC073 VCC074 VCC075 VCC076 VCC077 VCC078 VCC079 VCC080 VCC081 VCC082 VCC083 VCC084 VCC085 VCC086 VCC087 VCC088 VCC089 VCC090 VCC091 VCC092 VCC093 VCC094 VCC095 VCC096 VCC097 VCC098 VCC099

VCC0100

VCCP01 VCCP02 VCCP03 VCCP04 VCCP05 VCCP06 VCCP07 VCCP08 VCCP09 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16

VCCA01 VCCA02

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6

VID0

AF5

VID1

AE5

VID2

AF4

VID3

AE3

VID4

AF3

VID5

AE2

VID6

AF7

AE7

11-,18-

1

C10013

0.1uF_16V_OPEN

2

4.5A - before Vcc stable.

2.5A - after Vcc stable.

+VCCP

8-,11-,15-,16-,17-,18-,20-,21-,23-,24-,32-,35-,49-

1

C443

220uF_2.5v

2

11-

H_VID0

11-

H_VID1

11-

H_VID2

11-

H_VID3

11-

H_VID4

11-

H_VID5

11-

H_VID6

+VCC_CORE

11-,18-

1

R288 100_1%

2

1

R287 100_1%

2

11-

+VCCP

8-,11-,15-,16-,17-,18-,20-,21-,23-,24-,32-,35-,49-

C440

1 2

0.1uF_16V

VCCSENSE

VSSSENSE

PLACE THESE INSIDE SOCKET CAVITY ON L8 (NORTH SIDE SECONDARY)

C444

C441

1

2

0.1uF_16V

LAYOUT NOTE: PLACE C1312 & C1469 NEAR PIN B26

C439

1 2

0.1uF_16V

C1312

0.01uF_16V

C442

1 2

0.1uF_16V

(130mA)

+V1.5S

13-,24-,35-,46-,47-,49-

1 2

C445

1 2

0.1uF_16V

1

C1469

10uF_6.3V

2

LAYOUT NOTE: ROUTE VCCSENSE AND VSSSENSE TRACE AT

24.7 OHM WITH 50 MIL SPACEING PLACE PU AND PD WITHIN I INCH OF CPU

CHANGE by

INVENTEC

TITLE

Hublot_Discrete

CPU Penryn-3

SIZE

CODE

13-Apr-2009Evan Shih

A3

DOC. NUMBER

CS

1310A22593-0-MTR

SHEET

18 60

REV

A01

OF