GE Industrial Solutions Austin SuperLynx II 12V SIP User Manual

Data Sheet October 1, 2009

Austin SuperLynx

8.3Vdc – 14Vdc input; 0.75Vdc to 5.5Vdc Output; 16A Output Current

TM

II 12V SIP Non-isolated Power Modules:

RoHS Compliant

EZ-SEQUENCE

TM

Applications

 Distributed power architectures

 Intermediate bus voltage applications

 Telecommunications equipment

 Servers and storage applications

 Networking equipment

 Enterprise Networks

 Latest generation IC’s (DSP, FPGA, ASIC) and

Microprocessor powered applications

Features

 Compliant to RoHS EU Directive 2002/95/EC (-Z

versions)

 Compliant to ROHS EU Directive 2002/95/EC with

lead solder exemption (non-Z versions)

 Flexible output voltage sequencing EZ-

SEQUENCE

 Delivers up to 16A output current

 High efficiency – 92% at 3.3V full load (V

 Small size and low profile:

50.8 mm x 12.7 mm x 8.1 mm

(2.00 in x 0.5 in x 0.32 in)

 Low output ripple and noise

 Constant switching frequency (300KHz)

 High Reliability:

Calculated MTBF = 9.2M hours at 25

 Programmable Output voltage

 Line Regulation: 0.3% (typical)

 Load Regulation: 0.4% (typical)

 Temperature Regulation: 0.4 % (typical)

 Remote On/Off

 Remote Sense

 Output overcurrent protection (non-latching)

 Wide operating temperature range (-40°C to 85°C)

 UL* 60950-1Recognized, CSA

60950-1-03 Certified, and VDE (EN60950-1) Licensed

 ISO** 9001 and ISO 14001 certified manufacturing

facilities

TM

= 12.0V)

IN

o

C Full-load

†

C22.2 No.

‡

0805:2001-12

Description

Austin SuperLynxTM II 12V SIP (single in-line package) power modules are non-isolated dc-dc converters that can deliver up to 16A of output current with full load efficiency of 92% at 3.3V output. These modules provide a precisely regulated output voltage programmable via an external resistor from 0.75Vdc to 5.0Vdc over a wide range of input voltage (V designers to implement various types of output voltage sequencing when powering multiple modules on board. Their open-frame construction and small footprint enable designers to develop cost- and space-efficient solutions.

* UL is a re gistered trademark of Underwriters Laboratories, Inc.

†

CSA is a reg istered trademark of Canadian Standards Associ ation.

‡

VDE is a t rademark of Verband Deutscher Elektrotechniker e.V.

** ISO is a registered trademark of the International Orga nization of Standards

= 8.3 – 14Vdc). Austin SuperLynxTM II has a sequencing feature, EZ-SEQUENCETM that enable

IN

Document No: DS04-022 ver. 1.22

PDF name: superlynx_II_sip_12v_ds.pdf

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

TM

II 12V SIP Non-isolated Power Modules:

Absolute Maximum Ratings

Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only, functional operation of the device is not implied at these or any other conditions in excess of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect the device reliability.

Parameter Device Symbol Min Max Unit

Input Voltage All V

Continuous

IN

Sequencing voltage All Vseq -0.3 V

Operating Ambient Temperature All T

A

-0.3 15 Vdc

Vdc

IN,max

-40 85 °C

(see Thermal Considerations section)

Storage Temperature All T

stg

-55 125 °C

Electrical Specifications

Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature conditions.

Parameter Device Symbol Min Typ Max Unit

Operating Input Voltage Vo,set ≤ 3.63 VIN 8.3 12.0 14.0 Vdc

Vo,set > 3.63 VIN 8.3 12.0 13.2 Vdc

Maximum Input Current All I

(VIN= V

IN, min

to V

IN, max

, IO=I

)

O, max

Input No Load Current Vo = 0.75Vdc I

(VIN = V

, Io = 0, module enabled) Vo = 5.0Vdc I

IN, nom

IN,max

IN,No load

10 Adc

40 mA

100 mA

Input Stand-by Current All I

(VIN = V

, module disabled)

IN, nom

2 mA

IN,stand-by

Inrush Transient All I2t 0.4 A2s

Input Reflected Ripple Current, peak-to-peak (5Hz to 20MHz, 1μH source impedance; V

= I

to 14V,

; See Test configuration section)

IO

Omax

=10V

IN

All 30 mAp-p

Input Ripple Rejection (120Hz) All 30 dB

CAUTION: This power module is not internally fused. An input line fuse must always be used.

This power module can be used in a wide variety of applications, ranging from simple standalone operation to being part of a complex power architecture. To preserve maximum flexibility, internal fusing is not included, however, to achieve maximum safety and system protection, always use an input line fuse. The safety agencies require a fastacting fuse with a maximum rating of 15 A (see Safety Considerations section). Based on the information provided in this data sheet on inrush energy and maximum dc input current, the same type of fuse with a lower rating can be used. Refer to the fuse manufacturer’s data sheet for further information.

LINEAGE POWER 2

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

TM

II 12V SIP Non-isolated Power Modules:

Electrical Specifications (continued)

Parameter Device Symbol Min Typ Max Unit

Output Voltage Set-point All V

(VIN=

IN, min

, IO=I

, TA=25°C)

O, max

Output Voltage All V

(Over all operating input voltage, resistive load, and temperature conditions until end of life)

Adjustment Range All V

Selected by an external resistor

O, set

O

Output Regulation

Line (VIN=V

Load (IO=I

Temperature (T

IN, min

O, min

to V

to I

ref=TA, min

) All

IN, max

) All

O, max

to T

) All ⎯ 0.4

A, max

Output Ripple and Noise on nominal output

(VIN=V

IN, nom

and IO=I

O, min

to I

O, max

Cout = 1μF ceramic//10μFtantalum capacitors)

RMS (5Hz to 20MHz bandwidth)

Peak-to-Peak (5Hz to 20MHz bandwidth)

RMS (5Hz to 20MHz bandwidth)

Peak-to-Peak (5Hz to 20MHz bandwidth)

External Capacitance

ESR ≥ 1 mΩ All C

ESR ≥ 10 mΩ All C

Output Current All I

Output Current Limit Inception (Hiccup Mode ) All I

(VO= 90% of V

)

O, set

Output Short-Circuit Current All I

(VO≤250mV) ( Hiccup Mode )

Efficiency V

VIN= V

IO=I

, TA=25°C V

IN, nom

= V

O, max , VO

V

O,set

V

Switching Frequency All f

Vo ≤ 3.63

Vo = 5.0V

= 0.75Vdc η 79.0 %

O, set

= 1.2Vdc η 85.0 %

O, set

= 1.5Vdc η 87.0 %

O,set

= 1.8Vdc η 88.0 %

O,set

= 2.5Vdc η 90.5 %

O,set

= 3.3Vdc η 92.0 %

O,set

= 5.0Vdc η 94.0 %

O,set

O, max

o

O, lim

O, s/c

sw

Dynamic Load Response

(dIo/dt=2.5A/μs; VIN = V

IN, nom

; TA=25°C)

Load Change from Io= 50% to 100% of Io,max; 1μF ceramic// 10 μF tantalum

All V

pk

Peak Deviation

Settling Time (Vo<10% peak deviation)

(dIo/dt=2.5A/μs; VIN = V

IN, nom

; TA=25°C)

Load Change from Io= 100% to 50%of Io,max: 1μF ceramic// 10 μF tantalum

All t

All V

s

pk

Peak Deviation

Settling Time (Vo<10% peak deviation)

All t

s

-2.0 V

-2.5%

+2.0 % V

O, set

⎯

+3.5% % V

0.7525 5.5 Vdc

⎯

0.3

0.4

⎯

12 30 mV

30 75 mV

25 40 mV

70 100 mV

% V

⎯ ⎯

1000 μF

5000 μF

0 16 Adc

⎯

180

3

⎯

300

200

25

200

25

⎯

⎯ μs

⎯

⎯ μs

pk-pk

% I

Adc

kHz

mV

O, set

rms

o

LINEAGE POWER 3

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

TM II

12V SIP Non-isolated Power Modules:

Electrical Specifications (continued)

Parameter Device Symbol Min Typ Max Unit

Dynamic Load Response

(dIo/dt=2.5A/μs; V VIN = V

Load Change from Io= 50% to 100% of Io,max; Co = 2x150 μF polymer capacitors

Peak Deviation

Settling Time (Vo<10% peak deviation)

(dIo/dt=2.5A/μs; VIN = V

Load Change from Io= 100% to 50%of Io,max: Co = 2x150 μF polymer capacitors

Peak Deviation

Settling Time (Vo<10% peak deviation)

IN, nom

; TA=25°C)

All V

All t

All V

All t

pk

s

pk

s

⎯

100

50

100

50

⎯

⎯ μs

⎯

⎯ μs

mV

General Specifications

Parameter Min Typ Max Unit

Calculated MTBF (IO=I

Telecordia SR-332 Issue 1: Method 1 Case 3

Weight

, TA=25°C) 9,230,550 Hours

O, max

⎯

5.6 (0.2)

⎯

g (oz.)

LINEAGE POWER 4

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

TM

II 12V SIP Non-isolated Power Modules:

Feature Specifications

Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature conditions. See Feature Descriptions for additional information.

Parameter Device Symbol Min Typ Max Unit

On/Off Signal interface

Device code with Suffix “4” – Positive logic

(On/Off is open collector/drain logic input; Signal referenced to GND - See feature description

Input High Voltage (Module ON) All VIH ― ― V

Input High Current All IIH ― ― 10 μA

Input Low Voltage (Module OFF) All VIL -0.2 ― 0.3 V

Input Low Current All IIL ― 0.2 1 mA

Device Code with no suffix – Negative Logic

(On/OFF pin is open collector/drain logic input with

external pull-up resistor; signal referenced to GND)

Input High Voltage (Module OFF) All VIH 2.5 ― V

Input High Current All IIH 0.2 1 mA

Input Low Voltage (Module ON) All VIL -0.2 ― 0.3 Vdc

Input low Current All IIL ― 10 μA

Turn-On Delay and Rise Times

(IO=I

Case 1: On/Off input is set to Logic Low (Module

O, max , VIN

= V

= 25 oC, )

IN, nom, TA

All Tdelay ― 3 ― msec ON) and then input power is applied (delay from instant at which V

Case 2: Input power is applied for at least one second

=V

IN

until Vo=10% of Vo,set)

IN, min

All Tdelay ― 3 ― msec and then the On/Off input is set to logic Low (delay from

instant at which Von/Off=0.3V until Vo=10% of Vo, set)

Output voltage Rise time (time for Vo to rise from 10% of V

o,set to 90% of Vo, set)

All Trise

Output voltage overshoot – Startup ―

IO= I

; VIN = 8.3 to 14Vdc, TA = 25 oC

O, max

Sequencing Delay time

Delay from V

to application of voltage on SEQ pin All TsEQ-delay 10 msec

IN, min

V

IN, max

Vdc

IN,max

― 4 6 msec

1

% V

O, set

Tracking Accuracy (Power-Up: 2V/ms) All

(Power-Down: 1V/ms) All

(V

to V

IN, min

Overtemperature Protection

IN, max

; I

to I

O, min

VSEQ < Vo)

O, max

All T

(See Thermal Consideration section)

Input Undervoltage Lockout

Turn-on Threshold All

Turn-off Threshold All

SEQ –Vo |

|V

SEQ –Vo |

|V

ref

100 200 mV

300 500 mV

⎯

125

⎯

°C

7.9 V

7.8 V

LINEAGE POWER 5

Data Sheet

O

(A)

)

October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

TM II

12V SIP Non-isolated Power Modules:

Characteristic Curves

The following figures provide typical characteristics for the Austin SuperLynxTM II 12V SIP modules at 25ºC.

90

88

86

84

82

80

78

76

74

EFFICIENCY, (η)

72

70

0 4 8 12 16

Vin=14V

Vin=12V

Vin=10V

OUTPUT CURRENT, IO (A)

Figure 1. Converter Efficiency versus Output Current (Vout = 1.2Vdc).

90

88

86

84

82

80

78

76

74

EFFICIENCY, (η)

72

70

Vin=14V

Vin=12V

Vin=10V

04 81216

OUTPUT CURRENT, I

Figure 2. Converter Efficiency versus Output Current (Vout = 1.5Vdc).

94

92

90

88

86

84

82

80

78

EFFICIENCY, (η)

76

74

0 4 81216

Vin=14V

Vin=12V

OUTPUT CURRENT, IO (A)

Figure 4. Converter Efficiency versus Output Current (Vout = 2.5Vdc).

94

92

90

88

86

84

82

80

78

EFFICIENCY, (η)

76

74

0481216

Vin=14V

Vin=12V

Vin=10V

OUTPUT CURRENT, IO (A

Figure 5. Converter Efficiency versus Output Current (Vout = 3.3Vdc).

Vin=10V

92

90

88

86

84

82

80

78

76

EFFICIENCY, (η)

74

72

0481216

Vin=14V

Vin=12V

Vin=10V

OUTPUT CURRENT, IO (A)

Figure 3. Converter Efficiency versus Output Current (Vout = 1.8Vdc).

96

94

92

90

88

86

84

82

80

78

EFFICIENCY, (η)

76

74

0481216

Vin=14V

Vin=12V

Vin=10V

OUTPUT CURRENT, IO (A)

Figure 6. Converter Efficiency versus Output Current (Vout =5.0Vdc).

LINEAGE POWER 6

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

TM

II 12V SIP Non-isolated Power Modules:

Characteristic Curves (continued)

The following figures provide typical characteristics for the SuperLynxTM II 12V SIP modules at 25ºC.

9

8

7

(A)

6

IN

5

4

3

2

1

INPUT CURRENT, I

0

7 8 91011121314

INPUT VOLTAGE, VIN (V)

Figure 7. Input Voltage vs. Input Current

(Vo = 3.3 Vdc).

Io = 16 A

Io=8A

Io=0 A

(V) (200mV/div)

O

(A) (2A/div) V

O

OUTPUT CURRENT, OUTPUT VOLTAGE

I

TIME, t (5μs/div)

Figure 10. Transient Response to Dynamic Load Change from 50% to 100% of full load (Vo = 3.3Vdc).

(V) (20mV/div)

O

V

OUTPUT VOLTAGE

TIME, t (2μs/div)

Figure 8. Typical Output Ripple and Noise

(Vin = 12V dc, Vo = 2.5 Vdc, Io=16A).

(V) (20mV/div)

O

OUTPUT VOLTAGE

V

TIME, t (2μs/div)

Figure 9. Typical Output Ripple and Noise

(Vin = 12V dc, Vo = 3.3Vdc, Io=16A).

(V) (200mV/div)

O

(A) (2A/div) V

O

OUTPUT CURRENT, OUTPUT VOLTAGE

I

TIME, t (5μs/div)

Figure 11. Transient Response to Dynamic Load Change from 100% to 50% of full load (Vo = 3.3Vdc).

(V) (200mV/div)

O

(A) (2A/div) V

O

OUTPUT CURRENT, OUTPUT VOLTAGE

I

TIME, t (10μs/div)

Figure 12. Transient Response to Dynamic Load Change from 50% to 100% of full load (Vo =3.3Vdc, Cext = 2x150 μF Polymer Capacitors).

LINEAGE POWER 7

Data Sheet

μF)

(

October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

TM II

12V SIP Non-isolated Power Modules:

Characteristic Curves (continued)

The following figures provide typical characteristics for the Austin SuperLynxTM II 12V SIP modules at 25ºC.

(V) (200mV/div)

O

(A) (2A/div) V

O

I

OUTPUT CURRENT, OUTPUT VOLTAGE

TIME, t (10μs/div)

Figure 13. Transient Response to Dynamic Load Change from 100% of 50% full load (Vo = 3.3Vdc, Cext = 2x150 μF Polymer Capacitors)

(V) (5V/div)

On/off

V) (2V/div) V

O

V

OUTPUT VOLTAGE On/Off VOLTAGE

TIME, t 2ms/div)

Figure 14. Typical Start-Up Using Remote On/Off

(Vin = 12Vdc, Vo = 5.0Vdc, Io =16A).

(V) (5V/div)

IN

(V) (2V/div) V

o

OUTPUT VOLTAGE, INPUT VOLTAGE

V

TIME, t (2 ms/div)

Figure 16. Typical Start-Up with application of Vin with low-ESR polymer capacitors at the output (7x150 μF) (Vin = 12Vdc, Vo = 5.0Vdc, Io = 16A, Co = 1050

.

V) (1V/div)

O

V

OUTPUT VOLTAGE

TIME, t (2ms/div)

Figure 17. Typical Start-Up with Prebias (Vin = 12Vdc, Vo = 2.5Vdc, Io = 1A, Vbias =1.2 Vdc).

(V) (5V/div)

On/off

(A) (10A/div)

O

V) (2V/div) V

O

V

OUTPUT VOLTAGE On/Off VOLTAGE

F

igure 15. Typical Start-Up Using Remote On/Off with

Low-ESR external capacitors (7x150uF Polymer)

TIME, t (2ms/div)

OUTPUT CURRENT,

I

TIME, t (10ms/div)

Figure 18. Output short circuit Current

(Vin = 12Vdc, Vo = 0.75Vdc).

Vin = 12Vdc, Vo = 5.0Vdc, Io = 16A, Co = 1050μF).

LINEAGE POWER 8

Data Sheet

A

O

A

O

October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

TM

II 12V SIP Non-isolated Power Modules:

Characteristic Curves (continued)

The following figures provide thermal derating curves for the Austin SuperLynxTM II 12V SIP modules.

18

16

14

12

10

NC

8

100 LFM

6

200 LFM

4

300 LFM

2

400 LFM

0

OUTPUT CURRENT, Io (A)

20 30 40 50 60 70 80 90

AMBIENT TEMPERATURE, T

C

Figure 19. Derating Output Current versus Local Ambient Temperature and Airflow (Vin = 12Vdc, Vo=0.75Vdc).

OUTPUT CURRENT, Io (A)

18

16

14

12

10

NC

8

100 LFM

6

200 LFM

4

300 LFM

2

400 LFM

0

20 30 40 50 60 70 80 90

AMBIENT TEMPERATURE, TA OC

Figure 20. Derating Output Current versus Local Ambient Temperature and Airflow (Vin = 12Vdc, Vo=1.8 Vdc).

18

16

14

12

10

NC

8

100 LFM

6

200 LFM

4

300 LFM

2

400 LFM

0

OUTPUT CURRENT, Io (A)

20 30 40 50 60 70 80 90

AMBIENT TEMPERATURE, TA OC

Figure 21. Derating Output Current versus Local Ambient Temperature and Airflow

(Vin = 12Vdc, Vo=3.3

Vdc).

Figure 22. Derating Output Current versus Local Ambient Temperature and Airflow (Vin = 12dc, Vo=5.0 Vdc).

18

16

14

12

10

NC

8

100 LFM

6

200 LFM

4

300 LFM

2

400 LFM

0

OUTPUT CURRENT, Io (A)

20 30 40 50 60 70 80 90

AMBIENT TEMPERATURE, T

C

LINEAGE POWER 9

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

Test Configurations

TO OSCILLOSCOPE

L

TEST

1μH

CS 1000μF

BATTERY

NOTE: Measure input reflected ripple current with a simulated

Electrolytic

E.S.R.<0.1Ω

@ 20°C 100kHz

source induct anc e (L possible battery impedance. Measure current as shown above.

) of 1μH. Capacit or CS offsets

TEST

Figure 23. Input Reflected Ripple Current Test Setup.

COPPER STRIP

V

(+)

O

1uF .

COM

NOTE: All voltage measurements to be take n at the module

terminals, as shown above. If s ockets are used then Kelvin connections are required at the module terminals to avoid measurement errors due to socket contact resistance.

10uF

GROUND PLANE

Figure 24. Output Ripple and Noise Test Setup.

R

contact

distribution

R

distribution

R

contact

VIN(+)

V

IN

COM

2x100μF Tantalum

SCOPE

V

O

COM

CURRENT PROBE

CIN

RESISTIVE LOAD

V

O

VIN(+)

COM

R

contactRdistribution

R

contactRdistribution

R

LOAD

TM II

12V SIP Non-isolated Power Modules:

Design Considerations

Input Filtering

The Austin SuperLynxTM II 12V SIP module should be connected to a low-impedance source. A highly inductive source can affect the stability of the module. An input capacitance must be placed directly adjacent to the input pin of the module, to minimize input ripple voltage and ensure module stability.

In a typical application, 6x47 µF low-ESR tantalum capacitors (AVX part #: TPSE476M025R0100, 47µF 25V 100 mΩ ESR tantalum capacitor) will be sufficient to provide adequate ripple voltage at the input of the module. To further minimize ripple voltage at the input, very low ESR ceramic capacitors are recommended at the input of the module. Figure 26 shows input ripple voltage (mVp-p) for various outputs with 6x47 µF tantalum capacitors and with 6x22 µF ceramic capacitor (TDK part #: C4532X5R1C226M) at full load.

350

300

250

200

150

10 0

50

Input Ripple Voltage (mVp-p)

0

012 3456

Tantalum

Cer ami c

Output Voltage (Vdc)

Figure 26. Input ripple voltage for various output with 6x47 µF tantalum capacitors and with 6x22 µF ceramic capacitors at the input (full load).

NOTE: All volt age meas urements to be taken at th e module

terminals , as shown above. If socket s are us ed then Kelvin conn ections are requir ed at the modu le termi nals to avoid m eas urement errors due to socket c ontact resistance.

Figure 25. Output Voltage and Efficiency Test Setup.

V

. I

O

Efficiency

=

η

VIN. I

O

IN

x 100 %

LINEAGE POWER 10

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

Design Considerations (continued)

Output Filtering

The Austin SuperLynxTM II 12V SIPmodule is designed for low output ripple voltage and will meet the maximum output ripple specification with 1 µF ceramic and 10 µF tantalum capacitors at the output of the module. However, additional output filtering may be required by the system designer for a number of reasons. First, there may be a need to further reduce the output ripple and noise of the module. Second, the dynamic response characteristics may need to be customized to a particular load step change.

To reduce the output ripple and improve the dynamic response to a step load change, additional capacitance at the output can be used. Low ESR polymer and ceramic capacitors are recommended to improve the dynamic response of the module. For stable operation of the module, limit the capacitance to less than the maximum output capacitance as specified in the electrical specification table.

TM

II 12V SIP Non-isolated Power Modules:

Safety Considerations

For safety agency approval the power module must be installed in compliance with the spacing and separation requirements of the end-use safety agency standards, i.e., UL 60950-1, CSA C22.2 No. 60950-1-03, and VDE 0850:2001-12 (EN60950-1) Licensed.

For the converter output to be considered meeting the requirements of safety extra-low voltage (SELV), the input must meet SELV requirements. The power module has extra-low voltage (ELV) outputs when all inputs are ELV.

The input to these units is to be provided with a fastacting fuse with a maximum rating of 6A in the positive input lead

.

LINEAGE POWER 11

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

Feature Descriptions

Remote On/Off

Austin SuperLynxTM II 12V SIP power modules feature an On/Off pin for remote On/Off operation. Two On/Off logic options are available in the Austin SuperLynx signal, device code suffix “4”, turns the module ON during a logic High on the On/Off pin and turns the module OFF during a logic Low. Negative logic On/Off signal, no device code suffix, turns the module OFF during logic High and turns the module ON during logic Low.

For positive logic modules, the circuit configuration for using the On/Off pin is shown in Figure 27. The On/Off pin is an open collector/drain logic input signal (Von/Off) that is referenced to ground. During a logichigh (On/Off pin is pulled high internal to the module) when the transistor Q1 is in the Off state, the power module is ON. Maximum allowable leakage current of the transistor when Von/off = V Applying a logic-low when the transistor Q1 is turnedOn, the power module is OFF. During this state VOn/Off must be less than 0.3V. When not using positive logic On/off pin, leave the pin unconnected or tie to V

I

ON/OFF

Figure 27. Circuit configuration for using positive logic On/OFF.

For negative logic On/Off devices, the circuit configuration is shown is Figure 28. The On/Off pin is pulled high with an external pull-up resistor (typical R

pull-up = 68k, +/- 5%). When transistor Q1 is in the

Off state, logic High is applied to the On/Off pin and the power module is Off. The minimum On/off voltage for logic High on the On/Off pin is 2.5 Vdc. To turn the module ON, logic Low is applied to the On/Off pin by turning ON Q1. When not using the negative logic On/Off, leave the pin unconnected or tie to GND.

GND

TM

II series modules. Positive Logic On/Off

is 10µA.

IN,max

IN.

VIN+

R2

ON/OFF

V

ON/OFF

Q1

+

_

R1

Q2

R3

R4

MODULE

PWM Enable

Q3 CSS

TM II

12V SIP Non-isolated Power Modules:

VIN+

MODULE

PWM Enable

R1

Q2 CSS

R2

ON/OFF

GND

R

pull-up

I

ON/OFF

+

V

ON/OFF

Q1

_

Figure 28. Circuit configuration for using negative logic On/OFF.

Overcurrent Protection

To provide protection in a fault (output overload) condition, the unit is equipped with internal current-limiting circuitry and can endure current limiting continuously. At the point of current-limit inception, the unit enters hiccup mode. The unit operates normally once the output current is brought back into its specified range. The typical average output current during hiccup is 3A.

Input Undervoltage Lockout

At input voltages below the input undervoltage lockout limit, module operation is disabled. The module will begin to operate at an input voltage above the undervoltage lockout turn-on threshold.

Overtemperature Protection

To provide protection in a fault condition, the unit is equipped with a thermal shutdown circuit. The unit will shutdown if the thermal reference point T exceeds 125

o

C (typical), but the thermal shutdown is not intended as a guarantee that the unit will survive temperatures beyond its rating. The module will automatically restarts after it cools down.

,

ref

LINEAGE POWER 12

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

Feature Descriptions (continued)

Output Voltage Programming

The output voltage of the Austin SuperLynxTM II 12V can be programmed to any voltage from 0.75Vdc to

5.5Vdc by connecting a resistor (shown as Rtrim in Figure 29) between the Trim and GND pins of the module. Without an external resistor between the Trim and GND pins, the output of the module will be

0.7525Vdc. To calculate the value of the trim resistor, Rtrim for a desired output voltage, use the following equation:

10500

Rtrim

⎢

−

7525.0

Vo

⎣

⎡

= 1000

Rtrim is the external resistor in Ω

Vo is the desired output voltage

For example, to program the output voltage of the Austin SuperLynx

TM

II module to 1.8V, Rtrim is

calculated as follows:

10500

⎡

= 1000

Rtrim

⎢

−

75.08.1

⎣

V

(+)

O

TRIM

V

(+)

IN

ON/OFF

GND

Figure 29. Circuit configuration to program output voltage using an external resistor

Table 1 provides

Rtrim values for most common

output voltages.

Table 1

V

(V)

O, set

0.7525 Open

1.2 22.46

1.5 13.05

1.8 9.024

2.5 5.009

3.3 3.122

5.0 1.472

⎤

−

Ω

⎥ ⎦

⎤

−

⎥ ⎦

Ω= kRtrim 024.9

R

trim

Rtrim (KΩ)

LOAD

TM

II 12V SIP Non-isolated Power Modules:

By using 1% tolerance trim resistor, set point tolerance of ±2% is achieved as specified in the electrical specification. The POL Programming Tool, available at www.lineagepower.com under the Design Tools section, helps determine the required external trim resistor needed for a specific output voltage.

The amount of power delivered by the module is defined as the voltage at the output terminals multiplied by the output current. When using the trim feature, the output voltage of the module can be increased, which at the same output current would increase the power output of the module. Care should be taken to ensure that the maximum output power of the module remains at or below the maximum rated power (P

max

= V

o,set

x I

o,max

).

Voltage Margining

Output voltage margining can be implemented in the Austin SuperLynx resistor, R for margining-up the output voltage and by connecting a resistor, R pin for margining-down. Figure 30 shows the circuit configuration for output voltage margining. The POL Programming Tool, available at

www.lineagepower.com under the Design Tools

section, also calculates the values of R R

margin-down

Please consult your local Lineage Power technical representative for additional details.

Austin Lynx or Lynx II Series

Figure 30. Circuit Configuration for margining Output voltage.

TM

II modules by connecting a

, from the Trim pin to the ground pin

margin-up

margin-down

, from the Trim pin to the Output

and

margin-up

for a specific output voltage and % margin.

Vo

Rmargin-down

Q2

Trim

Rmargin-up

Rtrim

Q1

GND

LINEAGE POWER 13

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

Feature Descriptions (continued)

Voltage Sequencing

Austin SuperLynxTM II 12V series of modules include a sequencing feature, EZ-SEQUENCE users to implement various types of output voltage sequencing in their applications. This is accomplished via an additional sequencing pin. When not using the sequencing feature, either tie the SEQ pin to V

IN or leave it unconnected.

When an analog voltage is applied to the SEQ pin, the output voltage tracks this voltage until the output reaches the set-point voltage. The SEQ voltage must be set higher than the set-point voltage of the module. The output voltage follows the voltage on the SEQ pin on a one-to-one volt basis. By connecting multiple modules together, customers can get multiple modules to track their output voltages to the voltage applied on the SEQ pin.

For proper voltage sequencing, first, input voltage is applied to the module. The On/Off pin of the module is left unconnected (or tied to GND for negative logic modules or tied to V

IN for positive logic modules) so

that the module is ON by default. After applying input voltage to the module, a minimum of 10msec delay is required before applying voltage on the SEQ pin. During this time, potential of 50mV (± 10 mV) is maintained on the SEQ pin. After 10msec delay, an analog voltage is applied to the SEQ pin and the output voltage of the module will track this voltage on a one-to-one volt bases until output reaches the setpoint voltage. To initiate simultaneous shutdown of the modules, the SEQ pin voltage is lowered in a controlled manner. Output voltage of the modules tracks the voltages below their set-point voltages on a one-to-one basis. A valid input voltage must be maintained until the tracking and output voltages reach ground potential to ensure a controlled shutdown of the modules.

When using the EZ-SEQUENCE start-up of the module, pre-bias immunity feature during start-up is disabled. The pre-bias immunity feature of the module relies on the module being in the diode-mode during start-up. When using the EZSEQUENCE

TM

feature, modules goes through an internal set-up time of 10msec, and will be in synchronous rectification mode when voltage at the SEQ pin is applied. This will result in sinking current in the module if pre-bias voltage is present at the output of the module. When pre-bias immunity during start-up is required, the EZ-SEQUENCE must be disabled. For additional guidelines on using EZ-SEQUENCE

TM

feature of Austin SuperLynxTM II

12V, contact Lineage Power technical representative

TM

that enables

TM

feature to control

TM

feature

TM II

12V SIP Non-isolated Power Modules:

for preliminary application note on output voltage sequencing using Austin Lynx II series.

Remote Sense

The Austin SuperLynxTM II 12V SIP power modules have a Remote Sense feature to minimize the effects of distribution losses by regulating the voltage at the Remote Sense pin (See Figure 31). The voltage between the Sense pin and Vo pin must not exceed

0.5V.

The amount of power delivered by the module is defined as the output voltage multiplied by the output current (Vo x Io). When using Remote Sense, the output voltage of the module can increase, which if the same output is maintained, increases the power output by the module. Make sure that the maximum output power of the module remains at or below the maximum rated power. When the Remote Sense feature is not being used, connect the Remote Sense

pin to output pin of the module

R

contact

distribution

R

distribution

R

contact

VIN(+)

COM

Figure 31. Remote sense circuit configuration.

V

Sense

COM

.

R

O

contact Rdistribution

R

LOAD

R

contact Rdistribution

LINEAGE POWER 14

Data Sheet

A

W

October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

Thermal Considerations

Power modules operate in a variety of thermal environments; however, sufficient cooling should be provided to help ensure reliable operation.

Considerations include ambient temperature, airflow, module power dissipation, and the need for increased reliability. A reduction in the operating temperature of the module will result in an increase in reliability. The thermal data presented here is based on physical measurements taken in a wind tunnel. The test setup is shown in Figure 33. Note that the airflow is parallel to the long axis of the module as shown in figure 32. The derating data applies to airflow in either direction of the module’s long axis.

TM

II 12V SIP Non-isolated Power Modules:

25.4_

ind Tunnel

PWBs

x

(1.0)

76.2_ (3.0)

Power Module

T

Air Flow

ref

Top View

Figure 32. T

The thermal reference point, T specifications of thermal derating curves is shown in Figure 32. For reliable operation this temperature should not exceed 125

The output power of the module should not exceed the rated power of the module (Vo,set x Io,max).

Please refer to the Application Note “Thermal Characterization Process For Open-Frame BoardMounted Power Modules” for a detailed discussion of thermal aspects including maximum device temperatures.

Temperature measurement

ref

o

C.

used in the

ref 1

location.

Probe Location

7.24_

(0.285)

ir

for measuring airflow and ambient temperature

flow

Figure 33. Thermal Test Set-up.

Heat Transfer via Convection

Increased airflow over the module enhances the heat transfer via convection. Thermal derating curves showing the maximum output current that can be delivered by various module versus local ambient temperature (T 1m/s (200 ft./min) are shown in the Characteristics Curves section.

) for natural convection and up to

A

LINEAGE POWER 15

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

Post solder Cleaning and Drying Considerations

Post solder cleaning is usually the final circuit-board assembly process prior to electrical board testing. The result of inadequate cleaning and drying can affect both the reliability of a power module and the testability of the finished circuit-board assembly. For guidance on appropriate soldering, cleaning and drying procedures, refer to Board Mounted Power Modules: Soldering and Cleaning Application Note.

Through-Hole Lead-Free Soldering Information

The RoHS-compliant through-hole products use the SAC (Sn/Ag/Cu) Pb-free solder and RoHS-compliant components. They are designed to be processed through single or dual wave soldering machines. The pins have an RoHS-compliant finish that is compatible with both Pb and Pb-free wave soldering processes. A maximum preheat rate of 3 wave preheat process should be such that the temperature of the power module board is kept below

°C. For Pb solder, the recommended pot

210 temperature is 260

°C max. Not all RoHS-compliant through-hole

270 products can be processed with paste-through-hole Pb or Pb-free reflow process. If additional information is needed, please consult with your Lineage Power technical representative for more details.

°C, while the Pb-free solder pot is

°C/s is suggested. The

TM II

12V SIP Non-isolated Power Modules:

LINEAGE POWER 16

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

Mechanical Outline

Dimensions are in millimeters and (inches).

Tolerances: x.x mm

x.xx mm

± 0.5 mm (x.xx in. ± 0.02 in.) [unless otherwise indicated]

± 0.25 mm (x.xxx in ± 0.010 in.)

Top View

TM

II 12V SIP Non-isolated Power Modules:

Side View

Bottom View

PIN FUNCTION

1 Vo

2 Vo

3 Sense+

4 Vo

5 GND

6 GND

7 VIN

8 VIN

B SEQ

9 Trim

10 On/Off

LINEAGE POWER 17

Data Sheet October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

Recommended Pad Layout

Dimensions are in millimeters and (inches).

Tolerances: x.x mm

x.xx mm

± 0.5 mm (x.xx in. ± 0.02 in.) [unless otherwise indicated]

± 0.25 mm (x.xxx in ± 0.010 in.)

PIN FUNCTION

1 Vo

2 Vo

3 Sense+

4 Vo

5 GND

6 GND

7 VIN

8 VIN

B SEQ

9 Trim

10 On/Off

TM II

12V SIP Non-isolated Power Modules:

Through- Hole Pad Layout – Back view

LINEAGE POWER 18

Data Sheet

a

©

October 1, 2009

Austin SuperLynx

8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current

TM

II 12V SIP Non-isolated Power Modules:

Ordering Information

Please contact your Lineage Power Sales Representative for pricing, availability and optional features.

Table 2. Device Codes

Device Code Input Voltage

Output

Voltage

Output

Current

ATA016A0X3 8.3 – 14Vdc 0.75 – 5.5Vdc 16 A 92.0% SIP

ATA016A0X3Z 8.3 – 14Vdc 0.75 – 5.5Vdc 16 A 92.0% SIP

ATA016A0X43 8.3 – 14Vdc 0.75 – 5.5Vdc 16 A 92.0% SIP

ATA016A0X43Z 8.3 – 14Vdc 0.75 – 5.5Vdc 16 A 92.0% SIP

Efficiency

3.3V@ 16A

Connector

Type

Comcodes

108989091

CC109104691

108989100

CC109104700

-Z refers to RoHS-compliant versions.

Table 3. Device Option

Option* Suffix**

Long Pins 5.08 mm ± 0.25mm (0.200 in. ± 0.010 in.) 5

* Contact Lineage Power Sales Representative for availability of these options, samples, minimum order quantity and lead times

** When adding multiple options to the product code, add suffix numbers in the descending order

Asia-Pacific Headquarters

Tel: + 65 6593 7211

World Wide Headquarters Lineage Power Corporation

601 Shil oh Roa d, Plano, TX 75074, USA +1-800-526-7 819 (Outsi de U.S.A.: +1-972-244-9428)

www.lineagepower.com e-mail: techs upport1@lineagepower.com

Linea ge Power res erves th e right to make change s to the prod uct(s) or i nformation c ontained herein without not ic e. No liability is ass umed as a result o f their use o r

pplication . No righ ts under any patent accompany the sal e of any s uch produc t(s) or informati on.

Linea ge Power D C-DC pro ducts are p rotected unde r v arious pa tents. Infor mation on these pa tents is av ailable at ww w.line agepower .com/paten ts.

2009 Line age Power Corporation, (Plan o, Texas) All Inte rn ation al Rights Reserved.

Europe, Middle-East and Africa Headquarters

Tel: + 49 898 780 672 80

India Headquarters Tel: + 91 80 2841163 3

LINEAGE POWER 19

Document No: DS04-022 ver. 1.22

PDF name: superlynx_II_sip_12v_ds.pdf

GE Industrial Solutions Austin SuperLynx II 12V SIP User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual