Fujitsu LA1703 E25, A02 Schematics

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http://hobi-elektronika.net

D D

Inventec Corporation
R&D Division

C C

Board name : Mother Board Schematic

Project : E25

Version : A02 (MV Build)

Initial Date : Jan 1 , 2006

B B

A A

Inventec Corporation

Inventec Corporation

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road
Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

<OrgAddr4>

<OrgAddr4>

<OrgAddr4>

TEL:[phone]

TEL:[phone]

TEL:[phone]

Title

Title

Title

AMD-S1+K8N890

AMD-S1+K8N890

AMD-S1+K8N890

Document Number

Document Number

Document Number

Size

Size

Size

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Custom

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Date: Sheet of

Wednesday, October 18, 2006

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

5

4

3

2

Wednesday, October 18, 2006

1

Rev

Rev

Rev

A02

A02

A02

30

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1

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http://hobi-elektronika.net

1. Schematic Page Description :

6FKHPDWLF9HU$

2

1

D D

01. Title

02. Schematic Page Description

03. Block Diagram

04. ANNOTATIONS

05. Schematic Modify

06. Timing Diagram

07. AMD K8-S1 Host (1/3)

08. AMD K8-S1 DDR (2/3)

09. AMD K8-S1 MISC (3/3),Fan

10. Clock Generator

11. VIA K8N890 Host (1/3)

21. VT6103L LAN PHY

22. KBC-ITE-8512

23. Adaptor in/Charge

24. 5VLA,5VA,3VLA,3VA

25. CPU Core Power[MAX8760]

26. CPU+1.2VHT\1.5V\2.5V

27. 1.5VS_NB/1.8V_CPU

28. Power 3VS/3V,5VS/5V,

29. Audio Codec

30. USB BOARD

12. VIA K8N890 PCI-E (2/3)

C C

13. VIA K8N890 V-Link (3/3)

14. DDRII-DIMM 0-1

15. VT1634 LVDS Transmitter

16. LCD&CRT CONN.

17. VIA VT8237A PCI/USB (1/3)

18. VIA VT8237A IDE/AC-Link (2/3)

19. VIA VT8237A V-Link/MII/LPC (3/3)

20. PCIE&IDE&MDC

)RU($GGDQG'HO)XQFWLRQ&RPSRQHQW/LVW

B B

Remove MDC function (Page 20)
CN13 L38 R292 C384

Add one USB port (Page 30)
U1002 L1002 C1003 C1004 CN1003

Add audio Function (Page 29)
Del C344 R266
Add R263 C345

For K/B Function
Del R44 R52
Add R45 R50

A A

Inventec Corporation

Inventec Corporation

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road
Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

<OrgAddr4>

<OrgAddr4>

<OrgAddr4>

TEL:[phone]

TEL:[phone]

TEL:[phone]

Title

Title

Title

AMD-S1+K8N890

AMD-S1+K8N890

AMD-S1+K8N890

Document Number

Document Number

Document Number

Size

Size

Size

Custom

<Doc>

Custom

<Doc>

Custom

<Doc>

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

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3

2

Wednesday, October 18, 2006

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3. Block Diagram :

http://hobi-elektronika.net

DDR2 400/533

D D

Mem Bus

Thermal
Sensor

ADM1032AR

C C

For DEBUG

USB5

Mini PCI

AMD

K8-638Pin

Processor

Host Bus

VIA

K8N890

CRT

LCD

VT1634AL
LVDS Tx

933Pin HSBGA

INTERFACE

P18,P19

DDR2 400/533

INTERFACE

CPU

CORE

CPU

VCCP

Hub Interface

LAN Phy

B B

RJ-45

USB-2

VT6103L

USB 2.0

USB-1 USB-0

MII BUS

VT8237A

539 BGA

IDE BUS

SATA BUS

LPC BUS

CDROM

HDD

AC-Link

ITE

IT8512E

RESET

AC'97
CODEC

VT1708A

MDC CNN

Audio
AMP

HEADPHONE

Mic IN

FAN CNN

A A

5

4

RTC

SPI 16M ROM

3

Inventec Corporation

Inventec Corporation

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road
Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

<OrgAddr4>

<OrgAddr4>

<OrgAddr4>

TEL:[phone]

TEL:[phone]

TEL:[phone]

Title

Title

Title

AMD-S1+K8N890

AMD-S1+K8N890

AMD-S1+K8N890

Document Number

Document Number

Document Number

Size

Size

Size

Custom

<Doc>

Custom

<Doc>

Custom

<Doc>

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

2

Wednesday, October 18, 2006

1

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Rev

Rev

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A02

A02

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4. Nat name Description :

Voltage Rails

DCIN

D D

5VLA 5.0V always on power rail by LATCH or ACIN

3VA
5V

5VS 5.0V switched power rail by SLP_S3#_3R
3VS

Vcore_CPU

VCCP 1.05V for AGTL+ Termination Voltage

+V0.9_DDR 0.9V DDR Termination Voltage
+V1.5S 1.5V switched power rail
+V1.5 1.5V power rail
+V1.5A 1.5V always on power rail
+V2.5S 2.5V power rail for SATA

C C

Primary DC system power supply

5.0V always on power rail by ECPWON5VA

3.3V always on power rail by ECPWON

5.0V power rail by SLP_S5#_3R

3.3V power rail by SLP_S5#_3R3V

3.3V switched power rail by SLP_S3#_3R

Core Voltage for CPU

1.8V for CPU PLL Voltage+V1.8_CPU

http://hobi-elektronika.net

5.Board Stack up Description

PCB Layers

PCB Thickness :1.2mm+/-0.1 mm .

Layer 1

Layer 2 Power Plane

Layer 3

Layer 4

Layer 5

Layer 6

Component Side, Microstrip signal Layer

Stripline Layer(AGTL,CLOCK,DDR)

Stripline Layer(Analog,LVDS,other)

Ground Plane

Solder Side,Microstrip signal Layer

Part Naming Conventions

C
CN
D
F
L
Q
R
RS

B B

U
Y

Capacitor

=
=

Connector

=

Diode

=

Fuse

=

Inductor

=

Transistor

=

Resistor

=

Resistor Pack

=

Arbitrary Logic Device

=

Crystal and Osc

Net Name Suffix

0=

Active Low signal

Signal Conditioning

=

_D_

_Q_

_L_

A A

Damped (by a resistor)

=

Isolated (by a Q-switch)

Filtered (by an inductor or bead)

=

5

Inventec Corporation

Inventec Corporation

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road
Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

<OrgAddr4>

<OrgAddr4>

<OrgAddr4>

TEL:[phone]

TEL:[phone]

TEL:[phone]

Title

Title

Title

AMD-S1+K8N890

AMD-S1+K8N890

AMD-S1+K8N890

Document Number

Document Number

Document Number

Size

Size

Size

Custom

<Doc>

Custom

<Doc>

Custom

<Doc>

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

4

3

2

Wednesday, October 18, 2006

1

Rev

Rev

Rev

A02

A02

A02

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ˉˁ˦˶˻˸˴˼˶ʳ˷˼˹ʳ˜˸ʳ˴˷ʳ˛˼ʳˍ

http://hobi-elektronika.net

Version 0.1 change to 0.2 change list.

1.D6 from BAT54C-7 change to PNP DTA144EUA 50V 30mA SC70

D D

2.C493 Change BOM to NU

3.BOM Change EEPROM FROM SST25VF080B TO W25X80VSSIG

4.CN5 K/B Connect FROM 25PIN CHANGE TO 24PIN

5.C312 BOM Change TO 1000pF

6.HDD FROM PATA CHANGE TO SATA

7.R471 BOM Cange To NU

8.R268 R269 R 270 R271 R272 From 220Ohm CHANGE To 100Ohm BOM Change

9.Schematic Change R268 R269 Connect To 3VLA

10.Q28 DEL By BOM Change

11.C481 From 1uF Change To 10uF BOM Change

12.R135 From Pulldown Change To pullhigh

13.Add LED for Wireless-LAN

14.2.5VS UP to 2.6VS

15.1.5VS UP to 1.6VS

16.Jmp wire from C513 to Q45 567Pin.

17.X1 and X3 Pin 1,4 and 2,3 change.

18.Jmp wire from C513 to Q45 567Pin.

19.R542 and R543 BOM Change to 2.2K

20.R540 and R541 BOM Change to 0Ohm

21.A20GET U31,W3 Pin connect to U18,126 Pin

C C

22.KBRC U31,V1 Pin connect to U18,16Pin

23.R183, R221 BOM Change to 47K

24.C266, C311 Change to 4.7uF 25V 1206

25.R149 Change to 51K BOM Change.

26.R547 Change to 2.1K BOM Change.

27.C479 DEL

28.C436 BOM change NU

29.C425,C429,C433 BOM change to 22p For VESA

30.R264 R266 BOM change to 15K.

31.R547 BOM change to 2.1K.

32.L47,L48,L49 BOM change to 17 ohm + - 25% 100MHZ 0.1 ohm 600mA (0805).

33.SPEC.change PATA to SATA

34.Battery schematic change.

Version 0.2 change to 0.3 change list.

35.Function change EC-ON-power issue.3VLA plan Delete.

36.Function change CPU THERMTRIP# ON/OFF POWER for 5VLA.

37.SATA-Pull -Power 2.5V modify.

38.POWER ON sequence For Battery only time Change.

B B

39.SATA-Connect change to DIP.

40.PCB From 1.4mm change to 1.2mm

41.Add HDD Led Pull High.

42.Power Del mOhm resistance.(All Power Plan)

43.BOM change. Del C91 & C92 For some Memory issue.

44.W-lan change to green LED.

45.Modify SATA-IDE clock 25Mhz.

Version 0.3 change to AX1 change list.(SI buid)

46.ADD EMI Solution on SPEAKER Side 150pF.

47.ADD USB Solution on SB8237A PLLPower.

48.Modify EC Power ON solution. Add R624

49.Modify SATA LED add pull HIGH.

50.Modify USB test R531 from 6.4K change to 5.11K.

(SI buid) Change List

51.Modify BOM for Mini-PCIE connect too High over botton cover.

Version AX1 change to A01 change list.(PV buid)

52.Add Function For Modem RING#.(L38 Power plan change to 3VA)

53.Modify BOM for DC-IN connect .(ME)

A A

54.Modify BOM for C596,C597,C598,C599 from 5pF to 0.1uF (EMI)

55.Add BOM for L68 (EMI)

56.change BOM for AUDIO function R264 and 266 From 10k change to 20K

57.change BOM for EMI function Add R672 22ohm.

58.change BOM for EMI function Add C623~631 0.1uF

59.change BOM for USB function Issue R531 from 5.1K change to 6.04K

60.change USB power plan function Support S3 wake up.

61.change WLAN LED function Only Support ON-OFF.

62.change BOM for LCD on-off.

5

4

VDDIO=DRAM POWER 1.8V

VTT=DRAM Vref POWER 0.9V

VDD=CPU core POWER by VID VLDT=CPU POWER 1.2V
(first 0.9V)

VDDA=CPU POWER 2.5V

A01 change A02 BOM change list.(PV buid to MP BOM cheng List)

63. ലVcore Voltage
Modify R611,R612,R613,R614-----60130B1020ZT(1K---0402)
change to 6013A0018401---2k 1% ---0402

64. USB eye-pattern

65. Change BOM L66,L62,L23 to R630,R631,R632 from (60140EA0063T) to 0 OHM 5% (60130B00000Z) and (60130BA0003T)

66. SATA eye-pattern

67. RTC C515,C511 change to (6010078R220Y) CAPACITOR-CHIP,8.2PF,50V,D,NP0,0603,TR

68. R446 NU

69. EMI issue Change C323,C535,C320,C327,C321 From 12pF change to 22pF 50V 5% 0603 NPO (60100722020Z)

70. For North bridge Thermal issue ADD R486 4.7K 5% 1/16W 0402(60130B4720ZT)

71. North bridge Vref. V-LINK Change R592 From 1K 5%(60130B1020ZT) to 1K 1%(60130B10019Z)

72. Change South bridge Voltage to 2.5V R547 from 2.1K 1% 1/10W 0603 change to 2.2K 1%(60130B22019T)

ᓳ೏ޢᏺף

ᓳՕ

ᓳՕ

1A Vcore voltage Հ૾ 0.75mV

଺ءޢᏺף

1A Vcore voltage Հ૾ 1.5mV.

From R531 6.04K 1% 0603 (6013A0068501) change to 5.62K 1% 0603 (60130B56219T)

From R559 6.19K 1% 0603 (6013A0068501) change to 5.62K 1% 0603 (60130B56219T)

3

2

Inventec Corporation

Inventec Corporation

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road
Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

<OrgAddr4>

<OrgAddr4>

<OrgAddr4>

TEL:[phone]

TEL:[phone]

TEL:[phone]

Title

Title

Title

AMD-S1+K8N890

AMD-S1+K8N890

AMD-S1+K8N890

Document Number

Document Number

Document Number

Size

Size

Size

Custom

<Doc>

Custom

<Doc>

Custom

<Doc>

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

Wednesday, October 18, 2006

1

5

5

5

Rev

Rev

Rev

A02

A02

A02

5

4

3

2

1

http://hobi-elektronika.net

DCIN

MAX8760ETL

P_CH

N_CH

CHGDRV
ACDRV#
BATDRV#

ACDRV#

P_CH

BATDRV#

DCIN

DCIN

TPS51117PW

NB/DDR POWER

TPS51124

VTT Power

TPS51100

3VLA

2.5V Power

G966

3VLA

2.5V Power

D D

+ADAPTOR

P10

0.01 ohm 0.01 ohm

Charge

BQ24721

BATT_CLK BATT_DATA

C C

CHG_EN

ACPRES

PWR_SWIN#_3

PWR_BLED#

BAT0_BLED#

Battery

ITE

8512

+VPACK

CPU_CORE

1.2VS_VLDT

1.8V_CPU

1.5VS_NB

1.8V_CPU

0.9V_DDR

2.5VS_CPU

2.5VS

$0'

.63LQ

3URFHVVRU

3a

1.2VS_VLDT

3VS

''5

1.5VS_NB

9,$

97/9'6

3VS

G916

3VLA

3VLA

P_CH

RTCVCC

SLP_S3_5R

3VA

DCIN

3VA 3VS

B B

2.5VS

2.5VS_CPU

&/2&.*(1

9,$

.1

9,$

97$

3VS

3VS

3a3

*/,'(3$'

5VS

+V5AUXON

TPS51020

3VLA

EC_PW_ON

P_CH

SLP_S5_5R

P_CH

SLP_S3_5R

P_CH

9,$

3VS

3V

97/3+<

EC_PW_ON

A A

)$1

5

5VS

5VA

SLP_S3_5R

+V5LA

4

P_CH

5VS

+'' 2''

3

5VS

/&'SDQHO

2

Inventec Corporation

Inventec Corporation

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road
Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

<OrgAddr4>

<OrgAddr4>

<OrgAddr4>

TEL:[phone]

TEL:[phone]

TEL:[phone]

Title

Title

Title

AMD-S1+K8N890

AMD-S1+K8N890

AMD-S1+K8N890

Document Number

Document Number

Document Number

Size

Size

Size

Custom

<Doc>

Custom

<Doc>

Custom

<Doc>

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

Wednesday, October 18, 2006

1

6

6

6

Rev

Rev

Rev

A02

A02

A02

A

B

C

D

E

http://hobi-elektronika.net

ClawHammer HT Interface

4 4

3 3

HTRCLK_H0<11>
HTRCLK_L0<11>
HTRCLK_H1<11>
HTRCLK_L1<11>

HTRCTL_H0<11>

1.2VS_VLDT<10,11,26>

R410 51-1%-1/10W-0603R410 51-1%-1/10W-0603
R409 51-1%-1/10W-0603R409 51-1%-1/10W-0603

HTRCTL_L0<11>

Close to S1 SOCKET

1.2VS_VLDT<10,11,26> 1.2VS_VLDT <10,11,26>

2 2

1 1

A

0.5A 0.5A

Source from VLDT

C488

C488
12pF 50V 5% 0603 NPO

12pF 50V 5% 0603 NPO

CPU_CORE<25> CPU_CORE <25>

LAYOUT: Place HT bypass caps on topside near
unconnected Clawhammer HT Link

HTTCAD_L[15..0]<11>

HTTCAD_H[15..0]<11>

25A

1.2VS_VLDT<10,11,26>

HTTCAD_L[15..0]

HTTCAD_H[15..0]

HTRCAD_H0
HTRCAD_L0
HTRCAD_H1
HTRCAD_L1
HTRCAD_H2
HTRCAD_L2
HTRCAD_H3
HTRCAD_L3
HTRCAD_H4
HTRCAD_L4
HTRCAD_H5
HTRCAD_L5
HTRCAD_H6
HTRCAD_L6
HTRCAD_H7
HTRCAD_L7
HTRCAD_H8
HTRCAD_L8
HTRCAD_H9
HTRCAD_L9
HTRCAD_H10
HTRCAD_L10
HTRCAD_H11
HTRCAD_L11
HTRCAD_H12
HTRCAD_L12
HTRCAD_H13
HTRCAD_L13
HTRCAD_H14
HTRCAD_L14
HTRCAD_H15
HTRCAD_L15

HTRCLK_H0
HTRCLK_L0
HTRCLK_H1
HTRCLK_L1

HTRCTL_H0
HTRCTL_L0
HTRCTL_H1
HTRCTL_L1

HTREF­HTREF+

U23A

E3

L0_CADIN_H0

E2

L0_CADIN_L0

E1

L0_CADIN_H1

F1

L0_CADIN_L1

G3

L0_CADIN_H2

G2

L0_CADIN_L2

G1

L0_CADIN_H3

H1

L0_CADIN_L3

J1

L0_CADIN_H4

K1

L0_CADIN_L4

L3

L0_CADIN_H5

L2

L0_CADIN_L5

L1

L0_CADIN_H6

M1

L0_CADIN_L6

N3

L0_CADIN_H7

N2

L0_CADIN_L7

E5

L0_CADIN_H8

F5

L0_CADIN_L8

F3

L0_CADIN_H9

F4

L0_CADIN_L9

G5

L0_CADIN_H10

H5

L0_CADIN_L10

H3

L0_CADIN_H11

H4

L0_CADIN_L11

K3

L0_CADIN_H12

K4

L0_CADIN_L12

L5

L0_CADIN_H13

M5

L0_CADIN_L13

M3

L0_CADIN_H14

M4

L0_CADIN_L14

N5

L0_CADIN_H15

P5

L0_CADIN_L15

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

R6

HTREF0

P6

HTREF1

D1

VLDT_A1

D2

VLDT_A2

D3

VLDT_A3

D4

VLDT_A4

AC4

VDD1

AD2

VDD2

G4

VDD3

H2

VDD4

J9

VDD5

J11

VDD6

J13

VDD7

K6

VDD8

K10

VDD9

K12

VDD10

K14

VDD11

L4

VDD12

L7

VDD13

L9

VDD14

L11

VDD15

L13

VDD16

M2

VDD17

M6

VDD18

M8

VDD19

M10

VDD20

N7

VDD21

N9

VDD22

N11

VDD23

P8

VDD24

P10

VDD25

R4

VDD26

R7

VDD27

SCKT AMD CPU PZ6382A-284S-41F 638P FOXCONN

SCKT AMD CPU PZ6382A-284S-41F 638P FOXCONN

6026B0019501

6026B0019501

R107 44.2-1%-1/16W-0402R107 44.2-1%-1/16W-0402
R106 44.2-1%-1/16W-0402R106 44.2-1%-1/16W-0402
C215 1000pF 50V 10% 0402 X7RC215 1000pF 50V 10% 0402 X7R
C216 1000pF 50V 10% 0402 X7RC216 1000pF 50V 10% 0402 X7R

resistors should have 10-mil spacing and 5mil width

CPU pin to HTREF0 and HTREF1 within 1000mils

B

HTRCAD_L[15..0]<11>

HTRCAD_H[15..0]<11>

L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9

L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1
L0_CTLOUT_H0

L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1

VDD_FB_H
VDD_FB_L

VLDT_B1
VLDT_B2
VLDT_B3
VLDT_B4

VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54

PSI_L

HTRCAD_L[15..0]

HTRCAD_H[15..0]

HTTCAD_H0

AD1

HTTCAD_L0

AC1

HTTCAD_H1

AC2

HTTCAD_L1

AC3

HTTCAD_H2

AB1

HTTCAD_L2

AA1

HTTCAD_H3

AA2

HTTCAD_L3

AA3

HTTCAD_H4

W2

HTTCAD_L4

W3

HTTCAD_H5

V1

HTTCAD_L5

U1

HTTCAD_H6

U2

HTTCAD_L6

U3

HTTCAD_H7

T1

HTTCAD_L7

R1

HTTCAD_H8

AD4

HTTCAD_L8

AD3

HTTCAD_H9

AD5

HTTCAD_L9

AC5

HTTCAD_H10

AB4

HTTCAD_L10

AB3

HTTCAD_H11

AB5

HTTCAD_L11

AA5

HTTCAD_H12

Y5

HTTCAD_L12

W5

HTTCAD_H13

V4

HTTCAD_L13

V3

HTTCAD_H14

V5

HTTCAD_L14

U5

HTTCAD_H15

T4

HTTCAD_L15

T3

HTTCLK_H0

Y1

HTTCLK_L0

W1

HTTCLK_H1

Y4

HTTCLK_L1

Y3

HTTCTL_H0

R2

HTTCTL_L0

R3

HTTCTL_H1

T5

HTTCTL_L1

R5

CPU_COREFB

F6

CPU_COREFB#

E6

CPU_SPI#

A3

AE2
AE3
AE4
AE5

25A

R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
V6
V8
V10
V12
V14
W4
Y2
J15
K16
L15
M16
P16
T16
U15
V16

HTREF+
HTREF-

HTTCLK_H0 <11>
HTTCLK_L0 <11>
HTTCLK_H1 <11>
HTTCLK_L1 <11>

HTTCTL_H0 <11>
HTTCTL_L0 <11>

1

1

TP14TP14

CPU_COREFB <25>
CPU_COREFB# <25>

CPU_PSI# <25>

Source from VLDT

TP15TP15

10MIL

C485

C485
12pF 50V 5% 0603 NPO

12pF 50V 5% 0603 NPO

C

U23E

U23E

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS66

SCKT AMD CPU PZ6382A-284S-41F 638P FOXCONN

SCKT AMD CPU PZ6382A-284S-41F 638P FOXCONN

6026B0019501

6026B0019501

D

VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS130
VSS131
VSS132
VSS133

J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
M11
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6

1.2VS_VLDT<10,11,26>

CPU_CORE<25>

C490 10uF 6.3V 10% 0805 X5RC490 10uF 6.3V 10% 0805 X5RU23A

C474 10uF 6.3V 10% 0805 X5RC474 10uF 6.3V 10% 0805 X5R

C478 0.1uF 10V 10% 0402 X7RC478 0.1uF 10V 10% 0402 X7R

C467 0.1uF 10V 10% 0402 X7RC467 0.1uF 10V 10% 0402 X7R

C472 12pF 50V 5% 0603 NPOC472 12pF 50V 5% 0603 NPO

C470 12pF 50V 5% 0603 NPOC470 12pF 50V 5% 0603 NPO

Place near processor
on HT power

C210

C210
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C205

C205
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C164

C164
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C189

C189

0.1uF 10V 10% 0402 X7R

0.1uF 10V 10% 0402 X7R
C170

C170

0.1uF 10V 10% 0402 X7R

0.1uF 10V 10% 0402 X7R
C168

C168
12pF 50V 5% 0603 NPO

12pF 50V 5% 0603 NPO
C167

C167
12pF 50V 5% 0603 NPO

12pF 50V 5% 0603 NPO

Place close to socket

C207

CPU_CORE<25>

Inventec Corporation

Inventec Corporation

Inventec Corporation

<OrgAddr4>

<OrgAddr4>

<OrgAddr4>
Title

Title

Title

Size

Size

Size

Custom

Custom

Custom

Date: Sheet of 30

Date: Sheet of 30

Date: Sheet of 30

C207
12pF 50V 5% 0603 NPO

12pF 50V 5% 0603 NPO
C172

C172

0.01uF 16V 10% 0402 X7R

0.01uF 16V 10% 0402 X7R
C163

C163

0.1uF 10V 10% 0402 X7R

0.1uF 10V 10% 0402 X7R
C179

C179

0.1uF 10V 10% 0402 X7R

0.1uF 10V 10% 0402 X7R
C204

C204
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C180

C180
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C459

C459
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C455

C455
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C453

C453
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C183

C183
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C165

C165
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C451

C451
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C182

C182
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C181

C181
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R

Place these capacitors under uPGA
socket on bottom side

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road
Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan
TEL:[phone]

TEL:[phone]

TEL:[phone]

AMD-S1+K8N890

AMD-S1+K8N890

AMD-S1+K8N890

Document Number

Document Number

Document Number

<Doc>

<Doc>

<Doc>
Wednesday, October 18, 2006

Wednesday, October 18, 2006

Wednesday, October 18, 2006

E

Rev

Rev

Rev

7

7

7

A02

A02

A02

A

MD_A[63:0]<14>
MA_A[18:0]<14>

DM_A[7:0]<14>
DQSA_H[7:0]<14>
DQSA_L[7:0]<14>

MD_A[63:0]
MA_A[18:0]

DM_A[7:0]
DQSA_H[7:0]
DQSA_L[7:0]

MD_B[63:0]
MA_B[18:0]
DM_B[7:0]
DQSB_H[7:0]
DQSB_L[7:0]

MD_B[63:0] <14>
MA_B[18:0] <14>
DM_B[7:0] <14>
DQSB_H[7:0] <14>
DQSB_L[7:0] <14>

B

FIX1

FIX1
FMASK

FMASK

FIX9

FIX9
FMASK

FMASK

C

FIX4

FIX4

FIX3

FIX3

FIX2

FIX2
FMASK

FMASK

1

1

FIX10

FIX10
FMASK

FMASK

FMASK

FMASK

FMASK

FMASK

http://hobi-elektronika.net

1

1

FIX11

FIX11

FIX12

FIX12

FMASK

FMASK

FMASK

FMASK

FIX5

FIX5
FMASK

FMASK

FIX13

FIX13
FMASK

FMASK

FIX6

FIX6
FMASK

FMASK

1

1

FIX14

FIX14
FMASK

FMASK

FIX8

FIX8
FMASK

FMASK

FIX15

FIX15
FMASK

FMASK

FIX7

FIX7
FMASK

FMASK

1

1

FIX16

FIX16
FMASK

FMASK

D

E

Place near CPU socket

1.8V_CPU<9,14,25,27>

C101 0.01uF 16V 10% 0402 X7RC101 0.01uF 16V 10% 0402 X7R
C104 0.01uF 16V 10% 0402 X7RC104 0.01uF 16V 10% 0402 X7R
C114 12pF 50V 5% 0603 NPOC114 12pF 50V 5% 0603 NPO
C106 12pF 50V 5% 0603 NPOC106 12pF 50V 5% 0603 NPO

0.9V_DDR <14,27>

Channel A Channel B

4 4

U23B

MD_A0
MD_A1
MD_A2
MD_A3
MD_A4
MD_A5
MD_A6
MD_A7
MD_A8
MD_A9
MD_A10
MD_A11
MD_A12
MD_A13
MD_A14
MD_A15
MD_A16
MD_A17
MD_A18
MD_A19
MD_A20
MD_A21
MD_A22
MD_A23
MD_A24
MD_A25
MD_A26
MD_A27
MD_A28
MD_A29
MD_A30

3 3

2 2

S19

S19
NUT-P6_5B4_2D3_7

NUT-P6_5B4_2D3_7

1

1 1

MD_A31
MD_A32
MD_A33
MD_A34
MD_A35
MD_A36
MD_A37
MD_A38
MD_A39
MD_A40
MD_A41
MD_A42
MD_A43
MD_A44
MD_A45
MD_A46
MD_A47
MD_A48
MD_A49
MD_A50
MD_A51
MD_A52
MD_A53
MD_A54
MD_A55
MD_A56
MD_A57
MD_A58
MD_A59
MD_A60
MD_A61
MD_A62
MD_A63

DM_A0
DM_A1
DM_A2
DM_A3
DM_A4
DM_A5
DM_A6
DM_A7

S12

S12
HOLE-P9_0B6_0D4_2

HOLE-P9_0B6_0D4_2

1

U23B

G12

MA_DATA0

F12

MA_DATA1

H14

MA_DATA2

G14

MA_DATA3

H11

MA_DATA4

H12

MA_DATA5

C13

MA_DATA6

E13

MA_DATA7

H15

MA_DATA8

E15

MA_DATA9

E17

MA_DATA10

H17

MA_DATA11

E14

MA_DATA12

F14

MA_DATA13

C17

MA_DATA14

G17

MA_DATA15

G18

MA_DATA16

C19

MA_DATA17

D22

MA_DATA18

E20

MA_DATA19

E18

MA_DATA20

F18

MA_DATA21

B22

MA_DATA22

C23

MA_DATA23

F20

MA_DATA24

F22

MA_DATA25

H24

MA_DATA26

J19

MA_DATA27

E21

MA_DATA28

E22

MA_DATA29

H20

MA_DATA30

H22

MA_DATA31

Y24

MA_DATA32

AB24

MA_DATA33

AB22

MA_DATA34

AA21

MA_DATA35

W22

MA_DATA36

W21

MA_DATA37

Y22

MA_DATA38

AA22

MA_DATA39

Y20

MA_DATA40

AA20

MA_DATA41

AA18

MA_DATA42

AB18

MA_DATA43

AB21

MA_DATA44

AD21

MA_DATA45

AD19

MA_DATA46

Y18

MA_DATA47

AD17

MA_DATA48

W16

MA_DATA49

W14

MA_DATA50

Y14

MA_DATA51

Y17

MA_DATA52

AB17

MA_DATA53

AB15

MA_DATA54

AD15

MA_DATA55

AB13

MA_DATA56

AD13

MA_DATA57

Y12

MA_DATA58

W11

MA_DATA59

AB14

MA_DATA60

AA14

MA_DATA61

AB12

MA_DATA62

AA12

MA_DATA63

E12

MA_DM0

C15

MA_DM1

E19

MA_DM2

F24

MA_DM3

AC24

MA_DM4

Y19

MA_DM5

AB16

MA_DM6

Y13

DQSA_H0
DQSA_L0
DQSA_H1
DQSA_L1
DQSA_H2
DQSA_L2
DQSA_H3
DQSA_L3
DQSA_H4
DQSA_L4
DQSA_H5
DQSA_L5
DQSA_H6
DQSA_L6
DQSA_H7
DQSA_L7

MA_DM7

G13

MA_DQS_H0

H13

MA_DQS_L0

G16

MA_DQS_H1

G15

MA_DQS_L1

C22

MA_DQS_H2

C21

MA_DQS_L2

G22

MA_DQS_H3

G21

MA_DQS_L3

AD23

MA_DQS_H4

AC23

MA_DQS_L4

AB19

MA_DQS_H5

AB20

MA_DQS_L5

Y15

MA_DQS_H6

W15

MA_DQS_L6

W12

MA_DQS_H7

W13

MA_DQS_L7

SCKT AMD CPU PZ6382A-284S-41F 638P FOXCONN

SCKT AMD CPU PZ6382A-284S-41F 638P FOXCONN

6026B0019501

6026B0019501

S13

S13
HOLE-P9_0B6_0D4_2

HOLE-P9_0B6_0D4_2

1

VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14

MA0_CLK_H1

MA0_CLK_L1

MA0_CLK_H2

MA0_CLK_L2

MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8

MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15

MA_BANK0
MA_BANK1
MA_BANK2

MA0_CS_L0
MA0_CS_L1
MA0_CS_L2
MA0_CS_L3

MA_WE_L
MA_CAS_L
MA_RAS_L

MA_CKE0

MA_CKE1
MA0_ODT0

MA0_ODT1

RSVD_MA0_CLK_H0
RSVD_MA0_CLK_L0

RSVD_MA0_CLK_H3
RSVD_MA0_CLK_L3

RSVD_MA_RESET_L

VTT1
VTT6
VTT7
VTT8

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9

M_ZN
M_ZP

M_VREF

1.75A

A10
B10
C10
D10

3.6A

J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23

MA_DCLK_H1

E16

MA_DCLK_L1

F16

MA_DCLK_H2

Y16

MA_DCLK_L2

AA16

MA_A0

R21

MA_A1

N21

MA_A2

N22

MA_A3

M22

MA_A4

M24

MA_A5

M20

MA_A6

M19

MA_A7

L21

MA_A8

L22

MA_A9

L19

MA_A10

R19

MA_A11

L20

MA_A12

K24

MA_A13

V24

MA_A14

K20

MA_A15

K19

MA_A16

T22

MA_A17

R20

MA_A18

K22

MA_CS_L0

T19

MA_CS_L1

V22

MA_CS_L2

J22

MA_CS_L3

V19

WEA#

U21

CASA#

U20

RASA#

T20

CKEA0

J21

CKEA1

J20

ODTA0

U19

ODTA1

V20

N20
N19

P20
P19

H16

R342 39.2-1%-1/16W-0402R342 39.2-1%-1/16W-0402

AE10

R340 39.2-1%-1/16W-0402R340 39.2-1%-1/16W-0402

AF10

W17

6

6

6

7

7

7

8

8

8
9

9

9

1

1

2

2

1

2

0.9V_DDR <14,27>

1.8V_CPU <9,14,25,27>

MA_DCLK_H1 <14>
MA_DCLK_L1 <14>
MA_DCLK_H2 <14>
MA_DCLK_L2 <14>

MA_CS_L0 <14>
MA_CS_L1 <14>
MA_CS_L2 <14>
MA_CS_L3 <14>

WEA# <14>
CASA# <14>
RASA# <14>

CKEA0 <14>
CKEA1 <14>

ODTA0 <14>
ODTA1 <14>

S3

S3
SCREW-P8_0B9_0D2_7

SCREW-P8_0B9_0D2_7

5

5

5

4

4

4
3

3

3

M_VREF <14,27>

7
8
9

6

6

6

7

7

8

8

9

9

1

1

2

2

1

2

1

1.8V_CPU <9,14,25,27>

S2

S2
SCREW-P8_0B9_0D2_7

SCREW-P8_0B9_0D2_7

5

5

5

4

4

4
3

3

3

1

1

1

S1

S1

6

SCREW-P8_0D2_7

SCREW-P8_0D2_7

6

6

5

5

7

7

7
8
9

5

8

8

4

4

4
3

9

9

3

3

1

1

2

2

1

2

1

MD_B0
MD_B1
MD_B2
MD_B3
MD_B4
MD_B5
MD_B6
MD_B7
MD_B8
MD_B9
MD_B10
MD_B11
MD_B12
MD_B13
MD_B14
MD_B15
MD_B16
MD_B17
MD_B18
MD_B19
MD_B20
MD_B21
MD_B22
MD_B23
MD_B24
MD_B25
MD_B26
MD_B27
MD_B28
MD_B29
MD_B30
MD_B31
MD_B32
MD_B33
MD_B34
MD_B35
MD_B36
MD_B37
MD_B38
MD_B39
MD_B40
MD_B41
MD_B42
MD_B43
MD_B44
MD_B45
MD_B46
MD_B47
MD_B48
MD_B49
MD_B50
MD_B51
MD_B52
MD_B53
MD_B54
MD_B55
MD_B56
MD_B57
MD_B58
MD_B59
MD_B60
MD_B61
MD_B62
MD_B63

DM_B0
DM_B1
DM_B2
DM_B3
DM_B4
DM_B5
DM_B6
DM_B7

6

6

6

7

7

7

8

8

8
9

9

9

1

1

2

2

1

2

1

DQSB_H0
DQSB_L0
DQSB_H1
DQSB_L1
DQSB_H2
DQSB_L2
DQSB_H3
DQSB_L3
DQSB_H4
DQSB_L4
DQSB_H5
DQSB_L5
DQSB_H6
DQSB_L6
DQSB_H7
DQSB_L7

S5

S5
SCREW-P8_0D2_7

SCREW-P8_0D2_7

5

5

5

4

4

4
3

3

3

1

1

U23C

U23C

C11

MB_DATA0

A11

MB_DATA1

A14

MB_DATA2

B14

MB_DATA3

G11

MB_DATA4

E11

MB_DATA5

D12

MB_DATA6

A13

MB_DATA7

A15

MB_DATA8

A16

MB_DATA9

A19

MB_DATA10

A20

MB_DATA11

C14

MB_DATA12

D14

MB_DATA13

C18

MB_DATA14

D18

MB_DATA15

D20

MB_DATA16

A21

MB_DATA17

D24

MB_DATA18

C25

MB_DATA19

B20

MB_DATA20

C20

MB_DATA21

B24

MB_DATA22

C24

MB_DATA23

E23

MB_DATA24

E24

MB_DATA25

G25

MB_DATA26

G26

MB_DATA27

C26

MB_DATA28

D26

MB_DATA29

G23

MB_DATA30

G24

MB_DATA31

AA24

MB_DATA32

AA23

MB_DATA33

AD24

MB_DATA34

AE24

MB_DATA35

AA26

MB_DATA36

AA25

MB_DATA37

AD26

MB_DATA38

AE25

MB_DATA39

AC22

MB_DATA40

AD22

MB_DATA41

AE20

MB_DATA42

AF20

MB_DATA43

AF24

MB_DATA44

AF23

MB_DATA45

AC20

MB_DATA46

AD20

MB_DATA47

AD18

MB_DATA48

AE18

MB_DATA49

AC14

MB_DATA50

AD14

MB_DATA51

AF19

MB_DATA52

AC18

MB_DATA53

AF16

MB_DATA54

AF15

MB_DATA55

AF13

MB_DATA56

AC12

MB_DATA57

AB11

MB_DATA58

Y11

MB_DATA59

AE14

MB_DATA60

AF14

MB_DATA61

AF11

MB_DATA62

AD11

MB_DATA63

A12

MB_DM0

B16

MB_DM1

A22

MB_DM2

E25

MB_DM3

AB26

MB_DM4

AE22

MB_DM5

AC16

MB_DM6

AD12

MB_DM7

C12

MB_DQS_H0

B12

MB_DQS_L0

D16

MB_DQS_H1

C16

MB_DQS_L1

A24

MB_DQS_H2

A23

MB_DQS_L2

F26

MB_DQS_H3

E26

MB_DQS_L3

AC25

MB_DQS_H4

AC26

MB_DQS_L4

AF21

MB_DQS_H5

AF22

MB_DQS_L5

AE16

MB_DQS_H6

AD16

MB_DQS_L6

AF12

MB_DQS_H7

AE12

MB_DQS_L7

SCKT AMD CPU PZ6382A-284S-41F 638P FOXCONN

SCKT AMD CPU PZ6382A-284S-41F 638P FOXCONN

6026B0019501

6026B0019501

7
8
9

VTT2
VTT3
VTT4
VTT5
VTT9

VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27

MB0_CLK_H1
MB0_CLK_L1
MB0_CLK_H2
MB0_CLK_L2

MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8

MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15

MB_BANK0
MB_BANK1
MB_BANK2

MB0_CS_L0
MB0_CS_L1
MB0_CS_L2
MB0_CS_L3

MB_WE_L
MB_CAS_L
MB_RAS_L

MB_CKE0

MB_CKE1
MB0_ODT0

MB0_ODT1

RSVD_MB0_CLK_H0
RSVD_MB0_CLK_L0

RSVD_MB0_CLK_H3
RSVD_MB0_CLK_L3

RSVD_MB_RESET_L

VDDIO_FB_H

VDDIO_FB_L

VTT_SENSE

6

6

6

5

5

7

7

8

8

4

4

9

9

3

3

1

1

2

2

1

2

S7

S7
SCREW-P8_0B9_0D2_7

SCREW-P8_0B9_0D2_7

5
4
3

1.75A

AA10
AB10
AC10
AD10
W10

3.6A

P25
R17
T18
T21
T23
T25
U17
V18
H25
V21
V23
V25
Y25

MB_DCLK_H1

A17

MB_DCLK_L1

A18

MB_DCLK_H2

AF18

MB_DCLK_L2

AF17

MA_B0

T24

MA_B1

P26

MA_B2

P24

MA_B3

N26

MA_B4

N25

MA_B5

N24

MA_B6

N23

MA_B7

L26

MA_B8

M26

MA_B9

L24

MA_B10

U25

MA_B11

L25

MA_B12

L23

MA_B13

W25

MA_B14

J26

MA_B15

J25

MA_B16

U26

MA_B17

T26

MA_B18

K26

MB_CS_L0

U23

MB_CS_L1

W24

MB_CS_L2

J24

MB_CS_L3

Y26

WEB#

U22

CASB#

V26

RASB#

U24

CKEB0

J23

CKEB1

H26

ODTB0

W26

ODTB1

W23

P22
R22

R26
R25

B18

W9
Y9

R93 0-5%-1/16W-0402_NUR93 0-5%-1/16W-0402_NU

Y10

0.9V_DDR <14,27>

1.8V_CPU <9,14,25,27>

MB_DCLK_H1 <14>
MB_DCLK_L1 <14>
MB_DCLK_H2 <14>
MB_DCLK_L2 <14>

MB_CS_L0 <14>
MB_CS_L1 <14>
MB_CS_L2 <14>
MB_CS_L3 <14>

WEB# <14>
CASB# <14>
RASB# <14>

CKEB0 <14>
CKEB1 <14>

ODTB0 <14>
ODTB1 <14>

IF HAVE SENCE By REG. REMOVE THIS

AGND<29>

0.9V_DDR<14,27>

C103 12pF 50V 5% 0603 NPOC103 12pF 50V 5% 0603 NPO
C81 12pF 50V 5% 0603 NPOC81 12pF 50V 5% 0603 NPO
C89 12pF 50V 5% 0603 NPOC89 12pF 50V 5% 0603 NPO
C56 12pF 50V 5% 0603 NPOC56 12pF 50V 5% 0603 NPO
C107 12pF 50V 5% 0603 NPOC107 12pF 50V 5% 0603 NPO
C76 12pF 50V 5% 0603 NPOC76 12pF 50V 5% 0603 NPO
C93 12pF 50V 5% 0603 NPOC93 12pF 50V 5% 0603 NPO
C94 12pF 50V 5% 0603 NPOC94 12pF 50V 5% 0603 NPO
C175 0.1uF 10V 10% 0402 X7RC175 0.1uF 10V 10% 0402 X7R
C201 0.1uF 10V 10% 0402 X7RC201 0.1uF 10V 10% 0402 X7R
C202 0.1uF 10V 10% 0402 X7RC202 0.1uF 10V 10% 0402 X7R
C161 0.1uF 10V 10% 0402 X7RC161 0.1uF 10V 10% 0402 X7R
C96 10uF 6.3V 10% 0805 X5RC96 10uF 6.3V 10% 0805 X5R
C60 10uF 6.3V 10% 0805 X5RC60 10uF 6.3V 10% 0805 X5R
C95 10uF 6.3V 10% 0805 X5RC95 10uF 6.3V 10% 0805 X5R
C84 10uF 6.3V 10% 0805 X5RC84 10uF 6.3V 10% 0805 X5R

Place close to socket

C151

1.8V_CPU<9,14,25,27>

0.9V_DDR <14,27>

C151
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C154

C154
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C155

C155
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C108

C108
10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R
C139

C139

0.1uF 10V 10% 0402 X7R

0.1uF 10V 10% 0402 X7R
C145

C145

0.1uF 10V 10% 0402 X7R

0.1uF 10V 10% 0402 X7R
C138

C138

0.1uF 10V 10% 0402 X7R

0.1uF 10V 10% 0402 X7R
C140

C140

0.1uF 10V 10% 0402 X7R

0.1uF 10V 10% 0402 X7R
C111

C111

0.01uF 16V 10% 0402 X7R

0.01uF 16V 10% 0402 X7R
C113

C113

0.01uF 16V 10% 0402 X7R

0.01uF 16V 10% 0402 X7R

C431 10pF 50V 0.5% 0402 NPOC431 10pF 50V 0.5% 0402 NPO

C434 10pF 50V 0.5% 0402 NPOC434 10pF 50V 0.5% 0402 NPO

Place close to socket

C109

1.8V_CPU<9,14,25,27>

S17

S17

6

SCREW-P8_0B9_0D2_7

SCREW-P8_0B9_0D2_7

6

6

5

5

7

7

7
8
9

5

8

8

4

4

4
3

9

9

3

3

1

1

2

2

1

2

C109
10uF 10V -20%+80% 0805 Y5V

10uF 10V -20%+80% 0805 Y5V
C110

C110
10uF 10V -20%+80% 0805 Y5V

10uF 10V -20%+80% 0805 Y5V
C141

C141

0.1uF 10V 10% 0402 X7R

0.1uF 10V 10% 0402 X7R
C112

C112

0.1uF 10V 10% 0402 X7R

0.1uF 10V 10% 0402 X7R

Place under socket on bottom side

1

S18

S18
NUT-P6_5B4_2D3_7

NUT-P6_5B4_2D3_7

1

S8

S8
HOLE-P9_0B6_0D4_2

HOLE-P9_0B6_0D4_2

1

S9

S9
HOLE-P9_0B6_0D4_2

HOLE-P9_0B6_0D4_2

A

3
4

4

4

5

1

2

2

2

1

1

3

3

9

9

8

8

7

7

5

5

6

6

S16

S16

6

SCREW-P8_0B9_0D2_7

SCREW-P8_0B9_0D2_7

1

3
4

4

4

5

2

2

2

1

1

3

3

9

9

8

8

7

7

5

5

6

6

S6

S6

6

SCREW-P8_0B9_0D2_7

SCREW-P8_0B9_0D2_7

S23

S23
NUT-P6_5B4_2D3_7

9
8
7

NUT-P6_5B4_2D3_7

1

D

S24

S24
NUT-P6_5B4_2D3_7

NUT-P6_5B4_2D3_7

1

Inventec Corporation

Inventec Corporation

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road
Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

<OrgAddr4>

<OrgAddr4>

<OrgAddr4>

TEL:[phone]

TEL:[phone]

TEL:[phone]

Title

Title

Title

AMD-S1+K8N890

AMD-S1+K8N890

AMD-S1+K8N890

Document Number

Document Number

Document Number

Size

Size

Size

Custom

<Doc>

Custom

<Doc>

Custom

<Doc>

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

Wednesday, October 18, 2006

E

8

8

8

Rev

Rev

Rev

A02

A02

A02

1

2

2

2

1

1

3

3

9

3
4

4

4

5

9

8

8

7

7

5

5

6

6

S11

S11

6

SCREW-P8_0B9_0D2_7

SCREW-P8_0B9_0D2_7

9
8
7

B

9
8
7

3
4

4

4

5

1

2

2

2

1

1

3

3

9

9

8

8

7

7

5

5

6

6

S4

S4

6

SCREW-P8_0B9_0D2_7

SCREW-P8_0B9_0D2_7

1

2

2

2

1

1

3

3

9

3
4

4

4

5

9

8

8

7

7

5

5

6

6

S10

S10

6

SCREW-P8_0B9_0D2_7

SCREW-P8_0B9_0D2_7

9
8
7

9
8
7

3
4

4

4

5

1

2

2

2

1

1

3

3

9

9

8

8

7

7

5

5

6

6

S15

S15

6

SCREW-P8_0B9_0D2_7

SCREW-P8_0B9_0D2_7

C

1

2

2

2

1

1

3

3

9

9
8
7

3
4
5

4

4

5

5

6

6

6

9

9
8

8

8

7

7

7

S14

S14
SCREW-P8_0D2_7

SCREW-P8_0D2_7

A

B

http://hobi-elektronika.net

C

CPU_HTSTOP#
CPU_RST#
CPU_PROCHOT#

CPU_PRESENT_L

CPU_VID1
THERMTRIP#

D

R357 300-5%-1/16W-0402R357 300-5%-1/16W-0402
R381 300-5%-1/16W-0402R381 300-5%-1/16W-0402
R362 300-5%-1/16W-0402R362 300-5%-1/16W-0402
R573 1K-5%-1/16W-0402R573 1K-5%-1/16W-0402
R382 300-5%-1/16W-0402R382 300-5%-1/16W-0402
R159 300-5%-1/16W-0402R159 300-5%-1/16W-0402

E

1.8V_CPU <8,14,25,27>

U23D

4 4

THERMTRIP#<24>

CPU_VID0<25>
CPU_VID1<25>
CPU_VID2<25>
CPU_VID3<25>
CPU_VID4<25>
CPU_VID5<25>

1.8V_CPU<8,14,25,27>

3 3

2 2

R378 80.6-1%-1/10W-0603R378 80.6-1%-1/10W-0603

Routing 80 ohm differential impedance

Trace less than 0.5" from process

EC FUNCTION

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5

3VS<10,11,12,13,14,15,16,17,18,19,20,22,25,26,28,29>

THRM#<22>

THERMTRIP#

R353 510-5%-1/10W-0603R353 510-5%-1/10W-0603
R368 510-5%-1/10W-0603R368 510-5%-1/10W-0603

R141 10K-5%-1/16W-0402R141 10K-5%-1/16W-0402

40mA

2.5VS_CPU<10,22,26>

TP52TP52

1

CPUCK+
CPUCK-

H_CPU_PWRGD
CPU_HTSTOP#
CPU_RST#
CPU_PRESENT_L

CPU_PROCHOT#

SIC
SID

DBREQ#
DBRDY

TCK
TMS
TDI
TRST#
TDO

DBREQ#
DBRDY

TCK
TMS
TDI
TRST#
TDO

THERMAL SENSOR

THERMDA
THERMDC

THERMDA

THERMDC

Fan control

5VS<16,18,20,22,25,26,28,29>

C392

C392
1uF 6.3V 10% 0402 X5R

1uF 6.3V 10% 0402 X5R

1 1

FANON

FANON<22>

A

R574 1K-5%-1/16W-0402R574 1K-5%-1/16W-0402

N

P

PP

DS

G

B

U23D

F8

VDDA1

F9

VDDA2

A9

CLKIN_H

A8

CLKIN_L

A7

PWROK

F10

LDTSTOP_L

B7

RESET_L

AC6

CPU_PRESENT_L

AF6

THERMTRIP_L

AC7

PROCHOT_L

B5

VID0

C5

VID1

A4

VID2

A6

VID3

C6

VID4

A5

VID5

AF4

SIC

AF5

SID

E9

BYPASSCLK_H

E8

BYPASSCLK_L

C9

FBCLKOUT_H

C8

FBCLKOUT_L

E10

DBREQ_L

G10

DBRDY

AC9

TCK

AA9

TMS

4

AF9

TDI

AD9

TRST_L

AE9

TDO

AA8

FREE1

H18

FREE2

H19

FREE3

R23

FREE4

R24

FREE5

W18

FREE6

SCKT AMD CPU PZ6382A-284S-41F 638P FOXCONN

SCKT AMD CPU PZ6382A-284S-41F 638P FOXCONN

6026B0019501

6026B0019501

R348 510-5%-1/10W-0603_NUR348 510-5%-1/10W-0603_NU
R345 510-5%-1/10W-0603_NUR345 510-5%-1/10W-0603_NU

R349 510-5%-1/10W-0603_NUR349 510-5%-1/10W-0603_NU
R350 510-5%-1/10W-0603_NUR350 510-5%-1/10W-0603_NU
R347 510-5%-1/10W-0603_NUR347 510-5%-1/10W-0603_NU
R346 510-5%-1/10W-0603_NUR346 510-5%-1/10W-0603_NU
R343 510-5%-1/10W-0603_NUR343 510-5%-1/10W-0603_NU

U8

U8

1

VDD

2

D+

3

D­THERM#4GND

ADM1032AR-SO-8-TAP-A&D(8PIN)

ADM1032AR-SO-8-TAP-A&D(8PIN)

6019A0088201

6019A0088201

C246

C246
1000pF 50V 10% 0402 X7R

1000pF 50V 10% 0402 X7R

D20

D20

BAT54C-7 30V 200MA SOT23

BAT54C-7 30V 200MA SOT23

Q33

Q33
FDV303N 25V 0.68A SOT23

FDV303N 25V 0.68A SOT23

SCANSHIFTENB

SCANSHIFTEN

PICAVOLTAGE

ANALOGOUT

PLLCHRZ_H
PLLCHRZ_L

SINGLECHAIN

DIECRACKMON

RSVD_VIDSTRB1
RSVD_VIDSTRB0

RSVD_VDDNB_FB_H

RSVD_VDDNB_FB_L

RSVD_CORE_TYPE

8

SCLK

7

SDATA

6

ALERT#

5

C394

C394

0.01uF 16V 10% 0402 X7R

0.01uF 16V 10% 0402 X7R

SCANCLK1
SCANCLK2

SCANEN

TSTUPD

PLLTEST0
PLLTEST1

ANALOGIN

DIG_T

ANALOG_T

BURNIN_L

GATE0

DRAIN0

THERMDA

THERMDC

BP0
BP1
BP2
BP3

THRMSCK
THRMSDA

AE7
AF7
AB8
AC8
AE8

C7
F7
E7
D7

AD7
G9

H10
AA7
C2

K8
C4

C3
J7

H8
AF8

AE6
Y6

AB6
W8

W7
AA6

B3
C1

H6
G6
D5

40mil

SCANEN

TSTUPD
PLLTEST0

PLLTEST1

PLLCHRZ_H
PLLCHRZ_L

SINCHN

BRN#

THERMDA
THERMDC

TP51TP51

1

1

TP13TP13

1

TP12TP12

1.8V_CPU <8,14,25,27>

THRMSCK <22>
THRMSDA <22>

CN16

CN16

G1

G1

1

1

2

2

G2

G2

FAN 2P 3801-F02N-01R E&T

FAN 2P 3801-F02N-01R E&T

6012B0111202

6012B0111202

CPU_NB_SB_POWER_GOOD<10,13,15,19,22,24>

C

SINCHN
BRN#

PLLTEST1
PLLTEST0
SCANEN
SIC

PCIRST#<17,19>

CPU_SLP#<11,19>

HTSTOPNB#<11>

HTSTOPNB#
CPU_SLP#

CPUCK+

< 0.5"

CPUCK-

CPUCLK& CPUCLK0 Shall be placed as close to process <1".

For 5 mils Trace width for differential pair of CPUCLK.

CPUCLK& CPUCLK0 Shall 20 mils clearance to other.

R354 680-5%-1/16W-0402_NUR354 680-5%-1/16W-0402_NU
R364 300-5%-1/16W-0402R364 300-5%-1/16W-0402

R97 300-5%-1/16W-0402R97 300-5%-1/16W-0402
R102 300-5%-1/16W-0402R102 300-5%-1/16W-0402
R358 300-5%-1/16W-0402R358 300-5%-1/16W-0402
R369 300-5%-1/16W-0402R369 300-5%-1/16W-0402

PCIRST#

R147 0-5%-1/16W-0402_NUR147 0-5%-1/16W-0402_NU
R148 SHORT-0402-5MILR148 SHORT-0402-5MIL

7L->H

R384 680-5%-1/16W-0402R384 680-5%-1/16W-0402
R383 680-5%-1/16W-0402R383 680-5%-1/16W-0402

C458 3900pF 50V 10% 0603 X7RC458 3900pF 50V 10% 0603 X7R

R374

R374

169-1%-1/16W-0402

169-1%-1/16W-0402

C460 3900pF 50V 10% 0603 X7RC460 3900pF 50V 10% 0603 X7R

D

1.8V_CPU <8,14,25,27>

2.5V or 1.8V

CPU POWER GOOD

U9

SN74LVC3G07DCUR VSSOP 8P

SN74LVC3G07DCUR VSSOP 8P

< 1"

U9

1

A1

3

A2

6

A3

4

GND

6019B0270801

6019B0270801

CPU_RST#

7

Y1

H_CPU_PWRGDCPU_NB_SB_POWER_GOOD

5

Y2

CPU_HTSTOP#

2

Y3

8

VCC

S3 ON-OFF not meet
AMD time requests.
Change power plan.
from 3VS to 3VA.

2.5VS <13,15,17,18,19,28>

CPUCLK+ <10>

CPUCLK- <10>

3L

R380 300-5%-1/16W-0402R380 300-5%-1/16W-0402

3VA <15,16,17,18,19,20,21,22,23,24,28,29>

Inventec Corporation

Inventec Corporation

Inventec Corporation

<OrgAddr4>

<OrgAddr4>

<OrgAddr4>
Title

Title

Title

AMD-S1+K8N890

AMD-S1+K8N890

AMD-S1+K8N890

Document Number

Document Number

Document Number

Size

Size

Size

Custom

<Doc>

Custom

<Doc>

Custom

<Doc>

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

Wednesday, October 18, 2006

Date: Sheet of 30

Wednesday, October 18, 2006

8H--->

5

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road
Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan
TEL:[phone]

TEL:[phone]

TEL:[phone]

E

1.8V_CPU <8,14,25,27>

9

9

9

Rev

Rev

Rev

A02

A02

A02