Freescale MCF5208 DATA SHEET
Freescale Semiconductor
Data Sheet: Advance Information
MCF5208 ColdFire® Microprocessor Data Sheet
Supports MCF5207 & MCF5208
by: Microcontroller Division
MCF5208EC
Rev. 1, 4/2007
The MCF5207 and MCF5208 devices are
highly-integrated, 32-bit microprocessors based on the
version 2 ColdFire microarchitecture. Both devices
contain a 16-Kbyte internal SRAM, an 8-Kbyte
configurable cache, a 2-bank SDR/DDR SDRAM
controller, a 16-channel DMA controller, up to three
UARTs, a queued SPI, a low-power management
modeule, and other peripherals that enable the MCF5207
and MCF5208 for use in industrial control and
connectivity applications. The MCF5208 device also
features a 10/100 Mbps fast ethernet controller.
This document provides detailed information on power
considerations, DC/AC electrical characteristics, and AC
timing specifications of the MCF5207 and MCF5208
microprocessors. It was written from the perspective of
the MCF5208 device. See the following section for a
summary of differences between the two devices.
Table of Contents
1 MCF5207/8 Device Configurations......................2
2 Ordering Information ...........................................2
3 Signal Descriptions..............................................3
4 Mechanicals and Pinouts ....................................8
5 Electrical Characteristics ...................................17
6 Revision History ................................................44
© Freescale Semiconductor, Inc., 2007. All rights reserved.
MCF5207/8 Device Configurations
1 MCF5207/8 Device Configurations
The following table compares the two devices described in this document:
Table 1. MCF5207 & MCF5208 Configurations
Module MCF5207 MCF5208
Version 2 ColdFire Core with EMAC
(Enhanced Multiply-Accumulate Unit)
Core (System) Clock up to 166.67 MHz
Peripheral and External Bus Clock
(Core clock ÷ 2)
Performance (Dhrystone/2.1 MIPS) up to 159
Instruction/Data Cache 8 Kbytes
Static RAM (SRAM) 16 Kbytes
SDR/DDR SDRAM Controller • •
Fast Ethernet Controller (FEC) — •
Low-Power Management Module • •
UARTs 3 3
2
C••
I
QSPI • •
32-bit DMA Timers 4 4
Watchdog Timer (WDT) • •
Periodic Interrupt Timers (PIT) 4 4
Edge Port Module (EPORT) • •
Interrupt Controllers (INTC) 1 1
16-channel Direct Memory Access (DMA) • •
FlexBus External Interface • •
General Purpose I/O Module (GPIO) • •
JTAG - IEEE
Package 144 LQFP
®
1149.1 Test Access Port • •
••
up to 83.33 MHz
160 QFP
144 MAPBGA
196 MAPBGA
2 Ordering Information
Table 2. Orderable Part Numbers
Freescale Part
Number
MCF5207CAG166 MCF5207 RISC Microprocessor, 144 LQFP 166.67 MHz –40
MCF5207CVM166 MCF5207 RISC Microprocessor, 144 MAPBGA 166.67 MHz –40
MCF5208CAB166 MCF5208 RISC Microprocessor, 160 QFP 166.67 MHz –40
MCF5208CVM166 MCF5208 RISC Microprocessor, 196 MAPBGA 166.67 MHz –40
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Description Speed Temperature
° to +85° C
° to +85° C
° to +85° C
° to +85° C
Freescale Semiconductor2
Signal Descriptions
3 Signal Descriptions
The following table lists all the MCF5208 pins grouped by function. The Dir column is the direction for
the primary function of the pin only . Refer to Section 4, “Mechanicals and Pinouts” for package diagrams.
For a more detailed discussion of the MCF5208 signals, consult the MCF5208 Reference Manual
(MCF5208RM).
NOTE
In this table and throughout this document, a single signal within a group is
designated without square brackets (i.e., A23), while designations for
multiple signals within a group use brackets (i.e., A[23:21]) and is meant to
include all signals within the two bracketed numbers when these numbers
are separated by a colon.
NOTE
The primary functionality of a pin is not necessarily its default functionality .
Pins that are muxed with GPIO will default to their GPIO functionality.
Table 3. MCF5207/8 Signal Information and Muxing
Signal Name GPIO Alternate 1 Alternate 2
2
RESET
RSTOUT — — — O
EXTAL — — — I
XTAL — — — O
FB_CLK — — — O
2
RCON
DRAMSEL — — — I
A[23:22] — FB_CS
A[21:16] — — — O
A[15:14] — SD_BA[1:0]
A[13:11] — SD_A[13:11]
A10 — — — O
— — — I
Mode Selection
— — — I
[5:4] — O
3
3
—O
—O
1
Dir.
Reset
Clock
FlexBus
Voltage
EVDD
EVDD
EVDD
EVDD
SDVDD
EVDD
EVDD
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
MCF5207
144
LQFP
Domain
82 J10 90 J14
74 M12 82 N14
78 K12 86 L14
80 J12 88 K14
34 L1 40 N1
144 C4 160 C3
79 H10 87 K11
118, 117 B9, A10 126, 125 B11, A11
116–114,
112, 108,
107
106, 105 B12, C12 114, 113 C14, D12
104–102 D11, E10,
101 C10 109 E12
MCF5207
144
MAPBGA
C9, A11,
B10, A12,
C11, B11
D12
MCF5208
160
QFP
124, 123,
122, 120,
116, 115
112, 111,
110
MCF5208
196
MAPBGA
B12, A12,
A13, B13,
B14, C13
D13, D14,
E11
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Freescale Semiconductor 3
Signal Descriptions
Table 3. MCF5207/8 Signal Information and Muxing (continued)
Signal Name GPIO Alternate 1 Alternate 2
A[9:0] — SD_A[9:0]
D[31:16] — SD_D[31:16]
D[15:0] — FB_D[31:16]
BE/BWE[3:0] PBE[3:0] SD_DQM[3:0]
OE
TA
R/W
2
PBUSCTL3 — — O
PBUSCTL2 — — I
PBUSCTL1 — — O
3
4
4
3
—O
— I/O
— I/O
— O
TS PBUSCTL0 DACK0 —O
1
Dir.
Voltage
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
MCF5207
144
LQFP
Domain
100–91 E11, D9,
MCF5207
144
MAPBGA
E12, F10,
F11, E9,
MCF5208
MCF5208
160
QFP
MAPBGA
108–99 E13, E14,
F11–F14,
G11–G14
F12, G10,
G12, F9
21–28,
40–47
F1, F2, G1,
G2, G4, G3,
H1, H2, K3,
L2, L3, K2,
27–34,
46–53
K4–K1, M3,
N3, M4, N4,
P4, L5, M5,
M3, J4, M4,
K4
8–15, 51–58 B2, B1, C2,
C1, D2, D1,
E2, E1, L5,
K5, L6, J6,
16–23,
57–64
G4–G1, H1,
N6, P6, L7,
M7, N7, P7,
M6, J7, L7,
K7
20, 48, 18, 50F4, L4, E3, J526, 54, 24, 56H2, P5, H4,
60 J8 66 M8
90 G11 98 H14
59 K6 65 L8
4 B3 12 E3
196
J4–J1,
N5
F3–F1,
N8, P8
M6
Chip Selects
FB_CS
[3:2] PCS[3:2] — — O
FB_CS1
FB_CS0
PCS1 SD_CS1 —O
———O
SDRAM Controller
SD_A10 — — — O
SD_CKE — — — O
SD_CLK — — — O
SD_CLK
SD_CS0
———O
———O
SD_DQS[3:2] — — — O
SD_SCAS
SD_SRAS
———O
———O
SD_SDR_DQS — — — O
SD_WE
———O
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
SDVDD
119, 120 D7, A9 — C11, A10
121 C8 127 B10
122 B8 128 C10
37 M1 43 N2
6C314E1
31 J1 37 L1
32 K1 38 M1
7 A1 15 F4
19, 49 F3, M5 25, 55 H3, L6
38 M2 44 P2
39 J2 45 P3
29 H3 35 L3
5D313E2
Freescale Semiconductor4
Table 3. MCF5207/8 Signal Information and Muxing (continued)
Signal Descriptions
Signal Name GPIO Alternate 1 Alternate 2
External Interrupts Port
IRQ7
IRQ4
IRQ1
2
2
2
PIRQ7
PIRQ4
PIRQ1
2
2
2
— — I
DREQ0
2
— I
— — I
Voltage
MCF5207
144
LQFP
Domain
5
134 A5 142 C7
133 C6 141 D7
132 B6 140 D8
1
Dir.
EVDD
EVDD
EVDD
MCF5207
144
MAPBGA
MCF5208
160
QFP
MCF5208
196
MAPBGA
FEC
FEC_MDC PFECI2C3 I2C_SCL
FEC_MDIO PFECI2C2 I2C_SDA
2
U2TXD O
2
U2RXD I/O
FEC_TXCLK PFECH7 — — I
— PFECH6 — U1RTS O
FEC_TXEN PFECH6 — U1RTS O
FEC_TXD0 PFECH5 — — O
FEC_COL PFECH4 — — I
FEC_RXCLK PFECH3 — — I
FEC_RXDV PFECH2 — — I
FEC_RXD0 PFECH1 — — I
FEC_CRS PFECH0 — — I
FEC_TXD[3:1] PFECL[7:5] — — O
— PFECL4 — U0RTS O
FEC_TXER PFECL4 — U0RTS O
FEC_RXD[3:2] PFECL[3:2] — — I
— PFECL1 — U1CTS I
FEC_RXD1 PFECL1 — U1CTS I
— PFECL0 — U0CTS I
FEC_RXER PFECL0 — U0CTS I
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
— — 148 D6
— — 147 C6
— — 157 B3
142 A2 — —
— — 158 A2
— — 3 B1
— — 7 D3
— — 154 B4
— — 153 A4
— — 152 D5
— — 8 D2
— — 6–4 C1, C2, B2
141 D5 — —
— — 156 A3
— — 149–150 A5, B5
139 B4 — —
— — 151 C5
140 E4 — —
— — 155 C4
Note: The MCF5207 does not contain an FEC module. However, the UART0 and UART1 control signals (as well as their GPIO signals)
are available by setting the appropriate FEC GPIO port registers.
I2C
I2C_SDA
I2C_SCL
2
2
PFECI2C0
PFECI2C1
2
U2RXD
2
U2TXD
2
2
— I/O
— I/O
EVDD
EVDD
— — —D1
— — —E4
DMA
DACK0 and DREQ0 do not have a dedicated bond pads. Please refer to the following pins for muxing:
and QSPI_CS2 for DACK0, IRQ4 and QSPI_DIN for DREQ0.
TS
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Freescale Semiconductor 5
Signal Descriptions
Table 3. MCF5207/8 Signal Information and Muxing (continued)
Signal Name GPIO Alternate 1 Alternate 2
Voltage
Domain
MCF5207
144
LQFP
1
Dir.
MCF5207
144
MAPBGA
MCF5208
160
QFP
MCF5208
196
MAPBGA
QSPI
QSPI_CS2 PQSPI3 DACK0 U2RTS O
QSPI_CLK PQSPI0 I2C_SCL
QSPI_DOUT PQSPI1 I2C_SDA
QSPI_DIN PQSPI2 DREQ0
2
2
2
— O
— O
U2CTS I
EVDD
EVDD
EVDD
EVDD
126 A8 132 D10
127 C7 133 A9
128 A7 134 B9
129 B7 135 C9
Note: The QSPI_CS1 and QSPI_CS0 signals are available on the U1CTS, U1RTS, U0CTS, or U0RTS pins for the 196 and 160-pin
packages.
UARTs
U1CTS PUARTL7 DT1IN QSPI_CS1 I
U1RTS PUARTL6 DT1OUT QSPI_CS1 O
U1TXD PUARTL5 — — O
U1RXD PUARTL4 — — I
U0CTS PUARTL3 DT0IN QSPI_CS0 I
U0RTS PUARTL2 DT0OUT QSPI_CS0 O
U0TXD PUARTL1 — — O
U0RXD PUARTL0 — — I
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
— — 136 D9
— — 137 C8
131 A6 139 A8
130 D6 138 B8
— —76N12
— —77P12
71 L10 79 P13
70 M10 78 N13
Note: The UART2 signals are multiplexed on the DMA Timers, QSPI, FEC, and I2C pins. For the MCF5207 devices, the UART0 and
UART1 control signals are multiplexed internally on the FEC signals.
DMA Timers
DT3IN PTIMER3 DT3OUT U2CTS I
DT2IN PTIMER2 DT2OUT U2RTS I
DT1IN PTIMER1 DT1OUT U2RXD I
DT0IN PTIMER0 DT0OUT U2TXD I
BDM/JTAG
JTAG_EN
DSCLK — TRST
PSTCLK — TCLK
7
— — — I
BKPT — TMS
DSI — TDI
2
2
2
2
— I
— O
— I
— I
DSO — TDO — O
DDATA[3:0] — — — O
PST[3:0] — — — O
EVDD
EVDD
EVDD
EVDD
6
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
EVDD
135 B5 143 B7
136 C5 144 A7
137 A4 145 A6
138 A3 146 B6
83 J1191J13
76 K11 84 L12
64 M7 70 P9
75 L12 83 M14
77 H9 85 K12
69 M9 75 M12
— K9, L9, M11,
M8
— L11, L8,
K10, K8
—P11, N11,
M11, P10
— N10, M10,
L10, L9
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Freescale Semiconductor6
NOTES:
Table 3. MCF5207/8 Signal Information and Muxing (continued)
Signal Descriptions
Signal Name GPIO Alternate 1 Alternate 2
ALLPST — — — O
Voltage
Domain
MCF5207
144
LQFP
67 — 73 —
1
Dir.
EVDD
MCF5207
144
MAPBGA
MCF5208
160
QFP
MCF5208
MAPBGA
Test
7
TEST
— — — I
PLL_TEST — — — I
EVDD
EVDD
109 ——C12
— ——M13
Power Supplies
EVDD — — — — — 1, 33, 63, 66,
72, 81, 87,
125
E5–E6, F5,
G8–G9,
H7–H8
2, 9, 69, 72,
80, 89, 95,
131
E5–E7, F5,
F6, G5, H10,
J9, J10,
K8–K10,
K13, M9
IVDD — — — — — 30, 68, 84,
113, 143
D4, D8, H4,
H11, J9
36, 74, 92,
121, 159
J12, D4,
D11, H11,
L4, L11,
PLL_VDD — — — — — 86 H12 94 H13
SD_VDD — — — — — 3, 17, 35, 61,
89, 110, 123
E7–E8, F8,
G5, H5–H6,
J3
11, 39, 41,
67, 97, 118,
129
E8–E10, F9,
F10, G10,
H5, J5, J6,
K5–K7, L2
VSS — — — — — 2, 16, 36, 62,
65, 73, 88,
111, 124
D10, F6–F7,
G6–G7
1, 10, 42, 68,
71, 81, 96,
117, 119,
130
A1, A14,
F7–F8,
G6–G9,
H6–H9,
J7–J8, L13,
M2, N9, P1,
196
P14
PLL_VSS — — — — — 85 —93H12
1
Refers to pin’s primary function.
2
Pull-up enabled internally on this signal for this mode.
3
The SDRAM functions of these signals are not programmable by the user. They are dynamically switched by the processor when
accessing SDRAM memory space and are included here for completeness.
4
Primary functionality selected by asserting the DRAMSEL signal (SDR mode). Alternate functionality selected by negating the
DRAMSEL signal (DDR mode). The GPIO module is not responsible for assigning these pins.
5
GPIO functionality is determined by the edge port module. The GPIO module is only responsible for assigning the alternate functions.
6
If JTAG_EN is asserted, these pins default to Alternate 1 (JTAG) functionality. The GPIO module is not responsible for assigning
these pins.
7
Pull-down enabled internally on this signal for this mode.
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Freescale Semiconductor 7
Mechanicals and Pinouts
4 Mechanicals and Pinouts
Drawings in this section show the pinout and the packaging and mechanical characteristics of the
MCF5207 and MCF5208 devices.
NOTE
The mechanical drawings are the latest revisions at the time of publication
of this document. The most up-to-date mechanical drawings can be found at
the product summary page located at http://www.freescale.com/coldfire.
4.1 Pinout—144 LQFP
Figure 1 shows a pinout of the MCF5207CAG166 device.
RCON
IVDD
U1RTS
U0RTS
U0CTS
U1CTS
DT0IN
DT1IN
DT2IN
DT3IN
IRQ7
IRQ4
IRQ1
U1TXD
U1RXD
QSPI_DIN
QSPI_DOUT
QSPI_CLK
QSPI_CS2
EVDD
VSS
SD_VDD
FB_CS0
FB_CS1
FB_CS2
FB_CS3
A23
A22
A21
A20
A19
IVDD
A18
VSS
SD_VDD
TEST
•
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
TDO/DSO
U0TXD
U0RXD
109
72
EVDD
EVDD 1 108 A17
EVSS 2 107 A16
SD_VDD 3 106 A15
TS
SD_WE
SD_CKE 6 103 A12
SD_VDD
BE/BWE1
SD_DQS3
BE/BWE3
SD_SDR_DQS 29 80 XTAL
SD_CLK 31 78 EXTAL
SD_CLK
SD_VDD 33 76 TRST
FB_CLK 34 75 TMS/BKPT
SD_VDD 35 74 RSTOUT
4 105 A14
5 104 A13
SD_CS
7 102 A11
D15 8 101 A10
D14 9 100 A9
D13 10 99 A8
D12 11 98 A7
D11 12 97 A6
D10
13 96 A5
D9
14 95 A4
D8
15 94 A3
EVSS
16 93 A2
17 92 A1
18 91 A0
19 90 TA
20 89 SD_VDD
D31 21 88 VSS
D30 22 87 EVDD
D29 23 86 PLL_VDD
D28 24 85 PLL_VSS
D27 25 84 IVDD
D26 26 83 JTAG_EN
D25 27 82 RESET
D24 28 81 EVDD
IVDD 30 79 DRAMSEL
32 77 TDI/DSI
VSS 36 73 VSS
3738394041424344454647484950515253545556575859606162636465666768697071
SD_A10
SD_CAS
D23
SD_RAS
D22
D21
D20
D19
D18
D17
D16
BE/BWE2
SD_DQS2
D7D6D5D4D3D2D1
BE/BWE0
D0
OE
R/W
VSS
SD_VDD
EVDD
VSS
TCLK/PSTCLK
EVDD
IVDD
ALL_PST
Figure 1. MCF5207CAG166 Pinout Top View (144 LQFP)
/DSCLK
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Freescale Semiconductor8
4.2 Package Dimensions—144 LQFP
Figure 2 and Figure 3 show MCF5207CAB166 package dimensions.
Mechanicals and Pinouts
Figure 2. MCF5207CAB166 Package Dimensions (Sheet 1 of 2)
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Freescale Semiconductor 9
Mechanicals and Pinouts
View A
Section A-A
Rotated 90× CW
144 Places
View B
Figure 3. MCF5207CAB166 Package Dimensions (Sheet 2 of 2)
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Freescale Semiconductor10
4.3 Pinout—144 MAPBGA
The pinout of the MCF5207CVM166 device is shown below.
123456789101112
Mechanicals and Pinouts
ASD_CS
B
D14 D15 TS U1CTS DT3IN IRQ1 QSPI_DIN FB_CS0 A23 A19 A16 A15 B
C
D12 D13 SD_CKE RCON DT2IN IRQ4
D
D10 D11 SD_WE IVDD U0RTS U1RXD FB_CS3 IVDD A8 VSS A13 A11 D
E
F
D31 D30 SD_DQS3 BE/BWE3 EVDD VSS VSS SD_VDD A0 A6 A5 A3 F
G
D29 D28 D26 D27 SD_VDD VSS VSS EVDD EVDD A2 TA A1 G
H
D25 D24
J SD_CLK SD_RAS
K SD_CLK
LFB_CLK
U1RTS DT0IN DT1IN IRQ7 U1TXD
D8 D9 BE/BWE1 U0CTS EVDD EVDD SD_VDD SD_VDD A4 A12 A9 A7 E
SD_SDR_
DQS
SD_VDD D18 BE/BWE0 D4 D2 OE IVDD RESET JTAG_EN XTAL J
D20 D23 D16 D6 R/W D0 PST0 DDATA3 PST1
D22 D21 BE/BWE2 D7 D5 D1 PST2 DDATA2 U0TXD PST3
IVDD SD_VDD SD_VDD EVDD EVDD TDI/DSI
QSPI_
DOUT
QSPI_
QSPI_CS2 FB_CS2
CLK
FB_CS1
A22 A20 A18 A
A21 A10 A17 A14 C
DRAM
SEL
IVDD PLL_VDD H
TRST
/
DSCLK
EXTAL K
TMS/
BKPT
L
M SD_A10 SD_CAS
123456789101112
D19 D17 SD_DQS2 D3
TCLK/
PSTCLK
DDATA0 TDO/DSO U0RXD DDATA1 RSTOUT M
Figure 4. MCF5207CVM166 Pinout Top View (144 MAPBGA)
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Freescale Semiconductor 11
Mechanicals and Pinouts
4.4 Package Dimensions—144 MAPBGA
Figure 5 shows the MCF5207CAB166 package dimensions.
Figure 5. MCF5207CAB166 Package Dimensions (144 MAPBGA)
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Freescale Semiconductor12
Mechanicals and Pinouts
4.5 Pinout—160 QFP
Figure 6 shows a pinout of the MCF5208CAB166 device.
RCON
IVDD
FEC_TXEN
FEC_TXCLK
FEC_TXER
FEC_RXER
FEC_RXCLK
FEC_RXDV
FEC_RXD0
FEC_RXD1
FEC_RXD2
FEC_RXD3
FEC_MDC
FEC_MDIO
DT0IN
DT1IN
DT2IN
DT3IN
IRQ7
IRQ4
IRQ1
U1TXD
U1RXD
U1RTS
U1CTS
QSPI_DIN
QSPI_DOUT
QSPI_CLK
QSPI_CS2
EVDD
VSS
SD_VDD
FB_CS0
FB_CS1
A23
A22
A21
A20
A19
IVDD
•
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
U0RTS
U0RXD
121
80
EVDD
U0TXD
VSS 1 120 A18
EVDD 2 119 VSS
FEC_TXD0 3 118 SD_VDD
FEC_TXD1 4 117 VSS
FEC_TXD2 5 116 A17
FEC_TXD3 6 115 A16
FEC_COL 7 114 A15
FEC_CRS 8 113 A14
EVDD 9 112 A13
VSS 10 111 A12
SD_VDD 11 110 A11
TS
SD_WE
SD_CKE
BE/BWE1
SD_DQS3
BE/BWE3
SD_SDR_DQS
SD_CLK
SD_CLK
SD_VDD
FB_CLK
12 109 A10
13 108 A9
14 107 A8
SD_CS
15 106 A7
D15
16 105 A6
D14
17 104 A5
D13
18 103 A4
D12
19 102 A3
D11
20 101 A2
D10
21 100 A1
D9
22 99 A0
D8
23 98 TA
24 97 SD_VDD
25 96 VSS
26 95 EVDD
D31
27 94 PLL_VDD
D30
28 93 PLL_VSS
D29
29 92 IVDD
D28
30 91 JTAG_EN
D27
31 90 RESET
D26
32 89 EVDD
D25
33 88 XTAL
D24
34 87 DRAMSEL
35 86 EXTAL
IVDD
36 85 TDI/DSI
37 84 TRST
38 83 TMS/BKPT
39 82 RSTOUT
40 81 VSS
414243444546474849505152535455565758596061626364656667686970717273747576777879
VSS
SD_VDD
SD_A10
SD_CAS
D23
SD_RAS
D22
D21
D20
D19
D18
D17
D16
D7D6D5D4D3D2D1
BE/BWE0
BE/BWE2
SD_DQS2
D0
OE
R/W
VSS
SD_VDD
EVDD
TCLK/PSTCLK
VSS
EVDD
ALL_PST
IVDD
U0CTS
TDO/DSO
Figure 6. MCF5208CAB166 Pinout Top View (160 QFP)
/DSCLK
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Freescale Semiconductor 13
Mechanicals and Pinouts
Top Vi ew
4.6 Package Dimensions—160 QFP
The package dimensions of the MCF5208CAB166 device are shown in the figures below.
Figure 7. MCF5208CAB166 Package Dimensions (Sheet 1 of 2)
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Freescale Semiconductor14
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