foxconn PM_AMD Schematic

5

4

3

2

1

D D

P02 : SYSTEM BLOCK DIAGRAM P03 : CLOCK MAP P04 : POWER DELIVERY CHART P05 : POWER SEQUENCY DIAGRAM P06 : POWER SEQUENCE CHART P07 : SMBUS&I2C MAP P08 : RESET SIGNAL MAP P09 : EXTERNAL CLOCK GENERATOR P10 : S1G4 HT I/F P11 : S1G4 CTRL & DEBUG

C C

P12 : S1G4 DDRIII MEMORY I/F P13 : S1G4 PWR & GND P14 : RS880M-HT LINK I/F P15 : RS880M-PCIE I/F P16 : RS880M-SYSTEM I/F P17 : RS880M-SPMEM/STRAPS P18 : RS880M-POWER P19 : SB820-PCIE/PCI/CPU/LPC P20 : SB820-GPIO/USB/AZ/RGMII P21 : SB820-SATA/IDE/HWM/SPI P22 : SB820-POWER & DECOUPLING P23 : SB820-STRAPS P24 : DDR3(SO-DIMM_0) 1/2_M

B B

P25 : DDR3(SO-DIMM_1) 2/2_M P26 : VGA_S3 (PCI-E) 1/6 P27 : VGA_S3 (STRAP) 2/6 P28 : VGA_S3 (IO) 3/6 P29 : VGA_S3 (DDR3) 4/6 P30 : VGA_S3 (DP) 5/6 P31 : VGA_S3 (POWER) 6/6 P32 : VRAM (DDR3) 1/3 P33 : VRAM (DDR3) 2/3 P34 : VRAM (BYPASS) 3/3

TABLE OF CONTENTS

P36 : EC Flash ROM/SPI P37 : Audio (CODEC_ALC270) P38 : Audio (SPK+AMP) P39 : Audio (MUTE) P40 : Audio (JACK+AMP) P41 : LAN(RTL8103EL) P42 : RJ11 P43 : USBx2 P44 : USB DB P45 : Card Reader P46 : Mini-PCIe(WLAN) P47 : MOUNTING HOLE P48 : SATA HDD/ODD P49 : CRT P50 : LVDS P51 : HDMI P52 : Discrete GPU Option P53 : Camera P54 : BlueTooth P55 : FAN/Thermal Sensor P56 : Power Button Board/LED P57 : PWR_DCIN & Battery P58 : PWR_Charger MAX8731AETI P59 : 5V/3.3V MAX17020 P60 : Vcore MAX17480 P61 : +V1.1A TPS51117 P62 : +V1.8S NB634 P63 : 1.5VDDR3 +0_75V TPS51116 P64 : VPCIE +VDDA_CPU P65 : PWR_Others power plane P66 : +VDDR_NB / VLDT/ NB634 P67 : ATVDD TPS51217 P68 : +VCCNB TPS51117

P35 : EC+KBC (IT8502E)

(UTC/GMT)

Design byP. Leader Check by

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0.1

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A A

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

TABLE OF CONTENTS

Size Document Number Rev

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Hon Hai Precision Industry Co. Ltd.

PM_AMD

1

2

3

4

5

6

7

8

VRAMx4 64Mx16 DDR3

P34

A A

Discrete GPU Option

HDMI Conn.

LVDS Conn.

CRT

B B

Conn.

HDMI

P53

LVDS

P52

CRT

P51

Int. Speaker x2

Option

WLAN or WLAN+BT Half Size Mini-Card

Analog Mic x1 With Pre-Amp

Ext. Mic In Jack Headphone Jack

P54

Buffer Level Shifter ESD

P40

P39 P42

P42

P51

CODEC RealTek ALC270-GR

USB 2.0 (2 amp) x2

C C

P46

USB 2.0 (2 amp) x1

Option

P45

VGA Webcam (F2.8 lens)

GPU AMD/ATi Park LP 64bit

P28

P39

PCIe X16

PCIe HDA

USB2.0

AMD S1G4

HT

North Bridge RS880M/RX881

A-Link

South Bridge SB820

P10

P14

P19

800/1066 MHZ

PCIe

Side Port

USB2.0

HDA

SATA

Seti 100B; OmniVision OV7670; Micron MI-366;

P55

LPC

SO-DIMM 0 800/1066 MHZ DDR(III)

SO-DIMM 1 800/1066 MHZ DDR(III)

LAN RealTek RTL8103EL (10/100)

P43

DDR3

128MB

P17

SATA : HDD

SATA : ODD

P50

P26

P27

Transformer DELTA LFE8456A-R

Option

BlueTooth Module

Card Reader RealTek RTS5159

Option

MDC Modem

CLK Gen IDT 9LPRS480

X,TAL

14.318MHZ

RJ45

P44

P47

P9

P56

5-IN-1 Combo Connector

RJ11

FAN

Battery Pack

System

P59

D D

Adapter 19V

P59

1

Charger MAX8731AETI

P60

2

Lid Switch

Power Button

KBC ROM 2MB

P57

P37

P58

P38

3

PWM

GPIO

SPI

Embedded Controller

ITE IT8502E

P37

4

5

KBMX

PS/2

SMBus

Keyboard

Touch PAD

Thermal Sensor EMC1422-1-ACZL

6

P37

P57

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

SYSTEM BLOCK DIAGRAM

Size Document Number Rev

Custom

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Hon Hai Precision Industry Co. Ltd.

PM

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3

2

1

EXTERNAL CLOCK MODE

SPM_CLK

SIDE PORT MEMORY CHIP

NB_OSC

100MHZ

14.318MHZ

xxxMHZ

GFX_CLKP/N

100MHZ

PCIE_DT_CLKP/N

100MHZ

PCIE_1394_CLKP/N

100MHZ

PCIE_PE0_CLKP/N

100MHZ

PCIE_PE1_CLKP/N

100MHZ

PCIE_EXPCARD_CLKP/N

100MHZ

PCIE_PE2_CLKP/N

100MHZ

PCIE_LAN_CLKP/N

100MHZ

PCIE_USB30_CLKP/N

100MHZ

PCIE_PE3_CLKP/N

100MHZ

CLK_REQ in CLK GEN

MINIPCIE SLOT (RS880M, 1 LANE)

EXT_PCIE_PE0_CLKREQ#

MINIPCIE SLOT (SB800, 1 LANE)

EXT_PCIE_PE1_CLKREQ#

PCIE GPP I/F (RS880M, 1 LANE)

EXT_PCIE_LAN_CLKREQ#

MINIPCIE SLOT (SB800, 1 LANE)

EXT_PCIE_PE3_CLKREQ#

PORT0:WLAN

PORT1:WWAN

BCM57760A0KMLG

PORT3:WLAN

AMD NORTHBRIDGE

RS880M

A-LINK

GPP_REFCLK

100MHZ

GPP REF_CLK

A_SODIMM

B_SODIMM

C C

1066MHZ

MEM_MB_CLK1_P/N

MEM_MB_CLK7_P/N

MEM_MA_CLK1_P/N

MEM_MA_CLK7_P/N

AMD

SIG4 CPU

CPU_CLKP/N

200MHZ

NBLINK_RCLKP/N

EXTERNAL

CLOCK GENERATOR

14.31818MHz

KBC_OSC

DNI

SB_OSC

B B

HT_REFCLKP/N

NB_GFX_REFCLKP/N

NB CLOCK INPUT TABLE

NB CLOCKS

HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N

GFX_REFCLK GPP_REFCLK

GPPSB_REFCLK 100M DIFF

* RS880M can be used as clock buffer to output two PCIE referecence clocks By deault, chip will configured as input mode, BIOS can program it to output mode.

AMD SB800

EXT CLK MODE

FOR SATA

25M Hz

SATA_X1

SATA_X2

SBSRC_CLKP/N

CLK_48M_USB

100MHZ

48MHZ

PCIE_RCLKP/N

USBCLK

100M DIFF 100M DIFF 14M SE (1.1V) vref

100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

DNI

25M Hz

PCICLK0

25M_X1

25M_X2

PCICLK1

PCICLK2 PCICLK3 PCICLK4

LPCCLK0

LPCCLK1

RTCCLK

AZ_BITCLK

SPI_CLK

14M_25M_48M_OSC

GBE_RXCLK GBE_TXCLK

RS880M

PCI_CLK0

33MHZ

SMSC_CLK

33MHZ

PCI_CLK2 PCI_CLK3 PCI_CLK4

33MHZ

LPC_CLK0

33MHZ

LPC_CLK1

33MHZ

AZ_BIT_CLK

24MHZ

SPI_CLK

xxHZ

SB_25MHz_PHY GBE_TX/RXCLK

SPCI MICTOR PSOT CODE LED

KBC1100L

STRAPS SETTING, UNUSED CLOCKS

LPC BIOS & HEADER

HD AUDIO

SPI ROM & HEADER

32.768K Hz

A A

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

CLOCK MAP

Size Document Number Rev

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PM

(UTC/GMT)

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Sheet of

368

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0.1

5

4

3

2

1

+VBAT

Adaptor

19.5V 90W/65W

D D

5.5A/4.6A

EC_ALW_EN

AUX_EN

MAXIM +V5A/+V3.3AL MAX17020 For System Power

EN1(+V5A) VREG5

EN1(+V3.3AL)

+V3.3AL

SI7716ADN-T1-GE3

BUMP

ACPRES

PWR_Charger Battery Charger

ADAPT_OC_IINP

C C

Switch Mode MAX8731AETI

BT+

+V5A

SLP_S3#_3R

TI TPS51117 For +V1.1A

EN

MPS NB634 For +V1.8S

EN

PGOOD

+V1.1A_PG

+V5A

SI7716ADN-T1-GE3

+V12S

+V3.3A/6A/4.8A

EC_ALW_EN

SI7716ADN-T1-GE3

+V12S

+V12A +V12S

FDN340P_NL

SLP_S3#_3R

+V1.1A +V1.1S/10A/8A

NTMFS4841NHT1G

VRM_PWRGD

TLV431ASNT1G

+V3.3A

+V5A/7A/5.6A

+V5S/4A/4A

+V3.3AL/6A/4.8A

+V1.5A/0.006A/0.006A

+V3.3S/4A/4A+V3.3A

+V3.3S_DELAY/0.5A/0.5A

FDN340P_NL

+V1.8S

For system power enable.

+V1.1A/10A/8A

+V1.8S/3A/2.4A

+VCC_CORE/38A/30A

MAXIM

Battery Pack 3S2P/3S3P

VDDA_PWRGD

MAX17480 FOR +VCC_CORE/NB_RUN

SHDN#

PWRGD

VRM_PWRGD

+VDDNB_CPU/4A/4A

in S0~S5

in S0~S1

in S0~S5

in S0~S1

in S0~S5

in S0~S1

in S0~S3

in S0~S1

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

POWER DELIVERY CHART

Size Document Number Rev

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

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Hon Hai Precision Industry Co. Ltd.

PM_AMD

(UTC/GMT)

1

Sheet of

468

Sheet of

468

Sheet of

468

0.1

+VPCIE/2.5A/2A

2

+VDDR_NB/2A/2A

+VLDT/4A/3.2A

+V1.5/10A/8A

1.1V 1.0V

+V0.75S/1A/1A

+VCC_NB/10A/8A

+VDD_CORE/10A/8A

MPS NB634 For +VDDR_NB

VDDA_PWRGD

B B

VRM_PWRGD

SLP_S3#_3R

SLP_S4#_3R

VRM_PWRGD

A A

SLP_S3#_3R

Switching

5

EN

MPS NB634 For +VLDT

EN

TI TPS51116DSCR For +V1.5 DDR3

S3

+V0.75S

S5

TI TPS51117DSCR For +VCCNB

TI TPS51217DSCR For +VDD_CORE

Linear Control signal

4

Power Rail

PGOOD

1.1~1.1V

0.9~1.2V

+V1.5

SI7716ADN-T1-GE3

+V1.8S

http://laptop-motherboard-schematic.blogspot.com/

3

+V1.5S/5A/4A

SLP_S3#_3R

APL5930

5

4

3

2

1

10

8

+1.1DUAL_PWRGD

5

MAX 17009

PWRGD

MAX 8792

PWRGD

AOZ1024

+1.1VEN

MAX8717

+1.8VEN

CPU_VDD_RUN

9

CPU_VDDNB_RUN

9

VRM_PWRGD

PWRGD

CPU_VDDR

VRM_PWRGD

MAX8775

+1.1VDUAL

+1.8V

VDDIO_SUS +1.5V

1V8_PWRGD

VCC_NB

VLDT

SWITCH (OPTION)

MAX1714

+1.1VDUAL

+1.5V

+1.1V

SWITCH

+3.3VALW

3

V3V5_DUAL_PWRGD

PWR_BTN#_EC

EC SMSC

4

SB800

VDD_DUAL_EN_EC

SLP_S5#

SLP_S3#

1 2

5 5

D D

PWRGD

MAX1533

MAX8632

+3.3VDUAL

+5VDUAL

VDDIO_SUS

VTT

5

+5VDUAL

SLP_S3#

+3.3VDUAL

C C

SWITCH

Power on Sequence required:

SB800: 1, +3.3VDUAL ramp before +1.1VDUAL 2, +3.3V ramp before +1.8v 3, +1.8V ramp before +1.1v 4, +3.3v ramp before +1.1v 5, +3.3VALW_R ramping down time > 300us 6, 50uS <= All power rails except +3.3VALW_R <= 40mS 7, 100uS <= +3.3VALW_R <= 40mS

RS880:

B B

1, 0 <(+3.3V) - (+1.8v) < 2.1 2, +1.8V ramp before +1.1v

3. +1.1V ramp before VCC_NB

+5V

CPU_VDDA_RUN

+3.3V

6

MAX1935 LDO

EN

7

VDDA_PWRGD

VRM_PWRGD

10

A A

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

POWER SEQUENCY DIAGRAM

Size Document Number Rev

Custom

Page Modified:

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Hon Hai Precision Industry Co. Ltd.

PM

(UTC/GMT)

1

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1

Power on Sequence required:

SB800: 1, +3.3VDUAL ramp before +1.1VDUAL 2, +3.3V ramp before +1.8v 3, +1.8V ramp before +1.1v 4, +3.3v ramp before +1.1v 5, +3.3VALW_R ramping down time > 300us 6, 50uS <= All power rails except +3.3VALW_R <= 40mS 7, 100uS <= +3.3VALW_R <= 40mS

RS880: 1, 0 <(+3.3V) - (+1.8v) < 2.1

D D

2, +1.8V ramp before +1.1v

3. +1.1V ramp before VCC_NB

SB OUTPUT

SB INPUT

C C

CPU MEM CTL & DDR3 SODIMM PWRS

B B

CPU_THM/SB/SB_SCL1/2 SB_KB/SPI/LPC ROM PWRS

KBC is ready

KBC is powered by A_VBAT & +3.3VALW

A A

CPU_LDT_RST#

(SB TO CPU)

CPU_PWROK

(SB TO CPU)

CPU_CLKP/N running

NB_PWRGD

NB_PWRGD_IN

+1.2V_PWRGD

VCC_NB

VLDT

+1.1V

VRM_PWRGD

CPU_VDDR

CPU_VDD_RUN

CPU_VDDNB_RUN

VDDA_PWRGD

+2.5V_LDO

(CPU_VDDA_2.5_RUN)

+1.5V

1V8_PWRGD

GROUP A GROUP B

V3V5DUAL_PWRGD 1V1DUAL_PWRGD SYSTEM_DUAL_PG_DELAY

+5V/+3.3V

RUN_EN_HIGH RUN_EN_LOW VDD_BOOST_LOW

SLP_S3#

VDRAM_PWRGD

MEM_VTT MEM_VREF

CPU_VDDIO_SUS

SLP_S5#

PWR_BTN#_EC

RSMRST#

DUAL RAILS

VDD_DUAL_EN

VDD_DUAL_EN_EC

PWR_BTN#_HW PWR_BTN#_SB

AC_OK (ACIN detect)

+5VALW/+3.3VALW

LDO:5.4V (from DCIN)

+VIN/+12V_HD

A_VBAT

+1.8V

1)+1.5V SWITCH TO +1.5VDUAL 2)LASSO_PWRON 3)LPCPD# for TPM 4) TO SB&KBCSB_PWRGD

VTT only will be shut down in S3 mode, and VTT for DDR3 SODIMM only.

Power button pressed

Power button from EC to SB

20mS delay

+5VDUAL/+3.3VDUAL/+1.5VDUAL/+1.1VDUAL When IMC, always on at all time( always PWR)

Battery inserted/AC IN

>1 mS Req.

RC=~22ms

RC=~4.7ms

VRM_PWRGD AND 1V8_PWRGD

RC=0

AC not present scenario = LOW AC present= high

Req.

>1 mS

>1 mS Req.

running

VCC_NB should not ramp before 1.1v

VCC_NB(all NB power) valid before NB_PWRGD.

SLP_S3#

1V1DUAL_PWRGD 1V5_PWRGD/DNI

SYS_RST#

+1.2V_PWRGD

KBC_GPIO77/DNI

to S3

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

POWER SEQUENCY TIMING

Size Document Number Rev

Custom

5

4

3

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Custom

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Hon Hai Precision Industry Co. Ltd.

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Sheet of

668

Sheet of

668

Sheet of

668

0.1

5

Thermal Systems

(Emergency Shutdown, Throttling, Fan Control)

4

3

2

1

translate1.5V TSI 3.3V TSI

THERMTRIP_L

D D

MEMHOT_L

ALERT_L

THERMDC THERMDA

SID SIC

AMD

translate

VRM Power

VRM_HOT#

S1G4

PROCHOT_L

translate

ADM

C C

SO-DIMM EVENT

MXM

THERM#

SDA SCL

1032

Thermal disaster prevention is implemented by PROCHOT_L and THERMTRIP_L with hardware

non-system dependant functions. Fan speed control will only be implemented

by SB TSI software based implementation

B B

Global

System

State

A A

G2/G3

Power State / Voltage Rail Activity Summary

Processor

Sleep State

G0

G1

G2

S5 LOW

G3

Power

State

S0

S1

S3

S4

S5

C0

C1

C2

C3

c4

OFF

5

Running

Sleeping

Description

P-state transitions

caches snoopable

Powered on suspend

Suspend to diskON

Soft-off

Battery IN

Mechanical off

NON-POP

OVERRIDE#translate

PWM

TACH

4-PIN CPU FAN

NON-POP

under OS control

Halt

Stop grant,

TBD

Suspend to RAM

KBC SMSC

G7

THERMTRIP#

SDA3

(S5-S0)

SCL3

T7

TALERT#

(S0)

Y9

FANOUT2

AMD

W18

SDA0AA18

SB800

SCL0

B6

TEMPIN0

C6

TEMP_COMM

F24

PROCHOT#

M8

FANOUT0

P5

FANIN0 TEMPIN3

J4

GEVENT4#

SCL2

SDA2

Place under DDR

TEMP SENSOR (Q600)

ADM 1032

RTC ALW DUAL

ON

OFF

ON

4

TEMPIN1

TEMP_COMM

TEMPIN2

ON

OFF

A6 C6

THERMDC THERMDA

SUS RUN

ON

OFF

SMBus Block Diagram

BCM57760

LAN

U1300

mini

NON-POP

AMD

RS880

PCI Exp x1 SO-DIMM

J3700

mini

PCI Exp x1

J3703

mini

PCI Exp x1

J3711

mini

PCI Exp x1

J3712

GPP Slot

J3701

Exp Card

J2500

ON

OFF

Group Name Description

INT: Stuff when use internal clock generator EXT: Stuff when use external clock generator DNI: DO NOT INSTALL KBC: Stuff when use external KBC IMC: Stuff when use internal EC A11:Resistors marked with "A11" is only for SB800A11 ONLY.

OFF

http://laptop-motherboard-schematic.blogspot.com/

3

DDR 2

SO-DIMM

J400

DDR 2

J401

CLK. Gen.

ICS9LPRS470

U800

MXM J3600

CONFIG ROM

U1001

LCP Debug Header

J1000

ADM1032

Diode Reader

U204

NOPOP

POP

(S5-S0)

DUAL_SMB1

NOPOP

SDATA1 SCLK1

SDATA0 SCLK0 SDATA2 SCLK2

NOPOP

CPU Thermal Sensor ADM1032

AMD

SB800

(master)

SDA1

(S5-S0)

SCL1

ASF Only

SDA0

(S0)

SCL0 SDA2 SCL2

(S5-S0)

1.8V

SDA3 SCL3

AMD

S1G4

MAX17009

(S3-S0)

U2700

SVC SVD

J106

translate

SDA SCL

POP

100R

BAT_DAT BAT_CLK

Title

Size Document Number Rev

Page Modified:

POP

3.3V SB-TSI

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

SMBUS&I2C MAP

Custom

Wednesday, August 26, 2009 18:39:11

SIC SID

TL2560 light sensor

U3201

smart battery

J2700

MAX1535 battery charger

2

SVC

CPU Core PWR PWM

SVD

U2800

SMSC

I2C1A_DAT I2C1A_CLK

I2C1B_DAT I2C1B_CLK

U103 (master)

(S5-S0)

KBC1100L

Hon Hai Precision Industry Co. Ltd.

PM

1

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768

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RESET SIGNAL MAP

D D

C C

Clarksfield

RSTIN# VCCPWRGOOD_1 VCCPWRGOOD_0 SM_DRAMPWRGD

VTTPWRGD

VTTPWRGOOD

10

PLT_RST#

H_CPUPWRGD PM_DRAM_PWRGD

13

PCH_PWROK

SYS_PWROK

PWROK

16

15 14

PLTRST#

PROCPWRGD DRAMPWRGD

SYS_PWROK PWROK

Ibex Peak-M

SB

PM_SLP_S3#

SLP_S4#_3R

SLP_S5#_3R

EC_PWRBTN#

RSMRST#

1

ECRST#

IMVP_VR_ON

8

467

5

3

11

EC

B B

IMVP6.5

PWR_SWIN#_3

SW

12

9

SUS_PWRGD

2

ALW_PWRGD

IMVP_PWRGD

CK505

A A

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

RESET SIGNAL MAP

Size Document Number Rev

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

5

4

http://laptop-motherboard-schematic.blogspot.com/

3

2

Wednesday, August 26, 2009 18:39:11

Hon Hai Precision Industry Co. Ltd.

PM

1

(UTC/GMT)

Sheet of

868

Sheet of

868

Sheet of

868

0.1

5

4

3

2

1

UK1

VDDSRC VDDCPU VDDHTT VDDSB_SRC VDDREF VDDSATA VDD27 VDDATIG

VDD48

VDDSRC_IO1 VDDSRC_IO2 VDDSB_SRC_IO VDDATIG_IO VDDCPU_IO

GNDSRC1 GNDSRC2

GNDSATA GNDCPU GNDHTT GNDATIG GNDREF GND48 GND27 GNDSB_SRC

*CLKREQ0# *CLKREQ1# *CLKREQ2# *CLKREQ3# *CLKREQ4#

PD#

SMBCLK SMBDAT

X1 X2

THM65THM66THM67THM

+V1.1S

FBK2 600_0.5A

0603 I

CK5

10uF_X5R_10V

0805

I

9LRS480

THM69THM70THM71THM72THM73THM74THM75THM76THM77THM78THM79THM80THM81THM82THM83THM

68

REF2/SEL_27

CPUKG0T_LPRS

CPUKG0C_LPRS

HTT0C_LPRS

HTT0T_LPRS

SRC0T_LPRS

SRC0C_LPRS

SRC1T_LPRS

SRC1C_LPRS

SRC2T_LPRS

SRC2C_LPRS

SRC3T_LPRS

SRC3C_LPRS

SRC4T_LPRS

SRC4C_LPRS

SRC6T/SATAT_LPRS

SRC6C/SATAC_LPRS

SRC7T_LPRS/27MHZ_SS

SRC7C_LPRS/27MHZ_NS

ATIG0T_LPRS

ATIG0C_LPRS

ATIG1T_LPRS

ATIG1C_LPRS

SB_SRC0T_LPRS SB_SRC0C_LPRS

SB_SRC1T_LPRS SB_SRC1C_LPRS

REF1/SEL_SATA

REF0/SEL_HTT66

+V3.3S

FBK1 600_0.5A

0603 I

D D

C C

B B

0603 I

CLK_VDD

CK1

10uF_X5R_10V

0805

CK4

CK4 100nF_X5R_10V

100nF_X5R_10V

0402

0402 I

I

CLK_VDD

I

CK2

CK2 100nF_X5R_10V

100nF_X5R_10V

0402

0402 I

I

CK13

100nF_X5R_10V

0402

0402 I

I

+V3.3S

120_0.3A

0402

0402 I

I

All CLKREQ# PULL UP IS ON DEVICE SIDE

CK10 22pF_NPO_50V

0402 I

14.318MHZ_20P_30PPM

CK7

CK17

CK17 100nF_X5R_10V

100nF_X5R_10V

0402

0402 I

I

CK14

CK14 100nF_X5R_10V

100nF_X5R_10V

0402

0402 I

I

FBK3

CK6

CK6 1uF_X5R_6.3V

1uF_X5R_6.3V

0402

0402 I

I

LAN_CLK_REQ#41

WLAN_CLK_REQ#46

SB_SMB0_CLK_3S20,24,25 SB_SMB0_DAT_3S20,24,25

Parallel Resonance Crystal

YK1

ICK7

I

22pF_NPO_50V0402

CK19

CK19 100nF_X5R_10V

100nF_X5R_10V

0402

0402 I

I

+V3.3S

12

CK16

CK16 100nF_X5R_10V

100nF_X5R_10V

0402

0402 I

I

CK8

CK8 100nF_X5R_10V

100nF_X5R_10V

0402

0402 I

I

RK11 10K_5%

0402

RK5

RK5 1M_5%

1M_5%

0402

NI

+CLK_VDD48

I

CK12

100nF_X5R_10V

0402

0402 I

I

CLK_VDDIO

16 48 55 35 56 40

4

26 63

11 17 34 25 47

10 18

43 46 52 24 60

1 7

33

23 45 44 39 38

51

2 3

61 62

48MHz_0

84

CLK_VDDIO

CK18

100nF_X5R_10V

0402

0402 I

I

+V3.3S

57

50 49

53 54

22 21

20 19

15 14

13 12

9 8

42 41

6 5

30 29

28 27

37 36

32 31

64

58 59

RK10

RK10 10K_5%

10K_5%

0402

I

CLK_27M_SS CLK_27M_NSS

CLK_48M_USB

NB_OSC SB_OSC

RK6

RK6 10K_5%

10K_5%

0402

I

CK9

CK9 100nF_X5R_10V

100nF_X5R_10V

0402

0402 I

I

Place within 0.5" of CLKGEN

RK1 33_5% RK2 33_5%

RK3 33_5% RK4 33_5%

RK8 158_1%

0402

RK7 33_5%

0402

IRK7 33_5%

I

CK3

CK3 100nF_X5R_10V

100nF_X5R_10V

0402

0402 I

I

RK12 261_1%

0402

0402 0402

0402

0402 0402

0402

SB_OSC_R 20

IRK1 33_5%

I IRK2 33_5%

I

IRK3 33_5%

I IRK4 33_5%

I IRK8 158_1%

I

CK11

CK11 100nF_X5R_10V

100nF_X5R_10V

0402

0402 I

I

RK9

90.9_1%

0402

I

CK15

CK15 100nF_X5R_10V

100nF_X5R_10V

0402

0402 I

I

NIRK12 261_1%

NI

CLK_CPU 11 CLK_CPU# 11

CLK_HT_REF# 16 CLK_HT_REF 16

CLK_PCIE_LAN 41 CLK_PCIE_LAN# 41

CLK_PCIE_MINI 46 CLK_PCIE_MINI# 46

CLK_27M_SS_R 28

CLK_27M_NSS_R 28

CLK_GFX 16 CLK_GFX# 16

CLK_PEG_REF 26 CLK_PEG_REF# 26

CLK_SBSRC 19 CLK_SBSRC# 19

CLK_NBLINK 16 CLK_NBLINK# 16

CLK_48M_USB_R 20 CLK_48M_CARD 45

NB_OSC_R 16

NB_OSC - 1.1V 158R/90.9R

NB CLOCK INPUT TABLE

NB CLOCKS HT_REFCLKP

A A

5

4

http://laptop-motherboard-schematic.blogspot.com/

HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF

* RS880M can be used as clock buffer to output two PCIE referecence clocks By deault, chip will configured as input mode, BIOS can program it to output mode.

3

RS880M

100M DIFF 100M DIFF 14M SE (1.1V) vref 100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

EXTERNAL CLOCK GENERATOR

Size Document Number Rev

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

2

Wednesday, August 26, 2009 18:39:11

Hon Hai Precision Industry Co. Ltd.

PM

(UTC/GMT)

1

Sheet of

968

Sheet of

968

Sheet of

968

0.1

5

4

3

2

1

D D

HT_NB_CPU_CAD_H014 HT_NB_CPU_CAD_L014 HT_NB_CPU_CAD_H114 HT_NB_CPU_CAD_L114 HT_NB_CPU_CAD_H214 HT_NB_CPU_CAD_L214 HT_NB_CPU_CAD_H314 HT_NB_CPU_CAD_L314 HT_NB_CPU_CAD_H414 HT_NB_CPU_CAD_L414 HT_NB_CPU_CAD_H514 HT_NB_CPU_CAD_L514 HT_NB_CPU_CAD_H614 HT_NB_CPU_CAD_L614 HT_NB_CPU_CAD_H714 HT_NB_CPU_CAD_L714 HT_NB_CPU_CAD_H814 HT_NB_CPU_CAD_L814 HT_NB_CPU_CAD_H914 HT_NB_CPU_CAD_L914 HT_NB_CPU_CAD_H1014 HT_NB_CPU_CAD_L1014

C C

HT_NB_CPU_CAD_H1114 HT_NB_CPU_CAD_L1114 HT_NB_CPU_CAD_H1214 HT_NB_CPU_CAD_L1214 HT_NB_CPU_CAD_H1314 HT_NB_CPU_CAD_L1314 HT_NB_CPU_CAD_H1414 HT_NB_CPU_CAD_L1414 HT_NB_CPU_CAD_H1514 HT_NB_CPU_CAD_L1514

HT_NB_CPU_CLK_H014 HT_NB_CPU_CLK_L014 HT_NB_CPU_CLK_H114 HT_NB_CPU_CLK_L114

HT_NB_CPU_CTL_H014 HT_NB_CPU_CTL_L014 HT_NB_CPU_CTL_H114 HT_NB_CPU_CTL_L114

UX4A

D1

VLDT_A0

D2

VLDT_A1

D3

VLDT_A2

D4

VLDT_A3

E3

L0_CADIN_H0

E2

L0_CADIN_L0

E1

L0_CADIN_H1

F1

L0_CADIN_L1

G3

L0_CADIN_H2

G2

L0_CADIN_L2

G1

L0_CADIN_H3

H1

L0_CADIN_L3

J1

L0_CADIN_H4

K1

L0_CADIN_L4

L3

L0_CADIN_H5

L2

L0_CADIN_L5

L1

L0_CADIN_H6

M1

L0_CADIN_L6

N3

L0_CADIN_H7

N2

L0_CADIN_L7

E5

L0_CADIN_H8

F5

L0_CADIN_L8

F3

L0_CADIN_H9

F4

L0_CADIN_L9

G5

L0_CADIN_H10

H5

L0_CADIN_L10

H3

L0_CADIN_H11

H4

L0_CADIN_L11

K3

L0_CADIN_H12

K4

L0_CADIN_L12

L5

L0_CADIN_H13

M5

L0_CADIN_L13

M3

L0_CADIN_H14

M4

L0_CADIN_L14

N5

L0_CADIN_H15

P5

L0_CADIN_L15

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

SOCKET_638_PIN

HT LINK

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

L0_CADOUT_H0

L0_CADOUT_L0

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H15

L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

+VLDT+VLDT

HT_CPU_NB_CAD_H0 14 HT_CPU_NB_CAD_L0 14 HT_CPU_NB_CAD_H1 14 HT_CPU_NB_CAD_L1 14 HT_CPU_NB_CAD_H2 14 HT_CPU_NB_CAD_L2 14 HT_CPU_NB_CAD_H3 14 HT_CPU_NB_CAD_L3 14 HT_CPU_NB_CAD_H4 14 HT_CPU_NB_CAD_L4 14 HT_CPU_NB_CAD_H5 14 HT_CPU_NB_CAD_L5 14 HT_CPU_NB_CAD_H6 14 HT_CPU_NB_CAD_L6 14 HT_CPU_NB_CAD_H7 14 HT_CPU_NB_CAD_L7 14 HT_CPU_NB_CAD_H8 14 HT_CPU_NB_CAD_L8 14 HT_CPU_NB_CAD_H9 14 HT_CPU_NB_CAD_L9 14 HT_CPU_NB_CAD_H10 14 HT_CPU_NB_CAD_L10 14 HT_CPU_NB_CAD_H11 14 HT_CPU_NB_CAD_L11 14 HT_CPU_NB_CAD_H12 14 HT_CPU_NB_CAD_L12 14 HT_CPU_NB_CAD_H13 14 HT_CPU_NB_CAD_L13 14 HT_CPU_NB_CAD_H14 14 HT_CPU_NB_CAD_L14 14 HT_CPU_NB_CAD_H15 14 HT_CPU_NB_CAD_L15 14

HT_CPU_NB_CLK_H0 14 HT_CPU_NB_CLK_L0 14 HT_CPU_NB_CLK_H1 14 HT_CPU_NB_CLK_L1 14

HT_CPU_NB_CTL_H0 14 HT_CPU_NB_CTL_L0 14 HT_CPU_NB_CTL_H1 14 HT_CPU_NB_CTL_L1 14

B B

+VLDT

CX54

CX68

4.7uF_Y5V_6.3V

0603

0603 I

I

CX60

4.7uF_Y5V_6.3V

0603

0603 I

I

CX67

CX67 220nF_Y5V_10V

220nF_Y5V_10V

0402

0402 I

I

CX66

CX66 220nF_Y5V_10V

220nF_Y5V_10V

0402

0402 I

I

*

CX59

4.7uF_Y5V_6.3V

0603

0603 I

I

Place close to socket

* If VLDT is connected only on one side, one 4.7uF cap should be added to

A A

the island side

5

4

CX54 180pF_NPO_50V

180pF_NPO_50V

0402

0402 I

I

CX53

CX53 180pF_NPO_50V

180pF_NPO_50V

0402

0402 I

I

T26

P26

E26

F26

L26

J26

K26

G26

H26

R26

D26

N26

M26C26

T25

J25

M25

G25

C25

K25

L25

P25

F25

H25

E25

D25

N25

M24

D24

J24

G24

L24

C24

F24

H24

E24

N24

K24

M23

D23

C23

L23

G23

N23

K23

H23

F23

J23

E23

D22

G22

M22

L22

K22

H22

N22

E22

F22

C22

J22

G21

M21

F21

D21

K21

H21

J21

L21

N21

E21

C21

H20

D20

L20

N20

F20

E20

C20

J20

M20

L19

H19

F19

E19

D19

K19

M19

C19

C18

M18

N18

G18

E18

F18

D18

L18

H18

J18

K18

M17

F17

N17

G17

K17

E17

J17

H17

L17

D17

C17

L16

K16

F16

N16

J16

E16

D16

M16

C16

G16

F15

G15

L15

E15

K15

D15

C15

C14

G14

J14

L14

F14

K14

E14

D14

H14

C13

F13

G13

L13

K13

J13

E13

D13

H13

F12

C12

K12

G12

E12

D12

L12

H12

J12

F11

D11

H11

L11 AE11

G11 AD11

M11

E11

C11

K11

N11

J11

J10

E10

L10

D10

K10

G10

F10

N10

C10

M10

H10

H9

G9

F9

E9

D9

C9

M9

L9

J9

N9

K8

E8

M8

H8

F8

C8

J8

L8

D8

E7

J7

L7

D7

N7

M7

K7

H7

C7

F7

N6

F6

L6

E6

K6

J6

G6

H6

C6

D6

M6

E5

N5K3F5

L5

J5

K5

D5

G5

H5

M5

C5

F4

E4

K4

J4

N4

H4

M4

D4

L4

C4

N3

L3

J3 W3

F3

E3

H3

G3

C3

M3

N2

F2

D2

L2

H2

G2

J2

C2

E2

K2

M2

D1

E1

F1

M1

L1

K1

C1

G1

H1

J1

N1

BGA638_50_26SQ_S1G3_OEM

R25

T24

P24

R24

R23

T23

T22

P22

R22

P21

T21

R21

T20

R20

P20

R19

P19

T18

P18

R18

T17

P17

R17

P16

T16

R16

T15

T14

T13

T12

R11

P11

T11

R10

T10 AE10

P10 AA10

P9

R9

T9

R8

T8

P8

R7

T7

P7

T6

P6

T5

R5

P5

T4

P4G4

R4

P3

R3

T3

R2 V2

T2

P2

R1

T1

P1

B25

B24

A24

B23

A23

B22

A22

B21

A21

B20

A20

B19

A19

B18

A18

A17

B17

A16

B16B3H16

B15

A15

B14

A14

B13

A13

B12

A12

B11 AB11

A11

A10

B10

A9

B9

B8

A8

B7

A7

A6

B6

A5

B5

B4

A4

A3

A1

http://laptop-motherboard-schematic.blogspot.com/

3

W26

AD26

AB26

Y26

U26

AC26

V26

AA26

W25

AE25

AB25

U25

AD25

AA25

Y25

AC25

V25

AA24

AB24

U24

W24

AD24

V24

Y24

AE24

AC24

AF24

AF23

W23

U23

V23P23

AA23

AD23

Y23

AB23

AE23

AC23

U22

W22

AB22

V22

AD22

AA22

AE22

AC22

AF22

Y22

U21

AB21

W21

V21

AF21

AD21

AC21

AA21

AE21

Y21

AF20

AC20

AE20

U20

Y20

AA20

V20K9K20

AD20

AB20

AF19T19

U19N19

AC19

AB19

AD19

Y19

AA19

V19J19

AE19

AC18

AE18

AB18

AA18

V18

U18

Y18

AF18

W18

AD18

V17

AE17

AB17

U17

W17

AF17

AD17

AA17

Y17

AC17

Y16

AB16

AA16

AF16

W16

AD16

AE16

U16

AC16

V16

AF15

W15

AB15J15

AA15

Y15

U15

AD15

AE15H15

AC15

V15

U14

AD14

AF14

AB14

W14

Y14

AE14

AC14

V14

AA14

AB13

U13

AA13

Y13

V13

AF13

AD13

W13

AE13

AC13

AC12

AB12

Y12

AD12

AA12

V12

W12

U12

AE12

AF12

W11

Y11

AA11

U11

V11

AC11

AF11

V10

AD10

AB10

U10

AC10

W10

Y10

AF10

AB9

V9

Y9

AE9

AA9

U9W8W9

AF9

AC9

AD9

U8N8

AE8

AA8

V8

AC8

AF8

AB8

AD8

V7R6AA7

AB7

AD7

W7

U7

AC7

AE7

AF7

Y6

AD6

AB6

W6

AF6

V6

AC6

AE6

U6

AA6

AB5

AF5

W5

AA5

AC5

AE5

V5

U5

AD5

Y5

Y4

AB4

AF4

W4

AA4

AD4

V4

AE4

U4

AC4

AB3

V3D3

AA3

AC3

Y3

U3

AE3

AD3

Y2

U2

AD2

AC2

AA2

W2

AB2

AE2

U1

AD1

Y1

AC1

V1

AA1

W1

AB1

2

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

S1G4 HT I/F

Size Document Number Rev

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Hon Hai Precision Industry Co. Ltd.

PM

(UTC/GMT)

1

Sheet of

10 68

Sheet of

10 68

Sheet of

10 68

0.1

5

4

3

2

1

LAYOUT: ROUTE VDDA TRACE APPROX.

D D

C C

B B

+VDDA_CPU

CX74

+

100uF_SP_6.3V

7.3X4.3

7.3X4.3 I

I

LDT_STOP#16,19

LDT_RST#19

FBX1 26_0.6A

0805 I

CX70

CX70 180pF_NPO_50V

180pF_NPO_50V

0402

0402 I

I

Keep net PWRGD, LDT_STOP#, LDT_RST# no stub

+V1.5S

LDT_PG19

+V1.5S

RX23

RX23 300_5%

300_5%

0402

I

LDT_PG

RX27

RX27 300_5%

300_5%

0402

I

LDT_STOP#

RX22

RX22 300_5%

300_5%

0402

I

LDT_RST#

CX61

CX61 180pF_NPO_50V

180pF_NPO_50V

0402

0402 I

I

RX21

RX21 300_5%

300_5%

0402

NI

CPU_LDT_REQ#

CX75

4.7uF_Y5V_6.3V

0603

0603 I

I

+V1.8S

2 4

1

CX69

CX69 220nF_Y5V_10V

220nF_Y5V_10V

0402

0402 I

I

100nF_Y5V_10V

CX62

0402 I

UX3

53

74LVC1G07GW

50 mils WIDE (USE 2x25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG.

CX71

3.3nF_X7R_50V

0402

CLK_CPU9

I

CLK_CPU#9

Keep trace from resisor to CPU within 0.6" keep trace from caps to CPU within 1.2"

+V3.3S

RX29

4.7K_5%

0402

I

CPU_LDT_RST_HTPA#

CX72 3.9nF_X7R_50V

0402 I

CX73 3.9nF_X7R_50V

0402 I

place them to CPU within 1.5"

RX19 44.2_1% RX20 44.2_1%

+VLDT

+V1.5

RX44

RX44 510_5%

510_5%

0402

I

RX43

RX43 510_5%

510_5%

0402

I

RX46

RX46 169_1%

169_1%

0402

I

VCC_CORE0_FB_H60

VCC_CORE0_FB_L60

VCC_CORE1_FB_H

VCC_CORE1_FB_L

RX45

RX45 0_5%

0_5%

0402

I

CPU_VDDA_RUN

CLK_CPU_C CLK_CPU#_C

0402

0402 0402

0402

TP7TP7

TP1TP1

TEST9

TP20TP20

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

IRX19 44.2_1%

I IRX20 44.2_1%

I

LDT_RST# LDT_PG LDT_STOP# CPU_LDT_REQ#

CPU_SIC CPU_SID CPU_ALERT

CPU_HTREF0 CPU_HTREF1

CPU_DBRDY

1

CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

TEST23

1

TEST18 TEST19

TEST25_H TEST25_L

TEST21 TEST20 TEST24 TEST22 TEST12 TEST27

TEST6

1

+V1.5

F8 F9

A9 A8

B7 A7

F10

C6

AF4 AF5 AE6

R6 P6

F6 E6

Y6

AB6 G10

AA9 AC9 AD9 AF9

AD7 H10

G9

E9 E8

AB8 AF7 AE7 AE8 AC8 AF8

C2

AA6

A3 A5

B3

B5

C1

1 3 5 7

9 11 13 15 17 19 21 23

UX4D

VDDA1 VDDA2

CLKIN_H CLKIN_L

RESET_L PWROK LDTSTOP_L LDTREQ_L

SIC SID ALERT_L

HT_REF0 HT_REF1

VDD0_FB_H VDD0_FB_L

VDD1_FB_H VDD1_FB_L

DBRDY TMS TCK TRST_L TDI

TEST23 TEST18

TEST19 TEST25_H

TEST25_L TEST21

TEST20 TEST24 TEST22 TEST12 TEST27

TEST9 TEST6

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5

SOCKET_638_PIN

HEADER1

KEY

Header_2x13_S_3u

RSVD11

THERMTRIP_L

PROCHOT_L

MEMHOT_L

THERMDC THERMDA

VDDIO_FB_H

VDDIO_FB_L

VDDNB_FB_H VDDNB_FB_L

DBREQ_L

TEST28_H TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

VSS

SVC SVD

TDO

2 4 6 8 10 12 14 16 18 20 22 24 26

M11 W18

CPU_SVC_R

A6

CPU_SVD_R

A4

THERMTRIP#

AF6

PROCHOT#

AC7 AA8

1

H_THRMDC

W7

H_THRMDA

W8

W9 Y9

1

H6 G6

1

CPU_DBREQ#

E10

CPU_TDO

AE9

TEST28_H_

J7

TEST28_L

H8

TEST17

D7

TEST16

E7

TEST15

F7

TEST14

C7

TEST7

C3

TEST10

K8 C4

TEST29_H

C9 C8

TEST29_L

H18 H19 AA7 D5 C5

CPU_LDT_RST_HTPA#

TP3TP3

TP2TP2

TP8TP8

1

TP22TP22

1

TP25TP25

1

TP26TP26

1

TP23TP23

1

TP9TP9

1

TP10TP10

1

TP24TP24

1

TP5TP5

RX47

80.6_1%

0402

I

Route as 80ohm, diff

RX17's value is TBD.

+V1.5_RUN_FB_H 63

VDDNB_CPU_FB_H 60

route as differential as short as possible testpoint under package

+V1.5

RX9

RX11

1K_5%

300_5%

0402

I

Thermdc and Thermda should be routed away to VRM, crystal, etc. Customer should follow the MBDG. However, Guam is using TSI so this does not applies to Guam.

HDT Connector

CPU_SVC_R

+V1.5+V3.3A

RX6

NI

220pF_NPO_50V

QX2B

G2

G

S

RX6

2.2K_5%

0402

NI

0402

NI

0402

NI

CX3

220pF_NPO_50V

D1 S1

D

0402

CX1

G1

G

S

QX2A

QX2A 2N7002DW-7-F

2N7002DW-7-F

RX1

2.2K_5%

0402

NI

RX7

220pF_NPO_50V

D

QX1

G

2N7002-7-F

SOT23-3

SOT23-3 NI

NI

S

RX7

0402

1K_5%

4

+V1.5

RX4

RX3

0402

1K_5%

I

1K_5%

I

CPU_SIC H_THRMDA

CPU_SID

CPU_ALERT

http://laptop-motherboard-schematic.blogspot.com/

2.2nF_X7R_50V

THER_SD#55,59

CX4

0402

I

3

+V3.3S

CX5

CX5 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

UX1

1

VDD

2

H_THRMDC

Place Thermal-Sensor near CPU.

DP

3

DN SYS_SHDN#4GND

G786P81U

SMBus Address: ?H

SMCLK

SMDATA

ALERT#

I

8 7 6 5

EC_SMB0_CLK_3S 55 EC_SMB0_DAT_3S 55

4.7K_5%

A A

EC_SMB0_CLK_3AL35,55

EC_SMB0_DAT_3AL35,55

5

0402

NI

0402

NI

0402

NI

CX2

D2 S2

D

2N7002DW-7-F

RX5

RX2

2.2K_5%

4.7K_5%

CPU_SVD_R

Note: To override VID, Remove RX63, RX64, RX65, install RX66

2

+V1.5

RX8

RX8 10K_5%

10K_5%

0402

I

QX4

QX4 MMBT3904_NL

MMBT3904_NL

SOT23-3

SOT23-3 I

I

B

C

E

C

E

RX50

RX25

1K_5%

0402

NI

RX24 0_5% RX48 0_5%

VID Override Circuit

RX10

RX10 10K_5%

10K_5%

0402

I

QX3

QX3 MMBT3904_NL

MMBT3904_NL

SOT23-3

SOT23-3 I

I

C

+V1.5+V1.5S

0402

0402 0402

0402

place them under CPU

RX51

RX51 1K_5%

1K_5%

0402

I

IRX24 0_5%

I IRX48 0_5%

I

RX49

220_5%

0402

I

1

SVC

SVD

0 0 1.1 1.1 0 1 1.0 1.2 1 0 0.9 1.0 1 1 0.8 0.8

CPU_PROCHOT# 19 PM_THRMTRIP# 20

CPU_DBREQ#

TEST27

TEST21

TEST20

TEST24

TEST22

TEST12

TEST18

TEST19

+V1.5S

RX26

RX26 1K_5%

1K_5%

0402

I

RX28

220_5%

0402

I

1

BOOT VOLTAGE(VDD)

(CPUVRM_PRO# = VCC/GND)

VID OVERIDE TABLE (VDD)

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

S1G4 CTRL & DEBUG

Size Document Number Rev

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Hon Hai Precision Industry Co. Ltd.

PM

1

RX42 300_5%

0402

RX33 1K_5%

0402

RX39 1K_5%

0402

RX35 1K_5%

0402

RX37 1K_5%

0402

RX32 1K_5%

0402

RX38 1K_5%

0402

RX40 1K_5%

0402

RX41 1K_5%

0402

CPU_SVC 60 CPU_SVD 60

(CPUVRM_PRO# = OPEN)

(UTC/GMT)

+V1.5

I

Sheet of

11 68

Sheet of

11 68

Sheet of

11 68

0.1

A

B

C

D

E

Processor Memory Interface

UX4C

MEM:DATA

SDDR_B_DQ[63:0]25

4 4

UX4B

PLACE THEM CLOSE TO CPU WITHIN 1"

+V1.5

RX34 0_5%

0402

CX65

10uF_X5R_10V

0805

3 3

2 2

I

RX31 39.2_1% RX36 39.2_1%

SDDR_A_RST#24 SDDR_A_ODT024

SDDR_A_ODT124

SDDR_A_CS#024 SDDR_A_CS#124

SDDR_A_CKE024 SDDR_A_CKE124

SDDR_A_CLK_DDR024

SDDR_A_CLK_DDR#024

SDDR_A_CLK_DDR124

SDDR_A_CLK_DDR#124

SDDR_A_A[15:0]24

SDDR_A_BS024 SDDR_A_BS124 SDDR_A_BS224

SDDR_A_RAS#24 SDDR_A_CAS#24 SDDR_A_WE#24

IRX31 39.2_1%

I

0402

IRX36 39.2_1%

I

0402

SDDR_A_A0 SDDR_A_A1 SDDR_A_A2 SDDR_A_A3 SDDR_A_A4 SDDR_A_A5 SDDR_A_A6 SDDR_A_A7 SDDR_A_A8 SDDR_A_A9 SDDR_A_A10 SDDR_A_A11 SDDR_A_A12 SDDR_A_A13 SDDR_A_A14 SDDR_A_A15

M_ZP M_ZN

AD10 AF10

AE10

AA16

D10 C10

B10

H16

T19 V22

U21

V19

T20 U19 U20

V20

J22

J20 N19

N20

E16

F16

Y16

P19

P20 N21

M20 N22 M19 M22

L20 M24

L21

L19

K22 R21

L22

K20

V24

K24

K19 R20

R23

J21 R19

T22

T24

UX4B

VDDR1

MEM:CMD/CTRL/CLK

VDDR2 VDDR3 VDDR4

MEMZP MEMZN

MA_RESET_L MA0_ODT0

MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

MA_CKE0 MA_CKE1

MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_RAS_L MA_CAS_L MA_WE_L

SOCKET_638_PIN

VDDR_SENSE

MEMVREF

MB_RESET_L

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

+V1.5

RX13

1K_1%

0402

I

RX12

1K_1%

0402

I

VDDR5 VDDR6 VDDR7 VDDR8 VDDR9

W10 AC10 AB10 AA10 A10

Y10 W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

SDDR_B_A0

P24

SDDR_B_A1

N24

SDDR_B_A2

P26

SDDR_B_A3

N23

SDDR_B_A4

N26

SDDR_B_A5

L23

SDDR_B_A6

N25

SDDR_B_A7

L24

SDDR_B_A8

M26

SDDR_B_A9

K26

SDDR_B_A10

T26

SDDR_B_A11

L26

SDDR_B_A12

L25

SDDR_B_A13

W24

SDDR_B_A14

J23

SDDR_B_A15

J24 R24

U26 J26

U25 U24 U23

CX7

CX7 470nF_Y5V_6.3V

470nF_Y5V_6.3V

0402

I

+VDDR_CPU+VDDR_CPU

VDDR_CPU_SENSE 66

RX14 0_5%

+V3.3A

3

+

4

-

RX17 0_5%

CPU_M_VREF_SUS

SDDR_B_RST# 25 SDDR_B_ODT0 25

SDDR_B_ODT1 25

SDDR_B_CS#0 25 SDDR_B_CS#1 25

SDDR_B_CKE0 25 SDDR_B_CKE1 25

SDDR_B_CLK_DDR0 25 SDDR_B_CLK_DDR#0 25

SDDR_B_CLK_DDR1 25 SDDR_B_CLK_DDR#1 25

SDDR_B_A[15:0] 25

SDDR_B_BS0 25 SDDR_B_BS1 25 SDDR_B_BS2 25

SDDR_B_RAS# 25 SDDR_B_CAS# 25

SDDR_B_WE# 25

0402

100nF_Y5V_10V

CX6

0402 I

UX2

UX2 MCP6001RT-E/OT

MCP6001RT-E/OT

+

1

-

5 2

RX15 0_5%

I

0402

NIRX17 0_5%

NI

0402

NIRX14 0_5%

NI

RX18 10_5%

0402

SDDR_B_DM[7:0]25

SDDR_B_DQS025

SDDR_B_DQS#025

SDDR_B_DQS125

SDDR_B_DQS#125

SDDR_B_DQS225

SDDR_B_DQS#225

SDDR_B_DQS325

SDDR_B_DQS#325

SDDR_B_DQS425

SDDR_B_DQS#425

SDDR_B_DQS525

SDDR_B_DQS#525

SDDR_B_DQS625

SDDR_B_DQS#625

SDDR_B_DQS725

SDDR_B_DQS#725

I

RX16

CX9

10K_5%

100nF_Y5V_10V

0402

I

CX8

CX8 1nF_X7R_16V

1nF_X7R_16V

0402

0402 I

I

SDDR_B_DQ0 SDDR_B_DQ1 SDDR_B_DQ2 SDDR_B_DQ3 SDDR_B_DQ4 SDDR_B_DQ5 SDDR_B_DQ6 SDDR_B_DQ7 SDDR_B_DQ8

SDDR_B_DQ9 SDDR_B_DQ10 SDDR_B_DQ11 SDDR_B_DQ12 SDDR_B_DQ13 SDDR_B_DQ14 SDDR_B_DQ15 SDDR_B_DQ16 SDDR_B_DQ17 SDDR_B_DQ18 SDDR_B_DQ19 SDDR_B_DQ20 SDDR_B_DQ21 SDDR_B_DQ22 SDDR_B_DQ23 SDDR_B_DQ24 SDDR_B_DQ25 SDDR_B_DQ26 SDDR_B_DQ27 SDDR_B_DQ28 SDDR_B_DQ29 SDDR_B_DQ30 SDDR_B_DQ31 SDDR_B_DQ32 SDDR_B_DQ33 SDDR_B_DQ34 SDDR_B_DQ35 SDDR_B_DQ36 SDDR_B_DQ37 SDDR_B_DQ38 SDDR_B_DQ39 SDDR_B_DQ40 SDDR_B_DQ41 SDDR_B_DQ42 SDDR_B_DQ43 SDDR_B_DQ44 SDDR_B_DQ45 SDDR_B_DQ46 SDDR_B_DQ47 SDDR_B_DQ48 SDDR_B_DQ49 SDDR_B_DQ50 SDDR_B_DQ51 SDDR_B_DQ52 SDDR_B_DQ53 SDDR_B_DQ54 SDDR_B_DQ55 SDDR_B_DQ56 SDDR_B_DQ57 SDDR_B_DQ58 SDDR_B_DQ59 SDDR_B_DQ60 SDDR_B_DQ61 SDDR_B_DQ62 SDDR_B_DQ63

SDDR_B_DM0

SDDR_B_DM1

SDDR_B_DM2

SDDR_B_DM3

SDDR_B_DM4

SDDR_B_DM5

SDDR_B_DM6

SDDR_B_DM7

CPU_M_VREF_SUS

AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11

AE14 AF14 AF11 AD11

AB26 AE22 AC16 AD12

AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24

Y11

A12 B16 A22 E25

C12 B12 D16 C16 A24 A23 F26 E26

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

SOCKET_638_PIN

MEM:DATA

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12

E12 C15 E19 F24 AC24 Y19 AB16 Y13

G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13

SDDR_A_DQ0 SDDR_A_DQ1 SDDR_A_DQ2 SDDR_A_DQ3 SDDR_A_DQ4 SDDR_A_DQ5 SDDR_A_DQ6 SDDR_A_DQ7 SDDR_A_DQ8 SDDR_A_DQ9 SDDR_A_DQ10 SDDR_A_DQ11 SDDR_A_DQ12 SDDR_A_DQ13 SDDR_A_DQ14 SDDR_A_DQ15 SDDR_A_DQ16 SDDR_A_DQ17 SDDR_A_DQ18 SDDR_A_DQ19 SDDR_A_DQ20 SDDR_A_DQ21 SDDR_A_DQ22 SDDR_A_DQ23 SDDR_A_DQ24 SDDR_A_DQ25 SDDR_A_DQ26 SDDR_A_DQ27 SDDR_A_DQ28 SDDR_A_DQ29 SDDR_A_DQ30 SDDR_A_DQ31 SDDR_A_DQ32 SDDR_A_DQ33 SDDR_A_DQ34 SDDR_A_DQ35 SDDR_A_DQ36 SDDR_A_DQ37 SDDR_A_DQ38 SDDR_A_DQ39 SDDR_A_DQ40 SDDR_A_DQ41 SDDR_A_DQ42 SDDR_A_DQ43 SDDR_A_DQ44 SDDR_A_DQ45 SDDR_A_DQ46 SDDR_A_DQ47 SDDR_A_DQ48 SDDR_A_DQ49 SDDR_A_DQ50 SDDR_A_DQ51 SDDR_A_DQ52 SDDR_A_DQ53 SDDR_A_DQ54 SDDR_A_DQ55 SDDR_A_DQ56 SDDR_A_DQ57 SDDR_A_DQ58 SDDR_A_DQ59 SDDR_A_DQ60 SDDR_A_DQ61 SDDR_A_DQ62 SDDR_A_DQ63

SDDR_A_DM0 SDDR_A_DM1 SDDR_A_DM2 SDDR_A_DM3 SDDR_A_DM4 SDDR_A_DM5 SDDR_A_DM6 SDDR_A_DM7

PLACE CLOSE TO CPU

SDDR_A_DQ[63:0] 24

SDDR_A_DM[7:0] 24

SDDR_A_DQS0 24 SDDR_A_DQS#0 24 SDDR_A_DQS1 24 SDDR_A_DQS#1 24 SDDR_A_DQS2 24 SDDR_A_DQS#2 24 SDDR_A_DQS3 24 SDDR_A_DQS#3 24 SDDR_A_DQS4 24 SDDR_A_DQS#4 24 SDDR_A_DQS5 24 SDDR_A_DQS#5 24 SDDR_A_DQS6 24 SDDR_A_DQS#6 24 SDDR_A_DQS7 24 SDDR_A_DQS#7 24

1 1

A

+VDDR_CPU

4.7uF_Y5V_6.3V

CX63

0603

0603 I

I

4.7uF_Y5V_6.3V

CX64

0603

0603 I

I

4.7uF_Y5V_6.3V

CX20

0603

0603 I

I

4.7uF_Y5V_6.3V

CX16

0603

0603 I

I

CX58

CX58 220nF_Y5V_10V

220nF_Y5V_10V

0402

0402 I

I

Place close to socket

CX57

CX57 220nF_Y5V_10V

220nF_Y5V_10V

0402

0402 I

I

B

CX15

CX15 220nF_Y5V_10V

220nF_Y5V_10V

0402

0402 I

I

CX13

CX12

CX56

CX14

CX14 220nF_Y5V_10V

220nF_Y5V_10V

0402

0402 I

I

CX55

CX55 1nF_X7R_16V

1nF_X7R_16V

0402

0402 I

I

CX56 1nF_X7R_16V

1nF_X7R_16V

0402

0402 I

I

http://laptop-motherboard-schematic.blogspot.com/

CX12 1nF_X7R_16V

1nF_X7R_16V

0402

0402 I

I

C

CX13 1nF_X7R_16V

1nF_X7R_16V

0402

0402 I

I

CX52

180pF_NPO_50V

0402

0402 I

I

CX51

CX51 180pF_NPO_50V

180pF_NPO_50V

0402

0402 I

I

CX11

CX11 180pF_NPO_50V

180pF_NPO_50V

0402

0402 I

I

D

CX10

CX10 180pF_NPO_50V

180pF_NPO_50V

0402

0402 I

I

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

S1G4 DDRIII MEMORY I/F

Size Document Number Rev

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Hon Hai Precision Industry Co. Ltd.

PM

(UTC/GMT)

E

Sheet of

12 68

Sheet of

12 68

Sheet of

12 68

0.1

5

4

3

2

1

D D

UX4F

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

UX4E

G4

VDD_1

H2

VDD_2

J9

VDD_3

J11

VDD_4

J13

VDD_5

J15

VDD_6

K6

VDD_7

K10

VDD_8

K12

VDD_9

K14

VDD_10

L4

VDD_11

L7

VDD_12

L9

VDD_13

L11

VDD_14

L13

VDD_15

L15

VDD_16

M2

C C

+VDDNB_CPU

+V1.5

B B

M6 M8

M10

N7 N9

N11 K16

M16

P16 T16 V16

H25 J17 K18 K21 K23 K25

L17 M18 M21 M23 M25

N17

VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23

VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12

SOCKET_638_PIN

VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

+VCC_CORE+VCC_CORE

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

+V1.5

AB25 AC11 AC13 AC15 AC17 AC19 AC21

AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23

AD6 AD8

B4 B6 B8

B9 B11 B13 B15 B17 B19 B21 B23 B25

D6

D8

D9

D11 D13 D15 D17 D19 D21 D23 D25

E4

F2 F11 F13 F15 F17 F19 F21 F23 F25

H7

H9

H21 H23

J4

VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

SOCKET_638_PIN

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

+V1.5

4.7uF_Y5V_6.3V

CX49

0603

0603 I

I

4.7uF_Y5V_6.3V

CX50

0603

0603 I

I

4.7uF_Y5V_6.3V

CX17

0603

0603 I

I

BOTTOM SIDE DECOUPLING

+VCC_CORE

22uF_X5R_6.3V

CX33

0805

0805 I

I

+VCC_CORE

CX41

0805

0805 I

I

+VDDNB_CPU

CX21

0805

0805 I

I

22uF_X5R_6.3V

CX30

0805

0805 I

I

CX38

0805

0805 I

I

CX40

0805

0805 I

I

22uF_X5R_6.3V

CX19

0805

0805 I

I

CX42

0805

0805 I

I

CX35

0805

0805 I

I

22uF_X5R_6.3V

CX36

0805

0805 I

I

CX29

0805

0805 I

I

+V1.5

220nF_Y5V_10V

CX25

0402

0402 I

I

220nF_Y5V_10V

CX45

0402

0402 I

I

22uF_X5R_6.3V

CX22

0805

0805 I

I

22uF_X5R_6.3V

CX47

0805

0805 I

I

10nF_X7R_16V

CX23

0402

0402 I

I

CX24

0402

0402 I

I

180pF_NPO_50V

CX46

0402

0402 I

I

180pF_NPO_50V

CX44

0402

0402 I

I

220nF_Y5V_10V

CX37

0402

0402 I

I

DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE

100nF_Y5V_10V

4.7uF_Y5V_6.3V

CX18

0603

0603 I

I

220nF_Y5V_10V

CX39

0402

0402 I

I

220nF_Y5V_10V

CX26

0402

0402 I

I

220nF_Y5V_10V

CX32

0402

0402 I

I

220nF_Y5V_10V

CX48

0402

0402 I

I

100nF_Y5V_10V

CX43

0402

I

100nF_Y5V_10V

CX27

0402

I

220nF_Y5V_10V

CX34

0402

0402 I

I

10nF_X7R_16V

CX31

0402

0402 I

I

180pF_NPO_50V

CX28

0402

0402 I

I

A A

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

S1G4 PWR & GND

Size Document Number Rev

Custom

5

4

http://laptop-motherboard-schematic.blogspot.com/

3

2

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Hon Hai Precision Industry Co. Ltd.

PM

(UTC/GMT)

1

Sheet of

13 68

Sheet of

13 68

Sheet of

13 68

0.1

5

HT_CPU_NB_CAD_H010 HT_CPU_NB_CAD_L010 HT_CPU_NB_CAD_H110 HT_CPU_NB_CAD_L110 HT_CPU_NB_CAD_H210 HT_CPU_NB_CAD_L210

D D

C C

HT_CPU_NB_CAD_H310 HT_CPU_NB_CAD_L310 HT_CPU_NB_CAD_H410 HT_CPU_NB_CAD_L410 HT_CPU_NB_CAD_H510 HT_CPU_NB_CAD_L510 HT_CPU_NB_CAD_H610 HT_CPU_NB_CAD_L610 HT_CPU_NB_CAD_H710 HT_CPU_NB_CAD_L710

HT_CPU_NB_CAD_H810 HT_CPU_NB_CAD_L810 HT_CPU_NB_CAD_H910 HT_CPU_NB_CAD_L910 HT_CPU_NB_CAD_H1010 HT_CPU_NB_CAD_L1010 HT_CPU_NB_CAD_H1110 HT_CPU_NB_CAD_L1110 HT_CPU_NB_CAD_H1210 HT_CPU_NB_CAD_L1210 HT_CPU_NB_CAD_H1310 HT_CPU_NB_CAD_L1310 HT_CPU_NB_CAD_H1410 HT_CPU_NB_CAD_L1410 HT_CPU_NB_CAD_H1510 HT_CPU_NB_CAD_L1510

HT_CPU_NB_CLK_H010 HT_CPU_NB_CLK_L010 HT_CPU_NB_CLK_H110 HT_CPU_NB_CLK_L110

HT_CPU_NB_CTL_H010 HT_CPU_NB_CTL_L010 HT_CPU_NB_CTL_H110 HT_CPU_NB_CTL_L110

4

RN25 301_1%

0402

3

UN3A

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCALP HT_TXCALP HT_RXCALN

I

C23 A24

HT_RXCTL1N HT_RXCALP

HT_RXCALN

RS880M

PART 1 OF 6

HT_TXCAD0P

HT_TXCAD0N

HT_TXCAD1P

HT_TXCAD1N

HT_TXCAD2P

HT_TXCAD2N

HT_TXCAD3P

HT_TXCAD3N

HT_TXCAD4P

HT_TXCAD4N

HT_TXCAD5P

HT_TXCAD5N

HT_TXCAD6P

HT_TXCAD6N

HT_TXCAD7P

HT_TXCAD7N

HT_TXCAD8P

HT_TXCAD8N

HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P

HYPER TRANSPORT CPU I/F

HT_TXCLK1N

HT_TXCTL0P

HT_TXCTL0N

HT_TXCTL1P

HT_TXCTL1N

HT_TXCALP HT_TXCALN

D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22

F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18

H24 H25 L21 L20

M24 M25 P19 R18

B24 B25

HT_TXCALN

RN27 301_1%

I

0402

2

HT_NB_CPU_CAD_H0 10 HT_NB_CPU_CAD_L0 10 HT_NB_CPU_CAD_H1 10 HT_NB_CPU_CAD_L1 10 HT_NB_CPU_CAD_H2 10 HT_NB_CPU_CAD_L2 10 HT_NB_CPU_CAD_H3 10 HT_NB_CPU_CAD_L3 10 HT_NB_CPU_CAD_H4 10 HT_NB_CPU_CAD_L4 10 HT_NB_CPU_CAD_H5 10 HT_NB_CPU_CAD_L5 10 HT_NB_CPU_CAD_H6 10 HT_NB_CPU_CAD_L6 10 HT_NB_CPU_CAD_H7 10 HT_NB_CPU_CAD_L7 10

HT_NB_CPU_CAD_H8 10 HT_NB_CPU_CAD_L8 10 HT_NB_CPU_CAD_H9 10 HT_NB_CPU_CAD_L9 10 HT_NB_CPU_CAD_H10 10 HT_NB_CPU_CAD_L10 10 HT_NB_CPU_CAD_H11 10 HT_NB_CPU_CAD_L11 10 HT_NB_CPU_CAD_H12 10 HT_NB_CPU_CAD_L12 10 HT_NB_CPU_CAD_H13 10 HT_NB_CPU_CAD_L13 10 HT_NB_CPU_CAD_H14 10 HT_NB_CPU_CAD_L14 10 HT_NB_CPU_CAD_H15 10 HT_NB_CPU_CAD_L15 10

HT_NB_CPU_CLK_H0 10 HT_NB_CPU_CLK_L0 10 HT_NB_CPU_CLK_H1 10 HT_NB_CPU_CLK_L1 10

HT_NB_CPU_CTL_H0 10 HT_NB_CPU_CTL_L0 10 HT_NB_CPU_CTL_H1 10 HT_NB_CPU_CTL_L1 10

1

B B

A A

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

RS880M-HT LINK I/F

Size Document Number Rev

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

5

4

http://laptop-motherboard-schematic.blogspot.com/

3

2

Wednesday, August 26, 2009 18:39:11

Hon Hai Precision Industry Co. Ltd.

PM

(UTC/GMT)

1

Sheet of

14 68

Sheet of

14 68

Sheet of

14 68

0.1

5

4

3

Discrete GPU: Not Install UMA: Install

2

1

D D

UN3B

AD4 AD3

AD1 AD2

AE3 AE2

AA8 AA7 AA5

AA6

W6

W5

D4 C4

A3

B3 C2 C1

E5

F5 G5 G6 H5 H6

J6

J5

J7

J8

L5

L6 M8

L8

P7 M7

P5 M5 R8

P8 R6 R5

P4

P3

T4

T3

V5 U5

U6 U8 U7

Y8

Y7

Y5

GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N

GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N

SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N

RS880M

PART 2 OF 6

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP)

PCE_CALRN(PCE_BCALRN)

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N

PCIE I/F GFX

GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N

SB_TX0P

SB_TX0N

SB_TX1P

SB_TX1N

SB_TX2P

SB_TX2N

SB_TX3P

SB_TX3N

PEG_RXN1526 PEG_RXP1526 PEG_RXN1426 PEG_RXP1426 PEG_RXN1326 PEG_RXP1326 PEG_RXN1226 PEG_RXP1226 PEG_RXN1126 PEG_RXP1126 PEG_RXN1026 PEG_RXP1026 PEG_RXN926 PEG_RXP926 PEG_RXN826 PEG_RXP826 PEG_RXN726

C C

B B

PEG_RXP726 PEG_RXN626 PEG_RXP626 PEG_RXN526 PEG_RXP526 PEG_RXN426 PEG_RXP426 PEG_RXN326 PEG_RXP326 PEG_RXN226 PEG_RXP226 PEG_RXN126 PEG_RXP126 PEG_RXN026 PEG_RXP026

PCIE_RXP141 PCIE_RXN141

PCIE_RXP346 PCIE_RXN346

A_Link_RXP019 A_Link_RXN019 A_Link_RXP119 A_Link_RXN119 A_Link_RXP219 A_Link_RXN219 A_Link_RXP319 A_Link_RXN319

A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2

AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5

AC8 AB8

PEG_TXN15 PEG_TXP15 PEG_TXN14 PEG_TXP14 PEG_TXN13 PEG_TXP13 PEG_TXN12 PEG_TXP12 PEG_TXN11 PEG_TXP11 PEG_TXN10 PEG_TXP10 PEG_TXN9 PEG_TXP9 PEG_TXN8 PEG_TXP8 PEG_TXN7 PEG_TXP7 PEG_TXN6 PEG_TXP6 PEG_TXN5 PEG_TXP5 PEG_TXN4 PEG_TXP4 PEG_TXN3 PEG_TXP3 PEG_TXN2 PEG_TXP2 PEG_TXN1 PEG_TXP1 PEG_TXN0 PEG_TXP0

PCIE_TXP1

CN80 100nF_X5R_10V 0402 ICN80 100nF_X5R_10V 0402 I

PCIE_TXN1

CN79 100nF_X5R_10V 0402 ICN79 100nF_X5R_10V 0402 I

PCIE_TXP3

CN12 100nF_X5R_10V 0402 ICN12 100nF_X5R_10V 0402 I

PCIE_TXN3

CN14 100nF_X5R_10V 0402 ICN14 100nF_X5R_10V 0402 I

A_Link_TXP0 A_Link_TXN0

CN72 100nF_X5R_10V 0402 ICN72 100nF_X5R_10V 0402 I

A_Link_TXP1 A_Link_TXN1

CN73 100nF_X5R_10V 0402 ICN73 100nF_X5R_10V 0402 I

A_Link_TXP2 A_Link_TXN2

CN75 100nF_X5R_10V 0402 ICN75 100nF_X5R_10V 0402 I

A_Link_TXP3 A_Link_TXN3

CN77 100nF_X5R_10V 0402 ICN77 100nF_X5R_10V 0402 I

RN11 1.27K_1%

0402

RN12

0402

2K_1%

I

2K_1%

I

CN62 100nF_X5R_6.3V 0201 NICN62 100nF_X5R_6.3V 0201 NI CN59 100nF_X5R_6.3V 0201 NICN59 100nF_X5R_6.3V 0201 NI CN58 100nF_X5R_6.3V 0201 NICN58 100nF_X5R_6.3V 0201 NI CN54 100nF_X5R_6.3V 0201 NICN54 100nF_X5R_6.3V 0201 NI

CN111 100nF_X5R_6.3V 0201 ICN111 100nF_X5R_6.3V 0201 I CN109 100nF_X5R_6.3V 0201 ICN109 100nF_X5R_6.3V 0201 I CN107 100nF_X5R_6.3V 0201 ICN107 100nF_X5R_6.3V 0201 I CN105 100nF_X5R_6.3V 0201 ICN105 100nF_X5R_6.3V 0201 I CN103 100nF_X5R_6.3V 0201 ICN103 100nF_X5R_6.3V 0201 I CN101 100nF_X5R_6.3V 0201 ICN101 100nF_X5R_6.3V 0201 I CN99 100nF_X5R_6.3V 0201 ICN99 100nF_X5R_6.3V 0201 I CN97 100nF_X5R_6.3V 0201 ICN97 100nF_X5R_6.3V 0201 I CN95 100nF_X5R_6.3V 0201 ICN95 100nF_X5R_6.3V 0201 I CN93 100nF_X5R_6.3V 0201 ICN93 100nF_X5R_6.3V 0201 I CN91 100nF_X5R_6.3V 0201 ICN91 100nF_X5R_6.3V 0201 I CN89 100nF_X5R_6.3V 0201 ICN89 100nF_X5R_6.3V 0201 I CN87 100nF_X5R_6.3V 0201 ICN87 100nF_X5R_6.3V 0201 I CN85 100nF_X5R_6.3V 0201 ICN85 100nF_X5R_6.3V 0201 I CN83 100nF_X5R_6.3V 0201 ICN83 100nF_X5R_6.3V 0201 I CN81 100nF_X5R_6.3V 0201 ICN81 100nF_X5R_6.3V 0201 I

CN71 100nF_X5R_10V 0402 ICN71 100nF_X5R_10V 0402 I CN74 100nF_X5R_10V 0402 ICN74 100nF_X5R_10V 0402 I CN76 100nF_X5R_10V 0402 ICN76 100nF_X5R_10V 0402 I CN78 100nF_X5R_10V 0402 ICN78 100nF_X5R_10V 0402 I

+V1.1S

IRN11 1.27K_1%

I

CN63 100nF_X5R_6.3V 0201 NICN63 100nF_X5R_6.3V 0201 NI CN61 100nF_X5R_6.3V 0201 NICN61 100nF_X5R_6.3V 0201 NI CN60 100nF_X5R_6.3V 0201 NICN60 100nF_X5R_6.3V 0201 NI CN56 100nF_X5R_6.3V 0201 NICN56 100nF_X5R_6.3V 0201 NI

CN112 100nF_X5R_6.3V 0201 ICN112 100nF_X5R_6.3V 0201 I CN110 100nF_X5R_6.3V 0201 ICN110 100nF_X5R_6.3V 0201 I CN108 100nF_X5R_6.3V 0201 ICN108 100nF_X5R_6.3V 0201 I CN106 100nF_X5R_6.3V 0201 ICN106 100nF_X5R_6.3V 0201 I CN104 100nF_X5R_6.3V 0201 ICN104 100nF_X5R_6.3V 0201 I CN102 100nF_X5R_6.3V 0201 ICN102 100nF_X5R_6.3V 0201 I CN100 100nF_X5R_6.3V 0201 ICN100 100nF_X5R_6.3V 0201 I CN98 100nF_X5R_6.3V 0201 ICN98 100nF_X5R_6.3V 0201 I CN96 100nF_X5R_6.3V 0201 ICN96 100nF_X5R_6.3V 0201 I CN94 100nF_X5R_6.3V 0201 ICN94 100nF_X5R_6.3V 0201 I CN92 100nF_X5R_6.3V 0201 ICN92 100nF_X5R_6.3V 0201 I CN90 100nF_X5R_6.3V 0201 ICN90 100nF_X5R_6.3V 0201 I CN88 100nF_X5R_6.3V 0201 ICN88 100nF_X5R_6.3V 0201 I CN86 100nF_X5R_6.3V 0201 ICN86 100nF_X5R_6.3V 0201 I CN84 100nF_X5R_6.3V 0201 ICN84 100nF_X5R_6.3V 0201 I CN82 100nF_X5R_6.3V 0201 ICN82 100nF_X5R_6.3V 0201 I

PCIE_TXP1_C 41 PCIE_TXN1_C 41

PCIE_TXP3_C 46 PCIE_TXN3_C 46

A_Link_TXP0_C 19 A_Link_TXN0_C 19 A_Link_TXP1_C 19 A_Link_TXN1_C 19 A_Link_TXP2_C 19 A_Link_TXN2_C 19 A_Link_TXP3_C 19 A_Link_TXN3_C 19

UHDMI_TX2P 51 UHDMI_TX2N 51 UHDMI_TX1P 51 UHDMI_TX1N 51 UHDMI_TX0P 51 UHDMI_TX0N 51 UHDMI_CLKP 51 UHDMI_CLKN 51

PEG_TXN15_C 26 PEG_TXP15_C 26 PEG_TXN14_C 26 PEG_TXP14_C 26 PEG_TXN13_C 26 PEG_TXP13_C 26 PEG_TXN12_C 26 PEG_TXP12_C 26 PEG_TXN11_C 26 PEG_TXP11_C 26 PEG_TXN10_C 26 PEG_TXP10_C 26 PEG_TXN9_C 26 PEG_TXP9_C 26 PEG_TXN8_C 26 PEG_TXP8_C 26 PEG_TXN7_C 26 PEG_TXP7_C 26 PEG_TXN6_C 26 PEG_TXP6_C 26 PEG_TXN5_C 26 PEG_TXP5_C 26 PEG_TXN4_C 26 PEG_TXP4_C 26 PEG_TXN3_C 26 PEG_TXP3_C 26 PEG_TXN2_C 26 PEG_TXP2_C 26 PEG_TXN1_C 26 PEG_TXP1_C 26 PEG_TXN0_C 26 PEG_TXP0_C 26

Keep the impendance of PCIE lane to 85ohm +/-15% Including the A-link

All PCIe lane shou route 8" max for Gen2 connector and max 12" for Gen2 on board devices Guam has the Lasso lane over 8" due to the large board, should use shorter lasso calbe for Guam. Customer need to follow the MBDG.

A A

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

RS880M-PCIE I/F

Size Document Number Rev

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

5

4

http://laptop-motherboard-schematic.blogspot.com/

3

2

Wednesday, August 26, 2009 18:39:11

Hon Hai Precision Industry Co. Ltd.

PM

(UTC/GMT)

1

Sheet of

15 68

Sheet of

15 68

Sheet of

15 68

0.1

5

4

3

2

1

+V1.8S

RN37

2.2K_5%

+V1.8S

RN35

RN35 1K_5%

1K_5%

0402

I

220_0.25A 0402 I

220_0.25A 0402 I 220_0.25A 0402 I

220_0.25A 0402 I

220_0.25A 0402 I 220_0.25A 0402 I

220_0.25A 0402 I

2.2K_5%

0402

I

NB_LDT_STOP#

NB_ALLOW_LDTSTOP NB_PWRGD_R

CN118 2.2uF_X5R_10V

0603 I

CN114

2.2uF_X5R_10V

0603

0603 I

I

ULVDS_DDC_DATA 52

ULVDS_DDC_CLK 52

Discrete GPU: Install UMA: Not Install

UCRT_R52 UCRT_G52 UCRT_B52

CN115

2.2uF_X5R_10V

0603

0603 I

I

+V1.8S

100nF_Y5V_10V

CN64

0402

UN2

I

53

0805

+V1.8S

I

1

2 4

RN39 0_5%

0402

RN47 0_5%

0402

+V1.1S

RN28

4.7K_5%

0402

I

ULVDS_DDC_DATA

ULVDS_DDC_CLK

RN23

4.7K_5%

0402

NI

UCRT_DDC_DATA

UCRT_DDC_CLK

74LVC1G07GW

I

I I

I

FBN9

FBN9 FBN10

FBN10

FBN6

FBN6 FBN7

FBN7

D D

LDT_STOP#11,19

ALLOW_LDTSTOP19

NB_PWRGD20

CN120

22uF_X5R_6.3V

C C

B B

22uF_X5R_6.3V

+V3.3S

RN29

4.7K_5%

0402

I

+V3.3S

RN19

4.7K_5%

0402

NI

+V3.3S

+V1.8S

Termination resstors < 1 inch trace

UCRT_HSYNC17,52

UCRT_VSYNC17,52 UCRT_DDC_CLK52 UCRT_DDC_DATA52

CN113 2.2uF_X5R_10V

0603 I

+V1.1S

RN36

4.7K_5%

0402

I

RN38

4.7K_5%

0402

I

UTMDS_DDC_DATA51

STRP_DATA68

220_0.25A 0402 NI

FBN3

RN24

RN24 0_5%

0_5%

0402

I

RN16

RN16 0_5%

0_5%

0402

I

220_0.25A 0402 NI

FBN2

RN17

RN17 0_5%

0_5%

0402

I

RN18 140_1%

0402

RN21 150_1%

0402

RN20 150_1%

0402

A_RST#_R219

NB_OSC_R9

CLK_GFX9 CLK_GFX#9

CLK_NBLINK9 CLK_NBLINK#9

UTMDS_DDC_CLK51

RN48

2K_5%

0402

NI

NI NI

NI

CLK_HT_REF9 CLK_HT_REF#9

I

CN52

2.2uF_X5R_10V

0603

0603 NI

NI

CN49

CN49 100nF_X5R_10V

100nF_X5R_10V

0402

0402 NI

NI

CN51

2.2uF_X5R_10V

0603

0603 NI

NI

PLLVDD PLLVDD18

VDDA18HTPLL VDDA18PCIEPLL

NB_PWRGD_R NB_LDT_STOP# NB_ALLOW_LDTSTOP

ULVDS_DDC_CLK ULVDS_DDC_DATA

TP6TP6

AVDD

20mA

4mA

AVDDQ

**

RN22 715_1%

0402

65mA 20mA

1

110mA

NI

20mA

120mA

RS880_AUX_CAL

UN3C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

F8

DAC_SCL(PCE_RCALRN)

E8

DAC_SDA(PCE_TCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_REFCLKN)

B9

I2C_CLK

A9

I2C_DATA

A8

DDC_CLK0/AUX0P(NC)

B8

DDC_DATA0/AUX0N(NC)

B7

DDC_CLK1/AUX1P(NC)

A7

DDC_DATA1/AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS880M

PART 3 OF 6

TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PM

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

CLOCKs PLL PWR

MIS.

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3P(NC)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U0P(NC)

TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

TMDS_HPD(NC)

SUS_STAT#(PWM_GPIO5)

HPD(NC)

THERMALDIODE_P

THERMALDIODE_N

TESTMODE

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15

100nF_Y5V_10V

A14

CN116

B14

0402

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

High enable

D9 D10

RN34 0_5%

D12

0402

AE8 AD8

TEST_EN

D13

NI

I

RN26

1.8K_5%

0402

0402 I

I

15mA

300mA

4.7uF_Y5V_6.3V

4.7uF_Y5V_6.3V CN119

CN119

0603

0603 NI

NI

ULVDS_A_DP0 52

ULVDS_A_DN0 52

ULVDS_A_DP1 52

ULVDS_A_DN1 52

ULVDS_A_DP2 52

ULVDS_A_DN2 52

ULVDS_A_CLKP 52 ULVDS_A_CLKN 52

CN117

2.2uF_Y5V_10V

0603

0603 NI

NI

RN45

RN45 0_5%

0_5%

0402

I

Discrete GPU: Install UMA: Not Install

ULVDS_VCC_EN 50 ULVDS_PWM 50 ULVDS_INV_EN 50

UHDMI_DET 51

PM_SUS_STAT# 20,36

SUS_STAT#_R

220_0.25A

FBN8

0402

FBN11 220_2A

0805 NI

RN44

RN44 0_5%

0_5%

0402

I

+V1.8S

NI

+V1.8S

RS880M DEBUG PIN MAPPING

1

LVDS_DIGON LVDS_ENA_BL LVDS_BLON TMDS_HPD AUX1N AUX1P HPD AUX_CAL

(UTC/GMT)

Sheet of

16 68

Sheet of

16 68

Sheet of

16 68

0.1

DEBUG_OUT0 DEBUG_OUT1 DEBUG_OUT2

CLK_GFX CLK_GFX#

RN14

RN15

4.7K_5%

0402

A A

0402

RN14

4.7K_5%

0402

NI

5

4

http://laptop-motherboard-schematic.blogspot.com/

3

PLLVDD PLLVDD18

RN49

RN49 0_5%

0_5%

0402

RN46

Discrete GPU: Install

0_5%

UMA: Not Install

0402

NI

2

DEBUG_OUT3 DEBUG_OUT4 DEBUG_OUT5 DEBUG_OUT6 DEBUG_OUT7

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

RS880M-SYSTEM I/F

Size Document Number Rev

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Hon Hai Precision Industry Co. Ltd.

PM

5

UN3D

PAR 4 OF 6

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

SDRAM DDR3

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC)

MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC)

MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC)

MEM_DQS1N(NC)

SBD_MEM/DVO_I/F

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

IOPLLVDD18(NC)

IOPLLVDD(NC) IOPLLVSS(NC)

MEM_VREF(NC)

SPM_DQ2

E3

SPM_DQ1

F7

SPM_DQ5

F2

SPM_DQ3

F8

SPM_DQ7

H3

SPM_DQ0

H8

SPM_DQ4

G2

SPM_DQ6

H7

SPM_DQ13

D7

SPM_DQ8

C3

SPM_DQ10

C8

SPM_DQ12

C2

SPM_DQ15

A7

SPM_DQ11

A2

SPM_DQ14

B8

SPM_DQ9

A3

+V1.5S

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6

D D

+V1.5S

C C

B B

SPM_DQS0P SPM_DQS1P

SPM_DQS0N SPM_DQS1N

+V1.5S

SP_DDR3_RST#20

A A

SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13

SPM_BA0 SPM_BA1 SPM_BA2

SPM_RAS# SPM_CAS# SPM_WE# SPM_CS# SPM_CKE SPM_ODT

SPM_CLKP SPM_CLKN

0402

RN42 40.2_1%

RN42 40.2_1% RN43 40.2_1%

RN43 40.2_1%

0402

SPM_VREF1 SPM_VREF2

SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13

SPM_BA0 SPM_BA1 SPM_BA2

SPM_CLKP SPM_CLKN SPM_CKE

SPM_ODT SPM_CS# SPM_RAS# SPM_CAS# SPM_WE#

SPM_DM0 SPM_DM1

RN3 10K_5%0402NIRN3 10K_5%0402

NI

RN13 100_1%

0402

SPM_COMPP SPM_COMPN

5

AB12

MEM_A0(NC)

AE16

MEM_A1(NC)

V11

MEM_A2(NC)

AE15

MEM_A3(NC)

AA12

MEM_A4(NC)

AB16

MEM_A5(NC)

AB14

MEM_A6(NC)

AD14

MEM_A7(NC)

AD13

MEM_A8(NC)

AD15

MEM_A9(NC)

AC16

MEM_A10(NC)

AE13

MEM_A11(NC)

AC14

MEM_A12(NC)

Y14

MEM_A13(NC)

AD16

MEM_BA0(NC)

AE17

MEM_BA1(NC)

AD17

MEM_BA2(NC)

W12

MEM_RASb(NC)

Y12

MEM_CASb(NC)

AD18

MEM_WEb(NC)

AB13

MEM_CSb(NC)

AB18

MEM_CKE(NC)

V14

MEM_ODT(NC)

NI

V15

MEM_CKP(NC)

W14

MEM_CKN(NC)

AE12

MEM_COMPP(NC)

AD12

MEM_COMPN(NC)

RS880M

UN1

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

NI

T2

RESET

L8

RN6

RN6 240_1%

240_1%

0402

NI

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

SDRAM_FBGA-96P_1Gb

4

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

100nF_Y5V_10V

CN65

CN65 100nF_Y5V_10V

100nF_Y5V_10V

0402

NI

4

SPM_DQ0 SPM_DQ1 SPM_DQ2 SPM_DQ3 SPM_DQ4 SPM_DQ5 SPM_DQ6 SPM_DQ7 SPM_DQ8 SPM_DQ9 SPM_DQ10 SPM_DQ11 SPM_DQ12 SPM_DQ13 SPM_DQ14 SPM_DQ15

SPM_DQS0P SPM_DQS0N SPM_DQS1P SPM_DQS1N

SPM_DM0 SPM_DM1

15mA 26mA

SPM_VREF

+V1.5S

CN68

0402

NI

CN69

0402

NI

+V1.5S

CN5

0402

NI

CN6

0402

NI

+V1.5S

CN3

0402

NI

CN2

0402

NI

CN70

0603

0603 NI

NI

CN8

CN8 100nF_Y5V_10V

100nF_Y5V_10V

0402

NI

3

+V1.8S

2.2uF_X5R_10V

RN40

RN40 1K_1%

1K_1%

0402

0402 NI

NI

SPM_VREF

RN41

RN41 1K_1%

1K_1%

0402

0402 I

I

FBN5 220_0.25A 0402 NIFBN5 220_0.25A 0402 NI FBN4 220_0.25A 0402 NIFBN4 220_0.25A 0402 NI

2.2uF_X5R_10V

CN67

0603

0603 NI

NI

DIS DNI

+V1.1S

UCRT_VSYNC16,52

Dis 0ohm

RN4

RN4 1K_1%

1K_1%

0402

0402 NI

NI

SPM_VREF1

RN5

RN5 1K_1%

1K_1%

0402

0402 NI

NI

RN2

RN2 1K_1%

1K_1%

0402

0402 NI

NI

SPM_VREF2

RN1

RN1 1K_1%

1K_1%

0402

0402 NI

NI

+V1.5S

CN10

CN1

CN1 1uF_Y5V_10V

1uF_Y5V_10V

0402

0402 NI

NI

CN10 1uF_Y5V_10V

1uF_Y5V_10V

0402

0402 NI

NI

http://laptop-motherboard-schematic.blogspot.com/

CN66

CN66 10uF_Y5V_10V

10uF_Y5V_10V

0805

0805 NI

NI

3

UCRT_HSYNC16,52

CN4

CN4 10uF_Y5V_10V

10uF_Y5V_10V

0805

0805 NI

NI

RN33 3K_5%

0402

DIS I

RN32 3K_5%

0402

RN31 3K_5%

0402

I

NI

UMA I

I

+V3.3S

2

1

STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO. RS880M

1 Disable 0 Enable

RS880M: Enables Side port memory

RS880M:HSYNC# Selects if Memory SIDE PORT is available or not

1 = Memory Side port Not available 0 = Memory Side port available Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

RS880M-SPMEM/STRAPS

Size Document Number Rev

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

2

Wednesday, August 26, 2009 18:39:11

Hon Hai Precision Industry Co. Ltd.

PM

(UTC/GMT)

1

Sheet of

17 68

Sheet of

17 68

Sheet of

17 68

0.1

5

4

3

2

1

D11

E14

E15

J12

K14

J4

R7

L1

L2

L4

L7

M6

N4

P6

R1

R2

R4

V7

U4

V6

W1

W2

W4

W7

W8

Y6

AA4

AB5

AB1

AB7

VSSAPCIE30

VSSAPCIE31

VSSAPCIE32

VSSAPCIE33

VSSAPCIE34

VSSAPCIE35

GROUND

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

P12

P15

N13

R11

R14

M14

UN3E

J17

VDDHT_1

K16

VDDHT_2

L16

VDDHT_3

M16

VDDHT_4

P16

VDDHT_5

R16

VDDHT_6

T16

VDDHT_7

H18

VDDHTRX_1

G19

VDDHTRX_2

F20

VDDHTRX_3

E21

VDDHTRX_4

D22

VDDHTRX_5

B23

VDDHTRX_6

A23

VDDHTRX_7

AE25

VDDHTTX_1

AD24

VDDHTTX_2

AC23

VDDHTTX_3

AB22

VDDHTTX_4

AA21

VDDHTTX_5

Y20

VDDHTTX_6

W19

VDDHTTX_7

V18

VDDHTTX_8

U17

VDDHTTX_9

T17

VDDHTTX_10

R17

VDDHTTX_11

P17

VDDHTTX_12

M17

VDDHTTX_13

J10

VDDA18PCIE_1

P10

VDDA18PCIE_2

K10

VDDA18PCIE_3

M10

VDDA18PCIE_4

L10

VDDA18PCIE_5

W9

VDDA18PCIE_6

H9

VDDA18PCIE_7

T10

VDDA18PCIE_8

R10

VDDA18PCIE_9

Y9

VDDA18PCIE_10

AA9

VDDA18PCIE_11

AB9

VDDA18PCIE_12

AD9

VDDA18PCIE_13

AE9

VDDA18PCIE_14

U10

VDDA18PCIE_15

F9

VDD18_1

G9

VDD18_2

AE11

VDD18_MEM1(NC)

AD11

VDD18_MEM2(NC)

RS880M

AC3

VSSAPCIE36

VSS18

T12

H7

D D

+V1.1S

JPN3

2

+V1.1S

SHORT PAD

112

I

1.5X07.5

JPN2

2

112

I

1.5X07.5

CN16

4.7uF_Y5V_6.3V

0603

0603 I

I

CN17

4.7uF_Y5V_6.3V

0603

0603 I

I

CN55

4.7uF_Y5V_6.3V

0603

0603 I

I

CN27

4.7uF_Y5V_6.3V

0603

0603 I

I

CN22

CN22 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

CN30

CN30 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

+V1.8S

CN7

CN7 1uF_Y5V_10V

1uF_Y5V_10V

0402

0402 NI

NI

C C

+V1.1S

JPN1

2

112

SHORT PAD

I

1.5X07.5

+V1.8S

FBN1 220_2A

B B

A A

FBN1 220_2A

0805 I

CN38

4.7uF_Y5V_6.3V

0603

0603 I

I

5

VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9

PART 6/6

VSSAHT1

VSSAHT2

VSSAHT3

A25

E22

D23

CN44

CN44 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

CN39

CN39 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

CN19

CN19 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

CN21

CN21 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

Discrete GPU: Install UMA: Not Install

VSSAPCIE10

VSSAHT4

VSSAHT5

VSSAHT6

VSSAHT7

VSSAHT8

VSSAHT9

VSSAHT10

J22

L17

L22

H19

G22

G24

G25

CN53

CN53 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

CN34

CN34 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

1.2V / 1.1V

CN28

CN28 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

CN20

CN20 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

RN8 0_5%

NI

0402

4

VSSAPCIE11

VSSAPCIE12

VSSAPCIE13

VSSAHT11

VSSAHT12

VSSAHT13

L24

L25

N22

M20

RN7

RN7 0_5%

0_5%

0402

I

VSSAPCIE14

VSSAPCIE15

VSSAPCIE16

VSSAPCIE17

VSSAHT14

VSSAHT15

VSSAHT16

VSSAHT17

P20

R19

R22

R24

CN41

CN41 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

CN43

CN43 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

CN31

CN31 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

VDDA18PCIEVDDA18PCIE

CN35

CN35 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

CN9

CN9 1uF_Y5V_10V

1uF_Y5V_10V

0402

0402 NI

NI

VSSAPCIE18

VSSAPCIE19

VSSAPCIE20

VSSAPCIE21

VSSAPCIE22

VSSAPCIE23

VSSAPCIE24V8VSSAPCIE25

VSSAPCIE26

VSSAPCIE27

VSSAPCIE28

VSSAPCIE29

VSSAHT18

VSSAHT19

VSSAHT21

VSSAHT22

VSSAHT23

VSSAHT24

VSSAHT25

VSSAHT26

VSSAHT27

W24

W25

VSS11

L12

Y21

AD25

VSSAHT20

R25

H20

V19

U22

W22

600mA

700mA

400mA

700mA

10mA 25mA

http://laptop-motherboard-schematic.blogspot.com/

AC4

AE1

AE4

AB2

VSSAPCIE37

VSSAPCIE38

VSSAPCIE39

VSSAPCIE40

VSS19

VSS20

VSS21

VSS22

V12

U14

U11

U15

PART 5/6

VSS23

W11

VSS24

W15

AE14

VSS1

VSS25

AC12

3

VSS2

VSS26

AA14

J15

VSS3G8VSS4

VSS5

VSS7

VSS8

VSS6

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

Y18

AB11

AB15

AB17

AB19

AE20

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12

POWER

VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDD33_1(NC) VDD33_2(NC)

M11

AB21

L15

VSS9

VSS10

VSS34

VSS33

K11

UN3F

UN3F RS880M

RS880M

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

2.5A

10A

TBDmA

60mA

CN24

CN24 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

100nF_Y5V_10V

CN37

0402

I

CN23

CN23 100nF_Y5V_10V

100nF_Y5V_10V

0402

NI

CN47

CN47 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

CN48

CN48 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

100nF_Y5V_10V

CN33

0402

I

CN13

CN13 100nF_Y5V_10V

100nF_Y5V_10V

0402

NI

CN42

CN42 100nF_Y5V_10V

100nF_Y5V_10V

0402

I

100nF_Y5V_10V

CN25

0402

I

2

CN50

CN50 1uF_Y5V_10V

1uF_Y5V_10V

0402

0402 I

I

100nF_Y5V_10V

CN32

0402

I

CN18

CN18 100nF_Y5V_10V

100nF_Y5V_10V

0402

NI

RN300_5%

I

0402

100nF_Y5V_10V

CN40

0402

I

+V3.3S

RS880M POWER TABLE

PIN NAME VDDHT VDDHTRX VDDHTTX VDDA18PCIE VDDG18 VDD18_MEM +1.8V VDDPCIE VDDC VDD_MEM VDDG33 IOPLLVDD18

CN46

CN46 1uF_Y5V_10V

1uF_Y5V_10V

0402

0402 I

I

100nF_Y5V_10V

CN15

CN15 100nF_Y5V_10V

100nF_Y5V_10V

0402

NI

Title

Size Document Number Rev

Page Modified:

+1.8V/1.5V

CN57

4.7uF_Y5V_6.3V

0603

0603 I

I

100nF_Y5V_10V

CN29

CN36

0402

I

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

RS880M-POWER

Custom

Wednesday, August 26, 2009 18:39:11

RS880M

+1.1V +1.1V +1.2V +1.8V +1.8V +1.8V +1.1V +1.1V

+3.3V +1.8V

+VCC_NB

CN45

CN45 10uF_Y5V_10V

10uF_Y5V_10V

I

0805

0805 I

I

CN11

4.7uF_Y5V_6.3V

0603

0603 NI

NI

PIN NAME IOPLLVDD

AVDDDI AVDDQ PLLVDD PLLVDD18 VDDA18PCIEPLL VDDA18HTPLL VDDLTP18 VDDLT18 VDDLT33

2

SHORT PAD

I

1.5X07.5

Discrete GPU: Install UMA: Not Install

PM

RS880M

+1.1V +3.3VAVDD +1.8V +1.8V +1.1V

+1.8V +1.8V +1.8V +1.8V NC

+V1.1S

JPN4

112

CN26

CN26 10uF_Y5V_10V

10uF_Y5V_10V

0805

0805 I

I

+V1.5S

RN90_5%

NI

0402

RN10

RN10 0_5%

0_5%

0402

I

Hon Hai Precision Industry Co. Ltd.

(UTC/GMT)

1

Sheet of

18 68

0.1

5

RS67 33_5%

0402

PCIE_RST#_R146 PCIE_RST#_R235,36

A_RST#_R126,41 A_RST#_R216

A_Link_RXP015 A_Link_RXN015 A_Link_RXP115

D D

C C

B B

NOTE: The 0R serial resistor on SB CLK pair

PLACE THESE COMPONENTS CLOSE TO US2, AND USE GROUND GUARD FOR 32K_X1 AND 32K_X2

YS1

A A

YS1

32.768KHZ_12.5P_10PPM

32.768KHZ_12.5P_10PPM RS49 20M_5%

RS49 20M_5%

0603

CS50

CS50 18pF_NPO_50V

18pF_NPO_50V

0402

0402 I

I

A_Link_RXN115 A_Link_RXP215 A_Link_RXN215 A_Link_RXP315 A_Link_RXN315

A_Link_TXP0_C15 A_Link_TXN0_C15 A_Link_TXP1_C15 A_Link_TXN1_C15 A_Link_TXP2_C15 A_Link_TXN2_C15 A_Link_TXP3_C15 A_Link_TXN3_C15

must share Pad with the serial resistor close to U800

32K_X1

32K_X2

1234

I

CS51

CS51 18pF_NPO_50V

18pF_NPO_50V

0402

0402 I

I

5

0402

RS68 33_5%

0402

RS77 33_5%

0402

RS78 33_5%

0402

CS56 100nF_X5R_10V0402 ICS56 100nF_X5R_10V0402 I CS60 100nF_X5R_10V0402 ICS60 100nF_X5R_10V0402 I CS55 100nF_X5R_10V0402 ICS55 100nF_X5R_10V0402 I CS58 100nF_X5R_10V0402 ICS58 100nF_X5R_10V0402 I

CLK_SBSRC9

CLK_SBSRC#9

CS52 22pF_NPO_50V

0402 I

CS53

IRS67 33_5%

I IRS68 33_5%

I IRS77 33_5%

I IRS78 33_5%

I

PCIE_VDDR

25MHZ_20P_30PPM

ICS53

I

22pF_NPO_50V0402

0402

YS2

4

CS57100nF_X5R_10V0402I CS57100nF_X5R_10V0402I CS61100nF_X5R_10V0402I CS61100nF_X5R_10V0402I CS54100nF_X5R_10V0402I CS54100nF_X5R_10V0402I CS59100nF_X5R_10V0402I CS59100nF_X5R_10V0402I

RS4 590_1%

0402

RS1 2K_1%

12

RS50

RS50 1M_5%

1M_5%

0402

I

4

PCIE_RST# A_RST#

A_Link_RXP0_C A_Link_RXN0_C A_Link_RXP1_C A_Link_RXN1_C A_Link_RXP2_C A_Link_RXN2_C A_Link_RXP3_C A_Link_RXN3_C

IRS1 2K_1%

I

25M_X1

25M_X2

3

PLACE THESE PCIE AC COUPLING CAPS CLOSE TO US2

US1A

P1

PCIE_RST#

L1

A_RST#

AD26

A_TX0P

AD27

A_TX0N

AC28

A_TX1P

AC29

A_TX1N

AB29

A_TX2P

AB28

A_TX2N

AB26

A_TX3P

AB27

A_TX3N

AE24

A_RX0P

AE23

A_RX0N

AD25

A_RX1P

AD24

A_RX1N

AC24

A_RX2P

AC25

A_RX2N

AB25

A_RX3P

AB24

A_RX3N

IRS4 590_1%

I

AD29

PCIE_CALRP

AD28

PCIE_CALRN

AA28

GPP_TX0P

AA29

GPP_TX0N

Y29

GPP_TX1P

Y28

GPP_TX1N

Y26

GPP_TX2P

Y27

GPP_TX2N

W28

GPP_TX3P

W29

GPP_TX3N

AA22

GPP_RX0P

Y21

GPP_RX0N

AA25

GPP_RX1P

AA24

GPP_RX1N

W23

GPP_RX2P

V24

GPP_RX2N

W24

GPP_RX3P

W25

GPP_RX3N

M23

PCIE_RCLKP/NB_LNK_CLKP

P23

PCIE_RCLKN/NB_LNK_CLKN

U29

NB_DISP_CLKP

U28

NB_DISP_CLKN

T26

NB_HT_CLKP

T27

NB_HT_CLKN

V21

CPU_HT_CLKP

T21

CPU_HT_CLKN

V23

SLT_GFX_CLKP

T23

SLT_GFX_CLKN

L29

GPP_CLK0P

L28

GPP_CLK0N

N29

GPP_CLK1P

N28

GPP_CLK1N

M29

GPP_CLK2P

M28

GPP_CLK2N

T25

GPP_CLK3P

V25

GPP_CLK3N

L24

GPP_CLK4P

L23

GPP_CLK4N

P25

GPP_CLK5P

M25

GPP_CLK5N

P29

GPP_CLK6P

P28

GPP_CLK6N

N26

GPP_CLK7P

N27

GPP_CLK7N

T29

GPP_CLK8P

T28

GPP_CLK8N

L25

14M_25M_48M_OSC

L26

25M_X1

L27

25M_X2

SB800 A11

http://laptop-motherboard-schematic.blogspot.com/

Part 1 of 5

SB800

PCI EXPRESS INTERFACES

CLOCK GENERATOR

ALLOW_LDTSTP/DMA_ACTIVE#

PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

PCICLK4/14M_OSC/GPO39

PCI CLKS

AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

PCI INTERFACELPC

REQ1#/GPIO40 REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42

GNT1#/GPO44 GNT2#/GPO45

GNT3#/CLK_REQ7#/GPIO46

INTE#/GPIO32

INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35

LDRQ1#/CLK_REQ6#/GPIO49

SERIRQ/GPIO48

CPU

INTRUDER_ALERT#

RTC

VDDBT_RTC_G

PCICLK0

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY# STOP#

PERR# SERR# REQ0#

GNT0#

CLKRUN#

LOCK#

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

PROCHOT#

LDT_PG LDT_STP# LDT_RST#

32K_X1 32K_X2

RTCCLK

3

PAR

W2 W1 W3 W4 Y1

V2

AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5 AF5 AE6 AE4 AE11 AH5 AH4 AC12

1 AD12 AJ5 AH6 AB12

1 AB11 AD7

AJ6

GPIO33

AG6 AG4

FOR BIOS AUTO DETECTION(GUAM V.S. BIMINI)

AJ4

H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19

G21 H21 K19 G22 J24

32K_X1

C1

32K_X2

C2 D2

1 B2

1 B1

+V3.3S

RS34

RS34 10K_5%

10K_5%

0402

0402 I

I

TP13TP13

TP14TP14

RS8 22_5%

0402

RS9 22_5%

0402

TP66TP66 TP64TP64

RS46 510_1%

0402

CS48

CS48 1uF_Y5V_10V

1uF_Y5V_10V

0402

0402 I

I

PCI_AD23 23 PCI_AD24 23 PCI_AD25 23 PCI_AD26 23 PCI_AD27 23

PCI_SERR# 35

PM_CLKRUN# 36

IRS8 22_5%

I

IRS9 22_5%

I

ALLOW_LDTSTOP 16

CPU_PROCHOT# 11

LDT_PG 11 LDT_STOP# 11,16 LDT_RST# 11

I

CLK_PCI_KBC 35 LPC_CLK0 23 LPC_CLK1 23 LPC_AD0 35,36 LPC_AD1 35,36 LPC_AD2 35,36 LPC_AD3 35,36

LPC_FRAME# 35,36,46

LPC_DRQ#0 36 INT_SERIRQ 35,36

CLK_PCI_JIG 36,46

+VCC_RTC

2

PCI_CLK1 23 PCI_CLK2 23 PCI_CLK3 23 PCI_CLK4 23

PCI_RST# 36

+V3.3S

3

BAT54C-7-F_200mA

SOT23-3

2

DS5

+V3.3S

RS52

RS52 10K_5%

10K_5%

0402

0402 I

I

+V3.3AL

1 2

I

RS57

RS57 10K_5%

10K_5%

0402

0402 NI

NI

RS58

RS58 10K_5%

10K_5%

0402

0402 I

I

+V3.3S +V3.3S

RS74

RS74 10K_5%

10K_5%

0402

0402 I

I

RS75

RS75 10K_5%

10K_5%

0402

0402 NI

NI

4 3

1 2

HEADER9

1

RS55

RS55 10K_5%

10K_5%

0402

0402 NI

NI

RS56

RS56 10K_5%

10K_5%

0402

0402 I

I

Board ID

Header_1X2_3u

PAD2 PAD1

1 2

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

SB820-PCIE/PCI/CPU/LPC/CLK

Size Document Number Rev

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Hon Hai Precision Industry Co. Ltd.

PM

(UTC/GMT)

1

Sheet of

19 68

Sheet of

19 68

Sheet of

19 68

0.1

+V3.3S

RS27 10K_5%

0402

+V3.3A

RS59 2.2K_5%

0402 I

+V3.3A

RS30 2.2K_5%

0402 I

D D

+V3.3A

RS28 10K_5%

0402

RS22 10K_5%

0402

RS62 10K_5%

0402

RS64 10K_5%

0402

RS63 10K_5%

0402

RS39 10K_5%

0402

NB_PWRGD16

C C

AUD_BITCLK37

AUD_SDOUT23,37 MDC_SDOUT42

AUD_RESET#37,39 MDC_RESET#42

AUD_SYNC37 MDC_SYNC42

+V3.3A

RS35

2.2K_5%

0402

I

B B

SB_SMB2_CLK_3A

SB_SMB2_DAT_3A

5

I

USB_OC#1

I

USB_OC#0

I

AUD_SDIN0

NI

MDC_SDIN1

NI

AUD_SDIN2

NI

HDA_BITCLK

NI

+V1.8S

RX30

RX30 300_5%

300_5%

0402

I

RS38 33_5% 0402 IRS38 33_5% 0402 I RS43 33_5% 0402 IRS43 33_5% 0402 I RS47 33_5% 0402 IRS47 33_5% 0402 I RS48 33_5% 0402 IRS48 33_5% 0402 I RS70 33_5% 0402 IRS70 33_5% 0402 I RS69 33_5% 0402 IRS69 33_5% 0402 I RS66 33_5% 0402 IRS66 33_5% 0402 I RS65 33_5% 0402 IRS65 33_5% 0402 I

RS15

RS40

2.2K_5%

0402

I

+V3.3A

RS6

2.2K_5%

0402

I

PM_SUS_STAT#

EC_PWRBTN#

PCIE_WAKE#

NB_PWRGD

+V3.3S

I

RS2

2.2K_5%

0402

I

G2

G

S

RS18

2.2K_5%

0402

I

SB_SMB0_CLK_3S

SB_SMB0_DAT_3S

SB_SMB1_DAT_3A SB_SMB1_CLK_3A

2.2K_5%

G1

G

S

2N7002DW-7-F

D2S2

D

QS2B

QS2B 2N7002DW-7-F

2N7002DW-7-F

HDA_BITCLK

HDA_SDOUT

HDA_RESET#

HDA_SYNC

RS3

0402

I

D1S1

D

QS2A

+V3.3AL+V3.3A

EC_PWRBTN#35

RS5

2.2K_5%

0402

I

EC_SMB2_CLK_3AL 35

EC_SMB2_DAT_3AL 35

SLP_S3#_3R23,35,62,63,64,65,67 SLP_S5#_3R35,63

SB_SMB0_DAT_3S9,24,25 SB_SMB1_DAT_3A46

PM_SUS_STAT#16,36

ID_LPC_PCI#36

SB_SMB0_CLK_3S9,24,25 SB_SMB1_CLK_3A46

SP_DDR3_RST#17

SB_PWRGD23

RUN_SCI#35

PCIE_WAKE#41,46

PM_THRMTRIP#11

RSMRST#35

HDA_SPKR37

SB_OSC_R9

SMBALERT#

USB_OC#143MDC_BITCLK42 USB_OC#043

AUD_SDIN037 MDC_SDIN142

A20GATE35 KBRST#35

EC_SMI#35

TP67TP67

TP16TP16 TP17TP17

TP15TP15

TP63TP63 TP19TP19

4

TP61TP61

RS60 0_5%0402 IRS60 0_5%0402 I RS76 0_5%0402 IRS76 0_5%0402 I

SB_TEST0

1

SB_TEST1

1

SB_TEST2

1

NB_PWRGD

RS61

RS61 10K_5%

10K_5%

0402

0402 I

I

RS45 0_5%0402 IRS45 0_5%0402 I

1 1

TP18TP18

1

TP12TP12 TP11TP11

TP65TP65 TP68TP68

SLP_S3# SLP_S5#

HDA_BITCLK HDA_SDOUT

AUD_SDIN2 HDA_SYNC

HDA_RESET#

1 1

US1D

J2

1

PCI_PME#/GEVENT4#

K1

1

RI#/GEVENT22#

D3

SPI_CS3#/GBE_STAT1/GEVENT21#

F1

SLP_S3#

H1

SLP_S5#

F2

PWR_BTN#

H5

PWR_GOOD

G6

SUS_STAT#

B3

TEST0

C4

TEST1/TMS

F6

TEST2

AD21

GA20IN/GEVENT0#

AE21

KBRST#/GEVENT1#

K2

LPC_PME#/GEVENT3#

J29

LPC_SMI#/GEVENT23#

H2

GEVENT5#

J1

SYS_RESET#/GEVENT19#

H6

WAKE#/GEVENT8#

F3

IR_RX1/GEVENT20#

J6

THRMTRIP#/SMBALERT#/GEVENT2#

AC19

NB_PWRGD

G1

RSMRST#

AD19

CLK_REQ4#/SATA_IS0#/GPIO64

AA16

CLK_REQ3#/SATA_IS1#/GPIO63

AB21

SMARTVOLT1/SATA_IS2#/GPIO50

AC18

CLK_REQ0#/SATA_IS3#/GPIO60

AF20

SATA_IS4#/FANOUT3/GPIO55

AE19

SATA_IS5#/FANIN3/GPIO59

AF19

SPKR/GPIO66

AD22

SCL0/GPIO43

AE22

SDA0/GPIO47

F5

SCL1/GPIO227

F4

SDA1/GPIO228

AH21

CLK_REQ2#/FANIN4/GPIO62

AB18

CLK_REQ1#/FANOUT4/GPIO61

E1

IR_LED#/LLB#/GPIO184

AJ21

SMARTVOLT2/SHUTDOWN#/GPIO51

H4

DDR3_RST#/GEVENT7#

D5

GBE_LED0/GPIO183

D7

GBE_LED1/GEVENT9#

G5

GBE_LED2/GEVENT10#

K3

GBE_STAT0/GEVENT11#

AA20

CLK_REQG#/GPIO65/OSCIN

H3

BLINK/USB_OC7#/GEVENT18#

D1

USB_OC6#/IR_TX1/GEVENT6#

E4

USB_OC5#/IR_TX0/GEVENT17#

D4

USB_OC4#/IR_RX0/GEVENT16#

E8

USB_OC3#/AC_PRES/TDO/GEVENT15#

F7

1

USB_OC2#/TCK/GEVENT14#

E7

USB_OC1#/TDI/GEVENT13#

F8

USB_OC0#/TRST#/GEVENT12#

M3

AZ_BITCLK

N1

AZ_SDOUT

L2

AZ_SDIN0/GPIO167

M2

AZ_SDIN1/GPIO168

M1

AZ_SDIN2/GPIO169

M4

AZ_SDIN3/GPIO170

N2

AZ_SYNC

P2

AZ_RST#

T1

GBE_COL

T4

GBE_CRS

L6

GBE_MDCK

L5

GBE_MDIO

T9

GBE_RXCLK

U1

GBE_RXD3

U3

GBE_RXD2

T2

GBE_RXD1

U2

GBE_RXD0

T5

GBE_RXCTL/RXDV

V5

GBE_RXERR

P5

GBE_TXCLK

M5

GBE_TXD3

P9

GBE_TXD2

T7

GBE_TXD1

P7

GBE_TXD0

M7

GBE_TXCTL/TXEN

P4

GBE_PHY_PD

M9

GBE_PHY_RST#

V7

GBE_PHY_INTR

E23

PS2_DAT/SDA4/GPIO187

E24

PS2_CLK/SCL4/GPIO188

F21

SPI_CS2#/GBE_STAT2/GPIO166

G29

FC_RST#/GPO160

D27

PS2KB_DAT/GPIO189

F28

PS2KB_CLK/GPIO190

F29

PS2M_DAT/GPIO191

E27

PS2M_CLK/GPIO192

SB800 A11

SB800

Part 4 of 5

GBE LAN

3

ACPI / WAKE UP EVENTS

EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/GPIO199 EC_PWM3/EC_TIMER3/GPIO200

HD AUDIO

EMBEDDED CTRL

USBCLK/14M_25M_48M_OSC

USB_RCOMP

USB_FSD1P/GPIO186

USB_FSD1N

USB_FSD0P/GPIO185

USB_FSD0N

USB_HSD13P USB_HSD13N

USB 1.1 USB MISCEMBEDDED CTRL

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P

USB 2.0

USB_HSD6N USB_HSD5P

USB_HSD5N

GPIO

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P

USB OC

USB_HSD0N

SCL2/GPIO193

SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196

KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208

KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217

KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226

A10

USB_RCOMP

G19

J10 H11

H9 J8

B12 A12

F11 E11

E14 E12

J12 J14

A13 B13

D13 C13

G12 G14

G16 G18

D16 C16

B14 A14

E18 E16

J16 J18

B17 A17

A16 B16

SB_SMB2_CLK_3A

D25

SB_SMB2_DAT_3A

F23 B26 E26 F25 E22 F22 E21

G24 G25 E28 E29 D29 D28 C29 C28

B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22

CLK_48M_USB_R 9

RS19 11.8K_1%

0402 I

USB_PP8 54

USB_PN8 54

USB_PP12 45

USB_PN12 45

USB_PP11 46

USB_PN11 46

USB_PP10 50

USB_PN10 50

USB_PP2 43

USB_PN2 43

USB_PP1 43

USB_PN1 43

USB_PP0 43

USB_PN0 43

GPIO199 23

GPIO200 23

2

USB PORT Function

PORT-0 PORT-1 PORT-2 PORT-3 PORT-4 PORT-5 PORT-6 PORT-7 PORT-8 PORT-9 PORT-10 PORT-11 PORT-12 PORT-13

STRAP pin to define use LPC or SPI ROM

Ext. USB 3 Ext. USB 2 Ext. USB 1

Camera WLAN/WiMAX Card reader

Bluetooth

1

OC pin

A A

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

SB820-GPIO/USB/AZ/RGMII

Size Document Number Rev

Custom

5

4

3

2

http://laptop-motherboard-schematic.blogspot.com/

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

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Wednesday, August 26, 2009 18:39:11

Hon Hai Precision Industry Co. Ltd.

PM

(UTC/GMT)

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5

SATA trace should use only 1via on the trace. customers can use 2vias with GND via within 150mils of signal via as long as they can ensure that their platform meets SATA logo requirements. Return loss is expected to get affected with 2 vias. AMD platforms are validated with one via only

D D

SATA_TXP048 SATA_TXN048

SATA_RXN048 SATA_RXP048

SATA_TXP148 SATA_TXN148

SATA_RXN148 SATA_RXP148

SATA PORTS DISTRIBUTION: 0, - 2.5 INCH DISK DRIVER 1, SATA ODD 2 & 3 & 4 & 5, NOT USED

PLACE SATA_CAL

C C

AVDD_SATA

RES VERY CLOSE TO BALL OF U600

RS21 1K_1%

0402

RS20 931_1%

0402

SATALED#56

CS62 22pF_NPO_50V

0402 I

25MHZ_20P_30PPM

25MHZ_20P_30PPM CS63

YS3

ICS63

I

22pF_NPO_50V0402

IRS21 1K_1%

I

IRS20 931_1%

I

12

RS51

RS51 1M_5%

1M_5%

0402

I

SATA_CALP SATA_CALN

SATA_X1

SATA_X2

4

AH9

AJ9 AJ8

AH8

AH10

AJ10

AG10 AF10

AG12 AF12

AJ12

AH12 AH14

AJ14

AG14 AF14

AG17 AF17

AJ17

AH17

AJ18

AH18 AH19

AJ19

AB14 AA14

AD11

AD16

AC16

US1B

SATA_TX0P SATA_TX0N

SATA_RX0N SATA_RX0P

SATA_TX1P SATA_TX1N

SATA_RX1N SATA_RX1P

SATA_TX2P SATA_TX2N

SATA_RX2N SATA_RX2P

SATA_TX3P SATA_TX3N

SATA_RX3N SATA_RX3P

SATA_TX4P SATA_TX4N

SATA_RX4N SATA_RX4P

SATA_TX5P SATA_TX5N

SATA_RX5N SATA_RX5P

SATA_CALRP SATA_CALRN

SATA_ACT#/GPIO67

SATA_X1

SATA_X2

SB800

Part 2 of 5

SERIAL ATA

TEMPIN3/TALERT#/GPIO174

HW MONITOR

FC_CLK

FC_FBCLKOUT

FC_FBCLKIN

FC_OE#/GPIOD145

FC_AVD#/GPIOD146

FC_WE#/GPIOD148 FC_CE1#/GPIOD149 FC_CE2#/GPIOD150

FC_INT1/GPIOD144

FC_INT2/GPIOD147

FC_ADQ0/GPIOD128 FC_ADQ1/GPIOD129 FC_ADQ2/GPIOD130 FC_ADQ3/GPIOD131 FC_ADQ4/GPIOD132 FC_ADQ5/GPIOD133 FC_ADQ6/GPIOD134 FC_ADQ7/GPIOD135 FC_ADQ8/GPIOD136

FC_ADQ9/GPIOD137 FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140

FLASH

FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143

FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54

FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173

TEMP_COMM

VIN0/GPIO175 VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

3

AH28 AG28 AF26

AF28 AG29 AG26 AF27 AE29 AF29 AH27

AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26

W5 W6 Y9

W7 V9 W8

B6 A6 A5 B5 C7

A3 B4 A4 C5 A7 B7 B8 A8

2

1

TP32TP32

1

TP35TP35

1

TP28TP28

1

TP31TP31

1

TP38TP38

1

TP29TP29

1

TP27TP27

1

TP30TP30

1

TP34TP34

1

TP33TP33

1

TP36TP36

1

TP40TP40

1

TP47TP47

1

TP44TP44

1

TP43TP43

1

TP45TP45

1

TP49TP49

1

TP50TP50

1

TP51TP51

1

TP46TP46

1

TP48TP48

1

TP42TP42

1

TP39TP39

1

TP41TP41

1

TP37TP37

+V3.3A

RS32

RS42

10K_5%

TP56TP56 TP55TP55 TP58TP58 TP59TP59

TP62TP62 TP60TP60 TP57TP57 TP52TP52 TP54TP54 TP53TP53

10K_5%

0402

0402 I

I

0402

0402 I

I

RS41 0_5%

0402

RS29 0_5%

0402

RS33 0_5%

0402

IRS41 0_5%

I IRS29 0_5%

I NIRS33 0_5%

NI

WLAN_DET# 46

EC_BT_EN# 35,54 BT_DET# 54

1 1 1 1

1 1 1 1 1 1

1

J5

SPI_DI/GPIO164

E2

B B

A A

5

K4 K9 G2

4

SPI_DO/GPIO163 SPI_CLK/GPIO162 SPI_CS1#/GPIO165 ROM_RST#/GPIO161

SB800 A11

SPI ROM

http://laptop-motherboard-schematic.blogspot.com/

NC1 NC2

G27 Y2

Hon Hai Precision Industry Co. Ltd.

Foxconn eMS Inc.

HNBD R&D phone: +886-2-2799-6111

Title

SB820-SATA/IDE/HWM/SPI

Size Document Number Rev

Custom

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

Wednesday, August 26, 2009 18:39:11

Page Modified:

3

2

Wednesday, August 26, 2009 18:39:11

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PM

(UTC/GMT)

1

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foxconn PM_AMD Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual