Fairchild Semiconductor DM74AS74SJX, DM74AS74N, DM74AS74MX, DM74AS74M Datasheet

© 2000 Fairchild Semiconductor Corporation DS006282 www.fairchildsemi.com

April 1984
Revised March 2000

DM74AS74 Dual D-Type Positive-Edge-Triggered Flip-Flop with Preset and Clear

DM74AS74
Dual D-Type Positive-Edge-Triggered Flip-Flop

with Preset and Clear

General Description

The AS74 is a d ual e dge-trigge red fl ip-flops. Each fl ip-flop
has individual D, clock, clear and preset inpu ts, and also
complementary Q and Q

outputs.

Information at input D is transf erred to the Q ou tput o n the
positive going edge of the clock pulse. Clock triggering
occurs at a voltage level of the clock pulse and is not
directly related to t he transition time of the p ositive going
pulse. When the clock in put is at eith er the HIGH or LOW
level, the D input signal has no effect.

Asynchronous preset and clear inputs will set or clear Q
output respectively upon the a pplication of LOW level sig­nal.

Features

■ Switching specifications at 50 pF

■ Switching specifications guaranteed over full tempera-

ture and V

CC

range

■ Advanced oxide-isolated, ion-implanted Schottky TTL
process

■ Functionally and pin-for-pin compatible with Schottky
and LS TTL counterpart

■ Improved AC performance over S74 at approximately
half the power

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.

Connection Diagram Function Table

L = LOW State
H = HIGH State
X = Don't Care
↑ = Positive Edge Transition
Q

0

= Previous Condit ion of Q

Note 1: This condition is nonstable; it will not persist when preset and cl ear
inputs return to their inac tive (HIGH) level. The output levels in this condi­tion are not guaranteed to meet the V

OH

specification.

Order Number Package Number Package Description

DM74AS74M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74AS74SJX M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74AS74N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Inputs Outputs

PR

CLR CLK D Q Q

LHXX H L
HLXX L H
L L X X H (Note 1) H (Note 1)
HH↑ HH L
HH↑ LL H
HHLX Q

0

Q

0

www.fairchildsemi.com 2

DM74AS74

Logic Diagram

3 www.fairchildsemi.com

DM74AS74

Absolute Maximum Ratings(Note 2)

Note 2: The “Absolute M aximu m R atin gs” are t hose valu es b eyo nd w hich

the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommend ed O peratin g Cond itions” t able w ill defin e the condition s
for actual device operation.

Recommended Operating Conditions

Note 3: The (↑) arrow indicates t he positive edge of the Clo c k is us ed for reference.

Electrical Characteristics

over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C.

Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range −65°C to +150°C
Typical θ

JA

N Package 76.0°C/W
M Package 107.0°C/W

Symbol Parameter Min Nom Max Units

V

CC

Supply Voltage 4.5 5 5.5 V

V

IH

HIGH Level Input Voltage 2 V

V

IL

LOW Level Input Voltage 0.8 V

I

OH

HIGH Level Output Current −2mA

I

OL

LOW Level Output Current 20 mA

f

CLK

Clock Frequency 0 105 MHz

t

W(CLK)

Width of Clock Pulse HIGH 4 ns

LOW 5.5 ns

t

W

Pulse Width Preset & Clear LOW 4 ns

t

SU

Data Setup Time (Note 3) 4.5↑ ns

t

SU

PRE or CLR Setup-Time (Note 3) 2↑ ns

t

H

Data Hold Time (Note 3) 0↑ ns

T

A

Free Air Operating Temperature 0 70 °C

Symbol Parameter Conditions Min Typ Max Units

V

IK

Input Clamp Voltage VCC = 4.5V, II = −18 mA −1.2 V

V

OH

HIGH Level VCC = 4.5V to 5.5V,

VCC − 2V

Output Voltage IOH = −2 mA

V

OL

LOW Level VCC = 4.5V, VIH = Max,

0.35 0.5 V

Output Voltage IOL = 20 mA

I

I

Input Current @ Max Input Voltage VCC = 5.5V, VIH = 7V 0.1 mA

I

IH

HIGH Level Input Current VCC = 5.5V, Clock, D 20 µA

VIH = 2.7V Preset, Clear 40 µA

I

IL

LOW Level Input Current VCC = 5.5V, Clock, D −0.5 mA

VIL = 0.4V Preset, Clear −1.8 mA

I

O

Output Drive Current VCC = 5.5V, VO = 2.25V −30 −112 mA

I

CC

Supply Current VCC = 5.5V 10.5 16 mA