Fairchild Semiconductor DM74AS574WMX, DM74AS574WM, DM74AS574N Datasheet
© 2000 Fairchild Semiconductor Corporation DS006314 www.fairchildsemi.com
October 1986
Revised March 2000
DM74AS574 Octal D-Type Edge-Tr iggered Flip-Flops with 3-STATE Outputs
DM74AS574
Octal D-Type Edge-Triggered Flip-Flops
with 3-STATE Outputs
General Description
These 8-bit register s feature totem-pole 3- STATE outputs
designed specifically fo r driving highly-capacitive or relatively low-impedance loa ds. Th e hi gh -im ped ance state and
increased HIGH-logic-level drive provide these registers
with the capability of being connected directly to and driving the bus lines in a bus- organized system without ne ed
for interface or pull-up componen ts. They are particularly
attractive for imple menting buffer registers, I /O ports, bidirectional bus drivers, and working registers.
The eight flip-flops of the DM74 AS574 are edge-trigg ered
D-type flip-flops. On t he po sitive t ran sition o f the clock, t he
Q outputs will be set to the logic states that were set up at
the D inputs.
A buffered output control input ca n be used to place the
eight outputs in either a normal l ogic state (HIGH or LOW
logic levels) or a high impe dance state. In the high-i mpedance state the outputs ne ither load nor dr ive the bus lines
significantly.
The output control does not affect the i nternal oper ation of
the flip-flops. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
The pinout is arra nge d to ease printed circu it b oa rd layo ut.
All data inputs are on one side of the package whil e all the
outputs are on the other side.
Features
■ Switching specifications at 50 pF
■ Switching specifications guaranteed over full tempera-
ture and V
CC
range
■ Advanced oxide-isolated, ion-implanted Schottky TTL
process
■ Functionally equivalent with DM74S374
■ Improved AC performance over DM74S374 at approxi-
mately half the power
■ 3-STATE buffer-type outputs drive bus lines directly
■ Bus structured pinout
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.
Connection Diagram
Order Number Package Number Package Description
DM74AS574WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74AS574N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
www.fairchildsemi.com 2
DM74AS574
Function Table
L = LOW State
H = HIGH State
X = Don’t Care
↑ = Positive Edge Transition
Z = High Impedance State
Q
0
= Previous Condit ion of Q
Logic Diagram
Output Clock D Output
Control Q
L ↑ HH
L ↑ LL
LLXQ
0
HXXZ
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