Inside chip’s function block diagram is as follows:
Page 6
The chips pins list is as follows:
Page 7
The UOCIII chip have a complex power supply system. The chip needs 3 kinds of voltage like as 3.3V, 1.8V, 5V. The chip’s total
power supply pins are listed in the form as follows:
Voltage Pin NO. Pin name Marching filter inductor
3.3V
5V
1.8V
On the other hand, there is a 5V-STB power supply net in the PCB. It was inputted from Pin2 of socket CN501. The net provides 5V
Standby voltage independently for CPU working in standby mode. After tune on AC power switch, 5V-STB net always has 5V
voltage not only in normal mode but also in standby mode. At the same time, this 5V net passed D502(3.3V Zener diode) and output
3.3V for CPU core and SSD’s A/D reference voltage.
PIN-4
PIN-5 VREF_POS_LSL
PIN-7 VREF_POS_LSR+HPR
PIN-9 VREF_POS_HPR
PIN-88 VDDA1 L821
PIN-90 VREFAD/POS L816
PIN-94 VDDA2(3.3V) L815,R858
PIN-110 VDDP(3.3V) L818
PIN-15 VP1 L807
PIN-45 VCC 8V L810
PIN-47 VP2 L811
PIN-69 VDD comb L812
PIN-82 VP3 L831
PIN-3 VDDC4 L806
PIN-93 VDDA(1.8V) L814
PIN-96 VDDadc(1.8V)
PIN-100 VDDC2 L817
PIN-118 DECV1V8 L819
PIN-124 VDDC3 L820
VDDA3(3.3V)
L808
L809
The UOCIII chip’s core voltage(1.8V) was produced by the circuit follows. Q806 and Q807 are both Darlington transistor. UOCIII’s
Pin-14(DECDIG) supply tune on voltage to Q805’s base, the voltage of Q805’s emitter is steadied about 3.3V, this voltage was
inputted into Q806 and Q807’s base, Darlington transistor’s Vbe is 0.7V x 2=1.4V, finally we get 1.8V(3.3V-1.4V≈1.8V) at Q806,
Q807’s emitter point. After filtered by inductor (eg. L806), 1.8V was inputted in UOCIII chip.
Unfortunately when 3.3V or 1.8V net were out of work, as the result, the CPU inside UOCIII could not be programmed update
FLASH-ROM. As an experience, if the system could not be updated software in FLASH, you should check each power supply pin
of UOCIII listed in the form before. If you want to learn more about software update and download code into FLASH-ROM, please
reference <LM21 chassis software update service manual>.
Page 8
3) The keys on front cabinet:
There are 7 keys on the front cabinet. The keys’ architecture was combined with resistors delivery net. The CPU’s A/D port will read
the key’s delivery voltage. To suit for more cabinets, the keys’ architecture was serial and parallel 2 modes. Alternative key modes
the delivery voltages of each button are same. The key’s architecture modes, delivery voltage and resistors were shown below.
Delivery voltage 0V 0.4V 0.8V 1.2V 1.6V 2.0V 2.4V
Function POWER AV V- P- P+ V+ MENU
Part No. R0 R1 R2 R3 R4 R5 R6 R7
Serial 3.3K 470Ω 560Ω 820Ω 1.5K 1.8K 3.9K Null
Parallel 3.3K 0Ω 470Ω 1K 1.8K 3K 5.1K 9.1K
When no button was pushed, CPU’s A/D pin(Pin-120 ADC3) should get a voltage upper than 2.4V. By the way, the keys’ net were
supplied by 5V-STB, the 5V is always exist even through in standby mode. A red & blue double LED is used as the TV’s indicator
light. The LED is red when TV in standby mode and blue in normal mode. The infrared remote sensor was mini type packaged by
resin and worked at 5V. The remote code was transmitted by shielded cable to UOCIII’s Pin-97(INT0).
4) Headphone power amply part.
To suit for more headphone’s impedance(8Ω~33Ω), the NS’s double operational amplifiers LM358 was used as headphone power
amply.
Page 9
One channel of amplify was shown up. It’s an AC coupled inverting amplifier, the gain of amplify was select by ratio of Rf/R1. The
headphone amplify has independence audio source, the audio signals were outputted by UOCIII’s Pin-62(AUDOUTHOL),
Pin-63(AUDOUTHOR). For this reason, TV set will not MUTE automatically when the headphone plugged in headphone jack. The
headphone has independence volume control in OSD menu too.
5)The CLASS D main power amplify
To using power supply efficiently, the Class-D amplify was used as the main power amplify. The chip’s part number is TPA3008
made by TI. It could output 7W approximately on 8Ω loudspeaker at 12V working voltage. The chip’s pins list was not very
complex, it was shown as follows:
When 12V was supplied on chip at normal working mode. It’s meaning chip’s power supply OK that a 5V could be test on
Pin-7(AVDDREF). For TPA3008’s working voltage is 12V, the 5V reference voltage was produced by the circuit net inside the chip.
The 5V reference voltage is a symbol flag of 12V power supply state. The Pin-1(SHUTDOWN) is used to shutdown the output of
the chip in MUTE mode. At normal mode, the pin’s level is HIGH and it’s LOW at MUTE mode.
Been a CLASS-D power amplify, the chip output difference signal. A duple input oscilloscope is necessary when you test the
waveform on loudspeaker. But the oscilloscope’s probes could not connect directly on loudspeaker. A low pass RC filter is need to
filter signal and isolating the probes. The test circuit was shown below:
The low pass RC filter’s architecture is like as follow:
Page 10
In normal condition, R-filt and C-filt’s type value is list as follows:
MEASUREMENT R-filt C-filt
Efficiency 1000Ω 5,600pF
All other measurements 100Ω 56,000pF
Signal Flowing Chart (digital part)
The scale chip MST6151A is the main component on the digital PCB. Many parts were integrated inside the chip, it’s include A/D
convertor, video signal de-interlace changer, picture scaler, digital video interface (DVI), TTL to LVDS convertor etc. After the
RGB signal was processed by UOCIII, the signal was connected to digital PCB through socket CN201. The RGB signal and Y PbPr
are both connected to video switch chip FSAV330, and input to the analog port of 6151A after FSAV330 selected. On the other hand,
the second analog input port of 6151A connects VGA port; its digital input port connects DVI port for digital difference
sgnal(TMDS). MST6151A communicate with CPU by a special 4Bit bus and was controlled by Read, Witer and ALE signal. there
are 2 piece of 16Mbit SDRAM on the PCB, the SDRAMs are used to save digital video data for MST6151A when it’s doing scale
and de-interlace operation. Finally the processed video signal was converted to LVDS signal which was outputted to socket CN303
and connected to LCD panel through a shielded cable with 5 twisted pairs. The 4 LDO(Low Dropout Voltage Regulator)were used to
produce 3.3V and 1.8V DC to supply relative parts.
1) The power supply of digital PCB:
All digital PCB’s DC power supply nets were changed from 5V net. For example, different parts of PCB need 3.3V & 1.8V DC
were produced by different LDO(
PLL (phase lock loop)part, U505(3.3V) for A/D part, U503(1.8V) for chip’s core voltage. When the PCB connect 5V, the DC
Low Dropout Voltage Regulator
). U603 was supply 3.3V for SDRAM, U506(3.3V)for MST6151A’s
Page 11
voltage was exist on each LDO’s output pin. There is short cut circuit in the output net if a LDO without output voltage.
By the way, the power of panel’s logic circuit was supplied by the net(5V-PANEL) independently. It was controlled by a
switch(U504) made by double P-channel MOS named SI9933. Finally the 5V output to CN303 and connect to panel trough wires in
shielded cable.
2) The video switch:
FSAV330 is a high speed video switch with max pass band to 300MHz. Been a CMOS chip, FSAV330 is simpler than Bi-polar
chip’s architecture. The chip’s inside was shown below:
On the reason of FSAV330 is a COMS chip, it could be destroyed easily when its input port connect to negative voltage. Pin-1
is the select pin for output. At Y PbPr, DVI, VGA mode Pin-1 should be High-level(about 3.3V), otherwise it is LOW-level.
3)The power supply of MST6151A:
MST6151A is a large scale integration IC which was packaged in 208 PIN-PQFP. It supports a lot of video formats input. The
main task of the chip is AD convert analog video and scaling the video suit for LCD panel displaying. The chip has SDRAM
interface, so the chip’s pins are very dense. Please pay attention to check pins, they should not be connected each other and short cut
to GND. MST6151A has 8 serials power supply nets in total, every power supply net has a serial of pins. they are listed as:
Net name Pin number voltage Function explanation
AVDD-ADC 17,34 3.3V A/D part power supply pins
AVDD-DVI 4,10 3.3V DVI interface power supply pins
AVDD-MPLL 204 3.3V Main PLL power supply pins
VDDP 66,162,182 3.3V Digital Output part power supply pins
VDDM 86,102,113,125,139,154 3.3V MEMORY interface power supply pins
AVDD-PLL 12 3.3V A/D PLL power supply pins
AVDD-PLL2 109 3.3V A/D PLL2 power supply pins
VDDC 63,79,131,156,173,185,195 1.8V Core power supply
VDDC 49 1.8V Core power supply after L201 filter
4) The bus of MST6151A:
MST6151A was controlled by a special half byte(4Bit) bus. It need 2 transmission clocks to send a byte data. Adding 4control
lines (Read, Write, INT, ALE), the bus is total 8 lines connected between MST6151A and CPU for data communication and
logic control. The 8 lines of bus were connected on digital PCB through CN201. Two 33Ω parallel resistors(RN201 & RN202)
are linked bus in series and Two 10KΩ parallel resistors(RN203 & RN204) are pull up 5V resistors. When you check the bus,
please pay attention on RN201, RN202, RN203, RN204. The impendence of each line between 5V net is 10KΩ. On the reason
of tiny space in parallel resistors pins, the system will has failure, once they are connected each other or short cut to GND. The
8 line of MST6151A’s bus is:
Pin numberNet namePin numberNet name
PIN-72 DATA-0 PIN-68 INT
PIN-73 DATA-1 PIN-69 ALE
PIN-74 DATA-2 PIN-70 READ
PIN-75 DATA-3 PIN-71 WIRTE
Page 12
By the way, Pin-67 is REST pin of MST6151A. The pin’s level is LOW in normal mode, it will be pull up HIGH several mini
2.24uS
seconds to rest the chip in the beginning of AC power on..
5) The logic control signal output by MST6151A:
The CPU not has so many IO ports, and MST6151A has many pins could be used as GPIO(General Programmable IO Port).
Many of the system’s logic control signals were connect to GPIO pins and controlled by CPU indirectly. There are 5 control
signal total:
Pin NumberNet nameFunction explanation
PIN-51 BK-ON/OFF
Q507 as a buffer and inverter,to INVERTOR switch(control back light on/off)
PIN-52 V-SELECT For FSAV330 select pin (RGB or Y PbPr)
PIN-76 HDCP-PLUG
PIN-78 PANEL-ON/OFF
PIN-200 BK-ADJ
Q101 as a buffer and inverter,to control DVI’s HOT-PLUG function
Q507 as a buffer and inverter,to control P-MOS switch of panel’s power
Q506 as a buffer and inverter,adjust INVERTOR output voltage(control back light
brightness)
Q507,Q506 were used as the buffer and inverter of MST6151A’s GPIO Pin-51,Pin-200. the output signals were connected to
panel’s invertor through CN502’s Pin-1,Pin-2. The 2 logic signal control the panel’s back light on/off and brightness. If the
panel’s lights are not bright, the failures in 2 nets should be checked and fixed first. SI9933 is a double P-MOS packaged as
SO-8. the 2 P-MOS were paralleled and used as a large current switch in the PANEL-ON/OFF net. The insight of chip was
shown below:
SI9933’s Pin-5,6,7,8 will all output 5V when the TV in normal mode. The working condition of all pix on panel was relative on
the chip working regular.
appandix::::
The waveform of each test point:
5V P-P
3.5V P-P
1.4V P-P
1.4V P-P
2V P-P
H
CN805 PIN22
V
CN805 PIN21
2V P-P
H
CN805 PIN24
3V P-P
H
CN805 PIN26
660mV P-P
H
OS201 PIN2 U801 PIN65
OS501 PIN1
For more detailed information about the chips in system, the following documents could be used as references. They are
1.4V P-P
H
CN805 PIN28
5V P-P
Q504 C CN303 PIN7
Page 13
include:
《《《《The datasheet of SI993 》》》》;
《《《《
The datasheet of FSAV330
《《《《
The specification of TPA3008
《《《《The datasheet of LM358》》》》;
all this documents cloud be download form internet.
》》》》
;
》》》》
;
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.