Dell mb a00-0814w Schematics

A
Parker Block Diagram
CPU
4 4
U1400 U1500 U7500 U7600
FW289 UP954 JW620 FW418
SDVO
3 3
2 2
CRT
Thermal Sensor
EMC4001
1394 CONN
SD card
23
1394
26
8 in1
26
Clock Generator ICS 951463
12.1WXGA
CRT Port
PATA HDD
TI 7402
Card reader
1394 2 port
24,25
B
Intel Mobile CPU
Yonah / Merom ULV
4
LVDS
17
RGB CRT
16
IDE
33
FSB:533Mhz
FSB 533MHzHOST BUS
RS600ME
DUAL DDR2 CHANNEL INTEGRATED GRAPHICS PCI-EXPRESS(4) LVDS
7,8,9,10,11
ALINK x4
ATI
SB600
USB 2.0/1.1 ports (10)
PCI BUS
AZALIA
High Definition Audio ATA 66/ 100/133 SATA2 (4) LPC I/F PCI/PCI BRIDGE ACPI 2.0 SPI
18,19,20,21,22
5,6
C
DDRII 533/667MHz
DDRII 533/667MHz
PCI Express (4)
USB2.0 (10)
D
Project code:91.4S701.001 PCB P/N :48.4S701.001 REVISION :06240-1
200-PIN DDR2 SODIMM
Support Aero Glass
ON-BOARD RAM 1G CELL X 8
UNBUFFERED DDR2 SODIMM Socket
12,13,14
Power Switch
Mini-Card WWAN
Mini-Card
802.11a/g/n
Biometric
Bluetooth
USB*2 P-USB*1
Digi Tizer
PORT0.1 PORT2
PORT3
15
31
PORT9 PCIE1
PCIE2
PORT5
PORT7
Express Card Slot 54mm
32
32
17
31
34
17
PORT6 PCIE3
SIM CONN
31
32
E
Battery Charger
ISL88731
INPUTS OUTPUTS
+PWR_SRC
+PBATT
CPU DC/DC
ADP3207
INPUTS OUTPUTS
+PWR_SRC
+VCC_CORE
System DC/DC
ISL6236/MAX8778
INPUTS
+PWR_SRC
LDO
MAX8794
+1.8V_SUS
LDO
TPS51100
+1.8V_SUS
OUTPUTS
+3.3V_RTC_LDO +5V_ALW +3.3V_ALW
+1.5V_RUN
+0.9V_DDR_VTT V_DDR_NB_REF
System DC/DC
ISL6236/MAX8778
+PWR_SRC
+1.8V_SUS +1.05V_VCCP
System DC/DC
ISL6236/MAX8778
+PWR_SRC
+NB_VCORE +1.2V_SUS
PCB LAYER
L1:TOP L2:Signal
39,40
42
43
44
44
45
46
L3:GND
TPM
1.2
BCM5756ME Giga LAN
PCIE0
D
RJ45 CONN
27
38
28
08/14/2007
08/14/2007
08/14/2007
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
SPI
SPI
EC SMSC MEC5025
MIC IN
Digital MIC Array
LINE OUT
INT.SPKR
Azalia CODEC STAC 9205
Speaker AMP.
Headphone AMP.
TI TPA6040A4
29
30
BIOS
SPI FLASH 2MB
33
KBC
1 1
CRTDVI
Pad
SMBus
SMBus
SMSC ECE1077
37 37
LPC
35
37
SIO Expander SMSC ECE5021
36
Int. KBTouch
USB 2.0 RJ45S/PDIF
PORT8
Media-Slice
A
B
C
L4:Signal L5:GND L6:VCC L7:Signal L8:GND L9:Signal L10:BOTTON
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Parker
Parker
Parker
153Tuesday, August 14, 2007
153Tuesday, August 14, 2007
153Tuesday, August 14, 2007
E
-1
-1
-1
A
B
C
D
E
CLK-GEN ICS951463
EXT CLK FREQUENCY SELECT TABLE(MHZ)
FSC
1 0 1
4 4
0 0 1
0 1 1 0 1 0 0 0 0 1 0 0 1 1 0 1 1 1
SRC
CPUFSB
100 100 133 100 166
100
200
100
266
100
333
100
400
100
Resv
100
REFFSA PCI
14.31
33 33 14.31 33 14.31 33 14.31 33 14.31 33 14.31 33 14.31 33 14.31
CLKREQA# B# C# MAP
CLKSRC 7 NB ALINK
CLKREQA#
CLKSRC 5 EXPRESS CARD CLKSRC 6 SB ALINK CLKSRC 2 WLAN
CLKREQB#
CLKSRC 4 LOM CLKSRC 0 WWAN
CLKREQC#
ATIGCLK 1 NB-PCIEX16 ATIGCLK 2 NO -USED
ATI NB-RS600ME STRAP PIN
Strap name HIGH 1LOW 0
NB_VSYNC NB_HSYNC
3 3
NB_SDVO_CTRLDATA
(DDC_DATA: STRAP_MEMVMODE)
STRP_DATA
(DAC_VSYNC: STRAP_MOBILE_GFX)
(DAC_HSYNC: STRP_INTGFX_DISABLE)
(STRP_DATA: STRP_MEMSTRAPS)
DESKTOP GRAPHICS DEVICE MOBILE GRAPHICS DEVICE
ENABLE DISABLE
DDR3 DDR2
SELECT MEMORY CHA A AS DEBUG BUS
NORMAL MODE
★ ★
TABLE OF CONTENTS
P01-BLOCK DIAGRAM P02-Table Content P03-ITP Debug P21-SB600-Power(4/5) P04-CLK GEN(ICS951463) P05-CPU-01-FSB P06-CPU-02-POWER P07-RS600ME-AGTL(1/5) P08-RS600ME-ALINK/PCIE-2(2/5) P09-RS600ME-MEMORY I/F (3/5) P10-RS600ME-LVDS/CRT/CLK4(4/5) P11-RS600ME-5(5/5) P12-ON BOARD MEMORY RESISTORS P13-ON BOARD MEMORY P14-ON-BOARD MEMORY TERMINATION P15-DDR-B P16-CRT P17-LVDS P18-SB600-CPU&LPC&PCI&PCIE(1/5)
P19-SB600-IDE&SATA$SPI(2/5) P20-SB600-USB&AZALIA&GPIO(3/5)
P22-SB600-Strapping Pin(5/5) P23-FAN, EMC4001 P24-PCI7402-1 P25-PCI7402-2 P26-SD/1394 P27-LAN BCM5756ME P28-LAN Connector P29-CODEC STAC 9205 P30-AUDIO AMP P31-EXPRESS CARD/BT/SNIFFER P32-WLAN/WWAN P33-PATA HDD/BIOS/Pen P34-P-USB/USB P35-KBC MEC5025 P36-SIO ECE5021
SMBUS TABLE
P37-ECE1077/TP/KBC P38-MEDIA SLICE P39-DCIN/BATT CONN. P40-Charger P41-BATTERY SELECT P42-ADP3207A_CPU_Core P43-ISL6236_MAX8778_5V/3D3V P44-MAX8794_1D5V/TPS51100_0D9V P45-ISL6236_MAX8778_1D8V/1D05V P46-ISL6236_MAX8778_1D2V/NB_Core P47-POWER ENABLE P48-POWER ON LOGIC P49-POWER ON SEQUENCE P50-POWER ON TIMING P51-EMI/HOLE P52-HISTORY
SMBUS TABLE
SR600ME PCIE route
PCIE 0 PCIE 1 PCIE 2 PCIE 3
2 2
ATI SB-SB600 STRAP PIN
Strap name HIGH 1LOW 0
AC_SDOUT
RTC_CLK
PCI_CLK4
PCI_CLK6
1 1
PCI ROUTING
MEDIACARD
LOM BCM5756ME MINI WWAN MINI WLAN EXPRESS CARD
SB_AC_SDOUT SB_RTCCLK CLK_SB_PCI4
CLK_SB_PCI6
0 0 1
AD171394/
USB TABLE
Ext Side 1
USB0
Ext Side 2
IGNORE DEBUG STRAPS DEBUG STRAPS
EXTERNAL RTC
EXTERNAL 48MHZ
Default Default
PCI_CLK1PCI_CLK0
CLK_SB_PCI1CLK_SB_PCI0
0 1 0 11
ROM TYPE
FWH LPC
Default
SPI PCI
★ ★
Default
INTERNAL RTC
Default
INTERNAL PLL48
AMD CPUINTEL CPU
PCI-CLK route
INT REQ GNTIDSEL
11G
H
A
PCICLK 5 BCM5756ME PCICLK 6
MEC5025PCICLK 2
TI7402
B
USB1 USB2
USB4 USB5 USB6 USB7 USB8 USB9
POWER USB Digi TizerUSB3
Biometric Express Card BLUETOOTH Media Slice MiniCard WWAN
SOURCE SIGNAL NAME LINKED DEVICES
NB CRT/SLICE CRT
RS600ME
I2C_CLK/DAC_SDA I2C_CLK/I2C_DATA LVDS
SB600 MEC5025
I2C_CLK/DDC_SDA SCL1/SDA1 AB1A_CLK/AB1A_DATA
AB1B_CLK/AB1B_DATA AB1C_CLK/AB1C_DATA AB1D_CLK/AB1D_DATA AB1E_CLK/AB1E_DATA AB1H_CLK/AB1H_DATA IMCLK/IMDAA
DVI
LAN / WLAN / WWAN / EXPRESS CARD/SO-DIMM
SLICE CONN. INVERTER / LIGHT SENSOR BATTERY CONN. BATTERY-SLICE CONN. P-USB / CHARGER / THERMAL CLK-GEN TOUCH PAD
EMC4001 Thermal sensor mapping
D1
OTP
D2
CPU edge diode
D3
Bottom SoDIMM
D4
skin temp sensor at the bottom of the MB located within the triangle of MCH/CPU/ DRAM RS600ME
D5 VCP1
Pwr Mon
VCP2
WWAN
C
D
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet of
Table Contsnt
Table Contsnt
Table Contsnt
Parker
Parker
Parker
E
253Friday, August 03, 2007
253Friday, August 03, 2007
253Friday, August 03, 2007
of
of
-1
-1
-1
A
B
C
D
E
SSID = CPU
4 4
CPU
ITP Conn.
TCK(PIN 5)
TCK(PIN AC5)
FBO(PIN 11)
3 3
2 2
clk-gen may have leakage ,if use +3.3V_SUS
ITP_TDI5 ITP_TMS5
ITP_TRST#5 ITP_TCK5
ITP_TDO5 CLK_CPU_ITP#4 CLK_CPU_ITP4
H_RESET#5,7,51
ITP_BPM#55
ITP_BPM#45
ITP_BPM#35
ITP_BPM#25
ITP_BPM#15
ITP_BPM#05
ITP_DBRESET#4,5,20,36
ITP_TDI ITP_TMS
ITP_TRST#
ITP_TDO CLK_CPU_ITP# CLK_CPU_ITP
H_RESET# ITP_BPM#5
ITP_BPM#4 ITP_BPM#3 ITP_BPM#2 ITP_BPM#1 ITP_BPM#0
12
R559
R559 680R2J-3-GP
680R2J-3-GP
+3.3V_SUS +1.05V_VCCP
ITP_TCK
12
R560
R560 27D4R2F-L1-GP
27D4R2F-L1-GP
12
R552
R552 150R2F-1-GP
150R2F-1-GP
12
R541
R541 51R2F-2-GP
51R2F-2-GP
ITP_DBRESET#
12
R551
R551 51R2F-2-GP
51R2F-2-GP
R561
R561
R550
R550
1 2
DY
DY
1 2
DY
DY
+1.05V_VCCP
12
R558
R558 39D2R2F-L-GP
39D2R2F-L-GP
XDP_TDO_FELX
22D6R2F-L1-GP
22D6R2F-L1-GP
CPURST_FLEX#
22D6R2F-L1-GP
22D6R2F-L1-GP
C605
C605
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
12
12
R557
R557 150R2F-1-GP
150R2F-1-GP
ITP1
ITP1
1 2
3 4 5 6 7 8
9 10 11 12 13 14 15
DY
DY
16 17 18 19 20 21 22 23 24 25 26 27 28
MLX-CON28-3-GP
MLX-CON28-3-GP
20.K0116.028
20.K0116.028
29
H_CPURST# use pull-up Resistor close ITP connector 500 mil ( max )
+1.05VRUN use Decoupling Capacitor close
30
ITP connector 100 mil ( max )
ITP Debug Conn.
1 1
A
B
C
D
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet of
ITP Debug
ITP Debug
ITP Debug
Parker
Parker
Parker
E
353Friday, August 03, 2007
353Friday, August 03, 2007
353Friday, August 03, 2007
of
of
-1
-1
-1
A
B
C
D
E
200mA200mA200mA1500mA
1 2
L26
L26
FBMH1608HM601-T1GP
FBMH1608HM601-T1GP
4 4
12
C246
C246
+3.3V_RUN_CLK
12
12
C580
C580
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C584
C584
C612
C612
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C578
C578
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C603
C603
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C572
C572
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
L25
L25
BLM18BB221SN1D-GP
BLM18BB221SN1D-GP
CLK_VDDA
12
C248
C248
SC10U10V5KX-2GP
SC10U10V5KX-2GP
12
C597
C597
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
L32
L32
BLM18BB221SN1D-GP
BLM18BB221SN1D-GP
12
C330
C330
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C322
C322
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
+3.3V_RUN+3.3V_RUN+3.3V_RUN+3.3V_RUN
1 2
L33
L33
BLM18BB221SN1D-GP
BLM18BB221SN1D-GP
CLK_VDDREFCLK_VDD48
12
C331
C331
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C329
C329
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
CLOSE TO PIN 1CLOSE TO PIN 4CLOSE TO PIN 42CLOSE TO PIN 14,23,26,33,36,48
U36
U36
42
VDDA
33
VDDATIG
4
VDD48
1
VDDREF
48
VDDCPU
14
VDDSRC
23
VDDSRC
26
VDDSRC
36
VDDSRC
39
SRCCLKT0
38
SRCCLKC0
24
SRCCLKT2
25
SRCCLKC2
20
SRCCLKT4
21
SRCCLKC4
18
SRCCLKT5
19
SRCCLKC5
16
SRCCLKT6
17
SRCCLKC6
12
SRCCLKT7
13
SRCCLKC7
11
CLKREQA#
28
CLKREQB#
29
CLKREQC#
10
SMBDAT
9
SMBCLK
40
IREF
8
VTT_PWRGD#/PD
51
CPU_STOP#
52
RESET_IN#
ICS951463BGLFT-GP
ICS951463BGLFT-GP
48MHZ_0 48MHZ_1
ATIGCLKC1 ATIGCLKT1
ATIGCLKC2 ATIGCLKT2
CPUCLKC0 CPUCLKT0 CPUCLKC1 CPUCLKT1 CPUCLKC2 CPUCLKT2
FSLA/REF0 FSLB/REF1 FSLC/REF2
GNDSRC GNDSRC GNDSRC GNDSRC
GNDCPU GNDREF
GND48
GNDATIG
GNDA
CLK_XTAL0
2
X1
3
X2
5 6
34 35
30 31
49 50 45 46 43 44
55 54 53
15 22 27 37
47 56 7
32 41
CLK_ATIC1 CLK_ATIT1
CLK_CPUC0 CLK_CPUT0 CLK_CPUC1 CLK_CPUT1 CLK_CPUC2 CLK_CPUT2
CLK_REF0 CLK_REF1 CLK_REF2
1 2
R226 33R2J-2-GPR226 33R2J-2-GP
1 2
R221 15R2J-GPR221 15R2J-GP
2 3 1
2 3 1
2 3 1
2 3 1
DY
DY
1 2 1 2 1 2
4
4
4
4
RN4 SRN33J-5-GP-URN4 SRN33J-5-GP-U
RN14 SRN22-3-GPRN14 SRN22-3-GP
RN11 SRN33J-5-GP-URN11 SRN33J-5-GP-U
RN8 SRN33J-5-GP-U
RN8 SRN33J-5-GP-U R593 33R2J-2-GPR593 33R2J-2-GP
R595 15R2J-GPR595 15R2J-GP R594 33R2J-2-GPR594 33R2J-2-GP
CLK_SMCARD_48MCLK_48M_0 CLK_USB_48MCLK_48M_1
CLK_NBSRC# CLK_NBSRC
CLK_CPU_BCLK# CLK_CPU_BCLK
CLK_NB_FSB# CLK_NB_FSB
CLK_CPU_ITP# CLK_CPU_ITP
CLK_SB_14M CLK_NB_14M CLK_SIO_14M
CLK_SRCT0 CLK_SRCC0 CLK_SRCT2 CLK_SRCC2 CLK_SRCT4 CLK_SRCC4 CLK_SRCT5 CLK_SRCC5 CLK_SRCT6 CLK_SRCC6 CLK_SRCT7 CLK_SRCC7
CARD_CLK_REQ# MINI1CLK_REQ# MINI2CLK_REQ#
CLK_SDATA CLK_SCLK
CLK_IREF CLK_EN#_R CLK_CPU_STOP#
12
C633
C633
DY
DY
R229
R229 4K7R2J-2-GP
4K7R2J-2-GP
CLK_RESET_IN#
CLK_VDDA
CLK_VDD48 CLK_VDDREF
SSID = CLOCK
WWAN
WLAN
LOM
EXPRESS CARD
3 3
SB ALINK
NB ALINK
CLK_PCIE_MINI232 CLK_PCIE_MINI2#32
CLK_PCIE_MINI132 CLK_PCIE_MINI1#32
CLK_PCIE_LOM27 CLK_PCIE_LOM#27
CLK_PCIE_EXPCARD31 CLK_PCIE_EXPCARD#31
CLK_SBLINK18 CLK_SBLINK#18
CLK_NBLINK8 CLK_NBLINK#8
CLK_PCIE_MINI2 CLK_PCIE_MINI2#
CLK_PCIE_MINI1 CLK_PCIE_MINI1#
CLK_PCIE_LOM CLK_PCIE_LOM#
CLK_PCIE_EXPCARD CLK_PCIE_EXPCARD#
CLK_SBLINK CLK_SBLINK#
CLK_NBLINK CLK_NBLINK#
CLKREQA# B# C# INTERNAL 120K ohm PU
CLOSE TO PIN 40
+3.3V_ALW
4
RN19
RN19 SRN2K2J-1-GP
SRN2K2J-1-GP
U47
2 2
CKG_SMBDAT35
CKG_SMBCLK35
1
CLK_SCLK
2 3
2N7002DW-7F-GP
2N7002DW-7F-GP
U47
6 5
+3.3V_RUN
1 2 34
+1.05V_VCCP
CLK_SDATA
2 3 1
1 2 3
1 2 3
1 2 3
1 2 3
1 2 3
12
R535
R535 475R2F-L1-GP
475R2F-L1-GP
ITP_DBRESET#3,5,20,36
4 4
4
4
4
4
+3.3V_RUN
CLK_ENABLE#42,51 H_CPU_STP#18
RN6 SRN33J-5-GP-URN6 SRN33J-5-GP-U
RN3 SRN33J-5-GP-URN3 SRN33J-5-GP-U
RN5 SRN33J-5-GP-URN5 SRN33J-5-GP-U
RN7 SRN33J-5-GP-URN7 SRN33J-5-GP-U
RN9 SRN33J-5-GP-URN9 SRN33J-5-GP-U
RN13 SRN33J-5-GP-URN13 SRN33J-5-GP-U
+3.3V_RUN_CLK CLK_XTAL1
CARD_CLK_REQ#31 MINI1CLK_REQ#32 MINI2CLK_REQ#32
23 1
4
RN77 SRN2K2J-1-GPRN77 SRN2K2J-1-GP
1 2
R572 0R2-0.R572 0R2-0.
1 2
R592 0R2-0.R592 0R2-0.
SC33P50V2JN-3GP
SC33P50V2JN-3GP
+3.3V_RUN
D11
D11
2 1
RB751V-40-1-GP
RB751V-40-1-GP
1 2
EXT CLK FREQUENCY SELECT TABLE(MHZ)
12
12
R614
R614
1KR2J-1-GP
DY
DY
12
R606
R606
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
CPU_BSEL05
1 1
CPU_BSEL15 CPU_BSEL25
1 2
R613 0R2-0.R613 0R2-0.
1 2
R618 0R2-0.R618 0R2-0.
1 2
R615 0R2-0.R615 0R2-0.
CPU_BSEL0_R CPU_BSEL1_R CPU_BSEL2_R
DY
DY
R617
R617
12
R610
R610
12
DY
DY
1KR2J-1-GP
1KR2J-1-GP
12
1KR2J-1-GP
1KR2J-1-GP
R616
R616
1KR2J-1-GP
1KR2J-1-GP
1 2
R605 8K2R2J-3-GPR605 8K2R2J-3-GP
1 2
R609 8K2R2J-3-GPR609 8K2R2J-3-GP
1 2
R608 8K2R2J-3-GPR608 8K2R2J-3-GP
R607
R607
1KR2J-1-GP
1KR2J-1-GP
CLK_SB_14M CLK_NB_14M CLK_SIO_14M
FSC
1 0 1 0 0 1
0 1 1 0 1 0 0 0 0 1 0 0 1 1 0 1 1 1
A
B
SRC
CPUFSB
100 100 133 100 166
100
200
100
266
100
333
100
400
100
Resv
100
PCI
REFFSA
33
14.31 33 14.31 33 14.31 33 14.31 33 14.31 33 14.31 33 14.31 33 14.31
CLKREQA# B# C# MAP
CLKSRC 7 NB ALINK
CLKREQA#
CLKSRC 5 EXPRESS CARD CLKSRC 6 SB ALINK CLKSRC 2 WLAN
CLKREQB#
CLKSRC 4 LOM CLKSRC 0 WWAN
CLKREQC#
ATIGCLK 1 NB-PCIEX16 ATIGCLK 2 NO -USED
C
D
CLK_XTAL0
C328
C328
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
1 2
R242
R242 1MR2F-GP
1MR2F-GP
1 2
X4
X4
12
XTAL-14D318M-2GP
XTAL-14D318M-2GP
DY
DY
CLK_XTAL1_R
R241 0R2-0.R241 0R2-0.
12
C327
C327 SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
1 2
CLK_XTAL1
CLOSE TO PIN2 ,3
placed CAP closed CLK-GEN within 20 mm (80mil)
CLK_SMCARD_48M
C623
CLK_SMCARD_48M 25 CLK_USB_48M 20
CLK_NBSRC# 8 CLK_NBSRC 8
CLK_CPU_BCLK# 5 CLK_CPU_BCLK 5
CLK_NB_FSB# 10 CLK_NB_FSB 10
CLK_CPU_ITP# 3 CLK_CPU_ITP 3
CLK_SB_14M 20 CLK_NB_14M 10
TP176 TPAD28TP176 TPAD28
SB USB
NB PCIEX16
CPU
NB FSB
ITP
ECE5032
C623
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
CLK_USB_48M
C615
C615
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
CLK_SB_14M
C634
C634
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
CLK_NB_14M
C635
C635
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
placed CAP closed CLK-GEN within 20 mm (80mil)
CLK_NBLINK CLK_NBLINK#
CLK_PCIE_MINI1# CLK_PCIE_MINI1
CLK_PCIE_LOM CLK_PCIE_LOM#
CLK_PCIE_EXPCARD CLK_PCIE_EXPCARD#
CLK_SBLINK CLK_SBLINK#
CLK_PCIE_MINI2 CLK_PCIE_MINI2#
CLK_NB_FSB# CLK_NB_FSB
CLK_CPU_ITP# CLK_CPU_ITP
CLK_CPU_BCLK# CLK_CPU_BCLK
CLK_NBSRC# CLK_NBSRC
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator
Clock Generator
Clock Generator
Parker
Parker
Parker
RN74
RN74 SRN49D9F-GP
SRN49D9F-GP
RN57
RN57 SRN49D9F-GP
SRN49D9F-GP
RN60
RN60 SRN49D9F-GP
SRN49D9F-GP
RN67
RN67 SRN49D9F-GP
SRN49D9F-GP
RN71
RN71 SRN49D9F-GP
SRN49D9F-GP
RN66
RN66 SRN49D9F-GP
SRN49D9F-GP
RN73
RN73 SRN49D9F-GP
SRN49D9F-GP
RN70
RN70 SRN49D9F-GP
SRN49D9F-GP
RN75
RN75 SRN49D9F-GP
SRN49D9F-GP
RN59
RN59 SRN49D9F-GP
SRN49D9F-GP
E
2 3 1
1 2 3
2 3 1
2 3 1
2 3 1
1 2 3
2 3 1
2 3
DY
DY
1
2 3 1
2 3 1
453Friday, August 03, 2007
453Friday, August 03, 2007
453Friday, August 03, 2007
of
of
4
4
4
4
4
4
4
4
4
4
DY
DY
12
12
12
12
-1
-1
-1
CLK-GEN XTAL
A
SSID = CPU
IC CPU YONAH U1500 1.33G BGA--P/N:UP954 IC CPU MEROM U7500 1.06G BGA--P/N:JW602 IC CPU YONAH U1400 1.2G BGA--P/N:FW289
4 4
U87A
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_ADSTB#07
3 3
H_ADSTB#17
H_A20M#18 H_FERR#18 H_IGNNE#18
H_STPCLK#18 H_INTR#18 H_NMI#18 H_SMI#18
TP42TPAD28 TP42TPAD28
2 2
+1.05V_VCCP
1 2
DY
DY
R568 200R2F-L-GP
R568 200R2F-L-GP
1 2
R476 56R2J-4-GPR476 56R2J-4-GP
1 1
1 2
R80 56R2J-4-GPR80 56R2J-4-GP
1 2
DY
DY
R512 54D9R2F-L1-GP
R512 54D9R2F-L1-GP
1 2
R486 56R2J-4-GPR486 56R2J-4-GP
1 2
DY
DY
R182 54D9R2F-L1-GP
R182 54D9R2F-L1-GP
1 2
R483 470R2J-2-GPR483 470R2J-2-GP
1 2
R547 200R2F-L-GPR547 200R2F-L-GP
TP28TPAD28 TP28TPAD28 TP35TPAD28 TP35TPAD28 TP141TPAD28 TP141TPAD28 TP27TPAD28 TP27TPAD28 TP25TPAD28 TP25TPAD28 TP143TPAD28 TP143TPAD28 TP31TPAD28 TP31TPAD28 TP43TPAD28 TP43TPAD28 TP37TPAD28 TP37TPAD28
TP2TPAD28 TP2TPAD28
H_PWRGOOD H_THERMTRIP# CPU_PROCHOT# H_RESET# H_FERR# ITP_BPM#4 H_DPSLP# H_CPUSLP#
A
H_ADSTB#0
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_ADSTB#1 H_A20M#
H_FERR# H_IGNNE#
H_STPCLK# H_INTR# H_NMI# H_SMI#
CPU_RSVD01 CPU_RSVD02 CPU_RSVD03 CPU_RSVD04 CPU_RSVD05 CPU_RSVD06 CPU_RSVD07 CPU_RSVD08 CPU_RSVD09 CPU_RSVD10
CPU_RSVD11
H_DPSLP# 18 H_CPUSLP# 7,18
U87A
J4
A[3]#
L4
A[4]#
M3
A[5]#
AA1 AA4 AB2 AA3
W6
W3 W5
W2
B25
K5
M1
N2
J1 N3 P5 P2
L1 P4 P1 R1
L2 K3
H2 K2
J3
L5 Y2
U5 R3
U4 Y5 U2 R4 T5 T3
Y4 Y1
V4 A6
A5 C4
D5 C6 B4 A3
M4
N5 T2 V3 B2 C3
A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#
REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#
A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# ADSTB[1]#
A20M# FERR# IGNNE#
STPCLK# LINT0 LINT1 SMI#
RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09] RSVD[10]
RSVD[11]
ADDR GROUP 0
ADDR GROUP 0
DEFER#
CONTROL
CONTROL
RESET#
ADDR GROUP 1
ADDR GROUP 1
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
XDP/ITP SIGNALSH CLK
XDP/ITP SIGNALSH CLK
PROCHOT#
THERMDA THERMDC
THERM
THERM
THERMTRIP#
BCLK[0] BCLK[1]
RSVD[12]
RSVD[13] RSVD[14] RSVD[15] RSVD[16] RSVD[17]
RESERVED
RESERVED
RSVD[18] RSVD[19] RSVD[20]
place cap close cpu pin
H_STPCLK# H_CPUSLP# H_IGNNE# H_INIT# H_NMI# H_SMI# H_INTR# H_A20M#
ADS# BNR# BPRI#
DRDY# DBSY#
BR0#
IERR#
INIT#
LOCK#
RS[0]# RS[1]# RS[2]#
TRDY#
HIT#
HITM#
PRDY# PREQ#
TCK
TDI TDO TMS
TRST#
DBR#
12
DY
DY
H1 E2 G5
H5 F21 E1
F1 D20
B3 H4 B1
F3 F4 G3 G2
G6 E4
AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20
D21 A24 A25
C7
A22 A21
T22
D2 F6 D3 C1 AF1 D22 C23 C24
12
C531
C531
DY
DY
SC22P50V2JN-4GP
SC22P50V2JN-4GP
B
H_ADS# H_BNR# H_BPRI#
H_DEFER# H_DRDY# H_DBSY#
H_BR0# H_IERR#
H_INIT# H_LOCK#
H_RESET#
H_RS#0 H_RS#1 H_RS#2 H_TRDY#
H_HIT# H_HITM#
ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5 ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST#
ITP_DBRESET# CPU_PROCHOT#
H_THERMDA H_THERMDC
H_THERMTRIP#
CLK_CPU_BCLK CLK_CPU_BCLK#
CPU_RSVD12
CPU_RSVD13 CPU_RSVD14 CPU_RSVD15 CPU_RSVD16 CPU_RSVD17 CPU_RSVD18 CPU_RSVD19 CPU_RSVD20
C529
C529
DY
DY
SC22P50V2JN-4GP
SC22P50V2JN-4GP
B
H_BPRI# 7 H_DEFER# 7
H_INIT# 18
H_RESET# 3,7,51
H_TRDY# 7
ITP_BPM#0 3 ITP_BPM#1 3 ITP_BPM#2 3 ITP_BPM#3 3 ITP_BPM#4 3 ITP_BPM#5 3 ITP_TCK 3 ITP_TDI 3 ITP_TDO 3 ITP_TMS 3 ITP_TRST# 3 ITP_DBRESET# 3,4,20,36
H_THERMDA 23 H_THERMDC 23
H_THERMTRIP# 23
C126 close to Pin A24 and Pin A25
1 2
DY
DY
C461
C461 SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
THESE CAPS PLACE WITHIN 1.5" FROM CPU
12
12
C550
C550
C557
C557
DY
DY
SC22P50V2JN-4GP
SC22P50V2JN-4GP
H_D#[63..0]
H_A#[31..3]
H_REQ#[4..0]
H_RS#[2..0]
H_ADS# 7,51 H_BNR# 7
H_DRDY# 7 H_DBSY# 7
H_BR0# 7
H_LOCK# 7
H_HIT# 7 H_HITM# 7
CPU_PROCHOT# 35
CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4
TP7 TPAD28TP7 TPAD28
TP44 TPAD28TP44 TPAD28 TP26 TPAD28TP26 TPAD28 TP34 TPAD28TP34 TPAD28 TP48 TPAD28TP48 TPAD28 TP41 TPAD28TP41 TPAD28 TP9 TPAD28TP9 TPAD28 TP4 TPAD28TP4 TPAD28 TP1 TPAD28TP1 TPAD28
H_THERMDAH_THERMDC
12
12
C569
C569
DY
DY
DY
DY
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
H_D#[63..0] 7
H_A#[31..3] 7
H_REQ#[4..0] 7
+1.05V_VCCP
R92
R92 56R2J-4-GP
56R2J-4-GP
1 2
H_THERMDA and H_THERMDC routing Trace width and Spacing use 10 / 10 mil
12
DY
DY
SC22P50V2JN-4GP
SC22P50V2JN-4GP
12
C599
C599
C610
C610
DY
DY
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
C581
C581
C
H_DSTBN#07 H_DSTBP#07
H_DINV#07
CPU_GTLREF0 close to Pin AD26 500 mil ( max )
+1.05V_VCCP
R57
R57 1KR2F-3-GP
1KR2F-3-GP
1 2
R54
R54 2KR2F-3-GP
2KR2F-3-GP
1 2
H_DSTBN#17 H_DSTBP#17
H_DINV#17
R378 1KR2J-1-GP
R378 1KR2J-1-GP R379 51R2F-2-GPR379 51R2F-2-GP
CPU_BSEL04 CPU_BSEL14 CPU_BSEL24
Yonah support
Change R846 to 51 ohm and Populate R843 for Yonah B0 Forward
Parker will use B0 version or later version
This resistor is needed for Yonah but not for Meorm.
C
1 2
DY
DY
1 2
H_DPRSTP#42
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14
H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1
V_CPU_GTLREF
TEST1 TEST2
CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
CPU_SEL
133
166
D
DY
DY
PWRGOOD
12
0R2J-2-GP
0R2J-2-GP
D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]#
DATA GRP 2
DATA GRP 2
D[43]# D[44]# D[45]# D[46]#
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
DATA GRP 3
DATA GRP 3
D[60]#
D[61]#
D[62]#
D[63]# DSTBN[3]# DSTBP[3]#
DINV[3]# COMP[0]
COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP#
DPWR#
SLP#
PSI#
H_DPRSTP#_2
R545 0R2-0.R545 0R2-0.
R544
R544
U87B
U87B
E22
D[0]#
F24
D[1]#
E26
D[2]#
H22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H26
D[12]#
F26
D[13]#
K22
D[14]#
H25
D[15]#
H23
DSTBN[0]#
G22
DSTBP[0]#
J26
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L25
D[20]#
L22
D[21]#
L23
D[22]#
M23
D[23]#
P25
D[24]#
P22
D[25]#
P23
D[26]#
T24
D[27]#
R24
D[28]#
L26
D[29]#
T25
D[30]#
N24
D[31]#
M24
DSTBN[1]#
N25
DSTBP[1]#
M26
DINV[1]#
AD26
GTLREF
C26
TEST1
D25
TEST2
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
1 2
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
MISC
MISC
H_SEL0 H_SEL1 H_SEL2
00
0
11
D
1
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
+1.05V_VCCP
12
R546
R546 4K7R2J-2-GP
4K7R2J-2-GP
3
H_DPRSLPVR_1
1
Q57
Q57
MMBT3904-7-F-GP
MMBT3904-7-F-GP
2
H_DPRSTP#_R 18
H_D#32
AA23
H_D#33
AB24
H_D#34
V24
H_D#35
V26
H_D#36
W25
H_D#37
U23
H_D#38
U25
H_D#39
U22
H_D#40
AB25
H_D#41
W22
H_D#42
Y23
H_D#43
AA26
H_D#44
Y26
H_D#45
Y22
H_D#46
AC26
H_D#47
AA24
H_DSTBN#2
W24
H_DSTBP#2
Y25
H_DINV#2
V23
H_D#48
AC22
H_D#49
AC23
H_D#50
AB22
H_D#51
AA21
H_D#52
AB21
H_D#53
AC25
H_D#54
AD20
H_D#55
AE22
H_D#56
AF23
H_D#57
AD24
H_D#58
AE21
H_D#59
AD21
H_D#60
AE25
H_D#61
AF25
H_D#62
AF22
H_D#63
AF26
H_DSTBN#3
AD23
H_DSTBP#3
AE24
H_DINV#3
AC20
COMP0
R26
COMP1
U26 U1 V1
E5 B5 D24 D6 D7 AE6
R49 27D4R2F-L1-GPR49 27D4R2F-L1-GP
COMP2
R51 54D9R2F-L1-GPR51 54D9R2F-L1-GP
COMP3
R540 27D4R2F-L1-GPR540 27D4R2F-L1-GP
R539 54D9R2F-L1-GPR539 54D9R2F-L1-GP
H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGOOD H_CPUSLP# H_PSI#
Resistor placed within 0.5" of CPU pin.Trace should be at least 25 mils away from any other toggling signal.Trace should be No Longer than 500 mils
H_DPRSTP# 42 H_DPSLP# 18
H_PWRGOOD 18,51 H_CPUSLP# 7,18
H_PSI# 42
CPU - 01 - Yonah - FSB
CPU - 01 - Yonah - FSB
CPU - 01 - Yonah - FSB
E
1 2
R566
R566 470R2J-2-GP
470R2J-2-GP
H_DSTBN#2 7 H_DSTBP#2 7 H_DINV#2 7
H_DSTBN#3 7 H_DSTBP#3 7 H_DINV#3 7
1 2 1 2 1 2 1 2
H_DPWR# 7
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Parker
Parker
Parker
E
H_DPRSLPVR 18,42H_RS#[2..0] 7
-1
-1
553Friday, August 03, 2007
553Friday, August 03, 2007
553Friday, August 03, 2007
of
of
of
-1
A
SSID = CPU
B
C
D
E
4 4
U87DU87D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
A26
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
3 3
2 2
1 1
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080] VSS[081]P3VSS[162]
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 AF3 AF6 AF8 AF11 AF13 AF16 AF19 AF21 AF24
Merom ( Dual Core ) All Pop Yahon ( Signal Core ) De-pop C91, 93, 123, 127, 166, 169, 191 and 193
12
12
12
C92
C92
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C193
C193
DY
DY
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C94
C94
SC10U4V3MX-GP
SC10U4V3MX-GP
12
12
C232
C232
C236
C236
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C93
C93
DY
DY
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C190
C190
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C82
C82
SC10U4V3MX-GP
SC10U4V3MX-GP
22uF 0805 X5R -> 85 degree C , Or better such As X6S and X7R
+1.05V_VCCP
12
C235
C235
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C104
C104
C127
C127
DY
DY
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
12
12
12
12
C91
C91
C105
C105
DY
DY
DY
DY
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C170
C170
C165
C165
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C216
C216
12
C75
C75
C67
C67
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Please these inside socket cavity on L8 ( North side Secondary )
12
C186
C186
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C84
C84
DY
DY
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C117
C117
DY
DY
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
12
TC7
TC7 SE220U2VDM-8GP
SE220U2VDM-8GP
12
12
12
C132
C132
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C123
C123
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C83
C83
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C211
C211
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C63
C63
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C144
C144
C191
C191
C166
C166
+VCC_CORE +VCC_CORE
U87CU87C
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
12
C169
C169
DY
DY
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C208
C208
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C142
C142
SC10U4V3MX-GP
SC10U4V3MX-GP
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
AA10 AA12 AA13 AA15 AA17 AA18 AA20
AC10 AB10 AB12 AB14 AB15 AB17 AB18
C13 C15 C17 C18
D10 D12 D14 D15 D17 D18
E10 E12 E13 E15 E17 E18 E20
F10 F12 F14 F15 F17 F18 F20 AA7 AA9
AB9
D9
E7 E9
F7 F9
VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]
VCCSENSE
VSSSENSE
VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]
VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
V6 G21 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26
AD6 AF5 AE5 AF4 AE3 AF2 AE2
AF7
AE7
H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6
VCCSENSE
VSSSENSE
VCCSENSE
VSSSENSE
+1.05V_VCCP
H_VID[6..0] 42
VCCSENSE 42
VSSSENSE 42
1 2
R473
R473 100R2F-L1-GP-U
100R2F-L1-GP-U
1 2
R475
R475 100R2F-L1-GP-U
100R2F-L1-GP-U
<Variant Name>
<Variant Name>
<Variant Name>
+1.5V_RUN
12
C438
C438
Place R50 and R51 near CPU Routing VCC_SENSE and VSS_SENSE at
27.4 ohms,50 mils spacing,1 inch.
+VCC_CORE
12
C437
C437
SC10U4V3MX-GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SC10U4V3MX-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet of
CPU - 02 - Yonah - POWER
CPU - 02 - Yonah - POWER
CPU - 02 - Yonah - POWER
Parker
Parker
Parker
653Tuesday, August 14, 2007
653Tuesday, August 14, 2007
653Tuesday, August 14, 2007
of
E
of
-1
-1
-1
A
+1.8V_RUN_NB_IOPLLVDD18
200mA
+1.8V_RUN
4 4
1 2
L20
L20 BLM18BB221SN1D-GP
BLM18BB221SN1D-GP
+1.8V_RUN_NB_IOPLLVDD18
12
C168
C168 SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
Place close pin AA35
+1.2V_RUN_NB_IOPLLVDD12
+1.2V_RUN
200mA
1 2
L13
L13
BLM18BB221SN1D-GP
BLM18BB221SN1D-GP
+1.2V_RUN_NB_IOPLLVDD12
12
C133
C133 SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
Place close pin V35
+1.05V_VCCP_NB_CPU_VREF
3 3
2 2
+1.05V_VCCP
12
R84
R84
61D9R2F-GP
61D9R2F-GP
R76
R76
127R2F-GP
127R2F-GP
width/space: 10/10
+1.05V_VCCP_NB_CPU_VREF
12
12
C43
C43
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
Place close pin A32
12
C44
C44
SC220P50V2JN-3GP
SC220P50V2JN-3GP
+1.8V_RUN
NB_PWRGD35,48,51
+1.05V_VCCP
+1.05V_VCCP
SD
Q18
Q18
2N7002-7F-GP
2N7002-7F-GP
G
1 2
R99 0R2J-2-GP
R99 0R2J-2-GP
R108
R108 4K7R2J-2-GP
4K7R2J-2-GP
H_CPUSLP#5,18
R93
R93 2K2R2J-2-GP
2K2R2J-2-GP
DY
DY
NB_H_CPUSLP#_1
12
NB_H_CPUSLP#_2
12
B
1
2
312
H_RS#[2..0]
H_D#[63..0]
H_A#[31..3]
H_REQ#[4..0]
12
R96
R96 1KR2J-1-GP
1KR2J-1-GP
Q11
Q11 MMBT3904-7-F-GP
MMBT3904-7-F-GP
3
Q10
Q10 MMBT3904-7-F-GP
MMBT3904-7-F-GP
PM_SUS_STAT#20
H_RS#[2..0] 5
H_D#[63..0] 5
H_A#[31..3] 5
H_REQ#[4..0] 5
+1.8V_SUS
DY
DY
1 2
PLTRST#18,27,31,32,35,45,46,51
+3.3V_RUN_NB
12
R170
R170 4K7R2J-2-GP
4K7R2J-2-GP
R405 0R2-0.R405 0R2-0.
+1.05V_VCCP
R82
R82 20KR2J-L2-GP
20KR2J-L2-GP
C
H_ADSTB#05
TP20TPAD28 TP20TPAD28 TP21TPAD28 TP21TPAD28
H_ADSTB#15
H_ADS#5,51 H_BNR#5 H_BPRI#5 H_DEFER#5 H_DRDY#5 H_DBSY#5 H_LOCK#5 H_RESET#3,5,51
H_BR0#5 H_TRDY#5 H_HIT#5 H_HITM#5 H_DPWR#5
12
1 2
R81 53D6R3F-2-GPR81 53D6R3F-2-GP
1 2
R65 21R3F-GPR65 21R3F-GP
NB_THERMDP23
NB_THERMDN23
PM_SUS_STAT#
PLTRST#_NB
NB_POWERGOOD NB_CPU_COMP_P NB_CPU_COMP_N
NB_THERMDP
NB_THERMDN
+1.8V_RUN_NB_IOPLLVDD18 +1.2V_RUN_NB_IOPLLVDD12
NB_H_CPUSLP# +1.05V_VCCP_NB_CPU_VREF NB_TEST_MODE
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15
H_A#16 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_ADSTB#0
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_ADSTB#1
H_ADS# H_BNR# H_BPRI# H_DEFER# H_DRDY# H_DBSY# H_LOCK# H_RESET# H_RS#2 H_RS#1 H_RS#0 H_BR0# H_TRDY# H_HIT# H_HITM# H_DPWR#
U91A
U91A
M42
CPU_A3
K42
CPU_A4
M44
CPU_A5
T39
CPU_A6
M38
CPU_A7
P42
CPU_A8
T43
CPU_A9
P38
CPU_A10
P44
CPU_A11
P36
CPU_A12
W39
CPU_A13
V40
CPU_A14
W42
CPU_A15
V42
CPU_A16
P39
CPU_REQ0
M39
CPU_REQ1
K44
CPU_REQ2
H42
CPU_REQ3
K40
CPU_REQ4
T42
CPU_ADSTB0#
AC39
CPU_A17
W43
CPU_A18
V44
CPU_A19
V36
CPU_A20
AA40
CPU_A21
AC43
CPU_A22
V38
CPU_A23
AA42
CPU_A24
AA38
CPU_A25
AC42
CPU_A26
AD36
CPU_A27
AD38
CPU_A28
AA36
CPU_A29
AD42
CPU_A30
AD40
CPU_A31
AD44
CPU_A32
AD43
CPU_A33
AA44
CPU_ADSTB1
U46
CPU_RESERVED
R46
CPU_ADS
M47
CPU_BNR
H44
CPU_BPRI
K46
CPU_DEFER
P45
CPU_DRDY
M46
CPU_DBSY
M45
CPU_LOCK
K25
CPU_CPURST
L45
CPU_RS2
R47
CPU_RS1
L47
CPU_RS0
T45
CPU_BR0
R45
CPU_TRDY
K47
CPU_HIT
P46
CPU_HITM
T47
CPU_DPWR
AT9
SUS_STAT#
D10
SYSRESET#
F10
POWERGOOD
B32
CPU_COMP_P
A31
CPU_COMP_N
AT5
THERMALDIODE_P
AT4
THERMALDIODE_N
AA35
IOPLLVDD18
V35
IOPLLVDD12
W35
IOPLLVSS
C17
CPU_SLP#
A32
CPU_VREF
A20
TESTMODE
RS600ME-GP
RS600ME-GP
1 OF 7
1 OF 7
D
CPU_D10 CPU_D11
ADDR GROUP 0
ADDR GROUP 0
ADDR GROUP 1CONTROLMISC
ADDR GROUP 1CONTROLMISC
CPU_D12 CPU_D13 CPU_D14 CPU_D15
CPU_DBI0 CPU_DSTB0N CPU_DSTB0P
CPU_D16 CPU_D17 CPU_D18 CPU_D19 CPU_D20 CPU_D21 CPU_D22 CPU_D23 CPU_D24 CPU_D25 CPU_D26 CPU_D27 CPU_D28 CPU_D29 CPU_D30 CPU_D31
CPU_DBI1 CPU_DSTB1N CPU_DSTB1P
CPU_D32 CPU_D33 CPU_D34 CPU_D35 CPU_D36 CPU_D37 CPU_D38
P-4 AGTL+I/F
P-4 AGTL+I/F
CPU_D39 CPU_D40 CPU_D41 CPU_D42 CPU_D43 CPU_D44 CPU_D45 CPU_D46 CPU_D47
CPU_DBI2 CPU_DSTB2N CPU_DSTB2P
CPU_D48 CPU_D49 CPU_D50 CPU_D51 CPU_D52 CPU_D53 CPU_D54 CPU_D55 CPU_D56 CPU_D57 CPU_D58 CPU_D59 CPU_D60 CPU_D61 CPU_D62
DATA GROUP 3 DATA GROUP 2 DATA GROUP 1 DATA GROUP 0
DATA GROUP 3 DATA GROUP 2 DATA GROUP 1 DATA GROUP 0
CPU_D63
CPU_DBI3 CPU_DSTB3N CPU_DSTB3P
CPU_D0 CPU_D1 CPU_D2 CPU_D3 CPU_D4 CPU_D5 CPU_D6 CPU_D7 CPU_D8 CPU_D9
H46 G47 K45 G45 H45 G46 F45 F47 C46 A44 D46 C45 D47 B44 A43 B45 E47 E46 E45
E40 F44 E42 F40 H40 D44 D42 D40 E38 F36 E36 J34 F34 H38 D32 E34 K36 J38 J36
J32 F32 K32 D29 M29 K30 F30 E30 M27 F27 K27 D25 E27 J27 J25 F25 J30 H29 F29
C37 B40 B43 C42 C43 A42 B38 A41 C40 A38 C36 B36 A37 C38 B34 C34 A36 B41 C41
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14
H_D#15 H_DINV#0 H_DSTBN#0 H_DSTBP#0
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31 H_DINV#1 H_DSTBN#1 H_DSTBP#1
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47 H_DINV#2 H_DSTBN#2 H_DSTBP#2
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63 H_DINV#3 H_DSTBN#3 H_DSTBP#3
SSID = N.B
H_DINV#0 5 H_DSTBN#0 5 H_DSTBP#0 5
H_DINV#1 5 H_DSTBN#1 5 H_DSTBP#1 5
H_DINV#2 5 H_DSTBN#2 5 H_DSTBP#2 5
H_DINV#3 5 H_DSTBN#3 5 H_DSTBP#3 5
E
NB_TEST_MODE
1 1
+3.3V_RUN_NB
NB_TEST_MODE
12
DY
DY
R52 4K7R2J-2-GP
R52 4K7R2J-2-GP
12
R56 4K7R2J-2-GPR56 4K7R2J-2-GP
TESTMODE RS600MODE
HIGH
TEST MODE
LOW NORMAL MODE
A
NB THERMAL DIODE
CAP close to NB pin
NB_THERMDP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
NB_THERMDN
C239
C239
DY
DY
12
B
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
C
D
Date: Sheet
RS600ME-AGTL(1/5)
RS600ME-AGTL(1/5)
RS600ME-AGTL(1/5)
Parker
Parker
Parker
753Friday, August 03, 2007
753Friday, August 03, 2007
753Friday, August 03, 2007
E
-1
-1
of
of
of
-1
A
B
C
D
E
SSID = N.B
4 4
2 OF 7
2 OF 7
U91B
U91B
C3
GFX_RX0P
C2
SDVO_INT+38 SDVO_INT-38
3 3
PCIE_RX0+27 PCIE_RX0-27
PCIE 0 PCIE 1
2 2
PCIE 2 PCIE 3
LOM BCM5756ME MINI WWAN MINI WLAN EXPRESS CARD
PCIE_RX1+32 PCIE_RX1-32 PCIE_RX2+32 PCIE_RX2-32 PCIE_RX3+31 PCIE_RX3-31
PCIE_SB_OUT318 PCIE_SB_OUT#318 PCIE_SB_OUT218 PCIE_SB_OUT#218
PCIE_SB_OUT118 PCIE_SB_OUT#118 PCIE_SB_OUT018 PCIE_SB_OUT#018
SDVO_INT+ SDVO_INT-
PCIE_RX0+ PCIE_RX0­PCIE_RX1+ PCIE_RX1­PCIE_RX2+ PCIE_RX2­PCIE_RX3+ PCIE_RX3-
PCIE_SB_OUT3 PCIE_SB_OUT#3 PCIE_SB_OUT2 PCIE_SB_OUT#2
PCIE_SB_OUT1 PCIE_SB_OUT#1 PCIE_SB_OUT0 PCIE_SB_OUT#0
CLK_NBSRC4 CLK_NBSRC#4 CLK_NBLINK4 CLK_NBLINK#4
CLK_NBSRC CLK_NBSRC# CLK_NBLINK CLK_NBLINK#
GFX_RX0N
H5
GFX_RX1P
H4
GFX_RX1N
K8
GFX_RX2P
K6
GFX_RX2N
M8
GFX_RX3P
M6
GFX_RX3N
M5
GFX_RX4P
M4
GFX_RX4N
P9
GFX_RX5P
P8
GFX_RX5N
P4
GFX_RX6P
P5
GFX_RX6N
T6
GFX_RX7P
T5
GFX_RX7N
T9
GFX_RX8P
T10
GFX_RX8N
V5
GFX_RX9P
V6
GFX_RX9N
V9
GFX_RX10P
V10
GFX_RX10N
AA6
GFX_RX11P
AA5
GFX_RX11N
AA9
GFX_RX12P
AA10
GFX_RX12N
AC5
GFX_RX13P
AC6
GFX_RX13N
AC9
GFX_RX14P
AC10
GFX_RX14N
AE6
GFX_RX15P
AE5
GFX_RX15N
AK6
GPP_RX0P
AK5
GPP_RX0N
AM2
GPP_RX1P
AM1
GPP_RX1N
AJ2
GPP_RX2P
AJ1
GPP_RX2N
AG5
GPP_RX3P
AG6
GPP_RX3N
AK9
SB_RX3P/GPP_RX5P
AK10
SB_RX3N/GPP_RX5N
AM5
SB_RX2P/GPP_RX4P
AM6
SB_RX2N/GPP_RX4N
AM9
SB_RX1P
AM10
SB_RX1N
AU3
SB_RX0P
AV3
SB_RX0N
A5
GFX_REFCLKP
B4
GFX_REFCLKN
A6
GPPSB_REFCLKP
B6
GPPSB_REFCLKN
RS600ME-GP
RS600ME-GP
PCIE CLK
PCIE CLK
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P
GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P
PCIE/F
PCIE/F
GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX3P/GPP_TX5P
SB_TX3N/GPP_TX5N
SB_TX2P/GPP_TX4P
SB_TX2N/GPP_TX4N
SB_TX1P SB_TX1N SB_TX0P SB_TX0N
PCE_CALI
PCE_CALRN
PCE_CALRP
SDVO_R+_C SDVO_R+
D2 E1
SDVO_G+_C
F2 F1
SDVO_B+_C
G2 G1
SDVO_CLK+_C
H2 K1 L2 L1 M2 M1 P2 R1 T2 T1 U2 U1 V2 W1 Y2 Y1 AA2 AA1 AB2 AC1 AD2 AD1 AE2 AE1 AF2 AG1
PCIE_TX0+_C
AG9
PCIE_TX0-_C
AG10
PCIE_TX1+_C
AK2
PCIE_TX1-_C
AL1
PCIE_TX2+_C
AH2
PCIE_TX2-_C
AH1
PCIE_TX3+_C
AE9
PCIE_TX3-_C
AE10
PCIE_NB_OUT3_C
AN2
PCIE_NB_OUT#3_C
AN1 AP2
PCIE_NB_OUT#2_C
AT1
PCIE_NB_OUT1_C
AU2
PCIE_NB_OUT#1_C
AU1
PCIE_NB_OUT0_C
AV1
PCIE_NB_OUT#0_C
AV2
NB_PCIE_CALI
BA3
NB_PCIE_CALRN
BA2
NB_PCIE_CALRP
BA1
1 2
C467 SCD1U10V2KX-4GPC467 SCD1U10V2KX-4GP
1 2
C472 SCD1U10V2KX-4GPC472 SCD1U10V2KX-4GP
1 2
C477 SCD1U10V2KX-4GPC477 SCD1U10V2KX-4GP
1 2
C484 SCD1U10V2KX-4GPC484 SCD1U10V2KX-4GP
1 2
C490 SCD1U10V2KX-4GPC490 SCD1U10V2KX-4GP
1 2
C493 SCD1U10V2KX-4GPC493 SCD1U10V2KX-4GP
1 2
C503 SCD1U10V2KX-4GPC503 SCD1U10V2KX-4GP
1 2
C509 SCD1U10V2KX-4GPC509 SCD1U10V2KX-4GP
1 2
C197 SCD1U10V2KX-4GPC197 SCD1U10V2KX-4GP
1 2
C205 SCD1U10V2KX-4GPC205 SCD1U10V2KX-4GP
1 2
C542 SCD1U10V2KX-4GPC542 SCD1U10V2KX-4GP
1 2
C545 SCD1U10V2KX-4GPC545 SCD1U10V2KX-4GP
1 2
C188 SCD1U10V2KX-4GPC188 SCD1U10V2KX-4GP
1 2
C187 SCD1U10V2KX-4GPC187 SCD1U10V2KX-4GP
1 2
C185 SCD1U10V2KX-4GPC185 SCD1U10V2KX-4GP
1 2
C184 SCD1U10V2KX-4GPC184 SCD1U10V2KX-4GP
1 2
C543 SCD1U10V2KX-4GPC543 SCD1U10V2KX-4GP
1 2
C549 SCD1U10V2KX-4GPC549 SCD1U10V2KX-4GP
1 2
C238 SCD1U10V2KX-4GPC238 SCD1U10V2KX-4GP
1 2
C244 SCD1U10V2KX-4GPC244 SCD1U10V2KX-4GP
1 2
C259 SCD1U10V2KX-4GPC259 SCD1U10V2KX-4GP
1 2
C253 SCD1U10V2KX-4GPC253 SCD1U10V2KX-4GP
1 2
C568 SCD1U10V2KX-4GPC568 SCD1U10V2KX-4GP
1 2
C556 SCD1U10V2KX-4GPC556 SCD1U10V2KX-4GP
1 2
R189 1K47R2F-GPR189 1K47R2F-GP
1 2
R180 2KR2F-3-GPR180 2KR2F-3-GP
1 2
R184 562R2F-GPR184 562R2F-GP
+1.2V_RUN
SDVO_R-SDVO_R-_C SDVO_G+ SDVO_G-SDVO_G-_C SDVO_B+ SDVO_B-SDVO_B-_C SDVO_CLK+ SDVO_CLK-SDVO_CLK-_C
PCIE_TX0+ PCIE_TX0­PCIE_TX1+ PCIE_TX1­PCIE_TX2+ PCIE_TX2­PCIE_TX3+ PCIE_TX3-
PCIE_NB_OUT3 PCIE_NB_OUT#3 PCIE_NB_OUT2PCIE_NB_OUT2_C PCIE_NB_OUT#2
PCIE_NB_OUT1 PCIE_NB_OUT#1 PCIE_NB_OUT0 PCIE_NB_OUT#0
SDVO_R+ 38 SDVO_R- 38 SDVO_G+ 38 SDVO_G- 38 SDVO_B+ 38 SDVO_B- 38 SDVO_CLK+ 38 SDVO_CLK- 38
PCIE_TX0+ 27
PCIE_TX0- 27
PCIE_TX1+ 32
PCIE_TX1- 32
PCIE_TX2+ 32
PCIE_TX2- 32
PCIE_TX3+ 31
PCIE_TX3- 31 PCIE_NB_OUT3 18
PCIE_NB_OUT#3 18 PCIE_NB_OUT2 18 PCIE_NB_OUT#2 18
PCIE_NB_OUT1 18 PCIE_NB_OUT#1 18 PCIE_NB_OUT0 18 PCIE_NB_OUT#0 18
1 1
A
B
C
D
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
RS600ME-ALINK/PCIE-2(2/5)
RS600ME-ALINK/PCIE-2(2/5)
RS600ME-ALINK/PCIE-2(2/5)
Parker
Parker
Parker
853Friday, August 03, 2007
853Friday, August 03, 2007
853Friday, August 03, 2007
of
of
E
of
-1
-1
-1
A
B
C
D
E
SSID = N.B
DDR_A_MA[0..12]
4 4
DDR_A_MA1312,14
DDR_A_BS[0..2]12,14
DDR_A_DM[0..7]12
DDR_A_DQS[0..7]12
3 3
DDR_A_DQS#[0..7]12
DDR_A_CLK_DDR#112 DDR_A_CLK_DDR112 DDR_A_CLK_DDR#012 DDR_A_CLK_DDR012
2 2
TP155TPAD28 TP155TPAD28
DDR_A_BS[0..2]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
TP32TPAD28 TP32TPAD28 TP33TPAD28 TP33TPAD28 TP53TPAD28 TP53TPAD28
TP58TPAD28 TP58TPAD28 TP39TPAD28 TP39TPAD28 TP38TPAD28 TP38TPAD28 TP40TPAD28 TP40TPAD28 TP45TPAD28 TP45TPAD28
DDR_A_CKE012,14
TP165TPAD28 TP165TPAD28 TP161TPAD28 TP161TPAD28 TP55TPAD28 TP55TPAD28
DDR_A_CS#012,14
TP130TPAD28 TP130TPAD28 TP135TPAD28 TP135TPAD28 TP123TPAD28 TP123TPAD28
DDR_A_ODT012,14
TP124TPAD28 TP124TPAD28 TP131TPAD28 TP131TPAD28 TP122TPAD28 TP122TPAD28
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14
DDR_A_BS0 DDR_A_BS1 DDR_A_BS2
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_CLK_DDR#1 DDR_A_CLK_DDR1 DDR_A_CLK_DDR#0 DDR_A_CLK_DDR0
M_A_CLK_DDR#2 M_A_CLK_DDR2 M_A_CLK_DDR#3 M_A_CLK_DDR3 M_A_CLK_DDR#4 M_A_CLK_DDR4 M_A_CLK_DDR#5 M_A_CLK_DDR5
DDR_A_CKE0 DDR_A_CKE1 DDR_A_CKE2 DDR_A_CKE3
DDR_A_CS#0 DDR_A_CS#1 DDR_A_CS#2 DDR_A_CS#3
DDR_A_ODT1 DDR_A_ODT2 DDR_A_ODT3
BE42 BG36
BE34 BE33 BE32
BG33 BG32 BE46 BE31
AV45
BD46 BD47 BE30
BG12 BE17 AN45 AH47 AD45
BE12 BE18 AM46 AG47 AC46
AM47 AH46 AC47
BB29 BB30 AY10
AV44 AV43 BD29 BD30 AY12
AW12
AY43 AY44
BG28 BG29 BE28
BA46 AV46 BA47 AU45
AY45 AU47 AV47 AT47
BF36
BF34 BF33
BF31 BF30
BD2 BE6
W45 BE2
BF7
W46 BD3
BG7 BF12 BF18
W47
AY8
BF29
3 OF 7
3 OF 7
U91C
U91C
MEMA_A0 MEMA_A1 MEMA_A2 MEMA_A3 MEMA_A4 MEMA_A5 MEMA_A6 MEMA_A7 MEMA_A8 MEMA_A9 MEMA_A10 MEMA_A11 MEMA_A12 MEMA_A13 MEMA_A14
MEMA_BA0 MEMA_BA1 MEMA_BA2
MEMA_DM0 MEMA_DM1 MEMA_DM2 MEMA_DM3 MEMA_DM4 MEMA_DM5 MEMA_DM6 MEMA_DM7
MEMA_DQS0P MEMA_DQS1P MEMA_DQS2P MEMA_DQS3P MEMA_DQS4P MEMA_DQS5P MEMA_DQS6P MEMA_DQS7P
MEMA_DQS0N MEMA_DQS1N MEMA_DQS2N MEMA_DQS3N MEMA_DQS4N MEMA_DQS5N MEMA_DQS6N MEMA_DQS7N
MEMA_CK0N MEMA_CK0P MEMA_CK1N MEMA_CK1P MEMA_CK2N MEMA_CK2P MEMA_CK3N MEMA_CK3P MEMA_CK4N MEMA_CK4P MEMA_CK5N MEMA_CK5P
MEMA_CKE0 MEMA_CKE1 MEMA_CKE2 MEMA_CKE3
MEMA_CS0# MEMA_CS1# MEMA_CS2# MEMA_CS3#
MEMA_ODT0 MEMA_ODT1 MEMA_ODT2 MEMA_ODT3
RS600ME-GP
RS600ME-GP
MEMA_DQ0 MEMA_DQ1 MEMA_DQ2 MEMA_DQ3 MEMA_DQ4 MEMA_DQ5 MEMA_DQ6 MEMA_DQ7 MEMA_DQ8
MEMA_DQ9 MEMA_DQ10 MEMA_DQ11 MEMA_DQ12 MEMA_DQ13 MEMA_DQ14 MEMA_DQ15 MEMA_DQ16 MEMA_DQ17 MEMA_DQ18 MEMA_DQ19 MEMA_DQ20 MEMA_DQ21 MEMA_DQ22 MEMA_DQ23 MEMA_DQ24 MEMA_DQ25 MEMA_DQ26 MEMA_DQ27 MEMA_DQ28 MEMA_DQ29 MEMA_DQ30 MEMA_DQ31 MEMA_DQ32 MEMA_DQ33 MEMA_DQ34 MEMA_DQ35 MEMA_DQ36 MEMA_DQ37 MEMA_DQ38 MEMA_DQ39 MEMA_DQ40 MEMA_DQ41 MEMA_DQ42
MEM_A I/F
MEM_A I/F
MEMA_DQ43 MEMA_DQ44 MEMA_DQ45 MEMA_DQ46 MEMA_DQ47 MEMA_DQ48 MEMA_DQ49 MEMA_DQ50 MEMA_DQ51 MEMA_DQ52 MEMA_DQ53 MEMA_DQ54 MEMA_DQ55 MEMA_DQ56 MEMA_DQ57 MEMA_DQ58 MEMA_DQ59 MEMA_DQ60 MEMA_DQ61 MEMA_DQ62 MEMA_DQ63
MEMA_WE# MEMA_CAS# MEMA_RAS#
MEM_VREF
BC3 BD1 BF4 BE4 BC2 BC1 BE3 BF3 BF5 BG6 BE8 BG10 BG5 BE5 BE7 BF8 BE10 BE11 BF15 BE15 BF10 BG11 BE14 BG15 BG17 BF17 BF19 BE20 BG16 BE16 BG19 BE19 AP45 AN46 AL45 AK46 AP46 AN47 AL47 AL46 AJ46 AJ45 AG45 AF45 AK45 AJ47 AG46 AF46 AE46 AD47 AB45 AA47 AE47 AE45 AC45 AB46 AA45 Y46 V46 U47 AA46 Y47 V45 U45
BA45 AY46 BC47 BG44
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7
DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14
DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_WE# DDR_A_CAS# DDR_A_RAS#DDR_A_ODT0
12
C616
C616 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DDR_A_D[0..63]
DDR_A_WE# 12,14 DDR_A_CAS# 12,14 DDR_A_RAS# 12,14
V_DDR_NB_REF
DDR_A_D[0..63] 12DDR_A_MA[0..12]12,14
4 OF 7
4 OF 7
U91D
DDR_B_MA[0..14]15
DDR_B_BS[0..2]15
DDR_B_DM[0..7]15
DDR_B_DQS[0..7]15
DDR_B_DQS#[0..7]15
DDR_B_CKE[0..1]15
DDR_B_CS#[0..1]15
DDR_B_ODT[0..1]15
DDR_B_MA[0..14]
DDR_B_BS[0..2]
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
M_B_CLK_DDR#115 M_B_CLK_DDR115 M_B_CLK_DDR#015 M_B_CLK_DDR015
TP54TPAD28 TP54TPAD28 TP52TPAD28 TP52TPAD28 TP36TPAD28 TP36TPAD28 TP47TPAD28 TP47TPAD28 TP50TPAD28 TP50TPAD28 TP51TPAD28 TP51TPAD28 TP59TPAD28 TP59TPAD28 TP156TPAD28 TP156TPAD28
DDR_B_CKE[0..1]
TP164TPAD28 TP164TPAD28 TP157TPAD28 TP157TPAD28
DDR_B_CS#[0..1]
TP60TPAD28 TP60TPAD28 TP158TPAD28 TP158TPAD28
DDR_B_ODT[0..1]
TP134TPAD28 TP134TPAD28 TP138TPAD28 TP138TPAD28
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14
DDR_B_BS0 DDR_B_BS1 DDR_B_BS2
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
M_B_CLK_DDR#1 M_B_CLK_DDR1 M_B_CLK_DDR#0 M_B_CLK_DDR0 M_B_CLK_DDR#2 M_B_CLK_DDR2 M_B_CLK_DDR#3 M_B_CLK_DDR3 M_B_CLK_DDR#4 M_B_CLK_DDR4 M_B_CLK_DDR#5 M_B_CLK_DDR5
DDR_B_CKE0 DDR_B_CKE1 DDR_B_CKE2 DDR_B_CKE3
DDR_B_CS#0 DDR_B_CS#1 DDR_B_CS#2 DDR_B_CS#3
DDR_B_ODT0 DDR_B_ODT1 DDR_B_ODT2 DDR_B_ODT3
BE36 BG31 BE29 BE27
BF27 BG27 BE26 BE25
BF26
BF25 BG37 BG25 BE24 BG42 BE23
BG38 BE37 BG24
AY4 AV14 BB19 AT24 BB32
AW38
AT38 AM42
AY6
AW16
BD19
AW27
BD32 BC38 AP44 AK40
AY5 AV16 BD21
AW25
BD34 BD40 AT44 AK42
AV29 AT30 BC10 BD10 BB43 BB44 AT25 AV25
BC8
BD8 BD44 BE44
BF23 BG23 BE22
BF22
BF40
BF41 BE38
BF45 BC46
BC45 BB47 BB45
U91D
MEMB_A0 MEMB_A1 MEMB_A2 MEMB_A3 MEMB_A4 MEMB_A5 MEMB_A6 MEMB_A7 MEMB_A8 MEMB_A9 MEMB_A10 MEMB_A11 MEMB_A12 MEMB_A13 MEMB_A14
MEMB_BA0 MEMB_BA1 MEMB_BA2
MEMB_DM0 MEMB_DM1 MEMB_DM2 MEMB_DM3 MEMB_DM4 MEMB_DM5 MEMB_DM6 MEMB_DM7
MEMB_DQS0P MEMB_DQS1P MEMB_DQS2P MEMB_DQS3P MEMB_DQS4P MEMB_DQS5P MEMB_DQS6P MEMB_DQS7P
MEMB_DQS0N MEMB_DQS1N MEMB_DQS2N MEMB_DQS3N MEMB_DQS4N MEMB_DQS5N MEMB_DQS6N MEMB_DQS7N
MEMB_CK0N MEMB_CK0P MEMB_CK1N MEMB_CK1P MEMB_CK2N MEMB_CK2P MEMB_CK3N MEMB_CK3P MEMB_CK4N MEMB_CK4P MEMB_CK5N MEMB_CK5P
MEMB_CKE0 MEMB_CKE1 MEMB_CKE2 MEMB_CKE3
MEMB_CS0# MEMB_CS1# MEMB_CS2# MEMB_CS3#
MEMB_ODT0 MEMB_ODT1 MEMB_ODT2 MEMB_ODT3
RS600ME-GP
RS600ME-GP
MEMB_DQ0 MEMB_DQ1 MEMB_DQ2 MEMB_DQ3 MEMB_DQ4 MEMB_DQ5 MEMB_DQ6 MEMB_DQ7 MEMB_DQ8
MEMB_DQ9 MEMB_DQ10 MEMB_DQ11 MEMB_DQ12 MEMB_DQ13 MEMB_DQ14 MEMB_DQ15 MEMB_DQ16 MEMB_DQ17 MEMB_DQ18 MEMB_DQ19 MEMB_DQ20 MEMB_DQ21 MEMB_DQ22 MEMB_DQ23 MEMB_DQ24 MEMB_DQ25 MEMB_DQ26 MEMB_DQ27 MEMB_DQ28 MEMB_DQ29 MEMB_DQ30 MEMB_DQ31 MEMB_DQ32 MEMB_DQ33 MEMB_DQ34 MEMB_DQ35 MEMB_DQ36 MEMB_DQ37 MEMB_DQ38 MEMB_DQ39
MEM_B I/F
MEM_B I/F
MEMB_DQ40 MEMB_DQ41 MEMB_DQ42 MEMB_DQ43 MEMB_DQ44 MEMB_DQ45 MEMB_DQ46 MEMB_DQ47 MEMB_DQ48 MEMB_DQ49 MEMB_DQ50 MEMB_DQ51 MEMB_DQ52 MEMB_DQ53 MEMB_DQ54 MEMB_DQ55 MEMB_DQ56 MEMB_DQ57 MEMB_DQ58 MEMB_DQ59 MEMB_DQ60 MEMB_DQ61 MEMB_DQ62 MEMB_DQ63
MEMB_WE# MEMB_CAS# MEMB_RAS#
MEM_COMPN MEM_COMPP
AV5 AV6 BC6 BD6 AT8 AV4 BB4 AV9 BC14 AY14 BD18 BC16 BB14 BD12 BB16 BB18 AT18 AW19 AW23 AY24 AY18 AV19 BB21 AY21 BB23 AV23 BD27 BB25 BC23 BD24 BC25 BB27 AW30 AV32 AW34 BB36 AY29 AT32 BB34 AY32 BD38 AY36 AY38 BC40 BB38 BC36 BB40 BD42 AV40 AT40 AP40 AT39 AY40 AV39 AT42 AP42 AM38 AK44 AJ42 AG44 AK36 AM43 AM39 AJ43
BE40 BG41 BF38 AT45 AT46
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7
DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14
DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63 DDR_B_WE# DDR_B_CAS# DDR_B_RAS# DDR_COMPN DDR_COMPP
DDR_B_D[0..63]
DDR_B_WE# 15 DDR_B_CAS# 15 DDR_B_RAS# 15
1 2
R492 40D2R2F-GPR492 40D2R2F-GP
1 2
R485 40D2R2F-GPR485 40D2R2F-GP
DDR_B_D[0..63] 15
+1.8V_SUS
1 1
A
B
C
D
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet of
RS600ME-MEMORY I/F (3/5)
RS600ME-MEMORY I/F (3/5)
RS600ME-MEMORY I/F (3/5)
Parker
Parker
Parker
953Tuesday, August 14, 2007
953Tuesday, August 14, 2007
953Tuesday, August 14, 2007
of
E
of
-1
-1
-1
A
B
C
D
E
SSID = N.B
4 4
3 3
FROM DVI CONN.
hot-plug detect. need used it or detect by KBC
NB_TMDS_HPD38
SDVO_CTRLDATA38
2 2
R83 0R2-0.R83 0R2-0.
R742
R742 10KR2J-3-GP
10KR2J-3-GP
NB 3.3V are independent
+3.3V_RUN_NB
1500mA
1 2
BLM18PG181SN-3GP
BLM18PG181SN-3GP
1500mA
1 2
BLM18PG181SN-3GP
BLM18PG181SN-3GP
+1.8V_RUN
200mA
1 2
L4
L4 BLM18BB221SN1D-GP
BLM18BB221SN1D-GP
200mA
1 2
L12
L12 BLM18BB221SN1D-GP
BLM18BB221SN1D-GP
1500mA
1 2
L14
L14
BLM18PG181SN-3GP
BLM18PG181SN-3GP
200mA
1 2
L3 BLM18BB221SN1D-GPL3 BLM18BB221SN1D-GP
1 2
L8 BLM18BB221SN1D-GPL8 BLM18BB221SN1D-GP
200mA
12
C57
C57 SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
12
12
R94
R94
150R2F-1-GP
150R2F-1-GP
1 2
NB_RED16,38 NB_GREEN16,38 NB_BLUE16,38
+1.2V_RUN
+1.8V_RUN +1.2V_RUN
12
L10
L10
L9
L9
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
12
R102
R102
R109
R109
150R2F-1-GP
150R2F-1-GP
R31 0R2-0.R31 0R2-0.
NB_VSYNC16 NB_HSYNC16
150R2F-1-GP
150R2F-1-GP
PUT AT LEAST TWO VIAS CLOSE TO VDDR3 TWO BALLS FOR POWER DELIVERY
+3.3V_RUN_NB_VDDR33
12
C66
C66 SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
+3.3V_RUN_NB_AVDD
12
C65
C65 SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
+1.8V_RUN_NB_AVDDQ
12
C49
C49 SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
+1.8V_RUN_NB_AVDDDI
12
C88
C88 SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
+1.2V_RUN_NB_VDDPLL_PCIE
12
C124
C124 SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
+1.8V_RUN_NB_PLLVDD18 +1.2V_RUN_NB_PLLVDD12
12
C35
C35
12
1 2
R85 715R3-GPR85 715R3-GP
CLK_NB_14M4 CLK_NB_FSB4 CLK_NB_FSB#4
12
C55
C55 SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
NB_TMDS_HPD_R NB_SDVO_CTRLDATA
NB_DAC_RSET NB_RED
NB_GREEN NB_BLUE
CLK_NB_14M CLK_NB_FSB CLK_NB_FSB#
A18 B18
A17 B17
M23 N23
A23
A24
B19
A19
M10
P13 P12
V12 T12 T13
A14 A12
A11 B26
B12 B23
B24 A25
D19
F19
B11
J19
A7 B7
U91E
U91E
RS600ME-GP
RS600ME-GP
5 OF 7
5 OF 7
VDDR3_1 VDDR3_2
AVDD_1 AVDD_2
AVSSN_1 AVSSN_2
AVDDQ
AVSSQ
AVDDDI
AVSSDI VDDPLL_PCIE_1
VDDPLL_PCIE_2 VDDPLL_PCIE_3
VSSPLL_PCIE_1 VSSPLL_PCIE_2 VSSPLL_PCIE_3
PLLVDD18 PLLVDD12
PLLVSS TMDS_HPD
DDC_DATA DAC_VSYNC
DAC_HSYNC DAC_RSET RED
GREEN BLUE
OSCIN CPU_CLKP CPU_CLKN
DAC
DAC
CRT
CRT
CLK
CLK
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_UN TXCLK_UP TXCLK_LN
TXCLK_LP
LVDS I/F
LVDS I/F
VDDLT33_1 VDDLT33_2
VDDLT18_1 VDDLT18_2
VSSLT_1 VSSLT_2 VSSLT_3 VSSLT_4
LTPVDD18
LTPVSS18
LVDS_DIGON
LVDS_BLON
LVDS_ENA_BL
C_PR
COMP_PB
SVID
SVID
DAC_SDA
I2C_CLK
I2C_DATA
STRP_DATA
C24 C25 D24 E24 H21 J21 E23 F23
B28 A28 C30 B30 B29 A29 C28 C27
E21 F21 A27 B27
J23 H23
H24 J24
A30 A26 C29 F24
B21 A21 D3
C4 C5
J18 F18
Y
D18
A22
C21 B22 B14
LCD_B0­LCD_B0+ LCD_B1­LCD_B1+ LCD_B2­LCD_B2+ LCD_B3­LCD_B3+
LCD_A0­LCD_A0+ LCD_A1­LCD_A1+ LCD_A2­LCD_A2+ LCD_A3­LCD_A3+
LCD_BCLK­LCD_BCLK+ LCD_ACLK­LCD_ACLK+
+3.3V_RUN_NB_VDDLT33
+1.8V_RUN_NB_VDDLT18
C96
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C96
+1.8V_RUN_NB_LTPVDD18
ENVDD LVDS_BLON PANEL_BKEN
NB_DDCDATA_R
NB_I2C_CLK NB_LDDC_DATA_R STRP_DATA
TP109 TPAD28TP109 TPAD28 TP108 TPAD28TP108 TPAD28 TP106 TPAD28TP106 TPAD28 TP107 TPAD28TP107 TPAD28 TP101 TPAD28TP101 TPAD28 TP100 TPAD28TP100 TPAD28 TP104 TPAD28TP104 TPAD28 TP105 TPAD28TP105 TPAD28
TP10 TPAD28TP10 TPAD28 TP11 TPAD28TP11 TPAD28
TP102 TPAD28TP102 TPAD28 TP103 TPAD28TP103 TPAD28
12
12
ENVDD 17
TP3 TPAD28TP3 TPAD28
PANEL_BKEN 36
use 24 bit or 18bit
1500mA
1 2
L15
L15
C129
C129
BLM18PG181SN-3GP
BLM18PG181SN-3GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C39
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R44 0R2-0.R44 0R2-0. R16 0R2-0.R16 0R2-0. R15 0R2-0.R15 0R2-0. R17 0R2-0.R17 0R2-0.
R24 0R2-0.R24 0R2-0. R66 0R2-0.R66 0R2-0.
C39
12 12 12 12
12 12
placed CAP closed NB within 20 mm (80mil)
C107
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C107
+1.8V_RUN
200mA
1 2
L5
L5
12
BLM18BB221SN1D-GP
BLM18BB221SN1D-GP
C21
C21 SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
NB_VCORE_CNTRL 20,46
12
12
C130
C130 SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
+1.8V_RUN
NB_DDCDATA 16 NB_DDCCLK 16 NB_LDDC_CLK 17 SDVO_CTRLCLK 38
NB_LDDC_DATA 17
LCD_A0-
LCD_A0+
LCD_A1-
LCD_A1+
LCD_A2-
LCD_A2+ LCD_ACLK-
LCD_ACLK+
1500mA
1 2
L11
L11 BLM18PG181SN-3GP
BLM18PG181SN-3GP
NB_I2C_CLK NB_LDDC_DATA
NB_DDCDATA
CRT
LVDS
C40
C40
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
C41
C41
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
C36
C36
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
C37
C37
SC8P250V2CC-GP
SC8P250V2CC-GP
+3.3V_RUN_NB
1 2 3
RN2
RN2 SRN4K7J-8-GP
SRN4K7J-8-GP
1 2
R45 4K7R2J-2-GPR45 4K7R2J-2-GP
DY
DY
DY
DY
DY
DY
DY
DY
12
12
12
12
LCD_A0- 17
LCD_A0+ 17 LCD_A1- 17
LCD_A1+ 17 LCD_A2- 17
LCD_A2+ 17 LCD_ACLK- 17
LCD_ACLK+ 17
+3.3V_RUN_NB
4
Use to control NB core power 1~1.2V
Place close to NB
ONLY FOR NB 3.3V POWER
+3.3V_RUN_NB
3
BAT54CW-1-GP
1 1
BAT54CW-1-GP
+1.8V_RUN
1 2
R126 2K2R2J-2-GPR126 2K2R2J-2-GP
+1.8V_RUN
D5
D5
1
2
NB_POWER_ON1
A
+3.3V_ALW2
1
12
R100
R100 100KR2J-1-GP
100KR2J-1-GP
NB_POWER_ON2
3
Q14
Q14 MMBT3904-7-F-GP
MMBT3904-7-F-GP
2
+15V_ALW
12
G
S D
+3.3V_ALW
R119
R119 100KR2J-1-GP
100KR2J-1-GP
NB_POWER_ON3
Q13
Q13 2N7002-7F-GP
2N7002-7F-GP
U22
U22
D
D
1
D
D
2
G
G
3 4
SI3456BDV-T1-GP
SI3456BDV-T1-GP
12
C113
C113 SC470P50V2KX-3GP
SC470P50V2KX-3GP
+3.3V_RUN_NB
D
D
6
D
D
5
S
S
B
12
C99
C99
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DAC_VSYNC: STRAP_MOBILE_GFX DEFAULT: 1 0: DESKTOP GRAPHICS DEVICE 1: MOBILE GRAPHICS DEVICE
+3.3V_RUN_NB +3.3V_RUN_NB +3.3V_RUN_NB
R39
R39 4K7R2J-2-GP
4K7R2J-2-GP
1 2
NB_VSYNC NB_HSYNC STRP_DATA
R40
R40
DY
DY
4K7R2J-2-GP
4K7R2J-2-GP
1 2
DAC_HSYNC: STRP_INTGFX_DISABLE DEFAULT: 0 0: ENABLE 1: DISABLE
R38
R38
DY
DY
4K7R2J-2-GP
4K7R2J-2-GP
1 2
R48
R48 4K7R2J-2-GP
4K7R2J-2-GP
1 2
C
STRP_DATA: STRP_MEMSTRAPS DEFAULT: 1 0: SELECT MEMORY CHA A AS DEBUG BUS 1: NORMAL MODE
R77
DY
DY
1 2
1 2
R77 4K7R2J-2-GP
4K7R2J-2-GP
R64
R64 4K7R2J-2-GP
4K7R2J-2-GP
D
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
DDC_DATA: STRAP_MEMVMODE DEFAULT: 1 0: DDR3 1: DDR2
A3
A3
A3
+3.3V_RUN_NB
R30
R30 4K7R2J-2-GP
4K7R2J-2-GP
1 2
SDVO_CTRLDATA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
RS600ME-4(4/5)
RS600ME-4(4/5)
RS600ME-4(4/5)
Parker
Parker
Parker
10 53Friday, August 03, 2007
10 53Friday, August 03, 2007
10 53Friday, August 03, 2007
E
-1
-1
of
of
of
-1
A
NB-VDD18_CPU DE-COUPLING NB-VDD_PCIE DE-COUPLING
+1.8V_RUN
1500mA
DY
4 4
DY
R127
R127 BLM18EG601SN1D-GP
BLM18EG601SN1D-GP
1 2
12
12
C115
C115
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
50mA(10mil)
12
12
C125
C125
C116
C116
SC10U4V3MX-GP
SC10U4V3MX-GP
SC6P50V2CN-1GP
SC6P50V2CN-1GP
+1.8V_RUN_NB_VDD18CPU
12
C72
C72
C139
C139
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C81
C81
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
B
250mA(15 mil)
+1.2V_RUN
1 2
L19
L19
BLM18EG601SN1D-GP
BLM18EG601SN1D-GP
C
+1.2V_RUN_NB_VPCIE
12
12
12
C179
C179
DY
DY
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
12
C58
C58
C217
C217
C143
C143
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
12
C76
C76
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C240
C240
C147
C147
SC6P50V2CN-1GP
SC6P50V2CN-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
D
NB-VDDC DE-COUPLING POWER 1V~1.2V
+NB_VCORE
6A(240 mil)
12
E
12
12
C222
C222
C150
C150
SC10U4V3MX-GP
SC10U4V3MX-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
12
C180
C180
C157
C157
DY
DY
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C210
C210
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C174
C174
C175
C175
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C801
C801
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SSID = N.B
3 3
+1.8V_RUN
NB-VDD18_MEN DE-COUPLING
R107
R107 BLM18EG601SN1D-GP
BLM18EG601SN1D-GP
1 2 12
DY
DY
2 2
1 1
12
12
C234
C234
C126
C126
C228
C228
DY
DY
SC10U4V3MX-GP
SC10U4V3MX-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
SC10U4V3MX-GP
SC10U4V3MX-GP
150mA(15 mil)
+1.8V_RUN_NB_VDD18MEM
12
C176
C176
C231
C231
SC6P50V2CN-1GP
SC6P50V2CN-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
7 OF 7
7 OF 7
12
C87
C87
DY
DY
AK26
AK29
AK39
AK43
VSS164
VSS165
VSS166
VSS167
VSS_PCIE1A3VSS_PCIE2
VSS_PCIE3
VSS_PCIE4
AA3
AA4
AA8
+1.8V_RUN_NB_VDD18CPU
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AK47
AM40
AM44
AM45
AP39
AP43
VSS168
VSS169
VSS170
VSS171
VSS172
VSS_PCIE5
VSS_PCIE6
VSS_PCIE7
VSS_PCIE8
VSS_PCIE9
AB1
AB3
AC2
AC3
AC4
AC8
AP47
AT6
AT10
VSS173
VSS174
VSS175
VSS176
VSS_PCIE10
VSS_PCIE11
VSS_PCIE12
VSS_PCIE13
AD3
AD4
AC12
AT12
AT43
AU46
VSS177
VSS178
VSS179
VSS_PCIE14
VSS_PCIE15
VSS_PCIE16
AD5
AD6
AD8
6 OF 7
6 OF 7
AV8
AV12
AV42
VSS180
VSS181
VSS_PCIE17
VSS_PCIE18
AD9
AD10
AD12
R18
R17
VDD18_CPU_9
CPU TRANS
CPU TRANS
PWR
PWR
VDD18_CPU_20
V32
W32
AW10
AW14
AW18
VSS182
VSS183
VSS184
VSS_PCIE19
VSS_PCIE20
VSS_PCIE21
AE3
AE4
AE8
N25
N24
K16
H14
VDD18_CPU_8
VDD18_CPU_7
VDD18_CPU_6
VDD18_CPU_5
VDD18_CPU_4
VDD18_CPU_15
VDD18_CPU_16
VDD18_CPU_17
VDD18_CPU_18
VDD18_CPU_19
T30
T31
T32
U32
AW21
AW24
AW29
AW32
VSS185
VSS186
VSS187
VSS188
VSS189
VSS_PCIE22
VSS_PCIE23
VSS_PCIE24
VSS_PCIE25
VSS_PCIE26
AF1
AF3
AG2
AE12
E14
C15
A15
VDD18_CPU_3
VDD18_CPU_2
VDD18_CPU_1
VDD18_CPU_11
VDD18_CPU_12
VDD18_CPU_13
VDD18_CPU_14
T17
T18
T19
T29
R19
AW36
AY16
AY19
AY23
AY25
VSS190
VSS191
VSS192
VSS193
VSS_PCIE27
VSS_PCIE28
VSS_PCIE29
VSS_PCIE30
AH3
AG3
AG4
AG8
AG12
W15
VDD_PCIE48
VDD18_CPU_10
VDD18_MEM_27
VDD18_MEM_28
VDD18_MEM_29
V16
U16
W16
AY27
AY30
AY34
AY42
VSS194
VSS195
VSS196
VSS197
VSS198
VSS_PCIE31
VSS_PCIE32
VSS_PCIE33
VSS_PCIE34
VSS_PCIE35
AJ3
AJ4
AJ5
AJ6
W13
W12
V15
V13
VDD_PCIE47
VDD_PCIE46
VDD_PCIE45
VDD_PCIE44
VDD_PCIE43V3VDD_PCIE42V1VDD_PCIE41
VDD18_MEM_22
VDD18_MEM_23
VDD18_MEM_24
VDD18_MEM_25
VDD18_MEM_26
J14
T16
N16
R16
M16
AY47
B31
B37
B42
VSS199
VSS200B5VSS201
VSS202
VSS203
VSS_PCIE36
VSS_PCIE37
VSS_PCIE38
VSS_PCIE39
VSS_PCIE40
AJ8
AJ9
AK1
AJ10
AJ12
U15
T15
R15
N14
M14
M12
K14
VDD_PCIE40
VDD_PCIE39
VDD_PCIE38
VDD_PCIE37
VDD_PCIE36
VDD_PCIE35
MEM TRANS PWR
MEM TRANS PWR
VDD18_MEM_14
VDD18_MEM_15
VDD18_MEM_16
VDD18_MEM_17
VDD18_MEM_18
VDD18_MEM_19
VDD18_MEM_20
VDD18_MEM_21
F14
B15
D14
AN16
AR27
AM31
AM32
AM33
+1.8V_RUN_NB_VDD18MEM
B46
BB8
BB10
BB12
BB24
BB46
BC12
BC18
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS_PCIE41
VSS_PCIE42
VSS_PCIE43
VSS_PCIE44
VSS_PCIE45
VSS_PCIE46
VSS_PCIE47
VSS_PCIE48
AL2
AL3
AK3
AK4
AK8
AM3
AM4
AK12
K12
J10
H10
VDD_PCIE34
VDD_PCIE33K9VDD_PCIE32
VDD_PCIE31
VDD18_MEM_10
VDD18_MEM_11
VDD18_MEM_12
VDD18_MEM_13
AM17
AM18
AM19
AM29
AM30
12
DY
DY
BC19
BC21
BC24
BC29
BC30
VSS212
VSS213
VSS214
VSS215
VSS_PCIE49
VSS_PCIE50
VSS_PCIE51
VSS_PCIE52
AP4
AP5
AP6
AN3
AM8
+1.2V_RUN_NB_VPCIE
C10
B10
VDD_PCIE30H8VDD_PCIE29F8VDD_PCIE28E8VDD_PCIE27D8VDD_PCIE26
VDD_PCIE25C8VDD_PCIE24C7VDD_PCIE23
PCIE PWR
PCIE PWR
VDD18_MEM_2
VDD18_MEM_3
VDD18_MEM_4
VDD18_MEM_5
VDD18_MEM_6
VDD18_MEM_7
VDD18_MEM_8
VDD18_MEM_9
AJ16
AJ32
AL16
AL32
AK16
AK32
AM16
12
C102
C102
C153
C153
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
BC32
BC34
BD4
BD14
BD16
BD23
BD25
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS_PCIE53
VSS_PCIE54
VSS_PCIE55
VSS_PCIE56
VSS_PCIE57
VSS_PCIE58
VSS_PCIE59
VSS_PCIE60
AT2
AT3
AP8
AP9
AY1
AY2
AP10
AP13
AP12
AP3
AP1
AN15
AM15
AM13
AM12
AL15
AK15
AK13
AJ15
AJ13
AG13
AE13
VDD_PCIE9
VDD_PCIE8
VDD_PCIE22B8VDD_PCIE21
VDD_PCIE20
VDD_PCIE19
VDD18_MEM_1
VDD_CPU33
VDD_CPU_PACK
P47
W38
AD35
VDD_PCIE18
VDD_PCIE17
VDD_PCIE16
VDD_CPU30
VDD_CPU31
VDD_CPU32
V33
W33
W36
VDD_PCIE7
VDD_PCIE15
VDD_PCIE14
VDD_PCIE13
VDD_PCIE12
VDD_PCIE11
VDD_PCIE10
CPU I/F PWR MEM I/F PWR
CPU I/F PWR MEM I/F PWR
VDD_CPU21
VDD_CPU22
VDD_CPU23
VDD_CPU24
VDD_CPU25
VDD_CPU26
VDD_CPU27
VDD_CPU28
VDD_CPU29
T33
T35
T36
R29
R30
R31
R32
R33
U33
+1.05V_VCCP
60mA(10 mil)
12
12
12
C90
C90
C103
C103
C100
C100
DY
DY
DY
DY
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
BC27
BD36
VSS224
VSS225
VSS_PCIE61
VSS_PCIE62B2VSS_PCIE63B3VSS_PCIE64
AY3
SC10U4V3MX-GP
SC10U4V3MX-GP
BE1
BE21
VSS226
VSS227
BB1
SC10U4V3MX-GP
BE41
BE43
BE47
VSS228
VSS229
VSS_PCIE65
VSS_PCIE66
BB2
BB3
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BF2
BF6
BF11
BF14
BF16
BF20
BF21
BF28
BF32
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
GROUND
GROUND
VSS_PCIE67C1VSS_PCIE68D1VSS_PCIE69E2VSS_PCIE70E3VSS_PCIE71F3VSS_PCIE72F4VSS_PCIE73G3VSS_PCIE74H1VSS_PCIE75H3VSS_PCIE76H6VSS_PCIE77K2VSS_PCIE78K3VSS_PCIE79K4VSS_PCIE80K5VSS_PCIE81L3VSS_PCIE82M3VSS_PCIE83M9VSS_PCIE84P1VSS_PCIE85P3VSS_PCIE86P6VSS_PCIE87
AD13
AC13
AA13
VDD_PCIE6
VDD_PCIE5
VDD_CPU19
VDD_CPU20
P35
N32
N34
12
DY
DY
BF37
BF42
BF44
VSS240
VSS241
AA12
A10
A8
VDD_PCIE4
VDD_PCIE3
VDD_PCIE2
VDD_PCIE1
VDD_CPU15
VDD_CPU16
VDD_CPU17
VDD_CPU18
N27
N29
N30
C73
C73
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BF43
BG3
BG4
VSS242
VSS243
VSS244
VSS245
V31
W17
W19
W22
W25
W28
W30
W31
Y18
Y20
Y23
Y26
Y29
VDDC67
VDDC68
VDDC69
VDDC70
VDDC71
VDDC72
VDDC73
VDDC74
VDDC75
VDDC76
VDDC77
VDDC78
VDD_CPU2
VDD_CPU3
VDD_CPU4
VDD_CPU5
VDD_CPU6
VDD_CPU7
VDD_CPU8
VDD_CPU9
VDD_CPU10
VDD_CPU11
VDD_CPU12
VDD_CPU13
VDD_CPU14
M34
12
BG8
M32
BG14
VSS246
VSS247
M30
C86
C86
BG18
VSS248
K29
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BG20
J29
BG21
VSS249
VSS250
P10
A33
B33
C31
C32
C33
H30
H32
AC35
AC36
BF24
BG43
C11
C12
C14
C19
C20
C22
VSS251
VSS252
VSS253C6VSS254
VSS255
VSS256
VSS257
VSS258
VSS_PCIE88R2VSS_PCIE89R3VSS_PCIE90T3VSS_PCIE91T4VSS_PCIE92T8VSS_PCIE93U3VSS_PCIE94V4VSS_PCIE95V8VSS_PCIE96W2VSS_PCIE97W3VSS_PCIE98W4VSS_PCIE99W5VSS_PCIE100W6VSS_PCIE101W8VSS_PCIE102W9VSS_PCIE103
V23
V26
V29
VDDC64
VDDC65
VDDC66
VDD_CPU1
VDD_MEM64
BG40
BG34
C23
C26
C44
VSS259
VSS260
VSS261
V17
V18
V20
VDDC60
VDDC61
VDDC62
VDDC63
VDD_MEM63
VDD_MEM62
VDD_MEM61
VDD_MEM60
BG30
BG26
BG22
C47
VSS262
VSS263
VSS264D4VSS265D6VSS266
U29
U30
U31
VDDC57
VDDC58
VDDC59
VDD_MEM59
VDD_MEM58
VDD_MEM57
BF46
BE45
BG45
D12
D21
D23
VSS267
VSS268
VSS_PCIE104Y3VSS105A4VSS106
W10
U17
U18
U19
VDDC54
VDDC55
VDDC56
VDD_MEM56
VDD_MEM55
VDD_MEM54
AV36
AV34
BD45
D27
D30
D34
VSS269
VSS270
VSS271
VSS107
VSS108
A34
A40
A45
F16
H16
J16
VDDC51
VDDC52
VDDC53
VDD_MEM53
VDD_MEM52
VDD_MEM51
AV30
AV27
AV24
D36
D38
D45
VSS272
VSS273
VSS274
VSS109
VSS110
VSS111
AA39
AA43
AB18
AL30
AL31
B16
C16
D16
E16
VDDC45
VDDC46
VDDC47
VDDC48
VDDC49
VDDC50
CORE POWER
CORE POWER
VDD_MEM50
VDD_MEM49
VDD_MEM48
VDD_MEM47
VDD_MEM46
VDD_MEM45
AT36
AT34
AT29
AT27
AV21
AV18
E10
E12
E18
E19
E25
E29
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
AB20
AB23
AB26
AB29
AB47
AC19
AL18
AL19
AL29
VDDC42
VDDC43
VDDC44
VDD_MEM44
VDD_MEM43
VDD_MEM42
AT23
AT21
AT19
E32
F12
VSS281
VSS282F5VSS283
VSS118
VSS119
VSS120
AC22
AC25
AC28
AK30
AK31
AL17
VDDC39
VDDC40
VDDC41
VDD_MEM41
VDD_MEM40
VDD_MEM39
AT16
AT14
AR34
12
F38
F46
H12
VSS284
VSS285
VSS286
VSS121
VSS122
VSS123
AC30
AC38
AC40
AK22
AK25
AK28
VDDC36
VDDC37
VDDC38
VDD_MEM38
VDD_MEM37
VDD_MEM36
AR32
AR30
AR29
C241
C241
SC10U4V3MX-GP
SC10U4V3MX-GP
H18
H19
H25
VSS287
VSS288
VSS289
VSS124
VSS125
VSS126
AC44
AD39
AD46
AJ29
AJ31
AK17
AK19
VDDC33
VDDC34
VDDC35
VDD_MEM35
VDD_MEM34
VDD_MEM33
AR25
AR24
AR23
AR21
NB-VDD_MEN DE-COUPLINGNB-VDD_CPU DE-COUPLING
12
C251
C251
H27
H34
H36
H43
VSS290
VSS291
VSS292
VSS127
VSS128
VSS129
AE18
AE20
AE23
AE26
AJ20
AJ23
AJ26
VDDC29
VDDC30
VDDC31
VDDC32
VDD_MEM32
VDD_MEM31
VDD_MEM30
VDD_MEM29
AR19
AR18
AR16
12
SC10U4V3MX-GP
SC10U4V3MX-GP
H47
J12
K18
VSS293
VSS294
VSS295
VSS296
VSS130
VSS131
VSS132
VSS133
AE29
AE39
AE40
AH30
AJ17
AJ18
VDDC26
VDDC27
VDDC28
VDD_MEM28
VDD_MEM27
VDD_MEM26
AP38
AP36
AR14
C223
C223
SC10U4V3MX-GP
SC10U4V3MX-GP
K19
K21
K23
VSS297
VSS298
VSS299
VSS134
VSS135
VSS136
AE42
AE43
AE44
AH22
AH25
AH28
VDDC23
VDDC24
VDDC25
VDD_MEM25
VDD_MEM24
VDD_MEM23
AP35
AN33
AN32
12
DY
DY
K24
K34
K39
VSS300
VSS301
VSS302
VSS137
VSS138
VSS139
AF19
AF22
AF25
AF23
AF26
AF29
AH19
VDDC20
VDDC21
VDDC22
VDD_MEM22
VDD_MEM21
VDD_MEM20
AN31
AN30
AN29
AN19
12
C213
C213
DY
DY
SC10U4V3MX-GP
SC10U4V3MX-GP
K43
L46
M18
M19
VSS303
VSS304
VSS305
VSS140
VSS141
VSS142
AF28
AF30
AF47
AG40
AE30
AF18
AF20
VDDC16
VDDC17
VDDC18
VDDC19
VDD_MEM19
VDD_MEM18
VDD_MEM17
VDD_MEM16
AN18
AN17
AM36
+1.8V_SUS+1.05V_VCCP
C252
C252
SC10U4V3MX-GP
SC10U4V3MX-GP
M21
M24
M25
VSS306
VSS307
VSS308
VSS309
VSS143
VSS144
VSS145
VSS146
AH18
AG42
AG43
AE22
AE25
AE28
VDDC14
VDDC15
VDD_MEM15
VDD_MEM14
AL33
AK38
AM35
12
DY
DY
M36
M40
M43
VSS310
VSS311
VSS147
VSS148
AH20
AH23
AH26
AC26
AC29
AE19
VDDC10
VDDC11
VDDC12
VDDC13
VDD_MEM13
VDD_MEM12
VDD_MEM11
VDD_MEM10
AJ36
AK35
AK33
C254
C254
SC10U4V3MX-GP
SC10U4V3MX-GP
N18
N19
N21
VSS312
VSS313
VSS314
VSS315
VSS149
VSS150
VSS151
VSS152
AJ19
AH29
AH45
+NB_VCORE
AB25
AB28
AB30
AC18
AC20
AC23
VDDC4
VDDC5
VDDC6
VDDC7
VDDC8
VDDC9
VDD_MEM9
VDD_MEM8
VDD_MEM7
VDD_MEM6
VDD_MEM5
VDD_MEM4
AJ35
AJ33
AG39
AG38
AG36
AG35
2.5A(100 mil)
12
12
C196
C196
DY
DY
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
P40
P43
T38
T40
T44
T46
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
AJ22
AJ25
AJ28
AJ30
AJ38
AJ39
A16
AB19
AB22
VDDC2
VDDC3
VDD_MEM3
VDD_MEM2
AE38
AE36
AE35
C226
C226
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
V19
V22
V25
VSS322
VSS323
VSS327 VSS328 VSS329 VSS330 VSS331 VSS332 VSS333 VSS334 VSS335 VSS336 VSS337 VSS338 VSS339 VSS340 VSS341 VSS342
VSS159
VSS160
AJ40
AJ44
AK18
U91F
U91F RS600ME-GP
RS600ME-GP
VDDC1
VDD_MEM1
+1.8V_SUS
12
DY
DY
V28
V30
VSS324
VSS325
VSS326
VSS161
VSS162
VSS163
AK20
AK23
C192
C192
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
V39 V43 V47 W18 W20 W23 W26 W29 W40 W44 Y19 Y22 Y25 Y28 Y30 Y45
U91G
U91G RS600ME-GP
RS600ME-GP
12
C201
C201
C257
C257
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
THE CAPS HAVE TO BE PLACED UNDER NB. ALL CAPS' GND USE COPPER FLOOD TOGETHER, AND POWER ALSO LIKE THIS WAY.
12
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet of
A
B
C
D
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
RS600ME-5(5/5)
RS600ME-5(5/5)
RS600ME-5(5/5)
Parker
Parker
Parker
E
-1
-1
-1
of
11 53Thursday, August 09, 2007
11 53Thursday, August 09, 2007
11 53Thursday, August 09, 2007
A
DDR_A_D11
DDR_A_D15 DDR_A_D16 DDR_A_D20
DDR_A_D13 DDR_A_DM1
DDR_A_D8
4 4
3 3
DDR_A_D10
DDR_A_D6 DDR_A_D2 DDR_A_D7
DDR_A_D14
DDR_A_D44
DDR_A_D42
DDR_A_D40
DDR_A_D45
DDR_A_D23
DDR_A_D29
DDR_A_D28
DDR_A_D25
DDR_A_D1 DDR_A_DQS#0 DDR_A_DQS0 DDR_A_D18
DDR_A_D51
DDR_A_D60
DDR_A_D56
DDR_A_D57
1 2 3 4 5
RN42
RN42 SRN22J-3-GP-U
SRN22J-3-GP-U
1 2 3 4 5
RN44
RN44 SRN22J-3-GP-U
SRN22J-3-GP-U
1 2 3 4 5
RN45
RN45 SRN22J-3-GP-U
SRN22J-3-GP-U
1 2 3 4 5
RN33
RN33 SRN22J-3-GP-U
SRN22J-3-GP-U
1 2 3 4 5
RN39
RN39 SRN22J-3-GP-U
SRN22J-3-GP-U
1 2 3 4 5
RN46
RN46 SRN22J-3-GP-U
SRN22J-3-GP-U
1 2 3 4 5
RN28
RN28 SRN22J-3-GP-U
SRN22J-3-GP-U
M_R_DQ11
8
M_R_DQ15
7
M_R_DQ16
6
M_R_DQ20 M_R_DQS#2
M_R_DQ13
8
M_R_DM1
7
M_R_DQ8
6
M_R_DQ10
M_R_DQ6 M_R_DQS#6
8
M_R_DQ2
7
M_R_DQ7
6
M_R_DQ14
M_R_DQ44
8
M_R_DQ42
7
M_R_DQ40
6
M_R_DQ45
M_R_DQ23
8
M_R_DQ29
7
M_R_DQ28
6
M_R_DQ25
M_R_DM0
8
M_R_DQ1
7
M_R_DQS#0
6
M_R_DQS0
M_R_DQ51
8
M_R_DQ60
7
M_R_DQ56
6
M_R_DQ57
DDR_A_D17 DDR_A_D21 DDR_A_DQS2 DDR_A_DQS#2
RN41
RN41 SRN22J-3-GP-U
SRN22J-3-GP-U
DDR_A_D48 DDR_A_DM6 DDR_A_D49 DDR_A_DQS6
RN30
RN30 SRN22J-3-GP-U
SRN22J-3-GP-U
DDR_A_DQS#6 DDR_A_D54 DDR_A_D55 DDR_A_D50
RN29
RN29 SRN22J-3-GP-U
SRN22J-3-GP-U
DDR_A_D0 DDR_A_D4 DDR_A_D3 DDR_A_D5
RN47
RN47 SRN22J-3-GP-U
SRN22J-3-GP-U
DDR_A_D35 DDR_A_D39 DDR_A_D38
DDR_A_D41
RN34
RN34 SRN22J-3-GP-U
SRN22J-3-GP-U
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
DDR_A_D12 DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D9
DDR_A_D33 DDR_A_D32 DDR_A_D36
CHANNEL A DATA-MASK
CHANNEL A ADDRESS CHANNEL A BANK SELECT
2 2
DDR_A_MA7
DDR_A_MA3 DDR_A_MA10 DDR_A_BS2
DDR_A_MA13
DDR_A_MA8
DDR_A_MA4
DDR_A_MA0
DDR_A_BS1
DDR_A_WE#
DDR_A_BS0
DDR_A_MA12
DDR_A_RAS#
DDR_A_MA9
1 1
DDR_A_MA5
DDR_A_MA1
1 2 3 4 5
RN24
RN24 SRN3J-4-GP
SRN3J-4-GP
1 2 3 4 5
RN17
RN17 SRN3J-4-GP
SRN3J-4-GP
1 2 3 4 5
RN22
RN22 SRN3J-4-GP
SRN3J-4-GP
1 2 3 4 5
RN20
RN20 SRN3J-4-GP
SRN3J-4-GP
CHANNEL A COMMAND
RAM CELL ADDRESS 13
M_R_A7
8
M_R_A3
7 6
8 7 6
8 7 6
8 7 6
M_R_A13 M_R_A8 M_R_A4 M_R_A0
M_R_BS#1 M_R_WE# M_R_BS#0 M_R_A12
M_R_RAS# M_R_A9 M_R_A5 M_R_A1
M_R_A10 M_R_BS#2
series resistor 3 ohm
A
B
M_R_DQ17
8
M_R_DQ21
7
M_R_DQS2
6
M_R_DQ48
8
M_R_DM6
7
M_R_DQ49
6
M_R_DQS6
8
M_R_DQ54
7
M_R_DQ55
6
M_R_DQ50
M_R_DQ0
8
M_R_DQ4
7
M_R_DQ3
6
M_R_DQ5
M_R_DQ35
8
M_R_DQ39
7
M_R_DQ38
6
M_R_DQ41
8 7 6
8 7 6
1 2 3 4 5
1 2 3
1 2 3
M_R_DQ12 M_R_DQS#1 M_R_DQS1 M_R_DQ9
M_R_DM4 M_R_DQ33 M_R_DQ32 M_R_DQ36
8 7 6
4
4
RN43
RN43 SRN22J-3-GP-U
SRN22J-3-GP-U
RN36
RN36 SRN22J-3-GP-U
SRN22J-3-GP-U
DDR_A_MA11 DDR_A_MA6 DDR_A_MA2 DDR_A_CAS#
DDR_A_CKE0
DDR_A_ODT0 DDR_A_CS#0
1 2 3 4 5
1 2 3 4 5
RN18
RN18 SRN3J-4-GP
SRN3J-4-GP
RN25
RN25 SRN3J-2-GP
SRN3J-2-GP
RN16
RN16 SRN3J-2-GP
SRN3J-2-GP
series resistor 3 ohm
B
DDR_A_DQS#5 DDR_A_DQS5 DDR_A_DM5
DDR_A_D53 DDR_A_D52
DDR_A_DM3 DDR_A_DQS#3 DDR_A_DQS3
M_R_A11 M_R_A6 M_R_A2 M_R_CAS#
M_R_CKE0
M_R_ODT0 M_R_CS#0
DDR_A_D46
DDR_A_D43 DDR_A_D47
DDR_A_D24
DDR_A_D30 DDR_A_D26 DDR_A_D31 DDR_A_D27
1 2 3 4 5
RN32
RN32 SRN22J-3-GP-U
SRN22J-3-GP-U
1 2 3 4 5
RN31
RN31 SRN22J-3-GP-U
SRN22J-3-GP-U
1 2 3 4 5
RN38
RN38 SRN22J-3-GP-U
SRN22J-3-GP-U
1 2 3 4 5
RN37
RN37 SRN22J-3-GP-U
SRN22J-3-GP-U
DDR_A_DM2DDR_A_DM0 DDR_A_D22 DDR_A_D19
DDR_A_D37DDR_A_DM4 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_D34
8 7 6
8 7 6
8 7 6
8 7 6
1 2 3 4 5
RN40
RN40 SRN22J-3-GP-U
SRN22J-3-GP-U
1 2 3 4 5
RN35
RN35 SRN22J-3-GP-U
SRN22J-3-GP-U
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
C
M_R_DQS#5 M_R_DQS5 M_R_DM5 M_R_DQ46
M_R_DQ43 M_R_DQ47 M_R_DQ53 M_R_DQ52
M_R_DQ24 M_R_DM3 M_R_DQS#3 M_R_DQS3
M_R_DQ30 M_R_DQ26 M_R_DQ31 M_R_DQ27
DDR_A_D61 DDR_A_DM7 DDR_A_DQS#7 DDR_A_DQS7
RN27
RN27 SRN22J-3-GP-U
SRN22J-3-GP-U
DDR_A_D58
DDR_A_D62
DDR_A_D59
DDR_A_D63
RN26
RN26 SRN22J-3-GP-U
SRN22J-3-GP-U
series resistor 22 ohm
M_R_DM2
8
M_R_DQ22
7
M_R_DQ19
6
M_R_DQ18
M_R_DQ37
8
M_R_DQS4
7
M_R_DQS#4
6
M_R_DQ34
series resistor 22 ohmseries resistor 22 ohm
DDR_A_CLK_DDR#1
C664
C664
DDR_A_CLK_DDR1
DY
DY
12
1 2
R632 0R2-0.R632 0R2-0.
12
R736
R736 100R2J-2-GP
100R2J-2-GP
1 2
R633 0R2-0.R633 0R2-0.
R736,R737 only use in Mircon
DDR_A_CLK_DDR#0
C659
C659
DDR_A_CLK_DDR0
C
DY
DY
12
1 2
R630 0R2-0.R630 0R2-0.
12
R737
R737 100R2J-2-GP
100R2J-2-GP
1 2
R629 0R2-0.R629 0R2-0.
D
8 7 6
8 7 6
M_R_DQ61 M_R_DM7 M_R_DQS#7 M_R_DQS7
M_R_DQ58 M_R_DQ62 M_R_DQ59 M_R_DQ63
1 2 3 4 5
1 2 3 4 5
CHANNEL A DATA
CHANNEL A DATA-STROBE
M_A_CLK_DDR#1
M_A_CLK_DDR1
M_A_CLK_DDR#0
M_A_CLK_DDR0
D
E
FROM NB
DDR_A_D[0..63] DDR_A_DM[0..7] DDR_A_DQS[0..7] DDR_A_DQS#[0..7] DDR_A_MA[0..12] DDR_A_BS[0..2]
DDR_A_CS#0 DDR_A_RAS# DDR_A_CAS# DDR_A_WE# DDR_A_CKE0 DDR_A_ODT0
DDR_A_MA13
DDR_A_CLK_DDR#1 DDR_A_CLK_DDR1 DDR_A_CLK_DDR#0 DDR_A_CLK_DDR0
TO DIMM
M_R_DQ[63..0] M_R_DM[7..0] M_R_DQS[7..0] M_R_DQS#[7..0] M_R_A[12..0] M_R_BS#[2..0]
M_R_CS#0 M_R_CAS# M_R_RAS# M_R_ODT0 M_R_CKE0 M_R_WE#
M_R_A13
M_A_CLK_DDR#1 M_A_CLK_DDR1 M_A_CLK_DDR#0 M_A_CLK_DDR0
DDR_A_D[0..63] 9 DDR_A_DM[0..7] 9 DDR_A_DQS[0..7] 9 DDR_A_DQS#[0..7] 9 DDR_A_MA[0..12] 9,14 DDR_A_BS[0..2] 9,14
DDR_A_CS#0 9,14 DDR_A_RAS# 9,14 DDR_A_CAS# 9,14 DDR_A_WE# 9,14 DDR_A_CKE0 9,14 DDR_A_ODT0 9,14
DDR_A_MA13 9,14
DDR_A_CLK_DDR#1 9 DDR_A_CLK_DDR1 9 DDR_A_CLK_DDR#0 9 DDR_A_CLK_DDR0 9
M_R_DQ[63..0] 13 M_R_DM[7..0] 13 M_R_DQS[7..0] 13 M_R_DQS#[7..0] 13 M_R_A[12..0] 13 M_R_BS#[2..0] 13
M_R_CS#0 13 M_R_CAS# 13 M_R_RAS# 13 M_R_ODT0 13 M_R_CKE0 13 M_R_WE# 13
M_R_A13 13
M_A_CLK_DDR#1 13 M_A_CLK_DDR1 13 M_A_CLK_DDR#0 13 M_A_CLK_DDR0 13
SSID = MEMORY
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CHANNEL A RESISTORS
CHANNEL A RESISTORS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
CHANNEL A RESISTORS
Parker
Parker
Parker
12 53Friday, August 03, 2007
12 53Friday, August 03, 2007
12 53Friday, August 03, 2007
of
of
E
of
-1
-1
-1
A
B
C
D
E
+1.8V_SUS
samsung
U57
U57
A1
VDD
E9
VDD
H9
VDD
L1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E1
VDDL
E2
VREF
F3
WE#
G8
CS#
F9
ODT
A2
NU/RDQS#
B3
DM/RDQS
A8
DQS#
B7
DQS
F7
RAS#
G7
CAS#
F8
CK#
E8
CK
F2
CKE
G2
BA0
G3
BA1
G1
BA2
K4T1G084QC-ZCE6-GP-U
K4T1G084QC-ZCE6-GP-U
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
A10/AP
NC#L7 NC#L3
VSSDL
VSSQ VSSQ VSSQ VSSQ VSSQ
VSS VSS VSS VSS
U45
U45
V_DDR_NB_REF
M_R_WE# M_R_CS#0 M_R_ODT0
M_R_DM3M_R_DM2
M_R_RAS# M_R_CAS#
M_A_CLK_DDR#0 M_A_CLK_DDR0
M_R_CKE0
M_R_BS#0 M_R_BS#1 M_R_BS#2M_R_BS#2M_R_BS#2M_R_BS#2
+1.8V_SUS
A1
VDD
E9
VDD
H9
VDD
L1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E1
VDDL
E2
VREF
F3
WE#
G8
CS#
F9
ODT
A2
NU/RDQS#
B3
DM/RDQS
A8
DQS#
B7
DQS
F7
RAS#
G7
CAS#
F8
CK#
E8
CK
F2
CKE
G2
BA0
G3
BA1
G1
BA2
K4T1G084QC-ZCE6-GP-U
K4T1G084QC-ZCE6-GP-U
A10/AP
NC#L7 NC#L3
VSSDL
M_R_DQ16
C8
M_R_DQ17
C2
M_R_DQ18
D7
M_R_DQ19
D3
M_R_DQ20
D1
M_R_DQ21
D9
M_R_DQ22
B1
M_R_DQ23
B9
M_R_A0
H8
A0
M_R_A1
H3
A1
M_R_A2
H7
A2
M_R_A3
J2
A3
M_R_A4
J8
A4
M_R_A5
J3
A5
M_R_A6
J7
A6
M_R_A7
K2
A7
M_R_A8
K8
A8
M_R_A9
K3
A9
M_R_A10
H2
M_R_A11
K7
A11
M_R_A12
L2
A12
L8
A13
L7 L3
E7 A7
B2 B8 D2 D8
A3 E3 J1 K9
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
VSSQ VSSQ VSSQ VSSQ VSSQ
VSS VSS VSS VSS
M_R_DQ24
C8
M_R_DQ25
C2
M_R_DQ26
D7
M_R_DQ27
D3
M_R_DQ28
D1
M_R_DQ29
D9
M_R_DQ30
B1
M_R_DQ31
B9
M_R_A0
H8
A0
M_R_A1
H3
A1
M_R_A2
H7
A2
M_R_A3
J2
A3
M_R_A4
J8
A4
M_R_A5
J3
A5
M_R_A6
J7
A6
M_R_A7
K2
A7
M_R_A8
K8
A8
M_R_A9
K3
A9
M_R_A10
H2
M_R_A11
K7
A11
M_R_A12
L2
A12
M_R_A13M_R_A13M_R_A13M_R_A13
L8
A13
L7 L3
E7 A7
B2 B8 D2 D8
A3 E3 J1 K9
M_R_DQ[63..0] M_R_DM[7..0] M_R_DQS[7..0] M_R_DQS#[7..0] M_R_A[12..0] M_R_BS#[2..0]
M_R_A13
M_R_CS#0 M_R_CAS# M_R_RAS# M_R_ODT0 M_R_CKE0 M_R_WE#
M_A_CLK_DDR#1 M_A_CLK_DDR1 M_A_CLK_DDR#0 M_A_CLK_DDR0
V_DDR_NB_REF V_DDR_NB_REF V_DDR_NB_REF
DY
DY
12
C802
C802
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
12
C803
C803
M_R_DQ[63..0] 12 M_R_DM[7..0] 12 M_R_DQS[7..0] 12 M_R_DQS#[7..0] 12 M_R_A[12..0] 12 M_R_BS#[2..0] 12 M_R_A13 12
M_R_CS#0 12 M_R_CAS# 12 M_R_RAS# 12 M_R_ODT0 12 M_R_CKE0 12 M_R_WE# 12
M_A_CLK_DDR#1 12 M_A_CLK_DDR1 12 M_A_CLK_DDR#0 12 M_A_CLK_DDR0 12
12
DY
DY
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C804
C804
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
On-board DDR2 Memory
U46
U58
U58
+1.8V_SUS
A1
VDD
E9
VDD
H9
VDD
L1
4 4
V_DDR_NB_REF
M_R_WE# M_R_CS#0 M_R_ODT0
M_R_DM0
M_R_DQS0 M_R_DQS1
M_R_RAS# M_R_CAS#
M_A_CLK_DDR#0 M_A_CLK_DDR0 M_R_CKE0
3 3
M_R_BS#0 M_R_BS#1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E1
VDDL
E2
VREF
F3
WE#
G8
CS#
F9
ODT
A2
NU/RDQS#
B3
DM/RDQS
A8
DQS#
B7
DQS
F7
RAS#
G7
CAS#
F8
CK#
E8
CK
F2
CKE
G2
BA0
G3
BA1
G1
BA2
K4T1G084QC-ZCE6-GP-U
K4T1G084QC-ZCE6-GP-U
A10/AP
NC#L7 NC#L3
VSSDL
VSSQ VSSQ VSSQ VSSQ VSSQ
M_R_DQ0
C8
DQ0
M_R_DQ1
C2
DQ1
M_R_DQ2
D7
DQ2
M_R_DQ3
D3
DQ3
M_R_DQ4
D1
DQ4
M_R_DQ5
D9
DQ5
M_R_DQ6
B1
DQ6
M_R_DQ7
B9
DQ7
M_R_A0
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2 K7
A11
L2
A12
L8
A13
L7 L3
E7 A7
B2 B8 D2 D8
A3
VSS
E3
VSS
J1
VSS
K9
VSS
M_R_A1 M_R_A2 M_R_A3 M_R_A4 M_R_A5 M_R_A6 M_R_A7 M_R_A8 M_R_A9 M_R_A10 M_R_A11 M_R_A12
V_DDR_NB_REF
M_R_WE# M_R_CS#0 M_R_ODT0
M_R_DM1
M_R_DQS#1M_R_DQS#0
M_R_RAS# M_R_CAS#
M_A_CLK_DDR#0 M_A_CLK_DDR0 M_R_CKE0
M_R_BS#0 M_R_BS#1
+1.8V_SUS
U46
A1
VDD
E9
VDD
H9
VDD
L1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E1
VDDL
E2
VREF
F3
WE#
G8
CS#
F9
ODT
A2
NU/RDQS#
B3
DM/RDQS
A8
DQS#
B7
DQS
F7
RAS#
G7
CAS#
F8
CK#
E8
CK
F2
CKE
G2
BA0
G3
BA1
G1
BA2
K4T1G084QC-ZCE6-GP-U
K4T1G084QC-ZCE6-GP-U
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
A10/AP
NC#L7 NC#L3
VSSDL
VSSQ VSSQ VSSQ VSSQ VSSQ
VSS VSS VSS VSS
M_R_DQ8
C8
M_R_DQ9
C2
M_R_DQ10
D7
M_R_DQ11
D3
M_R_DQ12
D1
M_R_DQ13
D9
M_R_DQ14
B1
M_R_DQ15
B9
M_R_A0
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2 K7
A11
L2
A12
L8
A13
L7 L3
E7 A7
B2 B8 D2 D8
A3 E3 J1 K9
M_R_A1 M_R_A2 M_R_A3 M_R_A4 M_R_A5 M_R_A6 M_R_A7 M_R_A8 M_R_A9 M_R_A10 M_R_A11 M_R_A12
V_DDR_NB_REF
M_R_WE# M_R_CS#0 M_R_ODT0
M_R_DQS#2 M_R_DQS#3 M_R_DQS2 M_R_DQS3
M_R_RAS# M_R_CAS#
M_A_CLK_DDR#0 M_A_CLK_DDR0
M_R_CKE0
M_R_BS#0 M_R_BS#1
SSID = MEMORY
V_DDR_NB_REF
U43
U44
U44
+1.8V_SUS
A1
VDD
E9
VDD
H9
VDD
L1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
V_DDR_NB_REF
2 2
M_R_WE# M_R_CS#0
M_R_DM4 M_R_DM5
M_R_DQS#4 M_R_DQS#5 M_R_DQS4 M_R_DQS5
M_R_RAS# M_R_CAS#
M_A_CLK_DDR#1 M_A_CLK_DDR1
M_R_CKE0
M_R_BS#0 M_R_BS#1 M_R_BS#2 M_R_BS#2 M_R_BS#2 M_R_BS#2
1 1
VDDQ
E1
VDDL
E2
VREF
F3
WE#
G8
CS#
F9
ODT
A2
NU/RDQS#
B3
DM/RDQS
A8
DQS#
B7
DQS
F7
RAS#
G7
CAS#
F8
CK#
E8
CK
F2
CKE
G2
BA0
G3
BA1
G1
BA2
K4T1G084QC-ZCE6-GP-U
K4T1G084QC-ZCE6-GP-U
A10/AP
NC#L7 NC#L3
VSSDL
VSSQ VSSQ VSSQ VSSQ VSSQ
A
M_R_DQ32
C8
DQ0
M_R_DQ33
C2
DQ1
M_R_DQ34
D7
DQ2
M_R_DQ35
D3
DQ3
M_R_DQ36
D1
DQ4
M_R_DQ37
D9
DQ5
M_R_DQ38
B1
DQ6
M_R_DQ39
B9
DQ7
M_R_A0
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2 K7
A11
L2
A12
L8
A13
L7 L3
E7 A7
B2 B8 D2 D8
A3
VSS
E3
VSS
J1
VSS
K9
VSS
M_R_A1 M_R_A2 M_R_A3 M_R_A4 M_R_A5 M_R_A6 M_R_A7 M_R_A8 M_R_A9M_R_ODT0 M_R_A10 M_R_A11 M_R_A12
V_DDR_NB_REF
M_R_WE# M_R_CS#0 M_R_ODT0
M_R_RAS# M_R_CAS#
M_A_CLK_DDR#1 M_A_CLK_DDR1
M_R_CKE0
M_R_BS#0 M_R_BS#1
+1.8V_SUS
U56
U56
A1
VDD
E9
VDD
H9
VDD
L1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E1
VDDL
E2
VREF
F3
WE#
G8
CS#
F9
ODT
A2
NU/RDQS#
B3
DM/RDQS
A8
DQS#
B7
DQS
F7
RAS#
G7
CAS#
F8
CK#
E8
CK
F2
CKE
G2
BA0
G3
BA1
G1
BA2
K4T1G084QC-ZCE6-GP-U
K4T1G084QC-ZCE6-GP-U
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
A10/AP
NC#L7 NC#L3
VSSDL
VSSQ VSSQ VSSQ VSSQ VSSQ
VSS VSS VSS VSS
M_R_DQ40
C8
M_R_DQ41
C2
M_R_DQ42
D7
M_R_DQ43
D3
M_R_DQ44
D1
M_R_DQ45
D9
M_R_DQ46
B1
M_R_DQ47
B9
M_R_A0
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2 K7
A11
L2
A12
L8
A13
L7 L3
E7 A7
B2 B8 D2 D8
A3 E3 J1 K9
B
V_DDR_NB_REF
M_R_A1 M_R_A2 M_R_A3 M_R_A4 M_R_A5 M_R_A6 M_R_A7 M_R_A8 M_R_A9 M_R_A10 M_R_A11 M_R_A12 M_R_A13M_R_A13 M_R_A13M_R_A13
M_R_WE# M_R_CS#0 M_R_ODT0
M_R_DM6 M_R_DM7
M_R_DQS#6 M_R_DQS#7 M_R_DQS6 M_R_DQS7
M_R_RAS# M_R_CAS#
M_A_CLK_DDR#1 M_A_CLK_DDR1
M_R_CKE0
M_R_BS#0 M_R_BS#1
+1.8V_SUS
U55
U55
A1
VDD
E9
VDD
H9
VDD
L1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E1
VDDL
E2
VREF
F3
WE#
G8
CS#
F9
ODT
A2
NU/RDQS#
B3
DM/RDQS
A8
DQS#
B7
DQS
F7
RAS#
G7
CAS#
F8
CK#
E8
CK
F2
CKE
G2
BA0
G3
BA1
G1
BA2
K4T1G084QC-ZCE6-GP-U
K4T1G084QC-ZCE6-GP-U
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
A10/AP
NC#L7 NC#L3
VSSDL
VSSQ VSSQ VSSQ VSSQ VSSQ
VSS VSS VSS VSS
M_R_DQ48
C8
M_R_DQ49
C2
M_R_DQ50
D7
M_R_DQ51
D3
M_R_DQ52
D1
M_R_DQ53
D9
M_R_DQ54
B1
M_R_DQ55
B9
M_R_A0
H8
A0
M_R_A1
H3
A1
M_R_A2
H7
A2
M_R_A3
J2
A3
M_R_A4
J8
A4
M_R_A5
J3
A5
M_R_A6
J7
A6
M_R_A7
K2
A7
M_R_A8
K8
A8
M_R_A9
K3
A9
M_R_A10
H2
M_R_A11
K7
A11
M_R_A12
L2
A12
L8
A13
L7 L3
E7 A7
B2 B8 D2 D8
A3 E3 J1 K9
C
V_DDR_NB_REF
M_R_WE# M_R_CS#0
M_R_RAS# M_R_CAS#
M_A_CLK_DDR#1 M_A_CLK_DDR1
M_R_CKE0
M_R_BS#0 M_R_BS#1
+1.8V_SUS
U43
A1
VDD
E9
VDD
H9
VDD
L1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E1
VDDL
E2
VREF
F3
WE#
G8
CS#
F9
ODT
A2
NU/RDQS#
B3
DM/RDQS
A8
DQS#
B7
DQS
F7
RAS#
G7
CAS#
F8
CK#
E8
CK
F2
CKE
G2
BA0
G3
BA1
G1
BA2
K4T1G084QC-ZCE6-GP-U
K4T1G084QC-ZCE6-GP-U
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
A10/AP
NC#L7 NC#L3
VSSDL
VSSQ VSSQ VSSQ VSSQ VSSQ
12
12
+1.8V_SUS
12
12
12
C631
C631
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C662
C662
C630
C630
M_R_DQ56
C8
M_R_DQ57
C2
M_R_DQ58
D7
M_R_DQ59
D3
M_R_DQ60
D1
M_R_DQ61
D9
M_R_DQ62
B1
M_R_DQ63
B9
M_R_A0
H8
A0
M_R_A1
H3
A1
M_R_A2
H7
A2
M_R_A3
J2
A3
M_R_A4
J8
A4
M_R_A5
J3
A5
M_R_A6
J7
A6
M_R_A7
K2
A7
M_R_A8
K8
A8
M_R_A9M_R_ODT0
K3
A9
M_R_A10
H2
M_R_A11
K7
A11
M_R_A12
L2
A12
L8
A13
L7 L3
E7 A7
B2 B8 D2 D8
A3
VSS
E3
VSS
J1
VSS
K9
VSS
D
12
C646
C646
C650
C650
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
C645
C645
C695
C695
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
C647
C647
C649
C649
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
12
12
C689
C689
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C626
C626
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C661
C661
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C675
C675
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C637
C637
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C666
C666
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C696
C696
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C691
C691
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C660
C660
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C690
C690
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C663
C663
C681
C681
Place around the DDR2 chips
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
ON BOARD MEMORY
ON BOARD MEMORY
ON BOARD MEMORY
Parker
Parker
Parker
E
12
C644
C644
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C648
C648
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
13 53Friday, August 03, 2007
13 53Friday, August 03, 2007
13 53Friday, August 03, 2007
12
C714
C714
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C642
C642
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
of
of
of
C688
C688
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
-1
-1
-1
A
SSID = MEMORY
B
C
D
E
4 4
+0.9V_DDR_VTT
1 2 3 4 5
1 2 3
DIMMA-DDR +0.9V_DDR_VTT DE-COUPLING
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C745
C745
+0.9V_DDR_VTT
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3 3
12
C692
C692
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
C744
C744
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C741
C741
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C693
C693
C694
C694
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Pleace use One Capacitor close to every Two pull-up Resistors
12
12
C627
C627
C651
C651
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
C653
C653
C632
C632
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C643
C643
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C636
C636
C740
C740
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
C748
C748
C750
C750
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
DDR_A_BS[0..2] DDR_A_MA[0..12]
DDR_A_MA13
DDR_A_BS[0..2] 9,12 DDR_A_MA[0..12] 9,12 DDR_A_MA13 9,12
ON-BOARD MEMORY TERMINATION
DDR_A_BS0
8
DDR_A_MA12
7
DDR_A_MA7
6
DDR_A_MA3
RN82
RN82
SRN56J-5-GP
SRN56J-5-GP
DDR_A_MA4
8
DDR_A_MA0
7
DDR_A_MA11
6
DDR_A_MA6
RN79
RN79
SRN56J-5-GP
SRN56J-5-GP
DDR_A_MA2
8
DDR_A_CAS#
7 6
RN80
RN80
SRN56J-5-GP
SRN56J-5-GP
8 7 6
RN86
RN86
SRN56J-5-GP
SRN56J-5-GP
8 7 6
RN76
RN76
SRN56J-5-GP
SRN56J-5-GP
8 7 6
RN81
RN81
SRN56J-5-GP
SRN56J-5-GP
DDR_A_RAS# DDR_A_MA9
DDR_A_MA10 DDR_A_BS2 DDR_A_CKE0
DDR_A_ODT0 DDR_A_CS#0 DDR_A_MA13 DDR_A_MA8
DDR_A_MA5 DDR_A_MA1 DDR_A_BS1 DDR_A_WE#
DDR_A_CAS# 9,12 DDR_A_RAS# 9,12
DDR_A_CKE0 9,12
DDR_A_ODT0 9,12 DDR_A_CS#0 9,12
DDR_A_WE# 9,12
2 2
1 1
A
B
C
D
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
ON-BOARD MEMORY TERMINATION
ON-BOARD MEMORY TERMINATION
ON-BOARD MEMORY TERMINATION
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Parker
Parker
Parker
14 53Friday, August 03, 2007
14 53Friday, August 03, 2007
14 53Friday, August 03, 2007
of
of
E
of
-1
-1
-1
A
SSID = MEMORY
DDR_B_RAS#
DDR_B_WE#
DDR_B_CAS#
MEN_SCLK MEN_SDAT M_B_CLK_DDR#1 M_B_CLK_DDR1 M_B_CLK_DDR#0 M_B_CLK_DDR0
DDR_B_CS#0
DDR_B_CS#1
DDR_B_CKE1
DDR_B_CKE0
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
MEN_SCLK20
4 4
MEN_SDAT20
M_B_CLK_DDR#19 DDR_B_DQS#[0..7] 9 M_B_CLK_DDR19 M_B_CLK_DDR#09 M_B_CLK_DDR09
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
B
1 2
R311
R311 0R2-0.
0R2-0.
1 2
R307 0R2-0.R307 0R2-0.
DDR_SEL_B1
DDR_SEL_B0
+1.8V_SUS
C
+3.3V_RUN
12
12
C719
C719
C717
C717
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
D
DDR_B_D[0..63] DDR_B_MA[0..14] DDR_B_DM[0..7] DDR_B_BS[0..2] DDR_B_CS#[0..1] DDR_B_DQS[0..7] DDR_B_DQS#[0..7]
DDR_B_CKE[0..1] DDR_B_ODT[0..1]
DDR_B_D[0..63] 9
DDR_B_MA[0..14] 9 DDR_B_DM[0..7] 9 DDR_B_BS[0..2] 9 DDR_B_CS#[0..1] 9 DDR_B_DQS[0..7] 9
DDR_B_CKE[0..1] 9 DDR_B_ODT[0..1] 9
E
109
108
113
110
/WE
/RAS
/CAS
A0
C372
C372
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
102A1101A2100
DDR_B_MA0
A399A498A597A694A792A893A991A10/AP
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
12
C376
C376
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
3 3
DIMMB-DDR +1.8V_SUS DE-COUPLING
2 2
12
12
C380
C380
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
30
164
80
115
/CS0
DDR_B_MA5
32
166
CK0
DDR_B_MA8
DDR_B_MA9
+1.8V_SUS
C374
C374
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
CK1
/CK0
A1190A1289A13
105
116
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
12
C383
C383
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
/CS1
CKE079CKE1
DDR_B_MA6
DDR_B_MA7
12
DM010DM126DM252DM367DM4
/CK1
A1486A1584A16/BA2
85
DDR_B_BS2
12
130
147
170
185
DM5
DM6
DM7
BA0
BA1
DQ05DQ17DQ217DQ319DQ44DQ56DQ614DQ716DQ823DQ925DQ1035DQ1137DQ1220DQ1322DQ1436DQ1538DQ1643DQ1745DQ1855DQ1957DQ2044DQ2146DQ2256DQ2358DQ2461DQ2563DQ2673DQ2775DQ2862DQ2964DQ3074DQ3176DQ32
107
106
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_BS1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DDR_B_D3
12
C378
C378
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
DDR_B_BS0
C373
C373
DIMMB-DDR +0.9V_DDR_VTT DE-COUPLING
Pleace use One Capacitor close to every Two pull-up Resistors
12
C742
C742
C716
C716
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C743
C743
+0.9V_DDR_VTT
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 1
12
12
12
C722
C722
C738
C738
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
A
12
C721
C721
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C746
C746
C723
C723
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
198
200
197
199
195
SCL
SDA
VDDSPD
DDR_B_D8
DDR_B_D9
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
12
C375
C375
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C725
C725
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
B
120
83
163
SA0
SA1
NC#5050NC#6969NC#83
NC#120
NC#163/TEST
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
12
12
12
C381
C381
C384
C384
SC10U4V3MX-GP
SC10U4V3MX-GP
Pleace close to the DIMM Slot
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
12
C726
C726
C739
C739
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VDD81VDD82VDD87VDD88VDD95VDD96VDD
DDR_B_D24
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
12
C382
C382
SC10U4V3MX-GP
SC10U4V3MX-GP
12
C724
C724
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
103
DDR_B_D25
12
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
104
111
112
117
118
VDD
DDR_B_D26
VSS3VSS8VSS9VSS12VSS15VSS18VSS21VSS24VSS27VSS28VSS33VSS34VSS39VSS40VSS41VSS42VSS47VSS48VSS53VSS54VSS59VSS60VSS65VSS66VSS71VSS72VSS77VSS78VSS
VDD
VDD
VDD
VDD
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
12
C747
C747
C749
C749
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
12
C718
C718
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C
DDR_B_D49
DQ49
DQ50
DQ51
DQ52
173
175
158
160
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
+0.9V_DDR_VTT
DQ53
174
DDR_B_D54
DQ54
176
DDR_B_D55
DQ55
179
DDR_B_D56
DQ56
181
DDR_B_D57
DQ57
VSS
VSS
DQ58
DQ59
DQ60
DQ61
DQ62
189
191
180
182
192
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
194
DDR_B_D63
VSS
DQ63
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
VSS
DDR_B_DQS#0
VSS
VSS
VSS
VSS
/DQS011/DQS129/DQS249/DQS368/DQS4
129
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_WE# DDR_B_CAS# DDR_B_CS#1 DDR_B_ODT1
RN95
RN95
SRN56J-5-GP
SRN56J-5-GP
DDR_B_MA14 DDR_B_CKE1 DDR_B_MA7 DDR_B_MA11
RN89
RN89
SRN56J-5-GP
SRN56J-5-GP
DDR_B_ODT0 DDR_B_MA13 DDR_B_CKE0 DDR_B_BS2
RN92
RN92
SRN56J-5-GP
SRN56J-5-GP
DDR_B_MA12 DDR_B_MA9 DDR_B_MA8 DDR_B_MA5
RN93
RN93
SRN56J-5-GP
SRN56J-5-GP
DDR_B_MA0 DDR_B_BS1 DDR_B_RAS# DDR_B_CS#0
RN91
RN91
SRN56J-5-GP
SRN56J-5-GP
DDR_B_MA3 DDR_B_MA1 DDR_B_MA10 DDR_B_BS0
RN94
RN94
SRN56J-5-GP
SRN56J-5-GP
DDR_B_MA6 DDR_B_MA2 DDR_B_MA4
RN90
RN90
SRN56J-5-GP
SRN56J-5-GP
VSS
146
DDR_B_DQS#5
D
VSS
/DQS5
VSS
VSS
/DQS6
/DQS7
167
186
DDR_B_DQS#6
DDR_B_DQS#7
VSS
VSS
VSS
VSS
DQS013DQS131DQS251DQS370DQS4
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_WE# 9 DDR_B_CAS# 9
DDR_B_RAS# 9
184
VSS
VSS
VSS
VSS
VSS
VSS
DQS5
DQS6
DQS7
131
148
169
188
114
DDR_B_DQS4
DDR_B_ODT0
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
187
VSS
ODT0
119
DDR_B_ODT1
190
VSS
ODT1
VSS
201
193
196
VSS
VSS
VREF1VSS2GND
202
12
C715
C715
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DDR1
DDR1 DDR2-200P-8-GP-U1
DDR2-200P-8-GP-U1
GND
62.10017.861
62.10017.861
V_DDR_NB_REF
12
C712
C712
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
DDR-B
DDR-B
DDR-B
Parker
Parker
Parker
15 53Friday, August 03, 2007
15 53Friday, August 03, 2007
15 53Friday, August 03, 2007
of
of
E
of
-1
-1
-1
A
B
C
D
E
SSID = VIDEO
4 4
For NB and DOCK
C420
C420
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
RN1
RN1 SRN1KJ-7-GP
SRN1KJ-7-GP
2 3
HSYNC_CRT
CRT_R
VSYNC_CRT
CRT_RCRT_RCRT_RCRT_RCRT_R
CRT_G CRT_B
5V_CRT_S0
5V_CRT_S0
SYSTEM
5 4 6
DY
DY
7 8
U1
U1 PACDN009
PACDN009
3 2 1
NB_RED10,38
NB_GREEN10,38 NB_BLUE10,38
12
12
12
C431
C431
DY
DY
DY
DY
SC6P50V2CN-1GP
SC6P50V2CN-1GP
3 3
NB_HSYNC10
2 2
NB_VSYNC10
1 2
R356
R356 33R2J-2-GP
33R2J-2-GP
1 2
R355
R355 33R2J-2-GP
33R2J-2-GP
NB_HSYNC_1
NB_VSYNC_1
C429
C429
C430
C430
DY
DY
SC6P50V2CN-1GP
SC6P50V2CN-1GP
SC6P50V2CN-1GP
SC6P50V2CN-1GP
DOCKED
1 2
U72
U72 74AHCT1G125GW-1-GP
74AHCT1G125GW-1-GP
1 2
U71
U71 74AHCT1G125GW-1-GP
74AHCT1G125GW-1-GP
12
R353
R353
150R2F-1-GP
150R2F-1-GP
OE#
VCC A GND3Y
OE#
VCC A GND3Y
12
R352
R352
150R2F-1-GP
150R2F-1-GP
5
4
5
4
1 2
L39 BLM18BA100SN1DGPL39 BLM18BA100SN1DGP
1 2
L38 BLM18BA100SN1DGPL38 BLM18BA100SN1DGP
1 2
L37 BLM18BA100SN1DGPL37 BLM18BA100SN1DGP
12
R354
R354
150R2F-1-GP
150R2F-1-GP
DOCKED 36,38
K A
D1
D1
RB500V-40TE-GP
RB500V-40TE-GP
HSYNC_5
12
C428
C428
DY
DY
SC22P50V2JN-4GP
DY
DY
SC22P50V2JN-4GP
12
C427
C427
VSYNC_5
12
DY
DY
+5V_RUN
12
C3
C3 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
L41
L41
BLM18BA100SN1DGP
BLM18BA100SN1DGP
1 2
L40
L40
BLM18BA100SN1DGP
BLM18BA100SN1DGP
12
12
C421
C421
C422
C422
DY
DY
DY
DY
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
4
1
CRT1
CRT1
6 1
7 2 8 3 9 4
10
5
VIDEO-15-77-GP
VIDEO-15-77-GP
20.20720.015
20.20720.015
CRT_G
CRT_B
16 11
12 13 14 15
17
R1
R1
6K8R2J-GP
6K8R2J-GP
D_DDC_DATA
+5V_RUN
D17
D17 RB500V-40TE-GP
RB500V-40TE-GP
K A
12
12
C1
5V_CRT_S0
SC100P50V2JN-3GPC1SC100P50V2JN-3GP
12
R2
R2 6K8R2J-GP
6K8R2J-GP
12
C2
SC100P50V2JN-3GPC2SC100P50V2JN-3GP
5
6
D2
D2 BAV99DPT-GP
BAV99DPT-GP
DY
DY
12
DY
DY
C424
C424
5V_CRT_S0
12
HSYNC_CRT VSYNC_CRT
12
DY
DY
SC27P50V3JN-GP
SC27P50V3JN-GP
C426
C426 SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
D_DDC_DATA
D_DDC_CLK
C423
C423
SC27P50V3JN-GP
SC27P50V3JN-GP
D_DDC_CLK
34
2
1
D_DDC_DATA 38
D_DDC_CLK 38
DOCK
SC22P50V2JN-4GP
SC22P50V2JN-4GP
+3.3V_RUN
TO DOCK
DOCK_DET#
1 1
A
DOCK_DET# 38
1
OE#
VCC
2
A GND3Y
U2
U2 74AHCT1G125GW-1-GP
74AHCT1G125GW-1-GP
1
OE#
VCC
2
A GND3Y
U3
U3 74AHCT1G125GW-1-GP
74AHCT1G125GW-1-GP
B
D_DDC_CLK
5
4
5
4
D_HSYNC_5
D_VSYNC_5
1 2
R3 33R2J-2-GPR3 33R2J-2-GP
1 2
R4 33R2J-2-GPR4 33R2J-2-GP
D_HSYNC 38
D_VSYNC 38
C
D_DDC_DATA
D
5 6
U4
U4 2N7002DW-7F-GP
2N7002DW-7F-GP
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
34 2 1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
CRT
CRT
CRT
Parker
Parker
Parker
E
NB_DDCCLK 10
NB_DDCDATA 10
16 53Friday, August 03, 2007
16 53Friday, August 03, 2007
16 53Friday, August 03, 2007
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