Dell Latitude E5410, Latitude E5510 Schematics

5

4

3

2

1

D D

Fonseca 14.1" DIS Schematics Document

rPGA988A Mobile Arrandale

Intel Ibex Peak-M

C C

2010-03-22

REV : -1

B B

DY : Nopop Component B_TPM:Use Lom TPM C_TPM:Use China TPM

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Cover Page

Fonseca 14.1" DIS

189Monday, March 22, 2010

1

-1

5

4

3

2

1

Project name: DF3-14D

Fonseca 14" DIS Block Diagram

Project code: 91.4GQ01.001 PCB P/N : 48.4GQ01.011

gDDR3 800MHz

D D

Clock Generator

SLG8SP585VTR

7

DDR III DIMM1 1333Mhz

Channel A

18

Intel Mobile CPU

PEG

Arrandale

ATI M92LP-S2

80,81,82,83

VRAM

64Mx16bx4 (512MB)

484,85

Revision : 09281 - 1

CPU DC/DC

ISL62883

INPUTS

+PWR_SRC

OUTPUTS

+VCC_CORE

47

Thermal & Fan

EMC4022

BTO(1)

39

Smart CARD Socket

BTO(2)

C C

PC CARD Socket

67

72

DDR III 1333Mhz

O2

OZ77CR6

Ricoh

1394 Connector

71

SD/SDHC/MMC Socket

BTO(3)

Power SW(NewCard)

TPS2231MRGPR

B B

HDD CONN

ODD CONN

USB Port x 2

WLAN Switch

71

72

59

63

64

INT2

SATA

X2

R5U242

New Card Connector

Free Fall Sensor

DE351DL

TCM (Option) ZTE, Jetway

DIMM2

34

USB2.0

32

USB2.0

19

72

40

36

Channel B

USB2.0

X1

PCIE

SMBus

INT1

SATA

USB2.0

LPC

rPGA988A

DMIx4

Intel PCH

Ibex Peak-M

12 USB 2.0/1.1 ports

10/100/1000Mb ETHERNET

High Definition Audio

4 SATA ports

6 PCIE ports

ACPI 1.1

LPC I/F

PCI/PCI BRIDGE

20~28

LPC

SPI

SPI FLASH 32Mb + 16Mb

FLASH 8Mb

8~14

14.1" eDP-LCD

BL Converter

USB2.0 SATA PCIE

HD AUDIO

62

35

LPC

eDP

54

Digital MIC

Module

Azalia CODEC

IDT 92HD81

OP AMP

30

MDC (Option)

Module

IO Board

LOM

ESW

BCM5761E

Display Port (B)

73

TLV320AIC3004

76

35

CRT

VSW

MAX4885EETG+

Display Port (C)

75

MIC Jack

HP Jack

2CH SPEAKER (1W/1W)

60

RJ11

76

IO Board

RJ45

76

IO Board

CRT CONN

75

X2

Bluetooth (Option)

Module

Camera (Option)

Module

USB Port x 2

IO Board

X2

1/2 Mini-Card

WLAN Module

Docking

E/Family

SYSTEM DC/DC

TPS51125

46

OUTPUTSINPUTS

55

+PWR_SRC

SYSTEM DC/DC

TPS51116

+3.3V_ALW

+5V_ALW

50

INPUTS OUTPUTS

+PWR_SRC

SYSTEM DC/DC

TPS51218

+1.5V_SUS

+0.75V_DDR_VTT

52

INPUTS OUTPUTS

+PWR_SRC +1.05V_VTT

SYSTEM LDO

RT9035

51

INPUTS OUTPUTS

74

+3.3V_SUS

SYSTEM LDO

73

RT9035

INPUTS OUTPUTS

+3.3V_SUS

SYSTEM DC/DC

76

TPS51511

INPUTS OUTPUTS

+PWR_SRC

BATTERY CHARGER

64

TI BQ24745

(AC, Battery Existence)

+1.8V_RUN

51

+1.8V_DELAY

86

+VCC_GFX_CORE

45

INPUTS OUTPUTS

A A

Int KB

KSI/KSO ECE1077

68

5

BC

PS2

ECTouchPad

MEC 5045

4

SIO Expander

BC

37 38

ECE 5028

WWAN Module

Finger Printer

AES2880

FP Board

3

2

(Option)

76IO Board

Title

78

Size Document Number Rev

Custom

Date: Sheet of

Mini-Card

+DC_IN_SS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Block Diagram

Fonseca 14.1" DIS

+PBATT

-1

289Thursday, March 18, 2010

1

-1

ADAPTER

5

4

3

2

1

Regulator

D D

ISL62883

47

+VCC_CORE

47

LDO

Switch

BATTERY

CHARGER BQ24745

C C

+PWR_SRC

+5V_ALW

+3V_ALW_2

46

TPS51218

52

TPS51511

86

TPS51116

50

TPS51125

46

+5V_ALW_2

46

+3.3V_ALW

+1.05V_VTT

52

+GPU_CORE86+1.1V_GFX_PCIE

86

46

+1.5V_SUS

SIR460DP

42

+1.5V_RUN

42

50

+0.75V_DDR_VTT

50

B B

A A

SI4800BDY

+5V_MOD

42

SI4800BDY

42

+5V_RUN

42

+15V_ALW

46

SI4800BDY

42

+CAMERA_VDD

42

73

SI3456DDV

35

+3.3V_LAN+3.3V_RUN

NJT4030PT1G

+1.2V_LOM

SI3456DDV

42

+3.3V_SUS

35

RT9035

51

+1.8V_RUN

51

42

RT9035

51

+1.8V_DEALY

51

SI3456DDV

42

+3.3V_ALW_PCH

5

4

3

2

SI2301CDS

42

+3.3V_DELAY

42

SI4800BDY

42

+1.5V_RUN_CPU

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

Power Diagram

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

1

42

of

389Thursday, March 18, 2010

of

389Thursday, March 18, 2010

of

389Thursday, March 18, 2010

-1

5

4

3 2

1

2.2K

H14

PCH_SMB_CLK

C8

PCH_SMB_DATA

D D

PCH

ibex Peak-M

C6

PCH_SML0CLK

G8

PCH_SML0DATA

E10G12

2.2K

KBC_SCL1 KBC_SDA1

A5

B6

LAN_SMBCLK

A50

LAN_SMBDAT

B53

C C

2.2K

+3.3V_ALW_PCH

2N7002 2N7002

+3.3V_ALW_PCH

2N7002 2N7002

EC

MEC5045

A7

CKG_SMBCLK

B7

CKG_SMBDAT

A2

DOCK_SMB_ALERT#

B4

DOCK_SMB_CLK

A3

DOCK_SMB_DAT

B B

B5

LCD_SMBCLK

A4

LCD_SMBDAT

A56

PBAT_SMBCLK

B59

PBAT_SMBDAT

B50

CHARGER_SMBCLK

A47

CHARGER_SMBDAT

B49

AUD_DOCK_SMBCLK

B48

A49 B52

5

AUD_DOCK_SMBDAT

CARD_SMBCLK CARD_SMBDAT

A A

2.2K

+3.3V_ALW

2N7002 2N7002

4

2.2K

+3.3V_RUN

10K

100 ohm

2.2K

+3.3V_ALW

2.2K

+3.3V_LAN

LOM

A3 SMB Addr=[XX]

BCM5761E

A4

Dummy Dummy

+3.3V_RUN

CLK Gen

32

SLG8SP585VTR

31

133

Docking

127 129

SMB Addr=[D2]

SMB Addr=[C4/72/70/48]

+LCDVDD

LCD Panel

13 12

3 4

10

BQ24745RHDR

9

(eDP Type)

Battery

connector

Charger

SMB Addr=[XX]

SMB Addr=[12]

+3.3V_RUN

ADC/DAC

8

TLV320AIC3004

9

ExpressCard

20

connector

19

SMB Addr=[30]

DIMM A(DM1)

202 200

DIMM B(DM2)

202 200

53 51

FFSensor

14

DE351DL

13

2

XDP1

XDP2

Dummy

SMB Addr=[A0]

SMB Addr=[A4]

SMB Addr=[3A]

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

A2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

SMBus Diagram

Fonseca 14.1" DIS

1

489Thursday, March 18, 2010

of

-1

5

4

3 2

1

Audio Block Diagram

Thermal Block Diagram

D D

HP0_PORT_A_L

HP0_PORT_A_R

VREFOUT_A_OR_F

HP1_PORT_B_L

DP1

DN1

C C

DP2

Thermal

DN2

SC470P50V3JN-2GP

MMBT3904-3-GP

CPU

MMBT3904-3-GP

Skin Anti-Parallel Diodes

EMC4022

DP3

DN3

DP4

DN4

SC470P50V3JN-2GP

MMBT3904-3-GP

DIMM

92HD81

VGA

HP1_PORT_B_R

PORT_C_L

PORT_C_R

VREFOUT_C

Codec

SPKR_PORT_D_L+

SPKR_PORT_D_L-

SPKR_PORT_D_R-

SPKR_PORT_D_R+

AUD_EXT_MIC_L

AUD_EXT_MIC_R

AUD_VREFOUT_B

AUD_HP_OUT_L

AUD_HP_OUT_R

AUD_SPK_L+

AUD_SPK_L-

AUD_SPK_R+

AUD_SPK_R-

0R3-0-U-V-GP

AUD_SPK_L+_R

AUD_SPK_L-_R

AUD_SPK_R+_R

AUD_SPK_R-_R

MIC

60

Earphone

60

SPEAKER

60

Anti-Parallel Diodes

THERMTRIP1#

THERMTRIP2#

DP5

DN5

CPU_ThermalTrip

PORT_E_L

PORT_E_R

PORT_F_L

PORT_F_R

SCD47U25V3KX-1GP

AUD_DOCK_MIC_IN_L

AUD_DOCK_MIC_IN_R

AUD_DOCK_HP_OUT_L_C

AUD_DOCK_HP_OUT_R_C

SC1U16V3KX-2GP

TLV320AIC3004

75

DAI_BCLK#

DAI_LRCK#

DAI_DO#

DAI_DI

DOCKING

DOCK HP

DOCK MIC

74

B B

PCH_ThermalTrip

THERMTRIP3#

A A

5

39

+3.3V_SUS

4

DMIC_CLK/GPIO1

DMIC0/GPIO2

AUD_DMIC_CLK

AUD_DMIC_IN0

30

0R2J-2-GP

2

SC1U10V3KX-3GP

Title

Size Document Number Rev

Date: Sheet

AUD_DMIC_CLK_G_C

33R2J-2-GP

A3

AUD_DMIC_IN0_C

AUDIO/THERMAL Diagram

Fonseca 14.1" DIS

Digital MIC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

589Thursday, March 18, 2010

1

50

of

-1

5

4

3 2

1

Processor StrappingPCH Strapping

Calpella Schematic Checklist Rev: 1.6

Name Schematics Notes

SPKR

D D

INIT3_3V# Internal pull-up. Leave as "No Connect"

GNT3#/ GPIO55

INTVRMEN

GNT0#, GNT1#

GNT2#/ GPIO53

C C

B B

A A

SPI_MOSI

NV_ALE

NV_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.

HDA_DOCK_EN# /GPIO[33]

HDA_SDO

HDA_SYNC

GPIO15

GPIO8

GPIO27

Reboot option at power-up

Internal weak Pull-down.

Default Mode:

Connect to Vcc3_3 with 8.2-kȍ ~ 10-kȍ weak

No Reboot Mode with TCO Disabled:

pull-up resistor.

Internal pull-up.

Default Mode: Low (0) = Top Block Swap Mode

Connect to ground with 4.7-kȍ weak pull-down resistor.

Note:

CRB uses a 1 kȍ ; do not stuff resistor

High (1) = Integrated VRM is enabled Low (0) = Integrated VRM is disabled Note:

CRB uses a 330-k resistor.

Leave both GNT0# and GNT1# floating. No pull up required

Default (SPI):

Connect GNT1# to ground with 1-kȍ pull-down resistor.

Boot from PCI:

Leave GNT0# Floating.

Connect both GNT0# and GNT1# to ground with 1-kȍ pull-down

Boot from LPC:

resistor.

Default -

= Configures DMI for ESI compatible operation (for servers only.

Low (0)

Not for mobile/desktops).

Connect to Vcc3_3 with 8.2-kȍ weak pull-up

Enable Intel Anti-Theft Technology:

resistor.

Disable Intel Anti-Theft Technology:

Left floating, no pull-down required.

Connect to +NVRAM_VCCQ with 8.2-kȍ weak

Enable Intel Anti-Theft Technology:

pull-up resistor [CRB has it pulled up with 1-kȍ no-stuff resistor] Leave floating (internal pull-down).

Disable Intel Anti-Theft Technology:

Flash Descriptor Security will be overridden.

Low (0):

Also, when this signals is sampled on the rising edge of PWROK then it will also disable Intel ME and its features.

High (1):

Security measure defined in the Flash Descriptor will be enabled. Platform design should provide appropriate pull-up or pull-down depending on the desired settings. If a jumper option is used to tie this signal to GND as required by the functional strap, the signal should be pulled low through a weak pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently.

Note:

Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.

Low (1) - Intel ME Crypto Transport Layer Security TLS) cipher suite with no confidentiality. High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentiality. Note: This is an unmuxed signal. This signal has a weak internal pull-down of 20Kȍ which is enabled when PWROK is low. Sampled at rising edge of RSMRST#. CRB has a 1K pull-up on this signal to +3.3VA rail.

Weak internal pull-up. Do not pull low. Sampled at rising edge of RSMRST#.

Do not connect (floating). Internal pull-up.

Default =

High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails.

5

Internal pull-up.

CRB recommends 1-kȍ pull-down for FD Override. There is an internal pull-up of 20 kȍ for HDA_DOCK_EN# which is only enabled at boot/reset for strapping functions.

4

Pin Name

CFG[4] Disabled - No Physical Display Port attached to

CFG[3]

CFG[0]

Strap Description Configuration (Default value for each bit is

DisplayPort Presence

PCI-Express Static Lane Reversal

PCI-Express Configuration Select1:0:

1 unless specified otherwise)

1:Embedded

Embedded DisplayPort.

Enabled - An external Display Port device is

0:

connected to the Embedded Display Port.

Normal Operation.

1:

Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

0:

Single PCI-Express Graphics Bifurcation enabled

PCIE Routing

LANE1

LANE2

LANE3

LANE4

LANE5

LANE6

LANE7

LANE8

WWAN

WLAN

PCMCIA

Express Card

None

10M/100M/1G LAN

Not available for HM55

2

Calpella Schematic Checklist Rev: 1.6

Default Value

1

USB Routing

USB

Pair

USB0 @ MB

0

USB1 @ MB

1

USB2 @ IO Board

2

USB3 @ IO Board

3

WLAN

4

Bluetooth

5

Not available for HM55

6

Not available for HM55

7

DOCKING PORT1

8

DOCKING PORT2

9

Finger Printer

10

Camera

11

PCCard/ SmartCard/ ExpCard

12

WWAN

13

Title

Table of Content

Size Document Number Rev

A3

Date: Sheet

Table of Content

Fonseca 14.1" DIS

Device

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

689Thursday, March 18, 2010

1

-1

of

-1

5

SSID = CLOCK

4

3

+3.3V_RUN

2

+3.3V_RUN

1

+3.3V_RUN +3.3V_RUN_CLKGEN

L702

1 2

0R0805-PAD-2-GP

12

C702

D D

C C

C702

DY

+1.05V_VTT

0R0805-PAD-2-GP

12

C710

DY

SC1U10V2KX-1GP

L701

1 2

SC1U10V2KX-1GP

DY

12

C703

DY

SC10U10V5ZY-1GP

12

C711

SC10U10V5ZY-1GP

12

C704

SCD1U16V2ZY-2GP

12

C712

SCD1U16V2ZY-2GP

CLK_PCIE_SATA#23

12

C705

12

C713

DREFCLK#23

CLKIN_DMI#23

CLKIN_DMI23

CLK_PCIE_SATA23

CLK_CPU_BCLK#23

CLK_CPU_BCLK23

12

C706

SCD1U16V2ZY-2GP

DREFCLK23

12

C707

SCD1U16V2ZY-2GP

12

C709

C708

SCD1U16V2ZY-2GP

+1.05V_RUN_CLKGEN_IO

-1.10/0310

SCD1U16V2ZY-2GP

DREFCLK# DREFCLK

CLKIN_DMI# CLKIN_DMI

CLK_PCIE_SATA# CLK_PCIE_SATA

CLK_CPU_BCLK# CLK_CPU_BCLK

U701

4 3

14 13

11 10

22 23

19 20

+3.3V_RUN_CLKGEN +1.05V_RUN_CLKGEN_IO

17

24

29

VDD_REF

VDD_SRC

VDD_CPU

DOT_96#

SLG8SP585VTR-GP

DOT_96

SRC_2# SRC_2

SRC_1/SATA# SRC_1/SATA

CPU_0# CPU_0

CPU_1# CPU_1

CKG_SMBDAT37

Q701

34

2

5

1

CKG_SMBCLK37

6

DMN66D0LDW-7-GP

-1.10/0310

1

15

18

5

VDD_27

VDD_DOT

VDD_SRC_IO

VDD_CPU_IO

CKPWRGD/PD#

REF_0/CPU_SEL

27MHZ

27MHZ_SS

CPU_STOP#

XTAL_IN

XTAL_OUT

SDA SCL

CLK_GPU27M_NSS

6

CLK_GPU_27M_SS

7

CPU_STOP#

16

CK_PWRGD

25

FSC

30

CLK_XTAL_IN

28

CLK_XTAL_OUT

27

CLK_SDATA

31

CLK_SCLK

32

R703 33R2J-2-GPR703 33R2J-2-GP

R704 10KR2J-3-GPR704 10KR2J-3-GP

23

1 2

+3.3V_RUN

12

1

RN702

RN702 SRN2K2J-1-GP

SRN2K2J-1-GP

4

CLK_SCLK

CLK_SDATA

1 2

DY

R709 0R2J-2-GP

1 2

DY

R710 0R2J-2-GP

Damping need to check series resistance

R705

1 2

33R2J-2-GP

CLK_SCLK_HDDFALL 40

CLK_SDATA_HDDFALL 40

12

C714

DY

SC4D7P50V2CN-1GP

CLK_GPU27M_NSS 81

12

EC703

EC703 SC10P50V2JN-4GP

SC10P50V2JN-4GP

CLK_GPU27M_SS 81

12

EC702

EC702 SC10P50V2JN-4GP

SC10P50V2JN-4GP

CLK_PCH_14M 23

GND

26

B B

+1.05V_VTT

12

R701

R701 4K7R2J-2-GP

4K7R2J-2-GP

DY

R707

R707 10KR2J-3-GP

10KR2J-3-GP

FSC

FSC 0 1

SPEED

5

133MHz

(Default)

100MHz

4

A A

12

33

12

2

12

21

X701

1 2

X-14D31818M-37GP

C715

C715 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

3

9

CLK_XTAL_OUTCLK_XTAL_IN

12

Main Source: 71.08585.003 (SLG8SP585VTR) 2nd Source: 71.93197.003 (ICS9LRS3197AKLFT) 3rd Source: 71.00875.D03 (RTM875N-632-VB-GRT)

C701

C701 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

2

CK_PWRGD

2N7002A-7-GP

Title

Clock Generator - SLG8SP585

Size Document Number Rev

A3

Date: Sheet

VSS_DOT

VSS_278VSS_SATA

VSS_SRC

VSS_CPU

VSS_REF

For EMI

+3.3V_RUN_CLKGEN

R706

R706 10KR2J-3-GP

10KR2J-3-GP

1 2

Q702

S D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

G

1

789Thursday, March 18, 2010

VR_CLKEN# 47

of

-1

SSID = CPU

5

4

3

2

1

D D

DMI_PTX_CRXN022 DMI_PTX_CRXN122 DMI_PTX_CRXN222 DMI_PTX_CRXN322

DMI_PTX_CRXP022 DMI_PTX_CRXP122 DMI_PTX_CRXP222 DMI_PTX_CRXP322

DMI_CTX_PRXN022 DMI_CTX_PRXN122 DMI_CTX_PRXN222 DMI_CTX_PRXN322

DMI_CTX_PRXP022 DMI_CTX_PRXP122 DMI_CTX_PRXP222 DMI_CTX_PRXP322

C C

FDI_INT

4

RN801

RN801 SRN1KJ-7-GP

1

2 3

SRN1KJ-7-GP

B B

A24 C23 B22 A21

B24 D23 B23 A22

D24 G24 F23 H23

D25 F24 E23 G23

E22 D21 D19 D18 G21 E19 F21 G18

D22 C21 D20 C18 G22 E20 F20 G19

F17 E17

C17

F18 D17

CPU1A

DMI_RX0# DMI_RX1# DMI_RX2# DMI_RX3#

DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3

DMI_TX0# DMI_TX1# DMI_TX2# DMI_TX3#

DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3

FDI_TX0# FDI_TX1# FDI_TX2# FDI_TX3# FDI_TX4# FDI_TX5# FDI_TX6# FDI_TX7#

FDI_TX0 FDI_TX1 FDI_TX2 FDI_TX3 FDI_TX4 FDI_TX5 FDI_TX6 FDI_TX7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

AUBURNDALE

1 OF 9

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

PEG_RX0# PEG_RX1# PEG_RX2#

DMI

PEG_RX3# PEG_RX4# PEG_RX5# PEG_RX6# PEG_RX7# PEG_RX8#

PEG_RX9# PEG_RX10# PEG_RX11# PEG_RX12# PEG_RX13# PEG_RX14# PEG_RX15#

PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5

Intel(R) FDI

PEG_RX6 PEG_RX7 PEG_RX8

PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15

PEG_TX0# PEG_TX1# PEG_TX2# PEG_TX3# PEG_TX4# PEG_TX5# PEG_TX6# PEG_TX7# PEG_TX8#

PEG_TX9# PEG_TX10# PEG_TX11# PEG_TX12# PEG_TX13# PEG_TX14# PEG_TX15#

PEG_TX0 PEG_TX1 PEG_TX2 PEG_TX3

PCI EXPRESS -- GRAPHICS

PEG_TX4 PEG_TX5 PEG_TX6 PEG_TX7 PEG_TX8

PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15

PEG_IRCOMP_R

B26 A26 B27

EXP_RBIAS

A25

PEG_CRX_GTX_N15

K35

PEG_CRX_GTX_N14

J34

PEG_CRX_GTX_N13

J33

PEG_CRX_GTX_N12

G35

PEG_CRX_GTX_N11

G32

PEG_CRX_GTX_N10

F34

PEG_CRX_GTX_N9

F31

PEG_CRX_GTX_N8

D35

PEG_CRX_GTX_N7

E33

PEG_CRX_GTX_N6

C33

PEG_CRX_GTX_N5

D32

PEG_CRX_GTX_N4

B32

PEG_CRX_GTX_N3

C31

PEG_CRX_GTX_N2

B28

PEG_CRX_GTX_N1

B30

PEG_CRX_GTX_N0

A31

PEG_CRX_GTX_P15

J35

PEG_CRX_GTX_P14

H34

PEG_CRX_GTX_P13

H33

PEG_CRX_GTX_P12

F35

PEG_CRX_GTX_P11

G33

PEG_CRX_GTX_P10

E34

PEG_CRX_GTX_P9

F32

PEG_CRX_GTX_P8

D34

PEG_CRX_GTX_P7

F33

PEG_CRX_GTX_P6

B33

PEG_CRX_GTX_P5

D31

PEG_CRX_GTX_P4

A32

PEG_CRX_GTX_P3

C30

PEG_CRX_GTX_P2

A28

PEG_CRX_GTX_P1

B29

PEG_CRX_GTX_P0

A30

PEG_CTX_GRX_C_N15 PEG_CTX_GRX_N15

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

R801

1 2

R802

1 2

49D9R2F-GP

750R2F-GP

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

C817 SCD1U10V2KX-4GPC817 SCD1U10V2KX-4GP C816 SCD1U10V2KX-4GPC816 SCD1U10V2KX-4GP C815 SCD1U10V2KX-4GPC815 SCD1U10V2KX-4GP C814 SCD1U10V2KX-4GPC814 SCD1U10V2KX-4GP C813 SCD1U10V2KX-4GPC813 SCD1U10V2KX-4GP C812 SCD1U10V2KX-4GPC812 SCD1U10V2KX-4GP C811 SCD1U10V2KX-4GPC811 SCD1U10V2KX-4GP C810 SCD1U10V2KX-4GPC810 SCD1U10V2KX-4GP C809 SCD1U10V2KX-4GPC809 SCD1U10V2KX-4GP C808 SCD1U10V2KX-4GPC808 SCD1U10V2KX-4GP C807 SCD1U10V2KX-4GPC807 SCD1U10V2KX-4GP C806 SCD1U10V2KX-4GPC806 SCD1U10V2KX-4GP C805 SCD1U10V2KX-4GPC805 SCD1U10V2KX-4GP C804 SCD1U10V2KX-4GPC804 SCD1U10V2KX-4GP C803 SCD1U10V2KX-4GPC803 SCD1U10V2KX-4GP C802 SCD1U10V2KX-4GPC802 SCD1U10V2KX-4GP

C828 SCD1U10V2KX-4GPC828 SCD1U10V2KX-4GP C823 SCD1U10V2KX-4GPC823 SCD1U10V2KX-4GP C871 SCD1U10V2KX-4GPC871 SCD1U10V2KX-4GP C832 SCD1U10V2KX-4GPC832 SCD1U10V2KX-4GP C827 SCD1U10V2KX-4GPC827 SCD1U10V2KX-4GP C822 SCD1U10V2KX-4GPC822 SCD1U10V2KX-4GP C831 SCD1U10V2KX-4GPC831 SCD1U10V2KX-4GP C826 SCD1U10V2KX-4GPC826 SCD1U10V2KX-4GP C821 SCD1U10V2KX-4GPC821 SCD1U10V2KX-4GP C830 SCD1U10V2KX-4GPC830 SCD1U10V2KX-4GP C825 SCD1U10V2KX-4GPC825 SCD1U10V2KX-4GP C820 SCD1U10V2KX-4GPC820 SCD1U10V2KX-4GP C829 SCD1U10V2KX-4GPC829 SCD1U10V2KX-4GP C824 SCD1U10V2KX-4GPC824 SCD1U10V2KX-4GP C819 SCD1U10V2KX-4GPC819 SCD1U10V2KX-4GP C818 SCD1U10V2KX-4GPC818 SCD1U10V2KX-4GP

PEG_CTX_GRX_P[0..15]

PEG_CTX_GRX_N[0..15]

PEG_CRX_GTX_N[0..15]

PEG_CRX_GTX_P[0..15]

PEG_CTX_GRX_N14PEG_CTX_GRX_C_N14 PEG_CTX_GRX_N13PEG_CTX_GRX_C_N13 PEG_CTX_GRX_N12PEG_CTX_GRX_C_N12 PEG_CTX_GRX_N11PEG_CTX_GRX_C_N11 PEG_CTX_GRX_N10PEG_CTX_GRX_C_N10 PEG_CTX_GRX_N9PEG_CTX_GRX_C_N9 PEG_CTX_GRX_N8PEG_CTX_GRX_C_N8 PEG_CTX_GRX_N7PEG_CTX_GRX_C_N7 PEG_CTX_GRX_N6PEG_CTX_GRX_C_N6 PEG_CTX_GRX_N5PEG_CTX_GRX_C_N5 PEG_CTX_GRX_N4PEG_CTX_GRX_C_N4 PEG_CTX_GRX_N3PEG_CTX_GRX_C_N3 PEG_CTX_GRX_N2PEG_CTX_GRX_C_N2 PEG_CTX_GRX_N1PEG_CTX_GRX_C_N1 PEG_CTX_GRX_N0PEG_CTX_GRX_C_N0

PEG_CTX_GRX_P15PEG_CTX_GRX_C_P15 PEG_CTX_GRX_P14PEG_CTX_GRX_C_P14 PEG_CTX_GRX_P13PEG_CTX_GRX_C_P13 PEG_CTX_GRX_P12PEG_CTX_GRX_C_P12 PEG_CTX_GRX_P11PEG_CTX_GRX_C_P11 PEG_CTX_GRX_P10PEG_CTX_GRX_C_P10 PEG_CTX_GRX_P9PEG_CTX_GRX_C_P9 PEG_CTX_GRX_P8PEG_CTX_GRX_C_P8 PEG_CTX_GRX_P7PEG_CTX_GRX_C_P7 PEG_CTX_GRX_P6PEG_CTX_GRX_C_P6 PEG_CTX_GRX_P5PEG_CTX_GRX_C_P5 PEG_CTX_GRX_P4PEG_CTX_GRX_C_P4 PEG_CTX_GRX_P3PEG_CTX_GRX_C_P3 PEG_CTX_GRX_P2PEG_CTX_GRX_C_P2 PEG_CTX_GRX_P1PEG_CTX_GRX_C_P1 PEG_CTX_GRX_P0PEG_CTX_GRX_C_P0

PEG_CTX_GRX_P[0..15] 80

PEG_CTX_GRX_N[0..15] 80

PEG_CRX_GTX_N[0..15] 80

PEG_CRX_GTX_P[0..15] 80

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU - PCIE/DMI/FDI (1/7)

Size Document Number Rev

A3

Date: Sheet

CPU - PCIE/DMI/FDI (1/7)

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

889Friday, March 19, 2010

of

-1

SSID = CPU

+1.05V_VTT

D D

CPU_CATERR#38

Place near U3801

-1.10/0318

C C

Processor Pullups

1 2

DY

R903 49D9R2F-GP

1 2

R906 49D9R2F-GPR906 49D9R2F-GP

1 2

DY

R908 68R2-GP

R912

8K2R2J-3-GP

+3.3V_RUN

+1.05V_VTT

12

MMBT3904-7-F-GP

12

C901

DY

SCD1U10V2KX-4GP

312

H_CATERR#

H_PROCHOT#

H_CPURST#

12

R913

R913 2K2R2J-2-GP

2K2R2J-2-GP

DY

Q901

DY

H_PWRGD25,58

H_CATERR#

DRAM_PWROK22

H_VTTPWRGD52

PLTRST1#21,58,80

Processor Compensation Signals

1 2

R902 20R2F-GPR902 20R2F-GP

1 2

R904 20R2F-GPR904 20R2F-GP

1 2

R905 49D9R2F-GPR905 49D9R2F-GP

1 2

R907 49D9R2F-GPR907 49D9R2F-GP

H_SKTOCC#37

H_PECI25

H_PROCHOT#47

H_THERMTRIP#25,39

H_CPURST#58

H_PM_SYNC22

R917

1 2

0R0402-PAD-2-GP

R919

1 2

0R0402-PAD-2-GP

1 2

R921

R921 1K5R2F-2-GP

1K5R2F-2-GP

5

12

R924

R924 750R2F-GP

750R2F-GP

4

H_COMP3

H_COMP2

H_COMP1

H_COMP0

H_SKTOCC#

H_CATERR#

H_PROCHOT#

H_THERMTRIP#

H_CPURST#

VCCPWRGOOD

VCCPWRGOOD_0

DRAM_PWROK

H_VTTPWRGD

H_PWRGD_XDP

PLT_RST#_R

AT23

AT24

G16

AT26

AH24

AK14

AT15

AN26

AK15

AP26

AL15

AN14

AN27

AK13

AM15

AM26

AL14

CPU1B

COMP3

COMP2

COMP1

COMP0

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

RESET_OBS#

PM_SYNC

VCCPWRGOOD_1

VCCPWRGOOD_0

SM_DRAMPWROK

VTTPWRGOOD

TAPPWRGOOD

RSTIN#

3

2 OF 9

A16

BCLK

B16

MISC

CLOCKS

AUBURNDALE

THERMAL PWR MANAGEMENT

DDR3

MISC

DDR3

MISC

JTAG & BPM

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

PM_EXT_TS0# PM_EXT_TS1#

PRDY#

PREQ#

TCK TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM0# BPM1# BPM2# BPM3# BPM4# BPM5# BPM6# BPM7#

AR30 AT30

E16 D16

A18 A17

F6

AL1 AM1 AN1

AN15 AP15

AT28 AP27

AN28 AP28 AT27

AT29

TDI

AR27 AR29 AP29

AN25

AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23

BCLK_CPU_P_R BCLK_CPU_N_R

BCLK_ITP_P_R BCLK_ITP_N_R

PEG_CLK_R PEG_CLK#_R

SM_DRAMRST#

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

PM_EXTTS#_R

XDP_PRDY# XDP_PREQ#

XDP_TCLK XDP_TMS XDP_TRST#

XDP_TDI_R XDP_TDO_R XDP_TDI_M XDP_TDO_M

H_DBR#_R

XDP_OBS0 XDP_OBS1 XDP_OBS2 XDP_OBS3 XDP_OBS4 XDP_OBS5 XDP_OBS6 XDP_OBS7

RN903 SRN0J-6-GP

1 2

R918 0R0402-PAD-2-GPR918 0R0402-PAD-2-GP

1 2 3

DY

R914 10KR2J-3-GPR914 10KR2J-3-GP

XDP_PRDY# 58

XDP_PREQ# 58

XDP_TCLK 58 XDP_TMS 58 XDP_TRST# 58

XDP_OBS0 58 XDP_OBS1 58 XDP_OBS2 58 XDP_OBS3 58 XDP_OBS4 58 XDP_OBS5 58 XDP_OBS6 58 XDP_OBS7 58H_PWRGD_XDP58

2

4

+1.05V_VTT

12

XDP_DBRESET#

BCLK_CPU_P_R 25 BCLK_CPU_N_R 25

BCLK_ITP_P 58 BCLK_ITP_N 58

PEG_CLK_R 23 PEG_CLK#_R 23

S D

12

R915

DY

100KR2J-1-GP

XDP_DBRESET# 22,38,58

G

Q902

0R2J-2-GP

12

2N7002A-7-GP

1 2

DY

R936

DDR_HVREF_RST_GATE 37

C903

C903 SCD047U10V2KX-2GP

SCD047U10V2KX-2GP

1 2

R934 1KR2J-1-GPR934 1KR2J-1-GP

12

C902

C902 SC470P50V2JN-GP

SC470P50V2JN-GP

DDR3 Compensation Signals

SM_RCOMP_0

R909 100R2F-L1-GP-UR909 100R2F-L1-GP-U

SM_RCOMP_1

R910 24D9R2F-L-GPR910 24D9R2F-L-GP

SM_RCOMP_2

R911 130R2F-1-GPR911 130R2F-1-GP

XDP_TMS

XDP_TDI_R

XDP_PREQ#

XDP_TCLK

1 2

R922 51R2J-2-GP

1 2

R923 51R2J-2-GP

1 2

R925 51R2J-2-GP

1 2

R926 51R2J-2-GP

1

DDR3_DRAMRST# 18,19

1 2

DY

+1.5V_SUS

+1.05V_VTT

B B

+3.3V_ALW_PCH

U901

SIO_SLP_S3#22,35,38,50

RUNPWROK37,38,58

1 2

R927 0R0402-PAD-2-GPR927 0R0402-PAD-2-GP

1 2

R920 0R0402-PAD-2-GPR920 0R0402-PAD-2-GP

SIO_SLP_S3#_C

RUNPWROK_C

U901

1

B

VCC

2

A

3

GND

74LVC1G08GW-1-GP

5

4

Y

12

R941

R941 0R2J-2-GP

0R2J-2-GP

DY

R937

R937 1K5R2F-2-GP

1K5R2F-2-GP

1 2

12

DRAM_PWROKDRAM_PWROK_R

R939

R939 750R2F-GP

750R2F-GP

A A

JTAG MAPPING

XDP_TDI_R

XDP_TDO_M

XDP_TDI_M

XDP_TDO_R

Scan Chain (Default) CPU Only

12

GMCH Only

1 2

R929 0R0402-PAD-2-GPR929 0R0402-PAD-2-GP

1 2

DY

R930 0R2J-2-GP

R901

R901 0R0402-PAD-2-GP

0R0402-PAD-2-GP

1 2

DY

R931 0R2J-2-GP

1 2

R932 0R0402-PAD-2-GPR932 0R0402-PAD-2-GP

Stuff --> R901, R929, R932 No Stuff --> R930, R931

Stuff --> R929, R930 No Stuff --> R901, R931, R932 Stuff --> R931, R932 No Stuff --> R929, R930, R901

Title

CPU Thermal/Clock/PM (2/7)

Size Document Number Rev

A3

Date: Sheet

CPU Thermal/Clock/PM (2/7)

XDP_TDI

XDP_TDO

Fonseca 14.1" DIS

XDP_TDI 58

XDP_TDO 58

XDP_TRST#

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

989Friday, March 19, 2010

12

of

R933

R933 51R2J-2-GP

51R2J-2-GP

-1

5

SSID = CPU

CPU1C

4

3 OF 9

3

CPU1D

2

4 OF 9

1

W8

SB_CK0

AA6

SA_CK0

AA7

SA_CK0#

M_A_DQ[63..0]18

D D

C C

B B

M_A_BS018 M_A_BS118 M_A_BS218

M_A_CAS#18 M_A_RAS#18 M_A_WE#18

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

A10

C10

B10

D10

E10

F10

H10

G10

AH5 AF5 AK6 AK7 AF6 AG5

AJ7 AJ6

AJ10

AJ9

AL10

AK12

AK8

AL7

AK11

AL8

AN8 AM10 AR11

AL11

AM9

AN9 AT11 AP12 AM12 AN12 AM13 AT14 AT12

AL13 AR14 AP14

AC3 AB2

AE1 AB3 AE9

SA_DQ0 SA_DQ1

C7

SA_DQ2

A7

SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6

A8

SA_DQ7

D8

SA_DQ8 SA_DQ9

E6

SA_DQ10

F7

SA_DQ11

E9

SA_DQ12

B7

SA_DQ13

E7

SA_DQ14

C6

SA_DQ15 SA_DQ16

G8

SA_DQ17

K7

SA_DQ18

J8

SA_DQ19

G7

SA_DQ20 SA_DQ21

J7

SA_DQ22

J10

SA_DQ23

L7

SA_DQ24

M6

SA_DQ25

M8

SA_DQ26

L9

SA_DQ27

L6

SA_DQ28

K8

SA_DQ29

N8

SA_DQ30

P9

SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

SA_BS0 SA_BS1

U7

SA_BS2

SA_CAS# SA_RAS# SA_WE#

AUBURNDALE

DDR SYSTEM MEMORY A

SA_CKE0

SA_CK1 SA_CK1# SA_CKE1

SA_CS0# SA_CS1#

SA_ODT0 SA_ODT1

SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7

SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7#

SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7

SA_MA0

SA_MA1

SA_MA2

SA_MA3

SA_MA4

SA_MA5

SA_MA6

SA_MA7

SA_MA8

SA_MA9

SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

P7

Y6 Y5 P6

AE2 AE8

AD8 AF9

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS#0M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_CLK_DDR0 18 M_CLK_DDR#0 18 M_CKE0 18

M_CLK_DDR1 18 M_CLK_DDR#1 18 M_CKE1 18

M_CS#0 18 M_CS#1 18

M_ODT0 18 M_ODT1 18

M_A_DM[7..0] 18

M_A_DQS#[7..0] 18

M_A_DQS[7..0] 18

M_A_A[15..0] 18

M_B_DQ[63..0]19

M_B_BS019 M_B_BS119 M_B_BS219

M_B_CAS#19 M_B_RAS#19 M_B_WE#19

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AF3

AG1

AK1 AG4 AG3

AH4

AK3

AK4 AM6 AN2

AK5

AK2 AM4 AM3

AP3 AN5

AT4 AN6 AN4 AN3

AT5

AT6 AN7

AP6

AP8

AT9

AT7

AP9

AR10

AT10

AB1

AC5

AC6

B5

SB_DQ0

A5

SB_DQ1

C3

SB_DQ2

B3

SB_DQ3

E4

SB_DQ4

A6

SB_DQ5

A4

SB_DQ6

C4

SB_DQ7

D1

SB_DQ8

D2

SB_DQ9

F2

SB_DQ10

F1

SB_DQ11

C2

SB_DQ12

F5

SB_DQ13

F3

SB_DQ14

G4

SB_DQ15

H6

SB_DQ16

G2

SB_DQ17

J6

SB_DQ18

J3

SB_DQ19

G1

SB_DQ20

G5

SB_DQ21

J2

SB_DQ22

J1

SB_DQ23

J5

SB_DQ24

K2

SB_DQ25

L3

SB_DQ26

M1

SB_DQ27

K5

SB_DQ28

K4

SB_DQ29

M4

SB_DQ30

N5

SB_DQ31 SB_DQ32 SB_DQ33

AJ3

SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37

AJ4

SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

SB_BS0

W5

SB_BS1

R7

SB_BS2

SB_CAS#

Y7

SB_RAS# SB_WE#

AUBURNDALE

SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7#

DDR SYSTEM MEMORY - B

SB_CK0#

SB_CKE0

SB_CK1

SB_CK1#

SB_CKE1

SB_CS0# SB_CS1#

SB_ODT0 SB_ODT1

SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7

SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

W9 M3

V7 V6 M2

AB8 AD6

AC7 AD1

D4 E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8

M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_CLK_DDR2 19 M_CLK_DDR#2 19 M_CKE2 19

M_CLK_DDR3 19 M_CLK_DDR#3 19 M_CKE3 19

M_CS#2 19 M_CS#3 19

M_ODT2 19 M_ODT3 19

M_B_DM[7..0] 19

M_B_DQS#[7..0] 19

M_B_DQS[7..0] 19

M_B_A[15..0] 19

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU - DDR (3/7)

Size Document Number Rev

A3

Date: Sheet

CPU - DDR (3/7)

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

10 89Friday, March 19, 2010

1

of

-1

5

4

3

2

1

SSID = CPU

D D

CPU Piin AJ13 and AJ12: Core voltage sense line. Via from PGA pad to the back of the MB and provide test point. Do not route any additional trace.

TP1118TP1118 TP1119TP1119

TP1120TP1120

TP1121TP1121

SO-DIMM VREFDQ (M3) Circuit for Clarksfield Processor

TP1116TP1116 TP1117TP1117

1 1

SA_DIMM_VREF# SB_DIMM_VREF#

AP25

AL25 AL24 AL22 AJ33

AG9 M27

L28

J17 H17 G25 G17

E31

E30

CPU1E

RSVD#AP25 RSVD#AL25 RSVD#AL24 RSVD#AL22 RSVD#AJ33 RSVD#AG9 RSVD#M27 RSVD#L28 SA_DIMM_VREF# SB_DIMM_VREF# RSVD#G25 RSVD#G17 RSVD#E31 RSVD#E30

RSVD#AJ13 RSVD#AJ12

RSVD#AH25 RSVD#AK26

RSVD#AL26

RSVD_NCTF#AR2

AUBURNDALE

RSVD#AJ26 RSVD#AJ27

5 OF 9

AJ13 AJ12

AH25 AK26

AL26 AR2

AJ26 AJ27

H_RSVD32 H_RSVD33

H_RSVD35

H_RSVD36

1 1

1

C C

CFG0

CFG3

B B

CFG4

CFG7

A A

12

R1102

R1102 3K01R2F-3-GP

3K01R2F-3-GP

DY

12

R1109

R1109 3K01R2F-3-GP

3K01R2F-3-GP

DY

12

R1103

R1103 3K01R2F-3-GP

3K01R2F-3-GP

DY

R1105

R1105 3K3R2J-3-GP

3K3R2J-3-GP

5

PCI-Express Configuration Select

1:Single PEG

CFG0

0:Bifurcation enabled

For Clarksfield

CFG3 - PCI-Express Static Lane Reversal

1 :Normal Operation

CFG3

0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

CFG4 - Display Port Presence

1:Disabled; No Physical Display Port

CFG4

attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port

CFG7(Reserved) - Temporarily used for early Clarksfield samples.

CFG7 Clarksfield (only for early samples pre-ES1) -

Connect to GND with 3.01K Ohm/5% resistor.

Note: Only temporary for early CFD sample (rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a common M/B design (for AUB and CFD), the pull-down resistor shouble be used. Does not impact AUB functionality.

4

TP1101TP1101 TP1102TP1102

TP1103TP1103 TP1104TP1104

TP1105TP1105 TP1106TP1106 TP1107TP1107 TP1108TP1108 TP1109TP1109 TP1110TP1110 TP1111TP1111 TP1112TP1112 TP1113TP1113 TP1114TP1114

CFG0

AM30 AM28 AP31

AL32

AL30 AM31 AN29 AM32 AK32 AK31 AK28

AJ28 AN30 AN32

AJ32

AJ29

AJ30 AK30

H16

B19 A19

A20 B20

AC9

AB9

J29 J28

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 RSVD_TP#H16

RSVD#B19 RSVD#A19

RSVD#A20 RSVD#B20

U9

RSVD#U9

T9

RSVD#T9

RSVD#AC9 RSVD#AB9

RSVD#J29 RSVD#J28

RSVD_TP#E15 RSVD_TP#F15

RESERVED

RSVD_TP#AA5 RSVD_TP#AA4

RSVD_TP#R8 RSVD_TP#AD3 RSVD_TP#AD2

RSVD_TP#AA2 RSVD_TP#AA1

RSVD_TP#R9 RSVD_TP#AG7

RSVD_TP#AE3

RSVD_TP#V4

RSVD_TP#V5

RSVD_TP#N2 RSVD_TP#AD5 RSVD_TP#AD7

RSVD_TP#W3 RSVD_TP#W2

RSVD_TP#N3

RSVD_TP#AE5

RSVD_TP#AD9

3

CFG1

1

CFG2

1

CFG3 CFG4 CFG5

1

CFG6

1

CFG7 CFG8

1

CFG9

1

CFG10

1

CFG11

1

CFG12

1

CFG13

1

CFG14

1

CFG15

1

CFG16

1

CFG17

1

RSVD#AL28 RSVD#AL29 RSVD#AP30 RSVD#AP32 RSVD#AL27 RSVD#AT31 RSVD#AT32 RSVD#AP33 RSVD#AR33

RSVD#AR32

RSVD#D15

RSVD#C15 RSVD#AJ15 RSVD#AH15

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33

AR32

E15 F15 A2

KEY

D15 C15 AJ15 AH15

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

VSS

VSS (AP34) can be left NC is CRB implementation; EDS/DG recommendation to GND.

RSVD_VSS

1 2

0R0402-PAD-2-GP

R1117

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

2

Date: Sheet

CPU - Reserve (4/7)

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

11 89Friday, March 19, 2010

1

-1

of

5

SSID = CPU

4

CPU1F

3

6 OF 9

2

1

+VCC_CORE

PROCESSOR CORE POWER

+VCC_CORE

D D

C C

B B

A A

C1210

12

SC10U10V5KX-2GP

C1220

12

SC22U6D3V5MX-2GP

C1226

12

SC10U6D3V5KX-1GP

C1201

12

SC22U6D3V5MX-2GP

DY

C1212

C1211

12

C1221

C1227

C1236

SC22U6D3V5MX-2GP

SC10U10V5KX-2GP

C1222

12

SC22U6D3V5MX-2GP

C1228

12

SC10U10V5KX-2GP

SC10U6D3V5KX-1GP

C1237

12

SC10U6D3V5MX-3GP

DY

5

C1214

C1215

C1213

12

SC22U6D3V5MX-2GP

C1223

12

SC10U6D3V5KX-1GP

C1229

12

SC10U10V5KX-2GP

C1238

12

SC10U6D3V5KX-1GP

C1215

12

SC22U6D3V5MX-2GP

C1225

C1224

12

C1230

C1239

SC10U10V5KX-2GP

SC10U6D3V5KX-1GP

C1231

C1232

12

SC10U10V5KX-2GP

C1240

SC10U10V5KX-2GP

C1241

12

SC22U6D3V5MX-2GP

SC10U10V5KX-2GP

12

SC10U6D3V5KX-1GP

12

C1233

C1242

48A

SC10U10V5KX-2GP

4

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26

AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27

AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

Y35

VCC

Y34

VCC

Y33

VCC

Y32

VCC

Y31

VCC

Y30

VCC

Y29

VCC

Y28

VCC

Y27

VCC

Y26

VCC

V35

VCC

V34

VCC

V33

VCC

V32

VCC

V31

VCC

V30

VCC

V29

VCC

V28

VCC

V27

VCC

V26

VCC

U35

VCC

U34

VCC

U33

VCC

U32

VCC

U31

VCC

U30

VCC

U29

VCC

U28

VCC

U27

VCC

U26

VCC

R35

VCC

R34

VCC

R33

VCC

R32

VCC

R31

VCC

R30

VCC

R29

VCC

R28

VCC

R27

VCC

R26

VCC

P35

VCC

P34

VCC

P33

VCC

P32

VCC

P31

VCC

P30

VCC

P29

VCC

P28

VCC

P27

VCC

P26

VCC

AUBURNDALE

1.1V RAIL POWER

CPU CORE SUPPLY

PROC_DPRSLPVR

CPU VIDS

POWER

VTT_SELECT

VSS_SENSE_VTT

SENSE LINES

VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0

VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0

PSI#

VID0 VID1 VID2 VID3 VID4 VID5 VID6

ISENSE

VCC_SENSE VSS_SENSE

VTT_SENSE

3

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

AN33

H_VID0

AK35

H_VID1

AK33

H_VID2

AK34

H_VID3

AL35

H_VID4

AL33

H_VID5

AM33

H_VID6

AM35 AM34

H_VTTVID1

G15

Arrandale drives this pin High for 1.05V Clarksfield drives this pin Low for 1.1V

CPU_IMON_R

AN35

VCC_SENSE_R

AJ34

VSS_SENSE_R

AJ35

VTT_SENSE_R

B15

TP_VSS_SENSE_VTT

A15

12

C1202

SC10U10V5KX-2GP

C1234

SC10U10V5KX-2GP

1

12

C1204

C1203

SC10U10V5KX-2GP

12

PSI# 47

H_VID[6..0] 47

PM_DPRSLPVR 47

TP1201TP1201

0R0402-PAD-2-GP

1 2

R1206

R1206 0R2J-2-GP

0R2J-2-GP

1 2

DY

TP1202TP1202

12

C1205

SC10U10V5KX-2GP

C1217

SC22U6D3V5MX-2GP

12

C1235

C1235 SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

R1205

12

C1206

SC10U10V5KX-2GP

12

C1218

SC10U10V5KX-2GP

VTT_SENSE 52

2

12

SC10U10V5KX-2GP

12

C1219

SC10U10V5KX-2GP

CPU_IMON 39,47

DY

R1207

27D4R2F-L1-GP

C1216

SC10U10V5KX-2GP

12

+1.05V_VTT

12

C1207

SC10U6D3V5KX-1GP

+1.05V_VTT

C1208

C1209

SC10U6D3V5KX-1GP

SC10U10V5KX-2GP

DY

The decoupling capacitors, filter recommendations and sense resistors on the CPU/PCH Rails are specific to the CRB Implementation. Customers need to follow the recommendations in the Calpella Platform Design Guide.

12

Please note that The VTT Rail values are Arrandale for VTT=1.05V Clarksfield for VTT=1.1V

+VCC_CORE

12

R1202

R1202 100R2F-L1-GP-U

100R2F-L1-GP-U

12

R1204

R1204 100R2F-L1-GP-U

100R2F-L1-GP-U

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

CPU - VCC_CORE (5/7)

R1208

DY

27D4R2F-L1-GP

12

+1.05V_VTT

12

R1203

0R0402-PAD-2-GP

1 2 1 2

R1201

0R0402-PAD-2-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

1

VCC_SENSE 47 VSS_SENSE 47

VSS_SENSE_R 47

of

12 89Friday, March 19, 2010

-1

5

4

3

2

1

SSID = CPU

7 OF 9

CPU1G

AT21

VAXG1

AT19

VAXG2

D D

C C

+1.05V_VTT

12

C1316

SC10U10V5KX-2GP

+1.05V_VTT

B B

18A

C1320

C1321

12

SC10U10V5KX-2GP

C1322

12

SC10U10V5KX-2GP

12

C1317

C1317 SC10U10V5KX-2GP

SC10U10V5KX-2GP

C1323

12

SC22U6D3V5MX-2GP

AT18 AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16

AL21 AL19 AL18

AL16 AK21 AK19 AK18 AK16

AJ21

AJ19

AJ18

AJ16 AH21 AH19 AH18 AH16

H25

K26

H27 G28 G27 G26 F26 E26 E25

VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36

J24

VTT1

J23

VTT1 VTT1

VTT1

J27

VTT1

J26

VTT1

J25

VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1

GRAPHICS

SENSE

AUBURNDALE

GRAPHICS VIDs

FDI PEG & DMI

POWER

7 OF 9

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 GFX_VID5 GFX_VID6

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VTT1 VTT1 VTT1 VTT1

VTT1 VTT1 VTT1 VTT1 VTT1 VTT1

VTT1 VTT1 VTT1

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

AR25 AT25 AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10

J22 J20 J18 H21 H20 H19

L26 L27 M26

GFX_IMON_R

VAXG_SENSE

VSSAXG_SENSE

LINES

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

DDR3 - 1.5V RAILS

1.1V1.8V

VCCPLL VCCPLL VCCPLL

1 2

1KR2J-1-GP

12

C1309

SC1U10V2KX-1GP

C1318

SC22U6D3V5MX-2GP

SC10U10V5KX-2GP

C1318

C1324

1.35A

R1301

12

DY

C1310

12

C1311

SC1U6D3V2KX-GP

12

C1319

C1319 SC10U10V5KX-2GP

SC10U10V5KX-2GP

12

C1325

C1325 SC10U10V5KX-2GP

SC10U10V5KX-2GP

12

C1326

C1327

SC1U25V5KX-1GP

12

C1312

SC1U10V2KX-1GP

12

C1328

SC4D7U6D3V3KX-GP

12

C1313

SC1U10V2KX-1GP

+1.05V_VTT

12

C1329

SC2D2U10V5KX-2GP

12

C1314

SC10U6D3V5KX-1GP

DY

12

C1330

SC22U6D3V5MX-2GP

3A

12

C1315

SC22U6D3V5MX-2GP

+1.8V_RUN

+1.5V_RUN_CPU

TC1304

TC1304 SE330U2VDM-L-GP

SE330U2VDM-L-GP

Please note that the VTT Rail Values Arrandale for VTT=1.05V Clarksfield for VTT=1.1V

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU - GFXCORE (6/7)

Size Document Number Rev

A3

Date: Sheet

CPU - GFXCORE (6/7)

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

13 89Friday, March 19, 2010

1

of

-1

5

4

3

2

1

SSID = CPU

8 OF 9

CPU1H

AT20

VSS

AT17

VSS

AR31

VSS

AR28

VSS

AR26

VSS

AR24

VSS

AR23

VSS

D D

C C

B B

AR20 AR17 AR15 AR12

AR9 AR6

AR3 AP20 AP17 AP13 AP10

AP7

AP4

AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11

AM8

AM5

AM2

AL34 AL31 AL23 AL20 AL17 AL12

AK29 AK27 AK25 AK20 AK17

AJ31 AJ23 AJ20 AJ17 AJ14 AJ11

AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13

AH9

AH6

AH3 AG10

AF8

AF4

AF2 AE35

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AL9

VSS

AL6

VSS

AL3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AJ8

VSS

AJ5

VSS

AJ2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AUBURNDALE

VSS

8 OF 9

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

G34 G31 G20

K27

J32 J30 J21 J19 H35 H32 H28 H26 H24 H22 H18 H15 H13 H11

F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11

D33 D30 D26

C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11

A29 A27 A23

9 OF 9

CPU1I

VSS

K9

VSS

K6

VSS

K3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H8

VSS

H5

VSS

H2

VSS VSS VSS VSS

G9

VSS

G6

VSS

G3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

E8

VSS

E5

VSS

E2

VSS VSS VSS VSS

D9

VSS

D6

VSS

D3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

B8

VSS

B6

VSS

B4

VSS VSS VSS VSS

A9

VSS

AUBURNDALE

VSS

NCTF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,

AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35

NCTF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,

AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35

9 OF 9

VSS_NCTF#AR34

VSS_NCTF#B34

VSS_NCTF#B2

VSS_NCTF#B1 VSS_NCTF#A35 VSS_NCTF#AT1

VSS_NCTF#AT35 RSVD_NCTF#AT33 RSVD_NCTF#AT34 RSVD_NCTF#AP35

RSVD_NCTF#AR35

RSVD_NCTF#AT3 RSVD_NCTF#AR1 RSVD_NCTF#AP1 RSVD_NCTF#AT2

RSVD_NCTF#C1

RSVD_NCTF#A3

RSVD_NCTF#C35

RSVD_NCTF#B35 RSVD_NCTF#A34 RSVD_NCTF#A33

AR34 B34 B2

B1 A35 AT1 AT35 AT33 AT34 AP35 AR35 AT3 AR1 AP1 AT2 C1 A3 C35 B35 A34 A33

AT34

B35AT35 AR35

2X3X

NCTF

CPU1, Board Top View

1 1 1 1

1

1 1 1

1

1X

C1 B1

TP1401TP1401 TP1404TP1404 TP1410TP1410 TP1407TP1407

TP1409TP1409

TP1408TP1408

TP1412TP1412

TP1411TP1411 TP1402TP1402 TP1403TP1403

TP1405TP1405

4X

AT2

AT1

AR1

TP_MCP_VSS_NCTFB1 TP_MCP_VSS_NCTFA35 TP_MCP_VSS_NCTFAT1 TP_MCP_VSS_NCTFAT35

TP_MCP_VSS_NCTFAT34

TP_MCP_VSS_NCTFAR35

TP_MCP_VSS_NCTFAR1

TP_MCP_VSS_NCTFAT2 TP_MCP_VSS_NCTFC1 TP_MCP_VSS_NCTFA3

TP_MCP_VSS_NCTFA34

All NCTF pins should be Test Points and should be routed as trace.

A35

A34

A3

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU - VSS (7/7)

Size Document Number Rev

A3

Date: Sheet

CPU - VSS (7/7)

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

14 89Friday, March 19, 2010

1

of

-1

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Reserve

Fonseca 14.1" DIS

15 89Thursday, March 18, 2010

1

-1

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Reserve

Fonseca 14.1" DIS

16 89Thursday, March 18, 2010

1

-1

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Reserve

Fonseca 14.1" DIS

17 89Thursday, March 18, 2010

1

-1

5

SSID = Memory

D D

M_A_BS210

M_A_BS010 M_A_BS110

C C

+V_DDR_MCH_REF

1 2

R1807

0R0603-PAD-2-GP

+V_DDR_MCH_REF

0R0603-PAD-2-GP

B B

Place these caps close to VTT1 and VTT2.

A A

0R0603-PAD-2-GP

+0.75V_DDR_VTT

C1823

SCD1U10V2KX-5GP

1 2

R1808

SCD1U10V2KX-5GP

12

R1809

R1809 0R0603-PAD-2-GP

0R0603-PAD-2-GP

12

C1824

SC1U10V2KX-1GP

5

C1811

C1820

12

C1825

MA_VTT

SC1U10V2KX-1GP

M_VREF_CA_DIMM 1

12

M_VREF_DQ_DIMM1

12

C1826

SC1U10V2KX-1GP

12

C1812

C1812 SC2D2U16V3KX-GP

SC2D2U16V3KX-GP

12

C1821

C1821 SC2D2U16V3KX-GP

SC2D2U16V3KX-GP

Place between DM1 and DM2.

+0.75V_DDR_VTT

12

M_A_DQ[63..0]10

12

C1822

C1822 SC10U10V5KX-2GP

SC10U10V5KX-2GP

M_ODT010 M_ODT110

DDR3_DRAMRST#9,19

4

M_VREF_CA_DIMM 1 M_VREF_DQ_DIMM1

MA_VTT

62.10017.N61

4

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

DM1

98 97 96 95 92 91 90 86 89 85

107

84 83

119

80 78 79

109 108

5

7 15 17

4

6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70

129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

10 27 45 62

135 152 169 186

12 29 47 64

137 154 171 188

116 120

126

1

30

203 204

SO-DIMMA H = 9.2mm

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2

BA0 BA1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

VREF_CA VREF_DQ

RESET#

VTT1 VTT2

DDR3-204P-42-GP

RAS#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

NP1 NP2

WE#

CK0

CK1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA

SCL

SA0 SA1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NP1 NP2

110 113 115

114 121

73 74

101 103

102 104

11 28 46 63 136 153 170 187

200 202

198

199

197 201

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206

3

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

SODIMM1_1_SMB_DATA_R SODIMM1_1_SMB_CLK_R

SA0_DIMM1 SA1_DIMM1

+1.5V_SUS

Main:62.10017.N61

2nd:62.10017.F91

3

M_A_RAS# 1 0 M_A_WE# 10 M_A_CAS# 1 0

M_CS#0 10 M_CS#1 10

M_CKE0 10 M_CKE1 10

M_CLK_DDR0 10 M_CLK_DDR#0 10

M_CLK_DDR1 10 M_CLK_DDR#1 10

12

C1802

C1803

SCD1U10V2KX-5GP

DY

2

M_A_DM[7..0] 10

M_A_DQS#[7..0] 10

M_A_DQS[7..0] 10

M_A_A[15..0] 10

SA0_DIMM1

SA1_DIMM1

R1803

0R0402-PAD-2-GP

1 2

R1804 0R0402-PAD-2-GPR1804 0R0402-PAD-2-GP

1 2

R1805 0R0402-PAD-2-GPR1805 0R0402-PAD-2-GP

1 2

+3.3V_RUN

SC2D2U16V3KX-GP

+1.5V_SUS

0904 SA

Layout Note: Place these Caps near SO-DIMMA.

Near Memory +1.5V_SUS Plane

2

PCH_SMBDATA_MEM 19,23,40,58 PCH_SMBCLK_MEM 19,23,40,58

SODIMM A DECOUPLING

C1804

TC1801

SC10U6D3V3MX-GP

SE330U2VDM-L-GP

12

DY

C1814

C1813

SCD1U10V2KX-5GP

SCD1U16V2KX-3GP

12

C1827

C1828

C1829

C1830

+3.3V_RUN

12

R1802

R1802 10KR2J-3-GP

10KR2J-3-GP

DY

R1801

R1801 0R0402-PAD-2-GP

0R0402-PAD-2-GP

1 2

C1806

C1807

C1805

C1815

1 2

DY

1 2

DY

1 2

DY

1 2

DY

C1807

C1808

SC10U6D3V3MX-GP

12

C1816

SCD1U16V2KX-3GP

12

SCD1U16V2ZY-2GP

Custom

SC10U6D3V3MX-GP

12

C1817

SC1U10V2KX-1GP

12

+1.5V_RUN_CPU+1.5V_SUS

DDR III Socket - DM1

SC10U6D3V3MX-GP

SCD1U16V2KX-3GP

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

1

Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA2 SO-DIMMA TS Address is 0x32

C1809

C1801

SC10U6D3V3MX-GP

12

C1818

SC1U10V2KX-1GP

12

Near CPU +1.5V_RUN Plane

Fonseca 14.1" DIS

C1810

SC10U6D3V3MX-GP

C1819

SC10U6D3V3MX-GP

12

SC1U10V2KX-1GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

12

DY

12

18 89Thursday, March 18, 2010

1

-1

of

5

SSID = Memory

D D

M_B_BS210

M_B_BS010 M_B_BS110

C C

+V_DDR_MCH_REF

1 2

R1907

0R0603-PAD-2-GP

+V_DDR_MCH_REF

1 2

0R0603-PAD-2-GP

B B

A A

Place these caps close to VTT1 and VTT2.

5

C1904

SCD1U10V2KX-5GP

R1908

C1913

SCD1U10V2KX-5GP

C1922

SC1U10V2KX-1GP

12

C1923

M_VREF_CA_DIMM 2

12

M_VREF_DQ_DIMM2

12

0R0603-PAD-2-GP

12

C1924

SC1U10V2KX-1GP

12

C1905

C1905 SC2D2U16V3KX-GP

SC2D2U16V3KX-GP

12

C1914

C1914 SC2D2U16V3KX-GP

SC2D2U16V3KX-GP

+0.75V_DDR_VTT

R1909

12

C1925

SC1U10V2KX-1GP

12

DDR3_DRAMRST#9,18

12

4

SO-DIMMB

DM2

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ[63..0]10

M_ODT210 M_ODT310

4

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_VREF_CA_DIMM 2 M_VREF_DQ_DIMM2

MB_VTT

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-48-GP

62.10017.P41

H = 5.2mm

RAS#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

NP1 NP2

WE#

CK0

CK1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA

SCL

SA0 SA1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

3

NP1 NP2

110 113 115

114 121

73 74

101 103

102 104

M_B_DM0

11

M_B_DM1

28

M_B_DM2

46

M_B_DM3

63

M_B_DM4

136

M_B_DM5

153

M_B_DM6

170

M_B_DM7

187

SODIMM2_1_SMB_DATA_R

200

SODIMM2_1_SMB_CLK_R

202

198

199

SA0_DIMM2

197

SA1_DIMM2

201

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206

Main:62.10017.P41

2nd:62.10017.F81

3

+1.5V_SUS

M_B_RAS# 1 0 M_B_WE# 10 M_B_CAS# 1 0

M_CS#2 10 M_CS#3 10

M_CKE2 10 M_CKE3 10

M_CLK_DDR2 10 M_CLK_DDR#2 10

M_CLK_DDR3 10 M_CLK_DDR#3 10

12

C1902

SCD1U10V2KX-5GP

DY

R1905 0R0402-PAD-2-GPR1905 0R0402-PAD-2-GP R1906 0R0402-PAD-2-GPR1906 0R0402-PAD-2-GP

C1903

SC2D2U16V3KX-GP

Layout Note: Place these Caps near SO-DIMMB.

Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34

SO-DIMMB is placed farther from the Processor than SO-DIMMA

M_B_DM[7..0] 10

M_B_DQS#[7..0] 10

M_B_DQS[7..0] 10

M_B_A[15..0] 10

1 2 1 2

+1.5V_SUS

2

+3.3V_RUN

SODIMM B DECOUPLING

C1901

C1906

SC10U6D3V3MX-GP

12

C1915

SCD1U10V2KX-5GP

12

DY

2

SC10U6D3V3MX-GP

C1916

C1907

SC10U6D3V3MX-GP

12

C1917

SCD1U10V2KX-5GP

12

1

+3.3V_RUN

12

R1902

R1902 10KR2J-3-GP

10KR2J-3-GP

SA1_DIMM2

SA0_DIMM2

R1903

0R0402-PAD-2-GP

1 2

PCH_SMBDATA_MEM 18,23,40,58 PCH_SMBCLK_MEM 18,23,40,58

C1910

C1909

C1908

SC10U6D3V3MX-GP

12

C1918

SCD1U16V2KX-3GP

12

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

SC10U6D3V3MX-GP

Custom

12

C1919

C1911

SC10U6D3V3MX-GP

12

C1920

SC1U10V2KX-1GP

12

R1904

R1904 0R2J-2-GP

0R2J-2-GP

DY

1 2

C1912

SC10U6D3V3MX-GP

12

DY

C1921

SC1U10V2KX-1GP

12

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DDR III Socket - DM2

Fonseca 14.1" DIS

1

-1

of

19 89Thursday, March 18, 2010

5

4

3

2

1

SSID = PCH

4 OF 10

PCH1D

T48

L_BKLTEN

T47

D D

C C

B B

12

R2019

R2019 1KR2J-1-GP

1KR2J-1-GP

CRT_IREF

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M-GP-NF

LVDS

Digital Display Interface

CRT

4 OF 10

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH - LVDS/CRT/DDI (1/9)

Size Document Number Rev

Date: Sheet

PCH - LVDS/CRT/DDI (1/9)

A3

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

20 89Thursday, March 18, 2010

1

of

-1

5

SSID = PCH

RN2102

PCI_REQ0# PCH_PIRQF# INT_PIRQB# PCI_PLOCK#

D D

+3.3V_RUN

PCI_FRAME# PCI_DEVSEL# INT_PIRQD#

+3.3V_RUN

C C

B B

A A

12

R2120

1KR2J-1-GP

DY

RN2102

1 2 3 4 5 6

SRN8K2J-2-GP-U

RN2101

1 2 3 4 5 6

SRN8K2J-2-GP-U

RN2103

PCI_GNT0#

PCI_GNT1#

1KR2J-1-GP

FFS_PCH_INT

8

PCIE_MCARD2_DET#

7

LVDS_CBL_DET#

6

BT_DET#

CAM_MIC_CBL_DET#

5

1 2 3 4 5

SRN8K2J-4-GP

1 2

R2108 100KR2J-1-GPR2108 100KR2J-1-GP

1 2

R2124 100KR2J-1-GPR2124 100KR2J-1-GP

12

R2121

DY

+3.3V_RUN

10

PCI_REQ1#

9

PCI_SERR#

8

PCI_TRDY#

7

PCI_PERR#

+3.3V_RUN

10

INT_PIRQA#

9

INT_PIRQC#

8

PCI_STOP#

7

PCI_ IRDY#

PCI_PLTRST#

RN2107

SRN22-3-GP

CLK_PCI_502838 CLK_PCI_EC37 CLK_PCI_DOCK74

2 3 1

BOOT BIOS Strap

PCI_GNT#0

PCI_GNT#1

BOOT BIOS Location

0 0 LPC

0 1 Reserved (NAND)

PCI

01

SPI(Default)

11

PCI_GNT[3:0]#: Internal pull high during Strap

4

+3.3V_ALW_PCH

147

U2101A

1

2

TSLVC08APW-1-GP

147

U2101B

4

5

TSLVC08APW-1-GP

147

U2101C

9

10

TSLVC08APW-1-GP

147

U2101D

12

13

TSLVC08APW-1-GP

LVDS_CBL_DET#54

CAM_MIC_CBL_DET#73

4

CLK_PCI_LOOPBACK23

4

FFS_INT137,40

3

6

8

11

For WWAN

RN2105

2 3 1

PCI_GNT3#

4

SRN33J-5-GP-U

RN2106

4

SRN33J-5-GP-U

PCIE_MCARD2_DET#76

1 2

R2110

0R0402-PAD-2-GP

PCI_PLTRST#

R2117 22R2J-2-GP

R2115 22R2J-2-GPR2115 22R2J-2-GP

1 2

R2122 4K7R2J-2-GP

TP2102TP2102

TP2104TP2104

TP2105TP2105

1 2

Dock

1 2

DY

PLTRST1# 9,58,80 PLTRST2# 32,34,58,72

PLTRST3# 37,38,70 PLTRST4# 35,64,76

PCIE_MCARD2_DET#

BT_DET#73

1

CLK_PCI_LOOPBACK_R

3

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

PCI_REQ0# PCI_REQ1#

BT_DET#

PCI_GNT0# PCI_GNT1# PCI_GNT2# PCI_GNT3#

LVDS_CBL_DET#

PCH_PIRQF#

CAM_MIC_CBL_DET#

FFS_PCH_INT

PCIRST#

PCI_SERR# PCI_PERR#

PCI_ IRDY#

PCI_DEVSEL# PCI_FRAME#

PCI_PLOCK#

PCI_STOP# PCI_TRDY#

PCH_PME#

CLK_PCI_5028_R CLK_PCI_EC_R CLK_PCI_DOCK_R

3

PCH1E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1#/GPIO50

B45

REQ2#/GPIO52

M53

REQ3#/GPIO54

F48

GNT0#

K45

GNT1#/GPIO51

F36

GNT2#/GPIO53

H53

GNT3#/GPIO55

B41

PIRQE#/GPIO2

K53

PIRQF#/GPIO3

A36

PIRQG#/GPIO4

A48

PIRQH#/GPIO 5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IBEXPEAK-M-GP-NF

A16 swap override Strap/Top-Block Swap Override jumper

PCI_GNT#3 Low = A16 swap

override/Top-Block Swap Override enabled High = Default

PCI

NVRAM

USB

5 OF 10

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_DQ0/NV_IO0 NV_DQ1/NV_IO1 NV_DQ2/NV_IO2 NV_DQ3/NV_IO3 NV_DQ4/NV_IO4 NV_DQ5/NV_IO5 NV_DQ6/NV_IO6 NV_DQ7/NV_IO7 NV_DQ8/NV_IO8

NV_DQ9/NV_IO9 NV_DQ10/NV_IO10 NV_DQ11/NV_IO11 NV_DQ12/NV_IO12 NV_DQ13/NV_IO13 NV_DQ14/NV_IO14 NV_DQ15/NV_IO15

NV_ALE NV_CLE

NV_RCOMP

NV_RB#

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

2

DMI Termination Voltage

AY9 BD1 AP15 BD8

AV9 BG8

AP7

Check list 1.6

AP6 AT6

If not implemented, the dual channel

AT9

NAND interface signals, including

BB1

NV_RCOMP, can be left as No Connect

AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

NV_ALE

BD3

NV_CLE

AY6

AU2

AV7

AY8 AY5

AV11 BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20

USBP6-

M22

USBP6+

N22

USBP7-

B21

USBP7+

D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

USB_RBIAS_PN

B25

D25

USB_OC#0_1_R

N16

USB_OC#2_3_R

J16

USB_OC#4_5

F16

USB_OC#6_7

L16

USB_OC#8_9

E14

USB_OC#10_11

G16

USB_OC#12_13

F12

PCH_OC7#

T15

2

NV_CLE Set to Vss when low.

DMI termination voltage Weak internal pull-up Do not pull low

USBP0- 63 USBP0+ 63 USBP1- 63 USBP1+ 63 USBP2- 76 USBP2+ 76 USBP3- 76 USBP3+ 76 USBP4- 64 USBP4+ 64 USBP5- 73 USBP5+ 73

1

TP2106TP2106

1

TP2107TP2107

1

TP2101TP2101

1

TP2103TP2103

USBP8- 74 USBP8+ 74 USBP9- 74 USBP9+ 74 USBP10- 78 USBP10+ 78 USBP11- 73 USBP11+ 73 USBP12- 32,34,72 USBP12+ 32,34,72 USBP13- 76 USBP13+ 76

1 2

R2112

R2112 22D6R2F-L1-GP

22D6R2F-L1-GP

+3.3V_ALW_PCH

Title

Size Document Number Rev

A3

Date: Sheet

1

Set to Vcc when high.

Danbury Technology: Disabled when Low. Enable when High.

+V_NVRAM_VCCQ

NV_CLE

+V_NVRAM_VCCQ

NV_ALE

USB

Pair

Device

USB0 @ MB (Charger)

0

USB1 @ MB

1

USB2 @ IO Board

2

USB3 @ IO Board

3

WLAN

4

Bluetooth

5

Not available for HM55

6

Not available for HM55

7

DOCK1

8

DOCK2

9

Finger Printer

10

Camera

11

PCCard/SmartCard/ExpCard

12

WWAN

13

R2113 0R0402-PAD-2-GPR2113 0R0402-PAD-2-GP

1 2

R2114 0R0402-PAD-2-GPR2114 0R0402-PAD-2-GP

1 2

USB_OC#0_1_R 58 USB_OC#2_3_R 58 USB_OC#4_5 58 USB_OC#6_7 58 USB_OC#8_9 58 USB_OC#10_11 58 USB_OC#12_13 58 PCH_OC7# 58

RN2104

USB_OC#0_1_R PCH_OC7#

USB_OC#6_7 USB_OC#8_9

USB_OC#2_3_R

PCH - PCI/USB/NVRAM (2/9)

RN2104

1 2 3 4 5 6

SRN10KJ-L3-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

1

10

USB_OC#12_13

9 8

USB_OC#10_11

7

USB_OC#4_5

21 89Thursday, March 18, 2010

+3.3V_ALW_PCH

12

R2103

R2103 1KR2J-1-GP

1KR2J-1-GP

DY

12

R2105

R2105 1KR2J-1-GP

1KR2J-1-GP

DY

USB_OC#0_1 63 USB_OC#2_3 76

of

-1

5

4

3

2

1

SSID = PCH

3 OF 10

PCH1C

PM_PWROKRESET_OUT#_R

PWROK

ME_PWROK

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK/GPI O30

P5

PWRBTN#

P7

ACPRESENT/GPIO31

A6

BATLOW#/GPI O72

F14

RI#

IBEXPEAK-M-GP-NF

DMI

System Power Management

DMI_CTX_PRXN08 DMI_CTX_PRXN18 DMI_CTX_PRXN28 DMI_CTX_PRXN38

DMI_CTX_PRXP08

D D

+1.05V_VTT

C C

DRAM_PWROK9

PCH_RSMRST#37 SIO_SLP_S4# 38,50,72

ME_SUS_PWR_ACK37

PM_PWRBTN#_R58

SIO_PWRBTN#37

AC_PRESENT37

B B

XDP_DBRESET#9,38,58

R2208

R2208 8K2R2J-3-GP

8K2R2J-3-GP

1 2

+3.3V_ALW_PCH

DMI_CTX_PRXP18 DMI_CTX_PRXP28 DMI_CTX_PRXP38

DMI_PTX_CRXN08 DMI_PTX_CRXN18 DMI_PTX_CRXN28 DMI_PTX_CRXN38

DMI_PTX_CRXP08 DMI_PTX_CRXP18 DMI_PTX_CRXP28 DMI_PTX_CRXP38

1 2

R2203 49D9R2F-GPR2203 49D9R2F-GP

DMI_IRCOMP_R

1 2

R2201 0R0402-PAD-2-GPR2201 0R0402-PAD-2-GP

1 2

R2207 0R0402-PAD-2-GPR2207 0R0402-PAD-2-GP

1 2

R2209 0R0402-PAD-2-GPR2209 0R0402-PAD-2-GP

1 2

R2210 0R0402-PAD-2-GPR2210 0R0402-PAD-2-GP

1 2

R2213 10KR2J-3-GPR2213 10KR2J-3-GP

1 2

R2215 0R0402-PAD-2-GPR2215 0R0402-PAD-2-GP

1 2

R2217 0R0402-PAD-2-GPR2217 0R0402-PAD-2-GP

1 2

R2219 0R0402-PAD-2-GPR2219 0R0402-PAD-2-GP

1 2

R2221 0R0402-PAD-2-GPR2221 0R0402-PAD-2-GP

1 2

R2222 8K2R2J-3-GPR2222 8K2R2J-3-GP

1 2

R2223 10KR2J-3-GPR2223 10KR2J-3-GP

+3.3V_RUN

12

R2204

R2204 1KR2J-1-GP

1KR2J-1-GP

PM_SYSRST#_R

PCH_LAN_RST#

DRAM_PWROK

PCH_RSMRST#_R

ME_SUS_PWR_ACK_R

PM_PWRBTN#_R

AC_PRESENT_R

PCH_BATLOW#

PCH_RI#

3 OF 10

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

SLP_LAN#/GPIO29

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14

BF13

BH13

BJ12

BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

PCH_PCIE_WAKE#

PM_SUS_STAT#

PCH_SUSCLK

PCH_SLP_S5#

PM_SLP_S4#_R

PM_SLP_S3#_R

SIO_SLP_M#_R

PM_SLP_DSW#

H_PM_SYNC

SIO_SLP_LAN#_R

R2205 10KR2J-3-GPR2205 10KR2J-3-GP

1

TP2202TP2202

1

TP2201TP2201

1 2

R2214 0R0402-PAD-2-GPR2214 0R0402-PAD-2-GP

1 2

R2216 0R0402-PAD-2-GPR2216 0R0402-PAD-2-GP

1 2

R2218 0R0402-PAD-2-GPR2218 0R0402-PAD-2-GP

1 2

R2220 0R0402-PAD-2-GPR2220 0R0402-PAD-2-GP

1

TP2203TP2203

1 2

R2224 0R2J-2-GP

DY

+3.3V_ALW_PCH

12

PCH_PCIE_WAKE# 38

CLKRUN#CLKRUN#

SIO_SLP_S5# 37

SIO_SLP_S3# 9,35,38,50

SIO_SLP_M# 38

H_PM_SYNC 9

SIO_SLP_LAN# 38

R2206

R2206 8K2R2J-3-GP

8K2R2J-3-GP

R2211

R2211 10KR2J-3-GP

10KR2J-3-GP

+3.3V_RUN

12

Option to " Disable "

12

clkrun. Pulling it

DY

down will keep the clks running.

CLKRUN# 36,37,38

R2225

0R0402-PAD-2-GP

1 2

+3.3V_ALW

U2201

RESET_OUT#37

SIO_SLP_S3#

A A

R2227

R2227 0R2J-2-GP

0R2J-2-GP

5

1 2

DY

RESET_OUT#

SIO_SLP_S3#_R

U2201

1

B

VCC

2

DY

A

3

Y

GND

74LVC1G08GW-1-GP

5

4

RESET_OUT#_R

4

+3.3V_ALW_PCH

R2226 10KR2J-3-GPR2226 10KR2J-3-GP

R2228 10KR2J-3-GP

R2229 10KR2J-3-GPR2229 10KR2J-3-GP

R2231 10KR2J-3-GPR2231 10KR2J-3-GP

1 2

DY

1 2

3

ME_SUS_PWR_ACK_R

AC_PRESENT_R

PCH_RSMRST#_R

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH - DMI/FDI/PM (3/9)

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

PCH - DMI/FDI/PM (3/9)

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

22 89Thursday, March 18, 2010

1

-1

of

-1

5

4

3

2

1

SSID = PCH

2 OF 10

PCH1B

PCIE_PRX_WWANTX_N176 PCIE_PRX_WWANTX_P176

PCIE_PTX_WWANRX_N1_C76

D D

C C

B B

PCIE_PTX_WWANRX_P1_C76

PCIE_PRX_WLANTX_N264

PCIE_PRX_WLANTX_P264 PCIE_PTX_WLANRX_N2_C64 PCIE_PTX_WLANRX_P2_C64

PCIE_PRX_R5U241TX_N332

PCIE_PRX_R5U241TX_P332 PCIE_PTX_R5U241RX_N3_C32 PCIE_PTX_R5U241RX_P3_C32

PCIE_PRX_EXPTX_N472

PCIE_PRX_EXPTX_P472 PCIE_PTX_EXPRX_N4_C72 PCIE_PTX_EXPRX_P4_C72

PCIE_PRX_GLANTX_N635

PCIE_PRX_GLANTX_P635 PCIE_PTX_GLANRX_N6_C35 PCIE_PTX_GLANRX_P6_C35

PCIe port 7 and 8 may not be available for all Ibex Peak SKUs.

+3.3V_ALW_PCH

CLK_PCIE_LOM#35 CLK_PCIE_LOM35

CLK_PCIE_R5U241#32 CLK_PCIE_R5U24132

+3.3V_RUN

CLK_PCIE_EXP#72 CLK_PCIE_EXP72

C2301

C2301 C2302

C2302

C2305

C2305 C2306

C2306

C2307

C2307 C2304

C2304

C2312

C2312 C2311

C2311

C2303

C2303 C2308

C2308

R2307 10KR2J-3-GP

-1.10/0310

LOM_CLKREQ#35

-1.10/0310

PCMCLK_REQ#32,58

R2318 10KR2J-3-GPR2318 10KR2J-3-GP

SRN0J-6-GP

-1.10/0310

CLK_PCIE_MINI1#64 CLK_PCIE_MINI164

-1.10/0310

CLK_PCIE_MINI2#76 CLK_PCIE_MINI276

+3.3V_ALW_PCH

A A

RN2312

4

SRN10KJ-5-GP

+3.3V_RUN +3.3V_RUN

S D

5

1 23

Q2304

G

2N7002A-7-GP

MINI2CLK_REQ#_PCH MINI1CLK_REQ#_PCH

PCIE_PTX_WWANRX_N1

1 2

PCIE_PTX_WWANRX_P1

1 2

SCD1U10V2KX-4GP

PCIE_PTX_WLANRX_N2

1 2

PCIE_PTX_WLANRX_P2

1 2

SCD1U10V2KX-4GP

PCIE_PTX_R5U241RX_N3

1 2

PCIE_PTX_R5U241RX_P3

1 2

SCD1U10V2KX-4GP

PCIE_PTX_EXPRX_N4

1 2

EXP

PCIE_PTX_EXPRX_P4

1 2

EXP

SCD1U10V2KX-4GP

PCIE_PTX_GLANRX_N6

1 2

PCIE_PTX_GLANRX_P6

1 2

SCD1U10V2KX-4GP

1 2

DY

1 2

RN2310

2 3 1

EXP

MINI2CLK_REQ#_PCH MINI1CLK_REQ#_PCH EXPCLK_REQ#_PCH

PCIE_CLK_RQ0#

CLK_PCIE_LOM# CLK_PCIE_LOM

LOM_CLKREQ#

CLK_PCIE_R5U241# CLK_PCIE_R5U241

PCMCLK_REQ#

PCIE_CLK_RQ3#

CLK_PCIE_EXP_N CLK_PCIE_EXP_P

4

EXPCLK_REQ#_PCH

CLK_PCIE_MINI1# CLK_PCIE_MINI1

MINI1CLK_REQ#_PCH

CLK_PCIE_MINI2# CLK_PCIE_MINI2

MINI2CLK_REQ#_PCH

BG30

PERN1

BJ30 BF29 BH29

AW30

BA30 BC30 BD30

AU30 AT30 AU32 AV32

BA32 BB32 BD32 BE32

BF33 BH33

BG32

BJ32

BA34

AW34

BC34 BD34

AT34 AU34 AU36 AV36

BG34

BJ34

BG36

BJ36

AK48 AK47

AM43 AM45

AM47 AM48

AH42 AH41

AM51 AM53

M9

AJ50

AJ52

AK53 AK51

P13

MINI1CLK_REQ#58,64MINI2CLK_REQ#76 EXPCLK_REQ#72

WWAN

PERP1 PETN1 PETP1

PERN2 PERP2

WLAN

PETN2 PETP2

PERN3 PERP3

PCMCIA

PETN3 PETP3

PERN4

Express

PERP4 PETN4

Card

PETP4

PERN5 PERP5

WPAN

PETN5 PETP5

PERN6 PERP6

LAN

PETN6 PETP6

PERN7 PERP7 PETN7 PETP7

PERN8 PERP8 PETN8 PETP8

CLKOUT_PCIE0N CLKOUT_PCIE0P

P9

PCIECLKRQ0#/GPIO73

CLKOUT_PCIE1N CLKOUT_PCIE1P

U4

PCIECLKRQ1#/GPIO18

CLKOUT_PCIE2N CLKOUT_PCIE2P

N4

PCIECLKRQ2#/GPIO20

CLKOUT_PCIE3N CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

CLKOUT_PCIE4N CLKOUT_PCIE4P

PCIECLKRQ4#/GPIO26

CLKOUT_PCIE5N CLKOUT_PCIE5P

H6

PCIECLKRQ5#/GPIO44

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

PEG_B_CLKRQ#/GPIO56

IBEXPEAK-M-GP-NF

4

SMBus

PCI-E*

Link

Controller

PEG_A_CLKRQ#/GPIO47

PEG

CLKOUT_DP_N/CLKOUT_BCLK1_ N

CLKOUT_DP_P/CLKOUT_BCLK1_ P

LAN

From CLK BUFFER

PCMCIA

CLKIN_SATA_N/CKSSCD_N CLKIN_SATA_P/CKSSCD_P

WPAN

Express Card

WLAN

WWAN

Clock Flex

DY

Q2302

G

2N7002A-7-GP

PCMCLK_REQ#

1 2

R2319 10KR2J-3-GP

S D

CLKIN_PCILOOPBACK

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

2 OF 10

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

SML1ALERT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

PCH_GPIO11

B9

PCH_SMB_CLK

H14

PCH_SMB_DATA

C8

PCH_GPIO60

J14

PCH_SML0CLK

C6

PCH_SML0DATA

G8

PCH_GPIO74

M14

KBC_SCL1

E10

KBC_SDA1

G12

CL_CLK

T13

T11

T9

H1

AD43 AD45

AN4 AN2

AT1 AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

J42

AH51 AH53

AF38

T45

P43

T42

N50

3

1

CL_DATA

1

CL_RST#

1

PCH_GPIO47

CLK_PCIE_GPU# CLK_PCIE_GPU

PEG_CLK#_R PEG_CLK_R

CLKIN_DMI# CLKIN_DMI

CLK_CPU_BCLK# CLK_CPU_BCLK

DREFCLK# DREFCLK

CLK_PCIE_SATA# CLK_PCIE_SATA

CLK_PCH_14M

CLK_PCI_LOOPBACK

XTAL25_OUT

XCLK_RCOMP

CLK_SIO_14M_R

CLK_PCI_TPM_CHA_R

CLK_PCI_TPM_R

CLK48_PCH

PCIECLKRQ{0,3,4,5,6,7}# should have a 10 K pull-up to +V3.3A. PCIECLKRQ{1,2} should have a 10K pull-up to +3.3S

PCH_SMB_CLK 37

TP2301TP2301

TP2302TP2302

TP2303TP2303

R2303

R2303 10KR2J-3-GP

10KR2J-3-GP

R2301

10KR2J-3-GP

PCH_SMB_DATA 37

1 2

10KR2J-3-GP

DY

R2304

+3.3V_ALW_PCH

CLK_PCIE_GPU# 80 CLK_PCIE_GPU 80

PEG_CLK#_R 9 PEG_CLK_R 9

-1.10/0310

CLKIN_DMI# 7 CLKIN_DMI 7

CLK_CPU_BCLK# 7 CLK_CPU_BCLK 7

CLK_PCH_14M 7

CLK_PCI_LOOPBACK 21

1 2

R2317 90D9R2F-1-GPR2317 90D9R2F-1-GP

1 2

R2314 22R2J-2-GPR2314 22R2J-2-GP

1 2

J

R2315 22R2J-2-GP

1 2

C_TPM

R2309 22R2J-2-GP

1 2

B_TPM

R2313 22R2J-2-GP

RN2314

1 2 3

SRN22-3-GP

+3.3V_RUN +3.3V_ALW_PCH

G

EXP

S D

+3.3V_ALW_PCH

4

Q2303

Q2303 2N7002A-7-GP

2N7002A-7-GP

+1.05V_VTT

12

R2310

R2310 10KR2J-3-GP

10KR2J-3-GP

+3.3V_ALW_PCH

123

678

PCH_SMBCLK_MEM18,19,40,58

PCH_SMBDATA_MEM18,19,40,58

DREFCLK# 7 DREFCLK 7

CLK_PCIE_SATA# 7 CLK_PCIE_SATA 7

CLK_SIO_14M 38 CLK_JETWAY_14M 36

CLK_PCI_TPM_CHA 36

CLK_PCI_TPM 35,70

CLK_SC_48M 34 CLK_FD_48M 75

2

PCIE_CLK_RQ3#

45

RN2303

RN2303 SRN2K2J-2-GP

SRN2K2J-2-GP

Title

PCH - PCIE/SMBUS/CLOCK/CL (4/9)

Size Document Number Rev

A3

Date: Sheet

PCH_GPIO11

SRN10KJ-5-GP

KBC_SCL1 37

KBC_SDA1 37

+3.3V_RUN

1

23

RN2304

RN2304 SRN4K7J-8-GP

SRN4K7J-8-GP

4

XTAL25_INXTAL25_IN

XTAL25_OUT

From Intel checklist CLKOUTFLEX{3:0} PCI Routing: 47-ȍ series resistor (single load), 39-ȍ series resistor (for double load) Non PCI routing: 33-ȍ series resistor (single-load), 22-ȍ series resistor (for double-load)

+3.3V_RUN

U2301

1

2

3 4

DMN66D0LDW-7-GP

12

R2316

R2316 1MR2J-1-GP

1MR2J-1-GP

DY

Fonseca 14.1" DIS

+3.3V_ALW_PCH

RN2313

1

4

2 3

+3.3V_ALW_PCH

1

23

RN2305

RN2305 SRN2K2J-1-GP

SRN2K2J-1-GP

4

6

5

12

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

PCH_SMB_CLK

PCH_SMB_DATA

1 2

C2310

0R0402-PAD-2-GP

X2301

X2301 XTAL-25MHZ-96GP

XTAL-25MHZ-96GP

1 2

DY

C2309

C2309 SC12P50V2JN-3GP

SC12P50V2JN-3GP

23 89Thursday, March 18, 2010

of

-1

5

SSID = PCH

PCH_RTCX1

1 2

R2404 10MR2J-L-GPR2404 10MR2J-L-GP

X2401

D D

12

C2403

SC15P50V2JN-2-GP

ACZ_BIT_CLK

12

EC2401

DY

SC33P50V2JN-3GP

X2401

1

2 3

X-32D768KHZ-46GP

4

For EMI, RF Cap.

C C

+3.3V_RUN

1 2

DY

R2410 1KR2J-1-GP

B B

Place near PCH side

PCH_JTAG_RST#

A A

+3.3V_RUN

R2421 8K2R2J-3-GP

NO REBOOT STRAP

+3.3V_SUS

1 2

DY

12

R2416

DY

20KR2F-L-GP

12

R2401

R2401 10KR2J-3-GP

10KR2J-3-GP

DY

PCH_SPI_DO

PCH_RTCX2

12

C2405

PCH_AZ_MDC_BITCLK76 PCH_AZ_CODEC_BITCLK30

PCH_AZ_MDC_SYNC76 PCH_AZ_CODEC_SYNC30 PCH_AZ_CODEC_RST#30,75 PCH_AZ_MDC_RST#76

PCH_MDC_SDOUT76 PCH_CODEC_SDOUT30

+3.3V_RUN

1 2

R2432 10KR2J-3-GPR2432 10KR2J-3-GP

1210 SB

ACZ_SPKR

No Reboot Strap R23

HDA_SPKR

Form DG1.5 TRST# on PCH does not belong to JTAG interface. For ES1 silicon, an ext. pull up 3.3-V Sus is required for bias internal state. A 20-K/10-K voltage divider to this signal to 1.1 V. However, from ES2 silicon onward, this signal is a No Connect regardless if JTAG interface on PCH is enabled or not.

+RTC_CELL

RN2401

1 2 3

SRN20KJ-GP-U

SC12P50V2JN-3GP

RN2402

SRN33J-5-GP-U

2 3 1

RN2403

1 2 3 4 5

2 3 1

RN2404

SRN33J-5-GP-U

ME_FWP

Low = Default High = No Reboot

09/0416, SPI_MISO From Intel checklist, No series resistor required if routing length is 1.5"-6.5" if using 1 SPI device. Use a 33- series resistors close to them PCH if using 2 SPI devices.

Pull up +3.3V_M enable iAMT(DY disable)

5

4

C2404

4

8 7 6

4

+3.3V_ALW_PCH

4

21

12

G2401

G2401 GAP-OPEN

GAP-OPEN

SC1U10V3KX-3GP

SRN33J-7-GP

R2408 8K2R2J-3-GPR2408 8K2R2J-3-GP

4

12

C2402

1 2

PCH_SPI_DIN62

-1.10/0308

ME_FWP

+RTC_CELL

1 2

R2402

R2402 1MR2J-1-GP

1MR2J-1-GP

1 2

R2405

R2405 330KR2F-L-GP

330KR2F-L-GP

SRTCRST# new signal Pin

ACZ_SPKR30

PCH_CODEC_SDIN030

PCH_MDC_SDIN176

TP2401TP2401

TP2402TP2402

ACZ_SDATAOUT_R

ME_FWP38

PCH_JTAG_TCK58

PCH_JTAG_TMS58

PCH_JTAG_TDI58

PCH_JTAG_TDO58

PCH_JTAG_RST#58

PCH_SPI_CLK62

PCH_SPI_CS0#62

PCH_SPI_CS1#62

PCH_SPI_DO62

1 2

12

R2431

R2431 1KR2J-1-GP

1KR2J-1-GP

DY

3

SM_INTRUDER#

PCH_INTVRMEN

PCH_RTCX1 PCH_RTCX2

PCH_RTCRST#

SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

ACZ_BIT_CLK

ACZ_SYNC_R

ACZ_SPKR SATA_PTX_HRX0+_C

ACZ_RST#_R

PCH_CODEC_SDIN0

PCH_MDC_SDIN1

33R2J-2-GPR2415 33R2J-2-GPR2415

HDA_SDIN2

HDA_SDIN3

ME_FWP

PCH_GPIO13

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_JTAG_RST#

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_CS1#

PCH_SPI_DO

PCH_SPI_DIN_R

1

INTVRMEN- Integrated SUS

1.1V VRM Enable High - Enable internal VRs

PCH1A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN#/GPIO33

J30

HDA_DOCK_RST#/GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IBEXPEAK-M-GP-NF

+RTC_CELL

12

C2401

SC1U10V3KX-3GP

FWH4/LFRAME#

LDRQ1#/GPIO23

LPC

RTCIHDA

SATA

SATAICOMPO

SATAICOMPI

SATA0GP/GPIO21

SATA1GP/GPIO19

SPI JTAG

RTC_PWR_L

1 2

R2418 0R0402-PAD-2-GPR2418 0R0402-PAD-2-GP

W=20mils

1 OF 10

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN

SATA0TXP

SATA1RXN SATA1RXP SATA1TXN

SATA1TXP

SATA2RXN SATA2RXP SATA2TXN

SATA2TXP

SATA3RXN SATA3RXP SATA3TXN

SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN

SATA5TXP

SATALED#

W=20mils

2

LPC_LAD[0..3]

LPC_LAD0

D33

LPC_LAD1

B33

LPC_LAD2

C32

LPC_LAD3

A32

C34

A34 F34

AB9

AK7 AK6

SATA_PTX_HRX0-_C

AK11 AK9

AH6 AH5

SATA_PTX_ORX1-_C

AH9

SATA_PTX_ORX1+_C

AH8

AF11 AF9 AF7 AF6

AH3 AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1

SATA_PTX_DRX_N5_C

AB3

SATA_PTX_DRX_P5_C

AB1

AF16

AF15

T3

Y9

V1

D2401

3

BAT54CW-1-GP

LPC_LFRAME# 35,36,37,38,70

LPC_LDRQ0# 38 LPC_LDRQ1# 38

SATA port 2 and 3 may not be available for all Ibex Peak SKUs.

C2410 SCD01U50V2KX-1GP

C2410 SCD01U50V2KX-1GP C2411 SCD01U50V2KX-1GP

C2411 SCD01U50V2KX-1GP

SATAICOMP

HDD_DET#_R

PCH_GPIO19

+3.3V_RTC_LDO

1

+COIN_CELLL_R

2

1 2

R2409 37D4R2F-GPR2409 37D4R2F-GP

R2414 0R0402-PAD-2-GPR2414 0R0402-PAD-2-GP

PCH_GPIO19 58

R2419 1KR2J-1-GPR2419 1KR2J-1-GP

LPC_LAD[0..3] 35,36,37,38,70

C2406 SCD01U50V2KX-1GPC2406 SCD01U50V2KX-1GP

1 2

C2407 SCD01U50V2KX-1GPC2407 SCD01U50V2KX-1GP

1 2

C2408 SCD01U50V2KX-1GPC2408 SCD01U50V2KX-1GP

1 2

C2409 SCD01U50V2KX-1GPC2409 SCD01U50V2KX-1GP

1 2

Dock

1 2

Dock

HDD_DET#_R

PCH_GPIO19

1 2

RTC_BAT_DET#25

+COIN_CELL

12

Main:20.F1000.003

+3.3V_RUN

12

+1.05V_VTT

1

R2407

R2407 8K2R2J-3-GP

8K2R2J-3-GP

IRQ_SERIRQ 35,36,37,38

HDD

SATA_PRX_HTX0- 59 SATA_PRX_HTX0+ 59 SATA_PTX_HRX0- 59 SATA_PTX_HRX0+ 59

ODD

SATA_PRX_OTX1- 59 SATA_PRX_OTX1+ 59 SATA_PTX_ORX1- 59 SATA_PTX_ORX1+ 59

DOCKING eSATA

SATA_PRX_DTX_5- 74

SATA_PRX_DTX_5+ 74

SATA_PTX_DRX_5- 74

SATA_PTX_DRX_5+ 74

1 2

R2412 10KR2J-3-GPR2412 10KR2J-3-GP

1 2

R2413 10KR2J-3-GPR2413 10KR2J-3-GP

SATA_ACT#_R 66

HDD_DET#_R 58 HDD_DET# 59

3 2

1

MLX-CON3-10-GP-U

RTC1

+3.3V_RUN

5

4

2nd:20.D0210.103

20.F1000.003

24 89Thursday, March 18, 2010

1

20.F1000.003

of

-1

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

integrated VccLan1_05VccCL1_05

LAN100_SLP

3

High=Enable Low=Disable

2

Title

PCH - SPI/RTC/LPC/SATA/IHDA (5/9)

Size Document Number Rev

A3

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

5

SSID = PCH

4

3

2

1

RN2507

+3.3V_RUN

4

H_THERMTRIP# 9,39

of

25 89Thursday, March 18, 2010

of

25 89Thursday, March 18, 2010

of

25 89Thursday, March 18, 2010

-1

6 OF 10

PCH1F

SIO_EXT_SCI#_R58

SIO_EXT_SCI#37

D D

SIO_EXT_SMI#37

SIO_EXT_WAKE#38

SC47P50V2JN-3GP

USB_MCARD1_DET#64

C2502

DY

SC47P50V2JN-3GP

+3.3V_RUN

RN2502

1

8

2

C C

+3.3V_RUN

B B

+3.3V_ALW_PCH

RN2506 SRN100KJ-6-GPRN2506 SRN100KJ-6-GP

A A

Internal pull up GPIO27 to enable VccVRM

7

3

6

4 5

SRN10KJ-6-GP

RN2503

1 2 3 4 5

SRN10KJ-6-GP

R2513 100KR2J-1-GPR2513 100KR2J-1-GP

R2514 100KR2J-1-GPR2514 100KR2J-1-GP

R2515 8K2R2J-3-GPR2515 8K2R2J-3-GP

R2522 10KR2J-3-GPR2522 10KR2J-3-GP

RN2504

1 2 3 4 5

SRN10KJ-6-GP

R2516 1KR2J-1-GPR2516 1KR2J-1-GP

1 2 3

R2521 100KR2J-1-GPR2521 100KR2J-1-GP

R2528 8K2R2J-3-GP

1 2

DY

SIO_EXT_SCI#_R

8 7 6

4

DY

PCH_GPIO22 PCH_GPIO1 PCH_GPIO6 PCH_GPIO7

USB_MCARD2_DET#76

PCH_GPIO37 PCH_GPIO16

SPEAKER_DET#

USB_MCARD1_DET#

STP_PCI#

RTC_BAT_DET#_R

SIO_EXT_SMI# PCH_GPIO46 USB_MCARD2_DET# PCH_GPIO12

SIO_EXT_WAKE#

PCIE_MCARD1_DET#

BIO_DET#

LED_BD_DET#_R

TP_ONDIE_PLL_VR

12

C2501

DY

12

RTC_BAT_DET#24

RTC_BAT_DET#_R58

C2503

SC47P50V2JN-3GP

C2503

DY

PCIE_MCARD1_DET#64

12

SPEAKER_DET#60

LED_BD_DET#77 LED_BD_DET#_R58

TEMP_ALERT#38,58

0R0402-PAD-2-GP

BIO_DET#78

1 2

R2502 0R0402-PAD-2-GPR2502 0R0402-PAD-2-GP

PCH_GPIO1658

1 2

R2506

0R0402-PAD-2-GP

R2532

1 2

PCH_GPIO3758

FFS_INT2_R40

BJ52

NCTF

PCH1, Board Top View

4X

BJ2

BJ1

BH1

5

TP2510TP2510

TP2512TP2512 TP2511TP2511 TP2508TP2508

TP2513TP2513

TP2519TP2519

TP2515TP2515 TP2517TP2517 TP2518TP2518

TP2516TP2516 TP2514TP2514 TP2509TP2509

B53BJ53 BH53

4

2X3X

1X

D1

SIO_EXT_SCI#_R

PCH_GPIO1

PCH_GPIO6

PCH_GPIO7

SIO_EXT_SMI#

PCH_GPIO12

PCH_GPIO16

SPEAKER_DET#

PCH_GPIO22

PCIE_MCARD1_DET#

TP_ONDIE_PLL_VR

LED_BD_DET#_R

STP_PCI#

PCH_GPIO37

TPM_ID0

TPM_ID1

USB_MCARD2_DET#

PCH_GPIO46

FFS_INT2_R

TEMP_ALERT#

BIO_DET#

TP_VSS_NCTF13

1

TP_VSS_NCTF22

1

TP_VSS_NCTF21

1

TP_VSS_NCTF11

1

TP_VSS_NCTF23

1

TP_VSS_NCTF43

1

TP_VSS_NCTF32

1

TP_VSS_NCTF41

1

TP_VSS_NCTF42

1

TP_VSS_NCTF33

1

TP_VSS_NCTF31

1

TP_VSS_NCTF12

1

A53

A52

A4

B2

PCH1F

Y3

BMBUSY#/GPIO0

C38

TACH1/GPIO1

D37

TACH2/GPIO6

J32

TACH3/GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL/G PIO12

T7

GPIO15

AA2

SATA4GP/GPIO16

F38

TACH0/GPIO17

Y7

SCLOCK/GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI#/GPIO34

V6

SATACLKREQ#/GPIO35

AB7

SATA2GP/GPIO36

AB13

SATA3GP/GPIO37

V3

SLOAD/GPIO38

P3

SDATAOUT0/GPIO39

H3

PCIECLKRQ6#/GPIO45

F1

PCIECLKRQ7#/GPIO46

AB6

SDATAOUT1/GPIO48

AA4

SATA5GP/GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M-GP-NF

TPM ID

TPM_ID1

(0)

TPM_ID1

(1)

MISC

GPIO

CPU

NCTF

RSVD

TPM_ID0

(0) (1)

TPM_ID0

C_TPM RSVD

B_TPMNONE

CLKOUT_BCLK0_N/CLKOUT_PCIE8N

CLKOUT_BCLK0_P/CLKOUT_PCIE8P

3

6 OF 10

PCH_SRC6_XDP_N

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N CLKOUT_PCIE7P

PROCPWRGD

THRMTRIP#

100KR2J-1-GP

CTPM and Disable B_TPM

100KR2J-1-GP

AH45

PCH_SRC6_XDP_P

AH46

PCH_SRC7_DMI_LAI_N

AF48

PCH_SRC7_DMI_LAI_P

AF47

U2

A20GATE

BCLK_CPU_N_R

AM3

BCLK_CPU_P_R

AM1

BG10

PECI

T1

RCIN#

BE10

PCH_THERMTRIP_R

BD10

BA22

TP1

AW22

TP2

BB22

TP3

AY45

TP4

AY46

TP5

AV43

TP6

AV45

TP7

AF13

TP8

M18

TP9

N18

TP10

AJ24

TP11

AK41

TP12

AK42

TP13

M32

TP14

N32

TP15

M30

TP16

N30

TP17

H12

TP18

AA23

TP19

AB45

NC_1

AB38

NC_2

AB42

NC_3

AB41

NC_4

T39

NC_5

P6

INIT3_3V#

C10

TP24

+3.3V_RUN +3.3V_RUN

12

R2526

B_TPM

12

R2531

1 1

SIO_A20GATE 37

-1.10/0310

H_PECI 9

SIO_RCIN# 37

H_PWRGD 9,58

INIT3_3V#

1

TP2506TP2506

B_TPM and DisableBTPM

12

R2527

R2527 100KR2J-1-GP

100KR2J-1-GP

12

C_TPM

2

TPM_ID1TPM_ID0

R2529

R2529 100KR2J-1-GP

100KR2J-1-GP

TP2502TP2502 TP2503TP2503

TP2501TP2501 TP2504TP2504

BCLK_CPU_N_R 9

BCLK_CPU_P_R 9

+1.05V_VTT

RN2508

1 2 3

SRN56J-4-GP

SIO_A20GATE SIO_RCIN#

4

1 2 3

SRN10KJ-5-GP

Place close to PCH

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH - GPIO/CPU/MISC (6/9)

Size Document Number Rev

Date: Sheet

PCH - GPIO/CPU/MISC (6/9)

A3

Taipei Hsien 221, Taiwan, R.O.C.

Fonseca 14.1" DIS

1

5

SSID = PCH

+1.05V_VTT

1.524A

D D

+1.05V_VTT

12

C2613

SC4D7U6D3V3KX-GP

1 2

DY

L2604

L2604 IND-1UH-2-GP

IND-1UH-2-GP

+1.05V_VTT

+1.05VS_VCCAPLL_EXP

12

C2614

SC4D7U6D3V3KX-GP

+1.05VS_VCCAPLL_FDI

42mA

+1.05V_VTT

C C

B B

3.208A

+3.3V_RUN

357mA

SCD1U10V2KX-4GP

C2619

L2603

L2603 IND-1UH-2-GP

IND-1UH-2-GP

12

1 2

DY

+1.05V_VTT

12

C2612

SC22U6D3V5MX-2GP

4

12

C2606

SC10U6D3V3MX-GP

12

DY

12

C2615

SC4D7U6D3V3KX-GP

12

C2621

C2621 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

DY

C2603

SC1U10V2KX-1GP

C2610

C2610 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C2616

SC4D7U6D3V3KX-GP

VCCAFDI_VRM

PCH1G

AB24

VCCCORE

AB26

VCCCORE

AB28

VCCCORE

AD26

VCCCORE

AD28

VCCCORE

AF26

VCCCORE

AF28

VCCCORE

AF30

VCCCORE

AF31

VCCCORE

AH26

VCCCORE

AH28

VCCCORE

AH30

VCCCORE

AH31

VCCCORE

AJ30

VCCCORE

AJ31

VCCCORE

AK24

VCCIO

BJ24

VCCAPLLEXP

AN20

VCCIO

AN22

VCCIO

AN23

VCCIO

AN24

VCCIO

AN26

VCCIO

AN28

VCCIO

BJ26

VCCIO

BJ28

VCCIO

AT26

VCCIO

AT28

VCCIO

AU26

VCCIO

AU28

VCCIO

AV26

VCCIO

AV28

VCCIO

AW26

VCCIO

AW28

VCCIO

BA26

VCCIO

BA28

VCCIO

BB26

VCCIO

BB28

VCCIO

BC26

VCCIO

BC28

VCCIO

BD26

VCCIO

BD28

VCCIO

BE26

VCCIO

BE28

VCCIO

BG26

VCCIO

BG28

VCCIO

BH27

VCCIO

AN30

VCCIO

AN31

VCCIO

AN35

VCC3_3

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO

IBEXPEAK-M-GP-NF

POWER

VCC CORE

DMI

PCI E*

NAND / SPI

FDI

3

CRTLVDS

VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS

HVCMOS

7 OF 10

VCCADAC

VSSA_DAC

VCCALVDS

VSSA_LVDS

VCC3_3

VCCVRM

VCCDMI

VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND

VCCME3_3 VCCME3_3 VCCME3_3 VCCME3_3

AE50

AE52

AF53

AF51

AH38

AH39

AP43 AP45 AT46 AT45

AB34

AB35

AD35

AT24

AT16

AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

AM8 AM9 AP11 AP9

+VCCA_DAC_1_2

12

PCH_VCCME3_3

C2604

SCD01U16V2KX-3GP

12

DY

12

C2611

C2611 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

+1.5VS_+1.8VS

35mA 61mA

C2617

C2617 SC1U10V3KX-3GP

SC1U10V3KX-3GP

C2618

C2618 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

85mA

12

C2620

C2620 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

2

1 2

L2602

0R0603-PAD-2-GP

C2605

SCD1U10V2KX-5GP

12

0R0603-PAD-2-GP

C2602

SC10U6D3V5MX-3GP

12

DY

+3.3V_RUN

357mA

R2607 0R0402-PAD-2-GPR2607 0R0402-PAD-2-GP

+V_NVRAM_VCCQ

156mA

+3.3V_RUN

R2610 0R0402-PAD-2-GPR2610 0R0402-PAD-2-GP

12

69mA

+1.05V_VTT+1.05VS_VCC_DMI

DY

12

R2608

R2608 0R2J-2-GP

0R2J-2-GP

+3.3V_RUN+1.8V_RUN

12

R2609

R2609 0R0402-PAD-2-GP

0R0402-PAD-2-GP

1

+3.3V_RUN

196mA

VCCAFDI_VRM

A A

5

4

+1.8V_RUN

3

12

R2611

0R0402-PAD-2-GP

1 2

R2612

0R0603-PAD-2-GP

+1.5VS_+1.8VS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

PCH (7/9)

Fonseca 14.1" DIS

26 89Thursday, March 18, 2010

1

-1

of

-1

5

SSID = PCH

+1.05V_VTT +1.05VS_VCCA_CLK

52mA

L2701

1 2

DY

IND-10UH-30-GP

(344mA)

VCC_LAN_PCH

R2708

D D

+1.05V_VTT

1.998A

+1.05V_VTT

C C

L2702

1 2

COIL-10UH-9-GP

COIL-10UH-9-GP SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

L2703

1 2

COIL-10UH-9-GP

COIL-10UH-9-GP SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

+1.05VS_VCCA_A_DPL

12

C2735

DY

+1.05VS_VCCA_B_DPL

12

C2736

DY

R2708 0R0402-PAD-2-GP

0R0402-PAD-2-GP

1 2

12

C2712

C2712 SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

C2716

C2716 SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

C2705

SC22U6D3V5MX-2GP

SCD1U10V2KX-4GP

72mA 73mA

+1.05V_VTT

12

C2719

SC1U10V2KX-1GP

B B

C2724

SCD1U10V2KX-4GP

+3.3V_ALW_PCH

163mA

12

C2727

SCD1U10V2KX-4GP

+1.05V_VTT

1mA

SC4D7U6D3V3KX-GP

A A

+RTC_CELL

2mA

SC1U10V2KX-1GP

5

C2720

SC1U10V2KX-1GP

12

SCD1U10V2KX-4GP

+3.3V_RUN

12

C2729

12

C2737

4

SCD1U10V2KX-4GP

12

C2710

12

C2714

SCD1U10V2KX-4GP

+1.5VS_+1.8VS

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

12

SC1U10V2KX-1GP

+1.5V_PCH_DcpSST

+1.05V_PCH_DcpSUS

12

C2726

C2728

SC1U10V2KX-1GP

12

C2730

SCD1U10V2KX-4GP

12

C2733

4

12

C2703

SC1U10V2KX-1GP

DY

DCPSUSBYP

12

C2709

12

C2706

SC1U10V2KX-1GP

12

C2711

SC1U10V2KX-1GP

DY

+VCCRTCEXT

12

C2721

12

SC1U10V2KX-1GP

12

C2731

SCD1U10V2KX-4GP

12

C2734

PCH1J

AP51

VCCACLK

AP53

VCCACLK

AF23

VCCLAN

AF24

VCCLAN

Y20

DCPSUSBYP

AD38

VCCME

AD39

VCCME

AD41

VCCME

AF43

VCCME

AF41

VCCME

AF42

VCCME

V39

VCCME

V41

VCCME

V42

VCCME

Y39

VCCME

Y41

VCCME

Y42

VCCME

V9

DCPRTC

AU24

VCCVRM

BB51

VCCADPLLA

BB53

VCCADPLLA

BD51

VCCADPLLB

BD53

VCCADPLLB

AH23

VCCIO

AJ35

VCCIO

AH35

VCCIO

AF34

VCCIO

AH34

VCCIO

AF32

VCCIO

V12

DCPSST

Y22

DCPSUS

P18

VCCSUS3_3

U19

VCCSUS3_3

U20

VCCSUS3_3

U22

VCCSUS3_3

V15

VCC3_3

V16

VCC3_3

Y16

VCC3_3

AT18

V_CPU_IO

AU18

V_CPU_IO

A12

VCCRTC

IBEXPEAK-M-GP-NF

3

10 OF 10

HDA

10 OF 10

VCCIO VCCIO VCCIO VCCIO

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3

VCCIO

V5REF_SUS

V5REF

VCC3_3

VCCSATAPLL VCCSATAPLL

VCCIO

VCCVRM

VCCIO

VCCIO VCCIO VCCIO VCCIO

VCCME VCCME VCCME VCCME

VCCSUSHDA

3

V24 V26 Y24 Y26

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23

V23

F24

K49

J38

L38

M36

N36

P36

U35

AD13

AK3 AK1

AH22

AT20

AH19

AD20

AF22

AD19 AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

L30

POWER

USB

<1mA

Clock and Miscellaneous

PCI/GPIO/LPC

SATA

PCI/GPIO/LPC

CPU

RTC

12

C2707

C2707 SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

C2708

C2708 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+5VALW_PCH_VCC5REFSUS

+5VS_PCH_VCC5REF

+3.3V_RUN

C2722

SC1U10V2KX-1GP

6mA

C2722

+1.5VS_+1.8VS

+1.05V_VTT

+3VS_+1.5VS_HDA_IO

12

+3.3V_ALW_PCH

12

C2701

C2701 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.05V_VTT

12

C2717

C2717 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

DY

C2732

C2732 SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

DY

R2707 0R0402-PAD-2-GPR2707 0R0402-PAD-2-GP

C2723

C2723 SC1U10V2KX-1GP

SC1U10V2KX-1GP

2

+3.3V_ALW_PCH

12

C2713

C2713 SC1U10V2KX-1GP

SC1U10V2KX-1GP

C2718

1 2

SCD1U10V2KX-4GP

L2704

1 2

IND-10UH-30-GP

+3.3V_ALW_PCH

12

2

+1.05V_VTT

+3.3V_ALW_PCH

D2702

D2702 SDMK0340L-7-F-GP

SDMK0340L-7-F-GP

K A

1 2

R2701 100R2J-2-GPR2701 100R2J-2-GP

DY

1

+3.3V_RUN

+5V_ALW_PCH

+3.3V_RUN

+1.05V_VTT+1.05VS_VCCAPLL

D2701

D2701 SDMK0340L-7-F-GP

SDMK0340L-7-F-GP

K A

12

C2715

C2715 SC1U10V2KX-1GP

SC1U10V2KX-1GP

+5V_RUN

1 2

R2702 100R2J-2-GPR2702 100R2J-2-GP

32mA

+1.05V_VTT

12

C2725

C2725 SC1U10V2KX-1GP

SC1U10V2KX-1GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

PCH (8/9)

Fonseca 14.1" DIS

27 89Thursday, March 18, 2010

1

of

-1

Dell Latitude E5410, Latitude E5510 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual