5
4
3
2
1
MX3(Maddog 2.5)
X'TAL
14.318MHz
D D
CLOCK GENERATOR
VER : 3A
BATT Charger
MAX8724
P39
BATT Selector
MAX8724
P40
VCORE System 5V/3.3V
MAX8770
P41 P42
ISL6236
CY28547LFXCT
P16
Merom
478 uFCPGA
DDRII
SO-DIMM 1
P15
Dual Channel DDR2
533/667 MHz
P2,P3
FSB
667/800 Mhz
NB
DDRII
SO-DIMM 2
P15
HDD (SATA)
C C
P28
Dual Channel DDR2
533/667 MHz
SATA0
Crestline 965GM
1299 uFCBGA
P4,P5,P6,P7,P8,P9,P10
DMI 4X Lane
PCI-E 16X Lane
PCI-E 6X Lane
Thermal Sensor
& Fan
P37
MXM III-NB8E
(GT/SE/GLM)
VRAM 256M
VRAM 512M
P17
LVDS
PI2PCIE412-DZHE
LVDS
HDMI
SPDIF_MXM
E-switch
P18
HDMI
P19
LVDS
HDMI Port
IO board
SB
HDD / ODD (SATA)
Module
P28
BAY
HDD / ODD (PATA)
P28
Mini PCI
(for Debug)
B B
P46
7 in 1 Card Reader
Controller
R5C833
P29,P30
7 in 1 Card Reader
connector
P30 P33
SATA1
ICH8M-E
PATA
PCI Bus
X'TAL
32.768KHz
X'TAL
32.768KHz
P11,P12,P13,P14
WPC8769LDG
SPI ROM
P31 P32 P32
Touch Pad
652 BGA
LPC
EC
P31
KB Conn.
USB 2.0 x 9
Azalia
SPDIF_MXM
CIR
Azalia Audio
Controller
ALC885
P22,P23
USB 0
USB 1
USB 2
USB 3
USB 4
USB 7
USB 8
USB Port x 2
Left Side
IO board
USB Port x 1
Right Side
P27 & IO board
ELC
P34,P35,P36
Bluetooth
P33
CCD
P18
MINI Card 2
Wireless-USB
P25
1.8V/1.05V
MAX8717
P43 P45 P44
TFT LCD Panel
P18
PCIE-1
USB 5
PCIE-3
PCIE-4
USB 6
PCIE-5
PCIE-6
Express Card
IEEE 1394B
Controller
FW643
MINI Card 1
WLAN
MINI Card 3
Robson
10M/100M/1G LAN
5/3.3/2.5/1.5
/1.25/0.9 V
IO board
(Audio-Left Side; HDMI-Right Side)
P38
P26
X'TAL
24.576MHz
IEEE 1394B
Port
P24
P25
P25
X'TAL
25MHz
IO board
Transformer
BCM5787M
P20,P21
HPL-5001-3
IO board
AC/BATT
Conn.
RJ45
IO board
A A
D_1011: change PCB
version from D to E
MX3 MB PCB MX3 MB PCB
5
http://laptop-motherboard-schematic.blogspot.com/
4
Audio Amplifier Phone Jack 1
MAX9789A HP/MIC/Line
P22
Out/SPDIF
IO board IO board
Speaker
P22
3
Phone Jack 2
HP/MIC
/Line Out
DMIC
P18
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
COMPUTER
Block Diagram
Block Diagram
Block Diagram
MX3 3A
MX3 3A
MX3 3A
1
of
of
of
15 3 Friday, October 12, 2007
15 3 Friday, October 12, 2007
15 3 Friday, October 12, 2007
5
H_A#[16:3] (4)
CPU(HOST)
D D
C C
H_STPCLK# (11)
B B
+1.05V_VCCP
R393
R393
1K/F_4
A A
1K/F_4
R390
R390
2K/F
2K/F
H_ADSTB0# (4)
H_REQ#[4:0] (4)
H_A#[35:17] (4)
H_ADSTB1# (4)
H_A20M# (11)
H_FERR# (11)
H_IGNNE# (11)
R189 0_4 R189 0_4
H_INTR (11)
H_NMI (11)
H_SMI# (11)
H_D#[15:0] (4)
H_DSTBN#0 (4)
H_DSTBP#0 (4)
H_DINV#0 (4)
H_D#[31:16] (4)
<Check list & CRB>
Layout note: Z=55 ohm
H_GTLREF<0.5"
H_DSTBN#1 (4)
H_DSTBP#1 (4)
H_DINV#1 (4)
R149 *1K_NC R149 *1K_NC
R144 *1K_NC R144 *1K_NC
T15T15
T65T65
T64T64
T71T71
CPU_MCH_BSEL0 (6,16)
CPU_MCH_BSEL1 (6,16)
CPU_MCH_BSEL2 (6,16)
5
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_STPCLK_R#
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
U39A
U39A
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
K3
H2
K2
J3
L1
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
A6
A5
C4
D5
C6
B4
A3
M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
U39B
U39B
E22
D[0]#
F24
D[1]#
E26
D[2]#
G22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H22
D[12]#
F26
D[13]#
K22
D[14]#
H23
D[15]#
J26
DSTBN[0]#
H26
DSTBP[0]#
H25
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L23
D[20]#
M24
D[21]#
L22
D[22]#
M23
D[23]#
P25
D[24]#
P23
D[25]#
P22
D[26]#
T24
D[27]#
R24
D[28]#
L25
D[29]#
T25
D[30]#
N25
D[31]#
L26
DSTBN[1]#
M26
DSTBP[1]#
N24
DINV[1]#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
AF26
TEST4
AF1
TEST5
A26
TEST6
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
ADDR GROUP 0 ADDR GROUP 1
ADDR GROUP 0 ADDR GROUP 1
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]
DATA GRP 1
DATA GRP 1
MISC
MISC
DEFER#
CONTROL
CONTROL
RESET#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
XDP/ITP SIGNALS
XDP/ITP SIGNALS
THERMAL
THERMAL
PROCHOT#
THERMDA
THERMDC
ICH
ICH
THERMTRIP#
H CLK
H CLK
BCLK[0]
BCLK[1]
RESERVED
RESERVED
DATA GRP 0
DATA GRP 0
DATA GRP 2 DATA GRP 3
DATA GRP 2 DATA GRP 3
DSTBN[2]#
DSTBP[2]#
DSTBN[3]#
DSTBP[3]#
PWRGOOD
ADS#
BNR#
BPRI#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
PRDY#
PREQ#
TCK
TDO
TMS
TRST#
DBR#
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
4
H1
E2
G5
H5
F21
E1
F1
H_IERR#
D20
B3
H4
H_CPURST_CPU#
C1
F3
F4
G3
G2
G6
E4
XDP_BPM#0
AD4
XDP_BPM#1
AD3
XDP_BPM#2
AD1
XDP_BPM#3
AC4
XDP_BPM#4
AC2
XDP_BPM#5
AC1
XDP_TCK
AC5
XDP_TDI
AA6
TDI
XDP_TDO
AB3
XDP_TMS
AB5
XDP_TRST#
AB6
XDP_DBRESET#
C20
H_PROCHOT_R#
D21
H_THERMDA
A24
H_THERMDC
B25
PM_THRMTRIP#
C7
A22
A21
H_D#32
Y22
H_D#33
AB24
H_D#34
V24
H_D#35
V26
H_D#36
V23
H_D#37
T22
H_D#38
U25
H_D#39
U23
H_D#40
Y25
H_D#41
W22
H_D#42
Y23
H_D#43
W24
H_D#44
W25
H_D#45
AA23
H_D#46
AA24
H_D#47
AB25
Y26
AA26
U22
H_D#48
AE24
H_D#49
AD24
H_D#50
AA21
H_D#51
AB22
H_D#52
AB21
H_D#53
AC26
H_D#54
AD20
H_D#55
AE22
H_D#56
AF23
H_D#57
AC25
H_D#58
AE21
H_D#59
AD21
H_D#60
AC22
H_D#61
AD23
H_D#62
AF22
H_D#63
AC23
AE25
AF24
AC20
COMP0
R26
COMP1
U26
COMP2
AA1
COMP3
Y1
E5
B5
D24
D6
D7
SLP#
AE6
PSI#
http://laptop-motherboard-schematic.blogspot.com/
4
R180 56.2/F_4 R180 56.2/F_4
R184 0_4 R184 0_4
R181 56.2/F_4 R181 56.2/F_4
R182 *2.2K_4_NC R182 *2.2K_4_NC
H_THERMDA (37)
H_THERMDC (37)
CLK_CPU_BCLK (16)
CLK_CPU_BCLK# (16)
H_D#[47:32] (4)
H_DSTBN#2 (4)
H_DSTBP#2 (4)
H_DINV#2 (4)
H_D#[63:48] (4)
H_DSTBN#3 (4)
H_DSTBP#3 (4)
R419 27.4/F R419 27.4/F
R411 54.9/F R411 54.9/F
R82 27.4/F R82 27.4/F
R83 54.9/F R83 54.9/F
H_DINV#3 (4)
H_DPSLP# (11)
H_DPWR# (4)
H_PWRGD (11)
H_CPUSLP# (4)
PSI# (41)
H_ADS# (4)
H_BNR# (4)
H_BPRI# (4)
H_DEFER# (4)
H_DRDY# (4)
H_DBSY# (4)
H_BREQ#0 (4)
+1.05V_VCCP
H_INIT# (11)
H_LOCK# (4)
H_RS#0 (4)
H_RS#1 (4)
H_RS#2 (4)
H_TRDY# (4)
H_HIT# (4)
H_HITM# (4)
T2T2
T3T3
T66T66
T1T1
T5T5
T6T6
SYS_RST# (13)
+1.05V_VCCP
H_PROCHOT#
H_THERMDA
H_THERMDC
Close to CPU
<Check list & CRB>
Layout note: L<0.5"
COMP0/2 Z=27.4ohm
COMP1/3 Z=54.9
<CRB & Design guide>
Layout Note:Connect from SB and
daisy chain to CPU CORE VR. Not
use T connect.(SB/VR/CPU/NB)
3
R569 0_0603 R569 0_0603
C654
C654
10P/50V
10P/50V
for EMI request, close to CPU
PROCHOT# : Default is PU 56ohm, if no use.
Default serial R is NC, if it's used and
T16T16
connect to IMVP6, PU 68ohm, serial R 2.2K.
1 2
C422
C422
*470P/50V_NC
*470P/50V_NC
ICH_DPRSTP# (6,11,41)
3
H_CPURST# (4)
2
PU/PD (ITP700)
XDP_TMS
XDP_TDI
XDP_BPM#5
XDP_TDO
XDP_TCK
XDP_TRST#
ITP disable guidelines
Signal Resistor Value Connect To Resistor Placement
TDI
TMS
TRST#
TCK
TDO
ITP_EN PU Depop +3.3V_RUN Close to CK505 Pin37
Thermal Trip
FSB
533 0 0
667
800
BSEL2 BSEL1 BSEL0
BCLK
133
166
0
200
2
R72 39/F_4 R72 39/F_4
R74 150/F_4 R74 150/F_4
R61 *54.9/F_4_NC R61 *54.9/F_4_NC
R68 *54.9/F_4_NC R68 *54.9/F_4_NC
R39 27/F_4 R39 27/F_4
R58 680/F_4 R58 680/F_4
150 ohm +/- 5%
39 ohm +/- 5%
680 ohm +/- 5%
27 ohm +/- 5%
Open
DELAY_VR_PWRGOOD (6,13,41)
+1.05V_VCCP
PM_THRMTRIP#
<CRB & Design guide>
Layout Note: Thermal trip should connect to ICH8 & GMCH without T-ing
(ZS1 default NC)
1
Title
Title
1
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
0 011
Date: Sheet
Date: Sheet
Date: Sheet
1
+1.05V_VCCP
Within 2.0" of the ITP
VTT
Within 2.0" of the ITP
VTT
GND
Within 2.0" of the ITP
GND
Within 2.0" of the ITP
VTT
Within 2.0" of the ITP
+1.05V_VCCP
3
R199
R199
D15
2
Q56
Q56
FDV301N
FDV301N
1
R191
R191
56.2/F_4
56.2/F_4
CPU Host(1/2)
CPU Host(1/2)
CPU Host(1/2)
MX3 2A
MX3 2A
MX3 2A
Q54
Q54
2
MMBT3904
MMBT3904
1 3
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
*10K_4_NC
*10K_4_NC
D15
*CH501H-40PT_NC
*CH501H-40PT_NC
2 1
C181 *1U_NC C181 *1U_NC
SYS_SHDN# (37,42)
PM_THRMTRIP# (6,11)
25 3 Friday, October 12, 2007
25 3 Friday, October 12, 2007
25 3 Friday, October 12, 2007
1
of
of
of
5
4
3
2
1
CPU(Power)
+VCC_CORE
D D
C C
B B
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+1.05V_VCCP
All use 10U 4V(+-20%,X6S,0805)Pb-Free.
1 2
1 2
C445
C445
10U/4V
10U/4V
C441
C441
10U/4V
10U/4V
1 2
1 2
C444
C444
10U/4V
10U/4V
C404
C404
10U/4V
10U/4V
1 2
1 2
C443
C443
10U/4V
10U/4V
C403
C403
10U/4V
10U/4V
1 2
1 2
C442
C442
10U/4V
10U/4V
C440
C440
10U/4V
10U/4V
8 inside cavity, north side, secondary layer.
1 2
1 2
C402
C402
10U/4V
10U/4V
C58
C58
10U/4V
10U/4V
1 2
1 2
C401
C401
10U/4V
10U/4V
C59
C59
10U/4V
10U/4V
1 2
1 2
C400
C400
10U/4V
10U/4V
C60
C60
10U/4V
10U/4V
1 2
1 2
C399
C399
10U/4V
10U/4V
C61
C61
10U/4V
10U/4V
8 inside cavity, south side, secondary layer.
1 2
C82
C82
10U/4V
10U/4V
1 2
C81
C81
10U/4V
10U/4V
1 2
C99
C99
10U/4V
10U/4V
1 2
C103
C103
10U/4V
10U/4V
6 inside cavity, north side, primary layer.
1 2
C114
C114
10U/4V
10U/4V
1 2
C115
C115
10U/4V
10U/4V
1 2
C116
C116
10U/4V
10U/4V
1 2
C117
C117
10U/4V
10U/4V
6 inside cavity, south side, primary layer.
C78
C78
0.1U/10V
0.1U/10V
1 2
1 2
Layout out:
Place these inside socket cavity on North side secondary.
C79
C79
0.1U/10V
0.1U/10V
1 2
C80
C80
0.1U/10V
0.1U/10V
1 2
C100
C100
0.1U/10V
0.1U/10V
1 2
1 2
1 2
C112
C112
10U/4V
10U/4V
C118
C118
10U/4V
10U/4V
C101
C101
0.1U/10V
0.1U/10V
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C62
C62
10U/4V
10U/4V
C63
C63
10U/4V
10U/4V
C64
C64
10U/4V
10U/4V
C65
C65
10U/4V
10U/4V
C113
C113
10U/4V
10U/4V
C119
C119
10U/4V
10U/4V
C102
C102
0.1U/10V
0.1U/10V
+VCC_CORE +VCC_CORE
U39C
U39C
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
VCC[021]
C13
VCC[022]
C15
VCC[023]
C17
VCC[024]
C18
VCC[025]
D9
VCC[026]
D10
VCC[027]
D12
VCC[028]
D14
VCC[029]
D15
VCC[030]
D17
VCC[031]
D18
VCC[032]
E7
VCC[033]
E9
VCC[034]
E10
VCC[035]
E12
VCC[036]
E13
VCC[037]
E15
VCC[038]
E17
VCC[039]
E18
VCC[040]
E20
VCC[041]
F7
VCC[042]
F9
VCC[043]
F10
VCC[044]
F12
VCC[045]
F14
VCC[046]
F15
VCC[047]
F17
VCC[048]
F18
VCC[049]
F20
VCC[050]
AA7
VCC[051]
AA9
VCC[052]
AA10
VCC[053]
AA12
VCC[054]
AA13
VCC[055]
AA15
VCC[056]
AA17
VCC[057]
AA18
VCC[058]
AA20
VCC[059]
AB9
VCC[060]
AC10
VCC[061]
AB10
VCC[062]
AB12
VCC[063]
AB14
VCC[064]
AB15
VCC[065]
AB17
VCC[066]
AB18
VCC[067]
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA[01]
VCCA[02]
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
+VCCA_PROC
B26
C26
AD6
AF5
AE5
AF4
AE3
AF3
AE2
AF7
AE7
.
.
<REV.NO. 0.5/REF.NO.19343>
Ivcc Max 52A
Ivccp Max 6A(VCCP supply before Vcc stable)
Max 2A(VCCP supply after Vcc stable)
Ivcca Max 130mA
+1.05V_VCCP
+
+
C110
C110
330U/2.5V_7
330U/2.5V_7
<Check list>
ESR=12m ohm
<CRB>
.01U near to B26 ball
H_VID0 (41)
H_VID1 (41)
H_VID2 (41)
H_VID3 (41)
H_VID4 (41)
H_VID5 (41)
H_VID6 (41)
+VCC_CORE
R30
R30
100/F
100/F
R36
R36
100/F
100/F
C148
.01U/16V_4
.01U/16V_4
VCCSENSE (41)
VSSSENSE (41)
<Demo board>
Routing 27.4ohm with 50mils spacing
PU/PD near to CPU 1"
C145
C145
10U/4V
10U/4V
Den_1011:change from
CH6102K9A01 to
CH6100KMEE3 for derating.
R166 0 R166 0
1 2
C148
+1.5V_RUN
U39D
U39D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
VSS[081]P3VSS[162]
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[163]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
.
.
A A
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
http://laptop-motherboard-schematic.blogspot.com/
4
3
2
Date: Sheet
COMPUTER
CPU Power(2/2)
CPU Power(2/2)
CPU Power(2/2)
MX3 3A
MX3 3A
MX3 3A
1
of
of
of
35 3 Friday, October 12, 2007
35 3 Friday, October 12, 2007
35 3 Friday, October 12, 2007
5
4
3
2
1
NB(HOST)
D D
U40A
H_D#[63:0] (2)
C C
+1.05V_VCCP
R440
R440
221/F
221/F
R439
R439
100/F
100/F
B B
+1.05V_VCCP
A A
R435
R435
24.9/F
24.9/F
H_SWING
C446
C446
.1U/10V
.1U/10V
H_RCOMP
<check list>
10:20 mils(Width:Spacing)
R186
R186
H_SCOMP
54.9/F
54.9/F
R187
R187
H_SCOMP#
54.9/F
54.9/F
<check list>
0.1U close to B3
H_CPURST# (2)
R570 0_0603 R570 0_0603
H_CPURST_NB#
C655
C655
10P/50V
10P/50V
for EMI request, close to NB
+1.05V_VCCP
R442
R442
1K/F
1K/F
R441
R441
C451
C451
2K/F
2K/F
.1U/10V
.1U/10V
<check list>
0.1U close to B9 within 100 mils
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
H_CPURST_NB#
H_REF
U40A
E2
H_D#_0
G2
H_D#_1
G7
H_D#_2
M6
H_D#_3
H7
H_D#_4
H3
H_D#_5
G4
H_D#_6
F3
H_D#_7
N8
H_D#_8
H2
H_D#_9
M10
H_D#_10
N12
H_D#_11
N9
H_D#_12
H5
H_D#_13
P13
H_D#_14
K9
H_D#_15
M2
H_D#_16
W10
H_D#_17
Y8
H_D#_18
V4
H_D#_19
M3
H_D#_20
J1
H_D#_21
N5
H_D#_22
N3
H_D#_23
W6
H_D#_24
W9
H_D#_25
N2
H_D#_26
Y7
H_D#_27
Y9
H_D#_28
P4
H_D#_29
W3
H_D#_30
N1
H_D#_31
AD12
H_D#_32
AE3
H_D#_33
AD9
H_D#_34
AC9
H_D#_35
AC7
H_D#_36
AC14
H_D#_37
AD11
H_D#_38
AC11
H_D#_39
AB2
H_D#_40
AD7
H_D#_41
AB1
H_D#_42
Y3
H_D#_43
AC6
H_D#_44
AE2
H_D#_45
AC5
H_D#_46
AG3
H_D#_47
AJ9
H_D#_48
AH8
H_D#_49
AJ14
H_D#_50
AE9
H_D#_51
AE11
H_D#_52
AH12
H_D#_53
AJ5
H_D#_54
AH5
H_D#_55
AJ6
H_D#_56
AE7
H_D#_57
AJ7
H_D#_58
AJ2
H_D#_59
AE5
H_D#_60
AJ3
H_D#_61
AH2
H_D#_62
AH13
H_D#_63
B3
H_SWING
C2
H_RCOMP
W1
H_SCOMP
W2
H_SCOMP#
B6
H_CPURST#
E5
H_CPUSLP#
B9
H_AVREF
A9
H_DVREF
C0 CRESTLINE_GM FCBGA QS
C0 CRESTLINE_GM FCBGA QS
H_ADSTB#_0
H_ADSTB#_1
HOST
HOST
HPLL_CLK#
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
NB P/N AJSLA5T0T13
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
K5
L2
AD13
AE13
M7
K3
AD2
AH11
L7
K2
AC2
AJ10
M14
E13
A11
H13
B12
E12
D7
D8
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_A#[35:3] (2)
H_A#[35:32] are not supported in
Calero Interposer
Crestline support 36 bit address
H_ADS# (2)
H_ADSTB0# (2)
H_ADSTB1# (2)
H_BNR# (2)
H_BPRI# (2)
H_BREQ#0 (2)
H_DEFER# (2)
H_DBSY# (2)
CLK_MCH_BCLK (16)
CLK_MCH_BCLK# (16)
H_DPWR# (2)
H_DRDY# (2)
H_HIT# (2)
H_HITM# (2)
H_LOCK# (2)
H_TRDY# (2)
H_DINV#[3:0] (2)
H_DSTBN#[3:0] (2)
H_DSTBP#[3:0] (2)
H_REQ#[4:0] (2)
H_RS#[2:0] (2) H_CPUSLP# (2)
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
http://laptop-motherboard-schematic.blogspot.com/
4
3
2
Date: Sheet
COMPUTER
GMCH Host(1/7)
GMCH Host(1/7)
GMCH Host(1/7)
MX3 2B
MX3 2B
MX3 2B
1
of
of
of
45 3 Friday, October 12, 2007
45 3 Friday, October 12, 2007
45 3 Friday, October 12, 2007
5
4
3
2
1
D D
L_BKLT_CTRL (18)
INT_LVDS_BLON (18)
C C
R257 150/F_4 R257 150/F_4
R254 150/F_4 R254 150/F_4
R252 150/F_4 R252 150/F_4
B B
<check list & CRB>
For Calero : 255
For Cresstline:1.3K/F
For external VGA:0 ohm
+3.3V_RUN
<check list & CRB>
For Calero : 1.5K
For Cresstline:2.4K
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
R454 1.3K/F R454 1.3K/F
1 2
R276 10K_4 R276 10K_4
R270 10K_4 R270 10K_4
INT_LVDS_EDIDCLK (18)
INT_LVDS_EDIDDATA (18)
INT_TXLCLKOUT- (18)
INT_TXLCLKOUT+ (18)
INT_TXUCLKOUT- (18)
INT_TXUCLKOUT+ (18)
INT_CRT_BLU (19)
INT_CRT_GRN (19)
INT_CRT_RED (19)
INT_CRT_DDCCLK (19)
INT_CRT_DDCDAT (19)
INT_HSYNC (19)
INT_VSYNC (19)
INT_LVDS_DIGON (18)
INT_TXLOUT0- (18)
INT_TXLOUT1- (18)
INT_TXLOUT2- (18)
INT_TXLOUT0+ (18)
INT_TXLOUT1+ (18)
INT_TXLOUT2+ (18)
INT_TXUOUT0- (18)
INT_TXUOUT1- (18)
INT_TXUOUT2- (18)
INT_TXUOUT0+ (18)
INT_TXUOUT1+ (18)
INT_TXUOUT2+ (18)
R285 2.4K_4 R285 2.4K_4
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
R457 30/F R457 30/F
1 2
R456 30/F R456 30/F
1 2
LVDS_IBG
LVDS_VBG
T46T46
HSYNC1
CRTIREF
VSYNC1
U40C
U40C
J40
L_BKLT_CTRL
H39
L_BKLT_EN
E39
L_CTRL_CLK
E40
L_CTRL_DATA
C37
L_DDC_CLK
D35
L_DDC_DATA
K40
L_VDD_EN
L41
LVDS_IBG
L43
LVDS_VBG
N41
LVDS_VREFH
N40
LVDS_VREFL
D46
LVDSA_CLK#
C45
LVDSA_CLK
D44
LVDSB_CLK#
E42
LVDSB_CLK
G51
LVDSA_DATA#_0
E51
LVDSA_DATA#_1
F49
LVDSA_DATA#_2
G50
LVDSA_DATA_0
E50
LVDSA_DATA_1
F48
LVDSA_DATA_2
G44
LVDSB_DATA#_0
B47
LVDSB_DATA#_1
B45
LVDSB_DATA#_2
E44
LVDSB_DATA_0
A47
LVDSB_DATA_1
A45
LVDSB_DATA_2
E27
TVA_DAC
G27
TVB_DAC
K27
TVC_DAC
F27
TVA_RTN
J27
TVB_RTN
L27
TVC_RTN
M35
TV_DCONSEL_0
P33
TV_DCONSEL_1
H32
CRT_BLUE
G32
CRT_BLUE#
K29
CRT_GREEN
J29
CRT_GREEN#
F29
CRT_RED
E29
CRT_RED#
K33
CRT_DDC_CLK
G35
CRT_DDC_DATA
F33
CRT_HSYNC
C32
CRT_TVO_IREF
E33
CRT_VSYNC
C0 CRESTLINE_GM FCBGA QS
C0 CRESTLINE_GM FCBGA QS
PEG_COMPI
PEG_COMPO
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
LVDS
LVDS
TV VGA
TV VGA
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
<check list>
Vcc1_5 for Calero
Vcc1_25/Vcc1_05 for Crestline
EXP_A_COMPX
N43
M43
PEG_RXN0
J51
PEG_RXN1
L51
PEG_RXN2
N47
PEG_RXN3
T45
PEG_RXN4
T50
PEG_RXN5
U40
PEG_RXN6
Y44
PEG_RXN7
Y40
PEG_RXN8
AB51
PEG_RXN9
W49
PEG_RXN10
AD44
PEG_RXN11
AD40
PEG_RXN12
AG46
PEG_RXN13
AH49
PEG_RXN14
AG45
PEG_RXN15
AG41
PEG_RXP0
J50
PEG_RXP1
L50
PEG_RXP2
M47
PEG_RXP3
U44
PEG_RXP4
T49
PEG_RXP5
T41
PEG_RXP6
W45
PEG_RXP7
W41
PEG_RXP8
AB50
PEG_RXP9
Y48
PEG_RXP10
AC45
PEG_RXP11
AC41
PEG_RXP12
AH47
PEG_RXP13
AG49
PEG_RXP14
AH45
PEG_RXP15
AG42
N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44
M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43
C_PEG_TXN0
C_PEG_TXN1
C_PEG_TXN2
C_PEG_TXN3
C_PEG_TXN4
C_PEG_TXN5
C_PEG_TXN6
C_PEG_TXN7
C_PEG_TXN8
C_PEG_TXN9
C_PEG_TXN10
C_PEG_TXN11
C_PEG_TXN12
C_PEG_TXN13
C_PEG_TXN14
C_PEG_TXN15
C_PEG_TXP0
C_PEG_TXP1
C_PEG_TXP2
C_PEG_TXP3
C_PEG_TXP4
C_PEG_TXP5
C_PEG_TXP6
C_PEG_TXP7
C_PEG_TXP8
C_PEG_TXP9
C_PEG_TXP10
C_PEG_TXP11
C_PEG_TXP12
C_PEG_TXP13
C_PEG_TXP14
C_PEG_TXP15
C512 .1U/10V_4 C512 .1U/10V_4
C514 .1U/10V_4 C514 .1U/10V_4
C556 .1U/10V_4 C556 .1U/10V_4
C511 .1U/10V_4 C511 .1U/10V_4
C509 .1U/10V_4 C509 .1U/10V_4
C554 .1U/10V_4 C554 .1U/10V_4
C548 .1U/10V_4 C548 .1U/10V_4
C550 .1U/10V_4 C550 .1U/10V_4
C553 .1U/10V_4 C553 .1U/10V_4
C541 .1U/10V_4 C541 .1U/10V_4
C546 .1U/10V_4 C546 .1U/10V_4
C506 .1U/10V_4 C506 .1U/10V_4
C544 .1U/10V_4 C544 .1U/10V_4
C538 .1U/10V_4 C538 .1U/10V_4
C505 .1U/10V_4 C505 .1U/10V_4
C543 .1U/10V_4 C543 .1U/10V_4
C513 .1U/10V_4 C513 .1U/10V_4
C515 .1U/10V_4 C515 .1U/10V_4
C557 .1U/10V_4 C557 .1U/10V_4
C510 .1U/10V_4 C510 .1U/10V_4
C508 .1U/10V_4 C508 .1U/10V_4
C555 .1U/10V_4 C555 .1U/10V_4
C549 .1U/10V_4 C549 .1U/10V_4
C551 .1U/10V_4 C551 .1U/10V_4
C552 .1U/10V_4 C552 .1U/10V_4
C540 .1U/10V_4 C540 .1U/10V_4
C547 .1U/10V_4 C547 .1U/10V_4
C507 .1U/10V_4 C507 .1U/10V_4
C545 .1U/10V_4 C545 .1U/10V_4
C539 .1U/10V_4 C539 .1U/10V_4
C504 .1U/10V_4 C504 .1U/10V_4
C542 .1U/10V_4 C542 .1U/10V_4
+1.05_PEG
R292 24.9/F_4 R292 24.9/F_4
PEG_RXN[15:0] (17)
<check list>
SDVO/PCIE/LVDS not
implement
16 lanes NC
PEG_RXP[15:0] (17)
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
PEG_TXN[15:0] (17)
PEG_TXP[15:0] (17)
A A
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
http://laptop-motherboard-schematic.blogspot.com/
4
3
2
Date: Sheet
COMPUTER
GMCH Graphics(2/7)
GMCH Graphics(2/7)
GMCH Graphics(2/7)
MX3 2B
MX3 2B
MX3 2B
1
of
of
of
55 3 Friday, October 12, 2007
55 3 Friday, October 12, 2007
55 3 Friday, October 12, 2007
5
4
3
2
1
Strapping table
All strap are sampled with respect to the leading edge of the GMCH power ok signal
CFG[17:3] have internal pull-up
CFG[18:19] have internal pull-down
Any CFG signal strapping option not list below should be left NC pin
Pin Name
D D
CFG[2:0]
CFG[4:3]
CFG5
CFG6
CFG7
CFG8
CFG9
CFG[11:10] Reserved
CFG[13:12]
C C
CFG[15:14]
CFG16
CFG[18:17]
CFG19
CFG20
SDVO_CTRLDATA
B B
+3.3V_RUN
R261 10K_4 R261 10K_4
R260 10K_4 R260 10K_4 C502
+3.3V_RUN
R263 *4.02K/F_NC R263 *4.02K/F_NC
R262 *4.02K/F_NC R262 *4.02K/F_NC
+1.8V_SUS+SMDDR_VREF
A A
R487
R487
*1K/F_NC
*1K/F_NC
R486
R486
*1K/F_NC
*1K/F_NC
Strap Description
FSB Frequency Select
Reserved
DMI X2 Select
Reserved
CPU Strap
Low Power PCI Express
PCI Express Graphics
Lane Reversal
XOR/ ALLZ/
Clock Un gating
Reserved
FSB Dynamic ODT
Reserved
DMI Lane Reversal
SDVO/PCIe concurrent
SDVO Present
R495
R495
BK1608LL121
BK1608LL121
+SM_VREF_MCH
C517
C517
C518
C518
.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
5
PM_EXTTS#0
PM_EXTTS#1
MCH_CFG_19
MCH_CFG_20
Configuration
010 = FSB 800MHz
011 = FSB 667MHz
0 = DMI X2
1 = DMI X4 (Default)
0 = Reserved
1 = Mobile CPU (Default)
0 = Normal mode
1 = Low Power mode (Default)
0 = Reverse Lanes
1 = Normal operation (Default)
00 = Reserved
01 = ALL-Z Mode Enabled
10 = XOR Mode Enabled
11 = Clock Gating Enabled (Default)
0 = Dynamic ODT disable
1 = Dynamic ODT Enable (Default)
0 = Normal operation (Default)
1 = Reverse Lanes
0 = Only SDVO or PCIE x1 is operation (Default)
1 = SDVO and PCIE x1 are operating
simultaneously via the PEG port
0 = No SDVO Card present (Default)
1 = SDVO Card Present
MCH_CFG_5
MCH_CFG_9
MCH_CFG_12
MCH_CFG_13
MCH_CFG_16
+1.8V_SUS
R250 *4.02K/F_NC R250 *4.02K/F_NC
R241 *4.02K/F_NC R241 *4.02K/F_NC
R251 *4.02K/F_NC R251 *4.02K/F_NC
R249 *4.02K/F_NC R249 *4.02K/F_NC
R245 *4.02K/F_NC R245 *4.02K/F_NC
R455 1K/F_4 R455 1K/F_4
R453
R453
3.01K/F_4
3.01K/F_4
R452
R452
1K/F_4
1K/F_4
http://laptop-motherboard-schematic.blogspot.com/
4
C466
C466
.01U/16V_4
.01U/16V_4
C462
C462
.01U/16V_4
.01U/16V_4
DELAY_VR_PWRGOOD (2,13,41)
SM_RCOMP_VOH
C467
C467
2.2U/6.3V
2.2U/6.3V
SM_RCOMP_VOL
C460
C460
2.2U/6.3V
2.2U/6.3V
INTEL CRB
ADD 0.1UF
CPU_MCH_BSEL0 (2,16)
CPU_MCH_BSEL1 (2,16)
CPU_MCH_BSEL2 (2,16)
PM_BMBUSY# (13)
ICH_DPRSTP# (2,11,41)
PM_EXTTS#0 (15)
PM_EXTTS#1 (15)
PLTRST#_NB (12)
PM_THRMTRIP# (2,11)
PM_DPRSLPVR (13,41)
R284 0_4 R284 0_4
R278 0_4 R278 0_4
R268 0_4 R268 0_4
R267 0_4 R267 0_4
R242 100_4 R242 100_4
R246 *0_NC R246 *0_NC
R277 0_4 R277 0_4
C212 .1U/10V_4 C212 .1U/10V_4
T35T35
T73T73
T36T36
T22T22
T28T28
T39T39
T29T29
T30T30
T23T23
T34T34
T43T43
PM_BMBUSY#_R
ICH_DPRSTP#_R
PM_EXTTS#0_R
PM_EXTTS#1_R
RST_IN#_MCH
PM_THRMTRIP#_GMCH
PM_DPRSLPVR_GMCH
3
MCH_CFG_3
MCH_CFG_4
MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_8
MCH_CFG_9
MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_14
MCH_CFG_15
MCH_CFG_16
MCH_CFG_17
MCH_CFG_18
MCH_CFG_19
MCH_CFG_20
U40B
U40B
P36
RSVD1
P37
RSVD2
R35
RSVD3
N35
RSVD4
AR12
RSVD5
AR13
RSVD6
AM12
RSVD7
AN13
RSVD8
J12
RSVD9
AR37
RSVD10
AM36
RSVD11
AL36
RSVD12
AM37
RSVD13
D20
RSVD14
H10
RSVD20
B51
RSVD21
BJ20
RSVD22
BK22
RSVD23
BF19
RSVD24
BH20
RSVD25
BK18
RSVD26
BJ18
RSVD27
BF23
RSVD28
BG23
RSVD29
BC23
RSVD30
BD24
RSVD31
BH39
RSVD32
AW20
RSVD33
BK20
RSVD34
C48
RSVD35
D47
RSVD36
B44
RSVD37
C44
RSVD38
A35
RSVD39
B37
RSVD40
B36
RSVD41
B34
RSVD42
C34
RSVD43
P27
CFG_0
N27
CFG_1
N24
CFG_2
C21
CFG_3
C23
CFG_4
F23
CFG_5
N23
CFG_6
G23
CFG_7
J20
CFG_8
C20
CFG_9
R24
CFG_10
L23
CFG_11
J23
CFG_12
E23
CFG_13
E20
CFG_14
K23
CFG_15
M20
CFG_16
M24
CFG_17
L32
CFG_18
N33
CFG_19
L35
CFG_20
G41
PM_BM_BUSY#
L39
PM_DPRSTP#
L36
PM_EXT_TS#_0
J36
PM_EXT_TS#_1
AW49
PWROK
AV20
RSTIN#
N20
THERMTRIP#
G36
DPRSLPVR
BJ51
NC_1
BK51
NC_2
BK50
NC_3
BL50
NC_4
BL49
NC_5
BL3
NC_6
BL2
NC_7
BK1
NC_8
BJ1
NC_9
E1
NC_10
A5
NC_11
C51
NC_12
B50
NC_13
A50
NC_14
A49
NC_15
BK2
NC_16
C0 CRESTLINE_GM FCBGA QS
C0 CRESTLINE_GM FCBGA QS
SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4
SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4
SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
DDR MUXING
DDR MUXING
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF_0
SM_VREF_1
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
CLK
CLK
PEG_CLK#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI
DMI
DMI_TXN_1
CFG RSVD
CFG RSVD
PM
PM
NC
NC
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VR_EN
GRAPHICS VID
GRAPHICS VID
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
ME
ME
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
MISC
MISC
2
CL_CLK
TEST_1
TEST_2
AV29
BB23
BA25
AV23
AW30
BA23
AW25
AW23
BE29
AY32
BD39
BG37
BG20
BK16
BG16
BE13
BH18
BJ15
BJ14
BE16
BL15
BK14
BK31
BL31
AR49
AW4
B42
C42
H48
H47
K44
K45
AN47
AJ38
AN42
AN46
AM47
AJ39
AN41
AN45
AJ46
AJ41
AM40
AM44
AJ47
AJ42
AM39
AM43
E35
A39
C38
B39
E36
AM49
AK50
AT43
AN49
AM50
H35
K36
G39
G40
A37
R32
M_CLK0 (15)
M_CLK1 (15)
M_CLK2 (15)
M_CLK3 (15)
M_CLK#0 (15)
M_CLK#1 (15)
M_CLK#2 (15)
M_CLK#3 (15)
M_CKE0 (15)
M_CKE1 (15)
M_CKE2 (15)
M_CKE3 (15)
M_CS#0 (15)
M_CS#1 (15)
M_CS#2 (15)
M_CS#3 (15)
M_ODT0 (15)
M_ODT1 (15)
M_ODT2 (15)
M_ODT3 (15)
M_RCOMP
M_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
+SM_VREF_MCH
CLK_DREFCLK
CLK_DREFCLK#
CLK_DREFSSCLK
CLK_DREFSSCLK#
CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
MCH_GFX_VID_0
MCH_GFX_VID_1
MCH_GFX_VID_2
MCH_GFX_VID_3
R266 *0_NC R266 *0_NC
+1.25V_CL_VREF
GMCH_TEST1
GMCH_TEST2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
DMI_TXN[3:0] (12)
DMI_TXP[3:0] (12)
DMI_RXN[3:0] (12)
DMI_RXP[3:0] (12)
CL_CLK0 (13)
CL_DATA0 (13)
MPWROK (13,31)
CL_RST#0 (13)
CLK_3GPLLREQ# (16)
MCH_ICH_SYNC# (13)
R458 0_4 R458 0_4
R253 20K_4 R253 20K_4
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
GMCH Strapping(3/7)
GMCH Strapping(3/7)
GMCH Strapping(3/7)
MX3 2B
MX3 2B
MX3 2B
INTEL CRB
CRESSTLINE SHOULD USE 20 ohm
<check list & CRB>
R Value select
For Calero : 80.6ohm
For Cresstline:20ohm
But check list use 80.6ohm
<FAE>
80.6ohm
M_RCOMP
M_RCOMP#
CLK_DREFCLK (16)
CLK_DREFCLK# (16)
CLK_DREFSSCLK (16)
CLK_DREFSSCLK# (16)
CLK_PCIE_3GPLL (16)
CLK_PCIE_3GPLL# (16)
T44T44
T80T80
T77T77
T82T82
SUSB# (13,31,34)
C502
.1U/10V_4
.1U/10V_4
1
+1.8V_SUS
+1.25V_RUN
R488
R488
1K/F_4
1K/F_4
R498
R498
392/F
392/F
of
of
of
65 3 Friday, October 12, 2007
65 3 Friday, October 12, 2007
65 3 Friday, October 12, 2007
R444
R444
20/F_4
20/F_4
R443
R443
20/F_4
20/F_4
5
4
3
2
1
NB(Memory controller)
D D
M_A_DQ[63:0] (15)
C C
B B
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
U40D
U40D
AR43
SA_DQ_0
AW44
SA_DQ_1
BA45
SA_DQ_2
AY46
SA_DQ_3
AR41
SA_DQ_4
AR45
SA_DQ_5
AT42
SA_DQ_6
AW47
SA_DQ_7
BB45
SA_DQ_8
BF48
SA_DQ_9
BG47
SA_DQ_10
BJ45
SA_DQ_11
BB47
SA_DQ_12
BG50
SA_DQ_13
BH49
SA_DQ_14
BE45
SA_DQ_15
AW43
SA_DQ_16
BE44
SA_DQ_17
BG42
SA_DQ_18
BE40
SA_DQ_19
BF44
SA_DQ_20
BH45
SA_DQ_21
BG40
SA_DQ_22
BF40
SA_DQ_23
AR40
SA_DQ_24
AW40
SA_DQ_25
AT39
SA_DQ_26
AW36
SA_DQ_27
AW41
SA_DQ_28
AY41
SA_DQ_29
AV38
SA_DQ_30
AT38
SA_DQ_31
AV13
SA_DQ_32
AT13
SA_DQ_33
AW11
SA_DQ_34
AV11
SA_DQ_35
AU15
SA_DQ_36
AT11
SA_DQ_37
BA13
SA_DQ_38
BA11
SA_DQ_39
BE10
SA_DQ_40
BD10
SA_DQ_41
BD8
SA_DQ_42
AY9
SA_DQ_43
BG10
SA_DQ_44
AW9
SA_DQ_45
BD7
SA_DQ_46
BB9
SA_DQ_47
BB5
SA_DQ_48
AY7
SA_DQ_49
AT5
SA_DQ_50
AT7
SA_DQ_51
AY6
SA_DQ_52
BB7
SA_DQ_53
AR5
SA_DQ_54
AR8
SA_DQ_55
AR9
SA_DQ_56
AN3
SA_DQ_57
AM8
SA_DQ_58
AN10
SA_DQ_59
AT9
SA_DQ_60
AN9
SA_DQ_61
AM9
SA_DQ_62
AN11
SA_DQ_63
C0 CRESTLINE_GM FCBGA QS
C0 CRESTLINE_GM FCBGA QS
BB19
SA_BS_0
BK19
SA_BS_1
BF29
SA_BS_2
BL17
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
SA_RAS#
SA_RCVEN#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_WE#
M_A_DM0
AT45
M_A_DM1
BD44
M_A_DM2
BD42
M_A_DM3
AW38
M_A_DM4
AW13
M_A_DM5
BG8
M_A_DM6
AY5
M_A_DM7
AN6
M_A_DQS0
AT46
M_A_DQS1
BE48
M_A_DQS2
BB43
M_A_DQS3
BC37
M_A_DQS4
BB16
M_A_DQS5
BH6
M_A_DQS6
BB2
M_A_DQS7
AP3
M_A_DQS#0
AT47
M_A_DQS#1
BD47
M_A_DQS#2
BC41
M_A_DQS#3
BA37
M_A_DQS#4
BA16
M_A_DQS#5
BH7
M_A_DQS#6
BC1
M_A_DQS#7
AP2
M_A_A0
BJ19
M_A_A1
BD20
M_A_A2
BK27
M_A_A3
BH28
M_A_A4
BL24
M_A_A5
BK28
M_A_A6
BJ27
M_A_A7
BJ25
M_A_A8
BL28
M_A_A9
BA28
M_A_A10
BC19
M_A_A11
BE28
M_A_A12
BG30
M_A_A13
BJ16
M_A_A14 M_B_A14
BJ29
BE18
TP_SA_RCVEN#
AY20
BA19
M_A_BS0 (15)
M_A_BS1 (15)
M_A_BS2 (15)
M_A_CAS# (15)
M_A_DM[7:0] (15)
M_A_DQS[7:0] (15)
M_A_DQS#[7:0] (15)
M_A_A[13:0] (15)
M_A_A14 (15) M_B_A14 (15)
M_A_RAS# (15)
T31T31
M_A_WE# (15)
M_B_DQ[63:0] (15)
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
U40E
U40E
AP49
SB_DQ_0
AR51
SB_DQ_1
AW50
SB_DQ_2
AW51
SB_DQ_3
AN51
SB_DQ_4
AN50
SB_DQ_5
AV50
SB_DQ_6
AV49
SB_DQ_7
BA50
SB_DQ_8
BB50
SB_DQ_9
BA49
SB_DQ_10
BE50
SB_DQ_11
BA51
SB_DQ_12
AY49
SB_DQ_13
BF50
SB_DQ_14
BF49
SB_DQ_15
BJ50
SB_DQ_16
BJ44
SB_DQ_17
BJ43
SB_DQ_18
BL43
SB_DQ_19
BK47
SB_DQ_20
BK49
SB_DQ_21
BK43
SB_DQ_22
BK42
SB_DQ_23
BJ41
SB_DQ_24
BL41
SB_DQ_25
BJ37
SB_DQ_26
BJ36
SB_DQ_27
BK41
SB_DQ_28
BJ40
SB_DQ_29
BL35
SB_DQ_30
BK37
SB_DQ_31
BK13
SB_DQ_32
BE11
SB_DQ_33
BK11
SB_DQ_34
BC11
SB_DQ_35
BC13
SB_DQ_36
BE12
SB_DQ_37
BC12
SB_DQ_38
BG12
SB_DQ_39
BJ10
SB_DQ_40
BL9
SB_DQ_41
BK5
SB_DQ_42
BL5
SB_DQ_43
BK9
SB_DQ_44
BK10
SB_DQ_45
BJ8
SB_DQ_46
BJ6
SB_DQ_47
BF4
SB_DQ_48
BH5
SB_DQ_49
BG1
SB_DQ_50
BC2
SB_DQ_51
BK3
SB_DQ_52
BE4
SB_DQ_53
BD3
SB_DQ_54
BJ2
SB_DQ_55
BA3
SB_DQ_56
BB3
SB_DQ_57
AR1
SB_DQ_58
AT3
SB_DQ_59
AY2
SB_DQ_60
AY3
SB_DQ_61
AU2
SB_DQ_62
AT2
SB_DQ_63
C0 CRESTLINE_GM FCBGA QS
C0 CRESTLINE_GM FCBGA QS
AY17
SB_BS_0
BG18
SB_BS_1
BG36
SB_BS_2
BE17
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
SB_RAS#
SB_RCVEN#
SB_WE#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
BE24
AV16
AY18
BC17
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
TP_SB_RCVEN#
M_B_BS0 (15)
M_B_BS1 (15)
M_B_BS2 (15)
M_B_CAS# (15)
M_B_DM[7:0] (15)
M_B_DQS[7:0] (15)
M_B_DQS#[7:0] (15)
M_B_A[13:0] (15)
M_B_RAS# (15)
T21T21
M_B_WE# (15)
A A
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
http://laptop-motherboard-schematic.blogspot.com/
4
3
2
Date: Sheet
COMPUTER
GMCH DDRII(4/7)
GMCH DDRII(4/7)
GMCH DDRII(4/7)
MX3 2B
MX3 2B
MX3 2B
1
of
of
of
75 3 Friday, October 12, 2007
75 3 Friday, October 12, 2007
75 3 Friday, October 12, 2007
NB(Power-1)
5
4
3
2
1
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
AW45
BC39
BE39
BD17
BD4
AW8
AT6
+1.05V_VCCP
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
C176
C176
.1U/10V_4
.1U/10V_4
+1.05V_VCCP
C430
C430
10U/10V_8
10U/10V_8
C189
C189
.1U/10V_4
.1U/10V_4
C164
C164
.22U/6.3V_4
.22U/6.3V_4
+1.05V_VCCP
C188
C188
.22U/6.3V_4
.22U/6.3V_4
C211
C211
.22U/6.3V_4
.22U/6.3V_4
C431
C431
10U/10V_8
10U/10V_8
C185
C185
.22U/6.3V_4
.22U/6.3V_4
C278
C278
.47U/10V
.47U/10V
C254
C254
.22U/6.3V_4
.22U/6.3V_4
C261
C261
.1U/10V_4
.1U/10V_4
C272
C272
1U/16V
1U/16V
C233
C233
.22U/6.3V_4
.22U/6.3V_4
C273
C273
.1U/10V_4
.1U/10V_4
C521
C521
1U/16V
1U/16V
C200
C200
.1U/10V_4
.1U/10V_4
C266
C266
.1U/10V_4
.1U/10V_4
U40F
U40F
AB33
VCC_NCTF_1
AB36
VCC_NCTF_2
AB37
VCC_NCTF_3
AC33
VCC_NCTF_4
AC35
VCC_NCTF_5
AC36
VCC_NCTF_6
AD35
VCC_NCTF_7
AD36
VCC_NCTF_8
AF33
VCC_NCTF_9
AF36
VCC_NCTF_10
AH33
VCC_NCTF_11
AH35
VCC_NCTF_12
AH36
VCC_NCTF_13
AH37
VCC_NCTF_14
AJ33
VCC_NCTF_15
AJ35
VCC_NCTF_16
AK33
VCC_NCTF_17
AK35
VCC_NCTF_18
AK36
VCC_NCTF_19
AK37
VCC_NCTF_20
AD33
VCC_NCTF_21
AJ36
VCC_NCTF_22
AM35
VCC_NCTF_23
AL33
VCC_NCTF_24
AL35
VCC_NCTF_25
AA33
VCC_NCTF_26
AA35
VCC_NCTF_27
AA36
VCC_NCTF_28
AP35
VCC_NCTF_29
AP36
VCC_NCTF_30
AR35
VCC_NCTF_31
AR36
VCC_NCTF_32
Y32
VCC_NCTF_33
Y33
VCC_NCTF_34
Y35
VCC_NCTF_35
Y36
VCC_NCTF_36
Y37
VCC_NCTF_37
T30
VCC_NCTF_38
T34
VCC_NCTF_39
T35
VCC_NCTF_40
U29
VCC_NCTF_41
U31
VCC_NCTF_42
U32
VCC_NCTF_43
U33
VCC_NCTF_44
U35
VCC_NCTF_45
U36
VCC_NCTF_46
V32
VCC_NCTF_47
V33
VCC_NCTF_48
V36
VCC_NCTF_49
V37
VCC_NCTF_50
AL24
VCC_AXM_NCTF_1
AL26
VCC_AXM_NCTF_2
AL28
VCC_AXM_NCTF_3
AM26
VCC_AXM_NCTF_4
AM28
VCC_AXM_NCTF_5
AM29
VCC_AXM_NCTF_6
AM31
VCC_AXM_NCTF_7
AM32
VCC_AXM_NCTF_8
AM33
VCC_AXM_NCTF_9
AP29
VCC_AXM_NCTF_10
AP31
VCC_AXM_NCTF_11
AP32
VCC_AXM_NCTF_12
AP33
VCC_AXM_NCTF_13
AL29
VCC_AXM_NCTF_14
AL31
VCC_AXM_NCTF_15
AL32
VCC_AXM_NCTF_16
AR31
VCC_AXM_NCTF_17
AR32
VCC_AXM_NCTF_18
AR33
VCC_AXM_NCTF_19
C0 CRESTLINE_GM FCBGA QS
C0 CRESTLINE_GM FCBGA QS
VCC NCTF
VCC NCTF
POWER
POWER
VCC AXM NCTF
VCC AXM NCTF
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS NCTF
VSS NCTF
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6
VSS SCB VCC AXM
VSS SCB VCC AXM
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
A3
B2
C1
BL1
BL51
A51
+1.05V_VCCP
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
+1.05V_VCCP
D D
+1.8V_SUS
+
+
C258
C258
330U/2.5V_7
330U/2.5V_7
H=1.8
C C
B B
H=1.8
+
+
C142
C142
330U_7
330U_7
C471
C471
10U/10V_8
10U/10V_8
H=1.8
A A
C1981UC1981UC210
+
+
C143
C143
330U_7
330U_7
C268
C268
10U/10V_8
10U/10V_8
C210
10U_8
10U_8
C223
C223
.47U
.47U
C474
C474
.1U/10V_4
.1U/10V_4
C246
C246
.1U_4
.1U_4
C244
C244
.1U_4
.1U_4
+1.05V_VCCP
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30
W13
W14
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14
R30
R20
T14
Y12
U40G
U40G
VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC CORE
VCC CORE
POWER
POWER
VCC SM VCC GFX
VCC SM VCC GFX
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
VCC SM LF
VCC SM LF
QUANTA
QUANTA
C0 CRESTLINE_GM FCBGA QS
C0 CRESTLINE_GM FCBGA QS
5
http://laptop-motherboard-schematic.blogspot.com/
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
QUANTA
COMPUTER
COMPUTER
COMPUTER
GMCH Power-1(5/7)
GMCH Power-1(5/7)
GMCH Power-1(5/7)
MX3 2B
MX3 2B
MX3 2B
1
of
of
of
85 3 Friday, October 12, 2007
85 3 Friday, October 12, 2007
85 3 Friday, October 12, 2007
5
NB(Power-2)
<FAE>
INT VGA disable
+3.3V_RUN
R433
R433
0.5/F
0.5/F
C253
C253
22N/16V_4
22N/16V_4
C250
C250
22N_4
22N_4
+3V_TV_DAC
C433
C433
.1U/10V_4
.1U/10V_4
R434 0 R434 0
C425
C425
100U/6.3V_3528
100U/6.3V_3528
R248 0 R248 0
VCCSYNC connect to GND
L57 BKP1608HS181-T L57 BKP1608HS181-T
C436
C436
.1U/10V_4
.1U/10V_4
+1.25V_RUN
+1.25V_RUN
D D
+1.25V_RUN
C C
L37 10UH_8 L37 10UH_8
470U/2.5V_7
470U/2.5V_7
L66 10UH_8 L66 10UH_8
470U/2.5V_7
470U/2.5V_7
+1.25V_RUN
C426 22U/6.3V_0805 C426 22U/6.3V_0805
+
+
C301
C302
C302
C558
C558
L55 BKP1608HS181-T L55 BKP1608HS181-T
L54 BKP1608HS181-T L54 BKP1608HS181-T
C301
.1U/10V_4
.1U/10V_4
+
+
C503
C503
.1U/10V_4
.1U/10V_4
22U/6.3V_0805
22U/6.3V_0805
V1.25M_MPLL_RC
+1.25V_RUN
C427
C427
H=1.9
CRB RECOMMEND
180OHM@100MHz
Rdc= 0.09OHM (max)
L35
L35
BKP1608HS181-T
BKP1608HS181-T
+3.3V_RUN
B B
C456
C456
10U_8
10U_8
+1.5V_RUN
A A
R255 100_0603 R255 100_0603
5
+1.25V_RUN
C236
C236
.1U_4
.1U_4
C237
C237
.1U_4
.1U_4
C458
C458
.1U_4
.1U_4
<FAE>
INT VGA disable
VCCD_TVDAC still +1.5V
C252
C252
.1U/10V_4
.1U/10V_4
C251
C251
.1U_4
.1U_4
4
+3.3V_RUN
R448 0 R448 0 C235
+1.8V_SUS
+3.3V_RUN
C221
C221
4.7U/10V
4.7U/10V
C229
C229
22U/6.3V_0805
22U/6.3V_0805
+1.25V_RUN
+1.8V_SUS
C2551UC255
1U
http://laptop-motherboard-schematic.blogspot.com/
C265
C265
.1U_4
.1U_4
C465
C465
.1U_4
.1U_4
C464
C464
.1U_4
.1U_4
R460 0 R460 0
R497 0_8 R497 0_8
C429
C429
22U/6.3V_0805
22U/6.3V_0805
R432 0 R432 0
L65 BKP1608HS181-T L65 BKP1608HS181-T
4
C516
C516
.1U/10V_4
.1U/10V_4
C208
C208
1U/16V
1U/16V
C245
C245
.1U/10V_4
.1U/10V_4
C435
C435
.1U/10V_4
.1U/10V_4
+V1.25S_PEGPLL_FB
C574
C574
2.2U/10V_8
2.2U/10V_8
R289 0 R289 0
C469
C469
22N_4
22N_4
C463
C463
22N_4
22N_4
+1.25VM_VCCA_SM_CK
R258 0 R258 0
CRT/TV Disable/Enable guideline
Enable
Ball
3.3V
VCCA_CRT
1.5V
VCCD_CRT
1.5V
VCCDQ_CRT
3.3V
VCCA_A_TVO
3.3V
VCCA_B_TVO
+3V_VCCA_CRT_DAC
+3V_VCCA_DAC_BG
+1.25V_VCCA_DPLLA
+1.25V_VCCA_DPLLB
+1.25VM_VCCA_HPLL
+1.25VM_VCCA_MPLL
+1.8VSUS_VCC_LVDS
C477
C477
1000P_4
1000P_4
+3V_VCCA_PEG_BG
+1.25V_VCCD_PEG_PLL
+1.25VM_VCCA_SM
+3V_TV_DAC
+1.5V_VCCD_QDAC
+1.25VM_MCH_VCCD_HPLL
+1.25V_VCCD_PEG_PLL
C570
C570
.1U/10V_4
.1U/10V_4
R513
R513
1/F_8
1/F_8
+1.8V_VCCD_LVDS
C3001UC300
1U
3
Disable
Ball
GND
VCCA_C_TVO
VCCD_TVO
GND
VCCABG_DAC GND
GND
GND
VSSABG_DAC
GND
U40H
U40H
J32
VCCSYNC
A33
VCCA_CRT_DAC_1
B33
VCCA_CRT_DAC_2
A30
VCCA_DAC_BG
B32
VSSA_DAC_BG
B49
VCCA_DPLLA
H49
VCCA_DPLLB
AL2
VCCA_HPLL
AM2
VCCA_MPLL
A41
VCCA_LVDS
B41
VSSA_LVDS
K50
VCCA_PEG_BG
K49
VSSA_PEG_BG
U51
VCCA_PEG_PLL
AW18
VCCA_SM_1
AV19
VCCA_SM_2
AU19
VCCA_SM_3
AU18
VCCA_SM_4
AU17
VCCA_SM_5
AT22
VCCA_SM_7
AT21
VCCA_SM_8
AT19
VCCA_SM_9
AT18
VCCA_SM_10
AT17
VCCA_SM_11
AR17
VCCA_SM_NCTF_1
AR16
VCCA_SM_NCTF_2
BC29
VCCA_SM_CK_1
BB29
VCCA_SM_CK_2
C25
VCCA_TVA_DAC_1
B25
VCCA_TVA_DAC_2
C27
VCCA_TVB_DAC_1
B27
VCCA_TVB_DAC_2
B28
VCCA_TVC_DAC_1
A28
VCCA_TVC_DAC_2
M32
VCCD_CRT
L29
VCCD_TVDAC
N28
VCCD_QDAC
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
J41
VCCD_LVDS_1
H42
VCCD_LVDS_2
C0 CRESTLINE_GM FCBGA QS
C0 CRESTLINE_GM FCBGA QS
+1.05V_VCCP
+3.3V_RUN
3
2
Enable
Disable
GND GND
3.3V
1.5V
GND
3.3V
GND
GND
GND
3.3V VCC_SYNC
U13
VTT_1
U12
VTT_2
U11
VTT_3
U9
VTT_4
U8
VTT_5
U7
VTT_6
U5
VTT_7
CRT PLL A PEG A SM TV
CRT PLL A PEG A SM TV
AXD
AXD
VCC_AXD_NCTF
POWER
POWER
A CK A LVDS
A CK A LVDS
D TV/CRT LVDS
D TV/CRT LVDS
<CRB>
+1.25V AND +1.25M shall be
+1.5V for Calero Interposer
DMI
DMI
D33
D33
2 1
SDMK0340L-7-F
SDMK0340L-7-F
AXF
AXF
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
SM CK
SM CK
VCC_TX_LVDS
PEG
PEG
VCC_RXR_DMI_1
VCC_RXR_DMI_2
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT
VTT
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
VCC_DMI
VCC_HV_1
VCC_HV_2
HV
HV
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
VTTLF1
VTTLF2
VTTLF3
VTTLF
VTTLF
+1.05V_SD
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
AT23
AU28
AU24
AT29
AT25
AT30
AR29
B23
B21
A21
AJ50
+1.8VSUS_VCC_SM_CK
BK24
BK23
BJ24
BJ23
+1.8VSUS_VCC_TX_LVDS
A43
C40
B40
AD51
W50
W51
V49
V50
AH50
AH51
A7
F2
AH1
C434
C434
.47U/6.3V_4
.47U/6.3V_4
R44910R449
10
R279 0 R279 0
+3V_VCC_HV
C432
C432
.47U/6.3V_4
.47U/6.3V_4
2
LVDS Disable/Enable guideline
C263
C263
2.2U/10V_8
2.2U/10V_8
C238
C238
1U/16V
1U/16V
C220
C220
1U/16V
1U/16V
C519
C519
.1U/10V_4
.1U/10V_4
C455
C455
.1U/10V_4
.1U/10V_4
C287
C287
.1U/10V_4
.1U/10V_4
If SDVO Disable
LVDS Disable
GND
EXTERNAL
C222
C222
2.2U/10V_8
2.2U/10V_8
+1.25V_RUN
C231
C231
*22U/6.3V_0805_NC
*22U/6.3V_0805_NC
+1.25V_RUN
C227
C227
10U/10V_8
10U/10V_8
+1.25V_RUN
L56 1UH_8 L56 1UH_8
C454
C454
R447 1/F R447 1/F
22U/6.3V_0805
22U/6.3V_0805
1 2
C488
C488
+
+
1000P_4
1000P_4
L41 91nH L41 91nH
C524
C524
2.2U/10V_8
2.2U/10V_8
1 2
+
+
C344
C344
220U/4V
220U/4V
H=1.9
Title
Title
Title
GMCH Power-2(6/7)
GMCH Power-2(6/7)
GMCH Power-2(6/7)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MX3 2B
MX3 2B
MX3 2B
Date: Sheet
Date: Sheet
Date: Sheet
Signal
VCCD_LVDS
VCCA_LVDS
VCCTX_LVDS
+1.05_PEG
C448
C448
.47U/6.3V_4
.47U/6.3V_4
+3V_VCC_HV
If SDVO enable
LVDS Disable
1.8V
GND
GND
+
+
C235
.47U/10V
.47U/10V
C345
C345
330U/2.5V_7
330U/2.5V_7
H=1.8
+V1.8_SMCK_RC
L58 1UH_8 L58 1UH_8
C489
C489
220U/4V
220U/4V
H=1.9
<FAE>
VCC_RXR_DMI and VCC_PEG
connect to+1.05V
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
1
If SDVO enable
LVDS enable
1.8V
1.8V 1.5V
1.8V
INTERNAL
+1.05V_VCCP
+1.8V_SUS
+1.8V_SUS
+1.05V_VCCP
1
C453 22U/6.3V_0805 C453 22U/6.3V_0805
of
of
of
95 3 Friday, October 12, 2007
95 3 Friday, October 12, 2007
95 3 Friday, October 12, 2007
5
4
3
2
1
NB(Power-3)
U40I
D D
C C
B B
A A
5
U40I
A13
VSS_1
A15
VSS_2
A17
VSS_3
A24
VSS_4
AA21
VSS_5
AA24
VSS_6
AA29
VSS_7
AB20
VSS_8
AB23
VSS_9
AB26
VSS_10
AB28
VSS_11
AB31
VSS_12
AC10
VSS_13
AC13
VSS_14
AC3
VSS_15
AC39
VSS_16
AC43
VSS_17
AC47
VSS_18
AD1
VSS_19
AD21
VSS_20
AD26
VSS_21
AD29
VSS_22
AD3
VSS_23
AD41
VSS_24
AD45
VSS_25
AD49
VSS_26
AD5
VSS_27
AD50
VSS_28
AD8
VSS_29
AE10
VSS_30
AE14
VSS_31
AE6
VSS_32
AF20
VSS_33
AF23
VSS_34
AF24
VSS_35
AF31
VSS_36
AG2
VSS_37
AG38
VSS_38
AG43
VSS_39
AG47
VSS_40
AG50
VSS_41
AH3
VSS_42
AH40
VSS_43
AH41
VSS_44
AH7
VSS_45
AH9
VSS_46
AJ11
VSS_47
AJ13
VSS_48
AJ21
VSS_49
AJ24
VSS_50
AJ29
VSS_51
AJ32
VSS_52
AJ43
VSS_53
AJ45
VSS_54
AJ49
VSS_55
AK20
VSS_56
AK21
VSS_57
AK26
VSS_58
AK28
VSS_59
AK31
VSS_60
AK51
VSS_61
AL1
VSS_62
AM11
VSS_63
AM13
VSS_64
AM3
VSS_65
AM4
VSS_66
AM41
VSS_67
AM45
VSS_68
AN1
VSS_69
AN38
VSS_70
AN39
VSS_71
AN43
VSS_72
AN5
VSS_73
AN7
VSS_74
AP4
VSS_75
AP48
VSS_76
AP50
VSS_77
AR11
VSS_78
AR2
VSS_79
AR39
VSS_80
AR44
VSS_81
AR47
VSS_82
AR7
VSS_83
AT10
VSS_84
AT14
VSS_85
AT41
VSS_86
AT49
VSS_87
AU1
VSS_88
AU23
VSS_89
AU29
VSS_90
AU3
VSS_91
AU36
VSS_92
AU49
VSS_93
AU51
VSS_94
AV39
VSS_95
AV48
VSS_96
AW1
VSS_97
AW12
VSS_98
AW16
VSS_99
C0 CRESTLINE_GM FCBGA QS
C0 CRESTLINE_GM FCBGA QS
VSS
VSS
AW24
VSS_100
AW29
VSS_101
AW32
VSS_102
AW5
VSS_103
AW7
VSS_104
AY10
VSS_105
AY24
VSS_106
AY37
VSS_107
AY42
VSS_108
AY43
VSS_109
AY45
VSS_110
AY47
VSS_111
AY50
VSS_112
B10
VSS_113
B20
VSS_114
B24
VSS_115
B29
VSS_116
B30
VSS_117
B35
VSS_118
B38
VSS_119
B43
VSS_120
B46
VSS_121
B5
VSS_122
B8
VSS_123
BA1
VSS_124
BA17
VSS_125
BA18
VSS_126
BA2
VSS_127
BA24
VSS_128
BB12
VSS_129
BB25
VSS_130
BB40
VSS_131
BB44
VSS_132
BB49
VSS_133
BB8
VSS_134
BC16
VSS_135
BC24
VSS_136
BC25
VSS_137
BC36
VSS_138
BC40
VSS_139
BC51
VSS_140
BD13
VSS_141
BD2
VSS_142
BD28
VSS_143
BD45
VSS_144
BD48
VSS_145
BD5
VSS_146
BE1
VSS_147
BE19
VSS_148
BE23
VSS_149
BE30
VSS_150
BE42
VSS_151
BE51
VSS_152
BE8
VSS_153
BF12
VSS_154
BF16
VSS_155
BF36
VSS_156
BG19
VSS_157
BG2
VSS_158
BG24
VSS_159
BG29
VSS_160
BG39
VSS_161
BG48
VSS_162
BG5
VSS_163
BG51
VSS_164
BH17
VSS_165
BH30
VSS_166
BH44
VSS_167
BH46
VSS_168
BH8
VSS_169
BJ11
VSS_170
BJ13
VSS_171
BJ38
VSS_172
BJ4
VSS_173
BJ42
VSS_174
BJ46
VSS_175
BK15
VSS_176
BK17
VSS_177
BK25
VSS_178
BK29
VSS_179
BK36
VSS_180
BK40
VSS_181
BK44
VSS_182
BK6
VSS_183
BK8
VSS_184
BL11
VSS_185
BL13
VSS_186
BL19
VSS_187
BL22
VSS_188
BL37
VSS_189
BL47
VSS_190
C12
VSS_191
C16
VSS_192
C19
VSS_193
C28
VSS_194
C29
VSS_195
C33
VSS_196
C36
VSS_197
C41
VSS_198
http://laptop-motherboard-schematic.blogspot.com/
4
3
U40J
U40J
C46
VSS_199
C50
VSS_200
C7
VSS_201
D13
VSS_202
D24
VSS_203
D3
VSS_204
D32
VSS_205
D39
VSS_206
D45
VSS_207
D49
VSS_208
E10
VSS_209
E16
VSS_210
E24
VSS_211
E28
VSS_212
E32
VSS_213
E47
VSS_214
F19
VSS_215
F36
VSS_216
F4
VSS_217
F40
VSS_218
F50
VSS_219
G1
VSS_220
G13
VSS_221
G16
VSS_222
G19
VSS_223
G24
VSS_224
G28
VSS_225
G29
VSS_226
G33
VSS_227
G42
VSS_228
G45
VSS_229
G48
VSS_230
G8
VSS_231
H24
VSS_232
H28
VSS_233
H4
VSS_234
H45
VSS_235
J11
VSS_236
J16
VSS_237
J2
VSS_238
J24
VSS_239
J28
VSS_240
J33
VSS_241
J35
VSS_242
J39
VSS_243
K12
VSS_245
K47
VSS_246
K8
VSS_247
L1
VSS_248
L17
VSS_249
L20
VSS_250
L24
VSS_251
L28
VSS_252
L3
VSS_253
L33
VSS_254
L49
VSS_255
M28
VSS_256
M42
VSS_257
M46
VSS_258
M49
VSS_259
M5
VSS_260
M50
VSS_261
M9
VSS_262
N11
VSS_263
N14
VSS_264
N17
VSS_265
N29
VSS_266
N32
VSS_267
N36
VSS_268
N39
VSS_269
N44
VSS_270
N49
VSS_271
N7
VSS_272
P19
VSS_273
P2
VSS_274
P23
VSS_275
P3
VSS_276
P50
VSS_277
R49
VSS_278
T39
VSS_279
T43
VSS_280
T47
VSS_281
U41
VSS_282
U45
VSS_283
U50
VSS_284
V2
VSS_285
V3
VSS_286
C0 CRESTLINE_GM FCBGA QS
C0 CRESTLINE_GM FCBGA QS
2
VSS
VSS
W11
VSS_287
W39
VSS_288
W43
VSS_289
W47
VSS_290
W5
VSS_291
W7
VSS_292
Y13
VSS_293
Y2
VSS_294
Y41
VSS_295
Y45
VSS_296
Y49
VSS_297
Y5
VSS_298
Y50
VSS_299
Y11
VSS_300
P29
VSS_301
T29
VSS_302
T31
VSS_303
T33
VSS_304
R28
VSS_305
AA32
VSS_306
AB32
VSS_307
AD32
VSS_308
AF28
VSS_309
AF29
VSS_310
AT27
VSS_311
AV25
VSS_312
H50
VSS_313
Title
Title
Title
GMCH Power-3(7/7)
GMCH Power-3(7/7)
GMCH Power-3(7/7)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MX3 2B
MX3 2B
MX3 2B
Date: Sheet
Date: Sheet
Date: Sheet
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
1
of
of
of
10 53 Friday, October 12, 2007
10 53 Friday, October 12, 2007
10 53 Friday, October 12, 2007
RTC
5
4
3
2
1
D D
+3.3V_ALW
R_3VRTC RTC_RST#
R529
R529
1K_4
1K_4
CN27
CN27
1
2
SUY_060003FA002G201NL
SUY_060003FA002G201NL
C C
SB Strap
As Intel's review(Apr.,17,2007), internal VR must be enabled.
INTVRMEN Low = Internal VR disable
LAN100_SLP
+VCCRTC
B B
HDA
ACZ_SYNC_AUDIO (22)
ACZ_RST#_AUDIO (22)
ACZ_SDOUT_AUDIO (22)
2 1
D35 RB500V D35 RB500V
2 1
D34 RB500V D34 RB500V
R514
R514
332K/F
332K/F
ICH_INTVRMEN
BIT_CLK_AUDIO (22)
+VCCRTC
R530 20K_4 R530 20K_4
C583
C583
1U/10V
1U/10V
RTC-BATTERY RTC-BATTERY
1U/10V
1U/10V
C607
C607
1 2
JP1
JP1
*RTC_RST_NC
*RTC_RST_NC
High = Internal VR enable(Default)
Low = Internal VR disable
High = Internal VR enable(Default)
+VCCRTC
R509
R509
332K/F
332K/F
LAN100_SLP
R302 33_0603 R302 33_0603
R300 33_4 R300 33_4
R472 33_4 R472 33_4
R459 33_4 R459 33_4
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
C319 15P/50V C319 15P/50V
1 2
Y5
Y5
32.768KHZ
32.768KHZ
C317 15P/50V C317 15P/50V
1 2
+VCCRTC
As Intel's review(Apr.,17,2007),
the GLAN_COMPO/COMPI
connection to 1.5-V rail through
the 24.9 ohm 1% remains even
if non-Intel LAN is used.
SATA_RXN0 (28)
SATA_RXP0 (28)
SATA_TXN0 (28)
SATA_TXP0 (28)
SATA_RXN1 (28)
SATA_RXP1 (28)
SATA_TXN1 (28)
SATA_TXP1 (28)
R330
R330
10M
10M
2 1
R511 1M R511 1M
+1.5V_GLAN
T54T54
R327
R327
24.9/F
24.9/F
ACZ_SDIN0 (22)
T93T93
T50T50
T88T88
ACZ_SDOUT (13)
T86T86
T89T89
SATA_LED# (35)
C470 3900P/25V_4 C470 3900P/25V_4
C472 3900P/25V_4 C472 3900P/25V_4
C260 3900P/25V_4 C260 3900P/25V_4
C248 3900P/25V_4 C248 3900P/25V_4
CLK_PCIE_SATA# (16)
CLK_PCIE_SATA (16)
R247 24.9/F_4 R247 24.9/F_4
<check list>
L<500mils
CLK_32KX1
CLK_32KX2
RTC_RST#
ICH_INTRUDER#
ICH_INTVRMEN
ICH_GPIO13
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
GPIO33#
GPIO34#
SATA_LED#
SATA_TXN0_C
SATA_TXP0_C
R575 0 R575 0
R576 0 R576 0
SATA_TXN1_C
SATA_TXP1_C
SATA_BIAS
U25A
U25A
AG25
RTCX1
AF24
RTCX2
AF23
RTCRST#
AD22
INTRUDER#
AF25
INTVRMEN
AD21
LAN100_SLP
B24
GLAN_CLK
D22
LAN_RSTSYNC
C21
LAN_RXD0
B21
LAN_RXD1
C22
LAN_RXD2
D21
LAN_TXD0
E20
LAN_TXD1
C20
LAN_TXD2
AH21
GLAN_DOCK#/GPIO13
D25
GLAN_COMPI
C25
GLAN_COMPO
AJ16
HDA_BIT_CLK
AJ15
HDA_SYNC
AE14
HDA_RST#
AJ17
HDA_SDIN0
AH17
HDA_SDIN1
AH15
HDA_SDIN2
AD13
HDA_SDIN3
AE13
HDA_SDOUT
AE10
HDA_DOCK_EN#/GPIO33
AG14
HDA_DOCK_RST#/GPIO34
AF10
SATALED#
AF6
SATA0RXN
AF5
SATA0RXP
AH5
SATA0TXN
AH6
SATA0TXP
AG3
SATA1RXN
AG4
SATA1RXP
AJ4
SATA1TXN
AJ3
SATA1TXP
AF2
SATA2RXN
AF1
SATA2RXP
AE4
SATA2TXN
AE3
SATA2TXP
AB7
SATA_CLKN
AC6
SATA_CLKP
AG1
SATARBIAS#
AG2
SATARBIAS
ICH8M REV 1.0
ICH8M REV 1.0
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
FWH4/LFRAME#
LDRQ0#
LDRQ1#/GPIO23
RTC LAN / GLAN
LPC CPU
RTC LAN / GLAN
LPC CPU
A20GATE
A20M#
DPRSTP#
DPSLP#
FERR#
CPUPWRGD/GPIO49
IGNNE#
RCIN#
STPCLK#
THRMTRIP#
IHDA
IHDA
IDE
IDE
SATA
SATA
DCS1#
DCS3#
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
INIT#
INTR
SMI#
DD10
DD11
DD12
DD13
DD14
DD15
NMI
TP8
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DA0
DA1
DA2
E5
F5
G8
F6
C4
G9
E6
AF13
AG26
AF26
AE26
AD24
AG29
AF27
AE24
AC20
AH14
AD23
AG28
AA24
AE27
AA23
V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6
AA4
AA1
AB3
Y6
Y5
W4
W3
Y2
Y3
Y1
W5
LDRQ0#
ICH_GPIO23 LAN100_SLP
GATEA20
H_DPRSTP#_R
H_DPSLP#_R
H_PWRGD_R
RCIN#
H_THERMTRIP_R
ICH_TP8
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDA0
PDA1
PDA2
LAD0 (25,31)
LAD1 (25,31)
LAD2 (25,31)
LAD3 (25,31)
LFRAME# (25,31)
T81T81
T79T79
*56.2/F_NC
*56.2/F_NC
GATEA20 (31)
H_A20M# (2)
R519 0_4 R519 0_4
R518 0_4 R518 0_4
R347 0_4 R347 0_4
H_IGNNE# (2)
H_INIT# (2)
H_INTR (2)
RCIN# (31)
H_NMI (2)
H_SMI# (2)
H_STPCLK# (2)
R348 24/F_0603 R348 24/F_0603
T100T100
PDD[15:0] (28)
PDA[2:0] (28)
PDCS1# (28)
PDCS3# (28)
PDIOR# (28)
PDIOW# (28)
PDDACK# (28)
IRQ14 (28)
PIORDY (28)
PDDREQ (28)
+1.05V_VCCP
R521
R521
H_PWRGD (2)
R522
R522
*56.2/F_NC
*56.2/F_NC
+1.05V_VCCP
R352
R352
56.2/F_4
56.2/F_4
R353 *0_NC R353 *0_NC
ICH_DPRSTP# (2,6,41)
H_DPSLP# (2)
Placement close SB L<2"
PM_THRMTRIP# (2,6)
+1.05V_VCCP
R515
R515
56.2/F_4
56.2/F_4
H_FERR# (2)
Close to SB,Length <2.5"
A A
5
http://laptop-motherboard-schematic.blogspot.com/
4
RCIN#
R295 *10K_4_NC R295 *10K_4_NC
GATEA20
R471 8.2K_4 R471 8.2K_4
3
+3.3V_RUN
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
COMPUTER
ICH8M Host(1/4)
ICH8M Host(1/4)
ICH8M Host(1/4)
MX3 2B
MX3 2B
MX3 2B
1
of
of
of
11 53 Friday, October 12, 2007
11 53 Friday, October 12, 2007
11 53 Friday, October 12, 2007
5
4
3
2
1
SB-PCIE/USB/DMI SB-PCI
U25D
U25D
AJ19
AG16
AG15
AE15
AF15
AG17
AD12
AJ18
AD14
AH18
P27
P26
N29
N28
M27
M26
L29
L28
K27
K26
J29
J28
H27
H26
G29
G28
F27
F26
E29
E28
D27
D26
C29
C28
C23
B23
E22
D23
F21
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
SPI_CLK
SPI_CS0#
SPI_CS1#
SPI_MOSI
SPI_MISO
OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#
ICH8M REV 1.0
ICH8M REV 1.0
PCI-Express
PCI-Express
DMI_IRCOMP
SPI
SPI
USB
USB
PCIE_RXN1 (26)
+3.3V_S5
OC8#
OC9#
PCIE_RXP1 (26)
PCIE_TXN1 (26)
PCIE_TXP1 (26)
PCIE_RXN3 (24)
PCIE_RXP3 (24)
PCIE_TXN3 (24)
PCIE_TXP3 (24)
PCIE_RXN4 (25)
PCIE_RXP4 (25)
PCIE_TXN4 (25)
PCIE_TXP4 (25)
PCIE_RXN5 (25)
PCIE_RXP5 (25)
PCIE_TXN5 (25)
PCIE_TXP5 (25)
GLAN_RXN (20)
GLAN_RXP (20)
GLAN_TXN (20)
GLAN_TXP (20)
NC_EN#
USB_OC0_1#
OC5#
R474 8.2K_4 R474 8.2K_4
R304 8.2K_4 R304 8.2K_4
NEW CARD
D D
1394B
WLAN
ROBSON
GLAN
C C
B B
C330 .1U/10V_4 C330 .1U/10V_4
C331 .1U/10V_4 C331 .1U/10V_4
C328 .1U/10V_4 C328 .1U/10V_4
C327 .1U/10V_4 C327 .1U/10V_4
C579 .1U/10V_4 C579 .1U/10V_4
C577 .1U/10V_4 C577 .1U/10V_4
C332 .1U/10V_4 C332 .1U/10V_4
C329 .1U/10V_4 C329 .1U/10V_4
C575 .1U/10V_4 C575 .1U/10V_4
C572 .1U/10V_4 C572 .1U/10V_4
USB_OC0_1# (38)
USB_OC2# (27)
NC_EN# (26)
RP49
RP49
6
7
8
9
10
8.2KX8
8.2KX8
5
4
3
2
1
+3.3V_S5
+3.3V_S5
+3.3V_S5
OC6#
USB_OC2#
OC3#
OC4#
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN3_C
PCIE_TXP3_C
PCIE_TXN4_C
PCIE_TXP4_C
PCIE_TXN5_C
PCIE_TXP5_C
GLAN_TXN_SB
GLAN_TXP_SB
USB_OC0_1#
USB_OC2#
OC3#
OC4#
OC5#
OC6#
NC_EN#
OC8#
OC9#
V27
DMI0RXN
V26
DMI0RXP
U29
DMI0TXN
U28
DMI0TXP
Y27
DMI1RXN
Y26
DMI1RXP
W29
DMI1TXN
W28
DMI1TXP
AB26
DMI2RXN
AB25
DMI2RXP
AA29
DMI2TXN
AA28
DMI2TXP
AD27
DMI3RXN
AD26
DMI3RXP
AC29
DMI3TXN
AC28
DMI3TXP
T26
DMI_CLKN
T25
DMI_CLKP
Y23
DMI_ZCOMP
Y24
Direct Media Interface
Direct Media Interface
G3
USBP0N
G2
USBP0P
H5
USBP1N
H4
USBP1P
H2
USBP2N
H1
USBP2P
J3
USBP3N
J2
USBP3P
K5
USBP4N
K4
USBP4P
K2
USBP5N
K1
USBP5P
L3
USBP6N
L2
USBP6P
M5
USBP7N
M4
USBP7P
M2
USBP8N
M1
USBP8P
USBP9N
USBP9P
USBRBIAS#
USBRBIAS
USBP9-
N3
USBP9+
N2
F2
F3
<CRB>
1.USB_RBIAS_PN<500mils
2.Avoid routing next to
clock/high speed signals
DMI_RXN0 (6)
DMI_RXP0 (6)
DMI_TXN0 (6)
DMI_TXP0 (6)
DMI_RXN1 (6)
DMI_RXP1 (6)
DMI_TXN1 (6)
DMI_TXP1 (6)
DMI_RXN2 (6)
DMI_RXP2 (6)
DMI_TXN2 (6)
DMI_TXP2 (6)
DMI_RXN3 (6)
DMI_RXP3 (6)
DMI_TXN3 (6)
DMI_TXP3 (6)
CLK_PCIE_ICH# (16)
CLK_PCIE_ICH (16)
DMI_IRCOMP_R
USBP0- (38)
USBP0+ (38)
USBP1- (38)
USBP1+ (38)
USBP2- (38)
USBP2+ (38)
USBP3- (34)
USBP3+ (34)
USBP4- (33)
USBP4+ (33)
USBP5- (26)
USBP5+ (26)
USBP6- (25)
USBP6+ (25)
USBP7- (18)
USBP7+ (18)
USBP8- (25)
USBP8+ (25)
T76T76
T74T74
USB_RBIAS_PN
PLT_RST-R#
R446
R446
22.6/F
22.6/F
TC7SH08FU
TC7SH08FU
+1.5V_RUN
USB
USB
USB
ELC
BLUETOOTH
NEW CARD
MINI PCIE
CCD
Wireless USB
+3.3V_RUN
U29
U29
2
1
3 5
R502
R502
24.9/F_4
24.9/F_4
Card Reader
4
AD[0..31] (29,46)
<CRB>
DMI_IRCOMP_R<500mils
INTB# (29)
MINI PCI
C480
C480
.1U/10V_4
.1U/10V_4
R321
R321
100K
100K
INTC# (46)
INTD# (46)
PLTRST# (17,20,24,25,26,31)
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
INTA#
INTB#
INTC#
INTD#
U25B
U25B
D20
AD0
E19
AD1
D19
AD2
A20
AD3
D17
AD4
A21
AD5
A19
AD6
C19
AD7
A18
AD8
B16
AD9
A12
AD10
E16
AD11
A14
AD12
G16
AD13
A15
AD14
B6
AD15
C11
AD16
A9
AD17
D11
AD18
B12
AD19
C12
AD20
D10
AD21
C7
AD22
F13
AD23
E11
AD24
E13
AD25
E12
AD26
D8
AD27
A6
AD28
E8
AD29
D6
AD30
A3
AD31
Interrupt I/F
Interrupt I/F
F9
PIRQA#
B5
PIRQB#
C5
PIRQC#
A10
PIRQD#
ICH8M REV 1.0
ICH8M REV 1.0
PCI
PCI
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
PAR
D7
E18
C18
B19
F18
A11
C10
C17
E15
F16
E17
C8
D9
G6
D16
A7
B7
F10
C16
C9
A17
AG24
B10
G7
F8
G11
F12
B3
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
IRDY#
DEVSEL#
PERR#
LOCK#
SERR#
STOP#
TRDY#
FRAME#
PLT_RST-R#
PCLK_ICH
BAYID0
BAYID1
INTG#
INTH#
REQ0#
A4
A16 SWAP Override strap
PCI_GNT#3 Low = A16 swap override enabled
GNT3#
High = Default
R463 *1K_NC R463 *1K_NC
PCI Pull-Up
DEVSEL#
BAYID1
INTG#
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
SERR#
TRDY#
LOCK#
IRDY#
PERR#
REQ0#
INTH#
R323 0 R323 0
RP48
RP48
6
7
8
9
10
8.2KX8
8.2KX8
RP47
RP47
6
7
8
9
10
8.2KX8
8.2KX8
RP46
RP46
6
7
8
9
10
8.2KX8
8.2KX8
REQ0# (29)
GNT0# (29)
REQ1# (46)
GNT1# (46)
T90T90
T84T84
CBE0# (29,46)
CBE1# (29,46)
CBE2# (29,46)
CBE3# (29,46)
IRDY# (29,46)
PAR (29,46)
PCIRST# (25,29,46)
DEVSEL# (29,46)
PERR# (29,46)
SERR# (29,46)
STOP# (29,46)
TRDY# (29,46)
FRAME# (29,46)
PCLK_ICH (16)
PCI_PME# (29)
BAYID0 (13,28)
BAYID1 (28)
5
4
3
2
1
5
4
3
2
1
5
4
3
2
1
Card Reader
MINI PCI
FRAME#
+3.3V_RUN
PLTRST#_NB (6)
+3.3V_RUN
STOP#
REQ1#
REQ2#
+3.3V_RUN
BAYID0
INTD#
REQ3#
INTA#
INTC#
INTB#
PCLK_ICH
R286
R286
*10_NC
*10_NC
C299
C299
*10P/50V_NC
*10P/50V_NC
1 2
1 2
A A
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
http://laptop-motherboard-schematic.blogspot.com/
4
3
2
Date: Sheet
COMPUTER
ICH8M PCIE/PCI/USB(2/4)
ICH8M PCIE/PCI/USB(2/4)
ICH8M PCIE/PCI/USB(2/4)
MX3 2B
MX3 2B
MX3 2B
1
of
of
of
12 53 Friday, October 12, 2007
12 53 Friday, October 12, 2007
12 53 Friday, October 12, 2007
5
SB-GPIO
<FAE>
CRB STP_PCI# PU is no stuff. CRB STP_CPU#
always keeps high to ensure ME alive in M1
D D
state. (CLK_MCH_BCLK/# must keep alive to
make ME work) I think there will be update for
this design, I suggest you to keep PU and 0ȍ
isolation resistors for this signal.
VR_PWRGD_CK410# (41)
C C
+3.3V_RUN
MCH_ICH_SYNC# (6)
add for RST_BAY#
RST_BAY# (28)
B B
+3.3V_RUN
A A
DELAY_VR_PWRGOOD (2,6,41)
As Intel's review(Apr.,17,2007), add 0
ohm between SMBus & SMLINK to let
SMBus of ICH8M work in slave mode.
SMB_CLK_ME
SMB_DATA_ME
PM_STPPCI# (16)
PM_STPCPU# (16)
C333 .1U/10V_4 C333 .1U/10V_4
R310
R310
100K
100K
R465
R465
*1K_NC
*1K_NC
ICH_TP3
R311
R311
*1K_NC
*1K_NC
PWROK_EC (31)
1
2
R294 *10K_4_NC R294 *10K_4_NC
R296 0_4 R296 0_4
+3.3V_RUN
U26
U26
TC7SH08FU
TC7SH08FU
4
R313 *0_NC R313 *0_NC
ACZ_SDOUT (11)
5
R477 0 R477 0
R482 0 R482 0
*10K_NC
*10K_NC
+3.3V_RUN
U31
U31
5
4 3
NC7SZ04
NC7SZ04
KBSMI# (31)
LID_HALL_EN# (31,32)
BAYINS# (28,31)
.1U/16V C310 .1U/16V C310
5 3
1
2
DELAY_VR_PWRGOOD
PWROK_EC
R322 100K_4 R322 100K_4
PCLK_SMB
PDAT_SMB
+3.3V_RUN
R484
R484
RST_BAY#_R
R491
R491
*10K_NC
*10K_NC
CH501H-40PT
CH501H-40PT
D23 CH501H-40PT D23 CH501H-40PT
<check list>
internal PD
R490 0 R490 0
R483 0 R483 0
THERM_ALERT_SB# (31)
D19
D19
CH501H-40PT
CH501H-40PT
D18
D18
2 1
RST_BAY#_R
PCLK_SMB (16,25,26)
PDAT_SMB (16,25,26)
PM_BMBUSY# (6)
PCIE_WAKE# (20,24,25,26,31)
SATACLKREQ# (16)
XOR Chain Entrance Strap
ICH_RSV0
HDA_SDOUT
0
0
1
1
+3.3V_RUN
1
2
0
1
0
1
5 3
U28
U28
4
TC7SH08FU
TC7SH08FU
ICH_PWROK
Description
RSVD
Enter XOR Chain
Normal opration(Default)
Set PCIE port config bit 1
SYS_RST# (2)
SERIRQ (29,31,46)
2 1
PCSPK (22)
.1U/16V_4 C476 .1U/16V_4 C476
4
U25C
PCLK_SMB
PDAT_SMB
CL_RST#1
SMB_CLK_ME
T97T97
SMB_DATA_ME
RI#
LPC_PD#
T75T75
SYS_RST#
SMB_ALERT#
PM_STPPCI_ICH#
PM_STPCPU_ICH#
CLKRUN#
PCIE_WAKE#
SERIRQ
VR_PWRGD_CLKEN
T55T55
KBSMI#_ICH
2 1
LID591#_ICH
ICH_GPIO7
T45T45
T59T59
T78T78
T85T85
SCI#
BAYINS#_R
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
ICH_GPIO27
SATACLKREQ#
ICH_GPIO38
ICH_GPIO48
PCSPK
MCH_ICH_SYNC#_R
ICH_TP3
SCI# (31)
U25C
AJ26
SMBCLK
AD19
SMBDATA
AG21
LINKALERT#
AC17
SMLINK0
AE19
SMLINK1
AF17
RI#
F4
SUS_STAT#/LPCPD#
AD15
SYS_RESET#
AG12
BMBUSY#/GPIO0
AG22
SMBALERT#/GPIO11
AE20
STP_PCI#/GPIO15
AG18
STP_CPU#/GPIO25
AH11
CLKRUN#/GPIO32
AE17
WAKE#
AF12
SERIRQ
AC13
THRM#
AJ20
VRMPWRGD
AJ22
TP7
AJ8
TACH1/GPIO1
AJ9
TACH2/GPIO6
AH9
TACH3/GPIO7
AE16
GPIO8
AC19
GPIO12
AG8
TACH0/GPIO17
AH12
GPIO18
AE11
GPIO20
AG10
SCLOCK/GPIO22
AH25
QRT_STATE0/GPIO27
AD16
QRT_STATE1/GPIO28
AG13
SATACLKREQ#/GPIO35
AF9
SLOAD/GPIO38
AJ11
SDATAOUT0/GPIO39
AD10
SDATAOUT1/GPIO48
AD9
SPKR
AJ13
MCH_SYNC#
AJ21
TP3
ICH8M REV 1.0
ICH8M REV 1.0
PCLK_SMB
PDAT_SMB
SMB_CLK_ME
SMB_DATA_ME
RI#
PCIE_WAKE#
PM_BATLOW#_R
BAYINS#_R
SCI#
CL_RST#1
SMB_ALERT#
SYS_RST#
ICH_GPIO10
RST_BAY#_R
ICH_GPIO14
ICH_GPIO9
VR_PWRGD_CLKEN
ICH_PWROK
R333 2.2K_4 R333 2.2K_4
R500 2.2K_4 R500 2.2K_4
R481 10K_4 R481 10K_4
R489 10K_4 R489 10K_4
R480 10K_4 R480 10K_4
R479 1K_4 R479 1K_4
R492 8.2K_4 R492 8.2K_4
R496 10K R496 10K
R473 10K_4 R473 10K_4
R577 *10K_NC R577 *10K_NC
R493 10K_4 R493 10K_4
R470 10K_4 R470 10K_4
R318 10K_4 R318 10K_4
R312 10K_4 R312 10K_4
R504 10K_4 R504 10K_4
R307 100K_4 R307 100K_4
R494 100K_4 R494 100K_4
R317 10K_4 R317 10K_4
EVT
DVT-1
DVT-2
PVT
SMB
SMB
SYS
GPIO
SYS
GPIO
GPIO
GPIO
MISC
MISC
0
0
0
000
Ramp1
http://laptop-motherboard-schematic.blogspot.com/
4
3
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA
GPIO
SATA
GPIO
SATA3GP/GPIO37
CLK14
Clocks
Clocks
Power MGT Controller Link
Power MGT Controller Link
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14
+3.3V_S5
+3.3V_S5
CLK48
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
S4_STATE#/GPIO26
PWROK
DPRSLPVR/GPIO16
BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
CK_PWRGD
CLPWROK
SLP_M#
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1
CL_RST#
MEM_LED/GPIO24
WOL_EN/GPIO9
ID0 ID1 Board ID ID2 ID3
00
0
0
0
0
0
1
111
00
1
3
AJ12
AJ10
AF11
AG11
AG9
G5
D3
AG23
AF21
AD18
AH27
AE23
AJ14
AE21
C2
AH20
AG27
E1
E3
AJ25
F23
AE18
F22
AF19
D24
AH23
AJ23
AJ27
AJ24
AF22
AG19
R293 8.2K_4 R293 8.2K_4
R281 8.2K_4 R281 8.2K_4
R468 8.2K_4 R468 8.2K_4
R467 8.2K_4 R467 8.2K_4
14M_ICH
CLKUSB_48
SLP_S3#
SLP_S4#
SLP_S5#
ICH_GPIO26
ICH_PWROK
PM_DPRSLPVR_R
PM_BATLOW#_R
PM_LAN_ENABLE_R
PM_RSMRST#_R TP7
T58T58
T92T92
T95T95
CL_VREF0_SB
CL_VREF1_SB ICH_GPIO39
ICH_GPIO10
ICH_GPIO14
ICH_GPIO9
R273 0_4 R273 0_4
+3.3V_RUN
14M_ICH (16)
CLKUSB_48 (16)
R315 100/F_4 R315 100/F_4
R309 100/F_4 R309 100/F_4
T94T94
T60T60
R301 100/F_4 R301 100/F_4
DNBSWON# (31)
R306 10K_4 R306 10K_4
CK_PWRGD (16)
MPWROK (6,31)
CL_CLK0 (6)
CL_DATA0 (6)
CL_RST#0 (6)
T56T56
T99T99
BAYON# (28)
R334 10K_4 R334 10K_4
No Reboot strap
HDA_SPKR
SERIRQ
CLKRUN#
Low = Default
High = No Reboot
PCSPK
KBSMI#_ICH
LID591#_ICH
ICH_GPIO39
INTEL CRB SHOW IT
R464 *10K_4_NC R464 *10K_4_NC
R256 10K_4 R256 10K_4
R259 10K_4 R259 10K_4
R288 10K_4 R288 10K_4
R469 10K_4 R469 10K_4
R283 8.2K_4 R283 8.2K_4
Den_1011: change BID from 0011 to 0100 for Ramp1
+3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN
R462
R282
R282
*10K_4_NC
*10K_4_NC
R287
R287
10K_4
10K_4
R462
10K_4
10K_4
BOARD_ID2 BOARD_ID3 BOARD_ID0 BOARD_ID1
R466
R466
*10K_4_NC
*10K_4_NC
R290
R290
*10K_4_NC
*10K_4_NC
R291
R291
10K_4
10K_4
2
SUSB# (6,31,34)
SUSC# (31)
+3.3V_S5
+3.3V_RUN
2
BAYID0 (12,28)
<FAE>
Since your CPU VRM has no
DPRSTP# pin, connect
PM_DPRSLPVR to IMVP6 is correct
PM_DPRSLPVR (6,41) CLKRUN# (29,31,46)
Controller Link 1 VREF
for IAMT support only
+3.3V_RUN
R275
R275
*10K_4_NC
*10K_4_NC
R280
R280
10K_4
10K_4
INTEL FAE (08/17)
"Add RSMRST# isolation (important!!! See ww22 Santa Rosa MoW)"
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
R503
R503
*453/F_4_NC
*453/F_4_NC
PM_RSMRST#_R
1
Close to SB
CLKUSB_48 14M_ICH
R461
R461
*33_4_NC
*33_4_NC
C473
C473
*10P_4_NC
*10P_4_NC
If no use internal LAN MAC connect LAN_RST# to PLTRST#
Use internal LAN MAC connect LAN_RST# to RSMRST#
should go high no sooner than 10 ms after both VccLAN3_3 and
VccLAN1_5 have reached their nominal voltages.
+3.3V_RUN +3.3V_S5
R505
R505
*3.24K/F_NC
*3.24K/F_NC
C534
C534
*.1U/10V_4_NC
*.1U/10V_4_NC
+3.3V_S5
R351 *0_4_NC R351 *0_4_NC
Q71
Q71
MMBT3906
MMBT3906
3 1
2
R344
R344
10K_4
10K_4
2
D25
D25
3
BAV99
BAV99
1
2
D24
D24
3
BAV99
BAV99
R339
R339
1
2.2K_4
2.2K_4
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
ICH8M GPIO(3/4)
ICH8M GPIO(3/4)
ICH8M GPIO(3/4)
MX3 3A
MX3 3A
MX3 3A
1
R506
R506
3.24K/F
3.24K/F
R501
R501
453/F_4
453/F_4
R345
R345
4.7K_4
4.7K_4
*10_4_NC
*10_4_NC
*10P_4_NC
*10P_4_NC
RSMRST# (31)
FROM uR(EC) TO ICH8
13 53 Monday, October 15, 2007
13 53 Monday, October 15, 2007
13 53 Monday, October 15, 2007
R451
R451
C457
C457
C532
C532
.1U/10V_4
.1U/10V_4
of
of
of
5
+3.3V_RUN
2 1
D21
D17
D17
+3.3V_S5
+5V_S5
D D
+1.5V_RUN
2 1
SDMK0340L-7-F
SDMK0340L-7-F
R445 10 R445 10
L42
L42
FBMJ2125HS420-T_8
FBMJ2125HS420-T_8
Intel use 0.5UH inductor
+5V_RUN
C459
C459
.1U/10V_4
.1U/10V_4
use Cap 1U, as intel
"V5REF Platform
Design Guide Update
05_25.pdf"
+
+
C343
C343
220U/4V
220U/4V
D21
SDMK0340L-7-F
SDMK0340L-7-F
R303 100 R303 100
C339
C339
10U/10V_8
10U/10V_8
C303
C303
1U/10V_4
1U/10V_4
C340
C340
10U/10V_8
10U/10V_8
(1mA)
(657mA)
C582
C582
2.2U/6.3V
2.2U/6.3V
(1mA)
C578
C578
1U/6.3V_4
1U/6.3V_4
H=1.9mm
+1.5V_RUN
L36
L36
10UH_8
10UH_8
CV01001MN08
CV01001MN08
C C
(1.56A)
B B
+3.3V_RUN
A A
R485 0 R485 0
C500
C500
.1U/10V_4
.1U/10V_4
+1.5V_RUN
5
+1.5V_RUN
R328 0 R328 0
(47mA)
C259
C259
1U/16V
1U/16V
C478
C478
1U/16V
1U/16V
C491
C491
.1U/10V_4
.1U/10V_4
C482
C482
.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
+1.5V_GLAN
C316
C316
4.7U/10V
4.7U/10V
C312
C312
+1.5V_APLL
C271
C271
10U/6.3V_0603
10U/6.3V_0603
(50mA)
(23mA)
(80mA)
+3.3V_RUN
4
(6uA)
C581
C581
C580
C580
.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
+5VREF_SB
+5VREF_SUS_SB
+1.5V_B
C270
C270
1U/16V
1U/16V
+1.5V_RUN
+3V_VCCLAN
http://laptop-motherboard-schematic.blogspot.com/
4
AD25
AA25
AA26
AA27
AB27
AB28
AB29
W25
AC10
W23
D28
D29
E25
E26
E27
F24
F25
G24
H23
H24
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T23
T24
T27
T28
T29
U24
U25
V23
V24
V25
Y25
AJ6
AE7
AF7
AG7
AH7
AJ7
AC1
AC2
AC3
AC4
AC5
AC9
AA5
AA6
G12
G17
AC7
AD7
F17
G18
F19
G20
A24
A26
A27
B26
B27
B28
B25
A16
T7
G4
J23
J24
H7
D1
F1
L6
L7
M6
M7
+VCCRTC
U25F
U25F
VCCRTC
V5REF[1]
V5REF[2]
V5REF_SUS
VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCCSATAPLL
VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
VCC1_5_A[09]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]
VCC1_5_A[18]
VCC1_5_A[19]
VCCUSBPLL
VCC1_5_A[20]
VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]
VCCLAN1_05[1]
VCCLAN1_05[2]
VCCLAN3_3[1]
VCCLAN3_3[2]
VCCGLANPLL
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN1_5[5]
VCCGLAN3_3
ICH8M REV 1.0
ICH8M REV 1.0
CORE
CORE
VCCA3GP ATX ARX
VCCA3GP ATX ARX
VCCP_CORE VCCPSUS VCCPUSB
VCCP_CORE VCCPSUS VCCPUSB
IDE
IDE
PCI
PCI
VCCSUS1_05[1]
VCCSUS1_05[2]
VCCSUS1_5[1]
VCCSUS1_5[2]
VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]
USB CORE
USB CORE
VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
GLAN POWER
GLAN POWER
VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]
VCCDMIPLL
VCC_DMI[1]
VCC_DMI[2]
V_CPU_IO[1]
V_CPU_IO[2]
VCC3_3[01]
VCC3_3[02]
VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]
VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]
VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]
VCCHDA
VCCSUSHDA
VCCCL1_05
VCCCL1_5
VCCCL3_3[1]
VCCCL3_3[2]
A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
R29
AE28
AE29
AC23
AC24
AF29
AD2
AC8
AD8
AE8
AF8
AA3
U7
V7
W1
W6
W7
Y7
A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11
AC12
AD11
J6
AF20
AC16
J7
C3
AC18
AC21
AC22
AG20
AH28
P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6
TP_VCCCL1_05_ICH
G22
VCCCL1_5_INT_ICH
A22
F20
G21
+1.05V_VCCP
3
(1.13A)
C501 .1U/10V_4 C501 .1U/10V_4
C486 .1U/10V_4 C486 .1U/10V_4
VCCDMIPLL_ICH
(23mA)
+1.25V_DMI
(50mA)
+1.05V_V_CPU_IO
C490
C490
.1U/10V_4
.1U/10V_4
C479
C479
.1U/10V_4
.1U/10V_4
TP_VCCSUS1_05_ICH_1
TP_VCCSUS1_05_ICH_2
TP_VCCSUS1_5_ICH_1
TP_VCCSUS1_5_ICH_2
+V3.3A_USB_ICH
(64mA)
3
C338
C338
10U/10V_8
10U/10V_8
C475
C475
.1U/10V_4
.1U/10V_4
(11mA)
C493
C493
.1U/10V_4
.1U/10V_4
C224
C224
4.7U/10V
4.7U/10V
C306
C306
1U/16V
1U/16V
+3.3V_RUN
+1.05V_VCCP
C325
C325
.01U/16V_4
.01U/16V_4
R349 0_8 R349 0_8
C483
C483
.1U/10V_4
.1U/10V_4
(32mA)
C484
C484
.1U/16V
.1U/16V
C468
C468
.022U/16V_4
.022U/16V_4
R243 0_8 R243 0_8
C308
C308
*.1U_4_NC
*.1U_4_NC
2
+1.05V_VCCP +1.5V_RUN
(1mA)
C523
C523
.1U/10V_4
.1U/10V_4
C481
C481
.1U/10V_4
.1U/10V_4
+3.3V_S5
L40
L40
1uH_800MA
1uH_800MA
C326
C326
10U/6.3V_0603
10U/6.3V_0603
+1.25V_RUN
C522
C522
.1U/10V_4
.1U/10V_4
C461
C461
.1U/10V_4
.1U/10V_4
C487
C487
.1U/10V_4
.1U/10V_4
+3.3V_S5
D40
D40
1
2
BAT54C
BAT54C
1 2
H=2
R499 0 R499 0
C520
C520
4.7U/10V
4.7U/10V
+3.3V_RUN
3
+1.5V_ICH
(177mA)
TP_VCCSUS1_05_ICH_1
TP_VCCSUS1_05_ICH_2
TP_VCCSUS1_5_ICH_1
TP_VCCSUS1_5_ICH_2
TP_VCCCL1_05_ICH
T87T87
T96T96
T91T91
T83T83
T98T98
2
R571
R571
1 2
10_0805
10_0805
R354 1_8 R354 1_8
+1.05V_VCCP
+1.5V_RUN
+3.3V_RUN
(442mA)
Title
Title
Title
ICH8M Power(4/4)
ICH8M Power(4/4)
ICH8M Power(4/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MX3 2C
MX3 2C
MX3 2C
Date: Sheet
Date: Sheet
Date: Sheet
1
U25E
U25E
A23
VSS[001]
A5
VSS[002]
AA2
VSS[003]
AA7
VSS[004]
A25
VSS[005]
AB1
VSS[006]
AB24
VSS[007]
AC11
VSS[008]
AC14
VSS[009]
AC25
VSS[010]
AC26
VSS[011]
AC27
VSS[012]
AD17
VSS[013]
AD20
VSS[014]
AD28
VSS[015]
AD29
VSS[016]
AD3
VSS[017]
AD4
VSS[018]
AD6
VSS[019]
AE1
VSS[020]
AE12
VSS[021]
AE2
VSS[022]
AE22
VSS[023]
AD1
VSS[024]
AE25
VSS[025]
AE5
VSS[026]
AE6
VSS[027]
AE9
VSS[028]
AF14
VSS[029]
AF16
VSS[030]
AF18
VSS[031]
AF3
VSS[032]
AF4
VSS[033]
AG5
VSS[034]
AG6
VSS[035]
AH10
VSS[036]
AH13
VSS[037]
AH16
VSS[038]
AH19
VSS[039]
AH2
VSS[040]
AF28
VSS[041]
AH22
VSS[042]
AH24
VSS[043]
AH26
VSS[044]
AH3
VSS[045]
AH4
VSS[046]
AH8
VSS[047]
AJ5
VSS[048]
B11
VSS[049]
B14
VSS[050]
B17
VSS[051]
B2
VSS[052]
B20
VSS[053]
B22
VSS[054]
B8
VSS[055]
C24
VSS[056]
C26
VSS[057]
C27
VSS[058]
C6
VSS[059]
D12
VSS[060]
D15
VSS[061]
D18
VSS[062]
D2
VSS[063]
D4
VSS[064]
E21
VSS[065]
E24
VSS[066]
E4
VSS[067]
E9
VSS[068]
F15
VSS[069]
E23
VSS[070]
F28
VSS[071]
F29
VSS[072]
F7
VSS[073]
G1
VSS[074]
E2
VSS[075]
G10
VSS[076]
G13
VSS[077]
G19
VSS[078]
G23
VSS[079]
G25
VSS[080]
G26
VSS[081]
G27
VSS[082]
H25
VSS[083]
H28
VSS[084]
H29
VSS[085]
H3
VSS[086]
H6
VSS[087]
J1
VSS[088]
J25
VSS[089]
J26
VSS[090]
J27
VSS[091]
J4
VSS[092]
J5
VSS[093]
K23
VSS[094]
K28
VSS[095]
K29
VSS[096]
K3
VSS[097]
K6
VSS[098]
ICH8M REV 1.0
ICH8M REV 1.0
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
1
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
of
of
of
14 53 Friday, October 12, 2007
14 53 Friday, October 12, 2007
14 53 Friday, October 12, 2007
5
4
3
2
1
+1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS
CN24
CN24
1
VREF
3
M_A_DQ0
M_A_DQ5
M_A_DQS#0
M_A_DQS0
M_A_DQ1
D D
C C
B B
M_A_DQ7
M_A_DQ12
M_A_DQ13
M_A_DQS#1
M_A_DQS1
M_A_DQ11
M_A_DQ14
M_A_DQ16
M_A_DQS#2
M_A_DQS2
M_A_DQ18
M_A_DQ22
M_A_DQ28
M_A_DQ29
M_A_DM3
M_A_DQ27
M_A_DQ30 M_A_DQ31
M_CKE0
M_A_BS2
M_A_A12
M_A_A9
M_A_A8
M_A_A5
M_A_A3
M_A_A1
M_A_A10
M_A_BS0
M_A_WE#
M_A_CAS#
M_CS#1
M_ODT1
M_A_DQ33
M_A_DQ37
M_A_DQS#4
M_A_DQS4
M_A_DQ35
M_A_DQ38
M_A_DQ45
M_A_DQ44
M_A_DM5
M_A_DQ46
M_A_DQ42
M_A_DQ53
M_A_DQ49 M_A_DQ52
M_A_DQS#6
M_A_DQS6
M_A_DQ50
M_A_DQ56
M_A_DQ60
M_A_DM7
M_A_DQ62
M_A_DQ59
CLK_SDATA
CLK_SCLK
SMBus Address [A0] SMBus Address [A4]
A A
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
DDR2_SODIMM_H6.5_RVS
DDR2_SODIMM_H6.5_RVS
SO-DIMM0
2
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
A11
A7
A6
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
M_A_DQ4
4
M_A_DQ6
6
8
M_A_DM0
10
12
M_A_DQ2
14
M_A_DQ3
16
18
M_A_DQ8
20
M_A_DQ9
22
24
M_A_DM1
26
28
M_CLK0
30
M_CLK#0
32
34
M_A_DQ10
36
M_A_DQ15
38
40
42
M_A_DQ17
44
M_A_DQ20 M_A_DQ21
46
48
PM_EXTTS#0
50
M_A_DM2
52
54
M_A_DQ23
56
M_A_DQ19
58
60
M_A_DQ25
62
M_A_DQ24
64
66
M_A_DQS#3
68
M_A_DQS3
70
72
M_A_DQ26
74
76
78
M_CKE1
80
82
84
M_A_A14
86
88
M_A_A11
90
M_A_A7
92
M_A_A6
94
96
M_A_A4
98
M_A_A2
100
M_A_A0
102
104
M_A_BS1
106
M_A_RAS#
108
110
112
M_ODT0
114
M_A_A13
116
118
120
122
M_A_DQ36
124
M_A_DQ32
126
128
M_A_DM4
130
132
M_A_DQ34
134
M_A_DQ39
136
138
M_A_DQ40
140
M_A_DQ41
142
144
M_A_DQS#5
146
M_A_DQS5
148
150
M_A_DQ47
152
M_A_DQ43
154
156
M_A_DQ48
158
160
162
M_CLK1
164
M_CLK#1
166
168
M_A_DM6
170
172
M_A_DQ51 M_A_DQ54
174
M_A_DQ55
176
178
M_A_DQ61
180
M_A_DQ57
182
184
M_A_DQS#7
186
M_A_DQS7
188
190
M_A_DQ58
192
M_A_DQ63
194
196
A_SA0
198
A_SA1
200
RP22 56X2_4 RP22 56X2_4
M_A_A10
M_A_WE#
RP29 56X2_4 RP29 56X2_4
M_A_A2
M_A_A4
RP25 56X2_4 RP25 56X2_4
M_A_A1
M_A_A3
RP32 56X2_4 RP32 56X2_4
M_A_A6
M_A_A7
RP33 56X2_4 RP33 56X2_4
M_A_A9
M_A_A8
RP37 56X2_4 RP37 56X2_4
M_CKE0
M_A_A5
RP16 56X2_4 RP16 56X2_4
M_ODT0
M_A_A13
RP26 56X2_4 RP26 56X2_4
M_A_A0
M_A_BS1
RP38 56X2_4 RP38 56X2_4
M_A_BS2
M_A_A12
RP19 56X2_4 RP19 56X2_4
M_A_BS0
M_CS#1
RP23 56X2_4 RP23 56X2_4
M_CS#0 M_B_A13
M_A_RAS#
RP36 56X2_4 RP36 56X2_4
M_A_A11
M_CKE1
RP15 56X2_4 RP15 56X2_4
M_A_CAS#
M_ODT1
M_A_A14
R271 56_4 R271 56_4
C228 330U/2.5V_7
C228 330U/2.5V_7
H=1.8
A_SA0
R158 10K_4 R158 10K_4
A_SA1
R142 10K_4 R142 10K_4
132
132
132
132
132
132
132
132
132
132
132
132
132
+
+
+SMDDR_VTERM
4
4
4
4
4
4
4
4
4
4
4
4
4
+SMDDR_VTERM
.1U/16V_4 C206 .1U/16V_4 C206
.1U/16V_4 C230 .1U/16V_4 C230
.1U/16V_4 C243 .1U/16V_4 C243
.1U/16V_4 C288 .1U/16V_4 C288
.1U/16V_4 C234 .1U/16V_4 C234
.1U/16V_4 C295 .1U/16V_4 C295
.1U/16V_4 C217 .1U/16V_4 C217
.1U/16V_4 C291 .1U/16V_4 C291
.1U/16V_4 C294 .1U/16V_4 C294
.1U/16V_4 C289 .1U/16V_4 C289
.1U/16V_4 C282 .1U/16V_4 C282
.1U/16V_4 C214 .1U/16V_4 C214
.1U/16V_4 C205 .1U/16V_4 C205
.1U/16V_4 C262 .1U/16V_4 C262
+SMDDR_VREF
.1U/16V_4 C335 .1U/16V_4 C335
1U/10V_4 C334 1U/10V_4 C334
1U/10V_4 C226 1U/10V_4 C226
1U/10V_4 C269 1U/10V_4 C269
1U/10V_4 C256 1U/10V_4 C256
1U/10V_4 C267 1U/10V_4 C267
1U/10V_4 C240 1U/10V_4 C240
.1U/16V_4 C242 .1U/16V_4 C242
.1U/16V_4 C290 .1U/16V_4 C290
.1U/16V_4 C277 .1U/16V_4 C277
.1U/16V_4 C420 .1U/16V_4 C420
1U/10V_4 C419 1U/10V_4 C419
+1.8V_SUS
+3.3V_RUN
+SMDDR_VREF +SMDDR_VREF
M_B_DQ0
M_B_DQ1
M_B_DQS#0
M_B_DQS0
M_B_DQ6
M_B_DQ7
M_B_DQ12
M_B_DQ13
M_B_DQS#1
M_B_DQS1
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ21
M_B_DQS#2
M_B_DQS2
M_B_DQ25
M_B_DQ24 M_B_DQ28
M_B_DM3
M_B_DQ31
M_B_DQ26
M_CKE2
M_B_BS2
M_B_A12
M_B_A9
M_B_A8
M_B_A5
M_B_A3
M_B_A1
M_B_A10
M_B_BS0
M_B_WE# M_CS#0
M_B_CAS#
M_CS#3
M_ODT3
M_B_DQ36
M_B_DQ32
M_B_DQS#4
M_B_DQS4
M_B_DQ33
M_B_DQ34
M_B_DQ40 M_B_DQ44
M_B_DQ45
M_B_DM5
M_B_DQ47
M_B_DQ43
M_B_DQ52
M_B_DQ53
M_B_DQS#6
M_B_DQS6
M_B_DQ50
M_B_DQ55
M_B_DQ57
M_B_DQ56
M_B_DM7
M_B_DQ58
M_B_DQ62
CLK_SDATA
CLK_SCLK
+3.3V_RUN +3.3V_RUN
CN23
CN23
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
DDR2_SODIMM_H11_RVS
DDR2_SODIMM_H11_RVS
PC4800 DDR2 SDRAM
PC4800 DDR2 SDRAM
SO-DIMM1
2
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
A11
A7
A6
SO-DIMM (200P)
SO-DIMM (200P)
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
M_B_DQ5
4
M_B_DQ4
6
8
M_B_DM0
10
12
M_B_DQ3
14
M_B_DQ2
16
18
M_B_DQ8
20
M_B_DQ9
22
24
M_B_DM1
26
28
M_CLK2
30
M_CLK#2
32
34
M_B_DQ11
36
M_B_DQ10
38
40
42
M_B_DQ17
44
M_B_DQ20
46
48
PM_EXTTS#1
50
M_B_DM2
52
54
M_B_DQ23 M_B_DQ22
56
M_B_DQ19 M_B_DQ18
58
60
M_B_DQ29
62
64
66
M_B_DQS#3
68
M_B_DQS3
70
72
M_B_DQ27
74
M_B_DQ30
76
78
M_CKE3
80
82
84
M_B_A14
86
88
M_B_A11
90
M_B_A7
92
M_B_A6
94
96
M_B_A4
98
M_B_A2
100
M_B_A0
102
104
M_B_BS1
106
M_B_RAS#
108
M_CS#2
110
112
M_ODT2
114
M_B_A13
116
118
120
122
M_B_DQ37
124
M_B_DQ38
126
128
M_B_DM4
130
132
M_B_DQ39
134
M_B_DQ35
136
138
M_B_DQ41
140
142
144
M_B_DQS#5
146
M_B_DQS5
148
150
M_B_DQ46
152
M_B_DQ42
154
156
M_B_DQ49
158
M_B_DQ48
160
162
M_CLK3
164
M_CLK#3
166
168
M_B_DM6
170
172
M_B_DQ51
174
M_B_DQ54
176
178
M_B_DQ61
180
M_B_DQ60
182
184
M_B_DQS#7
186
M_B_DQS7
188
190
M_B_DQ59
192
M_B_DQ63
194
196
B_SA0
198
B_SA1
200
M_B_WE#
M_B_BS0
M_B_A8
M_B_A3
M_B_A6
M_B_A7
M_CKE3
M_B_A11
M_B_A12
M_B_A9
M_B_A2
M_B_BS1
M_CS#2
M_ODT2
M_B_CAS#
M_B_A10
M_CKE2
M_B_BS2
M_B_A1
M_B_A5
M_B_RAS#
M_B_A0
M_B_A4
M_ODT3
M_CS#3
M_B_A14
H=1.8
B_SA1
B_SA0
132
132
132
132
132
132
132
132
132
132
132
132
132
+
+
+SMDDR_VTERM
4
4
4
4
4
4
4
4
4
4
4
4
4
+SMDDR_VTERM
.1U/16V_4 C283 .1U/16V_4 C283
.1U/16V_4 C239 .1U/16V_4 C239
.1U/16V_4 C204 .1U/16V_4 C204
.1U/16V_4 C213 .1U/16V_4 C213
.1U/16V_4 C280 .1U/16V_4 C280
.1U/16V_4 C292 .1U/16V_4 C292
.1U/16V_4 C296 .1U/16V_4 C296
.1U/16V_4 C201 .1U/16V_4 C201
.1U/16V_4 C293 .1U/16V_4 C293
.1U/16V_4 C298 .1U/16V_4 C298
.1U/16V_4 C249 .1U/16V_4 C249
.1U/16V_4 C207 .1U/16V_4 C207
.1U/16V_4 C218 .1U/16V_4 C218
.1U/16V_4 C279 .1U/16V_4 C279
+SMDDR_VREF
.1U/16V_4 C336 .1U/16V_4 C336
1U/10V_4 C337 1U/10V_4 C337
1U/10V_4 C274 1U/10V_4 C274
1U/10V_4 C241 1U/10V_4 C241
1U/10V_4 C247 1U/10V_4 C247
1U/10V_4 C232 1U/10V_4 C232
1U/10V_4 C264 1U/10V_4 C264 .1U/16V_4 C225 .1U/16V_4 C225
.1U/16V_4 C257 .1U/16V_4 C257
.1U/16V_4 C284 .1U/16V_4 C284
.1U/16V_4 C275 .1U/16V_4 C275
.1U/16V_4 C285 .1U/16V_4 C285
.1U/16V_4 C138 .1U/16V_4 C138
1U/10V_4 C132 1U/10V_4 C132
RP21 56X2_4 RP21 56X2_4
RP31 56X2_4 RP31 56X2_4
RP34 56X2_4 RP34 56X2_4
RP39 56X2_4 RP39 56X2_4
RP35 56X2_4 RP35 56X2_4
RP27 56X2_4 RP27 56X2_4
RP18 56X2_4 RP18 56X2_4
RP24 56X2_4 RP24 56X2_4
RP40 56X2_4 RP40 56X2_4
RP28 56X2_4 RP28 56X2_4
RP20 56X2_4 RP20 56X2_4
RP30 56X2_4 RP30 56X2_4
RP17 56X2_4 RP17 56X2_4
R264 56_4 R264 56_4
C286 330U/2.5V_7
C286 330U/2.5V_7
R146 10K_4 R146 10K_4
R152 10K_4 R152 10K_4
Close to DIMM1 Close to DIMM0
+1.8V_SUS
+3.3V_RUN
+3.3V_RUN
+SMDDR_VREF
PM_EXTTS#1 (6)
PM_EXTTS#0 (6)
CLK_SDATA (16)
CLK_SCLK (16)
M_CS#[3:0] (6)
M_ODT[3:0] (6)
M_CKE[3:0] (6)
M_CLK#[3:0] (6)
M_CLK[3:0] (6)
M_A_CAS# (7)
M_A_RAS# (7)
M_A_WE# (7)
M_A_BS[2:0] (7)
M_A_DM[7:0] (7)
M_A_DQS#[7:0] (7)
M_A_DQS[7:0] (7)
M_A_A[14:0] (7)
M_A_DQ[63:0] (7)
M_B_CAS# (7)
M_B_RAS# (7)
M_B_WE# (7)
M_B_BS[2:0] (7)
M_B_DM[7:0] (7)
M_B_DQS#[7:0] (7)
M_B_DQS[7:0] (7)
M_B_A[14:0] (7)
M_B_DQ[63:0] (7)
R342 *1K_NC R342 *1K_NC
R343 *1K_NC R343 *1K_NC
PM_EXTTS#1
PM_EXTTS#0
CLK_SDATA
CLK_SCLK
M_CS#[3:0]
M_ODT[3:0]
M_CKE[3:0]
M_CLK#[3:0]
M_CLK[3:0]
M_A_CAS#
M_A_RAS#
M_A_WE#
M_A_BS[2:0]
M_A_DM[7:0]
M_A_DQS#[7:0]
M_A_DQS[7:0]
M_A_A[14:0]
M_A_DQ[63:0]
M_B_CAS#
M_B_RAS#
M_B_WE#
M_B_BS[2:0]
M_B_DM[7:0]
M_B_DQS#[7:0]
M_B_DQS[7:0]
M_B_A[14:0]
M_B_DQ[63:0]
+1.8V_SUS
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Den_1015: change CN23 material P/N from DGMK0000S1 to DGMK0000033
5
http://laptop-motherboard-schematic.blogspot.com/
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
DDRII SO-DIMM
DDRII SO-DIMM
DDRII SO-DIMM
MX3 3A
MX3 3A
MX3 3A
1
of
of
of
15 53 Monday, October 15, 2007
15 53 Monday, October 15, 2007
15 53 Monday, October 15, 2007