Dell Alienware 15 R2, Alienware 17 R3 boardview
VINAFIX.COM
For DELL Confidential
A
1 1
B
C
D
E
Compal Confidential
2 2
AAP11/AAP21
Schematic Document
SKL-H paltform with Nvidia N16E-GS/GT/GX
Rev: 1.0(A00) PVT
3 3
@ : Nopop Component
EMI@ /@EMI@ : EMI pop/unpop part
ESD@ /@ESD@ : ESD pop/unpop part
RF@ /@RF@ : RF pop/unpop part
CONN@ : Connector Component
AOAC@ : Intel AOAC
DS3/NODS3: deepS3
4 4
For DELL Confidential
TBT@: ThunderBolt
PD@: Power Delivery
A
B
2015/07/21
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
DIS@ : Discrete Part
N16EGS@:N16E-GS(2G)
N16EGT@:N16E-GT(3G)
N16EGX@:N16E-GX(4G)
2G@:2G VRAM
3G@:3G VRAM
4G@:4G VRAM
Compal Secret Data
Compal Secret Data
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
DAX
PCB
DAZ18F00100
PCB 18F LA-B752P REV0 M/B 8
R1@
Compal Electronics, Inc.
Title
Title
Title
Cover Sheet
Cover Sheet
Cover Sheet
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-C912P
LA-C912P
LA-C912P
Date: Sheet of
Date: Sheet of
Date: Sheet of
DAX
PCB
DAZ18F00101
PCB 18F LA-B752P REV0 M/B 8
R3@
1 78Wednesday, July 22, 2015
1 78Wednesday, July 22, 2015
1 78Wednesday, July 22, 2015
E
12L
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
A
B
C
D
E
SKL+NV Block Diagram
Page46~55
eDP 1.3
DP 1.2 (DDI1)
DP 1.2 (DDI2)
PCI-E(GEN3)x8
port0~port7
Intel
SKYLAKE-H
BGA CPU
1440 Pins
Page7~13
FFS
KXCNL-1010
Memory Bus Dual Channel
1.2V DDR4 1866/2133MHz
DDR4-SODIMM x2
Page14~15
eDP panel
Page27
Page25
CIO/USB3.1
TPS65982
Page60
HDMI 2.0
ThunderBolt
Alpine Ridge-SP
Page58~59
50W,65,85W dGPU
nVIDIA
4pcs GDDR5 128bit
6pcs GDDR5 192bit
8pcs GDDR5 256bit
PCI-E x4(port1~4)
1 1
USB3.1
TypeC
Page60
USB PD I2C/USB2
HDMI
connector
DMI x 4
PCI-E(GEN3)x4
2 2
Caldera
connector
Page41
Page30
RJ45
connector
Page31
3 in 1
Card slot
3 3
DC in
Battery
4 4
3V/5V
System
1.2V
1.00V
2.5V
CPU
Vcore
A
dGPU
Core
Charger
dGPU
1.35V
port8~port11
USB3.0 port5
USB2.0 port3
LAN(Gigabit)
Killer E2400
Page30
Card reader
RTS5227
Page31
NGFF (M.2)
Page29
SSD 1
NGFF (M.2)
Page29
SSD 2
NGFF (M.2)
WLAN+BT
SPI ROM
Page19
128Mbit
For DELL Confidential
PCI-E port5
PCI-E port7
PCI-E port 9~12
SATA3.0 port 0,1
PCI-E port 15~16
SATA3.0 port 2,3
PCI-E port6
USB2.0 port6
SPI
Intel
SKYLAKE-PCH
BGA
837 Pins
LPC Bus
Page16~22
PS2/SMBus
Int. KBD
ENE KC3810
Page43
B
ENE KB9022
Page43
Touch pad
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
SATA3.0 port1
USB2.0 port4
USB2.0 port6
USB2.0 port7
USB3.0 port1
USB2.0 port1
USB3.0 port3
USB2.0 port2
USB3.0 port4
USB2.0 port9
HD Audio
Audio codec
Creative
Sound Core3D-EX
Page32
TI TPA3131D2
Page32
Speaker
Compal Secret Data
Compal Secret Data
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
HDD connector
AlienFX / ELC , C8051F383
Touch screen
Page36
Page37
Page25
Digital camera(with digital MIC)
USB connector 1 , Right side
USB connector 3 , Left side
USB power share
Page34
USB connector 4 , Lift side
HP/MIC Global headset
combo JACK
HP/MIC Retaskable
combo JACK
TI TPA3111
17" only
Daughter Board
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet of
Date: Sheet
Page35
Page35
Page32
Page32
Sub-woofer
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Block diagram
Block diagram
Block diagram
Document Number Rev
Document Number Rev
Document Number Rev
LA-C912P
LA-C912P
LA-C912P
E
of
2 78Wednesday, July 22, 2015
2 78Wednesday, July 22, 2015
2 78Wednesday, July 22, 2015
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
A
B
C
D
E
Compal Confidential
1 1
M/B
Camera
FFC
LS-9335P
POWER BUTTON/B
Touch Pad
on/off SW
Led x 2
FFC
2 2
3 3
LS-9336P
INDICATOR/B
Led-HDD
Led-Wireless
Led-CapsLock
FFC
eDP Panel
Coaxial/Wire Combo
Daughter/B
Sub-woofer Amplifier
Headphone combo JACK
Lid
KSI/KSO
Backlight
Wire
Wire-Set
LOGO /B
Keyboard
Led x 2
Headphone combo JACK
USB3.0
USB3.0
WireWireWire
Hot Bar Hot Bar Hot Bar
Alien head badge/B Alien Slits-L Light/BAlien Slits-R Light/B
Led x 2Led x 2 Led x 2
4 4
A
For DELL Confidential
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
D
Date: Sheet
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
E
3 78Wednesday, July 22, 2015
3 78Wednesday, July 22, 2015
3 78Wednesday, July 22, 2015
0.1
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VINAFIX.COM
For DELL Confidential
A
Board ID Table for AD channel
Vcc 3.3V +/- 1%
Board ID
100K +/- 1%Ra
0
1
2
3
4
5
6
7 56K +/- 1%
8
9
10
11
12
13
14
15 330K +/- 1%
16
17
18
19 NC
Rb V min
0 0.000V
12K +/- 1%
15K +/- 1%
20K +/- 1%
27K +/- 1%
33K +/- 1%
43K +/- 1%
75K +/- 1% 1.398V
100K +/- 1%
160K +/- 1%
200K +/- 1%
240K +/- 1%
270K +/- 1%
430K +/- 1%
560K +/- 1%
750K +/- 1%
AD_BID
0.347V
0.423V 0.430V
0.541V
0.691V
0.807V
0.978V 0.992V
1.169V
1.634V
1.849V 1.865V
2.015V
2.185V
2.316V
2.395V 2.408V
2.521V
2.667V
2.791V
2.905V 2.912V
V typ
AD_BID
0.000V 0.300V
0.354V
0.550V
0.702V
0.819V
1.185V
1.414V 1.430V
1.650V
2.031V
2.200V
2.329V
2.533V
2.677V 0xCA - 0xD3
2.800V
3.300V
V
AD_BID
0.360V
0.438V
0.559V
0.713V
0.831V
1.006V
1.200V
1.667V
1.881V130K +/- 1%
2.046V
2.215V
2.343V
2.421V
2.544V
2.687V
2.808V
2.919V
3.300V
max
EC AD3
0x00 - 0x0B
0x0C - 0x1C
0x1D - 0x26
0x27 - 0x30
0x31 - 0x3B
0x3C - 0x46
0x47 - 0x54
0x55 - 0x64
0x65 - 0x76
0x77 - 0x87
0x88 - 0x96
0x97 - 0xA3
0xA4 - 0xAD
0xAE - 0xB7
0xB8 - 0xC0
0xC1 - 0xC9
0xD4 - 0xDC
0xDD - 0xE6
0xE7 - 0xFF3.000V
NVIDIA
Graphic
AMD
Graphic
Port1
Port2
Port3
Port4
Port5
Port6
Port0
Port1
Port2
Port3
Port4
Port5
Board ID TABLE
BDW
1 1
ID
NV AMD
0
1
2
3
4 14
5 15
10
11
12
13
PCB Revision
EVT
DVT-1
DVT-1.1
DVT-2
DVT-3
Pilot build
TBT connector change to SMD type.
Port6
Port7 / 8
Lane 1
Lane 2
Lane 3
Lane 4
CLOCK SIGNAL
CLKOUT_PCIE0
Lane 5
Lane 6
CLKOUT_PCIE1
Symbol Note :
For DELL Confidential
CLKOUT_PCIE2
CLKOUT_PCIE3
CLKOUT_PCIE4
CLKOUT_PCIE5
10/100/1000 LAN
M.2 Card WLAN
dGPU (N16)
DGPU (Caldera)
SATA0
SATA1
SATA2
SATA3
USB3.0
Right side1
Right side2
Left side 1
Caldera
Left side 2
USB2.0
Right side1
Left side 1 (PowerShare)
Caldera
ELC
BT
Touch screen
Camera
Right side 2
Left side 2
PCI EXPRESS
10/100/1000 LAN
M.2 Card WLAN
PCIE 4x MUX
SATA
HDD
NGFF SSD
NGFF SSD
: means Digital Ground
: means Analog Ground
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Notes list
Notes list
Notes list
LA-C912P
LA-C912P
LA-C912P
of
4 78Wednesday, July 22, 2015
4 78Wednesday, July 22, 2015
4 78Wednesday, July 22, 2015
For DELL Confidential
0.1
0.1
0.1
VINAFIX.COM
For DELL Confidential
5
4
3
2
1
D D
C C
SMBUS Address [0x9a]
Skylake
AW44
BB43
AY44
BB39
AW42
AW45
79
80
PCH_SMBCLK
PCH_SMBDATA
SML0CLK
SML0DATA
SML1CLK
EC_SMB_CK2
EC_SMB_DA2
KBC
B B
KB9022QD
77
78
EC_SMB_CK1
EC_SMB_DA1
CPU,C
DDR,D
1K
1K
499
499
1K
1K
2.2K
2.2K
2.2K
2.2K
+3VS
+3V_PCH
+3V_PCH
+3VS
+3VALW
N-MOS
N-MOS
EC_SMB_CK2
EC_SMB_DA2SML1CLK
0 ohm
0 ohm
N-MOS
N-MOS
0 ohm
0 ohm
100 ohm
100 ohm
SCL
SDA
10K
10K
1.8K
1.8K
VGA_SMB_CK2
VGA_SMB_DA2
PU701
11
POWER
10
Charger
3 4
PD1
1
+3VS
TBTA_I2C_SCL1
TBTA_I2C_SDA1
+3.3V_GFX_AON
UV1
BF3
GPU
BE3
SMBUS Address [0x12]
6
BAT_ALERT
BATT_PRS
3
5
253
DIMMA
254
253
DIMMB
254
4
6
5
6
U2407
Thermal Sensor
B5
UT4
TBT
A5
SMBUS Address [0x9E]
PBATT1
SMBUS Address [0x16]
SMBUS Address [A0]
SMBUS Address [A4]
FFS
SMBUS Address [1Dh]
JTP
SMBUS Address [TBD]
SMBUS Address [0X9A]
SMBUS Address [0X7]
GPU,DP,HDMI,EDP,V
LAN,L
AUDIO,A
NGFF,N
USB,U
For DELL Confidential
A A
CALDERA,M
HDD,S
ELC,E
FAN,F
TP,T
KBC,K
DC,O
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SMBus block diagram
SMBus block diagram
SMBus block diagram
LA-C912P
LA-C912P
LA-C912P
1
of
5 78Wednesday, July 22, 2015
5 78Wednesday, July 22, 2015
5 78Wednesday, July 22, 2015
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For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
+1V_PCH
JTAG
1 2
RH492
D D
C C
+3V_PCH
1 2
RH493
+VCCSTG
1 2
RH494 51_0402_5%
1 2
RH495 51_0402_5%
1 2
RH496 51_0402_5%@
1 2
RH95 51_0402_5%
1 2
RH498 51_0402_5%@
1 2
RH497 51_0402_5%
PCH_ITP_PMODE<18>
PCH_SPI_SI_R<17>
XDP_PLTRST#
2.2K_0402_5%
PCH_SYS_PWROK_XDP
2.2K_0402_5%
XDP_TMS
XDP_TDI
XDP_TDO
PCH_JTAG_TCK
XDP_TCK
CPU_XDP_TRST#
1 2
RH479 0_0402_5%@
1 2
RH489 1K_0402_5%
XDP_TMS<9,18>
XDP_TDI<9,18>
XDP_TDO<9,18>
PCH_JTAG_TCK <18>
XDP_TCK<9,18>
CPU_XDP_TRST#<9,22>
PCH_SYS_PWROK_XDP
XDP_PLTRST#
AAM00 is XDP@
+VCCIO
B B
12
@
RH483
150_0402_5%
1 2
RH488 1K_0402_5%@
4
Connect CPU & PCH
Connect CPU & PCH
CFG0
CFG0<9>
+3V_PCH_DSW
12
RH2
1K_0402_5%
0.1U_0402_10V
CH174
12
AAM00 is XDP@
1 2
RH6 0_0402_5%@
3
PBTN_OUT#<18,43>
2
+3VS
12
RH5
1K_0402_5%
1 2
RH8 0_0402_5%@
0.1U_0402_10V
CH175
12
AAM00 is XDP@
1
SYS_RESET#<18>
For DELL Confidential
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
XDP CONN
XDP CONN
XDP CONN
1
6 78Wednesday, July 22, 2015
6 78Wednesday, July 22, 2015
6 78Wednesday, July 22, 2015
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
DMI_CRX_PTX_P0<19>
DMI_CRX_PTX_N0<19>
DMI_CRX_PTX_P1<19>
DMI_CRX_PTX_N1<19>
DMI_CRX_PTX_P2<19>
DMI_CRX_PTX_N2<19>
DMI_CRX_PTX_P3<19>
DMI_CRX_PTX_N3<19>
PEG_GTX_HRX_P11
PEG_GTX_HRX_N11
PEG_GTX_HRX_P10
PEG_GTX_HRX_N10
PEG_GTX_HRX_P9
PEG_GTX_HRX_N9
PEG_GTX_HRX_P8
PEG_GTX_HRX_N8
PEG_GTX_HRX_P7
PEG_GTX_HRX_N7
PEG_GTX_HRX_P6
PEG_GTX_HRX_N6
PEG_GTX_HRX_P5
PEG_GTX_HRX_N5
PEG_GTX_HRX_P4
PEG_GTX_HRX_N4
PEG_GTX_HRX_P3
PEG_GTX_HRX_N3
PEG_GTX_HRX_P2
PEG_GTX_HRX_N2
PEG_GTX_HRX_P1
PEG_GTX_HRX_N1
PEG_GTX_HRX_P0
PEG_GTX_HRX_N0
D D
PEG Lane Reversed
+VCCIO
C C
1 2
RC2 24.9_0402_1%
CAD Note:
Trace width=12 mils ,Spacing=15mil
Max length= 400 mils.
4
DMI_CRX_PTX_P0
DMI_CRX_PTX_N0
DMI_CRX_PTX_P1
DMI_CRX_PTX_N1
DMI_CRX_PTX_P2
DMI_CRX_PTX_N2
DMI_CRX_PTX_P3
DMI_CRX_PTX_N3
?
SKYLAKE_HALO
CPU1C
PEG_RXP[0]
PEG_RXN[0]
PEG_RXP[1]
PEG_RXN[1]
PEG_RXP[2]
PEG_RXN[2]
PEG_RXP[3]
PEG_RXN[3]
PEG_RXP[4]
PEG_RXN[4]
PEG_RXP[5]
PEG_RXN[5]
PEG_RXP[6]
PEG_RXN[6]
PEG_RXP[7]
PEG_RXN[7]
PEG_RXP[8]
PEG_RXN[8]
PEG_RXP[9]
PEG_RXN[9]
PEG_RXP[10]
PEG_RXN[10]
PEG_RXP[11]
PEG_RXN[11]
PEG_RXP[12]
PEG_RXN[12]
PEG_RXP[13]
PEG_RXN[13]
PEG_RXP[14]
PEG_RXN[14]
PEG_RXP[15]
PEG_RXN[15]
PEG_RCOMP
DMI_RXP[0]
DMI_RXN[0]
DMI_RXP[1]
DMI_RXN[1]
DMI_RXP[2]
DMI_RXN[2]
DMI_RXP[3]
DMI_RXN[3]
SKL-H_BGA1440
@
REV = 1
BGA1440
3 OF 14
E25
D25
E24
F24
E23
D23
E22
F22
E21
D21
E20
F20
E19
D19
E18
F18
D17
E17
F16
E16
D15
E15
F14
E14
D13
E13
F12
E12
D11
E11
F10
E10
PEG_COMPPEG_COMP
G2
D8
E8
E6
F6
D5
E5
J8
J9
PEG_TXP[0]
PEG_TXN[0]
PEG_TXP[1]
PEG_TXN[1]
PEG_TXP[2]
PEG_TXN[2]
PEG_TXP[3]
PEG_TXN[3]
PEG_TXP[4]
PEG_TXN[4]
PEG_TXP[5]
PEG_TXN[5]
PEG_TXP[6]
PEG_TXN[6]
PEG_TXP[7]
PEG_TXN[7]
PEG_TXP[8]
PEG_TXN[8]
PEG_TXP[9]
PEG_TXN[9]
PEG_TXP[10]
PEG_TXN[10]
PEG_TXP[11]
PEG_TXN[11]
PEG_TXP[12]
PEG_TXN[12]
PEG_TXP[13]
PEG_TXN[13]
PEG_TXP[14]
PEG_TXN[14]
PEG_TXP[15]
PEG_TXN[15]
DMI_TXP[0]
DMI_TXN[0]
DMI_TXP[1]
DMI_TXN[1]
DMI_TXP[2]
DMI_TXN[2]
DMI_TXP[3]
DMI_TXN[3]
B25
A25
B24
C24
B23
A23
B22
C22
B21
A21
B20
C20
B19
A19
B18
C18
A17
B17
C16
B16
A15
B15
C14
B14
A13
B13
C12
B12
A11
B11
C10
B10
B8
A8
C6
B6
B5
A5
D4
B4
?
3
PEG_HTX_GRX_P11
PEG_HTX_GRX_N11
PEG_HTX_GRX_P10
PEG_HTX_GRX_N10
PEG_HTX_GRX_P9
PEG_HTX_GRX_N9
PEG_HTX_GRX_P8
PEG_HTX_GRX_N8
PEG_HTX_GRX_P7
PEG_HTX_GRX_N7
PEG_HTX_GRX_P6
PEG_HTX_GRX_N6
PEG_HTX_GRX_P5
PEG_HTX_GRX_N5
PEG_HTX_GRX_P4
PEG_HTX_GRX_N4
PEG_HTX_GRX_P3
PEG_HTX_GRX_N3
PEG_HTX_GRX_P2
PEG_HTX_GRX_N2
PEG_HTX_GRX_P1
PEG_HTX_GRX_N1
PEG_HTX_GRX_P0
PEG_HTX_GRX_N0
DMI_CTX_PRX_P0
DMI_CTX_PRX_N0
DMI_CTX_PRX_P1
DMI_CTX_PRX_N1
DMI_CTX_PRX_P2
DMI_CTX_PRX_N2
DMI_CTX_PRX_P3
DMI_CTX_PRX_N3
1 2
CC24 0.22U_0402_16V7K
1 2
CC12 0.22U_0402_16V7K
1 2
CC23 0.22U_0402_16V7K
1 2
CC11 0.22U_0402_16V7K
1 2
CC22 0.22U_0402_16V7K
1 2
CC10 0.22U_0402_16V7K
1 2
CC21 0.22U_0402_16V7K
1 2
CC9 0.22U_0402_16V7K
1 2
CC20 0.22U_0402_16V7K
1 2
CC8 0.22U_0402_16V7K
1 2
CC19 0.22U_0402_16V7K
1 2
CC7 0.22U_0402_16V7K
1 2
CC18 0.22U_0402_16V7K
1 2
CC6 0.22U_0402_16V7K
1 2
CC17 0.22U_0402_16V7K
1 2
CC5 0.22U_0402_16V7K
1 2
CC16 0.22U_0402_16V7K
1 2
CC4 0.22U_0402_16V7K
1 2
CC15 0.22U_0402_16V7K
1 2
CC3 0.22U_0402_16V7K
1 2
CC14 0.22U_0402_16V7K
1 2
CC2 0.22U_0402_16V7K
1 2
CC13 0.22U_0402_16V7K
1 2
CC1 0.22U_0402_16V7K
DMI_CTX_PRX_P0<19>
DMI_CTX_PRX_N0<19>
DMI_CTX_PRX_P1<19>
DMI_CTX_PRX_N1<19>
DMI_CTX_PRX_P2<19>
DMI_CTX_PRX_N2<19>
DMI_CTX_PRX_P3<19>
DMI_CTX_PRX_N3<19>
PEG_HTX_C_GRX_P11
PEG_HTX_C_GRX_N11
PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_N10
PEG_HTX_C_GRX_P9
PEG_HTX_C_GRX_N9
PEG_HTX_C_GRX_P8
PEG_HTX_C_GRX_N8
PEG_HTX_C_GRX_P7
PEG_HTX_C_GRX_N7
PEG_HTX_C_GRX_P6
PEG_HTX_C_GRX_N6
PEG_HTX_C_GRX_P5
PEG_HTX_C_GRX_N5
PEG_HTX_C_GRX_P4
PEG_HTX_C_GRX_N4
PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3
PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2
PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_N1
PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0
2
PEG_GTX_HRX_P[0..7] <46>
PEG_GTX_HRX_N[0..7] <46>
PEG_HTX_C_GRX_P[0..7] <46>
PEG_HTX_C_GRX_N[0..7] <46>
PEG_GTX_HRX_P[8..11] <41>
PEG_GTX_HRX_N[8..11] <41>
PEG_HTX_C_GRX_P[8..11] <41>
PEG_HTX_C_GRX_N[8..11] <41>
1
N16P GPU
Caldera
?
SKYLAKE_HALO
CPU1D
SKL-H_BGA1440
REV = 1
BGA1440
4 OF 14
EDP_TXP[0]
EDP_TXN[0]
EDP_TXP[1]
EDP_TXN[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXP
EDP_AUXN
EDP_DISP_UTIL
EDP_RCOMP
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
CPU_EDP_TX0P
D29
CPU_EDP_TX0N
E29
CPU_EDP_TX1P
F28
CPU_EDP_TX1N
E28
CPU_EDP_TX2N
B29
CPU_EDP_TX2P
A29
CPU_EDP_TX3N
B28
CPU_EDP_TX3P
C28
CPU_EDP_AUX
C26
CPU_EDP_AUX#
B26
A33
D37
G27
G25
G29
?
@
T3
PAD~D
EDP_COMP
AUD_AZACPU_SDI AUD_AZACPU_SDI_R
1 2
RH30 24.9_0402_1%
EDP_COMP
CAD Note:Trace width=20 mils ,Spacing=25mil,
Max length=100 mils.
AUD_AZACPU_SCLK
AUD_AZACPU_SDO
AUD_AZACPU_SDI
1 2
RC66 20_0402_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
CPU_EDP_TX0P<25>
CPU_EDP_TX0N<25>
CPU_EDP_TX1P<25>
CPU_EDP_TX1N<25>
CPU_EDP_TX2N<25>
CPU_EDP_TX2P<25>
CPU_EDP_TX3N<25>
CPU_EDP_TX3P<25>
CPU_EDP_AUX <25>
CPU_EDP_AUX# <25>
AUD_AZACPU_SCLK <18>
AUD_AZACPU_SDO <18>
+VCCIO
AUD_AZACPU_SDI_R <18>
Compal Secret Data
Compal Secret Data
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
PROCESSOR(1/7) DMI,FDI,PEG
PROCESSOR(1/7) DMI,FDI,PEG
PROCESSOR(1/7) DMI,FDI,PEG
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
7 78Wednesday, July 22, 2015
7 78Wednesday, July 22, 2015
7 78Wednesday, July 22, 2015
CPU_DP1_P0
B B
TBT
mDP/TBT
CPU_DP1_P0<58>
CPU_DP1_N0<58>
CPU_DP1_P1<58>
CPU_DP1_N1<58>
CPU_DP1_P2<58>
CPU_DP1_N2<58>
CPU_DP1_P3<58>
CPU_DP1_N3<58>
CPU_DP1_AUXP<58>
CPU_DP1_AUXN<58>
CPU_DP2_P0<58>
CPU_DP2_N0<58>
CPU_DP2_P1<58>
CPU_DP2_N1<58>
CPU_DP2_P2<58>
CPU_DP2_N2<58>
CPU_DP2_P3<58>
CPU_DP2_N3<58>
CPU_DP2_AUXP<58>
CPU_DP2_AUXN<58>
CPU_DP1_N0
CPU_DP1_P1
CPU_DP1_N1
CPU_DP1_P2
CPU_DP1_N2
CPU_DP1_P3
CPU_DP1_N3
CPU_DP1_AUXP
CPU_DP1_AUXN
CPU_DP2_P0
CPU_DP2_N0
CPU_DP2_P1
CPU_DP2_N1
CPU_DP2_P2
CPU_DP2_N2
CPU_DP2_P3
CPU_DP2_N3
CPU_DP2_AUXP
CPU_DP2_AUXN
For DELL Confidential
A A
5
K36
DDI1_TXP[0]
K37
DDI1_TXN[0]
J35
DDI1_TXP[1]
J34
DDI1_TXN[1]
H37
DDI1_TXP[2]
H36
DDI1_TXN[2]
J37
DDI1_TXP[3]
J38
DDI1_TXN[3]
D27
DDI1_AUXP
E27
DDI1_AUXN
H34
DDI2_TXP[0]
H33
DDI2_TXN[0]
F37
DDI2_TXP[1]
G38
DDI2_TXN[1]
F34
DDI2_TXP[2]
F35
DDI2_TXN[2]
E37
DDI2_TXP[3]
E36
DDI2_TXN[3]
F26
DDI2_AUXP
E26
DDI2_AUXN
C34
DDI3_TXP[0]
D34
DDI3_TXN[0]
B36
DDI3_TXP[1]
B34
DDI3_TXN[1]
F33
DDI3_TXP[2]
E33
DDI3_TXN[2]
C33
DDI3_TXP[3]
B33
DDI3_TXN[3]
A27
DDI3_AUXP
B27
DDI3_AUXN
@
4
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
4
3
2
1
Interleave
DDR_A_D0
DDR_A_D1
DDR_A_D[0..63]<14>
DDR_A_MA[0..13]<14>
DDR_A_DQS#[0..7]<14>
DDR_A_DQS[0..7]<14>
D D
DDR_B_D[0..63]<15>
DDR_B_MA[0..13]<15>
DDR_B_DQS#[0..7]<15>
DDR_B_DQS[0..7]<15>
C C
B B
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
CPU1A
BR6
DDR0_DQ[0]
BT6
DDR0_DQ[1]
BP3
DDR0_DQ[2]
BR3
DDR0_DQ[3]
BN5
DDR0_DQ[4]
BP6
DDR0_DQ[5]
BP2
DDR0_DQ[6]
BN3
DDR0_DQ[7]
BL4
DDR0_DQ[8]
BL5
DDR0_DQ[9]
BL2
DDR0_DQ[10]
BM1
DDR0_DQ[11]
BK4
DDR0_DQ[12]
BK5
DDR0_DQ[13]
BK1
DDR0_DQ[14]
BK2
DDR0_DQ[15]
BG4
DDR0_DQ[16]/DDR0_DQ[32]
BG5
DDR0_DQ[17]/DDR0_DQ[33]
BF4
DDR0_DQ[18]/DDR0_DQ[34]
BF5
DDR0_DQ[19]/DDR0_DQ[35]
BG2
DDR0_DQ[20]/DDR0_DQ[36]
BG1
DDR0_DQ[21]/DDR0_DQ[37]
BF1
DDR0_DQ[22]/DDR0_DQ[38]
BF2
DDR0_DQ[23]/DDR0_DQ[39]
BD2
DDR0_DQ[24]/DDR0_DQ[40]
BD1
DDR0_DQ[25]/DDR0_DQ[41]
BC4
DDR0_DQ[26]/DDR0_DQ[42]
BC5
DDR0_DQ[27]/DDR0_DQ[43]
BD5
DDR0_DQ[28]/DDR0_DQ[44]
BD4
DDR0_DQ[29]/DDR0_DQ[45]
BC1
DDR0_DQ[30]/DDR0_DQ[46]
BC2
DDR0_DQ[31]/DDR0_DQ[47]
AB1
DDR0_DQ[32]/DDR1_DQ[0]
AB2
DDR0_DQ[33]/DDR1_DQ[1]
AA4
DDR0_DQ[34]/DDR1_DQ[2]
AA5
DDR0_DQ[35]/DDR1_DQ[3]
AB5
DDR0_DQ[36]/DDR1_DQ[4]
AB4
DDR0_DQ[37]/DDR1_DQ[5]
AA2
DDR0_DQ[38]/DDR1_DQ[6]
AA1
DDR0_DQ[39]/DDR1_DQ[7]
V5
DDR0_DQ[40]/DDR1_DQ[8]
V2
DDR0_DQ[41]/DDR1_DQ[9]
U1
DDR0_DQ[42]/DDR1_DQ[10]
U2
DDR0_DQ[43]/DDR1_DQ[11]
V1
DDR0_DQ[44]/DDR1_DQ[12]
V4
DDR0_DQ[45]/DDR1_DQ[13]
U5
DDR0_DQ[46]/DDR1_DQ[14]
U4
DDR0_DQ[47]/DDR1_DQ[15]
R2
DDR0_DQ[48]/DDR1_DQ[32]
P5
DDR0_DQ[49]/DDR1_DQ[33]
R4
DDR0_DQ[50]/DDR1_DQ[34]
P4
DDR0_DQ[51]/DDR1_DQ[35]
R5
DDR0_DQ[52]/DDR1_DQ[36]
P2
DDR0_DQ[53]/DDR1_DQ[37]
R1
DDR0_DQ[54]/DDR1_DQ[38]
P1
DDR0_DQ[55]/DDR1_DQ[39]
M4
DDR0_DQ[56]/DDR1_DQ[40]
M1
DDR0_DQ[57]/DDR1_DQ[41]
L4
DDR0_DQ[58]/DDR1_DQ[42]
L2
DDR0_DQ[59]/DDR1_DQ[43]
M5
DDR0_DQ[60]/DDR1_DQ[44]
M2
DDR0_DQ[61]/DDR1_DQ[45]
L5
DDR0_DQ[62]/DDR1_DQ[46]
L1
DDR0_DQ[63]/DDR1_DQ[47]
BA2
DDR0_ECC[0]
BA1
DDR0_ECC[1]
AY4
DDR0_ECC[2]
AY5
DDR0_ECC[3]
BA5
DDR0_ECC[4]
BA4
DDR0_ECC[5]
AY1
DDR0_ECC[6]
AY2
DDR0_ECC[7]
DDR CHANNEL A
SKL-H_BGA1440
@
REV = 1
?
SKYLAKE_HALO
BGA1440
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
1 OF 14
DDR0_CKP[0]
DDR0_CKN[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CLKP[2]
DDR0_CLKN[2]
DDR0_CLKP[3]
DDR0_CLKN[3]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_CS#[2]
DDR0_CS#[3]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_ODT[2]
DDR0_ODT[3]
DDR0_MA[3]
DDR0_MA[4]
DDR0_PAR
DDR0_ALERT#
DDR0_DQSN[0]
DDR0_DQSN[1]
DDR0_DQSP[0]
DDR0_DQSP[1]
DDR0_DQSP[8]
DDR0_DQSN[8]
AG1
AG2
AK1
AK2
AL3
AK3
AL2
AL1
AT1
AT2
AT3
AT5
AD5
AE2
AD2
AE5
AD3
AE4
AE1
AD4
AH5
AH1
AU1
AH4
AG4
AD1
DDR_A_MA0
AH3
DDR_A_MA1
AP4
DDR_A_MA2
AN4
DDR_A_MA3
AP5
DDR_A_MA4
AP2
DDR_A_MA5
AP1
DDR_A_MA6
AP3
DDR_A_MA7
AN1
DDR_A_MA8
AN3
DDR_A_MA9
AT4
DDR_A_MA10
AH2
DDR_A_MA11
AN2
DDR_A_MA12
AU4
DDR_A_MA13
AE3
AU2
AU3
AG3
AU5
DDR_A_DQS#0
BR5
DDR_A_DQS#1
BL3
DDR_A_DQS#2
BG3
DDR_A_DQS#3
BD3
DDR_A_DQS4
AB3
DDR_A_DQS5
V3
DDR_A_DQS6
R3
DDR_A_DQS7
M3
DDR_A_DQS0
BP5
DDR_A_DQS1
BK3
DDR_A_DQS2
BF3
DDR_A_DQS3
BC3
DDR_A_DQS#4
AA3
DDR_A_DQS#5
U3
DDR_A_DQS#6
P3
DDR_A_DQS#7
L3
AY3
BA3
?
M_CLK_DDR0<14>
M_CLK_DDR#0<14>
M_CLK_DDR#1<14>
M_CLK_DDR1<14>
DDR_CKE0_DIMMA<14>
DDR_CKE1_DIMMA<14>
DDR_CS0_DIMMA#<14>
DDR_CS1_DIMMA#<14>
M_ODT0<14>
M_ODT1<14>
DDR_A_BS0<14>
DDR_A_BS1<14>
DDR_A_BG0<14>
DDR_A_RAS#<14>
DDR_A_WE#<14>
DDR_A_CAS#<14>
DDR_A_BG1<14>
DDR_A_ACT#<14> DDR_B_ACT#<15>
DDR_A_PAR<14>
DDR_A_ALERT#<14>
1 2
RH148 121_0402_1%
1 2
RH149 75_0402_1%
1 2
RH150 100_0402_1%
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_RCOMP0
DDR_RCOMP1
DDR_RCOMP2
CPU1B
BT11
DDR1_DQ[0]/DDR0_DQ[16]
BR11
DDR1_DQ[1]/DDR0_DQ[17]
BT8
DDR1_DQ[2]/DDR0_DQ[18]
BR8
DDR1_DQ[3]/DDR0_DQ[19]
BP11
DDR1_DQ[4]/DDR0_DQ[20]
BN11
DDR1_DQ[5]/DDR0_DQ[21]
BP8
DDR1_DQ[6]/DDR0_DQ[22]
BN8
DDR1_DQ[7]/DDR0_DQ[23]
BL12
DDR1_DQ[8]/DDR0_DQ[24]
BL11
DDR1_DQ[9]/DDR0_DQ[25]
BL8
DDR1_DQ[10]/DDR0_DQ[26]
BJ8
DDR1_DQ[11]/DDR0_DQ[27]
BJ11
DDR1_DQ[12]/DDR0_DQ[28]
BJ10
DDR1_DQ[13]/DDR0_DQ[29]
BL7
DDR1_DQ[14]/DDR0_DQ[30]
BJ7
DDR1_DQ[15]/DDR0_DQ[31]
BG11
DDR1_DQ[16]/DDR0_DQ[48]
BG10
DDR1_DQ[17]/DDR0_DQ[49]
BG8
DDR1_DQ[18]/DDR0_DQ[50]
BF8
DDR1_DQ[19]/DDR0_DQ[51]
BF11
DDR1_DQ[20]/DDR0_DQ[52]
BF10
DDR1_DQ[21]/DDR0_DQ[53]
BG7
DDR1_DQ[22]/DDR0_DQ[54]
BF7
DDR1_DQ[23]/DDR0_DQ[55]
BB11
DDR1_DQ[24]/DDR0_DQ[56]
BC11
DDR1_DQ[25]/DDR0_DQ[57]
BB8
DDR1_DQ[26]/DDR0_DQ[58]
BC8
DDR1_DQ[27]/DDR0_DQ[59]
BC10
DDR1_DQ[28]/DDR0_DQ[60]
BB10
DDR1_DQ[29]/DDR0_DQ[61]
BC7
DDR1_DQ[30]/DDR0_DQ[62]
BB7
DDR1_DQ[31]/DDR0_DQ[63]
AA11
DDR1_DQ[32]/DDR1_DQ[16]
AA10
DDR1_DQ[33]/DDR1_DQ[17]
AC11
DDR1_DQ[34]/DDR1_DQ[18]
AC10
DDR1_DQ[35]/DDR1_DQ[19]
AA7
DDR1_DQ[36]/DDR1_DQ[20]
AA8
DDR1_DQ[37]/DDR1_DQ[21]
AC8
DDR1_DQ[38]/DDR1_DQ[22]
AC7
DDR1_DQ[39]/DDR1_DQ[23]
W8
DDR1_DQ[40]/DDR1_DQ[24]
W7
DDR1_DQ[41]/DDR1_DQ[25]
V10
DDR1_DQ[42]/DDR1_DQ[26]
V11
DDR1_DQ[43]/DDR1_DQ[27]
W11
DDR1_DQ[44]/DDR1_DQ[28]
W10
DDR1_DQ[45]/DDR1_DQ[29]
V7
DDR1_DQ[46]/DDR1_DQ[30]
V8
DDR1_DQ[47]/DDR1_DQ[31]
R11
DDR1_DQ[48]
P11
DDR1_DQ[49]
P7
DDR1_DQ[50]
R8
DDR1_DQ[51]
R10
DDR1_DQ[52]
P10
DDR1_DQ[53]
R7
DDR1_DQ[54]
P8
DDR1_DQ[55]
L11
DDR1_DQ[56]
M11
DDR1_DQ[57]
L7
DDR1_DQ[58]
M8
DDR1_DQ[59]
L10
DDR1_DQ[60]
M10
DDR1_DQ[61]
M7
DDR1_DQ[62]
L8
DDR1_DQ[63]
AW11
DDR1_ECC[0]
AY11
DDR1_ECC[1]
AY8
DDR1_ECC[2]
AW8
DDR1_ECC[3]
AY10
DDR1_ECC[4]
AW10
DDR1_ECC[5]
AY7
DDR1_ECC[6]
AW7
DDR1_ECC[7]
G1
DDR_RCOMP[0]
H1
DDR_RCOMP[1]
J2
DDR_RCOMP[2]
SKL-H_BGA1440
@
DDR CHANNEL B
?
SKYLAKE_HALO
BGA1440
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
2 OF 14
REV = 1
DDR1_CKP[0]
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[1]
DDR1_CLKP[2]
DDR1_CLKN[2]
DDR1_CLKP[3]
DDR1_CLKN[3]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_CS#[2]
DDR1_CS#[3]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_ODT[2]
DDR1_ODT[3]
DDR1_MA[3]
DDR1_MA[4]
DDR1_PAR
DDR1_ALERT#
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSN[6]
DDR1_DQSN[7]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR1_DQSP[6]
DDR1_DQSP[7]
DDR1_DQSP[8]
DDR1_DQSN[8]
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
?
AM9
AN9
AM8
AM7
AM11
AM10
AJ10
AJ11
AT8
AT10
AT7
AT11
AF11
AE7
AF10
AE10
AF7
AE8
AE9
AE11
AH10
AH11
AF8
AH8
AH9
AR9
AJ9
AK6
AK5
AL5
AL6
AM6
AN7
AN10
AN8
AR11
AH7
AN11
AR10
AF9
AR7
AT9
AJ7
AR8
BP9
BL9
BG9
BC9
AC9
W9
R9
M9
BR9
BJ9
BF9
BB9
AA9
V9
P9
L9
AW9
AY9
BN13
BP13
BR13
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
M_CLK_DDR2<15>
M_CLK_DDR#2<15>
M_CLK_DDR#3<15>
M_CLK_DDR3<15>
DDR_CKE2_DIMMB<15>
DDR_CKE3_DIMMB<15>
DDR_CS2_DIMMB#<15>
DDR_CS3_DIMMB#<15>
M_ODT2<15>
M_ODT3<15>
DDR_B_RAS#<15>
DDR_B_WE#<15>
DDR_B_CAS#<15>
DDR_B_BS0<15>
DDR_B_BS1<15>
DDR_B_BG0<15>
DDR_B_BG1<15>
DDR_B_PAR<15>
DDR_B_ALERT#<15>
+V_DDR_REFA_R
+V_DDR_REFB_R
For DELL Confidential
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Title
Title
Title
PROCESSOR(2/7) DDRIII
PROCESSOR(2/7) DDRIII
PROCESSOR(2/7) DDRIII
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
8 78Wednesday, July 22, 2015
8 78Wednesday, July 22, 2015
8 78Wednesday, July 22, 2015
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
CFG Straps for Processor
5
4
+VCCST
3
2
1
Stall reset sequence after PCU PLL lock until de-asserted
1 = (Default) Normal Operation; No stall.
CFG0
D D
*
0 = Stall.
CFG0
1 2
@
RH183 1K_0402_5%
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
1: Normal Operation; Lane # definition matches
CFG2
socket pin map definition
0:Lane Reversed
*
1 2
CFG2
RH184 1K_0402_5%
Display Port Presence Strap
C C
1 : Disabled; No Physical Display Port
CFG4
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
*
1 2
CFG4
RH185 1K_0402_5%
1 2
RH163 1K_0402_5%
1 2
RH156 51_0402_5%
1 2
RH164 1K_0402_5%
1 2
RH151 100_0402_1%
1 2
RH152 56.2_0402_1%
+VCCSTG
1 2
RH165 1K_0402_5%
PCIE Port Bifurcation Straps
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2
CFG[6:5]
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
*
1 2
B B
CFG5
RH186 1K_0402_5%
1 2
CFG6
RH187 1K_0402_5%
PEG DEFER TRAINING
1: (Default) PEG Train immediately following xxRESETB
CFG7
de assertion
*
0: PEG Wait for BIOS for training
1 2
CFG7
@
RH188 1K_0402_5%
For DELL Confidential
A A
H_THERMTRIP#_R
XDP_PREQ#
@
H_VCCST_PWRGD
VR_SVID_DATA
VR_SVID_ALERT#
VR_SVID_ALERT#<71>
VR_SVID_CLK<71>
VR_SVID_DATA<71>
H_PROCHOT#<43,61,62>
H_PROCHOT#
+1.2V_DDR
1
@
CH197
0.1U_0402_10V7K
2
+3VS
12
RH525
220K_0402_5%~D
SM_PG_CTRL<64>
H_VCCST_PWRGD<43,45>
H_CPUPWRGD<18>
PLTRST_CPU#<16>
H_PM_SYNC_R<16>
H_PM_DOWN<16>
H_PECI<16,43>
H_THERMTRIP#_R<16>
PROC_DETECT#<16>
UC1
5
VCC
4
Y
74AUP1G07GW_TSSOP5
4/13 UC1 SA00005U600 is X1 code.
Change PN SA00005U600 to SA00007WE00.
PCH_TRIGGER<22>
CPU_TRIGGER<22>
VR_SVID_ALERT#
VR_SVID_CLK
VR_SVID_DATA
H_VCCST_PWRGD
H_PM_DOWN
1
NC
DDR_VTT_PG_CTRL
2
A
3
GND
PCH_TRIGGER PCH_TRIGGER_R
CPU_TRIGGER CPU_TRIGGER_R
1 2
RH153 220_0402_5%
1 2
RH158 499_0402_1%
1 2
RH154 60.4_0402_1%
1 2
RH155 20_0402_5%
1 2
RH190 0_0402_5%@
1 2
RH519 0_0402_5%~D@
1 2
RH167 30_0402_5%
1 2
RH192 30_0402_5%
T39PAD~D@
T40PAD~D@
T41PAD~D@
T42PAD~D@
T43PAD~D@
T44PAD~D@
T45PAD~D@
T46PAD~D@
T47PAD~D@
T48PAD~D@
T49PAD~D@
T50PAD~D@
T51PAD~D@
T52PAD~D@
T53PAD~D@
T57PAD~D@
T58PAD~D@
T59PAD~D@
T60PAD~D@
T61PAD~D@
T62PAD~D@
T63PAD~D@
T64PAD~D@
T65PAD~D@
PCH_CPU_BCLK_P<17>
PCH_CPU_BCLK_N<17>
PCH_CPU_PCIBCLK_P<17>
PCH_CPU_PCIBCLK_N<17>
CPU_24MHZ_P<17>
CPU_24MHZ_N<17>
T54PAD~D@
VR_SVID_ALERT#_R
H_PROCHOT#_RH_PROCHOT#
DDR_VTT_PG_CTRL
VCCST_PWRGD_CPU
PLTRST_CPU#
H_PM_SYNC_R
H_PM_DOWN_R
H_PECI_R
H_THERMTRIP#_R
BR1
BT2
BN35
J24
H24
BN33
BL34
N29
R14
AE29
AA14
A36
A37
H23
J23
F30
E30
B30
C30
BR35
BR31
BH30
D1
RSVD_TP
E1
RSVD_TP
E3
RSVD_TP
E2
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
PROC_TRIGIN
PROC_TRIGOUT
RSVD
RSVD
RSVD
RSVD
G3
RSVD
J3
RSVD
RSVD
RSVD
RSVD
@
B31
BCLKP
A32
BCLKN
D35
PCI_BCLKP
C36
PCI_BCLKN
E31
CLK24P
D31
CLK24N
BH31
VIDALERT#
BH32
VIDSCK
BH29
VIDSOUT
BR30
PROCHOT#
BT13
DDR_VTT_CNTL
H13
VCCST_PWRGD
BT31
PROCPWRGD
BP35
RESET#
BM34
PM_SYNC
BP31
PM_DOWN
BT34
PECI
J31
THERMTRIP#
BR33
SKTOCC#
BN1
PROC_SELECT#
BM30
CATERR#
@
CPU1K
SKL-H_BGA1440
CPU1E
SKL-H_BGA1440
SKYLAKE_HALO
BGA1440
REV = 1
SKYLAKE_HALO
BGA1440
5 OF 14
?
11 OF 14
?
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[17]
CFG[16]
CFG[19]
CFG[18]
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
PROC_TDO
PROC_TDI
PROC_TMS
PROC_TCK
PROC_TRST#
PROC_PREQ#
PROC_PRDY#
CFG_RCOMP
?
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
NCTF
NCTF
NCTF
NCTF
NCTF
NCTF
BN25
BN27
BN26
BN28
BR20
BM20
BT20
BP20
BR23
BR22
BT23
BT22
BM19
BR19
BP19
BT19
BN23
BP23
BP22
BN22
BR27
BT27
BM31
BT30
BT28
BL32
BP28
BR28
BP30
BL30
BP27
BT25
VSS
VSS
?REV = 1
BM33
BL33
BJ14
BJ13
BK28
BJ28
BJ18
BJ16
BK16
BK24
BJ24
BK21
BJ21
BT17
BR17
BK18
BJ34
BJ33
G13
AJ8
BL31
B2
B38
BP1
BR2
C1
C38
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG17
CFG16
CFG19
CFG18
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
XDP_BPM#0
XDP_BPM#1
XDP_TDO
XDP_TDI
XDP_TMS
XDP_TCK
CPU_XDP_TRST#
XDP_PREQ#
XDP_PRDY#
CFG_RCOMP
CFG0<6>
T56 PAD~D @
T72 PAD~D @
T91 PAD~D @
T92 PAD~D @
T93 PAD~D @
T94 PAD~D @
T95 PAD~D @
T96 PAD~D @
T101 PAD~D @
T102 PAD~D @
T103 PAD~D @
T104 PAD~D @
T105 PAD~D @
T106 PAD~D @
T107 PAD~D @
T108 PAD~D @
T109 PAD~D @
T110 PAD~D @
T111 PAD~D @
T112 PAD~D @
T113 PAD~D @
12
RH59
49.9_0402_1%
T66 PAD~D @
T67 PAD~D @
T68 PAD~D @
T69 PAD~D @
T70 PAD~D @
T71 PAD~D @
T73 PAD~D @
T74 PAD~D @
T75 PAD~D @
T76 PAD~D @
T77 PAD~D @
T78 PAD~D @
T79 PAD~D @
T80 PAD~D @
T81 PAD~D @
T82 PAD~D @
T83 PAD~D @
T84 PAD~D @
T85 PAD~D @
T86 PAD~D @
T87 PAD~D @
T88 PAD~D @
T89 PAD~D @
T90 PAD~D @
XDP_TDO<6,18>
XDP_TDI<6,18>
XDP_TMS<6,18>
XDP_TCK<6,18>
CPU_XDP_TRST#<6,22>
XDP_PREQ#<22>
XDP_PRDY# <22>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
PROCESSOR(3/7) RSVD,CFG
PROCESSOR(3/7) RSVD,CFG
PROCESSOR(3/7) RSVD,CFG
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
9 78Wednesday, July 22, 2015
9 78Wednesday, July 22, 2015
9 78Wednesday, July 22, 2015
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
D D
SKYLAKE_HALO
CPU1G
K13
K14
L13
N13
N14
N30
N31
N32
N35
N36
N37
N38
P13
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
SKL-H_BGA1440
@
BGA1440
REV = 1 ?
AA13
AA31
AA32
AA33
AA34
AA35
AA36
AA37
AA38
AB29
AB30
AB31
AB32
AB35
AB36
AB37
AB38
AC13
AC14
AC29
AC30
AC31
AC32
AC33
AC34
AC35
AC36
AD13
C C
B B
AD14
AD31
AD32
AD33
AD34
AD35
AD36
AD37
AD38
AE13
AE14
AE30
AE31
AE32
AE35
AE36
AE37
AE38
AF35
AF36
AF37
AF38
?
7 OF 14
VCC_SENSE
VSS_SENSE
4
+VCC_CORE+VCC_CORE
V32
VCC
V33
VCC
V34
VCC
V35
VCC
V36
VCC
V37
VCC
V38
VCC
W13
VCC
W14
VCC
W29
VCC
W30
VCC
W31
VCC
W32
VCC
W35
VCC
W36
VCC
W37
VCC
W38
VCC
Y29
VCC
Y30
VCC
Y31
VCC
Y32
VCC
Y33
VCC
Y34
VCC
Y35
VCC
Y36
VCC
L14
VCC
P29
VCC
P30
VCC
P31
VCC
P32
VCC
P33
VCC
P34
VCC
P35
VCC
P36
VCC
R13
VCC
R31
VCC
R32
VCC
R33
VCC
R34
VCC
R35
VCC
R36
VCC
R37
VCC
R38
VCC
T29
VCC
T30
VCC
T31
VCC
T32
VCC
T35
VCC
T36
VCC
T37
VCC
T38
VCC
U29
VCC
U30
VCC
U31
VCC
U32
VCC
U33
VCC
U34
VCC
U35
VCC
U36
VCC
V13
VCC
V14
VCC
V31
VCC
P14
VCC
AG37
AG38
+VCC_CORE
12
12
RH197
100_0402_1%
1 2
RH198 0_0402_5%@
1 2
RH465 0_0402_5%@
RH466
100_0402_1%
3
VCCSENSE <71>
VSSSENSE<71>
1 2
RH166 49.9_0402_1%@
1 2
RH57 49.9_0402_1%@
1 2
RH58 49.9_0402_1%@
2
CPU1J
BJ17
VCCOPC
BJ19
VCCOPC
BJ20
VCCOPC
BK17
VCCOPC
BK19
VCCOPC
BK20
VCCOPC
BL16
VCCOPC
BL17
VCCOPC
BL18
VCCOPC
BL19
VCCOPC
BL20
VCCOPC
BL21
VCCOPC
BM17
VCCOPC
BN17
VCCOPC
BJ23
RSVD
BJ26
RSVD
BJ27
RSVD
BK23
RSVD
BK26
RSVD
BK27
RSVD
BL23
RSVD
BL24
RSVD
BL25
RSVD
BL26
RSVD
BL27
RSVD
BL28
RSVD
BM24
RSVD
BL15
VCCOPC_SENSE
BM16
VSSOPC_SENSE
BL22
RSVD
BM22
RSVD
BP15
VCCEOPIO
BR15
VCCEOPIO
BT15
VCCEOPIO
BP16
RSVD
BR16
RSVD
BT16
RSVD
BN15
VCCEOPIO_SENSE
BM15
VSSEOPIO_SENSE
BP17
RSVD
BN16
RSVD
BM14
VCC_OPC_1P8
BL14
VCC_OPC_1P8
BJ35
RSVD
BJ36
RSVD
AT13
ZVM#
AW13
MSM#
AU13
ZVM2#
AY13
MSM2#
BT29
OPC_RCOMP
BR25
OPCE_RCOMP
BP25
OPCE_RCOMP2
SKL-H_BGA1440
REV = 1
@
SKYLAKE_HALO
BGA1440
?
10 OF 14
1
?
A A
For DELL Confidential
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
PROCESSOR(4/7) PWR,BYPASS
PROCESSOR(4/7) PWR,BYPASS
PROCESSOR(4/7) PWR,BYPASS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
10 78Wednesday, July 22, 2015
10 78Wednesday, July 22, 2015
10 78Wednesday, July 22, 2015
1
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
4
3
2
1
+VCCSTG
10U_0603_6.3V6M~D
D D
+VCCSA
?
SKYLAKE_HALO
CPU1I
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
SKL-H_BGA1440
@
BGA1440
9 OF 14
VCCPLL_OC
VCCPLL_OC
VCCSA_SENSE
VSSSA_SENSE
VCCIO_SENSE
VSSIO_SENSE
J30
K29
K30
K31
K32
K33
K34
K35
L31
L32
L35
L36
L37
L38
M29
M30
M31
M32
M33
M34
AG12
M35
M36
G15
G17
G19
G21
H15
H16
H17
H19
H20
H21
H26
H27
J15
J16
J17
J19
J20
J21
J26
J27
C C
B B
+VCCIO
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQC
VCCST
VCCSTG
VCCSTG
VCCPLL
VCCPLL
+1.2V_DDR
AA6
AE12
AF5
AF6
AG5
AG9
AJ12
AL11
AP6
AP7
AR12
AR6
AT12
AW6
AY6
J5
J6
K12
K6
L12
L6
R6
T6
W6
Y12
BH13
G11
H30
H29
G30
H28
J28
M38
M37
H14
J14
?REV = 1
+1.2V_DDR
12
RH473
@
0_0402_5%
+VCCST
RH201 100_0402_1%
RH202 0_0402_5%@
RH470 0_0402_5%@
RH469 100_0402_1%
1 2
+1.2V_DDR+1.2V_VCCPLL_OC
RH530 0_0402_5%@
VCCPLL_OC is allowed to be turned off
during S3 and DS3 if it is not powered directly from VDDQ
+VCCSTG
+VCCST
1 2
1 2
1 2
1 2
+VCCSA
VCCSA_SENSE <71>
VSSSA_SENSE <71>
VCCIO_SENSE <74>
VSSIO_SENSE <74>
10U_0603_6.3V6M~D
CH102
1
2
10U_0603_6.3V6M~D
CH103
CH104
1
1
2
2
1U_0402_6.3V
CH105
1
2
1
2
1U_0402_6.3V
CH106
+1.2V_DDR
1
2
+VCCST+VCCIO
1U_0402_6.3V
1
2
22U_0805_6.3V6M~D
CH129
+1.2V_DDR
1U_0402_6.3V
1U_0402_6.3V
CH107
CH108
1
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
1
CH130
CH131
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
CH118
1
1
2
2
1U_0402_6.3V
CH109
CH110
1
1
2
2
22U_0805_6.3V6M~D
1
CH132
2
10U_0603_6.3V6M~D
22U_0603_6.3V6M
22U_0603_6.3V6M
CH121
CH120
CH124
1
1
2
1
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CH119
1
2
10U_0603_6.3V6M~D
CH123
CH122
1
1
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CH125
1
2
10U_0603_6.3V6M~D
CH127
CH126
CH128
1
1
2
2
A A
For DELL Confidential
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
PROCESSOR(5/7) PWR
PROCESSOR(5/7) PWR
PROCESSOR(5/7) PWR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
11 78Wednesday, July 22, 2015
11 78Wednesday, July 22, 2015
11 78Wednesday, July 22, 2015
For DELL Confidential
0.1
0.1
0.1
VINAFIX.COM
For DELL Confidential
5
4
3
2
1
+VCCGT
?
SKYLAKE_HALO
CPU1H
D D
C C
B B
BG34
BG35
BG36
BH33
BH34
BH35
BH36
BH37
BH38
BJ37
BJ38
BL36
BL37
BM36
BM37
BN36
BN37
BN38
BP37
BP38
BR37
BT37
BE38
BF13
BF14
BF29
BF30
BF31
BF32
BF35
BF36
BF37
BF38
BG29
BG30
BG31
BG32
BG33
BC36
BC37
BC38
BD13
BD14
BD29
BD30
BD31
BD32
BD33
BD34
BD35
BD36
BE31
BE32
BE37
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
SKL-H_BGA1440
@
BGA1440
8 OF 14
REV = 1
+VCCGT +VCCGT
AV29
VCCGT
AV30
VCCGT
AV31
VCCGT
AV32
VCCGT
AV33
VCCGT
AV34
VCCGT
AV35
VCCGT
AV36
VCCGT
AW14
VCCGT
AW31
VCCGT
AW32
VCCGT
AW33
VCCGT
AW34
VCCGT
AW35
VCCGT
AW36
VCCGT
AW37
VCCGT
AW38
VCCGT
AY29
VCCGT
AY30
VCCGT
AY31
VCCGT
AY32
VCCGT
AY35
VCCGT
AY36
VCCGT
AY37
VCCGT
AY38
VCCGT
BA13
VCCGT
BA14
VCCGT
BA29
VCCGT
BA30
VCCGT
BA31
VCCGT
BA32
VCCGT
BA33
VCCGT
BA34
VCCGT
BA35
VCCGT
BA36
VCCGT
BB13
VCCGT
BB14
VCCGT
BB31
VCCGT
BB32
VCCGT
BB33
VCCGT
BB34
VCCGT
BB35
VCCGT
BB36
VCCGT
BB37
VCCGT
BB38
VCCGT
BC29
VCCGT
BC30
VCCGT
BC31
VCCGT
BC32
VCCGT
BC35
VCCGT
BE33
VCCGT
BE34
VCCGT
BE35
VCCGT
BE36
VCCGT
?
AJ29
AJ30
AJ31
AJ32
AJ33
AJ34
AJ35
AJ36
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK38
AL13
AL29
AL30
AL31
AL32
AL35
AL36
AL37
AL38
AM13
AM14
AM29
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AN13
AN14
AN31
AN32
AN33
AN34
AN35
AN36
AN37
AN38
AP13
AP14
AP29
AP30
AP31
AP32
AP35
AP36
AP37
AP38
AR29
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AT14
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38
AU14
AU29
AU30
AU31
AU32
AU35
AU36
AU37
AU38
CPU1N
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
SKL-H_BGA1440
REV = 1
@
?
SKYLAKE_HALO
BGA1440
14 OF 14
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGT_SENSE
VSSGTX_SENSE
VSSGT_SENSE
VCCGTX_SENSE
AF29
AF30
AF31
AF32
AF33
AF34
AG13
AG14
AG31
AG32
AG33
AG34
AG35
AG36
AH13
AH14
AH29
AH30
AH31
AH32
AJ13
AJ14
+VCCGT
12
RH203
100_0402_1%
AH38
AH35
AH37
AH36
?
RH204 0_0402_5%@
RH471 0_0402_5%@
12
RH472
100_0402_1%
1 2
1 2
VCCGT_SENSE <71>
VSSGT_SENSE<71>
A A
For DELL Confidential
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
PROCESSOR(6/7) PM,XDP,CLK
PROCESSOR(6/7) PM,XDP,CLK
PROCESSOR(6/7) PM,XDP,CLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
12 78Wednesday, July 22, 2015
12 78Wednesday, July 22, 2015
12 78Wednesday, July 22, 2015
For DELL Confidential
0.1
0.1
0.1
VINAFIX.COM
For DELL Confidential
5
4
3
2
1
?
SKYLAKE_HALO
CPU1F
BGA1440
Y38
VSS
Y37
VSS
Y14
VSS
Y13
W34
W33
W12
Y11
Y10
Y9
Y8
Y7
W5
W4
W3
W2
W1
V30
V29
V12
V6
U38
U37
U6
T34
T33
T14
T13
T12
T11
T10
T9
T8
T7
T5
T4
T3
T2
T1
R30
R29
R12
P38
P37
P12
P6
N34
N33
N12
N11
N10
N9
N8
N7
N6
N5
N4
N3
N2
N1
M14
M13
M12
M6
L34
L33
L30
L29
K38
K11
K10
K9
K8
K7
K5
K4
K3
K2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKL-H_BGA1440
REV = 1
@
6 OF 14
D D
C C
B B
NCTFVSS
K1
VSS
J36
VSS
J33
VSS
J32
VSS
J25
VSS
J22
VSS
J18
VSS
J10
VSS
J7
VSS
J4
VSS
H35
VSS
H32
VSS
H25
VSS
H22
VSS
H18
VSS
H12
VSS
H11
VSS
G28
VSS
G26
VSS
G24
VSS
G23
VSS
G22
VSS
G20
VSS
G18
VSS
G16
VSS
G14
VSS
G12
VSS
G10
VSS
G9
VSS
G8
VSS
G6
VSS
G5
VSS
G4
VSS
F36
VSS
F31
VSS
F29
VSS
F27
VSS
F25
VSS
F23
VSS
F21
VSS
F19
VSS
F17
VSS
F15
VSS
F13
VSS
F11
VSS
F9
VSS
F8
VSS
F5
VSS
F4
VSS
F3
VSS
F2
VSS
E38
VSS
E35
VSS
E34
VSS
E9
VSS
E4
VSS
D33
VSS
D30
VSS
D28
VSS
D26
VSS
D24
VSS
D22
VSS
D20
VSS
D18
VSS
D16
VSS
D14
VSS
D12
VSS
D10
VSS
D9
VSS
D6
VSS
D3
VSS
C37
VSS
C31
VSS
C29
VSS
C27
VSS
D38
?
BT32
BT26
BT24
BT21
BT18
BT14
BT12
BR36
BR34
BR29
BR26
BR24
BR21
BR18
BR14
BR12
BP34
BP33
BP29
BP26
BP24
BP21
BP18
BP14
BP12
BN34
BN31
BN30
BN29
BN24
BN21
BN20
BN19
BN18
BN14
BN12
BM38
BM35
BM28
BM27
BM26
BM23
BM21
BM13
BM12
BL29
BK29
BK15
BK14
BJ32
BJ31
BJ25
BJ22
BH14
BH12
BG38
BG13
BG12
BF33
BF12
BE29
BC34
BC12
BB12
C17
C13
C9
BT9
BT5
BR7
BP7
BN9
BN7
BN4
BN2
BM9
BM6
BM2
BH9
BH8
BH5
BH4
BH1
BE6
BD9
SKYLAKE_HALO
CPU1L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKL-H_BGA1440
REV = 1
@
BGA1440
?
12 OF 14
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
SKYLAKE_HALO
CPU1M
BA38
BA37
BA12
BA11
BA10
AY34
AY33
AY14
AY12
AW5
AW4
AW3
AW2
AW1
AV38
AV37
AU34
AU33
AU12
AU11
AU10
AT30
AT29
AR38
AR37
AR14
AR13
AP34
AP33
AP12
AP11
AP10
AN30
AN29
AN12
AM5
AM4
AM3
AM2
AM1
AL34
AL33
AL14
AL12
AL10
BB4
BB3
BB2
BB1
BA9
BA8
BA7
BA6
AU9
AU8
AU7
AU6
AT6
AR5
AR4
AR3
AR2
AR1
AP9
AP8
AN6
AN5
AL9
AL8
AL7
AL4
B9
@
BGA1440
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKL-H_BGA1440
REV = 1
?
13 OF 14
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
AK30
VSS
AK29
VSS
AK4
VSS
AJ38
VSS
AJ37
VSS
AJ6
VSS
AJ5
VSS
AJ4
VSS
AJ3
VSS
AJ2
VSS
AJ1
VSS
AH34
VSS
AH33
VSS
AH12
VSS
AH6
VSS
AG30
VSS
AG29
VSS
AG11
VSS
AG10
VSS
AG8
VSS
AG7
VSS
AG6
VSS
AF14
VSS
AF13
VSS
AF12
VSS
AF4
VSS
AF3
VSS
AF2
VSS
AF1
VSS
AE34
VSS
AE33
VSS
AE6
VSS
AD30
VSS
AD29
VSS
AD12
VSS
AD11
VSS
AD10
VSS
AD9
VSS
AD8
VSS
AD7
VSS
AD6
VSS
AC38
VSS
AC37
VSS
AC12
VSS
AC6
VSS
AC5
VSS
AC4
VSS
AC3
VSS
AC2
VSS
AC1
VSS
AB34
VSS
AB33
VSS
AB6
VSS
AA30
VSS
AA29
VSS
AA12
VSS
A30
VSS
A28
VSS
A26
VSS
A24
VSS
A22
VSS
A20
VSS
A18
VSS
A16
VSS
A14
VSS
A12
VSS
A10
VSS
A9
VSS
A6
VSS
B37
B3
A34
A4
A3
?
C25
VSS
C23
VSS
C21
VSS
C19
VSS
C15
VSS
C11
VSS
C8
VSS
C5
VSS
BM29
VSS
BM25
VSS
BM18
VSS
BM11
VSS
BM8
VSS
BM7
VSS
BM5
VSS
BM3
VSS
BL38
VSS
BL35
VSS
BL13
VSS
BL6
VSS
BK25
VSS
BK22
VSS
BK13
VSS
BK6
VSS
BJ30
VSS
BJ29
VSS
BJ15
VSS
BJ12
VSS
BH11
VSS
BH10
VSS
BH7
VSS
BH6
VSS
BH3
VSS
BH2
VSS
BG37
VSS
BG14
VSS
BG6
VSS
BF34
VSS
BF6
VSS
BE30
VSS
BE5
VSS
BE4
VSS
BE3
VSS
BE2
VSS
BE1
VSS
BD38
VSS
BD37
VSS
BD12
VSS
BD11
VSS
BD10
VSS
BD8
VSS
BD7
VSS
BD6
VSS
BC33
VSS
BC14
VSS
BC13
VSS
BC6
VSS
BB30
VSS
BB29
VSS
BB6
VSS
BB5
VSS
C2
BT36
BT35
BT4
BT3
BR38
?
AW30
AW29
AW12
AM38
AM37
AM12
A A
5
For DELL Confidential
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(7/7) VSS
PROCESSOR(7/7) VSS
PROCESSOR(7/7) VSS
1
13 78Wednesday, July 22, 2015
13 78Wednesday, July 22, 2015
13 78Wednesday, July 22, 2015
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
Layout Note:
Place near JDIMM1.257,259
+2.5V_MEM
D D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CD9
CD10
2
2
Layout Note:
Place near JDIMM1
1U_0402_6.3V
1U_0402_6.3V
CD3
CD4
1
1
2
2
Layout Note:
Place near JDIMM1.258
+0.6VS
10U_0603_6.3V6M~D
1U_0402_6.3V
CD12
CD13
1
1
2
2
+1.2V_DDR
1U_0402_6.3V
1U_0402_6.3V
CD1
CD2
1
1
2
2
C C
1U_0402_6.3V
1U_0402_6.3V
CD74
CD75
1
1
2
2
1U_0402_6.3V
1U_0402_6.3V
CD76
CD77
1
1
2
2
1U_0402_6.3V
1U_0402_6.3V
CD78
CD79
1
1
2
2
+1.2V_DDR
12
@
12
10U_0603_6.3V6M~D
1
CD70
2
RD2
0_0402_5%
RD29
0_0402_5%
+1.2V_DDR
1
2
12
RH206
1K_0402_1%~D
12
RH209
1K_0402_1%~D
10U_0603_6.3V6M~D
CD71
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CD73
CD72
2
2
12
RD3
@
0_0402_5%
12
RD30
0_0402_5%
+V_DDR_REFA
For DELL Confidential
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CD6
CD5
2
2
B B
+3VS +3VS +3VS
12
RD1
@
0_0402_5%
12
RD28
0_0402_5%
+V_DDR_REFA_R
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CD8
CD7
2
2
20mil
1 2
RH484 2_0402_1%
A A
1
CH101
0.022U_0402_25V7K
2
12
RH211
24.9_0402_1%
1
2
10U_0603_6.3V6M~D
CD14
10U_0603_6.3V6M~D
CD15
1
2
1
+
CD11
220U_D7_2VM_R6M
2
4
Layout Note:
Place near JDIMM1.255
DDR4_DRAMRST#DIMM_CHA_SA0 DIMM_CHA_SA1 DIMM_CHA_SA2
DDR_A_D[0..63]<8>
DDR_A_MA[0..13]<8>
DDR_A_DQS#[0..7]<8>
DDR_A_DQS[0..7]<8>
+3VS
2.2U_0603_6.3V6K~D
0.1U_0402_16V7K~D
CD17
CD16
1
1
2
2
+1.2V_DDR
1 2
@
RD31 0_0402_5%
12
RD35
470_0402_1%
+3VS
3
5.2H
+1.2V_DDR
DDR_A_D1
DDR_A_D5 DDR_A_D4
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D3
DDR_A_D7
DDR_A_D9
DDR_A_D8
DDR_A_D15
DDR_A_D10
DDR_A_D16
DDR_A_D17 DDR_A_D20
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D19
DDR_A_D18
DDR_A_D24
DDR_A_D29
DDR_A_D26 DDR_A_D30
DDR_A_D27
DDR_CKE0_DIMMA<8>
DDR_A_BG1<8>
DDR_A_BG0<8>
M_CLK_DDR0<8>
M_CLK_DDR#0<8>
DDR_A_PAR<8>
DDR_A_BS1<8>
DDR_CS0_DIMMA#<8>
DDR_A_WE#<8>
M_ODT0<8>
DDR_CS1_DIMMA#<8>
M_ODT1<8>
H_DRAMRST#<18>DDR4_DRAMRST#<15>
0.1U_0402_16V7K~D
CD69
1
2
DDR_CKE0_DIMMA
DDR_A_BG1
DDR_A_BG0
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA6
DDR_A_MA3
DDR_A_MA1
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_PAR
DDR_A_BS1
DDR_CS0_DIMMA#
DDR_A_WE#
M_ODT0
DDR_CS1_DIMMA#
M_ODT1
DDR_A_D33
DDR_A_D37
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D38
DDR_A_D39
DDR_A_D44
+1.2V_DDR
+1.2V_DDR
PCH_SMBCLK<15,18,36,38> PCH_SMBDATA<15,18,36,38>
DDR_A_D41
DDR_A_D43
DDR_A_D42 DDR_A_D46
DDR_A_D48 DDR_A_D50
DDR_A_D54
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D53
DDR_A_D55
DDR_A_D56
DDR_A_D60
DDR_A_D58
DDR_A_D62
JDIMM1
JP?
1
VSS1
3
DQ5
5
VSS3
7
DQ1
9
VSS5
DQS0_c11DM0_n/DBI0_n
13
DQS0_t
15
VSS8
17
DQ7
19
VSS10
21
DQ3
23
VSS12
25
DQ13
27
VSS14
29
DQ9
31
VSS16
33
DM1_n/DBI_n
35
VSS17
37
DQ15
39
VSS19
41
DQ10
43
VSS21
45
DQ21
47
VSS23
49
DQ17
51
VSS25
DQS2_c53DM2_n/DBI2_n
55
DQS2_t
57
VSS28
59
DQ23
61
VSS30
63
DQ19
65
VSS32
67
DQ29
69
VSS34
71
DQ25
73
VSS36
DM3_n/DBI3_n75DQS3_t
77
VSS37
79
DQ30
81
VSS39
83
DQ26
85
VSS41
87
CB5/NC
89
VSS43
91
CB1/NC
93
VSS45
DQS8_c95DM8_n/DBI_n/NC
97
DQS8_t
99
VSS48
101
CB2/NC
103
VSS50
105
CB3/NC
107
VSS52
109
CKE0
111
VDD1
113
BG1
115
BG0
117
VDD3
119
A12
121
A9
123
VDD5
125
A8
127
A6
129
VDD7
131
A3
133
A1
135
VDD9
137
CK0_t
139
CK0_c
141
VDD11
143
PARITY
145
BA1
147
VDD13
149
CS0_n
151
WE_n/A14
153
VDD15
155
ODT0
157
CS1_n
159
VDD17
161
ODT1
163
VDD19
165
C1, CS3_n,NC
167
VSS53
169
DQ37
171
VSS55
173
DQ33
175
VSS57
177
DQS4_c
179
DQS4_t
181
VSS60
183
DQ38
185
VSS62
187
DQ34
189
VSS64
191
DQ44
193
VSS66
195
DQ40
197
VSS68
199
DM5_n/DBI5_n
201
VSS69
203
DQ46
205
VSS71
207
DQ42
209
VSS73
211
DQ52
213
VSS75
215
DQ49
217
VSS77
219
DQS6_c
221
DQS6_t
223
VSS80
225
DQ55
227
VSS82
229
DQ51
231
VSS84
233
DQ61
235
VSS86
237
DQ56
239
VSS88
241
DM7_n/DBI7_n
243
VSS89
245
DQ62
247
VSS91
249
DQ58
251
VSS93
253
SCL
255
VDDSPD
257
VPP1
259
VPP2
261
GND1
BELLW_SD-80886-1021
VSS2
VSS4
VSS6
VSS7
VSS9
VSS11
DQ12
VSS13
VSS15
DQS1_c
DQS1_t
VSS18
DQ14
VSS20
DQ11
VSS22
DQ20
VSS24
DQ16
VSS26
VSS27
DQ22
VSS29
DQ18
VSS31
DQ28
VSS33
DQ24
VSS35
DQS3_c
VSS38
DQ31
VSS40
DQ27
VSS42
CB4/NC
VSS44
CB0/NC
VSS46
VSS47
CB6/NC
VSS49
CB7/NC
VSS51
RESET_n
CKE1
VDD2
ACT_n
ALERT_n
VDD4
VDD6
VDD8
EVENT_n/NF
VDD10
CK1_t/NF
CK1_c/NF
VDD12
A10/AP
VDD14
RAS_n/A16
VDD16
CAS_n/A15
VDD18
C0/CS2_n/NC
VREFCA
VSS54
DQ36
VSS56
DQ32
VSS58
DM4_n/DBI4_n
VSS59
DQ39
VSS61
DQ35
VSS63
DQ45
VSS65
DQ41
VSS67
DQS5_c
DQS5_t
VSS70
DQ47
VSS72
DQ43
VSS74
DQ53
VSS76
DQ48
VSS78
DM6_n/DBI6_n
VSS79
DQ54
VSS81
DQ50
VSS83
DQ60
VSS85
DQ57
VSS87
DQS7_c
DQS7_t
VSS90
DQ63
VSS92
DQ59
VSS94
GND2
CONN@
2
+1.2V_DDR
2
DDR_A_D0
4
DQ4
6
8
DQ0
10
12
14
DDR_A_D6
16
DQ6
18
DDR_A_D2
20
DQ2
22
DDR_A_D12
24
26
DDR_A_D13
28
DQ8
30
DDR_A_DQS#1
32
DDR_A_DQS1
34
36
DDR_A_D14
38
40
DDR_A_D11
42
44
DDR_A_D21
46
48
50
52
54
56
DDR_A_D23
58
60
DDR_A_D22
62
64
DDR_A_D28
66
68
DDR_A_D25
70
72
DDR_A_DQS#3
74
DDR_A_DQS3
76
78
80
82
DDR_A_D31
84
86
88
90
92
94
96
98
100
102
104
106
DDR4_DRAMRST#
108
DDR_CKE1_DIMMA
110
112
114
DDR_A_ALERT#
116
118
DDR_A_MA11
120
A11
BA0
A13
SA2
SDA
SA0
VTT
SA1
DDR_A_MA7
122
A7
124
DDR_A_MA5
126
A5
DDR_A_MA4
128
A4
130
DDR_A_MA2
132
A2
134
136
M_CLK_DDR1
138
M_CLK_DDR#1
140
142
DDR_A_MA0
144
DDR_A_MA10
A0
146
148
DDR_A_BS0
150
DDR_A_RAS#
152
154
DDR_A_CAS#
156
DDR_A_MA13
158
160
162
164
DIMM_CHA_SA2
166
168
DDR_A_D36
170
172
DDR_A_D32
174
176
178
180
DDR_A_D35
182
184
DDR_A_D34
186
188
DDR_A_D40
190
192
DDR_A_D45
194
196
DDR_A_DQS#5
198
DDR_A_DQS5
200
202
DDR_A_D47
204
206
208
210
212
214
DDR_A_D52
216
218
220
222
DDR_A_D51
224
226
DDR_A_D49
228
230
DDR_A_D61
232
234
DDR_A_D57
236
238
DDR_A_DQS#7
240
DDR_A_DQS7
242
244
DDR_A_D59
246
248
DDR_A_D63
250
252
PCH_SMBDATAPCH_SMBCLK
254
DIMM_CHA_SA0
256
258
DIMM_CHA_SA1
260
262
+1.2V_DDR
+1.2V_DDR
DDR_CKE1_DIMMA <8>
DDR_A_ACT#<8>
DDR_A_ALERT# <8>
M_CLK_DDR1<8>
M_CLK_DDR#1<8>
DDR_A_BS0<8>
DDR_A_RAS#<8>
DDR_A_CAS#<8>
+V_DDR_REFA
0.1U_0402_16V7K~D
1
2
CD18
+0.6VS+2.5V_MEM
1
All VREF traces should
have 10 mil trace width
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DDRIII DIMMA
DDRIII DIMMA
DDRIII DIMMA
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
LA-C912P
LA-C912P
LA-C912P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
14 78Wednesday, July 22, 2015
14 78Wednesday, July 22, 2015
14 78Wednesday, July 22, 2015
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
Layout Note:
Place near JDIMM2.258
+0.6VS
D D
1U_0402_6.3V
10U_0603_6.3V6M~D
CD32
1
1
CD90
2
2
Layout Note:
Place near JDIMM2
10U_0603_6.3V6M~D
1
1
CD89
2
2
Layout Note:
Place near JDIMM2.257,259
10U_0603_6.3V6M~D
CD88
+2.5V_MEM
1
2
1U_0402_6.3V
CD30
10U_0603_6.3V6M~D
1U_0402_6.3V
CD31
1
1
CD27
2
2
+1.2V_DDR
1U_0402_6.3V
C C
1U_0402_6.3V
CD20
CD19
1
1
2
2
1U_0402_6.3V
1U_0402_6.3V
CD22
CD21
1
1
2
2
1U_0402_6.3V
1U_0402_6.3V
CD81
CD83
1
1
2
2
1U_0402_6.3V
1U_0402_6.3V
CD82
CD80
1
1
2
2
+1.2V_DDR
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CD23
2
B B
DIMM_CHB_SA0 DIMM_CHB_SA1 DIMM_CHB_SA2
A A
10U_0603_6.3V6M~D
1
1
CD24
CD25
2
2
+3VS +3VS +3VS
12
RD4
@
0_0402_5%
12
RD38
0_0402_5%
+V_DDR_REFB_R
20mil
RH485 2_0402_1%
1
CH100
0.022U_0402_25V7K
2
12
RH212
24.9_0402_1%
5
10U_0603_6.3V6M~D
1
2
1 2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CD87
CD26
CD85
2
2
12
RD5
0_0402_5%
12
RD39
@
0_0402_5%
+1.2V_DDR
12
12
10U_0603_6.3V6M~D
1
2
RH207
1K_0402_1%~D
+V_DDR_REFB
RH210
1K_0402_1%~D
10U_0603_6.3V6M~D
1
CD86
CD84
2
12
RD6
@
0_0402_5%
12
RD40
0_0402_5%
For DELL Confidential
10U_0603_6.3V6M~D
1
CD28
2
1
+
CD33
220U_D7_2VM_R6M
2
4
DDR_B_D[0..63]<8>
DDR_B_MA[0..13]<8>
DDR_B_DQS#[0..7]<8>
DDR_B_DQS[0..7]<8>
Layout Note:
Place near JDIMM2.255
+3VS
0.1U_0402_16V7K~D
CD34
1
2
4
3
9.2H
+1.2V_DDR
DDR_B_D0
DDR_B_D4
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D3
DDR_B_D10
DDR_B_D14
DDR_B_D12
DDR_B_D13
DDR_B_D16 DDR_B_D22
DDR_B_D17 DDR_B_D18
DDR_B_DQS#2
DDR_B_DQS2
2.2U_0603_6.3V6K~D
CD35
1
2
DDR_CKE2_DIMMB<8>
DDR_B_BG1<8>
DDR_B_BG0<8>
M_CLK_DDR2<8>
M_CLK_DDR#2<8>
DDR_B_PAR<8>
DDR_B_BS1<8>
DDR_CS2_DIMMB#<8>
DDR_B_WE#<8>
M_ODT2<8>
DDR_CS3_DIMMB#<8>
M_ODT3<8>
+3VS
DDR_B_D19
DDR_B_D23
DDR_B_D25
DDR_B_D28
DDR_B_D31
DDR_CKE2_DIMMB
DDR_B_BG1
DDR_B_BG0
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA6
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_PAR
DDR_B_BS1
DDR_CS2_DIMMB#
DDR_B_WE#
M_ODT2
DDR_CS3_DIMMB#
M_ODT3
DDR_B_D38
DDR_B_D39
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D33
DDR_B_D32
DDR_B_D40
DDR_B_D41
+1.2V_DDR
DDR_B_D42
DDR_B_D43 DDR_B_D46
DDR_B_D52
DDR_B_D51 DDR_B_D48
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D55
DDR_B_D61
DDR_B_D62
+1.2V_DDR
DDR_B_D56
DDR_B_D60
PCH_SMBCLK<14,18,36,38> PCH_SMBDATA<14,18,36,38>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
JDIMM2
JP?
1
VSS1
3
DQ5
5
VSS3
7
DQ1
9
VSS5
DQS0_c11DM0_n/DBI0_n
13
DQS0_t
15
VSS8
17
DQ7
19
VSS10
21
DQ3
23
VSS12
25
DQ13
27
VSS14
29
DQ9
31
VSS16
33
DM1_n/DBI_n
35
VSS17
37
DQ15
39
VSS19
41
DQ10
43
VSS21
45
DQ21
47
VSS23
49
DQ17
51
VSS25
DQS2_c53DM2_n/DBI2_n
55
DQS2_t
57
VSS28
59
DQ23
61
VSS30
63
DQ19
65
VSS32
67
DQ29
69
VSS34
71
DQ25
73
VSS36
DM3_n/DBI3_n75DQS3_t
77
VSS37
79
DQ30
81
VSS39
83
DQ26
85
VSS41
87
CB5/NC
89
VSS43
91
CB1/NC
93
VSS45
DQS8_c95DM8_n/DBI_n/NC
97
DQS8_t
99
VSS48
101
CB2/NC
103
VSS50
105
CB3/NC
107
VSS52
109
CKE0
111
VDD1
113
BG1
115
BG0
117
VDD3
119
A12
121
A9
123
VDD5
125
A8
127
A6
129
VDD7
131
A3
133
A1
135
VDD9
137
CK0_t
139
CK0_c
141
VDD11
143
PARITY
145
BA1
147
VDD13
149
CS0_n
151
WE_n/A14
153
VDD15
155
ODT0
157
CS1_n
159
VDD17
161
ODT1
163
VDD19
165
C1, CS3_n,NC
167
VSS53
169
DQ37
171
VSS55
173
DQ33
175
VSS57
177
DQS4_c
179
DQS4_t
181
VSS60
183
DQ38
185
VSS62
187
DQ34
189
VSS64
191
DQ44
193
VSS66
195
DQ40
197
VSS68
199
DM5_n/DBI5_n
201
VSS69
203
DQ46
205
VSS71
207
DQ42
209
VSS73
211
DQ52
213
VSS75
215
DQ49
217
VSS77
219
DQS6_c
221
DQS6_t
223
VSS80
225
DQ55
227
VSS82
229
DQ51
231
VSS84
233
DQ61
235
VSS86
237
DQ56
239
VSS88
241
DM7_n/DBI7_n
243
VSS89
245
DQ62
247
VSS91
249
DQ58
251
VSS93
253
SCL
255
VDDSPD
257
VPP1
259
VPP2
261
GND1
BELLW_SD-80886-1021
CONN@
Compal Secret Data
Compal Secret Data
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
VSS11
VSS13
VSS15
DQS1_c
DQS1_t
VSS18
VSS20
VSS22
VSS24
VSS26
VSS27
VSS29
VSS31
VSS33
VSS35
DQS3_c
VSS38
VSS40
VSS42
CB4/NC
VSS44
CB0/NC
VSS46
VSS47
CB6/NC
VSS49
CB7/NC
VSS51
RESET_n
ACT_n
ALERT_n
EVENT_n/NF
VDD10
CK1_t/NF
CK1_c/NF
VDD12
A10/AP
VDD14
RAS_n/A16
VDD16
CAS_n/A15
VDD18
C0/CS2_n/NC
VREFCA
VSS54
VSS56
VSS58
DM4_n/DBI4_n
VSS59
VSS61
VSS63
VSS65
VSS67
DQS5_c
DQS5_t
VSS70
VSS72
VSS74
VSS76
VSS78
DM6_n/DBI6_n
VSS79
VSS81
VSS83
VSS85
VSS87
DQS7_c
DQS7_t
VSS90
VSS92
VSS94
2
2
VSS2
4
DQ4
6
VSS4
8
DQ0
10
VSS6
12
14
VSS7
16
DQ6
18
VSS9
20
DQ2
22
24
DQ12
26
28
DQ8
30
32
34
36
38
DQ14
40
42
DQ11
44
46
DQ20
48
50
DQ16
52
54
56
58
DQ22
60
62
DQ18
64
66
DQ28
68
70
DQ24
72
74
76
78
80
DQ31
82
84
DQ27
86
88
90
92
94
96
98
100
102
104
106
108
110
CKE1
112
VDD2
114
116
118
VDD4
120
A11
122
A7
124
VDD6
126
A5
128
A4
130
VDD8
132
A2
134
136
138
140
142
144
A0
146
148
150
BA0
152
154
156
158
A13
160
162
164
166
SA2
168
170
DQ36
172
174
DQ32
176
178
180
182
DQ39
184
186
DQ35
188
190
DQ45
192
194
DQ41
196
198
200
202
204
DQ47
206
208
DQ43
210
212
DQ53
214
216
DQ48
218
220
222
224
DQ54
226
228
DQ50
230
232
DQ60
234
236
DQ57
238
240
242
244
246
DQ63
248
250
DQ59
252
254
SDA
256
SA0
258
VTT
260
SA1
262
GND2
Deciphered Date
Deciphered Date
Deciphered Date
2
+1.2V_DDR
DIMM_CHB_SA2
PCH_SMBDATAPCH_SMBCLK
DIMM_CHB_SA0
DIMM_CHB_SA1
DDR_B_D5
DDR_B_D1
DDR_B_D2
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D15
DDR_B_D11
DDR_B_D21
DDR_B_D20
DDR_B_D27
DDR_B_D30
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D29DDR_B_D26
DDR_B_D24
DDR4_DRAMRST#
DDR_CKE3_DIMMB
DDR_B_ALERT#
DDR_B_MA11
DDR_B_MA7
DDR_B_MA5
DDR_B_MA4
DDR_B_MA2
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_MA0
DDR_B_MA10
DDR_B_BS0
DDR_B_RAS#
DDR_B_CAS#
DDR_B_MA13
DDR_B_D35
DDR_B_D34
DDR_B_D36
DDR_B_D37
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D47
DDR_B_D54
DDR_B_D53
DDR_B_D49
DDR_B_D59
DDR_B_D57
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D63
DDR_B_D58
+1.2V_DDR
+1.2V_DDR
1
DDR4_DRAMRST# <14>
DDR_CKE3_DIMMB <8>
DDR_B_ACT#<8>
DDR_B_ALERT#<8>
All VREF traces should
M_CLK_DDR3<8>
M_CLK_DDR#3<8>
DDR_B_BS0<8>
DDR_B_RAS#<8>
DDR_B_CAS#<8>
+V_DDR_REFB
0.1U_0402_16V7K~D
CD29
1
2
+0.6VS+2.5V_MEM
Title
Title
Title
DDRIII DIMMB
DDRIII DIMMB
DDRIII DIMMB
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
LA-C912P
LA-C912P
LA-C912P
Date: Sheet of
Date: Sheet of
Date: Sheet of
have 10 mil trace width
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1
0.1
0.1
15 78Wednesday, July 22, 2015
15 78Wednesday, July 22, 2015
15 78Wednesday, July 22, 2015
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
4
3
2
1
CLINK
REV = 1.3
SKY-S-PCH_BGA837
FAN
3 OF 12REV = 1.3
SKY-S-PCH_BGA837
PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_RXP
PCIE9_TXN/SATA0A_TXN
PCIE9_TXP/SATA0A_TXP
PCIE10_RXN/SATA1A_RXN
PCIE10_RXP/SATA1A_RXP
PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_TXP
PCIE15_RXN/SATA2_RXN
PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN
PCIE15_TXP/SATA2_TXP
PCIe/SATA
PCIE16_RXN/SATA3_RXN
PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN
PCIE17_TXP/SATA4_TXP
PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN
PCIE18_TXP/SATA5_TXP
GPP_E8/SATALED#
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP3
GPP_F1/SATAXPCIE4/SATAGP4
GPP_F2/SATAXPCIE5/SATAGP5
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7
GPP_F21/EDP_BKLTCTL
GPP_F20/EDP_BKLTEN
GPP_F19/EDP_VDDEN
HOST
GPP_I7/DDPC_CTRLCLK
GPP_I8/DDPC_CTRLDATA
GPP_I5/DDPB_CTRLCLK
GPP_I6/DDPB_CTRLDATA
GPP_I9/DDPD_CTRLCLK
GPP_I10/DDPD_CTRLDATA
GPP_F14
GPP_F23
GPP_F22
GPP_G23
GPP_G22
GPP_G21
GPP_G20
GPP_H23
5 OF 12
THERMTRIP#
PECI
PM_SYNC
PLTRST_CPU#
PM_DOWN
BB3
BD6
BA5
BC4
BE5
BE6
Y44
V44
W39
L43
L44
U35
R35
BD36
PCIE_PRX_DTX_N9
G31
PCIE_PRX_DTX_P9
H31
PCIE_PTX_DRX_N9
C31
PCIE_PTX_DRX_P9
B31
PCIE_PRX_DTX_N10
G29
PCIE_PRX_DTX_P10
E29
PCIE_PTX_DRX_N10
C32
PCIE_PTX_DRX_P10
B32
PCIE_PRX_DTX_N15
F41
PCIE_PRX_DTX_P15
E41
PCIE_PTX_DRX_N15
B39
PCIE_PTX_DRX_P15
A39
PCIE_PRX_DTX_N16
D43
PCIE_PRX_DTX_P16
E42
PCIE_PTX_DRX_N16
A41
PCIE_PTX_DRX_P16
A40
H42
H40
E45
F45
K37
G37
G45
G44
PCH_SATALED#
AD44
M2_SLOT1_PEDET
AG36
HDD_DET#
AG35
M2_SLOT2_PEDET
AG39
AD35
AD31
AD38
AC43
AB44
PCH_INV_PWM
W36
PANEL_BKLEN
W35
PCH_ENVDD
W42
H_THERMTRIP# H_THERMTRIP#_R
AJ3
PCH_PECI H_PECI
AL3
H_PM_SYNC_R
AJ4
PLTRST_CPU#
AK2
H_PM_DOWN
AH2
PCIE_PRX_DTX_N9<29>
PCIE_PRX_DTX_P9<29>
PCIE_PTX_DRX_N9<29>
PCIE_PTX_DRX_P9<29>
PCIE_PRX_DTX_N10<29>
PCIE_PRX_DTX_P10<29>
PCIE_PTX_DRX_N10<29>
PCIE_PTX_DRX_P10<29>
PCIE_PRX_DTX_N15<29>
PCIE_PRX_DTX_P15<29>
PCIE_PTX_DRX_N15<29>
PCIE_PTX_DRX_P15<29>
PCIE_PRX_DTX_N16<29>
PCIE_PRX_DTX_P16<29>
PCIE_PTX_DRX_N16<29>
PCIE_PTX_DRX_P16<29>
PCH_SATALED#<29,38>
M2_SLOT1_PEDET<29>
HDD_DET#<36>
M2_SLOT2_PEDET<29>
PCH_INV_PWM <25>
PANEL_BKLEN<43>
PCH_ENVDD <25>
1 2
RH79 620_0402_5%
1 2
RH73 12.1_0402_1%
M.2 SSD
Slot#1
M.2 SSD
Slot#2
Default
SATAGP0
SATAGP1
SATAGP2
M2_SLOT1_PEDET
11HDD_DET#
M2_SLOT2_PEDET
1 0=SATA1=PCIE
H_THERMTRIP#_R <9>
H_PECI<9,43>
H_PM_SYNC_R <9>
PLTRST_CPU#<9>
H_PM_DOWN<9>
RH73 change to 12.1 ohm to fix can't read thermal issue.
DDI2_DDPC_CTRLCLK
DDI2_DDPC_CTRLDAT
DDI1_DDPB_CTRLCLK
DDI1_DDPB_CTRLDAT
T2 PAD~D @
T4 PAD~D @
T8 PAD~D @
DDI2_DDPC_CTRLCLK <58>
DDI2_DDPC_CTRLDAT <58>
DDI1_DDPB_CTRLCLK <58>
DDI1_DDPB_CTRLDAT <58>
PROC_DETECT#<9>
TBT
DDI2_DDPC_CTRLCLK
DDI2_DDPC_CTRLDAT
DDI1_DDPB_CTRLCLK
DDI1_DDPB_CTRLDAT
0=SATA
0=SATA1=PCIE
PCH_SATALED#
HDD_DET#
1=NoHDD
RH512 10K_0402_5%
RH513 10K_0402_5%
RP1
1 8
2 7
3 6
4 5
2.2K_8P4R_5%
1 2
1 2
+3VS
+3VS
UH1C
AV2
CL_CLK
AV3
CL_DATA
AW2
CL_RST#
R44
GPP_G8/FAN_PWM_0
R43
GPP_G9/FAN_PWM_1
U39
GPP_G10/FAN_PWM_2
N42
GPP_G11/FAN_PWM_3
DDI1_PCH_HPD
DDI2_PCH_HPD
12
@
RH585 0_0402_5%
EDP_HPD
U43
GPP_G0/FAN_TACH_0
U42
GPP_G1/FAN_TACH_1
U41
GPP_G2/FAN_TACH_2
M44
GPP_G3/FAN_TACH_3
U36
GPP_G4/FAN_TACH_4
P44
GPP_G5/FAN_TACH_5
T45
GPP_G6/FAN_TACH_6
T44
GPP_G7/FAN_TACH_7
B33
PCIE11_TXP
C33
PCIE11_TXN
K31
PCIE11_RXP
L31
PCIE11_RXN
AB33
GPP_F10/SCLOCK
AB35
GPP_F11/SLOAD
AA44
GPP_F13/SDATAOUT0
AA45
GPP_F12/SDATAOUT1
B38
PCIE14_TXN/SATA1B_TXN
C38
PCIE14_TXP/SATA1B_TXP
D39
PCIE14_RXN/SATA1B_RXN
E37
PCIE14_RXP/SATA1B_RXP
C36
PCIE13_TXN/SATA0B_TXN
B36
PCIE13_TXP/SATA0B_TXP
G35
PCIE13_RXN/SATA0B_RXN
E35
PCIE13_RXP/SATA0B_RXP
A35
PCIE12_TXP
B35
PCIE12_TXN
H33
PCIE12_RXP
G33
PCIE12_RXN
J45
PCIE20_TXP
K44
PCIE20_TXN
N38
PCIE20_RXP
N39
PCIE20_RXN
H44
PCIE19_TXP
H43
PCIE19_TXN
L39
PCIE19_RXP
L37
PCIE19_RXN
SKY-H-PCH_BGA837
@
AW4
AY2
AV4
BA4
BD7
@
UH1E
GPP_I0/DDPB_HPD0
GPP_I1/DDPC_HPD1
GPP_I2/DDPD_HPD2
GPP_I3/DDPE_HPD3
GPP_I4/EDP_HPD
SKY-H-PCH_BGA837
D D
DDI1_PCH_HPD<58>
DDI2_PCH_HPD<58>
PCH_HDMI_HPD<17,27>
PCIE_PTX_DRX_P11
PCIE_PTX_DRX_N11
PCIE_PRX_DTX_P11
PCIE_PRX_DTX_N11
PCIE_PTX_DRX_P12
PCIE_PTX_DRX_N12
PCIE_PRX_DTX_P12
PCIE_PRX_DTX_N12
M.2 SSD
Slot#1
SATA HDD
M.2 SSD
Slot#1
C C
+5VS
2
G
1 3
D
S
@
QH2
L2N7002WT1G 1N SC-70-3
CPU_EDP_HPD<25>
CPU_EDP_HPD EDP_HPD
SKL eDP_HPD pull down 100K
B B
RH3
@
0_0402_5%
12
RH9
100K_0402_5%
PCIE_PTX_DRX_P11<29>
PCIE_PTX_DRX_N11<29>
PCIE_PRX_DTX_P11<29>
PCIE_PRX_DTX_N11<29>
SATA_PTX_DRX_N1<36>
SATA_PTX_DRX_P1<36>
SATA_PRX_DTX_N1<36>
SATA_PRX_DTX_P1<36>
PCIE_PTX_DRX_P12<29>
PCIE_PTX_DRX_N12<29>
PCIE_PRX_DTX_P12<29>
PCIE_PRX_DTX_N12<29>
12
PCH Strap PIN
For DELL Confidential
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
SSD
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (1/7) SATA,HDA
PCH (1/7) SATA,HDA
PCH (1/7) SATA,HDA
LA-C912P
LA-C912P
LA-C912P
1
16 78Wednesday, July 22, 2015
16 78Wednesday, July 22, 2015
16 78Wednesday, July 22, 2015
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
4
3
2
1
1
2
CH47
+3VS
UH3
5
TC7SH08FU_SSOP5
P
B
Y
A
G
3
RTC CRYSTAL
1 2
RH70 10M_0402_5%
YH1
32.768KHZ_X1A000141000300
1 2
Max Crystal ESR
= 50k Ohm.
1
CH45
8.2P_0402_50V
2
1 2
RH72 1M_0402_5%~D
YH2
123
4
24MHZ_12PF_X3G024000DC1H
1
2
4
12
CH48
15P_0402_50V
PLT_RST#<28,29,30,31,43,58>
RH199
100K_0402_5%
EC_SMI#
PCH_RTCX1
PCH_RTCX2
1
CH46
8.2P_0402_50V
2
XTAL24_IN
XTAL24_OUT
1
2
+3VS
12
RH11010K_0402_5%
UH1G
AR17
GPP_A16/CLKOUT_48
XTAL24_OUT
XTAL24_IN
XCLK_BIASREF
PCH_RTCX1
PCH_RTCX2
T17PAD~D@
PCH_SPI_SI_R
PCH_SPI_SO_R
PCH_SPI_CS#
PCH_SPI_CLK_R
PCH_SPI_CS1#
PCH_SPI_WP#_R
PCH_SPI_HOLD#_R
G1
CLKOUT_CPUNSSC_P
F1
CLKOUT_CPUNSSC
G2
CLKOUT_CPUBCLK_P
H2
CLKOUT_CPUBCLK
A5
XTAL24_OUT
A6
XTAL24_IN
E1
XCLK_BIASREF
BC9
RTCX1
BD10
RTCX2
BC24
GPP_B5/SRCCLKREQ0#
AW24
GPP_B6/SRCCLKREQ1#
AT24
GPP_B7/SRCCLKREQ2#
BD25
GPP_B8/SRCCLKREQ3#
BB24
GPP_B9/SRCCLKREQ4#
BE25
GPP_B10/SRCCLKREQ5#
AT33
GPP_H0/SRCCLKREQ6#
AR31
GPP_H1/SRCCLKREQ7#
BD32
GPP_H2/SRCCLKREQ8#
BC32
GPP_H3/SRCCLKREQ9#
BB31
GPP_H4/SRCCLKREQ10#
BC33
GPP_H5/SRCCLKREQ11#
BA33
GPP_H6/SRCCLKREQ12#
AW33
GPP_H7/SRCCLKREQ13#
BB33
GPP_H8/SRCCLKREQ14#
BD33
GPP_H9/SRCCLKREQ15#
R13
CLKOUT_PCIE_N15
R11
CLKOUT_PCIE_P15
P1
CLKOUT_PCIE_N14
R2
CLKOUT_PCIE_P14
W7
CLKOUT_PCIE_N13
Y5
CLKOUT_PCIE_P13
U2
CLKOUT_PCIE_N12
U3
CLKOUT_PCIE_P12
SKY-H-PCH_BGA837
@
BD17
GPP_A11/PME#
AG15
RSVD_AG15
AG14
RSVD_AG14
AF17
RSVD_AF17
AE17
RSVD_AE17
AR19
TP5
AN17
TP4
BB29
SPI0_MOSI
BE30
SPI0_MISO
BD31
SPI0_CS0#
BC31
SPI0_CLK
AW31
SPI0_CS1#
BC29
SPI0_IO2
BD30
SPI0_IO3
AT31
SPI0_CS2#
AN36
GPP_D1/SPI1_CLK
AL39
GPP_D0/SPI1_CS#
AN41
GPP_D3/SPI1_MOSI
AN38
GPP_D2/SPI1_MISO
AH43
GPP_D22/SPI1_IO3
AG44
GPP_D21/SPI1_IO2
@
UH1A
SKY-H-PCH_BGA837
CPU_24MHZ_P<9>
CPU_24MHZ_N<9>
PCH_CPU_BCLK_P<9>
D D
+3VS
RP3
4 5
3 6
2 7
1 8
10K_0804_8P4R_5%
+3VS
4 5
3 6
2 7
1 8
10K_0804_8P4R_5%
C C
9/5 MOW
Option 1: Implement a 1 kOhm pull-down resistor on the signal and de-populate the
required 1 kOhm pull-up resistor. In this case, customers must ensure that the SPI
B B
flash device on the platform has HOLD functionality disabled by default.
Note that the pull down resistor on SPI0_IO3 is only needed for SKL U/Y platforms
with ES and SKL S/H platforms with pre-ES1/ES1 samples.
CLKREQ#_GPU
CLKREQ_PCIE#1
CLKREQ_PCIE#2
CLKREQ_PCIE#4
RP5
CLKREQ#_DGPU
CLKREQ_PCIE#5
CLKREQ_PCIE#6
+3V_PCH
1 2
RH74 3.3K_0402_5%@
1 2
RH75 1K_0402_5%
1 2
RH78 1K_0402_5%
1 2
RH455 1K_0402_5%@
PCH_SPI_HOLD#_R
PCH_SPI_HOLD#_R
PEG
NGFF1
NGFF2
TBT
LAN
WLAN
Card Reader
Caldera
PCIE Diff CLK Req
TBT 1~4 3
LAN 5 4
WLAN 6 5
CR 7 6
NGFF1 9~12 1
NGFF2 15~16 2
PCH_SPI_CS#
PCH_SPI_WP#_R
+1V_PCH
CLKREQ#_GPU<46>
CLKREQ_PCIE#1<29>
CLKREQ_PCIE#2<29>
CLKREQ_PCIE#3<58>
CLKREQ_PCIE#4<30>
CLKREQ_PCIE#5<28>
CLKREQ_PCIE#6<31>
CLKREQ#_DGPU<41,43>
FFS_INT1<36>
PCH_HDMI_HPD<16,27>
FFS_INT2<36>
PCH_CPU_BCLK_N<9>
RH71 2.7K_0402_1%1 2
T18PAD~D @
1 2
RH583 0_0402_5%@
1 2
RH584 10K_0402_5%
+3VS
NV PULL High, AMD PULL Low.
SKY-S-PCH_BGA837
7 OF 12REV = 1.3
SKY-S-PCH_BGA837
1 OF 12 REV = 1.3
CLKOUT_ITPXDP
CLKOUT_ITPXDP_P
CLKOUT_CPUPCIBCLK
CLKOUT_CPUPCIBCLK_P
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
CLKOUT_PCIE_N6
CLKOUT_PCIE_P6
CLKOUT_PCIE_N7
CLKOUT_PCIE_P7
CLKOUT_PCIE_N8
CLKOUT_PCIE_P8
CLKOUT_PCIE_N9
CLKOUT_PCIE_P9
CLKOUT_PCIE_N10
CLKOUT_PCIE_P10
CLKOUT_PCIE_N11
CLKOUT_PCIE_P11
GPP_B13/PLTRST#
GPP_G16/GSXCLK
GPP_G12/GSXDOUT
GPP_G13/GSXSLOAD
GPP_G14/GSXDIN
GPP_G15/GSXSRESET#
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
GPP_H13/SML3CLK
GPP_H12/SML2ALERT#
GPP_H11/SML2DATA
GPP_H10/SML2CLK
INTRUDER#
PCH_XDP_CLK_N
L1
PCH_XDP_CLK_P
L2
J1
J2
N7
N8
L7
L5
D3
F2
E5
G4
D5
E6
D8
D7
R8
R7
U5
U7
W10
W11
N3
N2
P3
P2
R3
R4
BB27
P43
R39
R36
R42
R41
AF41
AE44
BC23
BD24
BC36
BE34
BD39
BB36
BA35
BC35
BD35
AW35
BD34
BE11
PCH_CPU_PCIBCLK_N <9>
PCH_CPU_PCIBCLK_P <9>
CLK_PEG_GPU#
CLK_PEG_GPU
CLK_PCIE_N1
CLK_PCIE_P1
CLK_PCIE_N2
CLK_PCIE_P2
CLK_PCIE_N3
CLK_PCIE_P3
CLK_PCIE_N4
CLK_PCIE_P4
CLK_PCIE_N5
CLK_PCIE_P5
CLK_PCIE_N6
CLK_PCIE_P6
CLK_PCIE_N7
CLK_PCIE_P7
PCH_PLTRST#
EC_SMI#
INTRUDER#
T19 PAD~D @
T21 PAD~D @
CLK_PEG_GPU# <46>
CLK_PEG_GPU<46>
CLK_PCIE_N1 <29>
CLK_PCIE_P1<29>
CLK_PCIE_N2 <29>
CLK_PCIE_P2<29>
CLK_PCIE_N3 <58>
CLK_PCIE_P3<58>
CLK_PCIE_N4 <30>
CLK_PCIE_P4<30>
CLK_PCIE_N5 <28>
CLK_PCIE_P5<28>
CLK_PCIE_N6 <31>
CLK_PCIE_P6<31>
CLK_PCIE_N7 <41>
CLK_PCIE_P7<41>
PCH_PLTRST#<41,46>
TBT_FORCE_PWR<58>
EC_SMI#<43>
PEG
NGFF1
NGFF2
TBT
LAN
WLAN
Card Reader
Caldera
15P_0402_50V
PCH_PLTRST#
+RTC_CELL
15_0804_8P4R_5%
PCH_SPI_HOLD#
PCH_SPI_SO
PCH_SPI_SI
PCH_SPI_WP#
RH104 15_0402_1%EMI@
A A
5
PCH_SPI_HOLD#_R
4 5
PCH_SPI_SO_R
3 6
PCH_SPI_SI_R
2 7
PCH_SPI_WP#_R
1 8
RPH5
PCH_SPI_CLK_RPCH_SPI_CLK
1 2
SPI ROM FOR ME ( 16MByte )
PN: SA00005VV10
PCH_SPI_SI_R <6>
For DELL Confidential
PCH_SPI_CS#
PCH_SPI_SO
PCH_SPI_WP#
UH4
1
/CS
2
DO(IO1)
3
/WP(IO2)
GND4DI(IO0)
W25Q128FVSIQ_SO8
/HOLD(IO3)
INTRUDER#
+3V_PCH
1
CH49
0.1U_0402_16V7K~D
2
8
VCC
PCH_SPI_HOLD#
7
PCH_SPI_CLK
6
CLK
PCH_SPI_SI
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (2/7) SMBUS, CLK, SPI, LPC
PCH (2/7) SMBUS, CLK, SPI, LPC
PCH (2/7) SMBUS, CLK, SPI, LPC
LA-C912P
LA-C912P
LA-C912P
1
1 2
17 78Wednesday, July 22, 2015
17 78Wednesday, July 22, 2015
17 78Wednesday, July 22, 2015
RH531
1M_0402_5%
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
4
3
2
1
HDA for Codec and MDC
PCH_AZ_CODEC_SDOUT<32>
PCH_AZ_CODEC_SYNC<32>
PCH_AZ_CODEC_RST#<32>
PCH_AZ_CODEC_BITCLK<32>
D D
+RTC_CELL
1 2
RH83 20K_0402_5%~D
1U_0402_10V
+RTC_CELL
1 2
RH84 20K_0402_5%~D
1U_0402_10V
C C
+3V_PCH
1/14 Pull High value checking....
1 2
RH460 1K_0402_5%
1 2
RH461 1K_0402_5%
1 2
RH501 499_0402_1%
1 2
RH502 499_0402_1%
+3VS
1 2
RH463 1K_0402_5%
1 2
RH462 1K_0402_5%
Follow PDG 10k pull down.
1 2
RH88 10K_0402_5%
1 2
B B
RH90 100K_0402_5%
CH53
CH52
RP2
1 8
2 7
3 6
4 5
1 2
RH29 33_0402_5%
27P_0402_50V8J~D
@
CH6
1
2
PCH_SRTCRST#
1
2
PCH_RTCRST#
1
12
CLRP1
SHORT PADS
2
PCH_AZ_SDOUT
PCH_AZ_SYNC_Q
PCH_AZ_RST#
33_0804_8P4R_5%
PCH_AZ_BITCLK
SML1CLK
SML1DATA
SML0CLK
SML0DATA
PCH_SMBCLK
PCH_SMBDATA
PCH_RSMRST#_R
PCH_DPWROK_R
AUD_AZACPU_SDO<7>
AUD_AZACPU_SDI_R<7>
AUD_AZACPU_SCLK<7>
HDA_SYNC Isolation Circuit
PCH_AZ_CODEC_SDIN0<32>
ME_EN<43>
AUD_AZACPU_SDI_R
PCH_PWROK<43,71>
PCH_RSMRST#<43>
PCH_DPWROK<43>
PCH to DDR, XDP, FFS
+5VS
G
2
13
D
S
1M_0402_5%
QH1
RH20
L2N7002WT1G 1N SC-70-3
1 2
RH16 1K_0402_1%
RH39 30_0402_5%
RH38 30_0402_5%
RH133 0_0402_5%@
RH309 0_0402_5%
1 2
1 2
1 2
1 2
1 2
@
PCH_SMBCLK<14,15,36,38>
PCH_SMBDATA<14,15,36,38>
PCH_AZ_BITCLK
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_PWROK
SML0CLK<41>
SML0DATA<41>
SML1CLK
SML1DATA
PCH_AZ_SYNCPCH_AZ_SYNC_Q
PCH_AZ_SDOUT
PCH_AZ_SYNC
AUD_AZACPU_SDO_RAUD_AZACPU_SDO
AUD_AZACPU_SCLK_RAUD_AZACPU_SCLK
PCH_RTCRST#
PCH_SRTCRST#
PCH_RSMRST#_R
PCH_DPWROK_R
SMBALERT#
PCH_SMBCLK
PCH_SMBDATA
SML0ALERT#
SML0CLK
SML0DATA
SML1ALERT#
SML1CLK
SML1DATA
354
DMN66D0LDW-7_SOT363-6
T120PAD~D@
T121PAD~D@
T122PAD~D@
T123PAD~D@
T124PAD~D@
T127PAD~D@
+3VS
6 1
DMN66D0LDW-7_SOT363-6
QH3B
UH1D
BA9
HDA_BCLK
BD8
HDA_RST#
BE7
HDA_SDI0
BC8
HDA_SDI1
BB7
HDA_SDO
BD9
HDA_SYNC
BD1
RSVD_BD1
BE2
RSVD_BE2
AM1
DISPA_SDO
AN2
DISPA_SDI
AM2
DISPA_BCLK
AL42
GPP_D8/SSP0_SCLK
AN42
GPP_D7/SSP0_RXD
AM43
GPP_D6/SSP0_TXD
AJ33
GPP_D5/SSP0_SFRM
AH44
GPP_D20/DMIC_DATA0
AJ35
GPP_D19/DMIC_CLK0
AJ38
GPP_D18/DMIC_DATA1
AJ42
GPP_D17/DMIC_CLK1
BC10
RTCRST#
BB10
SRTCRST#
AW11
PCH_PWROK
BA11
RSMRST#
AV11
DSW_PWROK
BB41
GPP_C2/SMBALERT#
AW44
GPP_C0/SMBCLK
BB43
GPP_C1/SMBDATA
BA40
GPP_C5/SML0ALERT#
AY44
GPP_C3/SML0CLK
BB39
GPP_C4/SML0DATA
AT27
GPP_B23/SML1ALERT#/PCHHOT#
AW42
GPP_C6/SML1CLK
AW45
GPP_C7/SML1DATA
SKY-H-PCH_BGA837
@
2
QH5A
SKY-S-PCH_BGA837
GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
AUDIO
SMBUS
EC_SMB_CK2<41,42,43,46,60>
EC_SMB_DA2<41,42,43,46,60>
GPP_G17/ADR_COMPLETE
GPP_A13/SUSWARN#/SUSPWRDNACK
JTAG
4 OF 12REV = 1.3
GPP_A8/CLKRUN#
GPD11/LANPHYPC
GPD9/SLP_WLAN#
DRAM_RESET#
GPP_B2/VRALERT#
GPP_B1
GPP_B0
GPP_B11
SYS_PWROK
WAKE#
GPD6/SLP_A#
SLP_LAN#
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
GPD8/SUSCLK
GPD0/BATLOW#
GPP_A15/SUSACK#
GPD2/LAN_WAKE#
GPD1/ACPRESENT
SLP_SUS#
GPD3/PWRBTN#
SYS_RESET#
GPP_B14/SPKR
PROCPWRGD
ITP_PMODE
JTAGX
JTAG_TMS
JTAG_TDO
JTAG_TDI
JTAG_TCK
BB17
AW22
AR15
AV13
BC14
BD23
AL27
AR27
N44
AN24
AY1
BC13
BC15
AV15
BC26
AW15
BD15
BA13
AN15
BD13
BB19
BD19
BD11
BB15
BB13
AT13
AW1
BD26
AM3
AT2
AR3
AR2
AP1
AP2
AN3
CLKRUN#
SYS_PWROK
RH4
WAKE#
0_0402_5%
PM_SLP_S0#
PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#
PCH_BATLOW#
ME_SUS_PWR_ACK
WAKE_PCH#
AC_PRESENT
PM_SLP_SUS#
PBTN_OUT#
SYS_RESET#
HDA_SPKR
H_CPUPWRGD
PCH_ITP_PMODE
XDP_TCK
XDP_TMS
XDP_TDO
XDP_TDI
PCH_JTAG_TCK
PCIE_WAKE#
12
@
ME_SUS_PWR_ACK<43>
H_CPUPWRGD <9>
H_DRAMRST#<14>
SYS_PWROK<43>
PCIE_WAKE#<29,30,43>
T20 PAD~D @
PM_SLP_S0#<43>
PM_SLP_S3#<37,43,45>
PM_SLP_S4#<43,45,65>
PM_SLP_S5#<37,43>
SUSCLK<28,29>
PCH_BATLOW#<58>
SUSACK#<43>
WAKE_PCH#<43>
PM_SLP_SUS#<43>
PBTN_OUT#<6,43>
SYS_RESET#<6>
HDA_SPKR<32>
PCH_ITP_PMODE <6>
XDP_TCK<6,9>
XDP_TMS<6,9>
XDP_TDO<6,9>
XDP_TDI<6,9>
PCH_JTAG_TCK <6>
WAKE#
PCH_BATLOW#
AC_PRESENT
WAKE_PCH#
ME_SUS_PWR_ACK
SYS_RESET#
CLKRUN#
12
DH1
SDMK0340L-7-F_SOD323-2
Connect CPU & PCH
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
RH82 4.7K_0402_5%@
ACIN<37,43,46,61,62>
RH505 1K_0402_5%@
RH503 1K_0402_5%@
RH504 10K_0402_5%@
1 2
1 2
RH453 10K_0402_5%
1 2
RH515 8.2K_0402_5%
1 2
RH533 8.2K_0402_5%
1 2
RH545 10K_0402_5%
1 2
RH506 1M_0402_5%@
1 2
RH571 8.2K_0402_5%@
1 2
RH85 8.2K_0402_5%
1 2
High = VPRO
Low = Non-VPRO
1 2
High = eSPI
Low = LPC
1 2
+3V_PCH_DSW
+3V_PCH
+3VS
HDA_SPKR
SMBALERT#
SML0ALERT#
SML1ALERT#
For DELL Confidential
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (3/7) DMI,FDI,PM,GFX,DP
PCH (3/7) DMI,FDI,PM,GFX,DP
PCH (3/7) DMI,FDI,PM,GFX,DP
LA-C912P
LA-C912P
LA-C912P
1
18 78Wednesday, July 22, 2015
18 78Wednesday, July 22, 2015
18 78Wednesday, July 22, 2015
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
4
3
2
1
DMI_CTX_PRX_N0<7>
DMI_CTX_PRX_P0<7>
D D
PCIe1~4:TBT
C C
PCIe5:LAN
PCIe6:WLAN
PCIe7:CR
B B
Right Side JUSB1
Caldera
Left Side JUSB3
Left Side JUSB4
DMI_CRX_PTX_N0<7>
DMI_CRX_PTX_P0<7>
DMI_CTX_PRX_N1<7>
DMI_CTX_PRX_P1<7>
DMI_CRX_PTX_N1<7>
DMI_CRX_PTX_P1<7>
DMI_CTX_PRX_N2<7>
DMI_CTX_PRX_P2<7>
DMI_CRX_PTX_N2<7>
DMI_CRX_PTX_P2<7>
DMI_CTX_PRX_N3<7>
DMI_CTX_PRX_P3<7>
DMI_CRX_PTX_N3<7>
DMI_CRX_PTX_P3<7>
1 2
RH193 100_0402_1%
PCIE_PRX_DTX_N1<58>
PCIE_PRX_DTX_P1<58>
PCIE_PTX_DRX_N1<58>
PCIE_PTX_DRX_P1<58>
PCIE_PTX_DRX_N2<58>
PCIE_PTX_DRX_P2<58>
PCIE_PRX_DTX_N2<58>
PCIE_PRX_DTX_P2<58>
PCIE_PRX_DTX_N3<58>
PCIE_PRX_DTX_P3<58>
PCIE_PTX_DRX_N3<58>
PCIE_PTX_DRX_P3<58>
PCIE_PRX_DTX_N4<58>
PCIE_PRX_DTX_P4<58>
PCIE_PTX_DRX_N4<58>
PCIE_PTX_DRX_P4<58>
PCIE_PRX_DTX_N5<30>
PCIE_PRX_DTX_P5<30>
PCIE_PTX_DRX_N5<30>
PCIE_PTX_DRX_P5<30>
PCIE_PRX_DTX_N6<28>
PCIE_PRX_DTX_P6<28>
PCIE_PTX_DRX_N6<28>
PCIE_PTX_DRX_P6<28>
PCIE_PRX_DTX_N7<31>
PCIE_PRX_DTX_P7<31>
PCIE_PTX_DRX_N7<31>
PCIE_PTX_DRX_P7<31>
USB3TN1<34>
USB3TP1<34>
USB3RN1<34>
USB3RP1<34>
USB3TN5<41>
USB3TP5<41>
USB3RN5<41>
USB3RP5<41>
USB3TP3<35>
USB3TN3<35>
USB3RP3<35>
USB3RN3<35>
USB3TP4<35>
USB3TN4<35>
USB3RP4<35>
USB3RN4<35>
DMI_CTX_PRX_N0
DMI_CTX_PRX_P0
DMI_CRX_PTX_N0
DMI_CRX_PTX_P0
DMI_CTX_PRX_N1
DMI_CTX_PRX_P1
DMI_CRX_PTX_N1
DMI_CRX_PTX_P1
DMI_CTX_PRX_N2
DMI_CTX_PRX_P2
DMI_CRX_PTX_N2
DMI_CRX_PTX_P2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CRX_PTX_N3
DMI_CRX_PTX_P3
PCIECOMP#
PCIECOMP
PCIE_PRX_DTX_N1
PCIE_PRX_DTX_P1
PCIE_PTX_DRX_N1
PCIE_PTX_DRX_P1
PCIE_PTX_DRX_N2
PCIE_PTX_DRX_P2
PCIE_PRX_DTX_N2
PCIE_PRX_DTX_P2
PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3
PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3
PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4
PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4
PCIE_PRX_DTX_N5
PCIE_PRX_DTX_P5
PCIE_PTX_DRX_N5
PCIE_PTX_DRX_P5
PCIE_PRX_DTX_N6
PCIE_PRX_DTX_P6
PCIE_PTX_DRX_N6
PCIE_PTX_DRX_P6
PCIE_PRX_DTX_N7
PCIE_PRX_DTX_P7
PCIE_PTX_DRX_N7
PCIE_PTX_DRX_P7
UH1B
L27
DMI_RXN0
N27
DMI_RXP0
C27
DMI_TXN0
B27
DMI_TXP0
E24
DMI_RXN1
G24
DMI_RXP1
B28
DMI_TXN1
A28
DMI_TXP1
G27
DMI_RXN2
E26
DMI_RXP2
B29
DMI_TXN2
C29
DMI_TXP2
L29
DMI_RXN3
K29
DMI_RXP3
B30
DMI_TXN3
A30
DMI_TXP3
B18
PCIE_RCOMPN
C17
PCIE_RCOMPP
H15
PCIE1_RXN/USB3_7_RXN
G15
PCIE1_RXP/USB3_7_RXP
A16
PCIE1_TXN/USB3_7_TXN
B16
PCIE1_TXP/USB3_7_TXP
B19
PCIE2_TXN/USB3_8_TXN
C19
PCIE2_TXP/USB3_8_TXP
E17
PCIE2_RXN/USB3_8_RXN
G17
PCIE2_RXP/USB3_8_RXP
L17
PCIE3_RXN/USB3_9_RXN
K17
PCIE3_RXP/USB3_9_RXP
B20
PCIE3_TXN/USB3_9_TXN
C20
PCIE3_TXP/USB3_9_TXP
E20
PCIE4_RXN/USB3_10_RXN
G19
PCIE4_RXP/USB3_10_RXP
B21
PCIE4_TXN/USB3_10_TXN
A21
PCIE4_TXP/USB3_10_TXP
K19
PCIE5_RXN
L19
PCIE5_RXP
D22
PCIE5_TXN
C22
PCIE5_TXP
G22
PCIE6_RXN
E22
PCIE6_RXP
B22
PCIE6_TXN
A23
PCIE6_TXP
L22
PCIE7_RXN
K22
PCIE7_RXP
C23
PCIE7_TXN
B23
PCIE7_TXP
K24
PCIE8_RXN
L24
PCIE8_RXP
C24
PCIE8_TXN
B24
PCIE8_TXP
SKY-H-PCH_BGA837
@
UH1F
C11
USB3_1_TXN
B11
USB3_1_TXP
B7
USB3_1_RXN
A7
USB3_1_RXP
B12
USB3_2_TXN/SSIC_1_TXN
A12
USB3_2_TXP/SSIC_1_TXP
C8
USB3_2_RXN/SSIC_1_RXN
B8
USB3_2_RXP/SSIC_1_RXP
B15
USB3_6_TXN
C15
USB3_6_TXP
K15
USB3_6_RXN
K13
USB3_6_RXP
B14
USB3_5_TXN
C14
USB3_5_TXP
G13
USB3_5_RXN
H13
USB3_5_RXP
D13
USB3_3_TXP/SSIC_2_TXP
C13
USB3_3_TXN/SSIC_2_TXN
A9
USB3_3_RXP/SSIC_2_RXP
B10
USB3_3_RXN/SSIC_2_RXN
B13
USB3_4_TXP
A14
USB3_4_TXN
G11
USB3_4_RXP
E11
USB3_4_RXN
SKY-H-PCH_BGA837
@
SKY-S-PCH_BGA837
DMI
SKY-S-PCH_BGA837
LPC/eSPI
USB
PCIe/USB 3
SATA
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB 2.0
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2N_11
USB2P_11
USB2N_12
USB2P_12
USB2N_13
USB2P_13
USB2N_14
USB2P_14
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_F15/USB2_OCB_4
GPP_F16/USB2_OCB_5
GPP_F17/USB2_OCB_6
GPP_F18/USB2_OCB_7
USB2_COMP
USB2_VBUSSENSE
RSVD_AB13
USB2_ID
GPD7/RSVD
2 OF 12REV = 1.3
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A6/SERIRQ
GPP_A7/PIRQA#/ESPI_ALERT0#
GPP_A0/RCIN#/ESPI_ALERT1#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_G19/SMI#
GPP_G18/NMI#
GPP_E6/DEVSLP2
GPP_E5/DEVSLP1
GPP_E4/DEVSLP0
GPP_F9/DEVSLP7
GPP_F8/DEVSLP6
GPP_F7/DEVSLP5
GPP_F6/DEVSLP4
GPP_F5/DEVSLP3
6 OF 12REV = 1.3
AF5
AG7
AD5
AD7
AG8
AG10
AE1
AE2
AC2
AC3
AF2
AF3
AB3
AB2
AL8
AL7
AA1
AA2
AJ8
AJ7
W2
W3
AD3
AD2
V2
V1
AJ11
AJ13
AD43
AD42
AD39
AC44
Y43
Y41
W44
W43
AG3
AD10
AB13
AG2
BD14
AT22
AV22
AT19
BD16
BE16
BA17
AW17
AT17
BC18
BC17
AV19
M45
N43
AE45
AG43
AG42
AB39
AB36
AB43
AB42
AB41
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N9
USB20_P9
USB_OC0#
USB_OC2#
USB2_COMP
SERIRQ
USB20_N1<34>
USB20_P1<34>
USB20_N2<35>
USB20_P2<35>
USB20_N3<41>
USB20_P3<41>
USB20_N4<37>
USB20_P4<37>
USB20_N5<28>
USB20_P5<28>
USB20_N6<25>
USB20_P6<25>
USB20_N7<25>
USB20_P7<25>
USB20_N9<35>
USB20_P9<35>
USB_OC0#<34>
USB_OC2#<32>
1 2
RH109 113_0402_1%
1 2
RH580 1K_0402_5%
1 2
RH581 1K_0402_5%
Change to 1K pull down.
LPC_AD0<43>
LPC_AD1<43>
LPC_AD2<43>
LPC_AD3<43>
LPC_FRAME#<43>
KB_RST#
SERIRQ<43>
KB_RST#<43>
RH89 22_0402_5%
12
----->Right Side JUSB1
----->Left Side JUSB3 PowerShare (Debug Port)
----->Cladera
----->ELC
----->WLAN BT
----->Touch Screen
----->Camera
----->Right Side JUSB2 (TypeC)
----->Left Side JUSB4
RPH6
1 8
2 7
3 6
4 5
10K_8P4R_5%
DEVSLP2<29>
DEVSLP0<29>
USB_OC2#
USB_OC0#
CLK_PCI_LPC <43>
JSSD2 DVESLP
JSSD0 DVESLP
+3V_PCH
SERIRQ
KB_RST#
1 2
RH111 10K_0402_5%~D
1 2
RH518 10K_0402_5%~D
+3VS
For DELL Confidential
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (4/7) PCI, USB
PCH (4/7) PCI, USB
PCH (4/7) PCI, USB
LA-C912P
LA-C912P
LA-C912P
1
19 78Wednesday, July 22, 2015
19 78Wednesday, July 22, 2015
19 78Wednesday, July 22, 2015
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
+3VS
1 2
RH517 8.2K_0402_5%
1 2
RH520 8.2K_0402_5%@
1 2
RH521 10K_0402_5%
D D
RC62 49.9K_0402_1%
RC63 49.9K_0402_1%
RC65 49.9K_0402_1%@
12
12
12
BT_OFF#
WL_OFF#
EC_SCI#
UART_2_CRXD_DTXD
UART_2_CTXD_DRXD
UART_2_CCTS_DRTS
Win7 Debug
+3VS
1 2
RH516 10K_0402_5%
DGPU_PWROK
4
BBS_BIT0
EC_SCI#
EC_SCI#<43>
NRB_BIT
GPU_GC6_FB_EN<46>
GC6_EVENT#<46>
PD_PWR_EN<43,60>
PD_PWR_EN
TBT_CIO_PLUG_EVENT#<58>
UART_2_CTXD_DRXD<28>
UART_2_CRXD_DTXD<28>
RTD3_USB_PWR_EN<58>
RTD3_CIO_PWR_EN<58>
WL_OFF#<28>
BT_OFF#<28>
DGPU_PWROK<43>
1 2
RH582 0_0402_5%@
TBT_CIO_PLUG_EVENT#
UART_2_CCTS_DRTS
UART_2_CTXD_DRXD
UART_2_CRXD_DTXD
RTD3_USB_PWR_EN
RTD3_CIO_PWR_EN
WL_OFF#
BT_OFF#
DGPU_PWROK
AT29
AR29
AV29
BC27
BD28
BD27
AW27
AR24
AV44
BA41
AU44
AV43
AU41
AT44
AT43
AU43
AN43
AN44
AR39
AR45
AR41
AR44
AR38
AT42
AM44
AJ44
3
UH1K
GPP_B22/GSPI1_MOSI
GPP_B21/GSPI1_MISO
GPP_B20/GSPI1_CLK
GPP_B19/GSPI1_CS#
GPP_B18/GSPI0_MOSI
GPP_B17/GSPI0_MISO
GPP_B16/GSPI0_CLK
GPP_B15/GSPI0_CS#
GPP_C9/UART0_TXD
GPP_C8/UART0_RXD
GPP_C11/UART0_CTS#
GPP_C10/UART0_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C23/UART2_CTS#
GPP_C22/UART2_RTS#
GPP_C21/UART2_TXD
GPP_C20/UART2_RXD
GPP_C19/I2C1_SCL
GPP_C18/I2C1_SDA
GPP_C17/I2C0_SCL
GPP_C16/I2C0_SDA
GPP_D4/ISH_I2C2_SDA
GPP_D23/ISH_I2C2_SCL
SKY-H-PCH_BGA837
@
SKY-S-PCH_BGA837
11 OF 12REV = 1.3
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_D16/ISH_UART0_CTS#
GPP_D15/ISH_UART0_RTS#
GPP_D14/ISH_UART0_TXD
GPP_D13/ISH_UART0_RXD
GPP_H20/ISH_I2C0_SCL
GPP_H19/ISH_I2C0_SDA
GPP_H22/ISH_I2C1_SCL
GPP_H21/ISH_I2C1_SDA
GPP_A23/ISH_GP5
GPP_A22/ISH_GP4
GPP_A21/ISH_GP3
GPP_A20/ISH_GP2
GPP_A19/ISH_GP1
GPP_A18/ISH_GP0
GPP_A17/ISH_GP7
AL44
AL36
AL35
AJ39
AJ43
AL43
AK44
AK45
BC38
BB38
BD38
BE39
BC22
BD18
BE21
BD22
BD21
BB22
BC19
DGPU_PWR_EN
KB_DET#
CLKDET#
DGPU_PRSNT#
2
DGPU_HOLD_RST# <46>
DGPU_PWR_EN <49,68>
KB_DET#<39>
DGPU_PWR_EN
KB_DET#
CLKDET#
1
1 2
RH537 10K_0402_5%~D
1 2
RH557 10K_0402_5%~D
1 2
RH558 10K_0402_5%~D@
+3VS
+3V_PCH
+3V_PCH
1 2
C C
B B
For BIOS setting dGPU present
LOW - dGPU exist*
+3VS
@
DGPU_PRSNT#
1 2
RH134 10K_0402_5%
RH135 10K_0402_5%
1 2
DGPU_PRSNT#
RH130 4.7K_0402_5%~D@
Boot BIOS Strap Bit (internal PD)
HIGH
LOW(DEFAULT)
+3V_PCH
1 2
RH524 4.7K_0402_5%~D@
NO REBOOT mode (internal PD)
HIGH
LOW(DEFAULT)
LPC
SPI
Enable
Disable
BBS_BIT0
NRB_BIT
For DELL Confidential
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (5/7) GPIO, CPU, MISC
PCH (5/7) GPIO, CPU, MISC
PCH (5/7) GPIO, CPU, MISC
LA-C912P
LA-C912P
LA-C912P
1
20 78Wednesday, July 22, 2015
20 78Wednesday, July 22, 2015
20 78Wednesday, July 22, 2015
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
4
3
2
1
@
JP1
1 2
PAD-OPEN 43x39
1 2
+3VALW
Close to BA29
+1V_VCCDSW
1U_0402_6.3V
CH176
1
2
+1V_PCH
RZ70 0_0805_5%@
1 2
@
RH137 0_0603_5%
D D
C C
Close to K2,K3 Close to A43,B43 Close to U21,U23,U25,U26,V26
1U_0402_6.3V
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
2
CH179
1
1
CH178
CH177
2
2
+1V_PCH+1VALW
+1V_MPHY
+3V_PCH_DSW
+1V_PCH
Close to AC17
1U_0402_6.3V
CH185
1
2
+1V_MPHY +1V_MPHY
1U_0402_6.3V
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH180
1
1
1
CH181
CH182
2
2
2
+3V_PCH
1
2
1
2
22U_0805_6.3V6M~D
CH184
+1VALW
+1V_PCH
Close to BA15
0.1U_0402_10V7K
CH200
1U_0402_6.3V
CH183
1
2
@
JP2
1 2
PAD-OPEN 43x39
+1.0V_VCCDSW
+1V_PCH_PRIM
RH196
1 2
@
0_0402_5%
+1V_PCH
+3V_PCH_DSW
+1V_VCCDSW
+1V_MPHY
+3V_PCH
UH1H
AA23
VCCPRIM_1P0_AA23
AA26
VCCPRIM_1P0_AA26
AA28
VCCPRIM_1P0_AA28
AC23
VCCPRIM_1P0_AC23
AC26
VCCPRIM_1P0_AC26
AC28
VCCPRIM_1P0_AC28
AE23
VCCPRIM_1P0_AE23
AE26
VCCPRIM_1P0_AE26
Y23
VCCPRIM_1P0_Y23
Y25
VCCPRIM_1P0_Y25
BA29
DCPDSW_1P0
N17
VCCCLK1
R19
VCCCLK3
U20
VCCCLK4
V17
VCCCLK2
R17
VCCCLK6
K2
VCCCLK5_K2
K3
VCCCLK5_K3
U21
VCCMPHY_1P0_U21
U23
VCCMPHY_1P0_U23
U25
VCCMPHY_1P0_U25
U26
VCCMPHY_1P0_U26
V26
VCCMPHY_1P0_V26
A43
VCCMPHYPLL_1P0_A43
B43
VCCMPHYPLL_1P0_B43
C44
VCCPCIE3PLL_1P0_C44
C45
VCCPCIE3PLL_1P0_C45
V28
VCCAPLLEBB_1P0
AC17
VCCPRIM_1P0_AC17
AJ5
VCCUSB2PLL_1P0_AJ5
AL5
VCCUSB2PLL_1P0_AL5
AN19
VCCHDAPLL_1P0
BA15
VCCHDA
W15
VCCDSW_3P3_W15
SKY-H-PCH_BGA837
@
SKY-S-PCH_BGA837
CORE
MPHY
USB
REV = 1.3
VCCPRIM_1P0_AL22
VCCDSW_3P3_BA24
VCCGPIO
VCCPRIM_1P0_AD15
VCCPRIM_1P0_AJ20
VCCPRIM_1P0_AJ21
VCCPRIM_1P0_AJ23
VCCPRIM_1P0_AJ25
8 OF 12
VCCPGPPA
VCCPGPPBH_BC42
VCCPGPPBH_BD40
VCCPGPPEF_AJ41
VCCPGPPEF_AL41
VCCPGPPG
VCCPRIM_3P3_AN5
VCCATS
VCCRTCPRIM_3P3
VCCRTC
DCPRTC
VCCSPI_BE41
VCCSPI_BE43
VCCSPI_BE42
VCCPGPPCD_BC44
VCCPGPPCD_BA45
VCCPGPPCD_BC45
VCCPGPPCD_BB45
VCCPRIM_3P3_BD3
VCCPRIM_3P3_BE3
VCCPRIM_3P3_BE4
AL22
BA24
BA31
BC42
BD40
AJ41
AL41
AD41
AN5
AD15
AD13
BA20
BA22
1 2
BA26
CH70 0.1U_0402_10V7K~D
AJ20
AJ21
AJ23
AJ25
BE41
BE43
BE42
BC44
BA45
BC45
BB45
BD3
BE3
BE4
+1V_PCH
+1V_PCH
+RTC_CELL
+1V_PCH_PRIM
+3V_PCH_SPI
+3V_PCH_DSW
+3VS
+3V_PCH
Follow TD-Team
12
@
RH1360_0603_5%
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
1
2
+3VS
0.1U_0402_10V7K
CH189
1U_0402_6.3V
CH188
1
2
+3V_PCH
+3V_PCH
Close to BA20Close to AD13Close to AN5
1U_0402_6.3V
0.1U_0402_10V7K
CH187
1
1
CH186
2
2
Close to AD41
0.1U_0402_10V7K
1
CH190
2
B B
+3V_PCH_DSW
1
2
Close to W15
1U_0402_6.3V
CH82
+RTC_CELL
1
2
Close to BA22
1U_0402_6.3V
0.1U_0402_10V7K
CH80
1
CH173
2
0.1U_0402_10V7K
1
CH192
2
+3V_PCH+3V_PCH
Close to AJ41,AL41Close to BC42,BD40
0.1U_0402_10V7K
1
CH191
2
For DELL Confidential
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (6/7) PWR
PCH (6/7) PWR
PCH (6/7) PWR
LA-C912P
LA-C912P
LA-C912P
1
21 78Wednesday, July 22, 2015
21 78Wednesday, July 22, 2015
21 78Wednesday, July 22, 2015
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
UH1I
SKY-S-PCH_BGA837
AC18
VSS
AN4
VSS
AN10
VSS
BE14
VSS
BE18
VSS
BE23
D D
C C
B B
BE28
BE32
BE37
BE40
AA17
AA18
AA20
AA21
AA25
AA29
AA42
AB10
BE9
C10
C2
C28
C37
J7
K10
K27
K33
K36
K4
K42
K43
L12
L13
L15
L4
L41
L8
M35
M42
N10
N15
N19
N22
N24
N35
N36
N4
N41
N5
P17
P19
P22
P45
R10
R14
R22
R29
R33
R38
R5
T1
T2
T4
Y18
Y20
Y21
Y26
Y28
Y29
A18
A25
A32
A37
AA4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKY-H-PCH_BGA837
@
AR5
VSS
AR7
VSS
U15
VSS
AL4
VSS
AE29
VSS
AE4
VSS
AE42
VSS
AF18
VSS
AF20
VSS
AF21
VSS
AF23
VSS
AF25
VSS
AF26
VSS
AF28
VSS
AF29
VSS
AG11
VSS
AG13
VSS
AG31
VSS
AG32
VSS
AG33
VSS
AG38
VSS
AG4
VSS
AH1
VSS
AH17
VSS
AH18
VSS
AH20
VSS
AH21
VSS
AH23
VSS
AH25
VSS
AH26
VSS
AH28
VSS
AH29
VSS
AH45
VSS
AJ10
VSS
AJ14
VSS
AJ15
VSS
AJ17
VSS
AJ18
VSS
AJ26
VSS
AJ28
VSS
AJ29
VSS
AJ31
VSS
AJ32
VSS
AJ36
VSS
AK4
VSS
AK42
VSS
AU7
VSS
AV17
VSS
AV24
VSS
AV27
VSS
AV31
VSS
AV33
VSS
AV6
VSS
AW13
VSS
AW19
VSS
AW29
VSS
AW37
VSS
AW9
VSS
AY38
VSS
AY45
VSS
B25
VSS
B3
VSS
B37
VSS
B40
VSS
B6
VSS
BA1
VSS
BB11
VSS
BB16
VSS
BB21
VSS
BB25
VSS
BB30
VSS
BB34
VSS
BC2
VSS
BD43
VSS
9 OF 12REV = 1.3
W14
W31
W32
W33
W38
4
C42
VSS
D10
VSS
D12
VSS
D15
VSS
D16
VSS
D17
VSS
D19
VSS
D21
VSS
D24
VSS
D25
VSS
D27
VSS
D29
VSS
D30
VSS
D31
VSS
D33
VSS
D35
VSS
D36
VSS
E13
VSS
E15
VSS
E31
VSS
E33
VSS
F44
VSS
F8
VSS
G42
VSS
G9
VSS
H17
VSS
H19
VSS
H22
VSS
H24
VSS
H27
VSS
H29
VSS
H3
VSS
H35
VSS
J10
VSS
J11
VSS
J3
VSS
J39
VSS
J5
VSS
T42
VSS
U10
VSS
U11
VSS
U14
VSS
U17
VSS
U18
VSS
U28
VSS
U29
VSS
U31
VSS
U32
VSS
U33
VSS
U38
VSS
U4
VSS
U8
VSS
V18
VSS
V20
VSS
V21
VSS
V23
VSS
V25
VSS
V29
VSS
V3
VSS
V45
VSS
VSS
VSS
VSS
VSS
VSS
W4
VSS
W8
VSS
Y17
VSS
@
SKY-S-PCH_BGA837
UH1L
SKY-H-PCH_BGA837
12 OF 12REV = 1.3
3
AB11
VSS
AB7
VSS
AB14
VSS
AB31
VSS
AB32
VSS
AB38
VSS
AB4
VSS
AB5
VSS
AC1
VSS
AC20
VSS
AC21
VSS
AC25
VSS
AC29
VSS
AC45
VSS
AB8
VSS
AD11
VSS
AD14
VSS
AB15
VSS
AD32
VSS
AD33
VSS
AD36
VSS
AD4
VSS
AD8
VSS
AE18
VSS
AE20
VSS
AE21
VSS
AE25
VSS
AE28
VSS
AL10
VSS
AL11
VSS
AL13
VSS
AL17
VSS
AL19
VSS
AL24
VSS
AL29
VSS
AL32
VSS
AL33
VSS
AL38
VSS
AM15
VSS
AM17
VSS
AM19
VSS
AM22
VSS
AM24
VSS
AM27
VSS
AM29
VSS
AM45
VSS
AN11
VSS
AN22
VSS
AN27
VSS
AN31
VSS
AN39
VSS
AN7
VSS
AN8
VSS
AP11
VSS
AP4
VSS
AR33
VSS
AR34
VSS
AR42
VSS
AR9
VSS
AT10
VSS
AT15
VSS
AT36
VSS
AT9
VSS
AU1
VSS
AU35
VSS
AU36
VSS
AU39
VSS
AU45
VSS
C4
VSS
BD45
BD44
BE44
BD2
VSS_BD2
VSS_BD45
VSS_BD44
VSS_BE44
D45
VSS_D45
A42
VSS_A42
B45
VSS_B45
B44
VSS_B44
A4
VSS_A4
A3
VSS_A3
B2
VSS_B2
A2
VSS_A2
B1
VSS_B1
BB1
VSS_BB1
BC1
VSS_BC1
A44
VSS_A44
C1
RSVD_C1
D1
RSVD_D1
@
UH1J
SKY-H-PCH_BGA837
SKY-S-PCH_BGA837
RSVD_AR22
RSVD_W13
RSVD_U13
RSVD_P31
RSVD_N31
RSVD_P27
RSVD_R27
RSVD_N29
RSVD_P29
RSVD_AN29
RSVD_R24
RSVD_P24
PREQ#
PRDY#
CPU_TRST#
PCH_TRIGOUT
PCH_TRIGIN
10 OF 12REV = 1.3
2
AR22
W13
U13
P31
N31
P27
R27
N29
P29
AN29
R24
P24
AT3
AT4
AY5
AL2
AK1
XDP_PREQ#<9>
XDP_PRDY# <9>
CPU_XDP_TRST#<6,9>
PCH_TRIGGER <9>
CPU_TRIGGER <9>
1
A A
5
For DELL Confidential
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PCH (7/7) VSS
PCH (7/7) VSS
PCH (7/7) VSS
LA-C912P
LA-C912P
LA-C912P
1
22 78Wednesday, July 22, 2015
22 78Wednesday, July 22, 2015
22 78Wednesday, July 22, 2015
0.1
0.1
0.1
For DELL Confidential
VINAFIX.COM
For DELL Confidential
5
D D
C C
4
3
2
1
Empty page
B B
A A
5
For DELL Confidential
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Reserved Page
Reserved Page
Reserved Page
LA-C912P
LA-C912P
LA-C912P
1
23 78Wednesday, July 22, 2015
23 78Wednesday, July 22, 2015
23 78Wednesday, July 22, 2015
For DELL Confidential
0.1
0.1
0.1
VINAFIX.COM
For DELL Confidential
5
D D
C C
4
3
2
1
Empty page
B B
A A
5
For DELL Confidential
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2015/01/30 2016/12/31
2015/01/30 2016/12/31
2015/01/30 2016/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Reserved Page
Reserved Page
Reserved Page
LA-C912P
LA-C912P
LA-C912P
1
24 78Wednesday, July 22, 2015
24 78Wednesday, July 22, 2015
24 78Wednesday, July 22, 2015
For DELL Confidential
0.1
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