Dell 1737 Schematics

1

2

3

4

5

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7

8

GM5(B) Pacino Intel Discrete & UMA Block Diagram

VER : B2A

A A

Screw Hole

PG 45

blank Page

PG 47

Penryn

(478 Micro-FCPGA)

FAN & THERMAL

SMSC1423

PG 39

CLOCK

POWER

SYSTEM
RESET CIRCUIT

PG 44

PG 3,4

BATT
AC/BATT
CONNECTOR

PG 54

B B

DDR2-SODIMM1

CHARGER

RUN POWER SW

+3.3V_SUS/+5V_SUS

+5V/+3.3V/+1.8V

667 / 800 MHZ DDR II

PG 46

PG 53

667 / 800 / 1066 MHz FSB

Cantiga

1299 uFCBGA

GDDR2 x 8
(256M)

PG 15,16

DDR2-SODIMM2

PG 15,16

667 / 800 MHZ DDR II

SATA-ODD

PG 36

SATA-HDD

SATA

SATA

PG 5,6,7,8,9,10

DMI interface

PG 36

ICH9-M

C C

IHDA
USB2.0

AUDIO/AMP

STAC9228/92HD73C

Audio
SPK conn

PG 40

Audio
Jacks x3

Camera + D-MIC

PG 41

KBC

ITE8512

PG 40 PG 41

SPI PS/2

D D

USER
INTERFACE

PG 38

FLASH
2Mbyts

PG 32

1

2

3

LPC

PG 31

676 BGA

PG 11,12,13,14

CIR

TSOP36136TR

PG 37

18X8

Keyboard

PG 37

Touchpad

PG 37

4

SLG8SP513V
(QFN-64)

PCIEx16

DP BUS

USB2.0 x 3
PCIEx1

PCIEx1
USB2.0
USB2.0
PCIEx2
USB2.0
PCIEx1
USB2.0
USB2.0

Biometric

33MHz PCI

PG 17

ATI M86-ME-LP

PCI EXPRESS GFX

PG 18,19,20,21,22PG 23, 24

PI3VDP411LSZDE

PG 38

8-in-1 Card Reader

5

POWER

+1.5V_RUN/+1.05V_VCCP

REGULATOR

+1.8V_SUS/+1.25V_RUN
/+0.9V_DDR_VTT

LVDS

VGA

HDMI

PG 18

USB conn x 3

R5C833

PG 35

PG 28

6

PG 48

PG 49

DC/DC

+3.3V_ALW/+5V_ALW/
+15V_ALW

VGA Core

Panel Connector

CRT CONN.

HDMI CONN.

CPU VRREGULATOR

PG 26

PG 27

PG 25

PG 51

PG 52

PG 50

LAN
BCM5784M

PG 42

RJ45/Magnetics

PG 43

EXPRESS-CARD

PG 30

MINI-CARD

WLAN

MINI-CARD

WWAN

MINI-CARD

WPAN

1394 CONN.

Card Reader CONN.

Title

Title

Title

Schematic Block Diagram1

Schematic Block Diagram1

Schematic Block Diagram1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GM5 B2A

GM5 B2A

GM5 B2A

Date: Sheet

Date: Sheet

Date: Sheet

PG 34

PG 33

PG 33

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

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PG 29

PG 30

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162Wednesday, June 25, 2008

162Wednesday, June 25, 2008

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Table of Contents Power States

PAGE DESCRIPTION

Schematic Block Diagram

1
2

Front Page

3-4

Penryn

5-10

Cantiga
ICH9M

A A

B B

C C

11-14

DDRII SO-DIMM(200P)

15-16

17

Clock Generator

18-24

VGA

25

HDMI

26

LCD connector

27

CRT

28

Card reader PCI interface

29

Card reader & 1394

30

Express card & card reader conn.
SIO

31
32

Flash/RTC

33

WWAN/WPAN

34

WLAN

35

USB port
SATA HDD & ODD

36
37

TP/KB/MB/CIR

38

switch/LED
FAN/Thermal

39

Audio/CONN.

40-41
42-43

Docking Conn/Q-Switch
System Reset Circuit

44

Screw hole & Charger

45-46

47

Blank page

48

1.05VCCP & 1.5VRUN

49

1.8VSUS & 0.9VTT

50

VGA power circuit
CPU_ISL6266 (2phase)

51

D/D ISL6237 3.3V/5V

52
53

RUN Power Switch

54

DCIN,Batt

55

EMI CAP

56

SMBUS BLOCK

57-58

Power statu & Block diagram

POWER PLANE

+PWR_SRC
+RTC_CELL
+3.3V_ALW
+5V_ALW
+15V_ALW
+3.3V_LAN
+5V_SUS
+3.3V_SUS
+1.8V_SUS
+0.9V_DDR_VTT
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+1.05V_VCCP
+VCC_CORE
+LCDVCC
+5V_MOD
+5V_HDD
+5V_ALW2

10V~+19V

+3.0V~+3.3V

+3.3V
+5V
+15V
+3.3V
+5V
+3.3V
+1.8V
+0.9V
+5V
+3.3V
+1.8V
+1.5V
+1.05V

+0.7V~+1.5V

+3.3V
+5V
+5V
+5V

GND PLANE PAGE

8731AGND
AGND_0.9V
AGND_DC/DC
AGND_DC2
AGND_DDR
AGND_ISL6260

GND

46
49
52
48
49
51
ALL

4,26,32,34,48,49,50,51,52,55
11,14,31,32

3,13,26,31,32,34,36,37,38,44,46,49,52,53,54

35,36,46,48,49,52,53,54
26,36,37,52,53
42,43
14,38,50,51,53
3,11,12,13,14,20,30,37,38,43,48,49,50,51,53
6,8,9,15,48,49,50,53,55
16,49,53

14,20,25,27,36,37,38,39,40,41,53
6,8,9,11,12,13,14,15,17,19,20,22,25,26,27,28,

30,33,34,36,38,39,40,41,42,53,55
19,20,21,22,23,24,25,38,53

4,9,14,30,33,34,48,,53,55
3,4,5,6,8,9,11,14,37,48,55
4,51
26
36
36
37,38.52,53

DESCRIPTION

DESCRIPTION

MAIN POWER
RTC
8051 POWER
LCD/CHARGE POWER
LARGE POWER
LAN POWER
SLP_S5# CTRLD POWER
SLP_S5# CTRLD POWER
SODIMM POWER
SODIMM POWER
SLP_S3# CTRLD POWER
SLP_S3# CTRLD POWER
SDVO POWER
CANTIGA/ICH8 POWER
CPU/CANTIGA/ICH8 POWER
CPU CORE POWER
LCD Power
Module Power
HDD Power
LED power source

CONTROL
SIGNAL

ALWON
ALWON
+5V_ALW
AUX_ON
SUS_ON

3.3V_SUS_ON
DDR_ON

0.9V_DDR_VTT_ON
RUN_ON

3.3V_RUN_ON
RUN_ON

1.5V_RUN_ON

1.05V_RUN_ON
IMVP_VR_ON

LCDVCC_TST_EN
& ENVDD

MODC_EN#
HDDC_EN#
LDO output

ACTIVE INVOLTAGE PAGE

S0~S5
S0~S5
S0~S5
S0~S5
S0~S5

D D

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

1

2

3

4

5

6

Date: Sheet

COMPUTER

Index & Power Status

Index & Power Status

Index & Power Status

GM5 B2A

GM5 B2A

GM5 B2A

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262Wednesday, June 25, 2008

262Wednesday, June 25, 2008

262Wednesday, June 25, 2008

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8

H_A#[3..16]5

A A

H_ADSTB#05
H_REQ#[0..4]5

H_A#[17..35]5

T177PADT177PAD
T180PADT180PAD
T185PADT185PAD
T184PADT184PAD

B B

H_ADSTB#15

H_A20M#11

H_FERR#11

H_IGNNE#11
H_STPCLK#11

H_INTR11
H_NMI11
H_SMI#11

C C

H_A#[3..16]

T176

T176
PAD

PAD

H_REQ#[0..4]

H_A#[17..35]

H_A#14
H_A#9
H_A#24
H_A#17

T182

T182
PAD

PAD

TP6TP6
TP7TP7

TP8TP8
TP9TP9
TP10TP10
TP11TP11
TP5TP5
TP12TP12
TP15TP15
TP14TP14
TP13TP13
TP2TP2
TP1TP1
TP3TP3

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

Populate ITP700Flex for bringup

+1.05V_VCCP

R595

R595

R599

R599

54.9/F

54.9/F

54.9/F

54.9/F

ITP_TDI
ITP_TMS
ITP_TCK
ITP_TDO
ITP_TRST#

H_RESET# ITP_DBRESET#

ITP_TCK

D D

CLK_CPU_ITP#17
CLK_CPU_ITP17

R597 54.9/FR597 54.9/F

R596 54.9/FR596 54.9/F

1

R598 0_NCR598 0_NC

R600 150_NCR600 150_NC

Modify X01-25

ITP_TCK

ITP_TRST#

R594

R594

54.9/F

54.9/F

J4
L5
L4

K5

M3

N2

J1
N3
P5
P2

L2
P4
P1
R1

M1

K3
H2
K2

J3

L1
Y2

U5
R3

W6

U4
Y5
U1
R4
T5
T3

W2
W5

Y4
U2
V4

W3
AA4
AB2
AA3

V1
A6

A5
C4

D5
C6
B4
A3

F6
D3

N5

M4

B2

AE8

D8
F8

D22

T2

V3
AA8
AC8
AA7

JITP1

JITP1

1

TDI

2

TMS

5

TCK

7

TDO

3

TRST#

12

RESET#

11

FBO

8

BCLKN

9

BCLKP

10

GND0

14

GND1

16

GND2

18

GND3

20

GND4

22

GND5

U42A

U42A

A[3]#

ADDR GROUP 0 ADDR GROUP 1

ADDR GROUP 0 ADDR GROUP 1

A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#

REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#

A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#

A20M#
FERR#
IGNNE#

STPCLK#
LINT0
LINT1
SMI#

TDI_1/RSV
TDO_2/RSV

BMP_1#[0]/RSV
BMP_1#[1]/RSV
BMP_1#[2]/RSV
BMP_1#[3]/VSS
DCLKPH_1/VSS
ACLKPH_1/VSS
GTLREF_2/RSV
THRMDA_1/RSV
THRMDC_1/RSV
HFPLL_1/VSS
SPARE_1[4]/VSS
BR1#/VCC

Penryn Ball-out Rev 1a

Penryn Ball-out Rev 1a

CONTROL

CONTROL

XDP/ITP SIGNALS

XDP/ITP SIGNALS

THERMAL

THERMAL

PROCHOT#

THERMDA
THERMDC

ICH

ICH

THERMTRIP#

H CLK

H CLK

Quard Core Only

Quard Core Only

RSVD[06]

2

H1

ADS#

E2

BNR#

G5

BPRI#

H5

DEFER#

F21

DRDY#

E1

DBSY#

F1

BR0#

IERR#

INIT#

LOCK#

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HIT#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TDO
TMS

TRST#

DBR#

BCLK[0]
BCLK[1]

TCK

H_IERR#

D20
B3

H4
C1

F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6

TDI

AB3
AB5
AB6
C20

D21
A24
B25

C7

A22
A21

D2

H_THERMDA H_THERMDC

Layout Note:
Place couple 0.1uF Decoupling
caps with in 0.1" ITP connector.

27

VTT0

28

VTT1

26

VTAP

25

DBR#

24

DBA#

23

BPM0#

21

BPM1#

19

BPM2#

17

BPM3#

15

BPM4#

13

BPM5#

4

NC0

6

NC1

29

GND_0

30

GND_1

ITP700Flex_NC

ITP700Flex_NC

R132 56R132 56

R121 0R121 0

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_DBRESET#

R134 56R134 56

H_PROCHOT#
H_THERMDA
H_THERMDC

H_THERM

R118 56R118 56

C777

C777

2200P_NC 50

2200P_NC 50

+1.05V_VCCP

C673 0.1U_NC

C673 0.1U_NC

10

10

C674 0.1U_NC

C674 0.1U_NC

10

10

R602 150R602 150

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

Layout nopte:
Place R412,R354, R408,
R409, R350
and R406 close to CPU

H_ADS# 5
H_BNR# 5
H_BPRI# 5

H_DEFER# 5
H_DRDY# 5
H_DBSY# 5

H_BR0# 5

+1.05V_VCCP

H_INIT# 11
H_LOCK# 5

H_RS#0 5
H_RS#1 5
H_RS#2 5
H_TRDY# 5

H_HIT# 5
H_HITM# 5

ITP_DBRESET# 13

+1.05V_VCCP

H_THERMDA 39

H_THERMDC 39

+1.05V_VCCP

CLK_CPU_BCLK 17
CLK_CPU_BCLK# 17

TP16TP16

54.9/F_NC

54.9/F_NC

3

H_RESET#H_RESET#_L

Modify X01-1

T13PAD T13PAD

+3.3V_SUS

+1.05V_VCCP

R4544

R4544

H_D#[0..63]5

+1.05V_VCCP

Layout Note:
Place R116
close to

R116

R116

CPU.

51_NC

51_NC

Modify X02-39

H_RESET# 5

Layout Note:
Place voltage
divider within

0.5" of GTLREF
pin

+1.05V_VCCP

R60

R60
1K/F

1K/F

R53

R53
2K/F

2K/F

H_THERM

MMST3904-7-F

MMST3904-7-F

2

Q81

Q81

+3.3V_RUN

12

1 3

H_DSTBN#05
H_DSTBP#05
H_DINV#05

H_D#[0..63]5

H_DSTBN#15
H_DSTBP#15
H_DINV#15

R137 1K/F_NCR137 1K/F_NC
R127 1K/F_NCR127 1K/F_NC

CPU_MCH_BSEL06,17
CPU_MCH_BSEL16,17
CPU_MCH_BSEL26,17

Modify X01-2/3

R130

R130
10M

10M

2

12

C976

C976

0.1U

0.1U

10

10

ITP disable guidelines

Signal Resistor Value Connect To Resistor Placement

TDI

150 ohm +/- 5%

TMS

39 ohm +/- 5%

TRST#

680 ohm +/- 5%

TCK

27 ohm +/- 5%

TDO

Open

ITP_EN R268 Depop +3VRUN

4

H_D#[0..63] H_D#[0..63]

T153

T153
PAD

PAD

H_D#[0..63]

T155

T155
PAD

PAD

T14

T14

PAD

PAD

T147

T147

PAD

PAD

T3

PADT3PAD

T148

T148

PAD

PAD

T239

T239

PAD

PAD

FSB

T154

T154
PAD

PAD

T156

T156
PAD

PAD

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

V_CPU_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
CPU_TEST7

BCLK

667

200

800

U42B

U42B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

AD26

AF26

E25
E23
K24
G24

H22
F26
K22
H23

H26
H25

N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24

C23
D25
C24

AF1
A26

B22
B23
C21

J24
J23

J26

C3

DATA GRP 0

DATA GRP 0

D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#

DATA GRP 1

DATA GRP 1

D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

GTLREF

MISC

MISC

TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
BSEL[0]
BSEL[1]
BSEL[2]

Penryn Ball-out Rev 1a

Penryn Ball-out Rev 1a

BSEL2 BSEL1 BSEL0

0

1166

0011

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#

DATA GRP 2

DATA GRP 2

D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#

D[47]#
DSTBN[2]#
DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

DATA GRP 3

DATA GRP 3

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]#
DSTBN[3]#
DSTBP[3]#

DINV[3]#
COMP[0]

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

2661066 0 0 0

H_THERMTRIP# 52

31

Q29

Q29
2N7002W-7-F

2N7002W-7-F

Within 2.0" of the ITP

VTT
VTT

Within 2.0" of the ITP
Within 2.0" of the ITP

GND

Within 2.0" of the ITP

GND

Within 2.0" of the ITP

VTT

Close to CK410M Pin8

5

6

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

H_D#[0..63]

H_D#[0..63] 5

T168

T168

T169

T169

T172

T172

T173

T173

R62

R62

54.9/F

54.9/F

H_D#32

H_D#40

H_D#53

H_D#57

R59

R59

27.4/F

27.4/F

R78

R78

R87

R87

54.9/F

54.9/F

27.4/F

27.4/F

of

of

of

362Wednesday, June 25, 2008

362Wednesday, June 25, 2008

362Wednesday, June 25, 2008

8

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5

H_D#[0..63] 5

H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5

H_DPRSTP# 6,11,51
H_DPSLP# 11
H_DPWR# 5
H_PWRGOOD 11
H_CPUSLP# 5
H_PSI# 51

Title

Title

Title

Penryn Processor (HOST BUS)

Penryn Processor (HOST BUS)

Penryn Processor (HOST BUS)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GM5 B2A

GM5 B2A

GM5 B2A

Date: Sheet

Date: Sheet

Date: Sheet

7

COMP0
COMP1
COMP2
COMP3

Comp0,2 connect with
Zo=27.4ohm,Comp1,3 connect with
Zo=55ohm, make those traces
length shorter than 0.5".Trace
should be at least 25 mils away
from any other toggling signal.

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

1

2

3

4

5

6

7

8

+VCC_CORE +VCC_CORE

+VCC_CORE

A A

+VCC_CORE

All use 10U 4V(+-20%,X6S,0805)Pb-Free.

C79

C78

C78
10U

10U

4

4
805

805

C82

C82
10U

10U

4

4
805

805

C81

C81
10U

10U

4

4
805

805

C83

C83
10U

10U

4

4
805

805

C80

C80
10U

10U

4

4
805

805

C84

C84
10U

10U

4

4
805

805

C79
10U

10U

4

4
805

805

C85

C85
10U

10U

4

4
805

805

C732

C732
10U

10U

4

4
805

805

C77

C77
10U

10U

4

4
805

805

8 inside cavity, north side, secondary layer.

+VCC_CORE

C142

C144

C144
10U

10U

4

4
805

805

B B

+VCC_CORE

C140

C140
10U

10U

4

4
805

805

C143

C143
10U

10U

4

4
805

805

C139

C139
10U

10U

4

4
805

805

C142
10U

10U

4

4
805

805

C138

C138
10U

10U

4

4
805

805

C141

C141
10U

10U

4

4
805

805

C137

C137
10U

10U

4

4
805

805

C761

C761
10U

10U

4

4
805

805

C136

C136
10U

10U

4

4
805

805

8 inside cavity, south side, secondary layer.

+VCC_CORE

C731

C729

C729
10U

10U

4

4
805

805

C728

C728
10U

10U

4

4
805

805

C727

C727
10U

10U

4

4
805

805

C726

C726
10U

10U

4

4
805

805

C731
10U

10U

4

4
805

805

C730

C730
10U

10U

4

4
805

805

6 inside cavity, north side, primary layer.

+VCC_CORE

C C

C755

C755
10U

10U

4

4
805

805

C756

C756
10U

10U

4

4
805

805

C757

C757
10U

10U

4

4
805

805

C758

C758
10U

10U

4

4
805

805

C759

C759
10U

10U

4

4
805

805

C760

C760
10U

10U

4

4
805

805

6 inside cavity, south side, primary layer.

+PWR_SRC

+1.05V_VCCP

+

+

C733

C733
100U

C87

C112

C91

C91

0.1U

0.1U

10

10

Layout out:

D D

Place these inside socket cavity on North side secondary.

C112

0.1U

0.1U

10

10

C87

0.1U

0.1U

10

10

C127

C127

0.1U

0.1U

10

10

C88

C88

0.1U

0.1U

10

10

C128

C128

0.1U

0.1U

10

10

100U

25

25

Layout Note:
Need to add 100uF cap on PWR_SRC for cap singing.
Place on PWR_SRC near +VCC_CORE.

AA10
AA12
AA13
AA15
AA17
AA18
AA20

AC10
AB10
AB12
AB14
AB15
AB17
AB18

A10
A12
A13
A15
A17
A18
A20

B10
B12
B14
B15
B17
B18
B20

C10
C12
C13
C15
C17
C18

D10
D12
D14
D15
D17
D18

E10
E12
E13
E15
E17
E18
E20

F10
F12
F14
F15
F17
F18
F20

AA9

AB9

U42C

U42C

A7

VCC[001]

A9

VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]

B7

VCC[010]

B9

VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]

C9

VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]

D9

VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]

E7

VCC[033]

E9

VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]

F7

VCC[042]

F9

VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]

VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA[01]
VCCA[02]

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VCCSENSE

VSSSENSE

Penryn Ball-out Rev 1a

Penryn Ball-out Rev 1a

+PWR_SRC

+

+

C766

C766
100U

100U

25

25

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

.

.

+

+

C736

C736
100U_NC

100U_NC

25

25

TP20TP20

+VCCSENSE

+VSSSENSE

TP21TP21

TP22TP22

+1.05V_VCCP

+

+

C96

C96

220uF

220uF

2.5V

2.5V

VID0 51
VID1 51
VID2 51
VID3 51
VID4 51
VID5 51
VID6 51

+VCCSENSE 51

+VSSSENSE 51

+

+

C720

C720
100U_NC

100U_NC

25

25

Modify X02-13,X02-28

+1.5V_RUN

C781

+VCC_CORE

R47

R47
100/F

100/F

R48

R48
100/F

100/F

C781
10U

10U

4

4

C194

C194

0.01U

0.01U

25

25

Layout Note:
Place C194 near PIN
B26.

+VCCSENSE
+VSSSENSE

Route VCCSENSE and VSSSENSE
traces at 27.4ohms and
length matched to within 25
mil. Place PU and PD within
2 inch of CPU.

U42D

U42D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

Penryn Ball-out Rev 1a

Penryn Ball-out Rev 1a

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]

VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]

VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]

VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5

AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6

AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4

AE11
AE14
AE16
AE19

.

.
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

1

2

3

4

5

6

Date: Sheet

COMPUTER

Penryn Processor (HOST BUS)

Penryn Processor (HOST BUS)

Penryn Processor (HOST BUS)

GM5 B2A

GM5 B2A

GM5 B2A

7

of

of

of

462Wednesday, June 25, 2008

462Wednesday, June 25, 2008

462Wednesday, June 25, 2008

8

1

A A

B B

C C

+1.05V_VCCP

12

R733

R733
221/F

221/F

H_SWING

12

R732

R732
100/F

100/F

12

R734

R734

24.9/F

24.9/F

Layout Note:
H_RCOMP trace should be
10-mil wide with 20-mil
spacing.

2

T158

T158
PAD

PAD

T164

T164
PAD

PAD

H_D#27 H_D#28

Layout Note:

C805

C805

0.1uF place close

0.1U/10V

0.1U/10V

1 2

to pin C5

H_RCOMP

T157

T157
PAD

PAD

H_D#12H_D#3

T166

T166
PAD

PAD

H_D#28

+1.05V_VCCP

3

H_D#[0..63]3

C807

C807

0.1U/10V

0.1U/10V

Modify X02-20

H_REF

R720

R720
1K/F

1K/F

H_RESET#3

H_CPUSLP#3

1 2

12

R728

R728
2K/F

2K/F

12

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP

4

F2

G8

F8

E6
G2
H6
H2

F6
D4
H3
M9

M11

J1

J2

N12

J6

P2

L2
R2
N9

L6
M5

J3
N2
R1
N5
N6

P13

N8

L7

N10

M3

Y3

AD14

Y6

Y10
Y12
Y14

Y7
W2

AA8

Y9

AA13

AA9
AA11
AD11
AD10
AD13
AE12

AE9

AA2

AD8

AA3

AD3

AD7
AE14

AF3

AC1

AE3

AC3
AE11

AE8

AG2

AD6

C5

E3

C12

E11

A11
B11

U45A

U45A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CANTIGA_88CTGM B-3 QS

CANTIGA_88CTGM B-3 QS

5

H_ADSTB#_0
H_ADSTB#_1

HOST

HOST

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

J8
L3
Y13
Y1

L10
M7
AA5
AE6

L9
M8
AA6
AE5

B15
K13
F13
B13
B14

B6
F12
C8

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

6

H_A#[3..35] 3

H_ADS# 3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR# 3
H_BPRI# 3
H_BR0# 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 17
CLK_MCH_BCLK# 17
H_DPWR# 3
H_DRDY# 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3

H_DINV#0 3
H_DINV#1 3
H_DINV#2 3
H_DINV#3 3

H_REQ#0 3
H_REQ#1 3
H_REQ#2 3
H_REQ#3 3
H_REQ#4 3

H_RS#0 3
H_RS#1 3
H_RS#2 3

T161

T161
PAD

PAD

T162

T162
PAD

PAD

7

T160

T160

T159

T159

PAD

PAD

PAD

PAD

H_DSTBN#0 3
H_DSTBN#1 3
H_DSTBN#2 3
H_DSTBN#3 3

H_DSTBP#0 3
H_DSTBP#1 3
H_DSTBP#2 3
H_DSTBP#3 3

8

Layout Note:
Place the 0.1 uF

D D

1

2

decoupling capacitor
within 100 mils from
GMCH pins.

3

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

4

5

6

Date: Sheet

COMPUTER

Cantiga (HOST)

Cantiga (HOST)

Cantiga (HOST)

GM5 B2A

GM5 B2A

GM5 B2A

7

of

of

of

562Thursday, June 26, 2008

562Thursday, June 26, 2008

562Thursday, June 26, 2008

8

1

+1.8V_SUS

R323

R323
1K/F

SM_RCOMP_VOH

C377

C377

0.01U

0.01U

25

25

A A

SM_RCOMP_VOL

C399

C399

0.01U

0.01U

25

25

+3.3V_RUN

R253 10KR253 10K
R247 10KR247 10K

+1.05V_VCCP

B B

+3.3V_RUN

C C

DPRSLPVR13,51

D D

1K/F

C390

C390

2.2U

2.2U

R319

R319

10

10

3.01K

3.01K

C412

C412

2.2U

2.2U

R322

R322

10

10

1K/F

1K/F

PM_EXTTS#0
PM_EXTTS#1

THERMTRIP_MCH#

Layout Note:
Location of all MCH_CFG strap
resistors needs to be close to
minmize stub.

CPU_MCH_BSEL03,17
CPU_MCH_BSEL13,17
CPU_MCH_BSEL23,17

Modify X01-5

Modify X01-6

1

T110

T110

PAD

PAD

T108

T108

PAD

PAD

R243 2.21K/F_NCR243 2.21K/F_NC

12

T26

T26

PAD

PAD

T19

T19

PAD

PAD

T16

T16

PAD

PAD

R214 2.21K/F_NCR214 2.21K/F_NC

12

T27

T27

PAD

PAD

T21

T21

PAD

PAD

T20

T20

PAD

PAD

T18

T18

PAD

PAD

T15

T15

PAD

PAD

T25

T25

PAD

PAD

R255 2.21K/F_NCR255 2.21K/F_NC

12

T23

T23

PAD

PAD

T24

T24

PAD

PAD

4.02K_NC

4.02K_NC

R258

R258

4.02K_NC

4.02K_NC

R246

R246

PM_BMBUSY#13

H_DPRSTP#3,11,51
PM_EXTTS#015
PM_EXTTS#115
ICH_PWRGD13,44

R227 0R227 0

T112

T112

PAD

PAD

T114

T114

PAD

PAD

T116

T116

PAD

PAD

T120

T120

PAD

PAD

T117

T117

PAD

PAD

T121

T121

PAD

PAD

T118

T118

PAD

PAD

T115

T115

PAD

PAD

T113

T113

PAD

PAD

T111

T111

PAD

PAD

T106

T106

PAD

PAD

T100

T100

PAD

PAD

T101

T101

PAD

PAD

T102

T102

PAD

PAD

T107

T107

PAD

PAD

T119

T119

PAD

PAD

SB_NB_PCIE_RST#12

PLTRST#12,30,31,33,34,42

CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

PM_EXTTS#0
PM_EXTTS#1

PLTRST#_R
THERMTRIP_MCH#
DPRSLPVR_R

R292 0_NCR292 0_NC

R291 0R291 0

AH10
AH12
AH13

AL34
AK34
AN35
AM35

AY21

BG23
BF23
BH18
BF18

AT40
AT11

BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43

M36

N36
R33
T33

AH9

K12

T24
B31

AJ6

M1

A47

T25
R25
P25
P20
P24
C25
N24

M24

E21
C23
C24
N21
P21
T21
R20

M20

L21
H21
P29
R28
T28

R29

B7
N33
P32

T20
R32

BH6
BH5
BG4
BH3

BF3

BH2
BG2
BE2
BG1

BF1

BD1
BC1

F1

2

U45B

U45B

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14

RSVD15
RSVD16
RSVD17

RSVD20

RSVD21
RSVD22
RSVD23
RSVD24
RSVD25

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25

CANTIGA_1p0

CANTIGA_1p0

R296 100R296 100

2

NC

NC

PLTRST#_R

3

AP24

SA_CK_0

AT21

SA_CK_1

AV24

SB_CK_0

AU20

SB_CK_1

AR24

SA_CK#_0

AR21

SA_CK#_1

AU24

SB_CK#_0

AV20

SB_CK#_1

BC28

SA_CKE_0

AY28

SA_CKE_1

AY36

SB_CKE_0

RSVD

RSVD

SM_RCOMP_VOH
SM_RCOMP_VOL

DDR CONTROL/COMPENSATION

DDR CONTROL/COMPENSATION

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLK

CLK

CFG

CFG

DMI

DMI

PM

PM

GRAPHICS VID

GRAPHICS VID

MEHDA

MEHDA

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

MISC

MISC

SB_CKE_1
SA_CS#_0

SA_CS#_1
SB_CS#_0
SB_CS#_1

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#
DPLL_REF_CLK

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#
CL_VREF

CLKREQ#

ICH_SYNC#

TSATN

HDA_BCLK
HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

BB36
BA17

AY16
AV16
AR13

BD17
AY17
BF15
AY13

BG22
BH21

BF28
BH28

AV42
AR36
BF17
BC36

B38
A38
E41
F41

F43
E43

AE41
AE37
AE47
AH39

AE40
AE38
AE48
AH40

AE35
AE43
AE46
AH42

AD35
AE44
AF46
AH43

B33
B32
G33
F33
E33

C34

AH37
AH36
AN36
AJ35
AH34

N28
M28
G36
E36
K36
H36

B12

B28
B30
B29
C29
A28

M_CLK_DDR0 15
M_CLK_DDR1 15
M_CLK_DDR3 15
M_CLK_DDR4 15

M_CLK_DDR#0 15
M_CLK_DDR#1 15
M_CLK_DDR#3 15
M_CLK_DDR#4 15

DDR_CKE0_DIMMA 15,16
DDR_CKE1_DIMMA 15,16
DDR_CKE3_DIMMB 15,16
DDR_CKE4_DIMMB 15,16

DDR_CS0_DIMMA# 15,16
DDR_CS1_DIMMA# 15,16
DDR_CS2_DIMMB# 15,16
DDR_CS3_DIMMB# 15,16

M_ODT0 15,16
M_ODT1 15,16
M_ODT2 15,16
M_ODT3 15,16

SMRCOMPP
SMRCOMPN

SM_RCOMP_VOH
SM_RCOMP_VOL

Modify X02-20

12

R852 499/FR852 499/F

CLK_MCH_3GPLL 17
CLK_MCH_3GPLL# 17

DMI_MRX_ITX_N0 12
DMI_MRX_ITX_N1 12
DMI_MRX_ITX_N2 12
DMI_MRX_ITX_N3 12

DMI_MRX_ITX_P0 12
DMI_MRX_ITX_P1 12
DMI_MRX_ITX_P2 12
DMI_MRX_ITX_P3 12

DMI_MTX_IRX_N0 12
DMI_MTX_IRX_N1 12
DMI_MTX_IRX_N2 12
DMI_MTX_IRX_N3 12

DMI_MTX_IRX_P0 12
DMI_MTX_IRX_P1 12
DMI_MTX_IRX_P2 12
DMI_MTX_IRX_P3 12

T17 PADT17 PAD
T104 PADT104 PAD
T103 PADT103 PAD
T105 PADT105 PAD
T109 PADT109 PAD

T149 PADT149 PAD

CL_CLK0 13
CL_DATA0 13
ICH_CL_PWROK 13,31

ICH_CL_RST0# 13

MCH_CLVREF

SDVO_CTRLCLK_L
SDVO_CTRLDATA_L

CLK_3GPLLREQ# 17
MCH_ICH_SYNC# 13

R856 56R856 56

3

+V_DDR_MCH_REF

Modify X02-20

R157 0_DISR157 0_DIS
R156 0_DISR156 0_DIS

+1.05V_VCCP

Modify X02-20

+3.3V_RUN

+3.3V_RUN

Modify X02-7

Modify X01-7

4

POP FOR UMA

R159 2.2K_UMAR159 2.2K_UMA
R160 2.2K_UMAR160 2.2K_UMA

R213 10K_UMAR213 10K_UMA
R187 10K_UMAR187 10K_UMA

R462 100K_UMAR462 100K_UMA

1 2

R635 100K_UMAR635 100K_UMA

1 2

+1.8V_SUS

R321

R321

80.6/F

80.6/F

SMRCOMPP
SMRCOMPN

R318

R318

80.6/F

80.6/F

MCH_DREFCLK 17
MCH_DREFCLK# 17
DREF_SSCLK 17
DREF_SSCLK# 17

+1.05V_VCCP

Non-iAMT

CL_VREF~=0.35V

R290

R290
1K/F

1K/F

MCH_CLVREF

12

R282

R282

C344

C344

499/F

499/F

0.1U

0.1U

R239 0_DUR239 0_DU
R249 0_DUR249 0_DU
R228 0_DUR228 0_DU

UMA USE RESISTOR 150/F
PN:CS11502FB21

DIS USE 0 OHM
PN:CS00002JB38

Layout Note:
Place 150 ohm
termination resistors
close to GMCH.

ICH_AZ_HDMI_BITCLK 11
ICH_AZ_HDMI_RST# 11

ICH_AZ_HDMI_SDIN1 11

ICH_AZ_HDMI_SDOUT 11
ICH_AZ_HDMI_SYNC 11

4

UMA_LCD_DDCCLK
UMA_LCD_DDCDAT

LCTLA_CLK
LCTLB_DATA

UMA_PANEL_BKEN
UMA_ENVDD

12

12

UMA_VGA_BLU27
UMA_VGA_GRN27
UMA_VGA_RED27

UMA_CRT_CLK_DDC27
UMA_CRT_DAT_DDC27

UMA_VGAHSYNC27
UMA_VGAVSYNC27

UMA_VGA_BLU
UMA_VGA_GRN
UMA_VGA_RED

5

UMA_BIA_PWM26

UMA_PANEL_BKEN31

UMA_LCD_DDCCLK26
UMA_LCD_DDCDAT26

UMA_ENVDD26

UMA_LCD_ACLK-_C26
UMA_LCD_ACLK+_C26
UMA_LCD_BCLK-_C26
UMA_LCD_BCLK+_C26

UMA_LCD_A0-26
UMA_LCD_A1-26
UMA_LCD_A2-26
UMA_LCD_A3-26

UMA_LCD_A0+26
UMA_LCD_A1+26
UMA_LCD_A2+26
UMA_LCD_A3+26

UMA_LCD_B0-26
UMA_LCD_B1-26
UMA_LCD_B2-26
UMA_LCD_B3-26

UMA_LCD_B0+26
UMA_LCD_B1+26
UMA_LCD_B2+26
UMA_LCD_B3+26

Modify X02-20

R240 3.3K/F_UMAR240 3.3K/F_UMA

Modify X01-4

Modify X02-20

R155 30/F_UMAR155 30/F_UMA

1 2

R222 1K/F_UMAR222 1K/F_UMA
R151 30/F_UMAR151 30/F_UMA

1 2

POP FOR UMA

HDMI HPD CIRCUIT (UMA)

UMA_HDMI_HPD25

R158 0_DISR158 0_DIS
R161 0_DISR161 0_DIS
R167 0_DISR167 0_DIS
R168 0_DISR168 0_DIS
R244 0_DISR244 0_DIS
R225 0_DISR225 0_DIS
R229 0_DISR229 0_DIS
R724 0_DISR724 0_DIS
R723 0_DISR723 0_DIS
R242 0_DISR242 0_DIS
R231 0_DISR231 0_DIS

UMA_LCD_DDCCLK
UMA_LCD_DDCDAT
UMA_CRT_CLK_DDC
UMA_CRT_DAT_DDC
UMA_VGAHSYNC_R
CRT_TVO_IREF
UMA_VGAVSYNC_R
MCH_DREFCLK
MCH_DREFCLK#
DREF_SSCLK
DREF_SSCLK#

POP FOR DIS

5

LCTLA_CLK
LCTLB_DATA

12

PAD

PAD

R638 0_DUR638 0_DU
R691 0_DUR691 0_DU
R707 0_DUR707 0_DU

R638,R691,R707
DIS:0 ohm CS00002JB38
UMA:75 ohm CS07502EB1

UMA_VGAHSYNC_R
CRT_TVO_IREF
UMA_VGAVSYNC_R

Modify X01-29

R855

R855

100K/F_UMA

100K/F_UMA

CFG5

CFG9

CFG16

CFG19

CFG20

SDVO_CRTL_DATA

T22

T22

2

L_IBG

+3.3V_RUN

L32
G32
M32

M33
K33

J33

M29
C44
B43
E37
E38
C41
C40
B37
A37

H47
E46
G40
A40

H48
D45

F40
B40

A41
H38
G37

J37
B42

G38

F37
K37

F25
H25
K25

H24

C31
E32

E28
G28

J28
G29
H32

J32

J29
E29

L29

R853

R853
20K/F_4_UMA

20K/F_4_UMA

31

2N7002W-7-F_UMA

2N7002W-7-F_UMA
Q83

Q83

DMI X2 Select
PCI Express

Graphic Lane
FSB Dynamic

ODT
DMI Lane

Reversal

SDVO/PCIE
Concurrent
Operation

SDVO Present.

6

U45C

U45C

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK

L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA

L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

TVA_DAC
TVB_DAC
TVC_DAC

TV_RTN

TV_DCONSEL_0
TV_DCONSEL_1

CRT_BLUE
CRT_GREEN
CRT_RED
CRT_IRTN
CRT_DDC_CLK

CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

CANTIGA_1p0

CANTIGA_1p0

Modify X02-20

R854

R854

7.5K/F_4_UMA

7.5K/F_4_UMA

LVDS

LVDS

TV

TV

VGA

VGA

PCIE_MRX_GTX_P3

POP FOR UMA

Low=DMIx2
High=DMIx4(Default)

Low= Reveise Lane
High=Normal operation

Low=Dynamic ODT Disable
High=Dynamic ODT Enable(default).

Low=Normal(default).
High=Lane Reversed

Low=Only SDVO or PCIEx1 is
operational (defaults)
High=SDVO and PCIEx1 are operating
simultaneously via PEG port

Low=No SDVO Device Present
(default)
High=SDVO Device Present

6

7

PEG_COMPO

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8

PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8

PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9

PEG_TX#_10
PEG_TX#_11

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

PCIE_MRX_GTX_N0PCIE_MRX_GTX_N0

H44

PCIE_MRX_GTX_N1

J46

PCIE_MRX_GTX_N2PCIE_MRX_GTX_N2

L44

PCIE_MRX_GTX_N3PCIE_MRX_GTX_N3

L40

PCIE_MRX_GTX_N4PCIE_MRX_GTX_N4

N41

PCIE_MRX_GTX_N5PCIE_MRX_GTX_N5

P48

PCIE_MRX_GTX_N6PCIE_MRX_GTX_N6

N44

PCIE_MRX_GTX_N7PCIE_MRX_GTX_N7

T43

PCIE_MRX_GTX_N8PCIE_MRX_GTX_N8

U43

PCIE_MRX_GTX_N9PCIE_MRX_GTX_N9

Y43

PCIE_MRX_GTX_N10PCIE_MRX_GTX_N10

Y48

PCIE_MRX_GTX_N11PCIE_MRX_GTX_N11

Y36

PCIE_MRX_GTX_N12PCIE_MRX_GTX_N12

AA43

PCIE_MRX_GTX_N13PCIE_MRX_GTX_N13

AD37

PCIE_MRX_GTX_N14PCIE_MRX_GTX_N14

AC47

PCIE_MRX_GTX_N15PCIE_MRX_GTX_N15

AD39

PCIE_MRX_GTX_P0PCIE_MRX_GTX_P0

H43

PCIE_MRX_GTX_P1

J44

PCIE_MRX_GTX_P2PCIE_MRX_GTX_P2

L43

PCIE_MRX_GTX_P3PCIE_MRX_GTX_P3

L41

PCIE_MRX_GTX_P4PCIE_MRX_GTX_P4

N40

PCIE_MRX_GTX_P5PCIE_MRX_GTX_P5

P47

PCIE_MRX_GTX_P6PCIE_MRX_GTX_P6

N43

PCIE_MRX_GTX_P7PCIE_MRX_GTX_P7

T42

PCIE_MRX_GTX_P8PCIE_MRX_GTX_P8

U42

PCIE_MRX_GTX_P9PCIE_MRX_GTX_P9

Y42

PCIE_MRX_GTX_P10PCIE_MRX_GTX_P10

W47

PCIE_MRX_GTX_P11PCIE_MRX_GTX_P11

Y37

PCIE_MRX_GTX_P12PCIE_MRX_GTX_P12

AA42

PCIE_MRX_GTX_P13PCIE_MRX_GTX_P13

AD36

PCIE_MRX_GTX_P14PCIE_MRX_GTX_P14

AC48

PCIE_MRX_GTX_P15PCIE_MRX_GTX_P15

AD40

PCIE_MTX_GRX_C_N0PCIE_MTX_GRX_C_N0

J41

PCIE_MTX_GRX_C_N1PCIE_MTX_GRX_C_N1

M46

PCIE_MTX_GRX_C_N2PCIE_MTX_GRX_C_N2

M47

PCIE_MTX_GRX_C_N3PCIE_MTX_GRX_C_N3

M40

PCIE_MTX_GRX_C_N4PCIE_MTX_GRX_C_N4

M42

PCIE_MTX_GRX_C_N5PCIE_MTX_GRX_C_N5

R48

PCIE_MTX_GRX_C_N6PCIE_MTX_GRX_C_N6

N38

PCIE_MTX_GRX_C_N7PCIE_MTX_GRX_C_N7

T40

PCIE_MTX_GRX_C_N8PCIE_MTX_GRX_C_N8

U37

PCIE_MTX_GRX_C_N9PCIE_MTX_GRX_C_N9

U40

PCIE_MTX_GRX_C_N10PCIE_MTX_GRX_C_N10

Y40

PCIE_MTX_GRX_C_N11PCIE_MTX_GRX_C_N11

AA46

PCIE_MTX_GRX_C_N12PCIE_MTX_GRX_C_N12

AA37

PCIE_MTX_GRX_C_N13PCIE_MTX_GRX_C_N13

AA40

PCIE_MTX_GRX_C_N14PCIE_MTX_GRX_C_N14

AD43

PCIE_MTX_GRX_C_N15PCIE_MTX_GRX_C_N15

AC46

PCIE_MTX_GRX_C_P0PCIE_MTX_GRX_C_P0

J42

PCIE_MTX_GRX_C_P1PCIE_MTX_GRX_C_P1

L46

PCIE_MTX_GRX_C_P2PCIE_MTX_GRX_C_P2

M48

PCIE_MTX_GRX_C_P3PCIE_MTX_GRX_C_P3

M39

PCIE_MTX_GRX_C_P4PCIE_MTX_GRX_C_P4

M43

PCIE_MTX_GRX_C_P5PCIE_MTX_GRX_C_P5

R47

PCIE_MTX_GRX_C_P6PCIE_MTX_GRX_C_P6

N37

PCIE_MTX_GRX_C_P7PCIE_MTX_GRX_C_P7

T39

PCIE_MTX_GRX_C_P8PCIE_MTX_GRX_C_P8

U36

PCIE_MTX_GRX_C_P9PCIE_MTX_GRX_C_P9

U39

PCIE_MTX_GRX_C_P10PCIE_MTX_GRX_C_P10

Y39

PCIE_MTX_GRX_C_P11PCIE_MTX_GRX_C_P11

Y46

PCIE_MTX_GRX_C_P12PCIE_MTX_GRX_C_P12

AA36

PCIE_MTX_GRX_C_P13PCIE_MTX_GRX_C_P13

AA39

PCIE_MTX_GRX_C_P14PCIE_MTX_GRX_C_P14

AD42

PCIE_MTX_GRX_C_P15PCIE_MTX_GRX_C_P15

AD46

SDVO_CTRLCLK_L
SDVO_CTRLDATA_L

PCIE_MTX_GRX_C_N0
PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N3

PCIE_MTX_GRX_C_P0
PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P3

+VCC3G_PCIE_R+VCC3G_PCIE_R

T37

PEG_COMPI

T36

R251 49.9/FR251 49.9/F

1 2

DC Blocked Cap. AND POP FOR UMA

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

7

8

+VCC_PEG

C817 0.1U_DISC817 0.1U_DISR262 56R262 56
C813 0.1U_DISC813 0.1U_DIS
C821 0.1U_DISC821 0.1U_DIS
C819 0.1U_DISC819 0.1U_DIS
C830 0.1U_DISC830 0.1U_DIS
C825 0.1U_DISC825 0.1U_DIS
C831 0.1U_DISC831 0.1U_DIS
C833 0.1U_DISC833 0.1U_DIS
C837 0.1U_DISC837 0.1U_DIS
C838 0.1U_DISC838 0.1U_DIS
C840 0.1U_DISC840 0.1U_DIS
C841 0.1U_DISC841 0.1U_DIS
C847 0.1U_DISC847 0.1U_DIS
C848 0.1U_DISC848 0.1U_DIS
C852 0.1U_DISC852 0.1U_DIS
C851 0.1U_DISC851 0.1U_DIS

C814 0.1U_DISC814 0.1U_DIS
C816 0.1U_DISC816 0.1U_DIS
C824 0.1U_DISC824 0.1U_DIS
C822 0.1U_DISC822 0.1U_DIS
C826 0.1U_DISC826 0.1U_DIS
C827 0.1U_DISC827 0.1U_DIS
C832 0.1U_DISC832 0.1U_DIS
C836 0.1U_DISC836 0.1U_DIS
C835 0.1U_DISC835 0.1U_DIS
C839 0.1U_DISC839 0.1U_DIS
C842 0.1U_DISC842 0.1U_DIS
C843 0.1U_DISC843 0.1U_DIS
C844 0.1U_DISC844 0.1U_DIS
C846 0.1U_DISC846 0.1U_DIS
C850 0.1U_DISC850 0.1U_DIS
C849 0.1U_DISC849 0.1U_DIS

PCIE_MTX_GRX_N[0..15] 18
PCIE_MTX_GRX_P[0..15] 18

PCIE_MRX_GTX_N[0..15] 18

PCIE_MRX_GTX_P[0..15] 18

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15

POP FOR DIS

R191 0_UMAR191 0_UMA
R204 0_UMAR204 0_UMA

C276 0.1U_UMAC276 0.1U_UMA
C279 0.1U_UMAC279 0.1U_UMA
C273 0.1U_UMAC273 0.1U_UMA
C275 0.1U_UMAC275 0.1U_UMA

C269 0.1U_UMAC269 0.1U_UMA
C270 0.1U_UMAC270 0.1U_UMA
C266 0.1U_UMAC266 0.1U_UMA
C268 0.1U_UMAC268 0.1U_UMA

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Cantiga (HOST)

Cantiga (HOST)

Cantiga (HOST)

GM5 B2A

GM5 B2A

GM5 B2A

SDVO_CTRLCLK 25
SDVO_CTRLDATA 25

IN_D2- 25
IN_D1- 25
IN_D0- 25
IN_CLK- 25

IN_D2+ 25
IN_D1+ 25
IN_D0+ 25
IN_CLK+ 25

662Wednesday, June 25, 2008

662Wednesday, June 25, 2008

662Wednesday, June 25, 2008

8

of

of

of

1

DDR_A_D[0..63]15

A A

B B

C C

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AJ38

AJ41
AN38
AM38

AJ36

AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36

AW36

BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12

BB9
BA9

AU10

AV9

BA11

BD9
AY8
BA6
AV5
AV7

AN8
AU5
AU6

AN10
AM11

AM5

AN12
AM13

AJ11

AJ12

AT9

AT5

AJ9
AJ8

2

U45D

U45D

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

CANTIGA_1p0

CANTIGA_1p0

3

DDR_A_D63
DDR_A_D34

BD21
BG18
AT25

BB20
BD20
AY20

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

DDR_A_D4
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_MA13
DDR_A_MA1
DDR_A_CAS#

DDR_A_RAS#

DDR_A_WE#

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

T206PAD T206PAD
T208PAD T208PAD
T202PAD T202PAD

T203PAD T203PAD
T188PAD T188PAD
T190PAD T190PAD
T192PAD T192PAD

SA_BS_0
SA_BS_1
SA_BS_2

SA_RAS#
SA_CAS#

SA_WE#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_MA_14

4

T201 PADT201 PAD
T200 PADT200 PAD

T195 PADT195 PAD

DDR_A_BS0 15,16
DDR_A_BS1 15,16
DDR_A_BS2 15,16

DDR_A_RAS# 15,16
DDR_A_CAS# 15,16
DDR_A_WE# 15,16

DDR_A_DM[0..7] 15

DDR_A_DQS[0..7] 15

DDR_A_DQS#[0..7] 15

DDR_A_MA[0..14] 15,16

5

DDR_B_D[0..63]15

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AK47
AH46
AP47
AP46

AJ46

AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11

BG8
BH12
BF11

BG7

BC5

BC6

AY3

AY1

BA1

BD3

AV2

AU3

AR3

AN2

AY2

AV1

AP3

AR1

AH1

AM2

AM3

AH3

BF8

BF6
BF5

AL1
AL2
AJ1

AJ3

U45E

U45E

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

CANTIGA_1p0

CANTIGA_1p0

6

SB_BS_0
SB_BS_1
SB_BS_2

SB_RAS#
SB_CAS#

SB_WE#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_MA_14

BC16
BB17
BB33

AU17
BG16
BF14

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

7

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2

DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

8

DDR_B_BS0 15,16
DDR_B_BS1 15,16
DDR_B_BS2 15,16

DDR_B_RAS# 15,16
DDR_B_CAS# 15,16
DDR_B_WE# 15,16

DDR_B_DM[0..7] 15

DDR_B_DQS[0..7] 15

DDR_B_DQS#[0..7] 15

DDR_B_MA[0..14] 15,16

D D

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

1

2

3

4

5

6

Date: Sheet

COMPUTER

Cantiga (HOST)

Cantiga (HOST)

Cantiga (HOST)

GM5 B2A

GM5 B2A

GM5 B2A

7

of

of

of

762Wednesday, June 25, 2008

762Wednesday, June 25, 2008

762Wednesday, June 25, 2008

8

5

U45G

AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32

AW32

AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29

AW29

AV29
AU29
AT29
AR29
AP29

BA36
BB24
BD16

BB21
AW16
AW13

AT13

AE25

AB25

AA25

AE24

AC24

AA24

AE23

AC23

AB23

AA23

AJ21
AG21
AE21
AC21
AA21

AH20
AF20
AE20
AC20
AB20
AA20

AM15

AL15
AE15

AJ15
AH15
AG15
AF15
AB15
AA15

AN14

AM14

AJ14
AH14

U15

U14
T14

Y26

Y24

Y21

T17
T16

Y15
V15

5

U45G

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35

VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42

VCC_AXG_SENSE
VSS_AXG_SENSE

CANTIGA_1p0

CANTIGA_1p0

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8

VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21

POWER

POWER

VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30

VCC SMVCC GFX

VCC SMVCC GFX

VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

VCC SM LF

2-22 JM

Added for SI
rcommend.

D D

+1.8V_SUS

1 2

C994 0.1U/10VC994 0.1U/10V

1 2

C995 0.1U/10VC995 0.1U/10V

1 2

C996 0.1U/10VC996 0.1U/10V

2600mA

+1.05V_VCCP

C C

R117

R117
0_0805_UMA

0_0805_UMA

1 2

R256

R256
0_0805_DIS

0_0805_DIS

1 2

B B

+1.05V_VCCP

R721

R721
10_UMA/0_DIS

10_UMA/0_DIS

1 2

A A

R726

R726
10_UMA/0_DIS

10_UMA/0_DIS

1 2

UMA: Places R721, R726 to 10 ohm.
Dis: Please R721, R726 to 0 ohm.

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

AV44
BA37
AM40
AV21
AY5
AM10
BB13

4

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

4

Ivcc_axg=6326.84mA

C297

C297

0.1U_UMA

0.1U_UMA

R66

R66
0_0805_DIS

0_0805_DIS

12

C355

C355

0.1U/10V

0.1U/10V

1 2

1 2

Modify X02-28

Layout Note:
370 mils from edge.

VCC_AXG_NCTF

C308

C308

C857

C857

0.1U_UMA

0.1U_UMA

22U_UMA

22U_UMA

805 4

805 4

+1.8V_SUS

12

Layout Note:
Place C233 where LVDS
and DDR2 taps.

R113

R113
0_0805_DIS

0_0805_DIS

12

12

C362

C362

C371

C371

0.1U/10V

0.1U/10V

0.22U/10V

0.22U/10V

C291

C291
10U_UMA

10U_UMA

C430

C430

0.1U/10V

0.1U/10V

+1.05V_VCCP

+

+

C988

C988

220uF

220uF

2.5V

2.5V

6.3805

6.3805

12

C367

C367

0.22U/10V

0.22U/10V

3

+3.3V_RUN

R170 10R170 10

1 2

Layout Note:
Inside GMCH cavity.

Ivcc=1930.4+508.12=2438.52mA

C307

C307
22U/4V

22U/4V

C314

C314

0.47U_UMA

0.47U_UMA

603 10

603 10

+

+

C438

C438

220uF

220uF

2.5V

2.5V

12

C365

C365
1U/10V

1U/10V

+

+

12

C294

C294

0.22U/10V

0.22U/10V

R101 0_0805_UMAR101 0_0805_UMA
R63 0_0805_UMAR63 0_0805_UMA

C986

C986
330U_NC

330U_NC

Layout Note:
370 mils from edge.

12

C415

C415
22U/4V

22U/4V

Layout Note:
Place on the edge.

12

C363

C363
1U/10V

1U/10V

12

C330

C330
1U_UMA

1U_UMA

603 10

603 10

Modify X02-13, X02-28

12

C372

C372

0.47U/10V

0.47U/10V

3

+VCC_GMCH_L

12

C300

C300

0.22U/10V

0.22U/10V

1 2
1 2

+

+

C987

C987

220uF_NC

220uF_NC

2.5V

2.5V

SDMK0340L-7-F

SDMK0340L-7-F

12

+1.05V_VCCP

Modify X02-28

VCC_SM

12

C422

C422
22U/4V

22U/4V

D6

D6

C333

C333

0.1U/10V

0.1U/10V

2

U45F

U45F

21

2

AG34

VCC_1

AC34

VCC_2

AB34

VCC_3

AA34

VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7

AM33

VCC_8

AK33

VCC_9

AJ33

VCC_10

AG33

VCC_11

AF33

VCC_12

AE33

VCC_13

AC33

VCC_14

AA33

VCC_15

Y33

VCC_16

W33

VCC_17

V33

VCC_18

U33

VCC_19

AH28

VCC_20

AF28

VCC_21

AC28

VCC_22

AA28

VCC_23

AJ26

VCC_24

AG26

VCC_25

AE26

VCC_26

AC26

VCC_27

AH25

VCC_28

AG25

VCC_29

AF25

VCC_30

AG24

VCC_31

AJ23

VCC_32

AH23

VCC_33

AF23

VCC_34

T32

VCC_35

CANTIGA_1p0

CANTIGA_1p0

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

VCC CORE

VCC CORE

POWER

POWER

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Cantiga (HOST)

Cantiga (HOST)

Cantiga (HOST)

GM5 B2A

GM5 B2A

GM5 B2A

1

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8

VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31

VCC NCTF

VCC NCTF

VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

1

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

862Wednesday, June 25, 2008

862Wednesday, June 25, 2008

862Wednesday, June 25, 2008

+1.05V_VCCP

of

of

of

5

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC

+3.3V_RUN

D D

UMA POP ALL

+1.05V_VCCP

L30

L30
BLM18AG121SN1D

BLM18AG121SN1D

603

603

1 2

0.5/F 603

0.5/F 603

+VCCA_MPLL_L

12

C858

C858
22U

22U

1206 10V

1206 10V

C C

R223 0_NCR223 0_NC

R260 0_DISR260 0_DIS
R232 0_DISR232 0_DIS
R736 0_DISR736 0_DIS
R737 0_DISR737 0_DIS C405
R211 0_DISR211 0_DIS
R224 0_DISR224 0_DIS

L19

L19

BLM18PG181SN1D_UMA

BLM18PG181SN1D_UMA

603

603

R845

R845
0_UMA

0_UMA

45mA MAx.

FB_120ohm+-25%_100mHz
_200mA_0.2ohm DC

+VCCA_HPLL

12

C366

C366

4.7U

4.7U

805

805

1 2

6.3

6.3

L33

L33
BLM18AG121SN1D

BLM18AG121SN1D

603

603

+VCCA_MPLL

12

R294

R294

+VCCD_QDAC

+VCC_HDA
+VCCD_LVDS
+VCC_TVDAC
+VCC_TX_LVDS_L
+VCCA_DAC_BG
+VCCA_CRT_DAC

C249

C249

0.1U_UMA

0.1U_UMA

10

10

12

C259

C259

0.1U_UMA

0.1U_UMA

10

10

12

C342

C342

0.1U/10V

0.1U/10V

10V

10V

12

C352

C352

0.1U

0.1U

10V

10V

Modify X02-20

C239

C239

0.01U_UMA

0.01U_UMA

25

25

Modify X02-20

C263

C263

0.01U_UMA

0.01U_UMA

25

25

40mA MAx.

10uH+-20%_100mA

+1.05V_VCCP

L13

L13

+VCCA_DPLLA

Modify X02-13, X02-28

10uH/100MA_UMA

10uH/100MA_UMA

Modify X02-13

L15

L15

Modify X02-13, X02-28

10uH/100MA_UMA

10uH/100MA_UMA

0.1Caps should be
placed 200 mils
with in its pins.

+1.05V_VCCP

Modify X02-28

+1.05V_VCCP

+

+

73mA

+VCCA_CRT_DAC

5mA

+VCCA_DAC_BG

+

+

C188

C188

220uF_UMA

220uF_UMA

2.5V

2.5V

+VCCA_DPLLB

+

+

C243

C243

220uF_UMA

220uF_UMA

2.5V

2.5V

C435

C435

220uF

220uF

2.5V

2.5V

L49

L49
1uH/300mA

1uH/300mA

1uH+-20%_300mA

1 2

DIS POP ALL

+1.05V_VCCP

B B

L38

L38

1 2

BLM21PG221SN1D

BLM21PG221SN1D

805

805

FB_220ohm+-25%_100MHz
_2A_0.1ohm DC

R850

50mA

+VCC_HDA

12

C820

C820

0.1U/10V_UMA

0.1U/10V_UMA

R850
0_UMA

0_UMA

+VCCA_PEG_PLL

12

R299

R299
1/F

1/F

603

603

+VCCA_PEG_PLL_R

12

C361

C361
10U

10U

603

603

6.3

6.3

12

+1.5V_RUN

+1.8V_SUS

60.31mA

R841

R841
0_UMA

0_UMA

UMA POP ALL

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC

L16

L16

BLM18PG181SN1D_UMA

BLM18PG181SN1D_UMA

+3.3V_RUN

603

603

UMA POP ALL

C241

C241

0.01U_UMA

0.01U_UMA

25

25

Modify X02-20

C256

C256

0.1U_UMA

0.1U_UMA

10

10

+VCC_TVDAC

79mA

C346

C346

4.7U

4.7U

805

805

6.3

6.3

12

12

C191

C191

0.1U_UMA

0.1U_UMA

10

10

C236

C236

0.1U_UMA

0.1U_UMA

10

10

12

C418

C418
22U_NC

22U_NC

805

805
10

10

+VCCA_SM_CK

12

C802

C802
22U/10V_NC

22U/10V_NC

157.2mA

+VCCD_LVDS

C190

C190
1U_UMA

1U_UMA

603

603
10

10

4

+1.5V_RUN

C829 0.1U/10VC829 0.1U/10V

UMA POP ALL

+VCCA_CRT_DAC

R872

R872
0_DIS

0_DIS

1 2
1 2

R873

R873
0_DIS

0_DIS
C806

C806
1000P

1000P

12

50

50

414uA

12

C274

C274

0.1U

0.1U

10V

10V

12

480mA

12

C429

C429
22U

22U

805

805
10

10

24mA

12

C405
22U/10V

22U/10V

12
12

C834

C834

0.1U/10V

0.1U/10V

Modify X02-20

C189

C189
10U_UMA

10U_UMA

603

603

6.3

6.3

+VCCA_DAC_BG

+VCCA_DPLLA
+VCCA_DPLLB
+VCCA_HPLL
+VCCA_MPLL

+VCC_TX_LVDS_L

13.2mA

50mA

+VCCA_PEG_PLL

C295

C295

0.1U

0.1U

10V

10V

12

C347

C347
1U

1U

603

603
10

10

12

C376

C376

0.1U/10V

0.1U/10V

+VCC_TVDAC

+VCC_HDA

+VCCD_TVDAC
+VCCD_QDAC
+VCCA_MPLL_L
+VCCD_PEG_PLL

U45H

U45H

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

AD48

VCCA_PEG_BG

AA48

VCCA_PEG_PLL

AR20

VCCA_SM_1

AP20

VCCA_SM_2

AN20

VCCA_SM_3

AR17

VCCA_SM_4

AP17

VCCA_SM_5

AN17

VCCA_SM_6

AT16

VCCA_SM_7

AR16

VCCA_SM_8

AP16

VCCA_SM_9

AP28

VCCA_SM_CK_1

AN28

VCCA_SM_CK_2

AP25

VCCA_SM_CK_3

AN25

VCCA_SM_CK_4

AN24

VCCA_SM_CK_5

AM28

VCCA_SM_CK_NCTF_1

AM26

VCCA_SM_CK_NCTF_2

AM25

VCCA_SM_CK_NCTF_3

AL25

VCCA_SM_CK_NCTF_4

AM24

VCCA_SM_CK_NCTF_5

AL24

VCCA_SM_CK_NCTF_6

AM23

VCCA_SM_CK_NCTF_7

AL23

VCCA_SM_CK_NCTF_8

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

CANTIGA_1p0

CANTIGA_1p0

3

CRTPLLA PEGA SM

CRTPLLA PEGA SM

A LVDS

A LVDS

POWER

POWER

A CK

A CK

TV

TV

HDA

HDA

D TV/CRT

D TV/CRT

LVDS

LVDS

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

AXF

AXF

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

SM CK

VCC_TX_LVDS

HV

HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4

PEG

PEG

VCC_PEG_5

DMI

DMI

VTTLF

VTTLF

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14

VTT

VTT

VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

VCC_HV_1
VCC_HV_2
VCC_HV_3

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

VTTLF1
VTTLF2
VTTLF3

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

B22
B21
A21

BF21
BH20
BG20
BF20

K47
C35

B35
A35

V48
U48
V47
U47
U46

AH48
AF48
AH47
AG47

A8
L1
AB2

12

C292

C292

2.2U/6.3V

2.2U/6.3V

+VCC_AXF

+VCC_SM_CK

+VCC_TX_LVDS_L

+3.3V_VCC_HV

1782mA

+VCC_DMI

456mA

+VTTLF1
+VTTLF2
+VTTLF3

2

852mA

12

C296

C296

0.47U/6.3V

0.47U/6.3V

12

12

C281

C281

4.7U/6.3V

4.7U/6.3V

Close to VTT

12

119.85mA

Modify X02-20 Modify X02-20

118.8mA

105.3mA

+VCC_PEG

Modify X02-28

For +1.8V_SUS retuen path used

+

+

12

C353

C353

220uF

220uF

2.5V

2.5V

C394

C394

0.1U/10V

0.1U/10V

12

C374

C374

0.1U

0.1U

10V

10V

12

C423

C423
22U/10V

22U/10V

L40

L40
91nH/1.5A

91nH/1.5A

+1.8V_SUS

12

91uH+-20%_1.5A

12

C442

C442

0.1U

0.1U

10V

10V

C290

C290

4.7U

4.7U

603

603

6.3

6.3

C360

C360
1U/10V

1U/10V

12

C780

C780

0.1U/10V

0.1U/10V

12

C354

C354

4.7U

4.7U

805

805

1 2

6.3

6.3

12

+1.05V_VCCP

C803

C803
1000P_UMA

1000P_UMA

50

50

L39

L39
91nH/1.5A

91nH/1.5A

+1.05V_VCCP

C794

C794

0.1U

0.1U

10V

10V

Modify X02-28

+

+

C299

C299

220uF_NC

220uF_NC

2.5V

2.5V

Place on chip edge.

L520L52
0

1 2

Reserved L pad for

C252

C252

inductor.

10U_NC

10U_NC

603

603

6.3

6.3

L77

805L77

805

1uH/300MA

1uH/300MA

12

R8221R822
1

+VCC_SM_CK_L

C251

C251
10U

10U

603

603

6.3

6.3

1uH+-20%_300mA

L76

L76

+VCC_TX_LVDS_R

1uH/300MA_UMA

1uH/300MA_UMA

805

805

12

C779

C779
22U/10V

22U/10V

91uH+-20%_1.5A

12

+1.05V_VCCP

+3.3V_VCC_HV

R162 0R162 0

12

C427

C427

0.1U/10V

0.1U/10V

1

+1.05V_VCCP

+1.8V_SUS

VCC_HV

D8

D8
SDMK0340L-7-F_NC

SDMK0340L-7-F_NC

+1.05V_VCCP

21

+VCC_HV_L

12

+3.3V_RUN

Place 0 ohm close to +1.8V_SUS

+1.8V_SUS

UMA POP ALL

+1.05V_VCCP

21

D28

D28
CH501H-40PT

CH501H-40PT

R72210R722
10

1 2

1 2

+3.3V_RUN

R184

R184
10_NC

10_NC

C237

C237

0.01U_UMA

0.01U_UMA

25

25

C250

C250

0.01U

0.01U

25

25

+VCCD_TVDAC

12

C792

C792

0.1U_UMA

0.1U_UMA

10V

10V

+VCCD_QDAC

12

C793

C793

0.1U

0.1U

10V

10V

35mA

12

R874

R874

Modify X01-8

0_DIS

0_DIS

120uA

+1.05V_VCCP

BLM18PG181SN1D

BLM18PG181SN1D

4

L89

L89

603

603

50mA

+VCCD_PEG_PLL

12

R8211R821
1

+VCCD_PEG_PLL_RC

C258

C258
10U

10U

603

603

6.3

6.3

+VTTLF1
+VTTLF2
+VTTLF3

12

C316

C316

0.47U/10V

0.47U/10V

QUANTA

QUANTA

12

12

C267

C267

C804

C804

0.47U/10V

0.47U/10V

0.47U/10V

0.47U/10V

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

QUANTA
COMPUTER

COMPUTER

COMPUTER

Cantiga (HOST)

Cantiga (HOST)

Cantiga (HOST)

GM5 B2A

GM5 B2A

GM5 B2A

1

of

of

of

962Wednesday, June 25, 2008

962Wednesday, June 25, 2008

962Wednesday, June 25, 2008

R171 0_UMAR171 0_UMA

+1.5V_RUN

A A

1 2

L34

L34

BLM18PG181SN1D

BLM18PG181SN1D

603

603

UMA POP L34, R849, C250, C793

5

5

U45I

U45I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

D D

C C

B B

A A

5

AF47

AD47

AB47

Y47
N47
G47

BD46

BA46
AY46

AV46
AR46
AM46

V46
R46
P46
H46

BF44
AH44
AD44

AA44

Y44
U44

M44

BC43

AV43
AU43
AM43

C43

BG42

AY42

AT42
AN42

AJ42

AE42

N42

BD41
AU41
AM41
AH41
AD41

AA41

Y41
U41

M41
G41
B41

BG40

BB40

AV40
AN40

H40
E40

AT39
AM39

AJ39

AE39

N39

B39
BH38
BC38

BA38
AU38
AH38
AD38

AA38

Y38
U38

C38
BF37
BB37

AW37

AT37

AN37

AJ37

H37

C37

BG36
BD36

AK15

AU36

T47
L47

F46

T44
F44

J43

L42

T41

L39

T38
J38
F38

VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

CANTIGA_1p0

CANTIGA_1p0

VSS

VSS

4

4

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23

3

U45J

U45J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17
M17
H17
C17

BA16

AU16
AN16

N16
K16
G16

E16
BG15
AC15

W15

A15
BG14

AA14

C14
BG13
BC13

BA13

AN13

AJ13
AE13

N13

L13
G13
E13

BF12
AV12
AT12

AM12

AA12

J12
A12

BD11

BB11

AY11
AN11
AH11

Y11
N11
G11
C11

BG10

AV10

AT10

AJ10

AE10

AA10

M10
BF9
BC9
AN9

AM9

AD9

G9

B9
BH8
BB8
AV8
AT8

3

VSS_230
VSS_231
VSS_232
VSS_233

VSS_235
VSS_237

VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252

VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273

VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296

CANTIGA_1p0

CANTIGA_1p0

VSS

VSS

VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13

VSS NCTF

VSS NCTF

VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16

VSS SCB

VSS SCB

NC

NC

VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325

VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350

VSS_351
VSS_352
VSS_353
VSS_354

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9

VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
VSS_SCB_6

NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42

2

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

U24
U28
U25
U29

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1
B2
A3

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Cantiga (HOST)

Cantiga (HOST)

Cantiga (HOST)

GM5 B2A

GM5 B2A

GM5 B2A

1

of

of

of

10 62Wednesday, June 25, 2008

10 62Wednesday, June 25, 2008

10 62Wednesday, June 25, 2008

1

1

2

3

4

5

6

7

8

+RTC_CELL +RTC_CELL

12

R550

R550
332K/F

332K/F

ICH_INTVRMEN ICH_LAN100_SLP

12

R548

R548
0_NC

0_NC

ICH9M LAN100 SLP Strap

Low = Internal VR Disabled
High = Internal VR Enabled(Default)

U48A

U48A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GLAN_DOCK#/GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M REV 1.0

ICH9M REV 1.0

RTCLAN / GLAN

RTCLAN / GLAN

IHDA

IHDA

SATA

SATA

(Internal VR for VccLAN1.05 and VccCL1.05)

Low = Internal VR Disabled
High = Internal VR Enabled(Default)

SIO_A20GATE

H_DPRSTP#
H_DPSLP#

H_FERR#_L

SIO_RCIN#

THERMTRIP#_ICH

SATA_TX4-_C

SATA_TX4+_C

SATA_TX5-_C

SATA_TX5+_C

SATABIAS

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ1#/GPIO23

LPCCPU

LPCCPU

A20GATE

DPRSTP#

CPUPWRGD

STPCLK#

THRMTRIP#

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATA_CLKN

SATA_CLKP

SATARBIAS#

SATARBIAS

ICH_LAN100_SLP

K5
K4
L6
K2

K3
J3

LDRQ0#

J1
N7

AJ27

A20M#

AJ25
AE23

DPSLP#

AJ26

FERR#

AD22
AF25

IGNNE#

AE22

INIT#

AG25

INTR

L3

RCIN#

AF23

NMI

AF24

SMI#

AH27
AG26
AG27

TP9

AH11
AJ11
AG12
AF12

AH9
AJ9
AE10
AF10

AH18
AJ18

AJ7
AH7

12

R532

R532
332K/F

332K/F

12

R528

R528
0_NC

0_NC

R710 56R710 56

R76524.9/F R76524.9/F

1 2

LPC_LAD0 31,33
LPC_LAD1 31,33
LPC_LAD2 31,33
LPC_LAD3 31,33

LPC_LFRAME# 31,33

T62PAD T62PAD
T56PAD T56PAD

SIO_A20GATE 31
H_A20M# 3

H_DPRSTP# 3,6,51
H_DPSLP# 3

H_FERR#

12

H_PWRGOOD 3
H_IGNNE# 3
H_INIT# 3

H_INTR 3

SIO_RCIN# 31

H_NMI 3
H_SMI# 3

H_STPCLK# 3

T85PAD T85PAD

SATA_RX4- 36

SATA_RX4+ 36

SATA_RX5- 35

SATA_RX5+ 35

CLK_PCIE_SATA# 17
CLK_PCIE_SATA 17

Place within 500mils
of ICH9 ball

H_FERR# 3

Second HDD

E-SATA

1 2

H_DPRSTP#
H_DPSLP#
H_FERR#

SIO_A20GATE
SIO_RCIN#

THERMTRIP#_ICH

R561

R561
56_NC

56_NC

+1.05V_VCCP

R560

R560
56_NC

56_NC

1 2

R501

R501

8.2K

8.2K

1 2

+1.05V_VCCP

1 2

+3.3V_RUN

1 2

1 2

R54256R542
56

R502

R502
10K

10K

R55956R559
56

+RTC_CELL

12

R5351MR535
1M

R816 10MR816 10M

Modify X02-20

W2

W2

1 4
2 3

32.768KHZ

32.768KHZ

R697

R697
20K

20K

1 2

12

C790

C790
1U/10V

1U/10V

C553 0.01U/16V25C553 0.01U/16V25
C554 0.01U/16V25C554 0.01U/16V25

C900 0.01U/16V25C900 0.01U/16V25
C898 0.01U/16V25C898 0.01U/16V25

C535 0.01U/16V25C535 0.01U/16V25
C536 0.01U/16V25C536 0.01U/16V25

12

R538

R538
20K

20K

1 2

ICH_RTCRST#
ICH_SRTCRST#
ICH_INTRUDER#

12

C628

C628
1U/10V

1U/10V

1 2

12
12

12
12

12
12

ICH_RTCX2ICH_RTCX1

R506 33_UMAR506 33_UMA
R508 33R508 33

C594

C594
27P/50V_UMA

27P/50V_UMA

R516 33_UMAR516 33_UMA
R517 33R517 33
R503 33_UMAR503 33_UMA
R504 33R504 33
R496 33_UMAR496 33_UMA
R481 33R481 33

12

C944

C944
12P/50V

12P/50V

1 2
1 2

C603

C603
27P/50V_NC

27P/50V_NC

1 2

1 2
1 2
1 2
1 2
1 2
1 2

SATA_TX0-_C
SATA_TX0+_C

SATA_TX1-_C
SATA_TX1+_C

SATA_TX4-_C
SATA_TX4+_C

ICH9M Internal VR Enable Strap
(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)

ICH_INTVRMEN

ICH_RTCX1
ICH_RTCX2

ICH_RTCRST#
ICH_SRTCRST#
ICH_INTRUDER#

ICH_INTVRMEN
ICH_LAN100_SLP

T140 PADT140 PAD

ACZ_BIT_CLK

ACZ_SYNC
ACZ_RST#
ACZ_SDOUT ACZ_SYNC

Reserved for
Intel Nineveh
design.

+1.5V_PCIE_ICH

Master HDD

SATA ODD

ICH_AZ_CODEC_SDIN040
ICH_AZ_HDMI_SDIN16

+3.3V_SUS

+3.3V_SUS

SATA_ACT#38

SATA_RX0-36
SATA_RX0+36

SATA_RX1-36
SATA_RX1+36

T133

T133
T63

T63

T80 PADT80 PAD
T135 PADT135 PAD
T86 PADT86 PAD
T84 PADT84 PAD
T71 PADT71 PAD
T83 PADT83 PAD

R533 10K_NCR533 10K_NC

R545 24.9/FR545 24.9/F

1 2

GLAN_CLK

LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

12

GLAN_COMP
ACZ_BIT_CLK

ACZ_RST#

PAD

PAD
PAD

PAD

ACZ_SDOUT

R472 10K_NCR472 10K_NC
R507 10K_NCR507 10K_NC

12
12

SATA_TX0-_C
SATA_TX0+_C

SATA_TX1-_C
SATA_TX1+_C

32.768KHZ

12

C945

A A

B B

C C

C945
12P/50V

12P/50V

ICH_AZ_HDMI_BITCLK6
ICH_AZ_CODEC_BITCLK40

ICH_AZ_HDMI_SYNC6
ICH_AZ_CODEC_SYNC40
ICH_AZ_HDMI_RST#6
ICH_AZ_CODEC_RST#31,40
ICH_AZ_HDMI_SDOUT6
ICH_AZ_CODEC_SDOUT40

Place all series terms close to ICH9 except for SDIN input
lines,which should be close to source.Placement of R603, R600,
R607 & R612 should equal distance to the T split trace point as
R604, R599, R606 & R608 respective. Basically,keep the same
distance from T for all series termination resistors.

SATA_TX0-36
SATA_TX0+36

SATA_TX1-36
SATA_TX1+36

SATA_TX4-36
SATA_TX4+36

SATA_TX5-35
SATA_TX5+35

Distance between the ICH-9 M and cap on the "P"
signal should be identical distance between the
ICH-9 M and cap on the "N" signal for same pair.

D D

C585 0.01U/16V25C585 0.01U/16V25
C569 0.01U/16V25C569 0.01U/16V25

1

12
12

SATA_TX5-_C
SATA_TX5+_C

2

+3.3V_RUN

R482

5

1 2

1 2

R482
1K_NC

1K_NC

R787

R787
1K_NC

1K_NC

ACZ_SDOUT

ICH_RSVD 13

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

6

Date: Sheet

COMPUTER

ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)

ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)

ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)

GM5 B2A

GM5 B2A

GM5 B2A

7

of

of

of

11 62Wednesday, June 25, 2008

11 62Wednesday, June 25, 2008

11 62Wednesday, June 25, 2008

8

XOR Chain Entrance Strap

ICH RSVD

3

HDA SDOUT

0
0
1
1

Description

0

RSVD
Enter XOR Chain

1

Normal Operation (Default)

0

Set PCIE port config bit 1

1

4

1

Place TX DC blocking caps close ICH8.

C953 0.1U 10C953 0.1U 10

PCIE_TX1-33
PCIE_TX1+33

PCIE_TX2-34
PCIE_TX2+34

PCIE_TX3-33

A A

B B

PCIE_TX3+33

PCIE_TX4-30
PCIE_TX4+30

PCIE_TX6-/GLAN_TX-42
PCIE_TX6+/GLAN_TX+42

ICH_SPI_CS1#_R
PCI_GNT0#

1 2

R451

R451
1K_NC

1K_NC

12

1 2

C955 0.1U 10C955 0.1U 10

1 2

C951 0.1U 10C951 0.1U 10

1 2

C952 0.1U 10C952 0.1U 10

1 2

C949 0.1U 10C949 0.1U 10

1 2

C950 0.1U 10C950 0.1U 10

1 2

C948 0.1U 10C948 0.1U 10

1 2

C947 0.1U 10C947 0.1U 10

1 2

C946 0.1U 10C946 0.1U 10

1 2

C954 0.1U 10C954 0.1U 10

1 2

R546

R546
1K_NC

1K_NC

PCI
SPI1001

WWAN Noise - ICH improvements

OC6#
OC4#
OC5#
OC7#
USB_OC8#
USB_OC2_3#
USB_OC0_1#
OC9#

C C

D D

C918 0.1U_NC 10C918 0.1U_NC 10

1 2

C915 0.1U_NC 10C915 0.1U_NC 10

1 2

C916 0.1U_NC 10C916 0.1U_NC 10

1 2

C917 0.1U_NC 10C917 0.1U_NC 10

1 2

C922 0.1U_NC 10C922 0.1U_NC 10

1 2

C923 0.1U_NC 10C923 0.1U_NC 10

1 2

C924 0.1U_NC 10C924 0.1U_NC 10

1 2

C925 0.1U_NC 10C925 0.1U_NC 10

1 2

PCI_AD[0..31]28

T55 PADT55 PAD T227PAD T227PAD

PCI_PIRQB#28

T132 PADT132 PAD

1

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

2

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN3_C
PCIE_TXP3_C

PCIE_TXN4_C
PCIE_TXP4_C

GLAN_TXN_C
GLAN_TXP_C

PCIE_RX6-/GLAN_RX-42
PCIE_RX6+/GLAN_RX+42

Boot BIOS Strap

GNT0# SPI_CS1#

No stuff

No stuff

11LPC

No stuff

Stuff
No stuff

Stuff

Places within 500 mils
of the ICH9

+3.3V_SUS

U48B

U48B

D11

AD0

G11

D10

C8
D9

E12

E9

C9

E10

B7
C7
C5

F8

F11

E7

A3
D2

F10

D5

B3

F7
C3

F3

F4
C1
G7
H7
D1
G5
H6
G1
H3

J5

E1

J6

PCI

PCI

AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

Interrupt I/F

Interrupt I/F

PIRQA#
PIRQB#
PIRQC#
PIRQD#C4PIRQH#/GPIO5

ICH9M REV 1.0

ICH9M REV 1.0

2

3

T240 PADT240 PAD
T241 PADT241 PAD

PCIE_RX1-33
PCIE_RX1+33

MiniWWAN

T243 PADT243 PAD

PCIE_RX2-34
PCIE_RX2+34

MiniWLAN

T245 PADT245 PAD

PCIE_RX3-33
PCIE_RX3+33

MiniWPAN

T247 PADT247 PAD

PCIE_RX4-30
PCIE_RX4+30

Express Card

T250 PADT250 PAD T127 PADT127 PAD
T248 PADT248 PAD

Giga Bit LOM

T87 PADT87 PAD
T137 PADT137 PAD

T91 PADT91 PAD

T81 PADT81 PAD

USB_OC0_1#35
USB_OC2_3#54

USB_OC8#35

R763 22.6/FR763 22.6/F

1 2

RP49

OC6#
OC4#
OC5#
OC7#

OC10#
OC11#

REQ0#

GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#
STOP#
TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2

PIRQF#/GPIO3

PIRQG#/GPIO4

RP49

6
7
8
9

10

10KX8

10KX8
R711 10KR711 10K
R712 10KR712 10K

PCI_REQ0#

F1

PCI_GNT0#

G4

PCI_REQ1#

B6

PCI_GNT1#

A7

SB_WWAN_PCIE_RST#

F13

PCI_GNT2#

F12

SB_LOM_PCIE_RST#

E6

PCI_GNT3#

F6
D8

B4
D6
A5

PCI_IRDY#

D3
E3

PCI_RST#_G

R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_PLOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PCI_PLTRST#

C14

CLK_PCI_ICH

D4
R2

SB_WPAN_PCIE_RST#

H4

SB_WLAN_PCIE_RST#

K6

SB_NB_PCIE_RST#

F2

ICH_IRQH_GPIO5

G2

3

PAD

PAD
PAD

PAD

T251

T251
T249

T249

ICH_SPI_CS1#_R

USB_OC0_1#
USB_OC2_3#
OC4#

OC5#
OC6#
OC7#
USB_OC8#
OC9#
OC10#
OC11#

USBRBIAS

+3.3V_SUS

5
4
3
2
1

12
12

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN3_C
PCIE_TXP3_C

PCIE_TXN4_C
PCIE_TXP4_C

T124 PADT124 PAD
T125 PADT125 PAD
T126 PADT126 PAD

GLAN_TXN_C
GLAN_TXP_C

USB_OC8#
USB_OC2_3#
USB_OC0_1#
OC9#

U48D

U48D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

T242

T242

PAD

PAD

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

T244

T244

PAD

PAD

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

T246

T246

PAD

PAD

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M REV 1.0

ICH9M REV 1.0

+3.3V_SUS

PCI_REQ0# 28
PCI_GNT0# 28

T65PAD T65PAD
T75PAD T75PAD

SB_WWAN_PCIE_RST# 33

T64PAD T64PAD

SB_LOM_PCIE_RST# 42

T61PAD T61PAD

PCI_C_BE0# 28
PCI_C_BE1# 28
PCI_C_BE2# 28
PCI_C_BE3# 28

PCI_IRDY# 28
PCI_PAR 28

PCI_DEVSEL# 28
PCI_PERR# 28
PCI_PLOCK#
PCI_SERR# 28
PCI_STOP# 28
PCI_TRDY# 28
PCI_FRAME# 28

CLK_PCI_ICH 17
ICH_PME# 28,31

SB_WPAN_PCIE_RST# 33
SB_WLAN_PCIE_RST# 34
SB_NB_PCIE_RST# 6PCI_PIRQC#28

T49PAD T49PAD

4

DMI0RXN
DMI0RXP
DMI0TXN

DMI0TXP

DMI1RXN
DMI1RXP
DMI1TXN

DMI1TXP

DMI2RXN
DMI2RXP
DMI2TXN

DMI2TXP

DMI3RXN
DMI3RXP
DMI3TXN

DMI3TXP

DMI_CLKN

PCI-Express

PCI-Express

DMI_CLKP

DMI_ZCOMP

Direct Media Interface

Direct Media Interface

DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P

SPI

SPI

USBP5N
USBP5P
USBP6N

USB

USB

USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

T210 PADT210 PAD
T213 PADT213 PAD
T215 PADT215 PAD
T217 PADT217 PAD
T219 PADT219 PAD
T221 PADT221 PAD
T223 PADT223 PAD

T225 PADT225 PAD
T229 PADT229 PAD
T234 PADT234 PAD
T228 PADT228 PAD
T231 PADT231 PAD
T235 PADT235 PAD
T237 PADT237 PAD

4

5

V27
V26
U29
U28

Y27
Y26
W29
W28

AB27
AB26
AA29
AA28

AD27
AD26
AC29
AC28

T26
T25

AF29

DMI_COMP

AF28
AC5

AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

A16 away override strap.

SB_NB_PCIE_RST#

PCI_AD15
PCI_AD3
PCI_AD0
PCI_AD2
PCI_AD21
PCI_AD17
PCI_AD16

PCI_IRDY#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#
PCI_DEVSEL#
PCI_GNT0#
PCI_REQ0#

5

DMI_MTX_IRX_N0 6
DMI_MTX_IRX_P0 6

DMI_MRX_ITX_N0 6
DMI_MRX_ITX_P0 6

DMI_MTX_IRX_N1 6
DMI_MTX_IRX_P1 6

DMI_MRX_ITX_N1 6
DMI_MRX_ITX_P1 6

DMI_MTX_IRX_N2 6
DMI_MTX_IRX_P2 6

DMI_MRX_ITX_N2 6
DMI_MRX_ITX_P2 6

DMI_MTX_IRX_N3 6
DMI_MTX_IRX_P3 6

DMI_MRX_ITX_N3 6
DMI_MRX_ITX_P3 6

CLK_PCIE_ICH# 17
CLK_PCIE_ICH 17

1 2

R529 24.9/FR529 24.9/F

ICH_USBP0- 35
ICH_USBP0+ 35
ICH_USBP1- 35
ICH_USBP1+ 35
ICH_USBP2- 54
ICH_USBP2+ 54
ICH_USBP3- 54
ICH_USBP3+ 54
ICH_USBP4- 34
ICH_USBP4+ 34
ICH_USBP5- 33
ICH_USBP5+ 33
ICH_USBP6- 33
ICH_USBP6+ 33
ICH_USBP7- 30
ICH_USBP7+ 30
ICH_USBP8- 35
ICH_USBP8+ 35

T130PAD T130PAD

T131PAD T131PAD

ICH_USBP10- 38
ICH_USBP10+ 38
ICH_USBP11- 41
ICH_USBP11+ 41

PCI_GNT3#

T209PAD T209PAD
T214PAD T214PAD
T216PAD T216PAD
T218PAD T218PAD
T220PAD T220PAD
T222PAD T222PAD
T224PAD T224PAD

T226PAD T226PAD
T230PAD T230PAD
T233PAD T233PAD

T232PAD T232PAD
T236PAD T236PAD
T238PAD T238PAD

12

R474

R474

1K_NC

1K_NC

Low = A16 swap override enabled.
High = Default.

CLK_PCI_ICH

Reserved for
EMI.Place
resister and cap
close to ICH.

6

+1.5V_PCIE_ICH

Place within 500mils

Side pair Top / left
Side pair bottom / left
Side pair top/right(DB)
Side pair Bot right(DB)
WLAN
Mini Card (WWAN)
Mini Card (WPAN)
Express Card
USB W/ E-SATA port

Biometric
Camera

R772

R772
10_NC

10_NC

1 2

C907

C907

8.2P_NC

8.2P_NC

1 2

16

16

6

7

8

PCI Pullups

PCI_FRAME#
PCI_STOP#
PCI_DEVSEL#
PCI_REQ1#

+3.3V_RUN

PCI_IRDY#
PCI_PERR#
PCI_PLOCK#
PCI_PIRQB#

+3.3V_RUN

SB_WPAN_PCIE_RST#
SB_WWAN_PCIE_RST#
SB_WLAN_PCIE_RST#
SB_LOM_PCIE_RST#
SB_NB_PCIE_RST#

BIOS should not enable the
internal GPIO pull up resistor.

Non-iAMT

PCI_RST#_G

PCI_PLTRST#

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+3.3V_SUS

C887

C887

1 2

0.047U

0.047U

2

10

10

1

+3.3V_SUS

C958

C958

1 2

0.047U

0.047U

2

10

10

1

ICH9-M (USB,DMI,PCIE,PCI)

ICH9-M (USB,DMI,PCIE,PCI)

ICH9-M (USB,DMI,PCIE,PCI)

GM5 B2A

GM5 B2A

GM5 B2A

7

RP42RP42

6
7
8
9

10

RP40RP40

6
7
8
9

10

Add Buffers as needed for
Loading and fanout concerns.

5

U47

U47

4

TC7SZ32FU(T5L,F,T)

TC7SZ32FU(T5L,F,T)

5

U50

U50

4

TC7SZ32FU(T5L,F,T)

TC7SZ32FU(T5L,F,T)

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

+3.3V_RUN

5

PCI_TRDY#

4

PCI_PIRQD#

3

PCI_PIRQB#

2

PCI_SERR#

1

+3.3V_RUN

5

PCI_PIRQA#

4

ICH_IRQH_GPIO5

3

PCI_PIRQC#

2

PCI_REQ0#

1

R468 20KR468 20K
R791 20KR791 20K
R467 20KR467 20K
R477 20KR477 20K
R495 20KR495 20K

PLTRST# 6,30,31,33,34,42

PCI_RST# 28

12
12
12
12
12

12 62Wednesday, June 25, 2008

12 62Wednesday, June 25, 2008

12 62Wednesday, June 25, 2008

8

of

of

of

1

2

3

4

5

6

7

8

+3.3V_SUS

RP50

RP50

1
3

2.2KX2

2.2KX2

A A

+3.3V_SUS

1
3

SMBCLK_ICH
SMBDATA_ICH

Modify X01-21

+3.3V_RUN

R775

R775

8.2K

8.2K

1 2

R777

B B

C C

+3.3V_RUN

+3.3V_RUN

D D

+3.3V_SUS

R777

10_NC

10_NC

1 2

Option to " Disable "
clkrun. Pulling it down
will keep the clks
running.

KB_LED_DET37

PCIE_MCARD1_DET#34

MCH_ICH_SYNC#6

R465 10KR465 10K

R786 2.2K_NCR786 2.2K_NC
R770 100KR770 100K

1 2

R771 100KR771 100K

1 2

R480 100KR480 100K

1 2

R490 100KR490 100K

1 2

R774 100KR774 100K

1 2

R781 10K_NCR781 10K_NC
R476 10KR476 10K
R500 10KR500 10K

R522 10KR522 10K
R505 10KR505 10K
R788 100KR788 100K

1 2

2
4

RP45

RP45

2
4

100KX2_NC

100KX2_NC

R798 0R798 0
R524 0R524 0

CLKRUN#

12

12

12
12
12

12
12

1

Non-iAMT

SMBDATA_ICH
SMBCLK_ICH

ICH_SMLINK0
ICH_SMLINK1

1 2
1 2

PCIE_MCARD1_DET#

PLTRST_DELAY#

IMVP_PWRGD

USB_MCARD2_DET#

USB_MCARD3_DET#

PCIE_MCARD1_DET#

PCIE_MCARD2_DET#
PCIE_MCARD3_DET#

MCH_ICH_SYNC#
IRQ_SERIRQ
THERM_ALERT#

RSV_WOL_EN
SIO_EXT_SMI#
USB_MCARD1_DET#

Modify X01-21

ASF 2.0Non-iAMT

ICH_SMLINK0
ICH_SMLINK1

Modify X02-20

+3.3V_SUS

ITP_DBRESET#3
PM_BMBUSY#6

USB_MCARD1_DET#34

H_STP_PCI#17
H_STP_CPU#17

CLKRUN#28,31
PCIE_WAKE#30,33,34,42

IRQ_SERIRQ28,31

THERM_ALERT#39

IMVP_PWRGD31,44,51

USB_MCARD2_DET#33
USB_MCARD3_DET#33

SIO_EXT_WAKE#31
SIO_EXT_SMI#31
SIO_EXT_SCI#31

R820 4.7KR820 4.7K

Modify X02-20

2

12

PCIE_MCARD2_DET#33
PCIE_MCARD3_DET#33

WLAN_RADIO_DIS#34

CAMERA_CBL_DET#41

SATA_CLKREQ#17

PLTRST_DELAY#18

WPAN_RADIO_DIS_MINI#33

WWAN_RADIO_DIS#33

R789 10K_NCR789 10K_NC
R519 10KR519 10K
R521 10KR521 10K
R509 1KR509 1K

SMBCLK_ICH30,34
SMBDATA_ICH30,34

T51 PADT51 PAD

T46 PADT46 PAD
T47 PADT47 PAD

ICH_RSVD11

T53 PADT53 PAD
T59 PADT59 PAD
T150 PADT150 PAD

Modify X01-21

T82 PADT82 PAD
T139 PADT139 PAD
T79 PADT79 PAD

T48 PADT48 PAD

T134 PADT134 PAD

SPKR40

+3.3V_RUN

12

1K_NC

1K_NC

12
12
12
12

R478

R478

No Reboot strap.

SPKR

Non-iAMT

RSV_ICH_CL_RST1#
ICH_RI#
SIO_EXT_SCI#
PCIE_WAKE#

SMBCLK_ICH
SMBDATA_ICH
RSV_ICH_CL_RST1#
ICH_SMLINK0
ICH_SMLINK1

ICH_RI#
RSV_LPCPD#

USB_MCARD1_DET#

CLKRUN#
PCIE_WAKE#

IRQ_SERIRQ
THERM_ALERT#

IMVP_PWRGD

USB_MCARD2_DET#
USB_MCARD3_DET#

SIO_EXT_SMI#
SIO_EXT_SCI#

PCIE_MCARD2_DET#
PCIE_MCARD3_DET#

PLTRST_DELAY#

SPKR

TP9
TP10
TP11

SPKR

Low = Default.
High = No Reboot.

3

U48C

U48C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#/GPIO15

E19

STP_CPU#/GPIO25

L4

CLKRUN#/GPIO32

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP8

AG19

TACH1/GPIO1

AH21

TACH2/GPIO6

AG21

TACH3/GPIO7

A21

GPIO8

C12

LANPHYPC/GPIO12

C21

ENGDET/GPIO13

AE18

TACH0/GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

QRT_STATE0/GPIO27

D19

QRT_STATE1/GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP9

AJ20

TP10

AJ21

TP11

ICH9M REV 1.0

ICH9M REV 1.0

SMbus address D2

These are for
backdrive issue.

4

SMBDATA_ICH

SMBCLK_ICH

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMB

SMB

Clocks

Clocks

SYS GPIO

SYS GPIO

Power MGTController Link

Power MGTController Link

GPIO

GPIO

NETDETECT/GPIO14

MISC

MISC

+3.3V_RUN

3 1

+3.3V_RUN

3 1

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW#
PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST0#
CL_RST1#

MEM_LED/GPIO24

ALERT#/GPIO10

WOL_EN/GPIO9

2

2

1

Q47

Q47

2N7002W-7-F

2N7002W-7-F

2

Q76

Q76

2N7002W-7-F

2N7002W-7-F

4

3

RP51

RP51

2.2KX2

2.2KX2

5

AH23
AF19
AE21
AD20

CLK_ICH_14M

H1

CLK_ICH_48M

AF3

ICH_SUSCLK

P1
C16

E16
G17

C10

ICH_PWRGD

G20

DPRSLPVR

M2

ICH_BATLOW#

B13
R3

RSV_ICH_LAN_RST#

D20

ICH_RSMRST#

D22
R5

ICH_CL_PWROK

R6
B16
F24

RSV_ICH_CL_CLK1

B19
F22

RSV_ICH_CL_DATA1

C19

CL_VREF0

C25

CL_VREF1

A19
F21

CL_RST1#

D18

RSV_GPIO24

A16

RSV_GPIO10

C18

RSV_GPIO14

C11

RSV_WOL_EN

C20

Non-iAMT

+3.3V_RUN

R773

R773

8.2K

8.2K

1 2

R537 8.2KR537 8.2K

R543 8.2KR543 8.2K

ICH_SMBDATA 15,33

ICH_SMBCLK 15,33

CLK_ICH_14M 17
CLK_ICH_48M 17

T43PAD T43PAD

SIO_SLP_S3# 31

T88PAD T88PAD

SIO_SLP_S5# 31

ICH_PWRGD 6,44
DPRSLPVR 6,51

12

+3.3V_SUS

SIO_PWRBTN# 31

T76PAD T76PAD

ICH_RSMRST# 31
CLK_PWRGD 17
ICH_CL_PWROK 6,31

T90PAD T90PAD

CL_CLK0 6

T69PAD T69PAD

CL_DATA0 6

T78PAD T78PAD

ICH_CL_RST0# 6

T152PAD T152PAD

T151PAD T151PAD

T136PAD T136PAD

T92PAD T92PAD

T77PAD T77PAD

12

+3.3V_SUS

6

Place these close to ICH8.

CLK_ICH_48M

R444

R444
10_NC

10_NC

1 2
12

50

50

R473

R473
10_NC

10_NC

1 2
12

50

50

R540 10KR540 10K
R784 100KR784 100K

1 2

R564 10KR564 10K
R523 10KR523 10K
R762 1MR762 1M

R795 10KR795 10K

Non-iAMT

CLK_ICH_14M

ICH_PWRGD
DPRSLPVR
ICH_RSMRST#
RSV_ICH_LAN_RST#
ICH_CL_PWROK

RSV_GPIO10

DIS:ALW
UMA:SUS

Non-iAMT

10

10

CL_VREF0/1 ~=0.405V

Title

Title

Title

ICH9-M (PM,GPIO,SMB,CL)

ICH9-M (PM,GPIO,SMB,CL)

ICH9-M (PM,GPIO,SMB,CL)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GM5 B2A

GM5 B2A

GM5 B2A

Date: Sheet

Date: Sheet

Date: Sheet

7

+3.3V_RUN

R531

R531

3.24K/F

3.24K/F

1 2

CL_VREF0

12

12

C621

C621

0.1U

0.1U

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

R534

R534
453/F

453/F

10

10

12

C926

C926

0.1U_NC

0.1U_NC

R536

R536

3.24K/F_NC

3.24K/F_NC

1 2

CL_VREF1

C564

C564

4.7P_NC

4.7P_NC

C577

C577

4.7P_NC

4.7P_NC

12

12
12
12

12

+3.3V_SUS+3.3V_ALW

1 2

12

13 62Wednesday, June 25, 2008

13 62Wednesday, June 25, 2008

13 62Wednesday, June 25, 2008

8

+3.3V_SUS

R796

R796

3.24K/F_NC

3.24K/F_NC

R792

R792
453/F_NC

453/F_NC

of

of

of

1

U48E

U48E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

AC26

VSS[012]

A A

B B

C C

D D

AC27

AC3

AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29

AD4

AD5

AD6

AD7

AD9
AE12
AE13
AE14
AE16
AE17

AE2
AE20
AE24

AE3

AE4

AE6

AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27

AF5

AF7

AF9
AG13
AG16
AG18
AG20
AG23

AG3

AG6

AG9
AH12
AH14
AH17
AH19

AH2
AH22
AH25
AH28

AH5

AH8

AJ12
AJ14
AJ17

AJ8

B11

B14

B17

B20

B23

C26

C27

E11

E14

E18

E21

E24

F16

F28

F29

G12

G14

G18

G21

G24

G26

G27

H23

H28

H29

B2

B5
B8

E2

E5
E8

G8
H2

VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]

ICH9M REV 1.0

ICH9M REV 1.0

1

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

2

+5V_RUN

+3.3V_RUN

Non-iAMT

+5V_SUS

+3.3V_SUS

+1.5V_RUN

ModifyX02-8, X02-28

+1.5V_RUN

12

Non-iAMT

Place C625
close to A27.

+1.5V_RUN

C625

C625

0.1U

0.1U

1 2

10

10

2

+RTC_CELL

R783 100R783 100

1 2

D30

D30

2 1

SDMK0340L-7-F

SDMK0340L-7-F

R764 100R764 100

1 2

D29

D29

2 1

SDMK0340L-7-F

SDMK0340L-7-F

L62

L62
BLM21PG331SN1D

BLM21PG331SN1D

805

805

646mA

+

+

12

C957

C957

220uF

220uF

2.5V

2.5V

L84

L84
10uH

10uH

10uH+-20%_100mA

+VCCSATPLL

C901

C901
1U

1U

10

10
603

603

Modify X02-20

805

805

12

C619

C619
22U

22U

10

10
1206

1206

47mA

C571

C571
10U

10U

6.3

6.3
603

603

3

12

C618

C618

C616

C616

0.1U

0.1U

1U

1U

1 2

1 2

10

10

10

10

+ICH_V5REF_RUN

603

603

12

2mA

C608

C608
1U

1U

10

10

603

603

+ICH_V5REF_SUS

12

2mA

C896

C896
1U

1U

10

10

603

603

FB_330ohm+-25%_100mHz_

1.5A_0.09 ohm DC

+1.5V_PCIE_ICH

12

C604

C604
22U

22U

10

10
1206

1206

C615

C615

2.2U

2.2U

1 2

10

10
805

805

+1.5V_RUN

+1.5V_RUN

VCC1_5_A TOTAL 1.342A

+1.5V_RUN

Non-iAMT

+3.3V_RUN

+1.5V_PCIE_ICH

3

1 2

C545

C545

0.1U

0.1U

10

10

T68 PADT68 PAD
T67 PADT67 PAD

11mA

+1.5V_RUN

C606

C606

0.1U

0.1U

1 2

10

10

12

C631

C631

4.7U

4.7U

6.3

6.3
603

603

C629

C629

0.1U

0.1U

10

10

+VCCSATPLL

12

C576

C576
1U

1U

10

10
603

603

12

C588

C588
1U

1U

10

10
603

603

C540

C540

0.1U

0.1U

1 2

10

10

TP_VCCSUSLAN1
TP_VCCSUSLAN2

19mA

+1.5V_RUN

23mA

80mA

+3.3V_RUN

1mA

4

4

AE1

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29

G25
H24
H25

M24
M25
N23
N24
N25

R24
R25
R26
R27

U24
U25

U23
W24
W25

AJ19
AC16

AD15
AD16
AE15

AF15
AG15
AH15

AJ15
AC11

AD11
AE11

AF11
AG10
AG11
AH10

AJ10

AC9

AC18
AC19

AC21

G10

AC12
AC13
AC14

AA7
AB6
AB7
AC6
AC7

D28
D29

U48F

U48F

A23

A6

F25

J24
J25
K24
K25
L23
L24
L25

P24
P25

T24
T27
T28
T29

V24
V25

K23
Y24
Y25

G9

AJ5

A10
A11

A12
B12

A27

E26
E27

A26

ICH9M REV 1.0

ICH9M REV 1.0

VCCRTC
V5REF
V5REF_SUS
VCC1_5_B[01]

VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]

VCCSATAPLL
VCC1_5_A[01]

VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]

VCC1_5_A[09]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]

VCC1_5_A[17]
VCC1_5_A[18]

VCC1_5_A[19]
VCC1_5_A[20]
VCC1_5_A[21]

VCC1_5_A[22]
VCC1_5_A[23]

VCC1_5_A[24]
VCC1_5_A[25]

VCCUSBPLL
VCC1_5_A[26]

VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]

VCCLAN1_05[1]
VCCLAN1_05[2]

VCCLAN3_3[1]
VCCLAN3_3[2]

VCCGLANPLL
VCCGLAN1_5[1]

VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]

VCCGLAN3_3

VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]

CORE

CORE

VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]

VCCA3GP ATXARX USB CORE

VCCA3GP ATXARX USB CORE

V_CPU_IO[1]
V_CPU_IO[2]

VCCP_COREVCCPSUSVCCPUSB

VCCP_COREVCCPSUSVCCPUSB

PCI

PCI

VCCSUSHDA

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]
VCCSUS1_5[2]

VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]

VCCSUS3_3[05]

VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]

VCCCL3_3[1]
VCCCL3_3[2]

GLAN POWER

GLAN POWER

VCCDMIPLL
VCC_DMI[1]

VCC_DMI[2]

VCC3_3[01]
VCC3_3[02]
VCC3_3[07]
VCC3_3[03]

VCC3_3[04]
VCC3_3[05]
VCC3_3[06]

VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

VCCHDA

VCCCL1_05

VCCCL1_5

5

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

23mA

R29

48mA

W23
Y23

2mA

AB23
AC23

VCC3_3 308mA

AG29
AJ6
AC10
AD19

AF20
AG24
AC20

B9
F9
G3
G6
J2
J7
K7

AJ4

+VCCSUSHDA

AJ3

TP_VCCSUS1.05_1

AC8

TP_VCCSUS1.05_2TP_VCCSUS1.05_2

F17

TP_VCCSUS1.5_1

AD8

TP_VCCSUS1.5_2

F18

A18
D16
D17
E22

AF1

VCCSUS 3_3 212mA

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

+VCCCL1_05

G22

+VCCCL1_5

G23

A24
B24

19mA

5

6

+1.05V_VCCP

C598

C598

0.1U

0.1U

1 2

10

10

C596

C596

0.1U

0.1U

1 2

10

10

1uH+-20%_800mA

+1.5V_DMIPLL

C942

C942

0.01U

0.01U

1 2

25

25

+VCC_DMI_ICH

C570

C570

0.1U

0.1U

1 2

10

10

C626

C626

0.1U

0.1U

1 2

10

10

C574

C574

0.1U

0.1U

1 2

10

10

C558

C558

0.1U

0.1U

1 2

10

10

C611

C611

0.1U

0.1U

1 2

10

10

C589

C589

0.1U

0.1U

1 2

10

10

12

+3.3V_RUN

11mA

T50PAD T50PAD
T73PAD T73PAD

T70PAD T70PAD

1 2

C643 0.1U

C643 0.1U

10

10

12

C320

C320

0.22U/10V

0.22U/10V

WWAN Noise - ICH improvements

12

12

12

C562

C562

0.1U_NC

0.1U_NC

10

10

+3.3V_RUN

Non-iAMT

C544

C544

0.1U_NC

0.1U_NC

10

10

C634

C634

0.1U_NC

0.1U_NC

10

10

1 2

6

C927

C927

0.1U_NC

0.1U_NC

10

10

7

+1.05V_VCCP +1.5V_RUN

C943

C943
10U

10U

1 2

6.3

6.3
603

603

C293

C293

4.7U

4.7U

603

603

6.3

6.3

L88

L88
1uH

1uH

+1.5V_DMIPLL_R

12

L90

L90
BLM21PG331SN1D

BLM21PG331SN1D

805

805

1 2

D16

D16

1

2

BAT54C T/R

BAT54C T/R

C640

C640

0.1U

0.1U

10

10

R469

R469

1 2

3

10

10

805

805

R817 1R817 1

+1.05V_VCCP

C791

C791

0.1U

0.1U

1 2

10

10

+1.5V_RUN

12

12

C304

C304

4.7U

4.7U

603

603

6.3

6.3

+1.05V_VCCP

WWAN Noise - ICH improvements

10

10

12

C552

C552

0.1U_NC

0.1U_NC

+VCCSUSHDA

11mA

+VCCSUSHDA

11mA

+3.3V_RUN

1 2

R626 0_DISR626 0_DIS

1 2

R631 0_UMAR631 0_UMA

Modify X01-28 Modify X01-28

12

C318

C318

0.22U/10V

0.22U/10V

12

C548

C548

0.1U

0.1U

10

10

12

+1.5V_RUN

12

+3.3V_SUS

C609

C609

0.1U_DIS

0.1U_DIS

10

10

C1001

C1001

0.1U_UMA

0.1U_UMA

10

10

RESERVE 1.5V_SUS FOR VCCSUSHDA

12

C541

C541

0.1U_NC

0.1U_NC

10

10

PC187

PC187
1U_NC

1U_NC

10

10
603

603

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+3.3V_SUS

12

C559

C559

0.1U

0.1U

10

10

C1003

C1003

1U/6.3V_UMA

1U/6.3V_UMA

12

C563

C563

0.1U

0.1U

10

10

ICH9-M (POWER,GND)

ICH9-M (POWER,GND)

ICH9-M (POWER,GND)

GM5 B2A

GM5 B2A

GM5 B2A

7

U53

U53

3

EN

2

GND

1

VIN

IC(5P) G914C (SOT23-5)EP

IC(5P) G914C (SOT23-5)EP

Modify X01-28, X02-25

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

10

10

12

C550

C550

0.1U_NC

0.1U_NC

VOUT

4

BP

0.022U

0.022U

5

8

+3.3V_RUN

12

C566

C566

0.1U_NC

0.1U_NC

10

10

R823 0_DISR823 0_DIS

12

R828 0_UMAR828 0_UMA

12

C853

C853

C1004

C1004

1U/6.3V_UMA

1U/6.3V_UMA

of

of

of

14 62Wednesday, June 25, 2008

14 62Wednesday, June 25, 2008

14 62Wednesday, June 25, 2008

8

12

C573

C573

0.1U_NC

0.1U_NC

10

10

+3.3V_SUS

12

+1.5V_SUS

12

+1.5V_SUS

C595

C595

0.1U_DIS

0.1U_DIS

10

10

C1002

C1002

0.1U_UMA

0.1U_UMA

10

10

1

2

3

4

5

6

7

8

MASTER

+1.8V_SUS

+V_DDR_MCH_REF

JDIM1

JDIM1

1

A A

B B

DDR_CKE0_DIMMA6,16

DDR_A_BS27,16

DDR_A_BS07,16
DDR_A_WE#7,16

DDR_A_CAS#7,16

DDR_CS1_DIMMA#6,16

M_ODT16,16

C C

Modify X01-21

D D

ICH_SMBDATA13,33
ICH_SMBCLK13,33

+3.3V_RUN

DDR_A_D6
DDR_A_D5

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D3
DDR_A_D2

DDR_A_D9
DDR_A_D8

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D11
DDR_A_D14

DDR_A_D17
DDR_A_D20

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D23
DDR_A_D19

DDR_A_D28
DDR_A_D25

DDR_A_DM3

DDR_A_D31
DDR_A_D27

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS0
DDR_A_WE#

DDR_A_CAS#

M_ODT1
DDR_A_D37

DDR_A_D36
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D34

DDR_A_D39
DDR_A_D40

DDR_A_D41
DDR_A_DM5
DDR_A_D42

DDR_A_D46
DDR_A_D53

DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D60
DDR_A_D56 DDR_A_D61

DDR_A_DM7
DDR_A_D63

DDR_A_D59

ICH_SMBCLK

SMbus address A0

1

VREF

3

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

TYC_1-1734074-1

TYC_1-1734074-1

CLOCK 0,1

2

PC4800 DDR2 SDRAM

PC4800 DDR2 SDRAM

+1.8V_SUS

2

VSS46

DQ4
DQ5

VSS15

DM0

VSS5

DQ6
DQ7

VSS16

DQ12
DQ13

VSS17

DM1

VSS53

CK0

CK0#

VSS41

DQ14
DQ15

VSS54
VSS20

DQ20
DQ21
VSS6

NC3
DM2

VSS21

DQ22
DQ23

VSS24

DQ28

DQ29
VSS25
DQS#3

DQS3

VSS10

DQ30

DQ31

VSS8

CKE1

SO-DIMM (200P)

SO-DIMM (200P)

VDD8

A15
A14

VDD11

A11

A7
A6

VDD4

A4
A2
A0

VDD12

BA1

RAS#

S0#
VDD1
ODT0

A13
VDD6

NC2

VSS12

DQ36
DQ37

VSS28

DM4

VSS42

DQ38
DQ39

VSS55

DQ44

DQ45
VSS43
DQS#5

DQS5

VSS56

DQ46

DQ47
VSS44

DQ52

DQ53
VSS57

CK1

CK1#
VSS45

DM6

VSS32

DQ54

DQ55
VSS35

DQ60

DQ61

VSS7
DQS#7

DQS7

VSS36

DQ62

DQ63
VSS13

SA0
SA1

H 5.2 H 9.2

DDR_A_D4

4

DDR_A_D0

6
8

DDR_A_DM0

10
12

DDR_A_D7

14

DDR_A_D1

16
18

DDR_A_D13

20

DDR_A_D12

22
24

DDR_A_DM1

26
28
30
32
34

DDR_A_D15

36

DDR_A_D10

38
40

42

DDR_A_D16

44

DDR_A_D21

46
48

PM_EXTTS#0 PM_EXTTS#1

50

DDR_A_DM2

52
54

DDR_A_D18

56

DDR_A_D22

58
60

DDR_A_D29

62

DDR_A_D24

64
66

DDR_A_DQS#3

68

DDR_A_DQS3

70
72

DDR_A_D30

74

DDR_A_D26

76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_CKE1_DIMMA 6,16

DDR_A_MA11
DDR_A_MA7
DDR_A_MA6

DDR_A_MA4
DDR_A_MA2
DDR_A_MA0

DDR_A_BS1
DDR_A_RAS#

DDR_CS0_DIMMA# 6,16

M_ODT0

DDR_A_MA13

DDR_A_D32
DDR_A_D33

DDR_A_DM4
DDR_A_D38

DDR_A_D35
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D43

DDR_A_D47
DDR_A_D48

DDR_A_D52

DDR_A_DM6
DDR_A_D54

DDR_A_D55
DDR_A_D57

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D58

R392

R392
10K

10K

1 2

1 2

3

M_CLK_DDR0 6
M_CLK_DDR#0 6

DDR_A_BS1 7,16
DDR_A_RAS# 7,16

M_ODT0 6,16

M_CLK_DDR1 6
M_CLK_DDR#1 6

R390

R390
10K

10K

DDR_A_DM[0..7] 7
DDR_A_D[0..63] 7
DDR_A_DQS[0..7] 7
DDR_A_DQS#[0..7] 7
DDR_A_MA[0..14] 7,16

+V_DDR_MCH_REF

12

C510

C510

0.1U_10V

0.1U_10V

PM_EXTTS#0 6

+3.3V_RUN

12

C504

C504

2.2U_6.3V

2.2U_6.3V

Modify X01-21

12

C508

C508

0.1U_10V

0.1U_10V

12

C509

C509

2.2U_6.3V

2.2U_6.3V

DDR_CKE3_DIMMB6,16

DDR_B_BS27,16

DDR_CS3_DIMMB#6,16

DDR_B_BS07,16
DDR_B_WE#7,16

DDR_B_CAS#7,16

+3.3V_RUN

4

M_ODT36,16

DDR_B_D5
DDR_B_D4

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D11
DDR_B_D10

DDR_B_D17
DDR_B_D20

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D23
DDR_B_D29

DDR_B_D28
DDR_B_DM3

DDR_B_D31
DDR_B_D27

DDR_B_BS2

DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10

DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

M_ODT3
DDR_B_D37

DDR_B_D38
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D34

DDR_B_D35
DDR_B_D41 DDR_B_D44

DDR_B_D40
DDR_B_DM5
DDR_B_D46 DDR_B_D42

DDR_B_D43 DDR_B_D47
DDR_B_D53

DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D54

DDR_B_D56
DDR_B_D57

DDR_B_DM7
DDR_B_D58

DDR_B_D63 DDR_B_D62
ICH_SMBDATAICH_SMBDATA

ICH_SMBCLK

SMbus address A4

SLAVE

+1.8V_SUS +1.8V_SUS

+V_DDR_MCH_REF

JDIM2

JDIM2

1

VREF

3

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

TYC_2-1734073-2

TYC_2-1734073-2

CLOCK 2,3

CKE 2,3CKE 0,1

5

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

84

A15

86

A14

88

VDD11

90

PC4800 DDR2 SDRAM

SO-DIMM (200P)

PC4800 DDR2 SDRAM

SO-DIMM (200P)

A11

92

A7

94

A6

96

VDD4

98

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0
SA1

200

R411 10KR411 10K

R413

R413
10K

10K

1 2

DDR_B_D0
DDR_B_D1

DDR_B_DM0
DDR_B_D7

DDR_B_D6
DDR_B_D12

DDR_B_D13
DDR_B_DM1

DDR_B_D14
DDR_B_D15

DDR_B_D21
DDR_B_D16

DDR_B_DM2
DDR_B_D18DDR_B_D22

DDR_B_D19
DDR_B_D24

DDR_B_D25
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D30

DDR_B_D26

DDR_CKE4_DIMMB 6,16

DDR_B_MA14DDR_A_MA14
DDR_B_MA11

DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_BS1
DDR_B_RAS#

DDR_CS2_DIMMB# 6,16

M_ODT2

DDR_B_MA13

DDR_B_D32
DDR_B_D36

DDR_B_DM4
DDR_B_D39

DDR_B_D33
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D52
DDR_B_D48

DDR_B_DM6
DDR_B_D51

DDR_B_D55DDR_B_D50
DDR_B_D60

DDR_B_D61
DDR_B_DQS#7

DDR_B_DQS7

DDR_B_D59

6

DDR_B_DM[0..7] 7
DDR_B_D[0..63] 7
DDR_B_DQS[0..7] 7
DDR_B_DQS#[0..7] 7
DDR_B_MA[0..14] 7,16

M_CLK_DDR3 6
M_CLK_DDR#3 6

PM_EXTTS#1 6

DDR_B_BS1 7,16
DDR_B_RAS# 7,16

M_ODT2 6,16

M_CLK_DDR4 6
M_CLK_DDR#4 6

+3.3V_RUN

12

+V_DDR_MCH_REF

12

C467

C471

C471

0.1U_10V

0.1U_10V

C467

2.2U_6.3V

2.2U_6.3V

Place these Caps near So-Dimm1.

12

C875

C875

2.2U_6.3V

2.2U_6.3V

12

C891

C891

2.2U_6.3V

2.2U_6.3V

12

C889

C889

2.2U_6.3V

2.2U_6.3V

12

C893

C893

2.2U_6.3V

2.2U_6.3V

+1.8V_SUS

12

C892

C892

2.2U_6.3V

2.2U_6.3V

+1.8V_SUS

12

Place these Caps near So-Dimm2.

12

12

C870

C870

C873

C873

2.2U_6.3V

2.2U_6.3V

2.2U_6.3V

2.2U_6.3V

+1.8V_SUS

Place these Caps near So-Dimm1.

12

12

+1.8V_SUS

12

+3.3V_RUN

Title

Title

Title

DDR2_SO-DIMM (200P) X 2

DDR2_SO-DIMM (200P) X 2

DDR2_SO-DIMM (200P) X 2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GM5 B2A

GM5 B2A

GM5 B2A

Date: Sheet

Date: Sheet

Date: Sheet

C888

C888

C501

C501

0.1U_10V

0.1U_10V

0.1U_10V

0.1U_10V

Place these Caps near So-Dimm2.

12

C890

C890

C497

C497

0.1U_10V

0.1U_10V

0.1U_10V

0.1U_10V

12

7

12

C523

C523

2.2U_6.3V

2.2U_6.3V

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

C520

C520

0.1U_10V

0.1U_10V

12

C872

C872

2.2U_6.3V

2.2U_6.3V

12

C498

C498

0.1U_10V

0.1U_10V

12

C496

C496

0.1U_10V

0.1U_10V

12

C874

C874

2.2U_6.3V

2.2U_6.3V

12

C500

C500

0.1U_10V

0.1U_10V

12

C499

C499

0.1U_10V

0.1U_10V

12

C871

C871

2.2U_6.3V

2.2U_6.3V

of

of

of

15 62Wednesday, June 25, 2008

15 62Wednesday, June 25, 2008

15 62Wednesday, June 25, 2008

8

1

2

3

4

5

6

7

8

+0.9V_DDR_VTT

A A

B B

C C

DDR_CS0_DIMMA#6,15

D D

1

Please these resistor
closely DIMMA,all
trace length<750 mil.

12

+0.9V_DDR_VTT

12

T194

T194
PAD

PAD

2

C529

C529

0.1U_10V

0.1U_10V

C469

C469

0.1U_10V

0.1U_10V

DDR_CS1_DIMMA#6,15
DDR_CKE0_DIMMA6,15
DDR_CKE1_DIMMA6,15

Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.

12

C512

C512

0.1U_10V

0.1U_10V

12

C489

C489

0.1U_10V

0.1U_10V

DDR_A_MA[0..14]7,15 DDR_B_MA[0..14] 7,15

DDR_A_BS17,15
DDR_A_RAS#7,15

M_ODT06,15

DDR_A_BS27,15

DDR_A_BS07,15

DDR_A_CAS#7,15
DDR_A_WE#7,15

M_ODT16,15

12

C468

C468

0.1U_10V

0.1U_10V

12

C490

C490

0.1U_10V

0.1U_10V

12

C494

C494

0.1U_10V

0.1U_10V

12

C515

C515

0.1U_10V

0.1U_10V

DDR_A_MA11
DDR_A_MA7

DDR_A_MA6
DDR_A_MA4

DDR_A_BS1
DDR_A_RAS#

DDR_A_MA13
M_ODT0

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA3
DDR_A_MA5

DDR_A_BS0
DDR_A_MA10

DDR_A_CAS#
DDR_A_WE#

DDR_A_MA2
DDR_A_MA0

DDR_A_MA1

3

12

12

12

R388 56R388 56
R386 56R386 56
R402 56R402 56
R387 56R387 56
R389 56R389 56
R401 56R401 56
R400 56R400 56

C511

C511

0.1U_10V

0.1U_10V

C513

C513

0.1U_10V

0.1U_10V

RP25

RP25

2
4

4P2R-S-56

4P2R-S-56

RP26

RP26

2
4

4P2R-S-56

4P2R-S-56

RP28

RP28

2
4

4P2R-S-56

4P2R-S-56

RP29

RP29

2
4

4P2R-S-56

4P2R-S-56

RP13

RP13

2
4

4P2R-S-56

4P2R-S-56

RP12

RP12

2
4

4P2R-S-56

4P2R-S-56

RP9

RP9

2
4

4P2R-S-56

4P2R-S-56

RP10

RP10

2
4

4P2R-S-56

4P2R-S-56

RP11

RP11

2
4

4P2R-S-56

4P2R-S-56

RP27

RP27

2
4

4P2R-S-56

4P2R-S-56

1 2
1 2
1 2
1 2
1 2
1 2
1 2

C527

C527

0.1U_10V

0.1U_10V

12

C465

C465

0.1U_10V

0.1U_10V

1
3

1
3

1
3

1
3

1
3

1
3

1
3

1
3

1
3

1
3

12

C514

C514

0.1U_10V

0.1U_10V

12

C466

C466

0.1U_10V

0.1U_10V

+0.9V_DDR_VTT

4

12

12

C526

C526

C531

C531

0.1U_10V

0.1U_10V

0.1U_10V

0.1U_10V

12

12

C464

C464

C470

C470

0.1U_10V

0.1U_10V

0.1U_10V

0.1U_10V

RP36

RP36

1
3

4P2R-S-56

4P2R-S-56

RP35

RP35

1
3

4P2R-S-56

4P2R-S-56

RP38

RP38

1
3

4P2R-S-56

4P2R-S-56

RP39

RP39

1
3

4P2R-S-56

4P2R-S-56

RP34

RP34

1
3

4P2R-S-56

4P2R-S-56

RP32

RP32

1
3

4P2R-S-56

4P2R-S-56

RP33

RP33

1
3

4P2R-S-56

4P2R-S-56

RP30

RP30

1
3

4P2R-S-56

4P2R-S-56

RP31

RP31

1
3

4P2R-S-56

4P2R-S-56

RP37

RP37

1
3

4P2R-S-56

4P2R-S-56

R406 56R406 56
R403 56R403 56
R417 56R417 56
R405 56R405 56
R415 56R415 56
R404 56R404 56
R416 56R416 56

2
4

2
4

2
4

2
4

2
4

2
4

2
4

2
4

2
4

2
4

12
12
12
12
12
12
12

12

C528

C528

0.1U_10V

0.1U_10V

12

C472

C472

0.1U_10V

0.1U_10V

12

12

DDR_B_MA6
DDR_B_MA2

DDR_B_MA11
DDR_B_MA7

DDR_B_BS1
DDR_B_RAS#

M_ODT2
DDR_B_MA13

DDR_B_MA3
DDR_B_MA5

DDR_B_MA9
DDR_B_MA8

DDR_B_MA1
DDR_B_MA12

DDR_B_BS0
DDR_B_MA10

DDR_B_CAS#
DDR_B_WE#

DDR_B_MA4
DDR_B_MA0

DDR_B_MA14DDR_A_MA14

5

C493

C493

0.1U_10V

0.1U_10V

C516

C516

0.1U_10V

0.1U_10V

12

12

12

DDR_B_BS1 7,15
DDR_B_RAS# 7,15

M_ODT2 6,15

DDR_B_BS0 7,15

DDR_B_CAS# 7,15
DDR_B_WE# 7,15

C517

C517

C491

C491

0.1U_10V

0.1U_10V

0.1U_10V

0.1U_10V

12

C492

C492

C530

C530

0.1U_10V

0.1U_10V

0.1U_10V

0.1U_10V

Please these resistor
closely DIMMB,all
trace length<750 mil.

M_ODT3 6,15

DDR_B_BS2 7,15
DDR_CS2_DIMMB# 6,15
DDR_CS3_DIMMB# 6,15
DDR_CKE4_DIMMB 6,15
DDR_CKE3_DIMMB 6,15

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

6

Date: Sheet

COMPUTER

DDR2 RES. ARRAY

DDR2 RES. ARRAY

DDR2 RES. ARRAY

GM5 B2A

GM5 B2A

GM5 B2A

7

of

of

of

16 62Wednesday, June 25, 2008

16 62Wednesday, June 25, 2008

16 62Wednesday, June 25, 2008

8

1

2

3

4

5

6

7

8

Add capacitor pads for improving WWAN.

Y2

Y2

21

14.318MHZ

14.318MHZ

10

10

CLK_ICH_48M
CLK_ICH_14M
CLK_PCI_8512
CLK_PCI_PCCARD
CLK_PCI_ICH

CLK_XTAL_OUTCLK_XTAL_IN

C443

C443
33P

33P

1 2

50

50

SATA_CLKREQ#
CLK_3GPLLREQ#

CLK_LPC_DEBUG
CLK_PCI_PCCARD

CLK_PCI_ICH PCI_ICH
CLK_ICH_48M

1 2

L55 BLM18SG260L55 BLM18SG260

CLK_ICH_14M

12

C459

C459

0.1U

0.1U

10

10

R359 2.2R359 2.2

1 2

R391 2.2R391 2.2

1 2

R358 2.2R358 2.2

1 2

R377 2.2R377 2.2

1 2

12

C476

C476

0.1U

0.1U

R365 475R365 475
R364 475/FR364 475/F

1 2

R363 22R363 22

1 2

R354 33R354 33
R353 33R353 33
R350 33R350 33
R375 33R375 33
R372 8.2KR372 8.2K

1 2

R374 8.2KR374 8.2K

1 2

R367 8.2KR367 8.2K

1 2

R366 33R366 33

+CK_VDD_MAIN

12

10

10

+CK_VDD_PCI

+CK_VDD_PLL3

+CK_VDD_48

12

10

10

+CK_VDD_SRC

2

C486

C486

0.1U

0.1U

C448

C448

0.1U

0.1U

12

C462

C462

0.1U

0.1U

10

10

12

10

10

12

10

10

12

6.3

6.3

603

603

12

10

10

12
12
12
12

12

UMA without iAMT

C446

C446

0.1U

0.1U

C461

C461

0.1U

0.1U

C447

C447

4.7U

4.7U

C460

C460

0.1U

0.1U

12

C473

C473

0.1U

0.1U

10

10

12

C1005

C1005

0.1U

0.1U

10

10

1 2

10

10

+CK_VDD_PCI
+CK_VDD_PLL3

+CK_VDD_48
+CK_VDD_SRC

+CK_VDD_MAIN

SATA_CLKREQ#_C
CLK_3GPLLREQ#_C
PCI_PCCARD
PCI_SIOCLK_PCI_8512
27M_SEL

FSA
FSB
FSC

CLK_XTAL_OUT
CLK_XTAL_IN

CLK_SDATA
CLK_SCLK

12

C485

C485

0.1U

0.1U

10

10

C993

C993

0.1U

0.1U

3

U19

U19

9

VDD_PCI

4

VDD_REF

23

VDD_PLL3

16

VDD_48

46

VDD_SRC

62

VDD_CPU

19

VDD_IO

27

VDD_IO

33

VDD_IO

43

VDD_IO

52

VDD_IO

56

VDD_IO

15

GND

18

GND

22

GND

26

GND

30

GND

36

GND

49

GND

59

GND

1

GND

8

CR#_A/PCI-0

10

CR_B/PCI-1

11

TME/PCI-2

12

SRC5_EN/PCI-3

13

27M_SEL/PCI-4

14

ITP_EN/PCIF-5#

17

FSA/USB48

64

FSB/TEST_MODE

5

FSC/TEST_SEL/REF

55

RESET#

63

CK_PWRGD/PD#

2

XOUT

3

XIN

6

SDATA

7

SCLK

SLG8SP513V

SLG8SP513V

Modify X01-9

C487

C487
10U_NC

10U_NC

1 2

6.3

6.3

SMbus address D2

These are for
backdrive issue.

CK505

CK505

QFN64

QFN64

SRC-8/CPU_ITP

SRC-8#/CPU_ITP#

SRC-0/DOT96

SRC-0#/DOT96#

SRC-1/SE1

SRC-1#/SE2

SRC-2/SATA

SRC-2#/SATA#

CR#_C/SRC-3

CR#_D/SRC-3#

PCI_STOP#/SRC-5

CPU_STOP#/SRC5-5#

CR#_F/SRC-7

CR#_E/SRC-7#

SRC-10#

CR#_H/SRC-11

CR#_G/SRC-11#

POP RESISTOR FOR UMA

DOT96_SSC
DOT96_SSC#

27M_NSS
27M_SS

CPU_ITP
CPU_ITP#

SMBDAT126,31,39

SMBCLK126,31,39

4
2

4
2

2
4

+3.3V_RUN

RP3

RP3

2

3 1

2N7002W-7-F

2N7002W-7-F

+3.3V_RUN

2

3 1

2N7002W-7-F

2N7002W-7-F

4

CPU-0

CPU-0#

CPU-1

CPU-1#

SRC-4

SRC-4#

SRC-6

SRC-6#

SRC-9

SRC-9#
SRC-10

2.2KX2

2.2KX2

Q40

Q40

Q39

Q39

GND

3
1

3
1

1
3

CPU_BCLK

61

CPU_BCLK#

60

MCH_BCLK

58

MCH_BCLK#

57

CPU_ITP

54

CPU_ITP#

53

DOT96_SSC

20

DOT96_SSC#

21

27M_NSS

24

27M_SS

25

PCIE_SATA

28

PCIE_SATA#

29

PCIE_MINI3

31

PCIE_MINI3#

32

MCH_3GPLL

34

MCH_3GPLL#

35
45

44

PCIE_EXPCARD

48

PCIE_EXPCARD#

47

MINI1CLK_REQ#_C MINI1CLK_REQ#

51
50

PCIE_MINI2

37

PCIE_MINI2#

38

PCIE_ICH

41

PCIE_ICH#

42

PCIE_LOM

40

PCIE_LOM#

39

65

RP6 0_UMARP6 0_UMA

RP14 0_UMARP14 0_UMA

RP15 0_NCRP15 0_NC

4

3

2

1

4

3

2

1

4

3

2

1

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

4

3

2

1 2
1 2

2
4

2
4

4
2

1

RP21 0RP21 0

1
3

1
3

3
1

R394 475/FR394 475/F
R395 475/FR395 475/F

to MCH DPLL_REF_CLK

MCH_DREFCLK 6

MCH_DREFCLK# 6

to MCH DPLL_REF_SSCLK

DREF_SSCLK 6
DREF_SSCLK# 6

CLK_CPU_ITP 3

CLK_CPU_ITP# 3

POP for ITP use

Non-iAMT

2

4

1

3

CLK_SDATA

CLK_SCLK

5

+3.3V_RUN

27M_SEL

RP5 0RP5 0

RP7 0RP7 0

RP17 0RP17 0

RP4 0_DISRP4 0_DIS

RP8 0_DISRP8 0_DIS

RP16 0RP16 0

RP18 0RP18 0

RP20 0RP20 0

RP24 0RP24 0

CARD_CLK_REQ#CARD_CLK_REQ#_C

RP23 0RP23 0

RP22 0RP22 0

R351

R351
10K_DIS

10K_DIS

1 2

R342

R342
10K_UMA

10K_UMA

1 2

6

PCI_ICH

+3.3V_RUN

1 2

1 2

27M_SEL

27M_SEL
(PIN13)

0=UMA
1 = Disc.

GRFX down

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5

CLK_PCIE_MINI1 34
CLK_PCIE_MINI1# 34

CLK_PCIE_VGA 18
CLK_PCIE_VGA# 18

CLK_VGA_27M_NSS 19

CLK_VGA_27M_SS 19

CLK_PCIE_SATA 11
CLK_PCIE_SATA# 11

CLK_PCIE_MINI3 33
CLK_PCIE_MINI3# 33

CLK_MCH_3GPLL 6
CLK_MCH_3GPLL# 6

H_STP_PCI# 13
H_STP_CPU# 13

CLK_PCIE_EXPCARD 30
CLK_PCIE_EXPCARD# 30

MINI1CLK_REQ# 34
CARD_CLK_REQ# 30

CLK_PCIE_MINI2 33
CLK_PCIE_MINI2# 33

CLK_PCIE_ICH 12
CLK_PCIE_ICH# 12

CLK_PCIE_LOM 42
CLK_PCIE_LOM# 42

CLK_3GPLLREQ#
SATA_CLKREQ#
CARD_CLK_REQ#
MINI1CLK_REQ#
PCI_PCCARD

R339

R339
10K_NC

10K_NC

R340

R340
10K_NC

10K_NC

to ATI VGA

H_STP_PCI#
H_STP_CPU#

PCI_SIO
PCI_ICH

FSC FSB FSA CPU SRC PCI
1
0

1

0

1

0
00
1

0

1

1
1

1

R397 10KR397 10K
R396 10KR396 10K

R355 10KR355 10K
R356 10KR356 10K
R398 10KR398 10K
R399 10KR399 10K

R343 10K_NCR343 10K_NC

1 2

R352 10K_NCR352 10K_NC

1 2

R341 10K_NCR341 10K_NC

1 2

100

100

1
10
1
0
0
0
0
1

133
166
200
266
333
400

RSVD

100
100
100
100
100
100
100

12
12
12
12

330
33
33
33
33
33
33
33

12
12

+3.3V_RUN

+3.3V_RUN

PIN20 PIN21 PIN24 PIN25

DOT96T

DOT96C

SRCT0 SRCC0

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

COMPUTER

CLOCK GENERATOR

CLOCK GENERATOR

CLOCK GENERATOR

GM5 B2A

GM5 B2A

GM5 B2A

7

96/
100M_T

27Mout

96/
100M_C

27MSSout

17 62Wednesday, June 25, 2008

17 62Wednesday, June 25, 2008

17 62Wednesday, June 25, 2008

8

of

of

of

C457 27P

C457 27P

1 2

C440 27P_NC

C440 27P_NC

1 2

C431 27P_NC

C431 27P_NC

1 2

50

50

C432 27P_NC

C432 27P_NC

1 2

50

50

C439 27P_NC

C439 27P_NC

1 2

50

50
50

50
50

50

A A

C437

C437
33P

33P

1 2

50

50

B B

CPU_MCH_BSEL03,6

14.318MHz

SATA_CLKREQ#13

CLK_3GPLLREQ#6

CLK_LPC_DEBUG33
CLK_PCI_PCCARD28

CLK_PCI_851231
CLK_PCI_ICH12
CLK_ICH_48M13

CPU_MCH_BSEL13,6
CPU_MCH_BSEL23,6

CLK_ICH_14M13
CLK_PWRGD13

CLK_LPC_DEBUG FOR DEBUG
NEED POP RESISTOR

+3.3V_RUN

L58 BLM21PG600SN1D

L58 BLM21PG600SN1D

805

805

120 ohms@100Mhz

C C

L51

L51
BLM21PG600SN1D

BLM21PG600SN1D

805

805

120 ohms@100Mhz

D D

1

5

4

3

2

1

PCIE_MTX_GRX_P[0..15]6
PCIE_MTX_GRX_N[0..15]6

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0

PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1

PCIE_MTX_GRX_P2

D D

C C

CLK_PCIE_VGA17
CLK_PCIE_VGA#17

PLTRST_DELAY#13

PCIE_MTX_GRX_N2

PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3

PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4

PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N5

PCIE_MTX_GRX_P6
PCIE_MTX_GRX_N6

PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N7

PCIE_MTX_GRX_P8
PCIE_MTX_GRX_N8

PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9

PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10

PCIE_MTX_GRX_P11
PCIE_MTX_GRX_N11

PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12

PCIE_MTX_GRX_P13
PCIE_MTX_GRX_N13

PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N14

PCIE_MTX_GRX_P15
PCIE_MTX_GRX_N15

Modify X02-20

AK33

AH35
AH34

AG35
AG34

AF33
AE33

AE35
AE34

AD35
AD34

AC35
AC34

AB33
AA33

AA35
AA34

AK35
AK34

AM32

AJ33

AJ35
AJ34

W35
W34

AJ31
AJ30

Y35
Y34

V33
U33

U35
U34

T35
T34

R35
R34

U43A

U43A

PCIE_RX0P
PCIE_RX0N

PCIE_RX1P
PCIE_RX1N

PCIE_RX2P
PCIE_RX2N

PCIE_RX3P
PCIE_RX3N

PCIE_RX4P
PCIE_RX4N

PCIE_RX5P
PCIE_RX5N

PCIE_RX6P
PCIE_RX6N

PCIE_RX7P
PCIE_RX7N

PCIE_RX8P
PCIE_RX8N

PCIE_RX9P
PCIE_RX9N

PCIE_RX10P
PCIE_RX10N

PCIE_RX11P
PCIE_RX11N

PCIE_RX12P
PCIE_RX12N

PCIE_RX13P
PCIE_RX13N

PCIE_RX14P
PCIE_RX14N

PCIE_RX15P
PCIE_RX15N

Clock

Clock

PCIE_REFCLKP
PCIE_REFCLKN

SM Bus

SM Bus

NC_SMB_DATA
NC_SMBCLK

PERSTB

M86ME-LP_DIS

M86ME-LP_DIS

PART 1 OF 7

PART 1 OF 7

P

P
C

C
I

I

-

­E

E
X

X
P

P
R

R
E

E
S

S
S

S

I

I
N

N
T

T
E

E
R

R
F

F
A

A
C

C
E

E

PCIE_TX0P

PCIE_TX0N

PCIE_TX1P

PCIE_TX1N

PCIE_TX2P

PCIE_TX2N

PCIE_TX3P

PCIE_TX3N

PCIE_TX4P

PCIE_TX4N

PCIE_TX5P

PCIE_TX5N

PCIE_TX6P

PCIE_TX6N

PCIE_TX7P

PCIE_TX7N

PCIE_TX8P

PCIE_TX8N

PCIE_TX9P

PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

Calibration

Calibration

PCIE_CALRN
PCIE_CALRP
NC_DRAM_0

NC_DRAM_1

NC_AC_BATT

NC_FAN_TACH

AG31
AG30

AF31
AF30

AF28
AF27

AD31
AD30

AD28
AD27

AB31
AB30

AB28
AB27

AA31
AA30

AA28
AA27

W31
W30

W28
W27

V31
V30

V28
V27

U31
U30

U28
U27

R31
R30

AG26
AJ27
AF3

AG9
AK29
AK14

PCIE_MRX_GTX_C_P0
PCIE_MRX_GTX_C_N0

PCIE_MRX_GTX_C_P1
PCIE_MRX_GTX_C_N1

PCIE_MRX_GTX_C_P2
PCIE_MRX_GTX_C_N2

PCIE_MRX_GTX_C_P3
PCIE_MRX_GTX_C_N3

PCIE_MRX_GTX_C_P4
PCIE_MRX_GTX_C_N4

PCIE_MRX_GTX_C_P5
PCIE_MRX_GTX_C_N5

PCIE_MRX_GTX_C_P6
PCIE_MRX_GTX_C_N6

PCIE_MRX_GTX_C_P7
PCIE_MRX_GTX_C_N7

PCIE_MRX_GTX_C_P8
PCIE_MRX_GTX_C_N8

PCIE_MRX_GTX_C_P9
PCIE_MRX_GTX_C_N9

PCIE_MRX_GTX_C_P10
PCIE_MRX_GTX_C_N10

PCIE_MRX_GTX_C_P11
PCIE_MRX_GTX_C_N11

PCIE_MRX_GTX_C_P12
PCIE_MRX_GTX_C_N12

PCIE_MRX_GTX_C_P13
PCIE_MRX_GTX_C_N13

PCIE_MRX_GTX_C_P14
PCIE_MRX_GTX_C_N14

PCIE_MRX_GTX_C_P15
PCIE_MRX_GTX_C_N15

R131 2K/F_DIS

R131 2K/F_DIS

R126

R126

1.27K_DIS

1.27K_DIS

402

402

402

402

+PCIE_VDDC

PCIE_MRX_GTX_P[0..15]6
PCIE_MRX_GTX_N[0..15]6

PCIE_MRX_GTX_P0PCIE_MRX_GTX_P0
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_P2PCIE_MRX_GTX_P2
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_P4PCIE_MRX_GTX_P4
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_P6PCIE_MRX_GTX_P6
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_P8PCIE_MRX_GTX_P8
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_P10PCIE_MRX_GTX_P10
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_P12PCIE_MRX_GTX_P12
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_P14PCIE_MRX_GTX_P14
PCIE_MRX_GTX_P15
PCIE_MRX_GTX_N0
PCIE_MRX_GTX_N1PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_N3PCIE_MRX_GTX_N3
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_N5PCIE_MRX_GTX_N5
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_N7PCIE_MRX_GTX_N7
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_N9PCIE_MRX_GTX_N9
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_N11PCIE_MRX_GTX_N11
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_N13PCIE_MRX_GTX_N13
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_N15

C213 0.1U_DIS10C213 0.1U_DIS10
C231 0.1U_DIS10C231 0.1U_DIS10
C233 0.1U_DIS10C233 0.1U_DIS10
C211 0.1U_DIS10C211 0.1U_DIS10
C230 0.1U_DIS10C230 0.1U_DIS10
C210 0.1U_DIS10C210 0.1U_DIS10
C208 0.1U_DIS10C208 0.1U_DIS10
C227 0.1U_DIS10C227 0.1U_DIS10
C206 0.1U_DIS10C206 0.1U_DIS10
C226 0.1U_DIS10C226 0.1U_DIS10
C224 0.1U_DIS10C224 0.1U_DIS10
C204 0.1U_DIS10C204 0.1U_DIS10
C220 0.1U_DIS10C220 0.1U_DIS10
C222 0.1U_DIS10C222 0.1U_DIS10
C200 0.1U_DIS10C200 0.1U_DIS10
C201 0.1U_DIS10C201 0.1U_DIS10
C214 0.1U_DIS10C214 0.1U_DIS10
C232 0.1U_DIS10C232 0.1U_DIS10
C234 0.1U_DIS10C234 0.1U_DIS10
C212 0.1U_DIS10C212 0.1U_DIS10
C229 0.1U_DIS10C229 0.1U_DIS10
C209 0.1U_DIS10C209 0.1U_DIS10
C207 0.1U_DIS10C207 0.1U_DIS10
C228 0.1U_DIS10C228 0.1U_DIS10
C205 0.1U_DIS10C205 0.1U_DIS10
C225 0.1U_DIS10C225 0.1U_DIS10
C223 0.1U_DIS10C223 0.1U_DIS10
C203 0.1U_DIS10C203 0.1U_DIS10
C219 0.1U_DIS10C219 0.1U_DIS10
C221 0.1U_DIS10C221 0.1U_DIS10
C199 0.1U_DIS10C199 0.1U_DIS10
C202 0.1U_DIS10C202 0.1U_DIS10

PCIE_MRX_GTX_C_P0
PCIE_MRX_GTX_C_P1
PCIE_MRX_GTX_C_P2
PCIE_MRX_GTX_C_P3
PCIE_MRX_GTX_C_P4
PCIE_MRX_GTX_C_P5
PCIE_MRX_GTX_C_P6
PCIE_MRX_GTX_C_P7
PCIE_MRX_GTX_C_P8
PCIE_MRX_GTX_C_P9
PCIE_MRX_GTX_C_P10
PCIE_MRX_GTX_C_P11
PCIE_MRX_GTX_C_P12
PCIE_MRX_GTX_C_P13
PCIE_MRX_GTX_C_P14
PCIE_MRX_GTX_C_P15
PCIE_MRX_GTX_C_N0
PCIE_MRX_GTX_C_N1
PCIE_MRX_GTX_C_N2
PCIE_MRX_GTX_C_N3
PCIE_MRX_GTX_C_N4
PCIE_MRX_GTX_C_N5
PCIE_MRX_GTX_C_N6
PCIE_MRX_GTX_C_N7
PCIE_MRX_GTX_C_N8
PCIE_MRX_GTX_C_N9
PCIE_MRX_GTX_C_N10
PCIE_MRX_GTX_C_N11
PCIE_MRX_GTX_C_N12
PCIE_MRX_GTX_C_N13
PCIE_MRX_GTX_C_N14
PCIE_MRX_GTX_C_N15

B B

A A

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

COMPUTER

VGA-M82-S (PCIe)

VGA-M82-S (PCIe)

VGA-M82-S (PCIe)

GM5 B2A

GM5 B2A

GM5 B2A

1

of

of

of

18 62Wednesday, June 25, 2008

18 62Wednesday, June 25, 2008

18 62Wednesday, June 25, 2008

5

MEMORY APERTURE SIZE SELECT

MEMORY
SIZE

128MB

256MB

64MB

512MB

D D

Memory Straps
400 MHz 256MB(16M*16) Hynix
400 MHz 256MB(16M*16) Qimonda
500 MHz 256MB(16M*16) Hynix
500 MHz 256MB(16M*16) Qimonda
500 MHz 256MB(16M*16) Samsung

+3.3V_DELAY

R644

R644
R648

R648
R659 10K_NCR659 10K_NC

R54

R54

+1.8V_RUN

R667

R667
R82

R82
R669

R669
R674

C C

B B

R674

+3.3V_DELAY

CFG2

CFG3

GPIO13 GPIO12 GPIO11

GPIO9

X

0

X

001

X

010

X

100

10K_DIS

10K_DIS

RAM_CFG0

10K_NC

10K_NC

RAM_CFG1
RAM_CFG2

10K_NC

10K_NC

RAM_CFG3

10K_DIS

10K_DIS

RAM_TYPE_CFG0

10K_DIS

10K_DIS

RAM_TYPE_CFG1

10K_NC

10K_NC

RAM_TYPE_CFG2

10K_DIS

10K_DIS

RAM_TYPE_CFG3

10K

10K

GFX_CORE_CNTRL050

GFX_CORE_CNTRL150

10K

10K

10K_NC

10K_NC

10K_NC

10K_NC

10K_NC

10K_NC

10K_NC

10K_NC

10K_NC

10K_NC

10K_NC

10K_NC

10K_DIS

10K_DIS

10K_DIS

10K_DIS

1 2

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
HDMI_HD_EN
GPIO10
ATI_VGAHSYNC
GFX_CLKREQ#

TEMP_FAIL

R651

R651
R661

R661
R650

R650
R662

R662
R645

R645
R660

R660
R646

R646
R649 10K_NCR649 10K_NC
R58

R58
R148

R148
R61

R61
R666 10K_NCR666 10K_NC

R119 10K_DISR119 10K_DIS

GFX_CORE_CNTRL_TABLE

GFX_CORE_CNTRL0 GFX_CORE_CNTRL1 +VCC_GFX_CORE

LOW

HIGH

LOW

LOW

HIGH HIGH

OSC_SPREAD22

CLK_VGA_27M_SS17

CLK_VGA_27M_NSS17

OSC_OUT22

A A

R713 100/F_DISR713 100/F_DIS

R714 120/F_DISR714 120/F_DIS

CLK_VGA_27M_NSS_R

12

50

50

CFG0

CFG1

00

RAM_

RAM_
TYPE_CFG3

11
1110
1

RAM_

TYPE_CFG2

TYPE_CFG1

1

1

01
0110

0111

VRAM SIZE

VRAM TYPE

ATI_PANEL_BKEN31

Modify X01-26

TEMP_FAIL

12

Y3

21

27MHZ_NCY327MHZ_NC

R147 1M_NCR147 1M_NC

C797

C797
18P_NC

18P_NC

5

0.9V

0.95V

1.1V

R643 0_NCR643 0_NC

1 2

R658 0_NCR658 0_NC

1 2

Modify X02-20

R706 0_NCR706 0_NC

1 2

R699 0_NCR699 0_NC

1 2

12

C778

C778
18P_NC

18P_NC

50

50

Modify X02-20

499R/F_DIS

499R/F_DIS

249R_DIS

249R_DIS

+1.8V_RUN

R99

R99

R95

R95

CLK_VGA_27M_SS_R

CLK_VGA_27M_SS_R

12

R652

R652

8/15: The strap on VIP[3] is for enabling HD Audio on M86.

RAM_
TYPE_CFG0

1

Modify X02-20

CLK_VGA_27M_SS_R

THERMAL_INT#22

TEMP_FAIL20,52

BB_ENA20

GPIO_23_CLKREQB
DRIVES LOW
DURING RESET

PLACE VREF DIVIDER
AND CAP CLOSE TO ASIC

C94

C94

100nF_DIS

100nF_DIS

R652

R652
10K_NC

10K_NC

+3.3V_DELAY

R104

R104
R103

R103
R110

R110
R111

R111
R93

R93
R98

R98
R97

R97
R94

R94
R88

R88

R79

R79
R74

R74

RAM_TYPE_CFG0
RAM_TYPE_CFG1
RAM_TYPE_CFG2
RAM_TYPE_CFG3

TEMP_FAIL

VGA_THERMDN22
VGA_THERMDP22

4

10K_NC

10K_NC
10K_NC

10K_NC
10K_NC

10K_NC
10K_DIS

10K_DIS
10K_NC

10K_NC
10K_NC

10K_NC
10K_NC

10K_NC
10K_NC

10K_NC
10K_NC

10K_NC

10K_NC

10K_NC
10K_NC

10K_NC

GFX_CLKREQ#

+DPLL_PVDD

+PCIE_PVDD

XTAIN
XTAOUT

+DPLL_VDDC

4

VIP_0
VIP_1
VIP_2
VIP_3
VIP_4
VIP_5
VIP_6
VIP_7

VHAD0

HDMI_HD_EN
RAM_CFG3
GPIO10
RAM_CFG0
RAM_CFG1
RAM_CFG2

T95 PAD

T95 PAD

Modify X02-20

T4 PADT4T4 PAD

T5 PADT5T5 PAD

R571KR57

T8 PADT8T8 PAD

1K

T6 PADT6T6 PAD
T9 PADT9T9 PAD
T12 PAD

T12 PAD
T11 PAD

T11 PAD
T7 PADT7T7 PAD
T10 PAD

T10 PAD
T96 PAD

T96 PAD
T97 PAD

T97 PAD
T99 PAD

T99 PAD
T98 PAD

T98 PAD

+MPVDD

PSYNC
DVALID

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6

T95

T95

T4

T5

T8
T6
T9
T12

T12
T11

T11
T7
T10

T10
T96

T96
T97

T97
T99

T99
T98

T98

U43B

U43B

AM12

VIP_0

AL12

VIP_1

AJ12

VIP_2

AH12

VIP_3

AM10

VIP_4

AL10

VIP_5

AJ10

VIP_6

AH10

VIP_7

AM9

VHAD_0

AL9

VHAD_1

AJ9

VPHCTL

AL7

VPCLK0

AK7

VIPCLK

AM7

PSYNC

AJ7

DVALID

AK6

SDA

AM6

SCL

AN8

DVPCNTL__MVP_0

AP8

DVPCNTL__MVP_1

AG1

DVPCNTL_0

AH3

DVPCNTL_1

AH2

DVPCNTL_2

AH1

DVPCLK

AJ3

DVPDATA_0

AJ2

DVPDATA_1

AJ1

DVPDATA_2

AK2

DVPDATA_3

AK1

DVPDATA_4

AL3

DVPDATA_5

AL2

DVPDATA_6

AL1

DVPDATA_7

AM3

DVPDATA_8

AM2

DVPDATA_9

AN2

DVPDATA_10

AP3

DVPDATA_11

AR3

DVPDATA_12

AN4

DVPDATA_13

AR4

DVPDATA_14

AP4

DVPDATA_15

AN5

DVPDATA_16

AR5

DVPDATA_17

AP5

DVPDATA_18

AP6

DVPDATA_19

AR6

DVPDATA_20

AN7

DVPDATA_21

AP7

DVPDATA_22

AR7

DVPDATA_23

AG2

GPIO_0

AF2

GPIO_1

AF1

GPIO_2

AE3

GPIO_3

AE2

GPIO_4

AE1

GPIO_5

AD3

GPIO_6

AD2

GPIO_7_BLON

AD1

GPIO_8_ROMSO

AD5

GPIO_9_ROMSI

AD4

GPIO_10_ROMSCK

AC3

GPIO_11

AC2

GPIO_12

AC1

GPIO_13

AB3

GPIO_14_HPD2

AB2

GPIO_15_PWRCNTL_0

AB1

GPIO_16_SSIN

AF5

GPIO_17_THERMAL_INT

AF4

GPIO_18_HPD3

AG4

GPIO_19_CTF

AG3

GPIO_20_PWRCNTL_1

AD9

GPIO_21_BBEN

AD8

GPIO_22_ROMCSB

AD7

GPIO_23_CLKREQB

AB4

GPIO_24_JMODE

AB6

GPIO_25_TDI

AB7

GPIO_26_TCK

AB9

GPIO_27_TMS

AA9

GPIO_28_TDO

AF8

GEN_A

AF7

GEN_B

AG5

GEN_C

AP9

GEN_D_HPD4

AR9

GEN_E

AP13

GEN_F

AR13

GEN_G

AD12

VREFG

AR20

DPLL_PVDD

AP20

DPLL_PVSS

AM35

PCIE_PVDD

A14

MPVDD

B15

MPVSS

AR33

XTALIN

AP33

XTALOUT

AG19

DPLL_VDDC

AG21

TS_FDO

AK4

DMINUS

AM4

DPLUS

M86ME-LP_DIS

M86ME-LP_DIS

VIP / I2C

VIP / I2C

MULTI_GFX

MULTI_GFX
EXTERNAL

EXTERNAL
TMDS

TMDS

GENERAL

GENERAL
PURPOSE

PURPOSE
I/O

I/O

PLL

PLL
CLOCKS

CLOCKS

THERMAL

THERMAL

PART 2 OF 7

PART 2 OF 7

INTEGRATED

INTEGRATED
TMDS/DP

TMDS/DP

DAC1

DAC1

DAC2

DAC2

DDC

DDC
DP AUX

DP AUX

DDC3DATA_DP3_AUXN

DDC3CLK_DP3_AUXP

DDC4DATA_DP4_AUXN

DDC4CLK_DP4_AUXP

TXCAM_DPA0P
TXCAP_DPA0N

TX0M_DPA1P
TX0P_DPA1N

TX1M_DPA2P
TX1P_DPA2N

TX2M_DPA3P
TX2P_DPA3N

TXCBM_DPB0P
TXCBP_DPB0N

TX3M_DPB1P
TX3P_DPB1N

TX4M_DPB2P
TX4P_DPB2N

TX5M_DPB3P
TX5P_DPB3N

DPA_PVDD
DPA_PVSS

DPB_PVDD
DPB_PVSS

DPB_VDDR_1
DPB_VDDR_2
DPA_VDDR_3
DPA_VDDR_4

DPB_VSSR_1
DPB_VSSR_2
DPB_VSSR_3
DPB_VSSR_4
DPB_VSSR_6
DPA_VSSR_5
DPA_VSSR_7
DPA_VSSR_8
DPA_VSSR_9

DPA_VSSR_10

DP_CALR

NC_TPVDDC

NC_TPVSSC

HPD1

HSYNC

VSYNC

RSET
AVDD

AVSSQ

VDD1DI
VSS1DI

COMP

V2SYNC

H2SYNC

A2VDD

A2VDDQ

A2VSSQ

VDD2DI
VSS2DI

R2SET

DDC1DATA

DDC1CLK

DDC2DATA

DDC2CLK

3

AN9
AN10

AR10
AP10

AR11
AP11

AR12
AP12

AR14
AP14

AR15
AP15

AR16
AP16

AR17
AP17

AM14
AL14

AH17
AG17

AN19
AN20
AP19
AR19

AN18
AP18
AR18
AN16
AN17
AN15
AN11
AN12
AN13
AN14

AG15
AH18
AG18
AG6

AR31

R

AP31

RB

AR30

G

AP30

GB

AR29

B

AP29

BB

AN29
AN30

AN31
AR32
AP32
AR28

AP28
AM19

R2

AL19

R2B

AM18

G2

AL18

G2B

AM17

B2

AL17

B2B

AK19

C

AK18

Y

AK17
AL15

AM15
AM21
AL21
AK21
AH22

AG22
AJ21
AM29

AL29
AJ15

AH15
AJ5

AJ4
AH14

AG14

3

+TPVDD

+DPB_VDDR
+DPA_VDDR

150/F_DISR112 150/F_DISR112

PLACE OR RESISTORS CLOSE TO ASIC

Modify X02-20

ATI_VGAHSYNC

R166

R166

12

499/F_DIS

499/F_DIS

+AVDD

+VDD1DI

+A2VDD
+A2VDDQ

+VDD2DI

R205 715/F_DISR205 715/F_DIS

12

ATI_LCD_DDCDAT 26
ATI_LCD_DDCCLK 26

ATI_HDMI_SDA 25
ATI_HDMI_SCL 25

ATI_CRT_DAT_DDC 27
ATI_CRT_CLK_DDC 27

ATI_HDMI_CLK- 25
ATI_HDMI_CLK+ 25

ATI_HDMI_TX0- 25
ATI_HDMI_TX0+ 25

ATI_HDMI_TX1- 25
ATI_HDMI_TX1+ 25

ATI_HDMI_TX2- 25
ATI_HDMI_TX2+ 25

ATI_VGAHSYNC 27
ATI_VGAVSYNC 27

ATI_VGA_RED

ATI_VGA_GRN

ATI_VGA_BLU

LVDS

HDMI

CRT

2

HDMI CONN

ATI_VGA_RED 27

ATI_VGA_GRN 27

ATI_VGA_BLU 27

R695

R695

ATI_LCD_DDCDAT
ATI_LCD_DDCCLK

2

ATI_VGA_BLU
ATI_VGA_GRN
ATI_VGA_RED

R698

R698
150/F_DIS

150/F_DIS

R696

R696

R695

R695

150/F_DIS

150/F_DIS

150/F_DIS

150/F_DIS

R698

R698

R696

R696

R141 2.2K_DISR141 2.2K_DIS
R165 2.2K_DISR165 2.2K_DIS

1

+3.3V_DELAY

R142

R142
10K_DIS

10K_DIS

Q84

Q84

2

MMST3904-7-F_DIS

MMST3904-7-F_DIS

1 3

12
12

R90

R90
10K_DIS

10K_DIS

Q82

Q82

2

MMST3904-7-F_DIS

MMST3904-7-F_DIS

1 3

DIS only

Layout Note:
Place 150 ohm
termination resistors
close to ATI CHIP.

+3.3V_DELAY

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

COMPUTER

VGA-G86GLM (VIDEO)

VGA-G86GLM (VIDEO)

VGA-G86GLM (VIDEO)

GM5 B2A

GM5 B2A

GM5 B2A

1

R85

R85
10K_DIS

10K_DIS

ATI_HDMI_DET 25

of

of

of

19 62Wednesday, June 25, 2008

19 62Wednesday, June 25, 2008

19 62Wednesday, June 25, 2008