Page 1
INTEGRATED CIRCUITS
DATA SH EET
UAA3522HL
Low power dual-band GSM
transceiver with an image rejecting
front-end
Preliminary specification
Supersedes data of 2000 Feb 18
File under Integrated Circuits, IC17
2000 Aug 15
Page 2
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
with an image rejecting front-end
FEATURES
• Dual-band application for Global System for Mobile
communication (GSM) and Digital Cellular
communication Systems (DCS)
• Low noise and wide dynamicrangesingle Intermediate
Frequency (IF) transceiver
• More than 30 dB on-chip image rejection in the receiver
• More than 60 dB gain control range
• I/Q demodulator with high performance integrated
baseband channel filter
• High precision I/Q modulator
• Transmit modulation loop architecture including offset
mixer and phase detector
• Dual Phase-Locked Loop (PLL) with on-chip IF Voltage
Controlled Oscillator (VCO)
• Fully differential design minimizing cross-talk and spurii
• 3-wire serial bus interface
• Functional down to 2.7 V and up to 3.3 V
• LQFP48 package.
APPLICATIONS
• GSM 900 MHz hand-held transceiver
• GSM/DCS dual-band solution with the UAA2077CM
(down to 3.2 V) or UAA2077TS/D (down to 2.7 V).
GENERAL DESCRIPTION
The UAA3522HL integrates the receiver and most of the
transmitter section of a GSM hand-held transceiver. Italso
integrates the receiver IF and the transmitter section of a
DCS transceiver.
The receiver comprises an RF and an IF section. The RF
(GSM) front-end amplifies the aerial signal, converts the
chosen channel frequency to an IF of 200 MHz, and also
provides more than 30 dB of image suppression. Some
selectivityisprovided at this stage by an off-chip bandpass
pre-filter. The IF section further amplifies the chosen
channel, maintains the gain at the required level,
demodulates the signal into I and Q components, and
provides channel selectivity at a baseband stage using
a high performance integrated low-pass filter. The IF gain
can be varied over a range of more than 60 dB. The offset
at the I and Q outputs can be cancelled out by software
using the 3-wire serial programming bus.
UAA3522HL
The input Low Noise Amplifier (LNA) can be switched off
via the bus to allow accurate calibration in the offset
cancellation mode.
The transmitter comprises a high precision I/Q modulator
and modulation loop architecture. The I/Q modulator
converts the baseband modulation frequency to the
transmit IF. The modulation loop architecture, which
includes an on-chip offset mixer and phase detector,
controls an external transmit RF VCO which converts the
transmit modulated IF signal to RF.
A receive RF VCO provides the Local Oscillator (LO)
signal to the image rejection mixers in the RF receiver.
An IF VCO provides the LO signal to the I/Q demodulator
and I/Q modulator in the receiver and transmitter sections
respectively.
The frequencies of theRF VCO and the IF VCO are set by
internal PLL circuits, which are programmable via the
3-wire serial bus. The RF and IF PLL comparison
frequencies are 200 kHz and 1 MHz respectively, derived
from a 13 MHz reference signal which has to be supplied
externally. The quadrature RF LO signals required by the
image rejection mixers are obtained using on-chip
Resistor Capacitor (RC) networks. The quadrature IF LO
signalsrequiredbytheI/Q modulator and I/Q demodulator
are obtained by dividing the frequency of the IF VCO
signal.
The IC can be powered on in either receiver (RX),
transmitter (TX) or synthesizer (SYN) operating mode
depending on the logic level at pins RXON, TXON and
SYNON, respectively. Alternatively, an operating mode
can be selected by software using the 3-wire serial
programming bus. In RX or TX mode, only those sections
of the IC which are required are switched on.
The GSM or DCS band is selected by the 3-wire serial
programming bus. When activating RX mode for DCS
applications, the receiver RF section can be disabled by
software so that only the receiver IF section is
powered-on.
The SYN mode is used to power-on the synthesizer prior
to activating the RX or TX mode. In SYN mode, some
internal LO buffers are also powered-on to minimize the
‘pulling’ effect of the VCO when either the receiver or the
transmitter are switched on.
2000 Aug 15 2
Page 3
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
QUICK REFERENCE DATA
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
f
i(RF)(RX)
f
o(RF)(TX)(GSM)
f
o(RF)(TX)(DCS)
f
IF
ORDERING INFORMATION
TYPE
NUMBER
UAA3522HL LQFP48 plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm SOT313-2
GSM band RF input frequency in RX mode 925 − 960 MHz
GSM band RF output frequency in TX mode 880 − 915 MHz
DCS band RF output frequency in TX mode 1710 − 1785 MHz
IF frequency in all modes − 200 − MHz
PACKAGE
NAME DESCRIPTION VERSION
2000 Aug 15 3
Page 4
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2000 Aug 15 4
andbook, full pagewidth
BLOCK DIAGRAM
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
with an image rejecting front-end
RX/TX
SWITCH
1710 to 1785 MHz
DCS BAND
1805 to1880 MHz
925 to 960 MHz
DCS RF
RX VCO
1510 to 1680
MHz
880 to 915 MHz
GSM BAND
POWER
AMPLIFIER
BALUN
BALUN
1080 to 1160
GSM TX RF VCO
880 to 915 MHz
DCS TX RF VCO
1710 to 1785 MHz
UAA2077XM
GSM RF
RX VCO
MHz
90°
PHASE
SHIFTER
0°
41,
42
30, 31
26
38, 39
35
×
×
CHARGE
PUMP
CHARGE
PUMP
PHASE
SHIFTER
90°
+
PHASE
×
90°
PHASE
SHIFTER
0°
SHIFTER
×
PROGRAMMABLE
DIVIDER
RF PHASE/
FREQUENCY
DETECTOR
DETECTOR
ADDER
PHASE
90°
+
ADDER
UAA3522HL
×
44, 45
SAW
8, 946, 47
90°
DIVIDER
÷5
ADDER
+
4, 5
2, 3
13,
14
16
23
4, 5
2, 3
FCA004
I
Q
REF OSC.
13 MHz
I
Q
B
A
S
E
B
A
N
D
&
A
U
D
I
O
I
N
T
E
R
F
A
C
E
UAA3522HL
×
0°
IF VCO
400 MHz
×
DIVIDER &
PHASE
÷2
SHIFTER
PROGRAMMABLE
DIVIDER
IF PHASE/
FREQUENCY
DETECTOR
DIVIDER
÷13
0°
IF VCO
XTAL
CHARGE
PUMP
×
90°
×
Fig.1 Block diagram.
Page 5
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
with an image rejecting front-end
PINNING
SYMBOL PIN DESCRIPTION
V
CCIF1
QA 2 Q path A baseband input/output
QB 3 Q path B baseband input/output
IA 4 I path A baseband input/output
IB 5 I path B baseband input/output
REFAGC 6 AGC reference resistor
GNDIF2 7 I/Q modulator and I/Q demodulator
RXIIFA 8 RX IF input A to AGC amplifier
RXIIFB 9 RX IF input B to AGC amplifier
V
CCIF2
TXON 11 TX mode control pin
V
CCIFLO
IFLOC 13 IF LO signal input from
IFLOE 14 IF LO signal input from
GNDIFLO 15 IF LO ground
CPOIF 16 IF charge pump output
GNDCPIF 17 IF charge pump and phase
V
CCCPIF
EN 19 serial programming bus enable
DATA 20 serial programming bus data input
CLK 21 serial programming bus clock input
GNDSYN 22 synthesizer ground
REFIN 23 13 MHz reference input
V
CCSYN
1 IF section of RF receiver supply
voltage 1
ground 2
10 I/Q modulator and I/Q demodulator
supply voltage 2
12 IF LO supply voltage
IF VCO resonator
IF VCO resonator
detector ground
18 IF charge pump and phase
detector supply voltage
control pin
24 synthesizer supply voltage
UAA3522HL
SYMBOL PIN DESCRIPTION
V
CCCPRF
CPORF 26 RF charge pump output
GNDCP 27 RF charge pump ground
SYNON 28 SYN mode control pin
V
CCRFLO
RFLOC 30 LO signal input from RF VCO
RFLOE 31 LO signal input from RF VCO
GNDRFLO 32 RF LO section ground
RXON 33 RX mode control pin
GNDPHD 34 transmit modulation loop charge
PHDOUT 35 charge pump output
V
CCPHD
RESEXT 37 reference resistor for transmit
TXIRFA 38 TX RF VCO signal input
TXIRFB 39 TX RF VCO signal input
V
CCRF
RXIRFA 41 RFreceiver input A
RXIRFB 42 RF receiver input B
GNDRF 43 RF receiver and transmit
TXIFA 44 transmit IFexternal filter A
TXIFB 45 transmit IFexternal filter B
RXOIFA 46 receiver IF output A
RXOIFB 47 receiver IF output B
GNDIF1 48 IF section of RF receiver ground 1
25 RF charge pump and phase
detector supply voltage
29 RF LO section supply voltage
pump ground
36 transmit modulation loop charge
pump supply voltage
modulation loop
40 RF receiver and transmit
modulation loop supply voltage
modulation loop ground
2000 Aug 15 5
Page 6
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
with an image rejecting front-end
handbook, full pagewidth
GNDIF1
RXOIFB
RXOIFA
TXIFB
TXIFA
48
47
46
45
44
V
REFAGC
GNDIF2
V
V
CCIFLO
CCIF1
QA
QB
RXIIFA
RXIIFB
CCIF2
TXON
1
2
3
4
IA
5
IB
6
7
8
9
10
11
12
UAA3522HL
GNDRF
RXIRFB
43
42
RXIRFA
V
41
40
CCRF
TXIRFB
TXIRFA
39
38
RESEXT
37
V
36
35
PHDOUT
34
GNDPHD
33
RXON
32
GNDRFLO
31
RFLOE
30
RFLOC
V
29
28
SYNON
27
GNDCP
26
CPORF
V
25
UAA3522HL
CCPHD
CCRFLO
CCCPRF
13
14
15
16
17
18
IFLOE
IFLOC
CPOIF
GNDIFLO
CCCPIF
V
GNDCPIF
Fig.2 Pin configuration.
2000 Aug 15 6
19
EN
20
DATA
21
CLK
22
23
REFIN
GNDSYN
24
CCSYN
V
FCA043
Page 7
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
with an image rejecting front-end
FUNCTIONAL DESCRIPTION
RF receiver
The receiver front-end convertsthe aerial RF signal, inthe
GSM band (925 to 960 MHz), to an IF signal of
approximately 200 MHz. The first stage of the receiver is
a symmetrical LNA that is matched to 50 Ω by an external
balun. The LNA is followed by an image rejection mixer
which suppresses the image by more than 30 dB.
It comprises two mixers in parallel driven by 0° and 90°
quadrature LO signals respectively. The IF signal from
one mixer is shifted by 90° with respect to the IF signal
from the other mixer, then both signals are added together
to cancel out the image signal. The resultant IF signal is
fed to the output via a high output impedance
open-collector stage which drives an external Surface
Acoustical Wave (SAW) filter which selects the required
channel.
I/Q demodulator
The signal from the SAW filter enters the I/Q demodulator
section. In addition to I/Q demodulation, this section
performs Automatic Gain Control (AGC) over a range of
60 dB to maintain a constant output level irrespective of
the antenna input level, and also applies additional
channel selectivity at the baseband stage using an
integrated high-order low-pass filter.
The AGC amplifier output can be adjusted for a static
offset of less than 50 mV. Its design prevents the offset
from varying by more than ±5 mV. To allow a more
accurateoffsetcalibration,theRF LNAcanbeswitchedoff
to ensure that no IF signal is present at the AGC amplifier
input during the offset measurement.
I/Q modulator
BasebandI and Q signalsareapplied to the I/Q modulator
whichshifts the modulation spectrum upto the transmit IF.
The I/Q modulator is designed for low harmonic distortion,
low carrier leakage and high image rejection to keep the
phase error as small as possible. Its IF output is loaded by
an integrated low-pass filter and by an external
LC tuned-circuit to prevent unwanted spurii from entering
the phase detector in the transmit modulation loop.
Transmit modulation loop
Theanalogtransmitmodulationloopcomprisesanon-chip
offset mixer and simple phase detector in switching mode
(triangular transfer function) forming an analog PLL with
an off-chip loop filter and transmit RF VCO.
UAA3522HL
The phase detector output transfers the modulation of the
I/Q IF signal to the off-chip transmit RF VCO making the
analog PLL act as a tracking filter. A PLL of at least
third-order is needed to meet noise requirements at
20 MHz offset from the carrier.
RF and IF LO sections
The active components required for the design of a low
noise IF VCO are provided on-chip. Pins IFLOC and
IFLOE connect the on-chip IF VCO components to an
external resonator and feedback circuit.
A divider and phase shifter divides the frequency of the
IF VCO signal by 2 and splits it into two signals having
phasesofrespectively0° and 90°whicharebothfedtothe
I/Q modulator and to the I/Q demodulator. The IF VCO
frequency is twice the IF to suppress the effects of
self-mixing and parasitic VCO modulation.
Pins TXIRFA and TXIRFAB connect an external receive
RF VCO module to the on-chip RF LO section. This
section includes a RC phase shifter which splits the
RF VCO signal into two signals having phases of
respectively 0° and 90° which are both fed to the
RX image rejection mixer.
Dual PLL
An on-chip high performance dual PLL synthesizes the
frequencies of the receive RF VCO and IF VCO signals.
Very low close-in phase noise is achieved which provides
a wide PLL bandwidth with a short settling time.
A dual programmable divider chain reduces the frequency
ofthereceiveRF and IF LO signalsto200 kHzand1 MHz
respectively.A digital phase/frequency detectorcompares
their phases to areference signal derived froman external
13 MHz clock signal. Phase error information is fed back
to both VCOs via the dual charge pump circuit which
adjusts the phase of each VCO signal by either ‘sinking’
current into, or ‘sourcing’ current from, its loop filter
capacitor, phase locking both RF and IF loops. The very
low leakage current of the dual charge pump circuit
ensures that any spurii are negligible.
Operating modes
BASIC OPERATING MODES
The circuit can be powered on in one of four operating
modesin which different partsof the device are enabled or
disabled. The four operating modes are called Idle, RX,
TX and SYN, and are selected by the hardware control
voltage level applied to pins RXON, TXON and SYNON.
2000 Aug 15 7
Page 8
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
with an image rejecting front-end
The synthesizer, receiver and transmitter cannot all be on
at the same time. Table 1 shows which parts of the device
are enabled (on) or disabled (off) in each mode.
Table 1 Operating modes
POWER STATUS
MODE
SYNTHESIZER RECEIVER TRANSMITTER
Idle off off off
SYN on off off
RX on on off
TX on off on
The synthesizer includes the oscillators and LO buffers
commontothereceiveand transmit sections. The receiver
includes the RF section and the I/Q demodulator. When
the receiver is on, the LNA can be switched off to allow
DC offset compensation to be performed. The RF section
canalsobeswitchedoffforDCS applications.SeeSection
“Receiver power status control”.
RECEIVER POWER STATUS CONTROL
• DC offset compensation: This feature allows the
DC offset of the receiver output to be set accurately.
When the receiver is on, the LNA can be switched off to
isolate the antenna input from the I/Q demodulator
input. The offset at the I and Q outputs can be
independently reduced to less than 50 mV by
adequately programming two 5-bit data registers,
see Table 4 “Register bit allocation”. The LNA is
switched on or off by the status of bit LNA (see Table 2).
• Disabling RF section: For DCS applications, the RF
section can be disabled in RX mode. The same
IF circuits are used for both GSM and DCS applications
to avoid duplication. For DCS applications using the
UAA2077XM, for example, the RF section of the
UAA3522HL does not have to be powered on.
The RF section is enabled or disabled by the status of
bit RF when the RX mode is activated (see Table 3).
UAA3522HL
Table 2 Bit LNA status
BIT LNA STATUS POWER STATUS OF BIT LNA
0 off
1on
Table 3 Bit RF status
POWER STATUS OF
BIT RF STATUS
1 on (GSM)
0 off (DCS)
Programming
SERIAL PROGRAMMING BUS
A simple 3-wire unidirectional serial bus is used for
programming the IC. The lines are called DATA, CLK
and EN (enable). Programming data is sent to the IC in
bursts which are separated from each other by EN.
Programming clock edges are ignored until EN goes
activeLOW.Thedataisloadedintotheaddressedregister
when EN returns inactive HIGH, and when the CLK is in
either state, without affecting the data in the register.
The register only holds the last 18 bits that are serially
clocked into the IC.
Additional leading bits are ignored, and no check is made
on the number of clock pulses received. The fully static
CMOS design uses virtually no current when the bus is
inactive.It can always accept new programming dataeven
when both synthesizers are powered-off.
DATA FORMAT
Data is loaded into the register with the most significant bit
(MSB) first. The first 14 bits are data, while the last 4 bits
are the register address. The address bits are decoded on
the rising edge of EN. This internally generates a load
pulse to store the data in the addressed register.
To ensure that data loads correctly after the device has
powered-up,ENshouldbeheldLOWandonlytakenHIGH
after the appropriate register has been loaded.
The EN pulse is inhibited during the period when data is
read by the frequency dividers to prevent divider ratio data
from being read incorrectly. This state is guaranteed by
always allowing for a minimum EN pulse width after data
transfer.
RECEIVER RF SECTION
IN RX MODE
2000 Aug 15 8
Page 9
2000 Aug 15 9
Table 4 Register bit allocation
X = don’t care; MSB = Most Significant Bit; LSB = Least Significant Bit.
DATA BITS ADDRESS BITS
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
with an image rejecting front-end
FIRST
BIT
LAST
BIT
13 12 11 10 9 8 7 6 5 4 3 2 1 0 3 2 1 0
X X X X X X MSB IF LO frequency divider ratio LSB 0 1 1 0
MSB RF LO frequency divider ratio LSB 0 1 0 0
XXXXX X LNA
(1)
X MSB AGC amplifier gain (RX mode)
LSB 0 0 1 1
see Table 5
X X MSB Q output offset adjust LSB Q sign
XXXXXIFRD
(3)
IF VCO
(4)
00RF
For test purposes only
(2)
MSB I output offset adjust LSB I sign
(5)
X SYN ON RX ON TX ON 0 0 0 1
(6)
(2)
001 0
000 0
Notes
1. Bit LNA: 1 = LNA ON in RX mode; 0 = LNA OFF in RX mode.
2. Bits Q sign and I sign = polarity of offset at Q/I channel outputs: 0 = negative offset step (output A with respect to output B); 1 = positive offset step
(output A with respect to output B).
3. Bit IF RD: 0 = frequency dividers programmed for GSM applications; 1 = frequency dividers programmed for DCS applications.
4. Bit IF VCO: 0 = IF LO buffer ON (external IF LO source connected); 1 = IF VCO ON (external IF LO source not connected).
5. Bit RF: 1 = RF section ON when RX mode is activated; 0 = RF section OFF when RX mode is activated.
6. This address must not be used. Data bits to be defined.
UAA3522HL
Page 10
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
Table 5 AGC amplifier gain register look-up table
All codes not included in the table are forbidden.
BIT 5 (MSB) BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 (LSB)
000011 −1
000100 +1
000101 +3
000110 +5
000111 +7
001000 +9
001001 +11
001010 +13
001011 +15
001100 +17
001101 +19
010110 +21
010111 +23
011000 +25
011001 +27
011010 +29
011011 +31
100111 +33
101000 +35
101001 +37
101010 +39
101011 +41
110100 +43
110101 +45
110110 +47
110111 +49
111000 +51
111001 +53
111010 +55
111011 +57
111100 +59
111101 +61
AGC AMPLIFIER
GAIN (dB)
(1)
Note
1. Voltage gain is defined as the differential baseband output voltage (either at pins IA/IB or pins QA/QB) divided by the
differential input voltage at pins RXIIFA and RXIIFB.
2000 Aug 15 10
Page 11
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
V
CCn
P
tot
T
stg
T
amb
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take
normal precautions appropriate to handling MOS devices (see
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th(j-a)
supply voltage −0.3 − +6 V
total power dissipation −−1W
storage temperature −40 − +150 °C
ambient temperature −30 − +70 °C
“Handling MOS devices”
).
thermal resistance from junction to ambient in free air 65 K/W
DC CHARACTERISTICS
All parameters are guaranteed at V
= 2.8 V; T
CC
amb
=25°C.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply pins V
V
CC
Supply pins V
V
V
CCCPIF
CCCPRF
;
Supply pin V
V
CCPHD
CCIF1,VCCIF2,VCCIFLO,VCCRFLO,VCCSYN
supply voltage note 1 2.7 − 3.3 V
and V
CCCPIF
CCCPRF
supply voltage note 1 2.7 − 4V
CCPHD
supply voltage for charge pump of
and V
CCRF
note 1 2.7 − 5.5 V
phase detector in transmit
modulation loop
Supply pins V
I
CC(pd)(tot)
CCIF1,VCCIF2,VCCIFLO,VCCRFLO,VCCSYN,VCCCPIF,VCCCPRF,VCCPHD
total power-down supply current pins TXON, RXON
and V
CCRF
− 40 100 µA
and SYNON = LOW-level;
pins EN, DATA and
CLK = HIGH-level; note 2
RF receiver IF section (pins V
I
CC(RFIF)(RX)
RF receiver and IF section total
, RXOIFA and RXOIFB)
CCIF1
RX mode active − 16.9 21.9 mA
supply current
IF section supply (pin V
I
CCIF(RX)
I
CCIF(TX)
I/Q demodulator supply current RX mode active − 10.1 14.1 mA
I/Q modulator supply current TX mode active − 7.4 9.6 mA
CCIF2
)
2000 Aug 15 11
Page 12
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
IF LO section supply (pin V
I
CCIFLO(SYN)
IF LO section supply current SYN mode active − 5.5 6.6 mA
IF charge pump supply (pin V
I
CCCPIF(SYN)
Synthesizer supply (pin V
I
CCSYN(SYN)
IF LO charge pump supply current SYN mode active; phase
CCSYN
synthesizer supply current SYN mode active − 5 6.7 mA
RF LO charge pump and phase detector supply (pin V
I
CCCPRF(SYN)
RF LO supply (pin V
I
CCRFLO(RX)
RF LO charge pump supply current SYN mode active; phase
CCRFLO
RF LO buffer receive section supply
current
I
CCRFLO(TX)
RF LO buffertransmitsection supply
current
Closed-loop charge pump supply (pin V
I
CCPHD(TX)
closed-loop charge pump supply
current
RF receiver and transmit modulation loop supply (pin V
I
CCRF(RX)on
supply current of RF receiver
(receive IF section disconnected)
with RX image rejection mixer and
LNA ON
I
CCRF(RX)off
supply current of RF receiver
(receive IF section disconnected)
with RX image rejection mixer and
LNA OFF
I
CCRF(TX)
supply current of transmit
modulation loop (charge pump
disconnected)
Pins V
CCIF1,VCCIF2,VCCIFLO,VCCCPIF,VCCSYN,VCCCPRF,VCCPHD,VCCRF
I
CC(RX)
I
CC(TX)
I
CC(SYN)
supply current in RX mode RX mode active; note 3 − 44.9 59.6 mA
supply current in TX mode TX mode active; note 3 − 20.3 26.4 mA
supply current in SYN mode SYN mode active; note 3 − 21.7 27.4 mA
Pins IA IB, QA and QB
V
V
O(IQ)
I(IQ)
DC voltage at I/Q baseband outputs TX mode active 1.125 1.25 1.325 V
DC voltage at I/Q baseband inputs RX mode active 1.175 1.25 1.35 V
Logic levels (pins EN, DATA, CLK, TXON, RXON and SYNON)
V
IH
V
IL
HIGH-level input voltage 1.9 −−V
LOW-level input voltage −−0.7 V
CCIFLO
CCCPIF
)
)
)
− 1.2 1.5 mA
locked
)
)
CCCPRF
− 1.4 1.7 mA
locked
SYN mode active; RX mode
− 8.6 10.9 mA
active
TX mode active − 9.8 12.6 mA
)
CCPHD
TX mode active; phase locked − 5.6 7.5 mA
)
CCRF
RX mode active; LNA ON − 17.9 23.6 mA
RX mode active; LNA OFF − 11.2 14.6 mA
TX mode active − 6.1 7.6 mA
, RXOIFA and RXOIFB
2000 Aug 15 12
Page 13
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
Notes:
1. V
CCCPRF,VCCCPIF
voltages must be equal.
2. ‘HIGH-level’ means the control pin voltage must be equal to the supply voltage VCC. ‘LOW-level’ means the control
pin voltage must be equal to the supply ground.
3. I
CC(RX)=ICC(RFIF)(RX)+ICCIF(RX)+ICCRF(RX);ICC(TX)=ICCIF(TX)
I
CC(SYN)=ICCIFLO(SYN)+ICCCPIF(SYN)+ICCPLL(SYN)+ICCCPRF(SYN)+ICCRFLO(SYN)
AC CHARACTERISTICS
All parameters are guaranteed at VCC= 2.8 V; T
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
RF receiver section; measured in a 50 Ω impedance system, including external input/output baluns and
matching networks to 50 Ω (see Fig.3)
RECEIVER INPUTS (PINS RXIRFA AND RXIRFB)
RF
f
i(RF)(GSM)
R
i(dif)
C
i(dif)
S
11
P
i(spur)
RECEIVER IF OUTPUT (PINS RXOIFA AND RXOIFB)
f
o(IF)
R
L(m)
G
conv(p)
G
ripple
∆G/∆T gain variation note 6
F noise figure for R
CP1 −1 dB input
IP
3
DES
3dB
and V
must be equal to, or greater than, the other supply voltages. The other supply
CCPHD
+[I
CCRFLO(TX)
− I
CCRFLO(RX)
]+I
CCPHD(TX)+ICCRF(TX)
.
=25°C; unless specified otherwise.
amb
GSM band RF input
925 − 960 MHz
frequency
differential input
− 146 −Ω
resistance
differential input
− 0.85 − pF
capacitance
input power matching note 1 −−15 −10 dB
level of spurious input
−−50 −40 dBm
power due to
LO leakage
IF output frequency LO > RF − 200 − MHz
matched load
differential; note 2 − 1 − kΩ
resistance
power conversion gain into specified matched load
23 24.5 27 dB
resistance; note 1
gain ripple over specified frequency range;
−0.5 − +0.5 dB
note 3
with temperature −60 −30 − dBm/K
; notes 1, 3 and 4 − 3.45 3.85 dB
i(dif)
note 1
compression point
referenced to input
third-order intercept
at T
=25°C −23.5 −− dBm
amb
over temperature range −24.2 −− dBm
note 1 −18 −− dBm
point referenced to
input
3 dB desensitization
point referenced to
∆f
= 3 MHz;
i(RF)
RF input power = −101 dBm; note 1
−25 −− dBm
input
;
2000 Aug 15 13
Page 14
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
IR image rejection f
G
off
output isolation in
off-state
Receiver IF section (AGC and baseband filter); the impedance of the source, input balun, matching network
and specified input is 50 Ω
IF INPUT TO AGC AMPLIFIER (PINS RXIIFA AND RXIIFB)
f
R
i(IF)
i(dif)
IF input frequency − 200 − MHz
differential input
resistance
P
i(m)
input power matching note 1 −−15 −10 dB
BASEBAND INPUT/OUTPUT;RXMODE (PINS IA, IB, QA AND QB)
G
conv(dif)(min)
differential voltage
conversion gain per
channel; gain set to
minimum
G
conv(dif)(max)
differential voltage
conversion gain per
channel; gain set to
maximum
G
conv(step)
voltageconversionstep
gain
∆G
I-Q
gain difference
between I and Q paths
∆ϕ quadrature-phase error
between I and Q paths
G
L
gain control linearity note 1 −2 − +2 dB
F noise figure G
IP
3
third-order intercept
point referenced to
input
CP1 −1 dB compression
point referenced to
input
CP1
adjacent
−1 dB compression
point for adjacent
channels referenced to
input
B
bf(-1dB)
−1 dB baseband filter
bandwidth
∆t
d(g)
group delay variation DC < ∆f
= 200 MHz; note 1 30 35 − dB
o(IF)
bit LNA = 0; notes 1 and 5 60 70 − dB
− 1 − kΩ
notes 1 and 7 −2.5 −0.5 +1.5 dB
notes 1 and 7 59.5 61.5 63.5 dB
note 1 − 2 − dB
note 1 −−0.8 dB
−5 − +5 deg
notes 1 and 11 −3 − +3 dB
within any 20 dB gain range −1 − +1 dB
conv(dif)(max)
G
conv(dif)(min)
G
conv(dif)(max)
G
conv(dif)(min)
G
conv
∆f
mod
; notes 1 and 9 −−9dB
; notes 1 and 9 −−61 dB
= 61 dB; note 8 −42 −38 − dBm
; note 8 −40− dBm
= 49 dB; notes 6 and 7
= n × 200 kHz; n = 1, 2 and 3 −45 −40 − dBm
note 10 67.7 −− kHz
< 67.7 kHz − 1.5 −µS
mod
2000 Aug 15 14
Page 15
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
α
bf5
V
o(pin)(peak)(max)
V
OO
LSB
offset
∆V
offset
Transmit IF section; general conditions: V
baseband filter
attenuation
(fifth-order Butterworth)
maximum peak output
voltage per pin giving a
note 10
∆f
= 140 kHz 8 11 − dB
mod
∆f
= 200 kHz 19 25 − dB
mod
∆f
= 400 kHz 36 55 − dB
mod
∆f
= 600 kHz 44 −− dB
mod
differential resistance between
QA/QB or IA/IB > = 180 kΩ; note 1
0.75 −− V
total harmonic
distortion of less
than 3% at G
output offset voltage
conv
>7
G
=31dB −60 − +60 mV
conv
adjustment
LSB offset adjustment − 50 100 mV
offset variation gain from G
to G
conv(dif)(max)
mod(peak)
conv(dif)(min)
= 0.25 V; V
I(IQ)=VO(IQ)
−10 − +10 mV
= 1.25 V; f
= 67.7 kHz
mod
B
ASEBAND INPUT/OUT;TXMODE (PINS IA, IB, QA AND QB)
∆f
mod
V
mod(peak)
modulation frequency gain = −3dB 0 − 2 MHz
modulation level (peak
single-ended 0.225 0.25 0.275 V
value)
DR
i
dynamic input
single-ended per pin − 12.5 − kΩ
resistance
TRANSMITTER IF LC TUNED CIRCUIT (PINS TXIFA AND TXIFB)
f
o(IF)
LO
out
IF output frequency − 200 − MHz
local oscillator
f
= 200 MHz −−40 −30 dBc
o(IF)
feedthrough level
P
o
IM2
IM3
IM
o
o
o
transmit power without
LC tuned circuit
level of second-order
image products
level of third-order
image products
image level f
f
= 200 MHz ± 67.7 kHz;
o(IF)
measured through a balun; note 12
f
= 200 MHz ± 2 × 67.7 kHz;
o(IF)
note 12
f
= 200 MHz ± 3 × 67.7 kHz;
o(IF)
note 12
= 200 MHz
o(IF)
− 67.7 kHz; note 12
ϕ
N
phase noise output
power density
f
= 400 kHz −−−125 dBc/Hz
offset
f
= 10 MHz −−140 −133 dBc/Hz
offset
Transmit modulation loop section; General conditions: V
= 67.7 kHz
f
mod
mod(peak)
= 0.25 V; V
−−16 − dBm
−−48 −45 dBc
−−55 −50 dBc
−−34 − dBc
I(IQ)=VO(IQ)
= 1.25 V;
O
FFSET MIXER; GSM BAND (PINS TXIRFA AND TXIRFB)
f
i(RF)(TX)
TX RF VCO input
frequency
R
i(pin)
input resistance per pin note 13 − 100 −Ω
2000 Aug 15 15
880 − 915 MHz
Page 16
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
C
i(pin)
P
i
S
11
LO
L
OFFSET MIXER; DCS BAND (PINS TXIRFA AND TXIRFB)
f
i(RF)(TX)
R
i(pin)
C
i(pin)
P
i
S
11
LO
L
PHASE DETECTOR; DCS AND GSM BAND (PIN PHDOUT)
I
cp(max)
G
PHD
∆G
PHD
V
O
R
o
N
o
I
sweep
R
o(off)
SPUR
4fm
SPUR
8fm
LO
out
IM
o
input capacitance per
note 13 − 1 − pF
pin
input power symmetrical −14.5 −10 −5.5 dBm
single-ended −11.5 −7 −2.5 dBm
input power matching note 1 −−15 −10 dB
reverse isolation local
note 1 −−−40 dBm
oscillator leakage
TX RF VCO input
1710 − 1785 MHz
frequency
input resistance per pin note 13 − 100 −Ω
input capacitance per
note 13 − 1 − pF
pin
input power symmetrical −14.5 −10 −5.5 dBm
single-ended −11.5 −7 −2.5 dBm
input power matching note 1 −−15 −10 dB
reverse isolation local
note 1 −−−40 dBm
oscillator leakage
chargepump maximum
R = 270 Ω, 1%; VO=1⁄2V
CCPHD
2.2 2.4 2.6 mA
sink or source current
phase detector gain − 2 − mA/rad
phase detector gain
VO=1⁄2V
; note 11 −20 − +20 %
CCPHD
variation
output voltage 0.5 − V
output resistance VO=1⁄2V
output noise current
density
VCO sweeping source
20 kHz < f
note 1
VO=1⁄2V
CCPHD
< 20 MHz in lock;
offset
CCPHD
− 10 − kΩ
−−200 pA/√Hz
0.4 0.55 0.7 mA
CCPHD
− 0.5 V
current
output resistance to
TX mode disabled − 1 − kΩ
ground when powered
down
level of spurious signal
at four times the
wanted f
mod
signal
level of spurious signal
at eight times the
wanted f
mod
signal
local oscillator
f
= 67.7 kHz;
mod
f
o(RF)(GSM)
f
o(RF)(DCS)
f
= 67.7 kHz;
mod
f
o(RF)(GSM)
f
o(RF)(DCS)
at f
RF
−−−48 dBc
= 880 to 915 MHz;
= 1710 to 1785 MHz
−−−55 dBc
= 880 to 915 MHz;
= 1710 to 1785 MHz
−−40 −32 dBc
feedthrough level
image level at fRF; note 1 −−38 −35 dBc
2000 Aug 15 16
Page 17
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
RF LO buffer; measured and guaranteed on evaluation board
RF LO SOURCE CONNECTED TO PIN RFLOE (see Fig.7)
R
i
C
i
S
11
P
i(LO)
IF LO; measured and guaranteed on evaluation board
EXTERNAL RESONATOR CIRCUIT CONNECTED TO PINS IFLOC AND IFLOE
f
osc
V
osc(peak)
ϕ
N
∆f
TROFF
∆f
TRON
IF LO buffer; measured and guaranteed on evaluation board
input resistance − 50 −Ω
input capacitance − 1 − pF
input power matching −−15 −10 dB
input power acceptable
−7 −3 +2 dBm
from the RF LO source
oscillation frequency note 1 − 400 − MHz
peak voltage excursion
V
CCIFLO
= 2.8 V; see Fig.5 1 − 1.5 V
limit at IFLOC
(collector)
phase noise f
frequencyvariationwith
= 400 kHz; f
offset
= 400 MHz −−−125 dBc/Hz
LO(IF)
note 14 −− 1 MHz/V
supply voltage
(pushing)
frequency variation
note 14 −−10 kHz
between RX on and
RX off (pulling)
IF SOURCE CONNECTED TO PIN IFLOE
R
i
C
i
P
i(m)
P
IF
input resistance − 50 −Ω
input capacitance − 1 − pF
input power matching −−15 −10 dB
power available from
see Fig.5 −8 −5 −2 dBm
the IF source
RF and IF synthesizer VCOs
REFERENCE FREQUENCY INPUT (PIN REFIN)
f
ref
V
i(fref)(rms)
reference frequency − 13 − MHz
input voltage level
(RMS value)
R
i
C
i
input resistance f
input capacitance f
= 13 MHz − 10 − kΩ
ref
= 13 MHz − 1 − pF
ref
RF SYNTHESIZER; GSM AND DCS MODES (PINS RXIRFA, RXIRFB AND CPORF)
f
LO(RF)
f
ph(comp)
RF LO frequency 1040 − 1720 MHz
phase comparator
frequency
ϕ
N(GSM)
GSM close-in phase
noise
within the closed-loop bandwidth
P
= 0 dBm; f
xtal
LO(RF)
= 1.1 GHz
80 − 250 mV
− 200 − kHz
−−82 −75 dBc/Hz
2000 Aug 15 17
Page 18
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
ϕ
N(DCS)
V
fph(comp)(spur)
I
o(cp)
I
L(cp)(off)
V
o(cp)
IF SYNTHESIZER (PINS IFLOC, IFLOE AND CPOIF)
f
LO(IF)
f
ph(comp)
ϕ
N
V
fph(comp)(spur)
I
o(cp)
I
L(cp)(off)
V
o(cp)
Frequency dividers
D/D
fLO(RF)
D/D
fLO(IF)
D/D
fref(RF)
D/D
fref(IF)
General IC specification
t
ON
Notes
1. Measured and guaranteed only on UAA3522 evaluation board.
2. The IF output has open collectors which are supplied via external inductors. External resistors are also needed to
set the output impedance and to match the IF output to the specified load resistance RL(see Fig.3).
3. Value includes losses due to the printed circuit board and balun.
DCS close-in phase
noise
phase comparator
frequency spurii
breakthrough level
charge pump output
within the closed-loop bandwidth
P
= 0 dBm; f
xtal
f
= 200 kHz; second-order loop
offset
LO(RF)
= 1.6 GHz
filter closed-loop
bandwidth = 11 kHz
sink or source current; at V
o(cp)
−−79 −74 dBc/Hz
−−75 −60 dBc
1.8 2.2 2.6 mA
current
charge pump leakage
−5 − +5 nA
current in off-state
charge pump output
I
within specified values 0.4 − VCC− 0.4 V
o(cp)
voltage
IF LO frequency 380 400 440 MHz
phase comparator
− 1 − MHz
frequency
close-in phase noise within the closed-loop bandwidth
P
phase comparator
frequency spurii
breakthrough level
charge pump output
= 0 dBm; f
xtal
f
= 1 MHz; second order loop
offset
filter closed-loop
bandwidth = 25 kHz
sink or source current; at V
LO(IF)
= 400 MHz
o(cp)
−−95 −85 dBc/Hz
−−75 −60 dBc
0.75 1.1 1.35 mA
current
charge pump leakage
−5 − +5 nA
current in off-state
charge pump output
0.4 − VCC− 0.4 V
voltage
RF frequency
5200 − 8600
programmable divider
ratio
IF frequency
− 200 −
programmable divider
ratio
RF referencefrequency
fixed ratio − 65 −
divider ratio
IF reference frequency
fixed ratio − 13 −
divider ratio
switch-on time 90% of the final current −−10 µs
2000 Aug 15 18
Page 19
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
4. Value is guaranteed only for the P
5. For a given RF input power, the value is the difference in the power measured at the IF output when the LNA is
switched on and when it is switched off.
6. This value is guaranteed within the temperature range −10 to +70 °C.
7. Voltage gain is defined as the differential baseband output voltage (either at pins IA/IB or pins QA/QB) divided by the
differential input voltage at pins RXIIFA and RXIIFB.
8. Value refers to differential voltage at pins RXIIFA and RXIIFB (1 kΩ input impedance).
9. Value includes printed circuit board and balun losses.
10. R
REFAGC
11. Guaranteed at T
=18kΩ, 1%.
= −30 to +70 °C.
amb
12. With specified LC tuned circuit (33 nH, 15 pF) connected as shown in Fig.4.
13. Defined for the typical input power.
14. Oscillator configured as shown in the evaluation board diagram Fig.7.
i(LO)
typ.
handbook, full pagewidth
50 Ω
input port
LOW
LOSS
BALUN
RXIRFA
RF
RECEIVER
RXIRFB
RXOIFA
Fig.3 RF receiver test principle.
RXOIFB
V
CC
Z = 1 kΩ
BALUN
1 kΩ/50 Ω
output port
R
50 Ω
FCA047
L
2000 Aug 15 19
Page 20
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
with an image rejecting front-end
handbook, full pagewidth
330 Ω
V
CC
330 Ω
TXIFA
12 pF
47 nH
UAA3522HL
EXTERNAL
IF FILTER
TXIFB
2 kΩ
FCA045
handbook, full pagewidth
Fig.4 I/Q modulator output.
V
CCIFLO
UAA3522HL
IFLOC
IF VCO
XTAL
IFLOE
GNDIFLO
FCA048
1 kΩ
V
CC
IF SOURCE
Fig.5 Evaluating IF LO buffer.
2000 Aug 15 20
Page 21
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
SERIAL TIMING CHARACTERISTICS
General conditions: VCC= 2.8 V; T
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
Serial programming clock (pin CLK)
t
r
t
f
T
cy(clk)
rise time − 10 40 ns
fall time − 10 40 ns
clock cycle time 100 −−ns
Enable programming (pin EN)
t
d(ENL-CLKH)
t
d(CLKL-ENH)
t
W(reg)(min)
delay from enable active to rising clock edge 40 −−ns
delay from enable inactive to last falling clock edge 20 −−ns
minimum inactive pulse width when consecutively programming
two different registers
t
W(IFLO)(min)
minimum inactive pulse width when consecutively programming
two IF divider ratios
t
W(RFLO)(min)
minimum inactive pulse width when consecutively programming
two RF divider ratios
t
su(ENH-CLKH)
enable set-up time to next rising clock edge 20 −−ns
Register serial input data (pin DATA)
t
su(DATA-CLK)
t
h(DATA-CLK)
set-up time DATA to CLK 20 −−ns
hold time DATA to CLK 20 −−ns
=25°C; see Fig.6; unless otherwise specified.
amb
150 −−ns
150 −−ns
500 −−ns
handbook, full pagewidth
CLK
DATA
EN
t
su(DATA-CLK)
MSB LSB
t
d(ENL-CLKH)
t
h(DATA-CLK)
T
cy(CLK)
ACTIVE
Fig.6 Serial bus timing diagram.
2000 Aug 15 21
t
d(CLKL-ENH)
t
t
f
r
ADDRESS
t
su(ENH-CLKH
FCA042
INACTIVE
t
W
)
Page 22
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2000 Aug 15 22
RX RF
V
RX IF
3.9 pF
V
CC
18 kΩ
RXIIFA
RXIIFB
V
CC
330 Ω
100 pF100 pF
150 nH
4.7 pF 4.7 pF
1.5 kΩ
48 47
1
2
3
4
5
6
7
8
9
10
11
12
13 14
8.2 pF
22 nH
BB149
V
CC
120 nH
QA
QB
IA
IB
3.9 pF
150 nH
RX IF
This schematic represents theUAA3522HLcharacterisation board for GSM application and does not guarantee full specificationforany particular application.
3.9 pF
150 nH
120 pF
470 nH
120 pF
TXON
V
CC
CC
120
2.2 pF
150
nH
nH
12 nH
3.9 pF
47 nH
12 pF
46 45 44 43 42 41 40 39 38 37
12 nH
10 pF
33 nH
27 pF
10 pF
V
CC
UAA3522HL
15 16 17 18 19 20 21 22 23 24
V
33 pF
10 kΩ
1.2
nF
3.3
kΩ
nF
CC
18
EN
SERIAL
PROGRAMMING
BUS LINES
DATA
18 pF
CLK
270 Ω
36
35
34
RXON
33
32
31
30
29
SYNON
28
27
26
25
V
CC
13 MHz
SERIAL
PROGRAMMING
BUS LINES
(chip)
V
V
V
CC
22 pF
22 pF
CC
CC
27 pF
27 pF
18 Ω
3.3
12 nF
kΩ
10 kΩ
39 pF
ATTENUATOR
220 Ω
1.8 nF
27 nF
8.2 kΩ
1 nF
VCC(chip) VCC(board)
27pF100pF1
SERIAL
PROGRAMMING
BUS LINES
(board)
100 pF
180 pF
nF
FCA044
TX RF
VCO
RX RF
VCO
200 mV
APPLICATION INFORMATION
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
with an image rejecting front-end
UAA3522HL
Fig.7 Evaluation board.
Page 23
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2000 Aug 15 23
handbook, full pagewidth
Typical application
Low power dual-band GSM transceiver
with an image rejecting front-end
Philips Semiconductors Preliminary specification
RX/TX
SWITCH
1710 to 1785 MHz
DCS BAND
1805 to1880 MHz
925 to 960 MHz
DCS RF
RX VCO
1510 to 1680
MHz
880 to 915 MHz
GSM BAND
POWER
AMPLIFIER
BALUN
BALUN
1080 to 1160
GSM TX RF VCO
880 to 915 MHz
DCS TX RF VCO
1710 to 1785 MHz
UAA2077XM
GSM RF
RX VCO
MHz
90°
PHASE
SHIFTER
0°
41,
42
30, 31
26
38, 39
35
×
×
CHARGE
PUMP
CHARGE
PUMP
PHASE
SHIFTER
90°
+
PHASE
×
90°
PHASE
SHIFTER
0°
SHIFTER
×
PROGRAMMABLE
DIVIDER
RF PHASE/
FREQUENCY
DETECTOR
DETECTOR
ADDER
PHASE
90°
+
ADDER
UAA3522HL
×
44, 45
SAW
8, 946, 47
90°
DIVIDER
÷5
ADDER
+
4, 5
2, 3
13,
14
16
23
4, 5
2, 3
FCA004
I
Q
REF OSC.
13 MHz
I
Q
B
A
S
E
B
A
N
D
&
A
U
D
I
O
I
N
T
E
R
F
A
C
E
UAA3522HL
×
0°
IF VCO
400 MHz
×
DIVIDER &
PHASE
÷2
SHIFTER
PROGRAMMABLE
DIVIDER
IF PHASE/
FREQUENCY
DETECTOR
DIVIDER
÷13
0°
IF VCO
XTAL
CHARGE
PUMP
×
90°
×
Fig.8 Typicalapplication block diagram of a GSM dual-band solution using the UAA2077XM DCS front-endand the UAA3522HL transceiver.
Page 24
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
with an image rejecting front-end
PACKAGE OUTLINE
LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm
c
y
X
36
37
25
Z
24
E
A
UAA3522HL
SOT313-2
e
w M
pin 1 index
48
1
e
DIMENSIONS (mm are the original dimensions)
A
UNIT
mm
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
A1A2A3bpcE
max.
0.20
0.05
1.45
1.35
1.60
b
p
0.25
w M
D
H
D
0.27
0.17
12
Z
D
(1) (1)(1)
D
0.18
7.1
0.12
6.9
b
p
13
v M
B
v M
0 2.5 5 mm
scale
(1)
eH
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6.9
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9.15
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E
A
B
9.15
8.85
H
E
LL
E
0.75
0.45
A
p
A
2
A
1
L
detail X
Z
D
0.12 0.10.21.0
0.95
0.55
(A )
3
L
p
Zywv θ
E
0.95
0.55
θ
o
7
o
0
OUTLINE
VERSION
SOT313-2 MS-026136E05
IEC JEDEC EIAJ
REFERENCES
2000 Aug 15 24
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
00-01-19
Page 25
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
with an image rejecting front-end
SOLDERING
Introduction to soldering surface mount packages
Thistextgivesavery brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not alwayssuitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board by screen printing, stencillingor
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Wave soldering
Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
UAA3522HL
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• Forpackageswithleadsonfoursides,thefootprintmust
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2000 Aug 15 25
Page 26
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
UAA3522HL
with an image rejecting front-end
Suitability of surface mount IC packages for wave and reflow soldering methods
PACKAGE
BGA, LFBGA, SQFP, TFBGA not suitable suitable
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable
(3)
PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
, SO, SOJ suitable suitable
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
The package footprint must incorporate solder thieves downstream and at the side corners.
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
SOLDERING METHOD
WAVE REFLOW
(2)
(3)(4)
(5)
suitable
suitable
suitable
(1)
.
DATA SHEET STATUS
DATA SHEET STATUS
Objective specification Development This data sheet contains the design target or goal specifications for
Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be
Product specification Production This data sheet contains final specifications. Philips Semiconductors
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
PRODUCT
STATUS
DEFINITIONS
product development. Specification may change in any manner without
notice.
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
(1)
2000 Aug 15 26
Page 27
Philips Semiconductors Preliminary specification
Low power dual-band GSM transceiver
with an image rejecting front-end
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseorat any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.
UAA3522HL
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury.Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofanyoftheseproducts,conveysnolicenceortitle
under any patent, copyright, or mask work right to these
products,andmakes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
2000 Aug 15 27
Page 28
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For all other countries apply to: Philips Semiconductors,
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© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
2000
Internet: http://www.semiconductors.philips.com
70
Printed in The Netherlands 403506/02/pp28 Date of release: 2000 Aug 15 Document order number: 9397 750 07164
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