Product specification
Supersedes data of 1995 Nov 27
File under Integrated Circuits, IC03
1996 Jan 15
Page 2
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
FEATURES
• Wide frequency range: VHF, UHF and 900 MHz bands
• High sensitivity
• High dynamic range
• Electronically adjustable filters on chip
• Suitable for data rates up to 2400 bits/s
• Wide frequency offset and deviation range
• Fully POCSAG compatible FSK receiver
• Power on/off mode selectable by the chip enable input
• Low supply voltage; low power consumption
• High integration level
• Interfaces directly to the PCA5000A, PCF5001 and
PCD5003 POCSAG decoders.
APPLICATIONS
• Wide area paging
• On-site paging
• Telemetry
• RF security systems
• Low bit-rate wireless data links.
GENERAL DESCRIPTION
The UAA2080 is a high-performance low-power radio
receiver circuit primarily intended for VHF, UHF and
900 MHz pager receivers for wide area digital paging
systems, employing direct FM non-return-to-zero (NRZ)
frequency shift keying (FSK).
The receiver design is based on the direct conversion
principle where the input signal is mixed directly down to
the baseband by a local oscillator on the signal frequency.
Two complete signal paths with signals of 90° phase
difference are required to demodulate the signal.
All channel selectivity is provided by the built-in IF filters.
The circuit makes extensive use of on-chip capacitors to
minimize the number of external components.
The UAA2080 was designed to operate together with the
PCA5000A, PCF5001 or PCD5003 POCSAG decoders,
which contain a digital input filter for optimum call success
rate.
ORDERING INFORMATION
TYPE
NUMBER
UAA2080HLQFP32plastic low profile quad flat package; 32 leads; body 7 × 7 × 1.4 mmSOT358-1
UAA2080TSO28plastic small outline package; 28 leads; body width 7.5 mmSOT136-1
UAA2080U28 padsnaked die; see Fig.9
(change in frequency between series resonance and resonance with 8 pF series capacitor at 25 °C), dynamic
resistance R1 < 40 Ω, ∆f=±5×10−6 for T
= −10 to +55 °C with 25 °C reference, calibration plus aging tolerance:
amb
−5 × 10−6to +15 × 10−6.
2. This crystal recommendation is based on economic aspects and practical experience. Normally the spreads for R1,
pullability and calibration do not show their worst case limits simultaneously in one crystal. In such a rare event, the
tuning range will be reduced to an insufficient level.
1996 Jan 156
Page 7
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
BLOCK AND TEST DIAGRAMS (470 MHz)
L5
40
ref
P
nH
C9
MLC702
2.7 pF
L4
40
nH
C11
22 pF
= 469.95 MHz.
1516
C8
C7
C10
22 pF
C6
C5 1 nF
1314
L3
8 nH
L2
GND1
330
8 nH
R1
Ω
12
11
10
2.7 pF
6 pF
2.5 to
C4 1 nF
2.7 pF
P
V
i(RF)
handbook, full pagewidth
P
V
L6
820 Ω
10 µF
1 nF
C15
L7
1 nF
3 to
nH
XTAL
C16
kΩ
8 nH
10 pF
13 to
8 nH
50 pF
R4
TDC
C17
C12
1.2 kΩ
2.5 to 6 pF
25
2627
28
303132
GND3
15 pF
L8
R5
R3
C19
C13
C14
100
1.8
R247kΩ
22
24
MULTIPLIER
FREQUENCY
P
V
LOW
BATTERY
INDICATOR
CRYSTAL
OSCILLATOR
21
low noise
amplifier Q
ACTIVE
GYRATOR
Q
LIMITER
GND2
20
FILTER
FILTER
DEMO-
ACTIVE
GYRATOR
DULATOR
19
MIXER Q
low noise
FILTER
FILTER
I
LIMITER
18
amplifier I
RF pre-amplifier
UAA2080H
MIXER I
V
BAND GAP
REFERENCE
V
L9
C18
1 nF
560
nH
1TS
2
BLI
3
DO
to
decoder
1996 Jan 157
4
RE
5
6
TPI
TPQ
IF testpoints
C1
7
2.7 pF
i(RF)
V
8
C3
6 pF
2.5 to
L1
nH
C2
12.5
2.7 pF
Fig.3 Block, test and application diagram drawn for LQFP32; f
Pins 9, 17, 23 and 29 are not connected.
Page 8
1996 Jan 158
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
decoder
C18
1 nF
BLI
DO
RE
28
BAND GAP
REFERENCE
V
P
DEMODULATOR
V
L9
560 nH
272625
ref
LIMITER
R5
1.8 kΩ
C16
13 to
50 pF
TS
LIMITER
I
RF pre-amplifier
XTAL
C17
15 pF
CRYSTAL
OSCILLATOR
BATTERY
LOW
INDICATOR
Q
GND3
222324
V
P
GYRATOR
FILTER
GYRATOR
FILTER
L8
100
C15
nH
3 to
10 pF
TDC
21
FREQUENCY
MULTIPLIER
UAA2080T
UAA2080U
ACTIVE
FILTER
ACTIVE
FILTER
C14
1 nF
R 4
1.2 kΩ
1920
low noise
amplifier
Q
low noise
amplifier
I
C13
10 µF
R3
820 Ω
L7
8 nHL68 nH
C12
2.5 to 6 pF
C 19
1 nF
V
47 kΩ
16151718
P
R2
7
6
330
Ω
C2
2.7 pF
54
R1
GND1
V
P
L3
8 nH
89
L2
8 nH
C4 1 nF
handbook, full pagewidth
C5 1 nF
2.5 to 6 pF
12 3
TPITPQ
IF testpoints
C1
2.7 pF
V
i(RF)
C3
2.5 to 6 pF
L1
12.5 nH
Fig.4 Block, test and application diagram drawn for SO28 and naked die; f
2.7 pF
C6
2.7 pF
MIXER IMIXER Q
10 11121314
22 pF22 pF
C10 C11
C7
C8
= 469.95 MHz.
i(RF)
C9
2.7 pF
L4
40
nH
GND2
L5
40
nH
MLC703
Page 9
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
L5
40
P
V
L6
820 Ω
1 nF
8 nH
C12
L7
8 nH
2.5 to 6 pF
25
R3
C19
R247kΩ
GND2
21
22
24
20
18
19
UAA2080H
MIXER Q
nH
L4
40
nH
C11
22 pF
MLC704
C23
2.5 to 6 pF
L10
12.5 nH
L8
R5
C13
C14
100
1.8
C18
10 µF
1 nF
C15
1 nF
3 to
nH
XTAL
C16
kΩ
10 pF
13 to
L9
50 pF
560
R4
nH
TDC
C17
1.2 kΩ
GND3
15 pF
2627
28
303132
MULTIPLIER
FREQUENCY
P
V
LOW
BATTERY
INDICATOR
CRYSTAL
OSCILLATOR
1TS
low noise
amplifier Q
ACTIVE
GYRATOR
Q
LIMITER
FILTER
FILTER
2
BLI
DEMO-
DULATOR
3
DO
ACTIVE
GYRATOR
4
RE
FILTER
FILTER
LIMITER
5
TPI
low noise
amplifier I
I
6
TPQ
MIXER I
V
BAND GAP
REFERENCE
V
RF pre-amplifier
7
8
ref
P
1516
C22
C10
C21
22 pF
C5
1314
12
1110
GND1
i(RF)
V
5.6 pF
1 nF
5.6 pF
P
V
= 469.95 MHz.
i(RF)
handbook, full pagewidth
Fig.5 Mixer input sensitivity test circuit; f
to
1996 Jan 159
IF testpoints
decoder
Page 10
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
Table 2 Tolerances of components shown in Figs 3, 4 and 5 (notes 1 and 2)
(change in frequency between series resonance and resonance with 8 pF capacitor at 25 °C), dynamic resistance
R1 < 30 Ω, ∆f=±5×10−6 for T
= −10 to +55 °C with 25 °C reference, calibration plus aging tolerance:
amb
−5 × 10−6to +15 × 10−6.
2. This crystal recommendation is based on economic aspects and practical experience. Normally the spreads for R1,
pullability and calibration do not show their worst case limits simultaneously in one crystal. In such a rare event, the
tuning range will be reduced to an insufficient level.
1996 Jan 1510
Page 11
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
BLOCK AND TEST DIAGRAM (930 MHz)
L5
12.5
P
V
L6
R3
330 Ω
3 nH
C12
3 nH
1.7 to 3 pF
25
L7
R247kΩ
GND2
24
21
22
20
18
19
nH
L4
nH
12.5
MLC705
C13
C14
L8
4.7 µF
150
pF
33 nH
C15
C19
150 pF
3.3 pF
i(OSC)
V
R4
TDC
390 Ω
2627
28
303132
GND3
MULTIPLIER
FREQUENCY
P
V
LOW
BATTERY
CRYSTAL
OSCILLATOR
1TS
low noise
amplifier Q
ACTIVE
INDICATOR
GYRATOR
Q
LIMITER
FILTER
FILTER
2
DEMO-
DULATOR
3
ACTIVE
GYRATOR
4
5
MIXER Q
low noise
FILTER
FILTER
I
LIMITER
6
amplifier I
RF pre-amplifier
7
UAA2080H
MIXER I
V
BAND GAP
REFERENCE
V
8
ref
P
C9
1.2 pF
L11
5 nH
1516
C8
C7
L10
C5
5 nH
150 pF
C6
1.5 pF
3 pF
1.7 to
1.5 pF
= 930.50 MHz.
i(RF)
1314
L3
L2
12
11
GND1
R1
10
120
3.5 nH
3.5 nH
Ω
C4 150 pF
P
V
handbook, full pagewidth
Fig.6 Test circuit; f
DO
BLI
to
1996 Jan 1511
RE
decoder
TPI
TPQ
IF testpoints
C1
1.2 pF
i(RF)
V
C3
3 pF
1.7 to
5
L1
nH
C2
1.0 pF
Pins 9, 17, 23 and 29 are not connected.
Page 12
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
Table 3 Tolerances of components shown in Fig.6 (note 1)
9supply voltage
VI2MI10I channel mixer input 2
VI1MI11I channel mixer input 1
VI1MQ12Q channel mixer input 1
VI2MQ13Q channel mixer input 2
GND214ground 2 (0 V)
COM15 gyrator filter resistor; common line
RGYR16gyrator filter resistor
VO1MUL17frequency multiplier output 1
VO2MUL18frequency multiplier output 2
RMUL19external emitter resistor for frequency
multiplier
TDC20DC test point; no external connection
for normal operation
OSC21 oscillator collector
GND322ground 3 (0 V)
OSB23oscillator base; crystal input
OSE24oscillator emitter
TS25test switch; connection to ground for
normal operation
BLI26 battery LOW indicator output
DO27 data output
RE28receiver enable input
VO2RF
VO1RF
VI1MQ
VI2MQ
Fig.8 Pin configuration; SO28.
TPI
TPQ
VI1RF
VI2RF
RRFA
GND1
V
VI2MI
VI1MI
GND2
1
2
3
4
5
6
7
UAA2080T
8
9
P
10
11
12
13
MBB972
28
27
26
25
24
23
22
21
20
19
18
17
16
1514
RE
DO
BLI
TS
OSE
OSB
GND3
OSC
TDC
RMUL
VO2MUL
VO1MUL
RGYR
COM
1996 Jan 1514
Page 15
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
CHIP DIMENSIONS AND BONDING PAD LOCATIONS
See Table 4 for bonding pad description and locations for x/y co-ordinates.
handbook, full pagewidth
3.83
mm
25
26
27
28
1
2
3
4
y
0
0
Where:
Pad 124 m x 124 mµµ
Pad not used
Pad 100 m x 100 mµµ
Pad 100 m x 100 m with reference point µµ
242322212019
UAA2080U
5
67891011
4.74 mm
µPad number 1 (diameter 124 m)
18
17
16
15
14
13
12
x
MLC707
Chip area: 18.15 mm2.
Chip thickness: 380 ±20µm.
Drawing not to scale.
Fig.9 Bonding pad locations.
1996 Jan 1515
Page 16
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
Table 4 Bonding pad centre locations (dimensions in µm)
SYMBOLPADDESCRIPTIONxy
TPI1IF test point; I channel−321296
TPQ2IF test point; Q channel−321000
VI1RF3pre-amplifier RF input 1−32360
VI2RF4pre-amplifier RF input 2; note 100
RRFA5external emitter resistor for pre-amplifier4720
GND16ground 1 (0 V)11600
VO2RF7pre-amplifier RF output 216880
VO1RF8pre-amplifier RF output 122320
V
P
VI2MI10I channel mixer input 236080
VI1MI11I channel mixer input 142160
VI1MQ12Q channel mixer input 14216360
VI2MQ13Q channel mixer input 24216960
GND214ground 2 (0 V)42161360
COM15gyrator filter resistor; common line42162024
RGYR16gyrator filter resistor42162496
VO1MUL17frequency multiplier output 142163136
VO2MUL18frequency multiplier output 241763456
RMUL19external emitter resistor for frequency multiplier36683458
TDC20DC test point; no external connection for normal operation29523456
OSC21oscillator collector23123456
GND322ground 3 (0 V)18323456
OSB23oscillator base; crystal input13283456
OSE24oscillator emitter4323456
TS25test switch; connection to ground for normal operation−323456
BLI26battery LOW indicator output−323136
DO27data output−322512
RE28receiver enable input−322152
9supply voltage27600
lower left corner of chip (typical values)−278−186
Note
1. All x/y co-ordinates are referenced to the centre of pad 4 (VI2RF); see Fig.9.
1996 Jan 1516
Page 17
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
INTERNAL CIRCUITS
handbook, full pagewidth
1
2
3
150 kΩ
4
1 kΩ1 kΩ
5
6
7
8
n.c.
5 kΩ
5 kΩ
9
150 Ω
32313028272625
n.c.
V
29
P
8.15 kΩ
UAA2080H
V
P
V
P
14
13
121110
24
V
P
23
n.c.
22
21
V
1615
20
P
19
18
17
n.c.
MGA788
Fig.10 Internal circuits drawn for LQFP32.
1996 Jan 1517
Page 18
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
MBB974 - 1
P
V
P
V
14
1312111098765432
UAA2080T
UAA2080U
Ω
8.15
P
V
k
P
V
P
V
handbook, full pagewidth
150Ω
Fig.11 Internal circuits drawn for SO28 and naked die.
Ω
5
k
2728262524232221201918171615
150
Ω
5
k
kΩ
1
kΩ
1
1
kΩ
1996 Jan 1518
Page 19
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
FUNCTIONAL DESCRIPTION
The complete circuit consists of the following functional
blocks as shown in Figs 1 to 6.
Radio frequency amplifier
The RF amplifier is an emitter-coupled pair driving a
balanced cascode stage, which drives an external
balanced tuned circuit. Its bias current is set by an external
300 Ω resistor R1 to typically 770 µA. With this bias
current the optimum source resistance is 1.3 kΩ at VHF
and 1.0 kΩ at UHF. At 930 MHz a higher bias current is
required to achieve optimum gain. A value of 120 Ω is
used for R1, which corresponds with a bias current of
approximately 1.3 mA and an optimum source resistance
of approximately 600 Ω.The capacitors C1 and C2
transform a 50 Ω source resistance to this optimum value.
The output drives a tuned circuit with capacitive divider
(C7, C8 and C9) to provide maximum power transfer to the
phase-splitting network and the mixers.
Mixers
The double balanced mixers consist of common base
input stages and upper switching stages driven from the
frequency multiplier. The 300 Ω input impedance of each
mixer acts together with external components (C10, C11;
L4, L5 respectively) as phase shifter/power splitter to
provide a differential phase shift of 90 degrees between
the I channel and the Q channel. At 930 MHz all external
phase shifter components are inductive (L10, L11; L4, L5).
The resonant circuit at output pin OSC selects the second
harmonic of the oscillator frequency. In other applications
a different multiplication factor may be chosen.
At 930 MHz an external oscillator circuit is required to
provide sufficient local oscillator signal for the frequency
multiplier.
Frequency multiplier
The frequency multiplier is an emitter-coupled pair driving
an external balanced tuned circuit. Its bias current is set by
external resistor R4 to typically 190 µA (173 MHz), 350 µA
(470 MHz) and 1 mA (930 MHz). The oscillator signal is
internally AC coupled to one input of the emitter-coupled
pair while the other input is internally grounded via a
capacitor. The frequency multiplier output signal between
pins VO1MUL and VO2MUL drives the upper switching
stages of the mixers. The bias voltage on pins VO1MUL
and VO2MUL is set by external resistor R3 to allow
sufficient voltage swing at the mixer outputs. The value of
R3 depends on the operating frequency: 1.5 kΩ
(173 MHz), 820 Ω (470 MHz) and 330 Ω (930 MHz).
Low noise amplifiers, active filters and gyrator filters
The low noise amplifiers ensure that the noise of the
following stages does not affect the overall noise figure.
The following active filters before the gyrator filters reduce
the levels of large signals from adjacent channels. Internal
AC couplings block DC offsets from the gyrator filter
inputs.
Oscillator
The oscillator is based on a transistor in common collector
configuration. It is followed by a cascode stage driving a
tuned circuit which provides the signal for the frequency
multiplier. The oscillator bias current (typically 250 µA) is
determined by the 1.8 kΩ external resistor R5.
The oscillator frequency is controlled by an external 3rd
overtone crystal in parallel resonance mode. External
capacitors between base and emitter (C17) and from
emitter to ground (C16) make the oscillator transistor
appear as having a negative resistance for small signals;
this causes the oscillator to start. Inductance L9 connected
in parallel with capacitor C16 to the emitter of the oscillator
transistor prevents oscillation at the fundamental
frequency of the crystal.
1996 Jan 1519
The gyrator filters implement the transfer function of a 7th
order elliptic filter. Their cut-off frequencies are determined
by the 47 kΩ external resistor R2 between pins RGYR and
COM. The gyrator filter output signals are available on IF
test pins TPI and TPQ.
Limiters
The gyrator filter output signals are amplified in the limiter
amplifiers to obtain IF signals with removed amplitude
information.
Demodulator
The limiter amplifier output signals are fed to the
demodulator. The demodulator output DO is going LOW or
HIGH depending upon which of the input signals has a
phase lead.
Page 20
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
Battery LOW indicator
The battery LOW indicator senses the supply voltage and
sets its output HIGH when the supply voltage is less than
Vth (typically 2.05 V). Low battery warning is available at
Band gap reference
The whole chip can be powered-up and powered-down by
enabling and disabling the band gap reference via the
receiver enable pin RE.
BLI.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Ground pins GND1, GND2 and GND3 connected together.
random bit sequence modulation (t
channel spacing; unless otherwise specified.
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Radio frequency input
P
i(ref)
Mixers to demodulator
α
acs
α
ci
α
c
α
sp
α
im
α
bl
f
offset
∆f
dev
t
on
=25°C; test circuit Figs 1 or 2; f
amb
= 250 ±25 µs measured between 10% and 90% of voltage amplitude) and 20 kHz
r
input sensitivity (P
i(ref)
is the
maximum available power at
the RF input of the test board)
adjacent channel selectivityT
BER ≤3⁄
T
V
T
= 172.941 MHz with ±4.0 kHz deviation; 1200 baud pseudo
i(RF)
; note 1−−126.5−123.5dBm
100
= −10 to +70 °C; note 2−−−120.5dBm
amb
= 1.9 V−−−117.5dBm
P
=25°C6972−dB
amb
= −10 to +70 °C67−−dB
amb
IF filter channel imbalance−−2dB
co-channel rejection−47dB
spurious immunity5060−dB
intermodulation immunity5560−dB
blocking immunity∆f >±1 MHz; note 37885−dB
frequency offset range
(3 dB degradation in sensitivity)
deviation range
deviation f = ±4.0 kHz±2.0−−kHz
deviation f = ±4.5 kHz±2.5−−kHz
2.5−7.0kHz
(3 dB degradation in sensitivity)
receiver turn-on timedata valid after setting RE input
−−5ms
HIGH; note 4
Notes
1. The bit error rate BER is measured using the test facility shown in Fig.13. Note that the BER test facility contains a
digital input filter equivalent to the one used in the PCA5000A, PCF5001 and PCD5003 POCSAG decoders.
2. Capacitor C16 requires re-adjustment to compensate temperature drift.
3. ∆f is the frequency offset between the required signal and the interfering signal.
4. Turn-on time is defined as the time from pin RE going HIGH to the reception of valid data on output pin DO. Turn-on
time is measured using an external oscillator (turn-on time using the internal oscillator is dependent upon the
oscillator circuitry).
1996 Jan 1522
Page 23
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
AC CHARACTERISTICS (470 MHz)
= 2.05 V; T
V
P
random bit sequence modulation (t
channel spacing; unless otherwise specified.
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Radio frequency input
P
i(ref)
Mixer input
P
i(mix)
Mixers to demodulator
α
acs
α
ci
α
c
α
sp
α
im
α
bl
f
offset
∆f
dev
t
on
=25°C; test circuit Figs 3 or 4; f
amb
= 250 ± 25 µs measured between 10% and 90% of voltage amplitude) and 20 kHz
r
input sensitivity (P
maximum available power at
the RF input of the test board)
i(ref)
is the
BER ≤3⁄
T
V
input sensitivityBER ≤3⁄
adjacent channel selectivityT
T
= 469.950 MHz with ±4.0 kHz deviation; 1200 baud pseudo
i(RF)
; note 1−−124.5−121.5dBm
100
= −10 to +70 °C; note 2−−−118.5dBm
amb
= 1.9 V−−−115.5dBm
P
; note 3−−115.0−110.0dBm
100
=25°C6770−dB
amb
= −10 to +70 °C65−−dB
amb
IF filter channel imbalance−−2dB
co-channel rejection−47dB
spurious immunity5060−dB
intermodulation immunity5560−dB
blocking immunity∆f >±1 MHz; note 47582−dB
frequency offset range
(3 dB degradation in sensitivity)
deviation range
deviation f = ±4.0 kHz±2.0−−kHz
deviation f = ±4.5 kHz±2.5−−kHz
2.5−7.0kHz
(3 dB degradation in sensitivity)
receiver turn-on timedata valid after setting RE input
−−5ms
HIGH; note 5
Notes
1. The bit error rate BER is measured using the test facility shown in Fig.13. Note that the BER test facility contains a
digital input filter equivalent to the one used in the PCA5000A, PCF5001 and PCD5003 POCSAG decoders.
2. Capacitor C16 requires re-adjustment to compensate temperature drift.
3. Test circuit Fig.5. P
is the maximum available power at the input of the test board. The bit error rate BER is
i(mix)
measured using the test facility shown in Fig.13.
4. ∆f is the frequency offset between the required signal and the interfering signal.
5. Turn-on time is defined as the time from pin RE going HIGH to the reception of valid data on output pin DO. Turn-on
time is measured using an external oscillator (turn-on time using the internal oscillator is dependent upon the
oscillator circuitry).
1996 Jan 1523
Page 24
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
AC CHARACTERISTICS (930 MHz)
= 2.05 V; T
V
P
random bit sequence modulation (t
channel spacing; unless otherwise specified.
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Radio frequency input
P
i(ref)
Mixers to demodulator
α
acs
α
c
α
sp
α
im
α
bl
f
offset
∆f
dev
t
on
=25°C; test circuit Fig.6 (note 1); f
amb
= 250 ± 25 µs measured between 10% and 90% of voltage amplitude) and 20 kHz
r
input sensitivity (P
i(ref)
is the
maximum available power at
the RF input of the test board)
adjacent channel selectivityT
BER ≤3⁄
V
= 1.9 V−−−108.0dBm
P
amb
= 930.500 MHz with ±4.0 kHz deviation; 1200 baud pseudo
i(RF)
; note 2−−120.0−114.0dBm
100
=25°C6069−dB
co-channel rejection−510dB
spurious immunity4060−dB
intermodulation immunity5360−dB
blocking immunity∆f >±1 MHz; note 36574−dB
frequency offset range
(3 dB degradation in sensitivity)
deviation range
deviation f = ±4.0 kHz±2.0−−kHz
deviation f = ±4.5 kHz±2.5−−kHz
2.5−7.0kHz
(3 dB degradation in sensitivity)
receiver turn-on timedata valid after setting RE input
−−5ms
HIGH; note 4
Notes
1. The external oscillator signal V
has a frequency of f
i(OSC)
= 310.1667 MHz and a level of −15 dBm.
OSC
2. The bit error rate BER is measured using the test facility shown in Fig.13. Note that the BER test facility contains a
digital input filter equivalent to the one used in the PCA5000A, PCF5001 and PCD5003 POCSAG decoders.
3. ∆f is the frequency offset between the required signal and the interfering signal.
4. Turn-on time is defined as the time from pin RE going HIGH to the reception of valid data on output pin DO. Turn-on
time is measured using an external oscillator (turn-on time using the internal oscillator is dependent upon the
oscillator circuitry).
1996 Jan 1524
Page 25
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
TEST INFORMATION
Tuning procedure for AC tests
1. Turn on the signal generator: f
gen=fi(RF)
+ 4 kHz, no modulation, V
= 1 mV (RMS).
i(RF)
2. Measure the IF with a counter connected to test pin TPI. Tune C16 to set the crystal oscillator to achieve fIF= 4 kHz
Change the generator frequency to f
frequency f
crystal frequency is f
signal must be used with f
= 172.941 MHz the crystal frequency is f
i(RF)
= 78.325 MHz. For a received input frequency f
XTAL
= 310.1667 MHz and a level of −15 dBm (for definition of crystal frequency, see
i(OSC)
gen=fi(RF)
− 4 kHz and check that fIF is also 4 kHz. For a received input
= 57.647 MHz, while for f
XTAL
i(RF)
= 930.500 MHz an external oscillator
= 469.950 MHz the
i(RF)
Table 1).
3. Set the signal generator to nominal frequency (f
wave modulation, V
receiver is tuned, to ensure V
= 1 mV (RMS). Note that the RF signal should be reduced in the following tests, as the
i(RF)
= 10 to 50 mV (p-p) on test pins TPI or TPQ.
o(IF)
) and turn on the modulation deviation ±4.0 kHz, 600 Hz square
i(RF)
4. Tune C15 (oscillator output circuit) and C12 (frequency multiplier output) to obtain a peak audio voltage on pin TPI.
5. Tune C3 and C6 (RF input and mixer input) to obtain a peak audio voltage on pin TPI. When testing the mixer input
sensitivity tune C23 instead of C3 and C6 (test circuit Fig.5).
6. Check that the output signal on pin TPQ is within 3 dB in amplitude and at 90° (±20°) relative phase of the signal on
pin TPI.
7. Check that data signal appears on output pin DO and proceed with the AC test.
AC test conditions
Table 5 Definitions for AC test conditions (see Table 6)
SIGNALDESCRIPTION
Modulated test signal 1
Frequency172.941, 469.950 or 930.500 MHz
Deviation±4.0 kHz
Modulation 1200 baud pseudo random bit sequence
Rise time250 ±25 µs (between 10% and 90% of final value)
Modulated test signal 2
Deviation±2.4 kHz
Modulation 400 Hz sinewave
Other definitions
f
f
f
∆f
P
P
P
P
1
2
3
cs
1
2
3
i(ref)
frequency of signal generator 1
frequency of signal generator 2
frequency of signal generator 3
channel spacing (20 kHz)
maximum available power from signal generator 1 at the test board input
maximum available power from signal generator 2 at the test board input
maximum available power from signal generator 3 at the test board input
maximum available power at the test board input to give a Bit Error Rate (BER) ≤3⁄
test signal 1, in the absence of interfering signals and under the conditions as specified in Chapters
“AC characteristics (173 MHz)”, “AC characteristics (470 MHz)” and “AC characteristics (930 MHz)”
1996 Jan 1525
for the modulated
100
Page 26
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
Table 6 AC test conditions (notes 1 and 2)
SYMBOLPARAMETERCONDITIONSTEST SIGNALS
α
α
α
α
α
f
offset
∆f
t
on
a
c
sp
im
bl
dev
adjacent channel selectivity;
Fig.12(b)
co-channel rejection; Fig.12(b) f2=f1±up to 3 kHz
spurious immunity; Fig.12(b)f2= 100 kHz to 2 GHz
intermodulation immunity;
Fig.12(c)
blocking immunity; Fig.12(b)f2=f1±1 MHz
frequency offset range;
Fig.12(a)
deviation range; Fig.12(a)deviation = ±2.5 to ±7 kHz; (∆f
receiver turn-on time;
Fig.12(a)
f2=f1±∆f
CS
generator 1: modulated test signal 1P1=P
generator 2: modulated test signal 2P
generator 1: modulated test signal 1P
generator 2: modulated test signal 2P
generator 1: modulated test signal 1P
generator 2: modulated test signal 2P
f2=f1±∆fcs; f3=f1±2∆f
cs
generator 1: modulated test signal 1P1=P
generator 2: unmodulatedP
generator 3: modulated test signal 2P3=P
generator 1: modulated test signal 1P
generator 2: modulated test signal 2P
deviation = ±4.0 kHz, f1=f
i(RF)
± 2 kHz (f
offset(min)
)
generator 1: modulated test signal 1P
dev(min)
to ∆f
dev(max)
)
generator 1: modulated test signal 1P
note 3
generator 1: modulated test signal 1P
+3dB
i(ref)
2=P1+αa(min)
i(ref)
2
+3dB
+3dB
+3dB
+3dB
+3dB
+3dB
+10dB
1=Pi(ref)
2=P1−αc(max)
1=Pi(ref)
2=P1+αsp( min)
2=P1+αim(min)
1=Pi(ref)
2=P1+αbl(min)
1=Pi(ref)
1=Pi(ref)
1=Pi(ref)
Notes
1. The tests are executed without load on pins TPI and TPQ.
2. All minimum and maximum values correspond to a bit error rate (BER) ≤3⁄
3. The BER measurement is started 5 ms (t
(BER ≤3⁄
100
).
) after VRE goes HIGH; BER is then measured for 100 bits
on(max)
1996 Jan 1526
in the wanted signal (P1).
100
Page 27
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
handbook, full pagewidth
(a) One generator.
(b) Two generators.
(c) Three generators.
(1) See Fig.13.
(a)
(b)
(c)
GENERATOR 1
R = 50 Ω
s
GENERATOR 1
R = 50 Ω
s
GENERATOR 2
R = 50 Ω
s
GENERATOR 1
R = 50 Ω
s
GENERATOR 2
R = 50 Ω
s
GENERATOR 3
R = 50 Ω
s
DEVICE
UNDER TEST
50 Ω 2-SIGNAL
POWER
COMBINER
50 Ω 3-SIGNAL
POWER
COMBINER
DEVICE
UNDER TEST
DEVICE
UNDER TEST
Fig.12 Test configurations.
BER TEST
FACILITY
BER TEST
FACILITY
BER TEST
FACILITY
MLC708
(1)
(1)
(1)
handbook, full pagewidth
GENERATOR
R = 50 Ω
s
DEVICE
UNDER TEST
DIGITAL
FILTER
250 µs
RISE TIME
Fig.13 BER test facility.
1996 Jan 1527
CLOCK
RECOVERY
PRESET
DELAY
PSEUDO
RANDOM
SEQUENCE
GENERATOR
recovered clock
retimed
Rx data
DATA
COMPARATOR
MASTER
CLOCK
MLC233
to error
counter
Page 28
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
PRINTED-CIRCUIT BOARDS
handbook, full pagewidth
Fig.14 PCB top view for LQFP32; test circuit Figs 1 and 3.
1996 Jan 1528
MBD562
Page 29
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
handbook, full pagewidth
Fig.15 PCB bottom view for LQFP32; test circuit Figs 1 and 3.
1996 Jan 1529
MBD561
Page 30
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
handbook, full pagewidth
C19
R3
VEE= GND; VC =VP.
TS
BLI
DO
RE
V
GND
L6L7
C14
C16
C12
UAA2080H
L8
C17
L9
R5
C18
P
C15
C13
XTAL
DOTPITPQ
R2
L5
L4
C11
C10
VIRF
C9
C7
C8
L3
C6
C4
L2
R1
MLC709
Fig.16 PCB top view with components for LQFP32; test circuit Fig.3.
1996 Jan 1530
Page 31
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
handbook, full pagewidth
C5
R4
C3
L1
C2
C1
MLC235
Fig.17 PCB bottom view with components for LQFP32; test circuit Fig.3.
1996 Jan 1531
Page 32
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
handbook, full pagewidth
Fig.18 PCB top view for SO28; test circuit Figs 2 and 4.
1996 Jan 1532
MBD565
Page 33
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
handbook, full pagewidth
Fig.19 PCB bottom view for SO28; test circuit Figs 2 and 4.
1996 Jan 1533
MBD567
Page 34
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
handbook, full pagewidth
V
P
GND
OPSBIDORE
DATA
OUT
RF IN
TPQTPI
R5
C18
XL1
C19
C17
C16
C15C12
UAA2080T
L3
C4
L7
L8
C11 L4
L2
C14
C8
R3
C13
L6
R2
L5
C9
C10
C7
GND
V
P
MBD566
VEE= GND; VCC=VP; BI = BLI; OPS = TS.
Fig.20 PCB top view with components for SO28; test circuit Fig.4.
1996 Jan 1534
Page 35
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
handbook, full pagewidth
C3
SHORT
R1
L1
C2
C1
R4
C5
Fig.21 PCB bottom view with components for SO28; test circuit Fig.4.
MBD568
1996 Jan 1535
Page 36
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
handbook, full pagewidth
C19
R3
V
GND
C12
L8
C17
L9
L6
R2
UAA2080H
L5
L4
L7
C14
C15
P
C13
C16
XTAL
C11
C23
V
C21
i(RF)
L10
C10
C22
R5
C18
TS
BLI
DO
RE
DOTPITPQ
MLC710
Fig.22 PCB top view with components for LQFP32; test circuit Fig.5.
1996 Jan 1536
Page 37
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
handbook, full pagewidth
C5
R4
Fig.23 PCB bottom view with components for LQFP32; test circuit Fig.5.
1996 Jan 1537
MLC237
Page 38
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
k, full pagewidth
V
i(OSC)
GND
C13
V
P
R3
C14
C19
C15
C12
L6
L7
L8
TS
BLI
DO
RE
TPI
TPQ
R2
UAA2080H
C1
C2
C8
R1
C9L4L5
L11
L10
C7
L3
C4
L2
C6
L1
C3
Fig.24 PCB top view with components for LQFP32; test circuit Fig.6.
1996 Jan 1538
V
MLC711
i(RF)
Page 39
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
handbook, full pagewidth
C5
R4
Fig.25 PCB bottom view with components for LQFP32; test circuit Fig.6.
1996 Jan 1539
MLC239
Page 40
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
PACKAGE OUTLINES
LQFP32: plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm
c
y
X
2417
25
pin 1 index
32
1
16
Z
E
e
w M
b
p
9
8
A
H
E
E
A
2
A
SOT358-1
Q
(A )
A
1
L
detail X
3
θ
L
p
e
DIMENSIONS (mm are the original dimensions)
mm
OUTLINE
VERSION
SOT358 -1
A
A1A2A3b
max.
0.20
1.60
0.05
1.45
0.25
1.35
IEC JEDEC EIAJ
UNIT
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
w M
b
p
D
H
D
p
0.4
0.3
Z
D
B
v M
02.55 mm
scale
(1)
(1)(1)(1)
cE
D
0.18
7.1
0.12
6.9
REFERENCES
eH
H
7.1
6.9
0.8
9.15
8.85
1996 Jan 1540
v M
D
A
B
9.15
8.85
LLpQZywv θ
E
0.69
0.75
0.45
0.59
0.250.11.00.2
EUROPEAN
PROJECTION
Z
D
0.9
0.9
0.5
0.5
ISSUE DATE
93-06-29
95-12-19
E
o
7
o
0
Page 41
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
SO28: plastic small outline package; 28 leads; body width 7.5 mm
D
c
y
Z
28
pin 1 index
1
e
15
14
w M
b
p
SOT136-1
E
H
E
Q
A
2
A
1
L
p
L
detail X
(A )
A
X
v M
A
A
3
θ
0510 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
OUTLINE
VERSION
SOT136-1
A
max.
2.65
0.10
A
1
0.30
0.10
0.012
0.004
A2A3b
2.45
0.25
2.25
0.096
0.01
0.089
IEC JEDEC EIAJ
075E06 MS-013AE
p
0.49
0.36
0.019
0.014
0.32
0.23
0.013
0.009
UNIT
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
(1)E(1)(1)
cD
18.1
7.6
7.4
0.30
0.29
1.27
0.050
17.7
0.71
0.69
REFERENCES
1996 Jan 1541
eHELLpQ
10.65
10.00
0.419
0.394
1.4
0.055
1.1
0.4
0.043
0.016
1.1
1.0
0.043
0.039
PROJECTION
0.25
0.250.1
0.01
0.01
EUROPEAN
ywvθ
Z
0.9
0.4
8
0.004
ISSUE DATE
0.035
0.016
95-01-24
97-05-22
0
o
o
Page 42
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
“IC Package Databook”
our
Reflow soldering
Reflow soldering techniques are suitable for all LQFP and
SO packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
Wave soldering
LQFP
Wave soldering is not recommended for LQFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
(order code 9398 652 90011).
SO
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
M
ETHOD (LQFP AND SO)
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
If wave soldering cannot be avoided, the following
conditions must be observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
• The footprint must be at an angle of 45° to the board
direction and must incorporate solder thieves
downstream and at the side corners.
Even with these conditions, do not consider wave
soldering LQFP packages LQFP48 (SOT313-2),
LQFP64 (SOT314-2) or LQFP80 (SOT315-1).
1996 Jan 1542
Page 43
Philips SemiconductorsProduct specification
Advanced pager receiverUAA2080
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Jan 1543
Page 44
Philips Semiconductors – a worldwide company
Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428)
BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
Tel. (02)805 4455, Fax. (02)805 4466
Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213,
Tel. (01)60 101-1236, Fax. (01)60 101-1211
Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands,
All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.
Printed in The Netherlands
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