Page 1
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Features
• Low power CMOS
• TMC2011A is a pin compatible replacement for the
TDC1011 and TMC2011
• TMC2211A is a pin compatible replacement for the
TMC2111
• Inputs and outputs are TTL compatible
• DC–40MHz clock rate
• Selectable delay lengths (TMC2011A: 3 to 18 stages,
TMC2111A: 1 to 16 stages)
• Special 4-bit wide mixed-delay mode (TMC2011A)
• Available in 24-pin CERDIP and plastic DIP and 28-lead
Plastic Leadless Chip Carrier
Applications
• Video filtering
• High speed data registers
• Local storage registers
• Digital delay lines
• Television special effects
• Pipeline register
Description
The TMC2011A and TMC2111A are high-speed, byte-wide
shift registers with programmable delay lengths.
The TMC2011A can be programmed to any length between
3 and 18 stages. It offers a special split-word mode which
allows for mixed delay lengths. The TMC2011A, constructed in low-power CMOS, is pin and function compatible
with the bipolar TDC1011.
The TMC2111A is a byte-wide shift register that can be programmed to lengths of 1 to 16 stages.
The TMC2011A and TMC2111A are fully synchronous,
with all operations controlled by a single master clock. Input
and output registers are positive-edge triggered D-type flipflops. The length and mode controls are also registered. Both
devices operate with a maximum clock rate of 40 MHz.
Fabricated in a submicron CMOS process, the TMC2011A
and TMC2111A are TTL-compatible, and are available in
24-pin CERDIP and Plastic DIP packages as well as a
28-lead Plastic Leadless Chip Carrier.
Block Diagrams
TMC2011A TMC2111A
R
1
DI
3-0
DO
3-0
DO
7-4
L
3-0
DI
7-4
MC
CLK
4
44
4-Bit Wide
1 of 16 Selector
4-Bit Wide
1 of 16 Selector
44
65-2011A-01
4
4
444
44
4
4
4
44
44
R
2
R
3
R
16
R
17
R
L
R
I
R1R
2
R
3
R
16
R
17
R
18
R
18
8
8
8
88
R
1
R
14
R
15
DO
7-0
L
3-0
DI
7-0
4
4
8-Bit Wide
1 of 16 Selector
88
65-2011A-02
8
R
L
R
16
CLK
TMC2011A/2111A
Variable-Length Shift Register
Rev. 1.1.0
Page 2
TMC2011A/2111A PRODUCT SPECIFICATION
2
Functional Description
The TMC2011A consists of two 4-bit wide, programmable
length shift registers. The TMC2111A consists of a single
8-bit wide, programmable length shift register. The internal
registers of each device share control signals and a common
clock.
Pin Assignments
24 Lead DIP (B2, N2) Packages
28 Lead PLCC (R3) Package
DI
0
TMC2011A
1
12
24
65-2011A-03
13
DI
1
DI
2
DI
3
L
0
L
1
V
DD
CLK
DI
4
DI
5
DI
6
DI
7
DO
0
DO
1
DO
2
DO
3
L
2
L
3
GND
MC
DO
4
DO
5
DO
6
DO
7
DI
0
TMC2111A
1
12
24
13
DI
1
DI
2
DI
3
L
0
L
1
V
DD
CLK
DI
4
DI
5
DI
6
DI
7
DO
0
DO
1
DO
2
DO
3
L
2
L
3
GND
GND
DO
4
DO
5
DO
6
DO
7
DI
3
L
0
L
1
V
DD
CLK
DI
4
NC
NC
L
2
L
3
GND
GND
MC
NC
DI2DI1DI0DO0DO1DO2DO
3
DI5DI6DI
7
DO7DO6DO5DO
4
TMC2011A
128
65-2011A-04
DI
3
L
0
L
1
V
DD
CLK
DI
4
NC
NC
L
2
L
3
GND
GND
MC
NC
DI2DI1DI0DO0DO1DO2DO
3
DI5DI6DI
7
DO7DO6DO5DO
4
TMC2111A
128
Page 3
PRODUCT SPECIFICATION TMC2011A/2111A
3
Pin Descriptions – TMC2011A
Pin Name
Pin Number
Pin Function DescriptionDIP PLCC
Power
V
DD
78 Supply Voltage. The TMC2011A and operates from a single +5V supply.
All power and ground lines must be connected.
GND 18 21,22 Ground. The TMC2011A operates from a single +5V supply. All power
and ground lines must be connected.
Data Inputs
DI
7-0
12,11,10,
9,4,3,2,1
14,13,12,
10,5,4,3,2
Data Input. Eight inputs are provided for the data, which pass through the
shift register unchanged. The eight inputs on the TMC2011A are divided
into two groups of four bits to allow mixed delay operation. The lengths of
these two groups are different when the Mode Control (MC) is HIGH (see
Table 1). When MC is LOW both groups have equal delays.
Data Outputs
DO
7-0
13,14,15,
16,21,22,
23,24
15,16,17,
18,26,27,
28,1
Data Output. The outputs of the shift register are delayed relative to the
input signals. The amount of the delay is programmable (see Table 1).
The outputs remain valid for a minimum of t
HO
nanoseconds after the
leading edge of CLK. This allow the data to be latched into circuits with
non-zero hold time requirements.
Controls
CLK 8 9
Master Clock. All inputs and outputs are synchronous and operate from a
single master clock. All operations occur on the rising edge of the master
clock.
L
3-0
19,20,6,5 23,24,7,6 Length Select. The length select input is used to determine the register
delay of the TMC2011A. This input is registered and affects the output t
DO
after the clock edge after it is input to the device (see Timing Diagram).
Delay lengths are specified in Table 1.
MC 17 20
Mode Control. The Mode Control is used to select the special 4-bit wide
split mode. When HIGH, the delay on DO
7-4
is fixed at 18 stages, while
DO
3-0
have the delay specified by the length select. When MC is LOW, all
eight bits have equal delays as specified by the length select.
Page 4
TMC2011A/2111A PRODUCT SPECIFICATION
4
Table 1. Programming Length Controls
Pin Descriptions – TMC2111A
Pin Name
Pin Number
Pin Function DescriptionDIP PLCC
Power
V
DD
78 Supply Voltage. The TMC2111A operates from a single +5V supply. All
power and ground lines must be connected.
GND 17,18 20,21,22 Ground. The TMC2111A operates from a single +5V supply. All power
and ground lines must be connected.
Data Inputs
DI
7-0
12,11,10,
9,4,3,2,1
14,13,12,
10,5,4,3,2
Data Input. Eight inputs are provided for the data, which pass through the
shift register unchanged. The TMC2111A consists of a single group of
eight bits with all data bits having equal delays.
Data Outputs
DO
7-0
13,14,15,
16,21,22,
23,24
15,16,17,
18,26,27,
28,1
Data Output. The outputs of the shift register are delayed relative to the
input signals. The amount of the delay is programmable (see Table 1).
The outputs remain valid for a minimum of t
HO
nanoseconds after the
leading edge of CLK. This allow the data to be latched into circuits with
non-zero hold time requirements.
Controls
CLK 8 9
Master Clock. All inputs and outputs are synchronous and operate from a
single master clock. All operations occur on the rising edge of the master
clock.
L
3-0
19,20,6,5 23,24,7,6 Length Select. The length select input is used to determine the register
delay of the TMC2111A. This input is registered and affects the output t
DO
after the clock edge after it is input to the device (see Timing Diagram).
Delay lengths are specified in Table 1.
TMC2011A
TMC2111AInput Code Mode (MC) =0 Mode (MC) =1
L
3
L
2
L
1
L
0
DO
3-0
Length DO
7-4
Length DO
3-0
Length DO
7-4
Length DO
7-0
Length
0000333181
0001444182
0010555183
0011666184
0100777185
0101888186
0110999187
0 1 1 1 10 10 10 18 8
1 0 0 0 11 11 11 18 9
1 0 0 1 12 12 12 18 10
1 0 1 0 13 13 13 18 11
1 0 1 1 14 14 14 18 12
1 1 0 0 15 15 15 18 13
1 1 0 1 16 16 16 18 14
1 1 1 0 17 17 17 18 15
1 1 1 1 18 18 18 18 16
Page 5
PRODUCT SPECIFICATION TMC2011A/2111A
5
Absolute Maximum Ratings
(beyond which the device may be damaged)
1
Notes:
1. Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only if
Operating Conditions are not exceeded.
2. Applied voltage must be current limited to specified range.
3. Forcing voltage must be limited to specified range.
4. Current is specified as conventional current flowing into the device.
Operating Conditions
Parameter Min Typ Max Unit
Supply Voltage -0.5 7.0 V
Input Voltage -0.5 V
DD
+ 0.5 V
Output, Applied Voltage
2
-0.5 V
DD
+ 0.5 V
Output, Externally Forced Current
3,4
-3.0 6.0 mA
Output, Short Circuit Duration (single output in HIGH state to
ground)
1 sec
Operating, Ambient Temperature -20 110
°
C
Junction Temperature 140
°
C
Storage Temperature -65 150
°
C
Lead Soldering (10 seconds) 300
°
C
Parameter Min Nom Max Units
V
DD
Power Supply Voltage 4.75 5.0 5.25 V
f
CLK
Clock frequency TMC2011A, 2111A 30 MHz
TMC2011A-1, 2111A-1 40
t
PWH
CLK pulse width, HIGH 12 ns
t
PWL
CLK pulse width, LOW 12 ns
t
S
Input Data Set-up Time 6 ns
t
H
Input Data Hold Time 1 ns
V
IH
Input Voltage, Logic HIGH DI
7-0
, L
3-0
, MC 2.0 V
CLK 2.6
V
IL
Input Voltage, Logic LOW 0.8 V
I
OH
Output Current, Logic HIGH -2.0 mA
I
OL
Output Current, Logic LOW 4.0 mA
T
A
Ambient Temperature, Still Air 0 70
°
C
Page 6
TMC2011A/2111A PRODUCT SPECIFICATION
6
Electrical Characteristics
Switching Characteristics
Parameter Conditions Min Typ Max Units
I
DDU
Power Supply Current, Unloaded V
DD
= Max, f
CLK
=30 MHz
V
DD
= Max, f
CLK
=40 MHz
30
40
mA
mA
I
DDQ
Power Supply Current, Quiescent V
DD
= Max, CLK = LOW 0.5 mA
C
PIN
I/O Pin Capacitance 5 pF
I
IH
Input Current, HIGH V
DD
= Max, V
IN
= V
DD
±10 mA
I
IL
Input Current, LOW VDD = Max, VIN = 0 V ±10 mA
I
OS
Short-Circuit Current -100 mA
V
OH
Output Voltage, HIGH DO
7-0
, IOH = Max 2.4 V
V
OL
Output Voltage, LOW DO
7-0
, IOL = Max 0.4 V
Parameter Conditions Min Typ Max Units
t
DO
Output Delay Time C
LOAD
= 25 pF 15 ns
t
HO
Output Hold Time C
LOAD
= 25 pF 3 ns
Page 7
PRODUCT SPECIFICATION TMC2011A/2111A
7
Timing Diagrams
Figure 1. Preset Length Controls
Figure 2. Length Control Operation
Equivalent Circuits
Figure 3. Equivalent Digital Input Circuit Figure 4. Equivalent Digital Output Circuit
CLK 1
L is Length from Table 1.
65-2011A-05
2
1/f
Controls Controls Controls Controls Controls
Data
N-1
Data
N+L-1
Data
N+L
Data
N+L+1
Data
N+L+2
Data
N
Data
N+1
Data
N+2
t
PWH
tSt
H
tSt
H
t
HO
t
DO
t
PWL
345
DI
7-0
MC, L
3-0
DO
7-0
CLK
65-2011A-06
Data
10
Data
5
Data
6
Data
7
Data
8
Data
8
Data
9
Data
10
Data
7
Data
8
Data
9
Data
10
Data
10
Data
11
Data
12
0010 0010 0011 0011 0011 0011 0011
Data
11
Data
12
Data
13
Data
14
Data
15
Data
16
DI
7-0
L
3-0
TMC2011A
DO
7-0
(MC=0)
TMC2111A
DO
3-0
(MC=1)
Data or
Control
Input
V
DD
p
n
27014B
GND
V
DD
p
n
27011B
GND
Output
Page 8
TMC2011A/2111A PRODUCT SPECIFICATION
8
Notes:
Page 9
PRODUCT SPECIFICATION TMC2011A/2111A
9
Mechanical Dimensions
24-Lead Ceramic DIP Package
A — .200 — 5.08
Symbol
Inches
Min. Max. Min. Max.
Millimeters
Notes
b1 .014 .023 .36 .58
.065 1.65
b2 .045 1.14
c1 .008 .015 .20 .38
E .220 .310 5.59 7.87
e
.100 BSC 2.54 BSC
L .125 .200 3.18 5.08
.015 .060 .38 1.52
.005 — .13 —
3
6
8
4
8
2, 8
4
5
eA
.300 BSC 7.62 BSC
7
Q
s1
90¡ 105¡ 90¡ 105¡
a
D — 1.280 — 32.51
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Index area: a notch or a pin one identification mark shall be located
adjacent to pin one. The manufacturer's identification shall not be
used as pin one identification mark.
The minimum limit for dimension "b2" may be .023 (.58mm) for leads
number 1, 12, 13 and 24 only.
Dimension "Q" shall be measured from the seating plane to the base
plane.
This dimension allows for off-center lid, meniscus and glass overrun.
The basic pin spacing is .100 (2.54mm) between centerlines. Each
pin centerline shall be located within ±.010 (.25mm) of its exact
longitudinal position relative to pins 1 and 24.
Applies to all four corners (leads number 1, 12, 13, and 24).
"eA" shall be measured at the center of the lead bends or at the
centerline of the leads when "a" is 90¡.
All leads – Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish applied.
Twenty-two spaces.
NOTE 1
D
12
1
s1
b2
e
b1
E
Q
A
L
13
24
eA
c1
a
Page 10
TMC2011A/2111A PRODUCT SPECIFICATION
10
Mechanical Dimensions (continued)
24-Lead Plastic DIP Package
D
B1
e
B
E1
A1
A
L
12
13
24
1
E
eB
C
D1
A — .210 — 5.33
Symbol
Inches
Min. Max. Min. Max.
Millimeters
Notes
A1 .015 — .38 —
.022 .56
B .014 .36
B1 .045 .070 1.14 1.78
D 1.125 1.275 28.58 32.39
.240 .280 6.10 7.11
E
eB — .430 — 10.92
.115 .195 2.53 4.95
D1 .005 — .13 —
e
.100 BSC 2.54 BSC
N
24 24
A2
.300 .325 7.62 8.26
E1
L .115 .160 2.92 4.06
C .008 .015 .20 .38 4
2
2
5
Notes:
1.
2.
3.
4.
5.
Dimensioning and tolerancing per ANSI Y14.5M-1982.
"D" and "E1" do not include mold flashing. Mold flash or protrusions
shall not exceed .010 inch (0.25mm).
Terminal numbers are shown for reference only.
"C" dimension does not include solder finish thickness.
Symbol "N" is the maximum number of terminals.
Page 11
PRODUCT SPECIFICATION TMC2011A/2111A
11
Mechanical Dimensions (continued)
28-Lead PLCC Package
D
e
E
A .165 .180 4.19 4.57
Symbol
Inches
Min. Max. Min. Max.
Millimeters
Notes
E1
J
D1
A
A1
A2
B
B1
D3/E3
J
– C –
ccc C
LEAD COPLANARITY
A1 .090 .120 2.29 3.05
A2 .020 .51——
B .013 .021 .33 .53
D/E .485 .495 12.32 12.57
D1/E1 .450 .456 11.43 11.58
D3/E3 .300 BSC 7.62 BSC
e .050 BSC 1.27 BSC
J .042 .048 1.07 1.22 2
3
ND/NE 7 7
N28 28
ccc .004 0.10——
B1 .026 .032 .66 .81
Notes:
1.
2.
3.
All dimensions and tolerances conform to ANSI Y14.5M-1982
Corner and edge chamfer (J) = 45¡
Dimension D1 and E1 do not include mold protrusion. Allowable
protrusion is .101" (.25mm)
Page 12
TMC2011A/2111A PRODUCT SPECIFICATION
5/20/98 0.0m 001
Stock#DS30002011A
Ó 1998 Fairchild Semiconductor Corporation
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1.Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2.A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Ordering Information
Product
Number
Temperature
Range
Speed
Grade Screening Package
Package
Marking
TMC2011AB2C 0°C to 70°C 30 MHz Commercial 24 Pin 0.3" CerDIP 2011AB2C
TMC2011AB2C1 0°C to 70°C 40 MHz Commercial 24 Pin 0.3" CerDIP 2011AB2C1
TMC2011AN2C 0°C to 70°C 30 MHz Commercial 24 Pin 0.3" Plastic DIP 2011AN2C
TMC2011AN2C1 0°C to 70°C 40 MHz Commercial 24 Pin 0.3" Plastic DIP 2011AN2C1
TMC2011AR3C 0°C to 70°C 30 MHz Commercial 28 Lead PLCC 2011AR3C
TMC2011AR3C1 0°C to 70°C 40 MHz Commercial 28 Lead PLCC 2011AR3C1
TMC2111AB2C 0°C to 70°C 30 MHz Commercial 24 Pin 0.3" CerDIP 2111AB2C
TMC2111AB2C1 0°C to 70°C 40 MHz Commercial 24 Pin 0.3" CerDIP 2111AB2C1
TMC2111AN2C 0°C to 70°C 30 MHz Commercial 24 Pin 0.3" Plastic DIP 2111AN2C
TMC2111AN2C1 0°C to 70°C 40 MHz Commercial 24 Pin 0.3" Plastic DIP 2111AN2C1
TMC2111AR3C 0°C to 70°C 30 MHz Commercial 28 Lead PLCC 2111AR3C
TMC2111AR3C1 0°C to 70°C 40 MHz Commercial 28 Lead PLCC 2111AR3C1
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