Datasheet TDA1388M, TDA1388T Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA1388

Bitstream continuous calibration
filter-DAC for CD-ROM audio
applications

Objective specification
Supersedes data of 1995 Dec 08
File under Integrated Circuits, IC01

1996 Jul 17

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

FEATURES
Multiple format input interface

2

• I

S-bus and LSB-justified input format compatible

• 1fs input format data rate.

Extensive channel manipulation features

• Separate soft mute on left and right channel

• Channel interchange function (left to right and right to

left)

• Monaural function (left to right or right to left)

1

• True mono function

Digital sound processing

• Separate digital volume control for left and right
channels

• Digital tone control, bass boost and treble

• dB-linear volume and tone control (low microcontroller

load)

• Digital de-emphasis

• Soft mute.

Advanced audio output configuration

• Stereo line output (under microcontroller volume
control)

• Stereo headphone output (under 5-tap potentiometer
volume control)

• Line output independent of headphone output volume

• Power on/off click prevention circuitry

• High linearity, dynamic range, low distortion.

General

• Integrated digital filter plus DAC plus headphone driver

• No analog post filter required

• Easy application

• Functions controllable by static pins or by

microcontroller interface

• 5 V power supply

• Low power consumption

• Small package size (SO28 and SSOP28).

⁄2(left plus right).

GENERAL DESCRIPTION

The TDA1388 CMOS digital-to-analog bitstream converter
incorporates an up-sampling digital filter and noise shaper,
unique signal processing features and integrated line and
headphone drivers. The digital processing features are of
high sound quality due to the wide dynamic range of the
bitstream conversion technique.

The TDA1388 supports the I
word lengths of up to 20 bits and the LSB justified serial
data input format with word lengths of 16, 18 and 20 bits.
Two cascaded half-band filters and a sample-and-hold
function increase the oversampling rate from 1f
A 2nd-order noise shaper converts this oversampled data
to a bitstream for the 5-bit continuous calibration
Digital-to-Analog Converters (DACs).

On board amplifiers convert the output current to a voltage
signal capable of driving a line output. The signal is also
used to feed the integrated headphone amplifiers.
The volume of the headphone is controlled by an external
potentiometer.

The TDA1388 has special sound processing features for
use in CD-ROM audio applications, which can be
controlled by static pins or microcontroller interface.
These functions are de-emphasis, volume, bass boost,
treble, soft mute and the channel manipulation functions
needed for ATAPI-compliant functionality in CD-ROM
audio processing.

TDA1388

2

S-bus data input mode with

to 64fs.

s

1996 Jul 17 2

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC

TDA1388

for CD-ROM audio applications

ORDERING INFORMATION

= 256f
= 384f

PACKAGE

s
s

−−85 −80 dB

− 0.006 0.013 %

−−35 −30 dBA

− 1.8 3.2 %

−−65 − dB

− 0.056 − %

−−70 − dB

− 0.032 − %

−−35 −30 dBA

− 1.8 3.2 %
90 95 − dBA

− 64f

− 48f

s
s

− bits

− bits

TYPE

NUMBER

NAME DESCRIPTION VERSION

TDA1388T SO28 plastic small outline package; 28 leads; body width 7.5 mm. SOT136-1
TDA1388M SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm. SOT341-1

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V

DD

I

DD

V

FS(rms)

supply voltage note 1 4.5 5.0 5.5 V
supply current note 2 − 22 − mA
full-scale output voltage

VDD= 5 V 0.9 1.0 1.1 V

(RMS value)

(THD+N)/S total harmonic distortion plus

noise as a function of signal for
the line output

total harmonic distortion plus
noise as a function of signal for
the headphone output

0 dB signal;

=5kΩ

R

L

−60 dB signal;
=5kΩ

R

L

0 dB signal;

=16Ω

R

L

0 dB signal;

=32Ω

R

L

−60 dB signal;
=16Ω or RL=32Ω

R

L

S/N signal-to-noise ratio A-weighted;

at code 00000H

BR input bit rate at data input f

f

sys

T

amb

system clock frequency 8.192 − 18.432 MHz
operating ambient temperature −20 − +70 °C

sys

f

sys

Notes

1. All V

and VSS pins must be connected to the same supply or ground respectively.

DD

2. Measured at input code 00000H and VDD=5V.

1996 Jul 17 3

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

BLOCK DIAGRAM

DATA

IF2

IF1

11

8

7

SERIAL DATA INPUT

SYSCLK
SYSSEL

TC

V

DDD

V

SSD

FILTCL

14
15

20

12

13

5

TIMING

TDA1388



R

CONV1

16 (4-BIT)

CALIBRATED

CURRENT
SOURCES

CHANNEL INTERCHANGE

DE-EMPHASIS

VOLUME CONTROL

BASS BOOST AND TREBLE

SOFT MUTE

FILTER STAGE 1 + 2

SAMPLE-AND-HOLD

16 × OVERSAMPLING

2nd-ORDER

NOISE

SHAPER



DATA

ENCODER





















2nd-ORDER

NOISE

SHAPER

DATA

ENCODER

BCK

9

4f

s

64f

s





CALIBRATED

16 (4-BIT)

CURRENT
SOURCES



ACPWS

1910

FEATURE

CONTROL

UNIT

R

CONV2

TDA1388

18

APPL2

17

APPL1

16

APPL0

22

V

DDA

23

V

SSA

24

FILTCR

−

V

OL

V

ref

HPINL

4

V

DDA

6

3

30 kΩ

+

+

−

30 kΩ

LEFT OUTPUT

SWITCHES

16 (4-BIT)

CALIBRATED

CURRENT

SINKS



2

HPOUTL

REFERENCE

SOURCE

REFERENCE

SOURCE

Fig.1 Block diagram.

1996 Jul 17 4

RIGHT OUTPUT

SWITCHES

16 (4-BIT)

CALIBRATED

CURRENT

SINKS



30 kΩ

27

HPOUTR

−
+

+

−

30 kΩ

25

28

21

26

MGD015

V

OR

V

DDO

1

V

SSO1

V

SSO2

HPINR

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

PINNING

SYMBOL PIN DESCRIPTION

V

SSO1

HPOUTL 2 left headphone output voltage
HPINL 3 left headphone input voltage
V

OL

FILTCL 5 capacitor for left channel 1st-order

V

ref

IF1 7 input format selection 1
IF2 8 input format selection 2
BCK 9 bit clock input
WS 10 word selection input
DATA 11 data input
V

DDD

V

SSD

SYSCLK 14 system clock 256f
SYSSEL 15 system clock selection
APPL0 16 application mode 0 input
APPL1 17 application mode 1 input
APPL2 18 application mode 2 input
ACP 19 application control input
TC 20 test control
V

SSO2

V

DDA

V

SSA

FIL TCR 24 capacitor for right channel 1st-order

V

OR

HPINR 26 right headphone input voltage
HPOUTR 27 right headphone output voltage
V

DDO

1 operational amplifier ground 1

4 left channel audio voltage output

filter function, should be connected
between this pin and V

(pin 4)

OL

6 internal reference voltage

12 digital supply voltage
13 digital ground

or 384f

s

s

21 operational amplifier ground 2
22 analog supply voltage
23 analog ground

filter function, should be connected
between this pin and V

(pin 25)

OR

25 right channel audio voltage output

28 operational amplifier supply voltage

handbook, halfpage

V

HPOUTL

FILTCL

SSO1

HPINL

V

OL

V

ref

IF1

1
2
3
4
5
6
7

TDA1388

IF2

8

BCK

9

WS

10

DATA

11

V

12

DDD

V

13

SSD

SYSCLK

14

Fig.2 Pin configuration.

MGD014

TDA1388

V

28

DDO

27

HPOUTR

26

HPINR

25

V

OR

24

FILTCR

23

V

SSA

22

V

DDA

21

V

SSO2

TC

20

ACP

19

APPL2

18

APPL1

17

APPL0

16

SYSSEL

15

1996 Jul 17 5

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

FUNCTIONAL DESCRIPTION

The TDA1388 CMOS DAC incorporates an up-sampling
digital filter, a sample-and-hold register, a noise shaper,
continuously calibrated current sources, line amplifiers
and headphone amplifiers. The 1fs input data is increased
to an oversampled rate of 64fs. This high-rate
oversampling, together with the 5-bit DAC, enables the
filtering required for waveform smoothing and out-of-band
noise reduction to be achieved by simple 1st-order analog
post-filtering.

System clock

The TDA1388 accommodates slave mode only, this
means that in all applications the system devices must
provide the system clock. The system frequency is
selectable. The options are 256f
clock must be locked in frequency to the I2S-bus input
signals.

Table 1 System clock selection

SYSSEL DESCRIPTION

0 256f
1 384f

Multiple format input interface

The TDA1388 supports the following data input formats;

2

S-bus with data word length of up to 20 bits.

• I

• LSB justified serial format with data word length of

16, 18 or 20 bits.

and 384fs. The system

s

s
s

TDA1388

Table 2 Data input formats

IF1 IF2 FORMAT

2

00I
0 1 LSB-justified, 16 bits
1 0 LSB-justified, 18 bits
1 1 LSB-justified, 20 bits

The input formats are illustrated in Fig.3. Left and right
data-channel words are time multiplexed.

Input mode

The TDA1388 has two input modes, a static-pin mode and
a microcontroller mode. In the static-pin mode, the digital
sound processing features such as mute left, mute right
and de-emphasis are controlled by external pins.
The other digital sound processing features have a default
value. In the microcontroller mode, all the digital sound
processing features can be controlled by the
microcontroller. The controllable features are:

• De-emphasis

• Volume left channel

• Volume right channel

• Flat/min/max switch

• Bass boost

• Treble

• Channel manipulation modes.

The selection of one of the two modes is controlled by the
ACP pin. When this pin is at logic 0 then the static pin
mode will be selected. When the pin is at logic 1 then the
microcontroller mode will be selected.

S-bus

Table 3 Selectable values of the digital sound processing features

FEATURES STATIC-PIN MODE MICROCONTROLLER MODE

De-emphasis 0 Hz or 44.1 kHz 0 Hz or 44.1 kHz
Volume left channel 0 dB (fixed) 0 dB to −∞ dB
Volume right channel 0 dB (fixed) 0 dB to −∞ dB
Flat/min/max switch flat (fixed) flat/min/max
Bass boost flat set (fixed) flat, min or max set
Treble flat set (fixed) flat, min or max set
Mute left channel external pin selectable (see Table 4)
Mute right channel external pin selectable (see Table 4)
Channel manipulation modes L_CHANNEL = L (fixed) selectable (see Table 10)

R_CHANNEL = R (fixed)

1996 Jul 17 6

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

STATIC-PIN MODE
In the static-pin mode most of the features have a default

value (see Table 3). The features that are controlled by the
external pins are, mute left channel, mute right channel
and de-emphasis.

Table 4 External pin feature control in the static-pin

mode

PIN FEATURE

APPL0 mute left channel
APPL1 mute right channel
APPL2 de-emphasis

ICROCONTROLLER MODE

M
The exchange of data and control information between the

microcontroller and the TDA1388 is accomplished through
a serial hardware interface comprising the following pins:

APPL0: microcontroller interface data line.
APPL1: microcontroller interface mode line.
APPL2: microcontroller interface clock line.

Information transfer through the microcontroller bus is
organized in accordance with the so-called ‘L3’ format, in
which two different modes of operation can be
distinguished; address mode and data transfer mode
(see Figs 4 and 5).

TDA1388

Table 5 Selection of data transfer

BIT 1 BIT 0 TRANSFER

0 0 data (volume left, volume right, bass

boost and treble)
0 1 not used
1 0 status (de-emphasis, mode and

channel-manipulation)
1 1 not used

Data bits 7 to 2 represent a 6-bit device address, with bit 7
being the MSB and bit 2 the LSB. The address of the
TDA1388 is 000101 (bit 7 to bit 2). In the event that the
TDA1388 receives a different address, it will deselect its
microcontroller interface logic.

Data transfer mode

The selection preformed in the address mode remains
active during subsequent data transfers, until the
TDA1388 receives a new address command.
The fundamental timing of data transfers is essentially the
same as in the address mode, shown in Fig.4.
The maximum input clock and data rate is 64fs. All
transfers are bitwise, i.e. they are based on groups of
8 bits. Data will be stored in the TDA1388 after the eighth
bit of a byte has been received. A multibyte transfer is
illustrated in Fig.6.

The address mode is required to select a device
communicating via the L3-bus and to define the
destination registers for the data transfer mode.
Data transfer for the TDA1388 can only be in one direction,
input to the TDA1388 to program its sound processing and
other functional features.

Address mode

The address mode is used to select a device for
subsequent data transfer and to define the destination
registers. The address mode is characterized by APPL1
being LOW and a burst of 8 pulses on APPL2,
accompanied by 8 data bits. The fundamental timing is
shown in Fig.4. Data bits 0 to 1 indicate the type of the
subsequent data transfer as shown in Table 5.

Table 6 Data transfer of type ‘status’

BIT 7 BIT6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 REGISTER SELECTED

0 M1 M0 DE OR1 OR0 OL1 OL0 MODE (1 : 0), DEEMPHASIS, CHANNEL_MA-

1996 Jul 17 7

Programming the sound processing and other features

The sound processing and other feature values are stored
in independent registers. The first selection of the registers
is achieved by the choice of data type that is transferred.
This is performed in the address mode, BIT 1 and BIT 0
(see Table 5). The second selection is performed by the
2 MSBs of the data byte (BIT 7 and BIT 6). The other bits
in the data byte (BIT 5 to BIT 0) is the value that is placed
in the selected registers.

When the data transfer of type ‘data’ is selected, the
features VOLUME_R, VOLUME_L, BASS BOOST and
TREBLE can be controlled. When the data transfer of type
‘status’ is selected, the features MODE, DE-EMPHASIS,
CHANNEL_MANIP_R and CHANNEL_MANIP_L can be
controlled.

NIP_R (1 : 0), CHANNEL_MANIP_L (1 : 0)

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

Table 7 Data transfer of type ‘data’

BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 REGISTER SELECTED

0 0 VR5 VR4 VR3 VR2 VR1 VR0 VOLUME_R (5 : 0)
0 1 VL5 VL4 VL3 VL2 VL1 VL0 VOLUME_L (5 : 0)

(1)

10X
11X

Note

1. X = don’t care.

MODE: a 2-bit value to program the mode of the sound
processing filters of Bass Boost and Treble. There are
three modes: flat, min and max.

Table 8 The flat/min/max switch

MODE 1 MODE 0 FUNCTION

0 0 flat
0 1 min
1 0 min
1 1 max

BB4 BB3 BB2 BB1 BB0 BASS BOOST (4 : 0)

(1)

TR4 TR3 TR2 TR1 TR0 TREBLE (4 : 0)

DE-EMPHASIS: a 1-bit value to enable the digital
de-emphasis filter.

Table 9 De-emphasis

DEEM FUNCTION

0 no de-emphasis
1 de-emphasis, 44.1 kHz

TDA1388

CHANNEL_MANIP_R and CHANNEL_MANIP_L: both are a 2 bit value to program the right or left channel manipulation.

Table 10 Channel manipulation modes

CHANNEL_MANIP_L<1 : 0> CHANNEL_MANIP_R<1 : 0> L_CHANNEL R_CHANNEL

00 00 MUTE MUTE
00 01 MUTE R
00 10 MUTE L

1

00 11 MUTE

⁄2(L+R)

01 00 R MUTE
01 01 R R
01 10 R L

1

01 11 R

⁄2(L+R)

10 00 L MUTE
10 01 L R
10 10 L L

1

10 11 L

11 00
11 01
11 10
11 11

1

⁄2(L + R) MUTE

1

⁄2(L + R) R

1

⁄2(L + R) L

1

⁄2(L + R)

⁄2(L+R)

1

⁄2(L+R)

1996 Jul 17 8

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC

TDA1388

for CD-ROM audio applications

VOLUME_R: a 6-bit value to program the right channel volume attenuation (VR5 to VR0). The range is 0 dB to−∞ dB in
steps of 1 dB.

Table 11 Volume right settings

VR5 VR4 VR3 VR2 VR1 VR0 VOLUME (dB)

000000 0
000001 0
000010 −1
000011 −2

... ... ... ... ... ... ...

111000 −55
111001 −∞
111010 −∞
111011 −∞
111100 −∞
111101 −∞
111110 −∞
111111 −∞

VOLUME_L: a 6-bit value to program the left channel volume attenuation (VL5 to VL0). The range is 0 dB to −∞ dB in
steps of 1 dB.

Table 12 Volume left settings

VR5 VR4 VR3 VR2 VR1 VR0 VOLUME (dB)

000000 0
000001 0
000010 −1
000011 −2

... ... ... ... ... ... ...

111000 −55
111001 −∞
111010 −∞
111011 −∞
111100 −∞
111101 −∞
111110 −∞
111111 −∞

1996 Jul 17 9

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC

TDA1388

for CD-ROM audio applications

BASS BOOST: a 5-bit value to program the bass boost setting. The used set depends on the MODE bits.

Table 13 Bass boost settings

BB4 BB3 BB2 BB1 BB0

FLAT SET (dB) MIN SET (dB) MAX SET (dB)

00000 0 0 0
00001 0 0 0
00010 0 2 2
00011 0 4 4
00100 0 6 6
00101 0 8 8
00111 0 10 10
00110 0 12 12
01001 0 14 14
01000 0 16 16
01011 0 18 18
01010 0 18 20
01101 0 18 22
01100 0 18 24
01111 0 18 24
01110 0 18 24
10000 0 18 24
10001 0 18 24
10010 0 18 24
10011 0 18 24
10100 0 18 24
10101 0 18 24
10111 0 18 24
10110 0 18 24
11001 0 18 24
11000 0 18 24
11011 0 18 24
11010 0 18 24

::::: : : :

11110 0 18 24

BASS BOOST

1996 Jul 17 10

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC

TDA1388

for CD-ROM audio applications

TREBLE: a 5-bit value to program the treble setting. The used set depends on the MODE bits.

Table 14 Treble settings

TR4 TR3 TR2 TR1 TR0

FLAT SET (dB) MIN SET (dB) MAX SET (dB)

00000 0 0 0
00001 0 0 0
00010 0 2 2
00011 0 2 2
00100 0 4 4
00101 0 4 4
00111 0 6 6
00110 0 6 6
01001 0 6 6
01000 0 6 6
01011 0 6 6
01010 0 6 6
01101 0 6 6
01100 0 6 6
01111 0 6 6
01110 0 6 6

::::: : : :

11110 0 6 6

TREBLE

Flat/min/max setting selection

In the TDA1388 has three setting for the digital sound
features bass boost and treble. The possible settings are
called ‘flat’, ‘min’ and ‘max’. The flat setting has no
influence on the audio signal, the minimum setting has a
small influence on the audio signal and the maximum
setting has a large influence on the audio signal. In the
static-pin mode, the flat setting is used for the bass boost
and treble filters. In the microcontroller mode, all three
settings can by controlled by a register.

Channel manipulation modes

In the TDA1388 there is a channel manipulation function
implemented. This function has a fixed value in the
static-pin mode, the left signal on the left channel and the
right signal on the right channel. In the microcontroller
mode several option are possible.

1996 Jul 17 11

The different modes are as follows:

• Normal stereo output

• Left/right reverse output

• Mono left/right output:

• Output muting with soft mute.

De-emphasis

De-emphasis is controlled by an external pin in the
static-pin mode and by a register in the microcontroller
mode.The digital de-emphasis filter is dimensioned to
produce the de-emphasis frequency characteristics for the
sample rate 44.1 kHz. With its 18-bit dynamic range, the
digital de-emphasis filter of the TDA1388 is a convenient
and component saving alternative to analog de-emphasis.
De-emphasis is synchronized to the sample clock, so that
operation always takes place on complete samples.

1

⁄2(L+R)

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

Volume control

The volume of the left and right channels are controlled by
a fixed value (0 dB) in the static-pin mode and by separate
registers in the microcontroller mode. In the
microcontroller mode the values of both channels can
vary, independent of each other, from 0 dB to −∞ dB.

Since there is no headroom included into the sound control
section, the volume control precedes the sound control.
Full volume and neutral setting (flat) of the sound control
results in full-scale output. Any tone boost will directly
cause clipping, which can be avoided by reduction of the
volume setting.

Bass boost

A strong bass boost effect, which is useful in
compensating for poor response of portable headphone
sets, is implemented digitally in the TDA1388 and can be
controlled in the microcontroller mode. In the static-pin
mode, the flat setting is fixed. In the microcontroller mode,
valid settings range from flat (no influence on audio) to
+18 dB with step sizes of 2 dB in minimum and to +24 dB
with step sizes of 2 dB in maximum. The programmable
bass boost filter is a 2nd-order shelving type with a fixed
corner frequency of 130 Hz for the minimum setting and a
fixed corner frequency of 230 Hz for the maximum setting
and has a Butterworth characteristic. Because of the
exceptional amount of programmable gain, bass boost
should be used with adequate prior attenuation, using the
volume control.

Treble

A treble effect is implemented digitally in the TDA1388 and
can be controlled in the microcontroller mode. In the
static-pin mode, the flat setting is fixed. In the
microcontroller mode, valid settings range from flat (no
influence on audio) to +6 dB with step sizes of 2 dB in
minimum and to +6 dB with step sizes of 2 dB in
maximum. The programmable treble filter is a 1st-order
shelving type with a fixed corner frequency of 2.8 kHz for
the minimum setting and a fixed corner frequency of

5.0 kHz for the maximum setting. Because of the
exceptional amount of programmable gain, treble should
be used with adequate prior attenuation, using the volume
control.

Soft mute

TDA1388

When the mute is active for a channel, the value of the
sample is decreased smoothly to zero following a raised
cosine curve. 32 coefficients are used to step down the
value of the data, each one being used 32 times before
stepping on to the next. This amounts to a mute transition
of 23 ms at f
samples are returned to the full level again following a
raised cosine curve with the same coefficients being used
in the reverse order. The mute, on the left or right channel,
is synchronized to the sample clock, so that operation
always takes place on complete samples.

Oversampling and noise shaper

The digital filter is four times oversampling filter. It consists
of two sections which each increase the sample rate by 2.
The 2nd-order noise shaper operates at 64f
in-band quantization noise to frequencies well above the
audio band. This noise shaping technique used in
combination with a sign-magnitude coding enables high
signal-to-noise ratios to be achieved. The noise shaper
outputs a 5-bit PDM bitstream signal to the DAC.

Continuous calibration DAC

The dual 5-bit DAC uses the continuous calibration
technique. This method, based on charge storage,
involves exact duplication of a single reference current
source. In the TDA1388, 32 such current sources plus
1 spare source are continuously calibrated. The spare
source is included to allow continuous convertor operation.
The DAC receives a 5-bit data bitstream from the noise
shaper. This data is converted so that no current is
switched to the output during digital silence
(input 00000H). In this way very high signal-to-noise
performance is achieved.

Stereo line driver

High precision, low-noise amplifiers together with the
internal conversion resistor R
the converter output current to a voltage capable of driving
a headphone. The voltage is available at VOL and V
(pins 4 and 25).

Stereo headphone driver

High precision, low-noise amplifiers are capable of driving
a headphone load. The voltage is available at HPOUTL
and HPOUTR (pins 2 and 27).

= 44.1 kHz. When the mute is released, the

s

. It shifts

s

CONV1

and R

CONV2

convert

OR

Soft mute is controlled by external pins, for each channel
one, in the static-pin mode and by the channel
manipulation modes of left or right in the microcontroller
mode.

1996 Jul 17 12

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

21516 1

MSB LSBB2 B15

RIGHT

RIGHT

TDA1388

215161718 1

LSB

2151617181920 1

B17

RIGHT

MSB B2 B3 B4

LSB

B19

MSB B2 B3 B4 B5 B6

MGD019

RIGHT

LEFT

32

1321

>=8 >=8

S-BUS

2

INPUT FORMAT I

MSB B2 MSBLSB LSB MSBB2

LEFT

handbook, full pagewidth

2

B15

LSB-JUSTIFIED FORMAT 16 BITS

1516 1

MSB LSBB2

215161718 1

LEFT

LSB

B17

LSB-JUSTIFIED FORMAT 18 BITS

MSB B2 B3 B4

2151617181920 1

LEFT

LSB

B19

LSB-JUSTIFIED FORMAT 20 BITS

MSB B2 B3 B4 B5 B6

Fig.3 Input formats.

WS

BCK

DATA

WS

BCK

DATA

1996 Jul 17 13

WS

BCK

DATA

WS

BCK

DATA

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

handbook, full pagewidth

L3MODE

L3CLK

L3DATA

t

h;MA

t

BIT 0

s;MA

t

s;DAT

t

HC

t

LC

t

h;DAT

TDA1388

t

s;MA

t

h;MA

T

cy

BIT 7

MGD016

handbook, full pagewidth

L3MODE

L3DATA

L3CLK

write

t

s;MT

t

EN;DAT

t

halt

BIT 0

Fig.4 Timing address mode.

t

LC

t

s;DAT

T

cy

t

HC

t

h;DAT

t

BIT 7

t

h;MT

h;DAT

t

halt

t

3;DAT

MGD017

Fig.5 Timing for data transfer mode.

1996 Jul 17 14

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

handbook, full pagewidth

L3MODE

L3CLK

L3DATA

address

t

halt

TDA1388

addressdata byte #1 data byte #2

MGD018

Fig.6 Multibyte transfer.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134). All voltages referenced to ground,
V

DDD=VDDA=VDDO

= 5 V; T

=25°C, unless otherwise specified.

amb

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DD

T

xtal(max)

T

stg

T

amb

V

es

supply voltage note 1 − 7.0 V
maximum crystal temperature − 150 °C
storage temperature −65 +125 °C
operating ambient temperature −20 +70 °C
electrostatic handling note 2 −3000 +3000 V

note 3 −300 +300 V

Notes

1. All V

and VSS connections must be made to the same power supply.

DD

2. Equivalent to discharging a 100 pF capacitor via a 1.5 kΩ series resistor.

3. Equivalent to discharging a 200 pF capacitor via a 2.5 µH series inductor.

1996 Jul 17 15

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC

TDA1388

for CD-ROM audio applications

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

DC CHARACTERISTICS

V

DDD=VDDA=VDDO

unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

DDD

V

DDA

V

DDO

I

DDD

I

DDA

I

DDO

P

tot

Digital input pins

V

IH

V

IL

| input leakage current −−10 µA

|I

LI

C

in

Analog audio pins

V

ref

R

out(ref)

R

CONV

I

o(max)

C

L

thermal resistance from junction to ambient in free air

SOP28 60 K/W
SSOP28 80 K/W

=5V; T

=25°C; RL=5kΩ; all voltages referenced to ground (pins 1, 13, 21 and 23);

amb

digital supply voltage note 1 4.5 5.0 5.5 V
analog supply voltage note 1 4.5 5.0 5.5 V
operational amplifier supply

note 1 4.5 5.0 5.5 V

voltage
digital supply current at digital silence − 7.0 − mA
analog supply current at digital silence − 5.0 − mA
operational amplifier supply

at digital silence − 10 − mA

current
total power dissipation note 2 − 110 − mW

HIGH level input voltage 0.7V

DDD

LOW level input voltage −−0.3V

− V

DDD

+ 0.5 V

DDD

input capacitance −−10 pF

reference voltage with respect to V

SSA

0.45V

DDA

0.5V

DDA

0.55V

DDA

output reference resistance − 3 − kΩ
current-to-voltage

− 2.7 − kΩ

conversion resistor
maximum output current (THD+N)/S < 0.1%

− 88 − mA

RL=32Ω
(THD+N)/S < 0.1%

R

=16Ω

L

− 44 − mA

output load capacitance note 3 −−50 pF

V

V

Notes

1. All power supply pins (VDD and VSS) must be connected to the same external power supply unit.

2. No operational amplifier load resistor.

3. Load capacitance larger than 50 pF, a 22 µH inductor in parallel with a 270 Ω resistor must be inserted between the
load and the operational amplifier output (line output only).

1996 Jul 17 16

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC

TDA1388

for CD-ROM audio applications

AC CHARACTERISTICS (ANALOG)

V

DDD=VDDA=VDDO

(pins 1, 13, 21 and 23); unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

RES resolution −−18 bits
V

FS(rms)

V

DC(os)

SVRR supply voltage ripple rejection

∆V

 unbalance between the 2 DAC

o

α

ct

(THD+N)/S total harmonic distortion plus

S/N signal-to-noise ratio at bipolar

=5V; fi= 1 kHz; T

=25°C; RL=5kΩ all voltages referenced to ground

amb

output voltage swing
(RMS value)

output voltage DC offset with
respect to reference voltage
level V

ref

V

and V

DDA

DDO

voltage outputs
crosstalk between the 2 DAC

voltage outputs for line outputs
crosstalk between the 2 DAC

voltage outputs for headphone
outputs

noise as a function of signal for
the line output

total harmonic distortion plus
noise as a function of signal for
the headphone output

zero

note 1 0.9 1.0 1.1 V

− 20 − mV

f

ripple

V

ripple(p-p)

C

=10µF

pin

= 1 kHz;

= 100 mV;

− 40 − dB

maximum volume − 0.1 − dB

RL=5kΩ, note 2 − 90 − dB

=16Ω, note 2 − 60 − dB

R

L

=32Ω, note 2 − 65 − dB

R

L

0 dB signal;
RL=5kΩ

−60 dB signal;
=5kΩ

R

L

0 dB signal;

=16Ω

R

L

0 dB signal;

=32Ω

R

L

−60 dB signal;
=16Ω or RL=32Ω

R

L

A weighting;

−−85 −80 dB

− 0.006 0.013 %

−−35 −30 dBA

− 1.8 3.2 %

−−65 − dB

− 0.056 − %

−−70 − dB

− 0.032 − %

−−35 −30 dBA

− 1.8 3.2 %

90 95 − dBA

at code 00000H

Notes

1. Proportional to V

DDA

.

2. One output digital silence, the other maximum volume.

1996 Jul 17 17

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC

TDA1388

for CD-ROM audio applications

AC CHARACTERISTICS (DIGITAL)

V

DDD=VDDA=VDDO

(pins 1, 13, 21 and 23); unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX UNIT

T

cy

t

CWL

t

CWH

clock cycle f

f

sys

f

sys

Serial input data timing (see Fig.7)
BR clock input = data input rate f

f

sys

f

WS

t

r

t

f

t

BCK(H)

t

BCK(L)

t

s;DAT

t

h;DAT

t

s;WS

t

h;WS

system clock frequency 8.192 − 18.432 MHz
word selection input frequency − 44.1 48 kHz
rise time −−20 ns
fall time −−20 ns
bit clock HIGH time 55 −−ns
bit clock LOW time 55 −−ns
data set-up time 10 −−ns
data hold time 20 −−ns
word selection set-up time 20 −−ns
word selection hold time 10 −−ns

= 4.5 to 5.5 V; T

= −20 to +70 °C; RL=5kΩ; all voltages referenced to ground

amb

f

sys
sys

= 256f
= 384f

s
s

81.3 88.6 122 ns

54.2 59.1 81.3 ns
LOW level pulse width 22 −−ns
HIGH level pulse width 22 −−ns

f

sys
sys

= 256f
= 384f

s
s

− 64f

− 48f

−

s

−

s

handbook, full pagewidth

WS

BCK

DATA

t

r

t

BCK(H)

T

cy

RIGHT

t

r

t

h;WS

t

BCK(L)

LSB MSB

Fig.7 Timing and input signals.

1996 Jul 17 18

t

s;WS

LEFT

t

s;DAT

t

h;DAT

MGD567

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

TEST AND APPLICATION INFORMATION

handbook, full pagewidth

I

LSB-JUSTIFIED

SERIAL INPUT DATA

MICROCONTROLLER

2

S-BUS OR

from

SYSTEM

CLOCK

INPUT

+5 V

APPL2/CL

APPL1/MO

APPL0/DA

100 µF 4.7 Ω 4.7 Ω

100 nF

L3

(1)

100 nF
V

SSDVDDD

13

SYSCLK

BCK

WS

DATA

IF1
IF2

ACP

SYSSEL

V

SSO2

TC

14

9
10
11

7
8
19
18
17
16
15

21
20

12

100 nF 100 nF

(1)
(2)

330 µF
V

SSA

23

TDA1388

TDA1388

100 µF

V

SSO1

V

DDO

281

27
24

25

26

MGD152

V

6

FILTCL

5

V

4

HPINL

3

HPOUTL

2

HPOUTR
FILTCR

V

HPINR

ref

OL

OR

100 nF

1

nF

4.7 µF

330 µF

330 µF
1

nF

4.7 µF

47 µF

47 µF

10 µF

100 Ω

R1

10 kΩ

100 Ω

R1

10 kΩ

L

R

V

DDA

22

(1) Optional.
(2) Chip inductor BLM32A07.

Fig.8 Application diagram.

1996 Jul 17 19

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

PACKAGE OUTLINES

SO28: plastic small outline package; 28 leads; body width 7.5 mm

D

c

y

Z

28

15

TDA1388

SOT136-1

E

H

E

A

X

v M

A

pin 1 index

1

e

0 5 10 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

A

max.

2.65

0.10

A

1

0.30

0.10

0.012

0.004

A

2

2.45

2.25

0.096

0.089

A3b

0.25

0.01

0.49

0.36

0.019

0.014

p

0.32

0.23

0.013

0.009

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

(1)E(1) (1)

cD

18.1

7.6

17.7

7.4

0.71

0.30

0.69

0.29

14

w M

b

p

scale

eHELLpQ

1.27

0.050

10.65

10.00

0.42

0.39

1.4

0.055

Q

A

2

0.043

0.016

A

1.1

0.4

L

p

L

0.25 0.1

0.01

(A )

1

detail X

1.1

0.25

1.0

0.043

0.01

0.039

A

3

θ

ywv θ

Z

0.9

0.4

8

0.004

0.035

0.016

0

o
o

OUTLINE
VERSION

SOT136-1

IEC JEDEC EIAJ

075E06 MS-013AE

REFERENCES

1996 Jul 17 20

EUROPEAN

PROJECTION

ISSUE DATE

91-08-13

95-01-24

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm

D

c

y

Z

28 15

TDA1388

SOT341-1

E

H

E

A

X

v M

A

pin 1 index

114

w M

b

e

DIMENSIONS (mm are the original dimensions)

mm

A

max.

2.0

0.21

0.05

1.80

1.65

2

A3b

0.25

0.38

0.25

p

cD

0.20

0.09

UNIT A1A

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

p

0 2.5 5 mm

scale

(1)E(1) (1)

10.4

10.0

eHELLpQZywv θ

5.4

0.65 1.25

5.2

7.9

7.6

Q

A

2

A

1

detail X

0.9

1.03

0.7

0.63

(A )

L

p

L

0.13 0.10.2

A

3

θ

1.1

0.7

o

8

o

0

OUTLINE
VERSION

SOT341-1 MO-150AH

IEC JEDEC EIAJ

REFERENCES

1996 Jul 17 21

EUROPEAN

PROJECTION

ISSUE DATE

93-09-08
95-02-04

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC
for CD-ROM audio applications

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

Reflow soldering

Reflow soldering techniques are suitable for all SO and
SSOP packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

Wave soldering

(order code 9398 652 90011).

TDA1388

SSOP
Wave soldering isnot recommended for SSOP packages.

This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

If wave soldering cannot be avoided, the following
conditions must be observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave)
soldering technique should be used.

• The longitudinal axis of the package footprint must

be parallel to the solder flow and must incorporate
solder thieves at the downstream end.

Even with these conditions, only consider wave
soldering SSOP packages that have a body width of

4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).

ETHOD (SO AND SSOP)

M
During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal

of corrosive residues in most applications.
SO
Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be

parallel to the solder flow.

• The package footprint must incorporate solder thieves at

the downstream end.

1996 Jul 17 22

Repairing soldered joints

Fix the component by first soldering two diagonally-

opposite end leads. Use only a low voltage soldering iron

(less than 24 V) applied to the flat part of the lead. Contact

time must be limited to 10 seconds at up to 300 °C. When

using a dedicated tool, all other leads can be soldered in

one operation within 2 to 5 seconds between

270 and 320 °C.

Philips Semiconductors Objective specification

Bitstream continuous calibration filter-DAC

TDA1388

for CD-ROM audio applications

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1996 Jul 17 23

Philips Semiconductors – a worldwide company

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15thfloor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone], Fax. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]
Greece: No. 15, 25th March Street, GR 17778 TAVROS,

Tel. [phone], Fax. [phone]

Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.

Worli, MUMBAI 400 018, Tel. [phone], Fax. [phone]

Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,

Tel. [phone], Fax. [phone]
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,

20124 MILANO, Tel. [phone], Fax. [phone]
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. [phone], Fax. [phone]
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. [phone], Fax. [phone]
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. [phone], Fax. [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]

Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,

Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,

Tel. [phone], Fax. [phone]

Portugal: see Spain

Romania: see Italy

Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]

Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

Slovakia: see Austria

Slovenia: see Italy

South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,

Tel. [phone], Fax. [phone]

South America: Rua do Rocio 220, 5th floor, Suite 51,

04552-903 São Paulo, SÃO PAULO - SP, Brazil,

Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,

Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,

Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66,

Chung Hsiao West Road, Sec. 1, P.O. Box 22978,

TAIPEI 100, Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,

Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 2A Akademika Koroleva str., Office 165,

252148 KIEV, Tel. [phone]/1642, Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,

MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,

Tel. [phone], Fax. [phone]

Uruguay: see South America

Vietnam: see Singapore

Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1996 SCA50
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Printed in The Netherlands 517021/50/02/pp24 Date of release: 1996 Jul 17 Document order number: 9397 75000965

Internet: http://www.semiconductors.philips.com/ps/
(1) TDA1388_2 June 26, 1996 11:51 am