
Philips Semiconductors Preliminary specification
Stereo Continuous Calibration DAC (CC-DAC) TDA1387T
PINNING
SYMBOL PIN DESCRIPTION
BCK 1 bit clock input
WS 2 word selection input
DATA 3 data input
GND 4 ground
V
DD
I
OL
REF 7 reference decoupling
I
OR
5 supply voltage input
6 left channel output
Fig.2 Pin configuration.
8 right channel output
FUNCTIONAL DESCRIPTION
The basic operation of the continuous calibration DAC is
illustrated in Fig.3 which shows the calibration and
operation cycle. During calibration of the MOS current
source (Fig.3a) transistor M1 is connected as a diode by
applying a reference current. The voltage Vgs on the
intrinsic gate-source capacitance Cgs of M1 is then
determined by the transistor characteristics. After the drain
current has been calibrated to the reference value I
ref
, the
switch S1 is opened and S2 is switched to the other
position (Fig.3b). The gate-to-source voltage Vgs of M1 is
not changed because the charge on Cgs is preserved.
Therefore, the drain current of M1 will still be equal to I
and this exact duplication of I
is now available at the
ref
ref
OUT terminal.
In the TDA1387T, 32 current sources and one spare
current source are continuously calibrated (see Fig.1). The
spare current source is included to allow continuous
converter operation. The output of one calibrated source is
connected to an 11-bit binary current divider which
consists of 2048 transistors. A symmetrical offset
decoding principle is incorporated and arranges the bit
switching such that the zero-crossing is performed by
switching only the LSB currents.
The TDA1387T (CC-DAC) accepts serial input data format
of 16-bit word length. Left and right data words are time
multiplexed. The input data format is shown in
Figs 4 and 5.
With a HIGH level on the WS input, data is placed in the
right input register, with a LOW level on the WS input, data
is placed in the left input register. The data in the input
registers are simultaneously latched to the output registers
which control the bit switches. An internal bias current I
bias
is added to the full scale output current IFS in order to
achieve maximum dynamic range at the outputs of OP1
and OP2.
The signal current IFS and the bias current I
are both
bias
proportional to the supply voltage VDD, and have a fixed
mutual relation A
(where A
bias
bias=Ibias/IFS
).
It is preferred that the non-inverting input of operational
amplifiers OP1 and OP2 is tied to ground to achieve a
maximum dynamic range over the supply voltage range.
A decoupling capacitor C4 is recommended for enhancing
the supply voltage ripple rejection of the DAC. It has no
significant effect on the noise performance.
1995 Dec 11 5

Philips Semiconductors Preliminary specification
Stereo Continuous Calibration DAC (CC-DAC) TDA1387T
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
“IC Package Databook”
our
Reflow soldering
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
(order code 9398 652 90011).
Wave soldering
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
1995 Dec 11 12

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SCD47 © Philips Electronics N.V. 1995
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513061/50/02/pp16 Date of release: 1995 Dec 11
Document order number: 9397 750 00519