This Power Mosfet is the latest development of
STMicroelectronicsunique”SingleFeature
Size” stip-based process. The resultingtransistor showsextremely high packing density for low
on-resistance, rugged avalanche characteristics
and less critical alignment steps therefore a remarkablemanufacturingreproducibility.
APPLICATIONS
■ DC MOTOR CONTROL (DISKDRIVES,etc.)
■ DC-DC& DC-AC CONVERTERS
■ SYNCHRONOUS RECTIFICATION
2
3
2
1
SOT-223
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
I
DM
P
dv/ dt(
T
(•) Pulse width limited by safe operating area(1)ISD≤ 8A,di/dt ≤ 200 A/µs, VDD≤ V
New RDS (on) spec. starting from JULY 98
July 1998
Drain-sou rc e Volt ag e (VGS=0)60V
DS
DGRDrain- gate Voltage (R
Gate- source Voltage± 20V
GS
Drain Curre n t (continuous ) at Tc=25oC2A
I
D
I
Drain Curre n t (continuous ) at Tc=100oC1.8A
D
=20kΩ)
GS
60V
(•)Drain Current (pulsed)8A
Total Dissipation at Tc=25oC2.5W
tot
Derating Fac tor0.02W/
1) Peak Diode Re covery volt age s lope6V/ns
St orage Te m peratu re-65 to 15 0
stg
Max. Operatin g Ju nction Tempe rature150
T
j
(BR)DSS,Tj≤TJMAX
o
C
o
C
o
C
1/9
Page 2
STN2NF06
THERMAL DATA
R
thj-pcb
R
thj- amb
T
AVALANCHE CHARACTERISTICS
SymbolPara met e rMax Valu eUni t
I
AR
E
Ther mal Resist ance Junctio n- PC BoardMax
Ther mal Resist ance Junctio n- ambientMax
(Sur f a ce M ounted)
Maximum Lead T em per a t ure For Soldering P urpose
l
Avalanch e C ur rent, R ep et it i v e o r Not- Re petit ive
(pulse w idth limited b y T
Single Pulse Avalanche Energy
AS
(starting T
=25oC, ID=IAR,VDD=25V)
j
max)
j
50
60
260
2A
20mJ
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS (T
=25oC unlessotherwisespecified)
case
OFF
SymbolParameterTest Condition sMin.Typ.Max.Un it
V
(BR)DSS
Drain-sou rc e
=250µAVGS=0
I
D
60V
Breakdown Voltage
I
I
DSS
GSS
Zer o G at e Voltage
Drain Curre nt ( V
GS
Gat e-body Le ak a ge
Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRatingTc=125oC
V
DS
= ± 20 V
V
GS
1
10
± 100nA
ON (∗)
SymbolParameterTest Condition sMin.Typ.Max.Un it
V
GS(th )
Gate Threshold
V
DS=VGSID
=250µA
234V
Voltage
R
DS(on)
Stati c Drain-so urce O n
VGS=10V ID=6A0.120.15Ω
Resistance
I
D(on)
On S tate Dra in Curr e nt VDS>I
D(on)xRDS(on)max
2A
VGS=10V
DYNAMIC
SymbolParameterTest Condition sMin.Typ.Max.Un it
g
(∗)Forward
fs
Tr anscond uctanc e
C
C
C
Input Ca pac i t an c e
iss
Out put C apa c itanc e
oss
Reverse T ransfer
rss
Capa cit an c e
VDS>I
D(on)xRDS(on)maxID
=1A13S
VDS=25V f=1MHz VGS= 0 V760
100
30
µA
µA
pF
pF
pF
2/9
Page 3
STN2NF06
ELECTRICAL CHARACTERISTICS (continued)
SWITCHINGON
SymbolParameterTest Condition sMin.Typ.Max.Un it
t
d(on)
(di/dt)
Q
Q
Q
Turn-on Tim e
Rise T ime
t
r
Turn-on Current SlopeVDD=25VID=6A
on
Total Gate Charge
g
Gat e-Sou rc e Charge
gs
Gate-Drain Charge
gd
VDD=30VID=6A
=4.7 ΩVGS=10V
R
G
=4.7 ΩVGS=10V
R
G
VDD=40VID=12A VGS=10V20
SWITCHINGOFF
SymbolParameterTest Condition sMin.Typ.Max.Un it
t
r(Voff)
t
Of f - voltag e Ris e Time
t
Fall Time
f
Cross-over Time
c
VDD=48V ID=12A
=4.7 ΩVGS=10V
R
G
SOURCE DRAIN DIODE
SymbolParameterTest Condition sMin.Typ.Max.Un it
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed: Pulse duration =300 µs, duty cycle1.5 %
(•) Pulse width limited by safe operating area
Source-drain Cu rrent
(•)
Source-drain Cu rrent
(pulsed)
(∗)F orwar d O n V o lt ageISD=2A VGS=01.5V
Reverse R ecovery
rr
Time
Reverse R ecovery
rr
= 12 Adi/dt = 100 A/µs
I
SD
=30VTj=150oC
V
DD
Charge
Reverse R ecovery
Current
10
35
200A/µ s
5
7
7
18
30
2
8
65
0.18
5.5
ns
ns
nC
nC
nC
ns
ns
ns
A
A
ns
µC
A
Safe Operating AreaThermalImpedance
3/9
Page 4
STN2NF06
Derating Curve
TransferCharacteristics
OutputCharacteristics
Transconductance
StaticDrain-source On Resistance
4/9
Gate Charge vs Gate-sourceVoltage
Page 5
STN2NF06
CapacitanceVariations
Normalized On Resistance vs Temperature
Normalized Gate ThresholdVoltage vs
Temperature
Turn-onCurrent Slope
Turn-offDrain-source VoltageSlope
Cross-overTime
5/9
Page 6
STN2NF06
SwitchingSafe OperatingArea
Source-drainDiode Forward Characteristics
AccidentalOverloadArea
Fig. 1: Unclamped InductiveLoad Test Circuit
6/9
Fig. 2: UnclampedInductiveWaveform
Page 7
STN2NF06
Fig. 3: SwitchingTimes Test Circuits For
ResistiveLoad
Fig. 5: Test Circuit For InductiveLoad Switching
And DIodeRecovery Times
Fig. 4: GateChargetest Circuit
7/9
Page 8
STN2NF06
SOT-223 MECHANICALDATA
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
a2.272.32.3389.490.691.7
b4.574.64.63179.9181.1182.3
c0.20.40.67.915.723.6
d0.630.650.6724.825.626.4
e11.51.61.759.16366.9
e40.3212.6
f2.933.1114.2118.1122.1
g0.670.70.7326.427.628.7
l16.777.3263.8275.6287.4
l23.53.53.7137.8137.8145.7
L6.36.56.7248255.9263.8
mmmils
L
e1
a
b
f
C
l1
B
C
E
g
d
l2
c
e4
P008B
8/9
Page 9
STN2NF06
Information furnished is believed tobe accurate and reliable. However,STMicroelectronics assumes no responsibility for theconsequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication orotherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject tochange withoutnotice. This publication supersedes andreplaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical componentsin lifesupport devices orsystems withoutexpress written approval of STMicroelectronics.
Australia -Brazil - Canada- China - France- Germany- Italy- Japan - Korea - Malaysia - Malta- Mexico- Morocco- The Netherlands-
Singapore- Spain- Sweden - Switzerland- Taiwan-Thailand - United Kingdom- U.S.A.
The ST logo isa trademarkof STMicroelectronics
1998 STMicroelectronics– Printed in Italy – AllRights Reserved
STMicroelectronicsGROUP OF COMPANIES
.
9/9
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