This Power Mosfet is the latest development of
STMicroelectronics unique "Single Feature
Size" stip-based process. The resulting transistor shows extremely high packing density for low
on-resistance, rugged avalanche characteristics
and less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
■
DC MOTOR CONTROL (DISK DRIVES,etc.)
■
DC-DC & DC-AC CONVERTERS
■
SYNCHRONOU S RECTIFICAT ION
Ω
R
DS(on)
I
D
STN2NE10
STripFET POWER MOSFET
PRELIMINARY DATA
2
3
2
1
SOT-223
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
I
DM
P
dv/dt(
T
(•) Pulse width limited by safe operating area (1) ISD ≤ 7 A, di/dt ≤ 200 A/µs, VDD ≤ V
New RDS (on) spec. starting from JULY 98
January 1999
Drain-source Voltage (VGS = 0)10 0V
DS
Drain- gate Voltage (RGS = 20 kΩ)
DGR
Gate-source Voltage± 20V
GS
I
Drain Current (continuous) at Tc = 25 oC2A
D
I
Drain Current (continuous) at Tc = 100 oC1.3A
D
100V
(•)Drain Current (pulsed)8A
Total Dissipation at Tc = 25 oC2.5W
tot
Derating Factor0.02W/
) Peak Diode Recovery voltage slope6V/ns
1
Storage Temperature-65 to 150
stg
T
Max. Operating Junction Temperature150
j
, Tj ≤ T
(BR)DSS
JMAX
o
C
o
C
o
C
1/5
Page 2
STN2NE10
THERMAL DATA
R
thj-pcb
R
thj-amb
Thermal Resistance Junction-PC Board Max
Thermal Resistance Junction-ambient Max
(Surface Mounted)
T
Maximum Lead Temperature For Soldering Purpose
l
AVALANCHE CHARACTERIST ICS
SymbolParameterMax ValueUnit
I
AR
E
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
Single Pulse Avalanche Energy
AS
(starting T
= 25 oC, ID = IAR, V
j
max)
j
DD
= 25 V)
50
60
260
2A
20mJ
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
= 25 oC unless otherwise specified)
(T
case
OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
(BR)DSS
Drain-source
I
= 250 µA V
D
GS
= 0
100V
Breakdown Voltage
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
= Max Rating
V
DS
V
= Max Rating Tc = 125 oC
DS
V
= ± 20 V
GS
1
10
± 100nA
ON (∗)
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
V
= VGS ID = 250 µA
DS
234V
VGS = 10 V ID = 1A0.330.4Ω
Resistance
I
D(on)
On State Drain Current VDS > I
V
= 10 V
GS
D(on)
x R
DS(on)max
2A
DYNAMIC
SymbolParameterTest ConditionsMin.Typ.Max.Unit
g
(∗)Forward
fs
Transconductance
C
C
C
Input Capacitance
iss
Output Capacitance
oss
Reverse Transfer
rss
Capacitance
VDS > I
V
DS
x R
D(on)
DS(on)max
= 25 V f = 1 MHz V
ID = 1 A11.8S
= 0 V305
GS
45
21
µA
µA
pF
pF
pF
2/5
Page 3
STN2NE10
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
SymbolParameterTest ConditionsMin.Typ.Max.Unit
t
d(on)
Turn-on Delay Time
Rise Time
t
r
VDD = 50 V ID = 35 A
= 4.7 Ω VGS = 10 V
R
G
(Resistive Load, see fig. 3)
Q
Q
Q
Total Gate Charge
g
Gate-Source Charge
gs
Gate-Drain Charge
gd
VDD = 80 V ID = 7 A V
= 10 V14
GS
SWITCHING OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
t
d(off)
Turn-off Delay Time
Fall Time
t
f
VDD = 50 V ID = 3.5 A
=4.7 Ω VGS = 10 V
R
G
(Resistive Load, see fig. 3)
t
r(Voff)
t
t
Off-voltage Rise Time
Fall Time
f
Cross-over Time
c
V
= 16 V ID = 80 A
clamp
= 4.7 Ω VGS = 10 V
R
G
(Inductive Load, see fig. 5)
SOURCE DRAIN DIODE
7
17
19nC
6
4
25
7
7
8
16
ns
ns
nC
nC
ns
ns
ns
ns
ns
SymbolParameterTest ConditionsMin.Typ.Max.Unit
2
8
I
SDM
I
SD
Source-drain Current
(•)
Source-drain Current
(pulsed)
V
(∗)Forward On VoltageISD = 2 A VGS = 01.5V
SD
t
Q
Reverse Recovery
rr
Time
Reverse Recovery
rr
I
= 7 A di/dt = 100 A/µs
SD
V
= 30 V
DD
(see test circuit, fig. 5)
75
210
Charge
I
RRM
Reverse Recovery
5.5
Current
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
A
A
ns
C
µ
A
3/5
Page 4
STN2NE10
SOT-223 MECHANICAL DATA
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
a2.272.32.3389.490.691.7
b4.574.64.63179.9181.1182.3
c0.20.40.67.915.723.6
d0.630.650.6724.825.626.4
e11.51.61.759.16366.9
e40.3212.6
f2.933.1114.2118.1122.1
g0.670.70.7326.427.628.7
l16.777.3263.8275.6287.4
l23.53.53.7137.8137.8145.7
L6.36.56.7248255.9263.8
mmmils
L
e1
a
b
f
C
l1
B
C
E
g
d
l2
c
e4
P008B
4/5
Page 5
STN2NE10
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of use of such inform ation nor for any in fringe ment o f patents or other rig hts of third par ties wh ich may result from its u se. N o li cen se is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized f or use as critical components in life support devices or systems without express written approval of STMicroelectronics.