(•) Pulse width limited by safeoperating area(*) Limited by package
September 1999
Drain-source Voltage (VGS= 0)200V
DS
Drain- gate Volt ag e (RGS=20kΩ)200V
DGR
Gate-s ource Voltage
GS
20V
±
(*)Drain Current (co ntinuous) at Tc=25oC1A
(*)Drain Current (co ntinuous) at Tc=100oC0.6A
(•)Drain Curr ent (pu lsed)4A
Tot al Di ss i pat ion at Tc=25oC2.9W
tot
Derat ing Factor0.023W/
Sto rage Tem per at ur e-65 t o 15 0
stg
T
Max. Operat ing Junct ion T emperat ure150
j
o
C
o
C
o
C
1/6
Page 2
STN1N20
THERMAL DATA
R
thj-pcb
R
thj-amb
T
AVALANCHE CHARACTERISTICS
SymbolParameterMax V alueUnit
I
AR
E
Ther mal Resistanc e Junct ion-PC B oa rdMax
Ther mal Resistanc e Junct ion-ambientMax
(Surface Mounted)
Maximum Lead Te m perature For Soldering Purpos e
l
Avalanche C urrent, R epetitive or Not-Repetitive
(pulse width limited by T
Single P ul s e Avalan c he Energy
AS
(starting T
=25oC, ID=IAR,VDD=25V)
j
max)
j
43
60
260
1A
10mJ
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
=25oC unless otherwisespecified)
(T
case
OFF
SymbolParameterTest ConditionsMin.Typ.M ax.Unit
V
(BR)DSS
Drain-source
ID=250µAVGS= 0200V
Break dow n Voltage
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
Gat e- bod y L eak ag e
Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRatingTc= 125oC
V
DS
V
=± 20 V
GS
10
100
100nA
±
ON(∗)
SymbolParameterTest ConditionsMin.Typ.M ax.Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage VDS=VGSID= 250 µ A234V
Sta t ic Drain -s ource On
VGS=10V ID= 0.5 A1.21.5
Resistance
I
D(on)
On State Drain Current VDS>I
D(on)xRDS(on )max
1A
VGS=10V
DYNAMIC
SymbolParameterTest ConditionsMin.Typ.M ax.Unit
g
(∗)Forward
fs
Tr ansc on duc tance
C
C
C
Input Capac i t anc e
iss
Out put Capacitanc e
oss
Reverse Tr ansfer
rss
Capacit a nc e
VDS>I
D(on)xRDS(on )maxID
=0.5A0.30.7S
VDS=25V f=1MHz VGS= 0 V290
50
10
400
70
15
µ
µA
Ω
pF
pF
pF
A
2/6
Page 3
STN1N20
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHINGON
SymbolParameterTest ConditionsMin.Typ.M ax.Unit
t
d(on)
(di/dt)
Q
Q
Q
Turn-on Time
Rise Ti m e
t
r
Tur n-on Current S lop eVDD=160VID=4A
on
Tot al Gat e Charge
g
Gat e- Source Charg e
gs
Gate-Drain Charge
gd
VDD=100VID=2A
R
=4.7
Ω
G
=47
R
Ω
G
VDD= 160 VID=4A VGS=10V13
VGS=10V
VGS=10V
7
6
10
10
270A/ µs
20nC
7
4
SWITCHINGOFF
SymbolParameterTest ConditionsMin.Typ.M ax.Unit
t
r(Voff)
t
Off-volt age Rise Time
Fall T ime
t
f
Cross-over T im e
c
VDD=160V ID=4A
R
=4.7 ΩVGS=10V
G
13
6
5
10
10
20
SOURCEDRAINDIODE
SymbolParameterTest ConditionsMin.Typ.M ax.Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed:Pulse duration = 300µs, duty cycle 1.5%
(•) Pulse width limited by safe operating area
Source-drain Current
(•)
Source-drain Current
1
4
(pulsed)
(∗)ForwardOnVoltage ISD=1A VGS=01.5V
Reverse Recover y
rr
Time
Reverse Recover y
rr
ISD= 4 Adi/dt = 100 A/µs
=30VTj= 150oC
V
DD
170
1
Charge
Reverse Recover y
12
Current
ns
ns
nC
nC
ns
ns
ns
A
A
ns
µ
A
C
3/6
Page 4
STN1N20
Fig. 1:
UnclampedInductiveLoad TestCircuit
Fig. 3: SwitchingTimes Test Circuits For
ResistiveLoad
Information furnishedis believed to beaccurate and reliable.However, STMicroelectronics assumes no responsibilityforthe consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under anypatent or patent rights ofSTMicroelectronics. Specificationmentioned in this publication are
subjecttochange withoutnotice.This publication supersedes andreplaces all informationpreviously supplied.STMicroelectronics products
are not authorized for use as critical components in lifesupportdevices or systems without express written approval of STMicroelectronics.
The STlogo is a trademark of STMicroelectronics
1999 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
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6/6
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