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dsPIC33FJ32MC102
Datasheet
386 pgs4.12 Mb0
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Datasheet dsPIC33FJ16GP101, dsPIC33FJ16GP102, dsPIC33FJ16MC101, dsPIC33FJ16MC102, dsPIC33FJ32GP101 Datasheet

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dsPIC33FJ16(GP/MC)101/102 AND
dsPIC33FJ32(GP/MC)101/102/104
16-Bit Digital Signal Controllers
(up to 32-Kbyte Flash and 2-Kbyte SRAM)

Operating Conditions

• 3.0V to 3.6V, -40ºC to +125ºC, DC to 16 MIPS

Core: 16-bit dsPIC33F CPU

• Code-Efficient (C and Assembly) Architecture
• Two 40-Bit Wide Accumulators
• Single-Cycle Mixed-Sign MUL plus Hardware Divide
• 32-Bit Multiply Support

Clock Management

• ±0.25% Internal Oscillator
• Programmable PLLs and Oscillator Clock Sources
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timer (WDT)
• Fast Wake-up and Start-up

Power Management

• Low-Power Management modes (Sleep, Idle, Doze)
• Integrated Power-on Reset and Brown-out Reset
• 1 mA/MHz Dynamic Current (typical)
•30 µA I
PD Current (typical)
PWM
• Up to Three PWM Pairs
• Two Dead-Time Generators
• 31.25 ns PWM Resolution
• PWM Support for:
- Inverters, PFC, UPS
- BLDC, PMSM, ACIM, SRM
• Class B-Compliant Fault Inputs
• Possibility of ADC Synchronization with PWM Signal

Advanced Analog Features

• ADC module:
- 10-bit, 1.1 Msps with four S&H
- Four analog inputs on 18-pin devices and up to 14 analog inputs on 44-pin devices
• Flexible and Independent ADC Trigger Sources
• Three Comparator modules
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
- On-chip temperature measurement

Timers/Output Compare/Input Capture

• Up to Five General Purpose Timers:
- One 16-bit and up to two 32-bit timers/counters
• Two Output Compare modules
• Three Input Capture modules
• Peripheral Pin Select (PPS) to allow Function Remap

Communication Interfaces

• UART module (4 Mbps)
- With support for LIN/J2602 Protocols and IrDA
• 4-Wire SPI module (8 MHz maximum speed)
- Remappable Pins in 32-Kbyte Flash Devices
2
C™ module (400 kHz)
•I
®

Input/Output

• Sink/Source 10 mA or 6 mA, Pin-Specific for Standard V
OH/VOL, up to 16 mA or 12 mA for Non-Standard VOH1
• 5V Tolerant Pins
• Up to 20 Selectable Open-Drain and Pull-ups
• Three External Interrupts (two are remappable)

Qualification and Class B Support

• AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) Planned
• Class B Safety Library, IEC 60730, UDE Certified

Debugger Development Support

• In-Circuit and In-Application Programming
• Up to Three Complex Data Breakpoints
• Trace and Run-Time Watch
2011-2012 Microchip Technology Inc. DS70652E-page 1
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104

dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104 PRODUCT FAMILIES

The device names, pin counts, memory sizes, and peripheral availability of each device are listed in
Table 1. The following pages show their pinout
diagrams.

TABLE 1: dsPIC33FJ16(GP/MC)101/102 DEVICE FEATURES

Remappable Peripherals
(3)
Remappable Pins
(1,2)
UART
Input Capture
16-bit Timer
Output Compare
SPI
External Interrupts
PWM Faults
Motor Control PWM
10-Bit, 1.1 Msps ADC
4-ch
4-ch
6-ch
6-ch
4-ch
6-ch
6-ch
C™
2
I
RTCC
Y 1 3 Y 13 PDIP,
Y1 3 Y15SSOP
Y1 3 Y21SPDIP,
Y 1 3 Y 21 VTLA
Y1 3 Y15PDIP,
Y1 3 Y21SPDIP,
Y 1 3 Y 21 VTLA
Comparators
CTMU
I/O Pins
SOIC
SOIC, SSOP, QFN
SOIC, SSOP
SOIC, SSOP, QFN
Device
dsPIC33FJ16GP101 18 16 1 8 3 3 2 1 3 1 — — 1 ADC,
dsPIC33FJ16GP102 28 16 1 16 3 3 2 1 3 1 — — 1 ADC,
dsPIC33FJ16MC101 20 16 1 10 3 3 2 1 3 1 6-ch 1 1 ADC,
dsPIC33FJ16MC102 28 16 1 16 3 3 2 1 3 1 6-ch 2 1 ADC,
Note 1: Two out of three timers are remappable.
2: One pair can be combined to create one 32-bit timer. 3: Two out of three interrupts are remappable.
Pins
RAM (Kbytes)
Program Flash (Kbyte)
20 16 1 8 3 3 2 1 3 1 — — 1 ADC,
36 16 1 16 3 3 2 1 3 1 — — 1 ADC,
36 16 1 16 3 3 2 1 3 1 6-ch 2 1 ADC,
Packages
DS70652E-page 2  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104

TABLE 2: dsPIC33FJ32(GP/MC)101/102/104 DEVICE FEATURES

Remappable Peripherals
(3)
(1,2)
Device
dsPIC33FJ32GP101 18 32 2 8 5 3 2 1 3 1 — — 1 ADC,
dsPIC33FJ32GP102 28 32 2 16 5 3 2 1 3 1 — — 1 ADC,
dsPIC33FJ32GP104 44 32 2 26 5 3 2 1 3 1 — — 1 ADC,
dsPIC33FJ32MC101 20 32 2 10 5 3 2 1 3 1 6-ch 1 1 ADC,
dsPIC33FJ32MC102 28 32 2 16 5 3 2 1 3 1 6-ch 2 1 ADC,
dsPIC33FJ32MC104 44 32 2 26 5 3 2 1 3 1 6-ch 2 1 ADC,
Note 1: Four out of five timers are remappable.
2: Two pairs can be combined to have up to two 32-bit timers. 3: Two out of three interrupts are remappable.
Pins
RAM (Kbytes)
Program Flash (Kbyte)
20 32 2 8 5 3 2 1 3 1 — — 1 ADC,
36 32 2 16 5 3 2 1 3 1 — — 1 ADC,
36 32 2 16 5 3 2 1 3 1 6-ch 2 1 ADC,
Remappable Pins
Input Capture
16-bit Timer
UART
Output Compare
SPI
External Interrupts
PWM Faults
Motor Control PWM
10-Bit, 1.1 Msps ADC
6-ch
6-ch
8-ch
8-ch
14-ch
6-ch
8-ch
8-ch
14-ch
C™
2
I
RTCC
Y 1 3 Y 13 PDIP,
Y 1 3 Y 15 SSOP
Y 1 3 Y 21 SPDIP,
Y 1 3 Y 21 VTLA
Y 1 3 Y 35 TQFP,
Y1 3 Y15PDIP,
Y 1 3 Y 21 SPDIP,
Y 1 3 Y 21 VTLA
Y 1 3 Y 35 TQFP,
Comparators
CTMU
I/O Pins
Packages
SOIC
SOIC, SSOP, QFN
QFN, VTLA
SOIC, SSOP
SOIC, SSOP, QFN
QFN, VTLA
2011-2012 Microchip Technology Inc. DS70652E-page 3
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
18-Pin PDIP/SOIC
dsPIC33FJ16GP101
MCLR PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0 PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
V
DD
VSS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
SCK1/INT0/RP7
(1)
/CN23/RB7
PGEC3/SOSCO/T1CK/CN0/RA4
PGED3/SOSCI/RP4
(1)
/CN1/RB4
V
CAP
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
V
SS
SDA1/SDI1/RP9
(1)
/CN21/RB9
SCL1/SDO1/RP8
(1)
/CN22/RB8
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
1 2 3 4 5
6 7 8 9
18 17 16 15 14
13 12 11 10
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available peripherals.
= Pins are up to 5V tolerant
dsPIC33FJ32GP101
MCLR PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0 PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
V
DD
VSS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
INT0/RP7
(1)
/CN23/RB7
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
V
CAP
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
V
SS
SDA1/RP9
(1)
/CN21/RB9
SCL1/RP8
(1)
/CN22/RB8
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
1 2 3 4 5
6 7 8 9
18 17 16 15 14
13 12 11 10
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14

Pin Diagrams

DS70652E-page 4  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
dsPIC33FJ16GP101
MCLR
VSS
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
AV
DD
AVSS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
SCK1/INT0/RP7
(1)
/CN23/RB7
PGEC3/SOSCO/T1CK/CN0/RA4
PGED3/SOSCI/RP4
(1)
/CN1/RB4
V
CAP
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
V
SS
SDA1/SDI1/RP9
(1)
/CN21/RB9
SCL1/SDO1/RP8
(1)
/CN22/RB8
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
1 2 3 4 5
6 7 8 9 10
20 19 18 17 16
15 14 13 12 11
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14
V
DD
20-Pin SSOP
Note 1: The RPn pins can be used by any remappable peripheral. See Tab l e 1 for the list of available peripherals.
= Pins are up to 5V tolerant
dsPIC33FJ32GP101
MCLR
VSS
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0 PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
AV
DD
AVSS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
INT0/RP7
(1)
/CN23/RB7
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
V
CAP
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
V
SS
SDA1/RP9
(1)
/CN21/RB9
SCL1/RP8
(1)
/CN22/RB8
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
1 2 3 4 5
6 7 8 9 10
20 19 18 17 16
15 14 13 12 11
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14
V
DD

Pin Diagrams (Continued)

2011-2012 Microchip Technology Inc. DS70652E-page 5
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
dsPIC33FJ16GP102
MCLR
VSS
VDD
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0 PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
AV
DD
AVSS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
ASCL1/RP6
(1)
/CN24/RB6
PGEC3/SOSCO/T1CK/CN0/RA4
PGED3/SOSCI/RP4
(1)
/CN1/RB4
V
SS
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
V
CAP
SCK1/INT0/RP7
(1)
/CN23/RB7
SDA1/SDI1/RP9
(1)
/CN21/RB9
SCL1/SDO1/RP8
(1)
/CN22/RB8
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
1 2 3 4 5
6 7 8 9 10 11 12 13 14
28 27 26 25 24
23 22 21 20 19 18 17 16 15
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14
RP13
(1)
/CN13/RB13
RP12
(1)
/CN14/RB12
RP10
(1)
/CN16/RB10
RP11
(1)
/CN15/RB11
ASDA1/RP5
(1)
/CN27/RB5
28-Pin SPDIP/SOIC/SSOP
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available peripherals.
= Pins are up to 5V tolerant
dsPIC33FJ32GP102
MCLR
VSS
VDD
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0 PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
AV
DD
AVSS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
ASCL1/RP6
(1)
/CN24/RB6
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
V
SS
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
V
CAP
INT0/RP7
(1)
/CN23/RB7
SDA1/RP9
(1)
/CN21/RB9
SCL1/RP8
(1)
/CN22/RB8
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
1 2 3 4 5
6 7 8 9 10 11 12 13 14
28 27 26 25 24
23 22 21 20 19 18 17 16 15
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14
RP13
(1)
/CN13/RB13
RP12
(1)
/CN14/RB12
RP10
(1)
/CN16/RB10
RP11
(1)
/CN15/RB11
ASDA1/RP5
(1)
/CN27/RB5

Pin Diagrams (Continued)

DS70652E-page 6  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
dsPIC33FJ16MC101
MCLR
VSS
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0 PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
V
DD
VSS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
FLTA1
(2)
/SCK1/INT0/RP7
(1)
/CN23/RB7
PGEC3/SOSCO/T1CK/CN0/RA4
PGED3/SOSCI/RP4
(1)
/CN1/RB4
PWM1H2/RP12
(1)
/CN14/RB12
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
V
CAP
SDA1/SDI1/PWM1L3/RP9
(1)
/CN21/RB9
SCL1/SDO1/PWM1H3/RP8
(1)
/CN22/RB8
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
1 2 3 4 5
6 7 8 9 10
20 19 18 17 16
15 14 13 12
11
PWM1L1/RP15
(1)
/CN11/RB15
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
PWM1L2/RP13
(1)
/CN13/RB13
20-Pin PDIP/SOIC/SSOP
Note 1: The RPn pins can be used by any remappable peripheral. See Tab l e 1 for the list of available peripherals.
2: The PWM Fault pins are enabled and asserted during any Reset event. Refer to Section 15.2 “PWM Faults”
for more information on the PWM Faults.
= Pins are up to 5V tolerant
dsPIC33FJ32MC101
MCLR
VSS
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0 PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
V
DD
VSS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
FLTA1
(2)
/INT0/RP7
(1)
/CN23/RB7
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
PWM1H2/RP12
(1)
/CN14/RB12
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
V
CAP
SDA1/PWM1L3/RP9
(1)
/CN21/RB9
SCL1/PWM1H3/RP8
(1)
/CN22/RB8
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
1 2 3 4 5
6 7 8 9 10
20 19 18 17 16
15 14 13 12 11
PWM1L1/RP15
(1)
/CN11/RB15
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
PWM1L2/RP13
(1)
/CN13/RB13

Pin Diagrams (Continued)

2011-2012 Microchip Technology Inc. DS70652E-page 7
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
Note 1: The RPn pins can be used by any remappable peripheral. See Tab l e 1 for the list of available peripherals.
2: The PWM Fault pins are enabled and asserted during any Reset event. Refer to Section 15.2 “PWM Faults”
for more information on the PWM Faults.
dsPIC33FJ16MC102
MCLR
VSS
VDD
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0 PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
AV
DD
AVSS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
FLTA1
(2)
/ASCL1/RP6
(1)
/CN24/RB6
PGEC3/SOSCO/T1CK/CN0/RA4
PGED3/SOSCI/RP4
(1)
/CN1/RB4
V
SS
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
V
CAP
SCK1/INT0/RP7
(1)
/CN23/RB7
SDA1/SDI1/RP9
(1)
/CN21/RB9
SCL1/SDO1/RP8
(1)
/CN22/RB8
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
1 2 3 4 5
6 7 8 9 10 11 12 13 14
28 27 26 25 24
23 22 21 20 19 18 17 16 15
PWM1L1/RP15
(1)
/CN11/RB15
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
PWM1L2/RP13
(1)
/CN13/RB13
PWM1H2/RP12
(1)
/CN14/RB12
PWM1H3/RP10
(1)
/CN16/RB10
PWM1L3/RP11
(1)
/CN15/RB11
FLTB1
(2)
/ASDA1/RP5
(1)
/CN27/RB5
28-Pin SPDIP/SOIC/SSOP
= Pins are up to 5V tolerant
dsPIC33FJ32MC102
MCLR
VSS
VDD
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0 PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
AV
DD
AVSS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
FLTA1
(2)
/ASCL1/RP6
(1)
/CN24/RB6
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
V
SS
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
V
CAP
INT0/RP7
(1)
/CN23/RB7
SDA1/RP9
(1)
/CN21/RB9
SCL1/RP8
(1)
/CN22/RB8
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
1 2 3 4 5
6 7 8 9 10 11 12 13 14
28 27 26 25 24
23 22 21 20 19 18 17 16 15
PWM1L1/RP15
(1)
/CN11/RB15
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
PWM1L2/RP13
(1)
/CN13/RB13
PWM1H2/RP12
(1)
/CN14/RB12
PWM1H3/RP10
(1)
/CN16/RB10
PWM1L3/RP11
(1)
/CN15/RB11
FLTB1
(2)
/ASDA1/RP5
(1)
/CN27/RB5

Pin Diagrams (Continued)

DS70652E-page 8  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
28-Pin QFN
(2)
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available peripherals.
2: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.
= Pins are up to 5V tolerant
10 11
2
3
6
1
18
19
20
21
22
12 13 14
15
8
7
16
17
232425262728
9
dsPIC33FJ16GP102
5
4
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
VSS
VCAP
SDA1/SDI1/RP9
(1)
/CN21/RB9
RP13
(1)
/CN13/RB13
RP12
(1)
/CN14/RB12
RP10
(1)
/CN16/RB10
RP11
(1)
/CN15/RB11
V
SS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
VDD
PGEC3/SOSCO/T1CK/CN0/RA4
ASDA1/RP5
(1)
/CN27/RB5
PGED3/SOSCI/RP4
(1)
/CN1/RB4
ASCL1/RP6
(1)
/CN24/RB6
SCK1/INT0/RP7
(1)
/CN23/RB7
SCL1/SDO1/RP8
(1)
/CN22/RB8
AV
DD
AVSS
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14

Pin Diagrams (Continued)

2011-2012 Microchip Technology Inc. DS70652E-page 9
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
28-Pin QFN
(2)
Note 1: The RPn pins can be used by any remappable peripheral. See Tab l e 1 for the list of available peripherals.
2: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.
= Pins are up to 5V tolerant
10 11
2
3
6
1
18
19
20
21
22
12 13 14
15
8
7
16
17
232425262728
9
dsPIC33FJ32GP102
5
4
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
VSS
VCAP
SDA1/RP9
(1)
/CN21/RB9
RP13
(1)
/CN13/RB13
RP12
(1)
/CN14/RB12
RP10
(1)
/CN16/RB10
RP11
(1)
/CN15/RB11
V
SS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
VDD
PGEC3/SOSCOAN10//T1CK/CN0/RA4
ASDA1/RP5
(1)
/CN27/RB5
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
ASCL1/RP6
(1)
/CN24/RB6
INT0/RP7
(1)
/CN23/RB7
SCL1/RP8
(1)
/CN22/RB8
AV
DD
AVSS
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14

Pin Diagrams (Continued)

DS70652E-page 10  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
28-Pin QFN
(2)
Note 1: The RPn pins can be used by any remappable peripheral. See Tab l e 1 for the list of available peripherals.
2: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.
3: The PWM Fault pins are enabled and asserted during any Reset event. Refer to Section 15.2 “PWM Faults”
for more information on the PWM Faults.
10 11
2
3
6
1
18
19
20
21
22
12 13 14
15
8
7
16
17
232425262728
9
dsPIC33FJ16MC102
5
4
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
VSS
VCAP
SDA1/SDI1/RP9
(1)
/CN21/RB9
PWM1L2/RP13
(1)
/CN13/RB13
PWM1H2/RP12
(1)
/CN14/RB12
PWM1H3/RP10
(1)
/CN16/RB10
PWM1L3/RP11
(1)
/CN15/RB11
V
SS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
VDD
PGEC3/SOSCO/T1CK/CN0/RA4
FLTB1
(3)
/ASDA1/RP5
(1)
/CN27/RB5
PGED3/SOSCI/RP4
(1)
/CN1/RB4
FLTA1
(3)
/ASCL1/RP6
(1)
/CN24/RB6
SCK1/INT0/RP7
(1)
/CN23/RB7
SCL1/SDO1/RP8
(1)
/CN22/RB8
AV
DD
AVSS
PWM1L1/RP15
(1)
/CN11/RB15
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
= Pins are up to 5V tolerant

Pin Diagrams (Continued)

2011-2012 Microchip Technology Inc. DS70652E-page 11
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
28-Pin QFN
(2)
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available peripherals.
2: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.
3: The PWM Fault pins are enabled and asserted during any Reset event. Refer to Section 15.2 “PWM
Faults” for more information on the PWM Faults.
10 11
2
3
6
1
18
19
20
21
22
12 13 14
15
8
7
16
17
232425262728
9
dsPIC33FJ32MC102
5
4
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
VSS
VCAP
SDA1/RP9
(1)
/CN21/RB9
PWM1L2/RP13
(1)
/CN13/RB13
PWM1H2/RP12
(1)
/CN14/RB12
PWM1H3/RP10
(1)
/CN16/RB10
PWM1L3/RP11
(1)
/CN15/RB11
V
SS
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
OSCO/CLKO/CN29/RA3
OSCI/CLKI/CN30/RA2
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
VDD
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
FLTB1
(3)
/ASDA1/RP5
(1)
/CN27/RB5
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
FLTA1
(3)
/ASCL1/RP6
(1)
/CN24/RB6
INT0/RP7
(1)
/CN23/RB7
SCL1/RP8
(1)
/CN22/RB8
AV
DD
AVSS
PWM1L1/RP15
(1)
/CN11/RB15
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
= Pins are up to 5V tolerant

Pin Diagrams (Continued)

DS70652E-page 12  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
36-Pin VTLA
(2)
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available peripherals.
2: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.
1
dsPIC33FJ16GP102
10
33 32 31 30 29 28
2
3
4
5
6
24
23
22
21
20
19
11 12 13 14 15
N/C
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
MCLR
AVDD
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14
AV
SS
N/C
N/C
V
SS
SDA1/SDI1/RP9
(1)
/CN21/RB9
RP13
(1)
/CN13/RB13
RP12
(1)
/CN14/RB12
RP10
(1)
/CN16/RB10
RP11
(1)
/CN15/RB11
V
DD
VCAP
VDD
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGED3/SOSCI/RP4
(1)
/CN1/RB4
OSCO/CLKO/CN29/RA3
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
V
SS
OSCI/CLKI/CN30/RA2
N/C (Vss)
N/C
ASDA1/RP5
(1)
/CN27/RB5
PGEC3/SOSCO/T1CK/CN0/RA4
ASCL1/RP6
(1)
/CN24/RB6
SCK1/INT0/RP7
(1)
/CN23/RB7
SCL1/SDO1/RP8
(1)
/CN22/RB8
V
DD
N/C (VDD)
7
8
9
34
35
36
16
17
18
27
26
25
= Pins are up to 5V tolerant

Pin Diagrams (Continued)

2011-2012 Microchip Technology Inc. DS70652E-page 13
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
36-Pin VTLA
(2)
Note 1: The RPn pins can be used by any remappable peripheral. See Tab l e 1 for the list of available peripherals.
2: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.
1
dsPIC33FJ32GP102
10
33 32 31 30 29 28
2
3
4
5
6
24
23
22
21
20
19
11 12 13 14 15
N/C
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
MCLR
AVDD
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14
AV
SS
N/C
N/C
V
SS
SDA1/RP9
(1)
/CN21/RB9
RP13
(1)
/CN13/RB13
RP12
(1)
/CN14/RB12
RP10
(1)
/CN16/RB10
RP11
(1)
/CN15/RB11
V
DD
VCAP
VDD
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
OSCO/CLKO/CN29/RA3
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
V
SS
OSCI/CLKI/CN30/RA2
N/C (Vss)
N/C
ASDA1/RP5
(1)
/CN27/RB5
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
ASCL1/RP6
(1)
/CN24/RB6
INT0/RP7
(1)
/CN23/RB7
SCL1/RP8
(1)
/CN22/RB8
V
DD
N/C (VDD)
7
8
9
34
35
36
16
17
18
27
26
25
= Pins are up to 5V tolerant

Pin Diagrams (Continued)

DS70652E-page 14  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
36-Pin VTLA
(2)
Note 1: The RPn pins can be used by any remappable peripheral. See Tab l e 1 for the list of available peripherals.
2: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.
3: The PWM Fault pins are enabled and asserted during any Reset event. Refer to Section 15.2 “PWM Faults”
for more information on the PWM Faults.
N/C
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
MCLR
AVDD
PWM1L1/RP15
(1)
/CN11/RB15
AV
SS
N/C
N/C
V
SS
SDA1/SDI1/RP9
(1)
/CN21/RB9
PWM1L2/RP13
(1)
/CN13/RB13
PWM1H2/RP12
(1)
/CN14/RB12
PWM1H3/RP10
(1)
/CN16/RB10
PWM1L3/RP11
(1)
/CN15/RB11
V
DD
VCAP
VDD
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGED3/SOSCI/RP4
(1)
/CN1/RB4
OSCO/CLKO/CN29/RA3
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
V
SS
OSCI/CLKI/CN30/RA2
N/C (Vss)
N/C
FLTB1
(3)
/ASDA1/RP5
(1)
/CN27/RB5
PGEC3/SOSCO/T1CK/CN0/RA4
FLTA1
(3)
/ASCL1/RP6
(1)
/CN24/RB6
SCK1/INT0/RP7
(1)
/CN23/RB7
SCL1/SDO1/RP8
(1)
/CN22/RB8
V
DD
N/C (VDD)
dsPIC33FJ16MC102
= Pins are up to 5V tolerant
1
10
33 32 31 30 29 28
2
3
4
5
6
24
23
22
21
20
19
11 12 13 14 15
7
8
9
34
35
36
16
17
18
27
26
25
PWM1H1/RTCC/RP14
(1)
/CN12/RB14

Pin Diagrams (Continued)

2011-2012 Microchip Technology Inc. DS70652E-page 15
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
36-Pin VTLA
(2)
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available peripherals.
2: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.
3: The PWM Fault pins are enabled and asserted during any Reset event. Refer to Section 15.2 “PWM Faults”
for more information on the PWM Faults.
N/C
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
MCLR
AVDD
PWM1L1/RP15
(1)
/CN11/RB15
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
AV
SS
N/C
N/C
V
SS
SDA1/RP9
(1)
/CN21/RB9
PWM1L2/RP13
(1)
/CN13/RB13
PWM1H2/RP12
(1)
/CN14/RB12
PWM1H3/RP10
(1)
/CN16/RB10
PWM1L3/RP11
(1)
/CN15/RB11
V
DD
VCAP
VDD
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
OSCO/CLKO/CN29/RA3
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
V
SS
OSCI/CLKI/CN30/RA2
N/C (Vss)
N/C
FLTB1
(3)
/ASDA1/RP5
(1)
/CN27/RB5
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
FLTA1
(3)
/ASCL1/RP6
(1)
/CN24/RB6
INT0/RP7
(1)
/CN23/RB7
SCL1/RP8
(1)
/CN22/RB8
V
DD
N/C (VDD)
dsPIC33FJ32MC102
= Pins are up to 5V tolerant
1
10
33 32 31 30 29 28
2
3
4
5
6
24
23
22
21
20
19
11 12 13 14 15
7
8
9
34
35
36
16
17
18
27
26
25

Pin Diagrams (Continued)

DS70652E-page 16  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
44 43 42 41 40 39 38 37 36 35 34
133
232
331
430
529
628
727
826
925
10 24
11 23
12 13 14 15 16 17 18 19 20 21 22
44-Pin TQFP
= Pins are up to 5V tolerant
SCL1/RP8
(1)
/CN22/RB8RA10
RA7
RTCC/RP14
(1)
/CN12/RB14
RP15
(1)
/CN11/RB15
A
VSS
AVDD
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
INT0/RP7
(1)
/CN23/RB7
ASCL1/RP6
(1)
/CN24/RB6
ASDA1/RP5
(1)
/CN27/RB5
VDDVSS
AN15/RP21
(1)
/CN26/RC5
AN12/RP20
(1)
/CN25/RC4
AN11/RP19
(1)
/CN28/RC3
RA9
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
dsPIC33FJ32GP104
RP13
(1)
/CN13/RB13
RP12
(1)
/CN14/RB12
RP11
(1)
/CN15/RB11
RP10/CN16/RB10
V
CAP
VSS
RP25
(1)
/CN19/RC9
RP24
(1)
/CN20/RC8
RP23
(1)
/CN17/RC7
SDA1/RP9
(1)
/CN21/RB9
RP22
(1)
/CN18/RC6
PEGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
RA8
OSC2/CLK0/CN29/RA3
OSC1/CLKI/CN30/RA2
V
SS
VDD
AN8/RP18
(1)
/CN10/RC2
AN7/RP17
(1)
/CN9/RC1
AN6/RP16
(1)
/CN8/RC0
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available peripherals.

Pin Diagrams (Continued)

2011-2012 Microchip Technology Inc. DS70652E-page 17
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
44-Pin TQFP
= Pins are up to 5V tolerant
44 43 42 41 40 39 38 37 36 35 34
133
232
331
430
529
628
727
826
925
10 24
11 23
12 13 14 15 16 17 18 19 20 21 22
SCL1/RP8
(1)
/CN22/RB8RA10
RA7
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
PWM1L1/RP15
(1)
/CN11/RB15
A
VSS
AVDD
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
INT0/RP7
(1)
/CN23/RB7
FLTA1
(2)
/ASCL1/RP6
(1)
/CN24/RB6
FLTB1
(2)
/ASDA1/RP5
(1)
/CN27/RB5
V
DD
VSS
AN15/RP21
(1)
/CN26/RC5
AN12/RP20
(1)
/CN25/RC4
AN11/RP19
(1)
/CN28/RC3
RA9
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
dsPIC33FJ32MC104
PWM1L2/RP13
(1)
/CN13/RB13
PWM1H2/RP12
(1)
/CN14/RB12
PWM1L3/RP11
(1)
/CN15/RB11
PWM1H3/RP10
(1)
/CN16/RB10
V
CAP
VSS
RP25
(1)
/CN19/RC9
RP24
(1)
/CN20/RC8
RP23
(1)
/CN17/RC7
SDA1/RP9
(1)
/CN21/RB9
RP22
(1)
/CN18/RC6
PEGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
RA8
OSC2/CLK0/CN29/RA3
OSC1/CLKI/CN30/RA2
V
SS
VDD
AN8/RP18
(1)
/CN10/RC2
AN7/RP17
(1)
/CN9/RC1
AN6/RP16
(1)
/CN8/RC0
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available peripherals.
2: The PWM Fault pins are enabled and asserted during any Reset event. Refer to Section 15.2 “PWM Faults”
for more information on the PWM Faults.

Pin Diagrams (Continued)

DS70652E-page 18  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
dsPIC33FJ32GP104
44-Pin QFN
(2)
44
12
11
23
24
25
26
27
28
29
30
31
32
33
13 14 15 16 17 18 19 20 21 22
10
9
8
7
6
5
4
3
2
1
43 42 41 40 39 38 37 36 35 34
= Pins are up to 5V tolerant
RA10
RA7
RTCC/RP14
(1)
/CN12/RB14
RP15
(1)
/CN11/RB15
A
VSS
AVDD
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN6/RP16
(1)
/CN8/RC0
AN7/RP17
(1)
/CN9/RC1
AN8/RP18
(1)
/CN10/RC2
V
DD
VSS
OSC1/CLKI/CN30/RA2
OSC2/CLKO/CN29/RA3
RA8
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
SCL1/RP8
(1)
/CN22/RB8
INT0/RP7
(1)
/CN23/RB7
ASCL1/RP6
(1)
/CN24/RB6
ASDA1/RP5
(1)
/CN27/RB5
V
DD
VSS
AN15/RP21
(1)
/CN26/RC5
AN12/RP20
(1)
/CN25/RC4
AN11/RP19
(1)
/CN28/RC3
RA9
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
RP13
(1)
/CN13/RB13
RP12
(1)
/CN14/RB12
RP11
(1)
/CN15/RB11
RP10
(1)
/CN16/RB10
V
CAP
VSS
RP25
(1)
/CN19/RC9
RP24
(1)
/CN20/RC8
RP23
(1)
/CN17/RC7
RP22
(1)
/CN18/RC6
SDA1/RP9
(1)
/CN21/RB9
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available peripherals.
2: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.

Pin Diagrams (Continued)

2011-2012 Microchip Technology Inc. DS70652E-page 19
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
dsPIC33FJ32MC104
44-Pin QFN
(2)
44
12
11
23
24
25
26
27
28
29
30
31
32
33
13 14 15 16 17 18 19 20 21 22
10
9
8
7
6
5
4
3
2
1
43 42 41 40 39 38 37 36 35 34
= Pins are up to 5V tolerant
RA10
RA7
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
PWM1L1/RP15
(1)
/CN11/RB15
A
VSS
AVDD
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN6/RP16
(1)
/CN8/RC0
AN7/RP17
(1)
/CN9/RC1
AN8/RP18
(1)
/CN10/RC2
V
DD
VSS
OSC1/CLKI/CN30/RA2
OSC2/CLKO/CN29/RA3
RA8
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
SCL1/RP8
(1)
/CN22/RB8
INT0/RP7
(1)
/CN23/RB7
FLTA1
(3)
/ASCL1/RP6
(1)
/CN24/RB6
FLTB1
(3)
/ASDA1/RP5
(1)
/CN27/RB5
V
DD
VSS
AN15/RP21
(1)
/CN26/RC5
AN12/RP20
(1)
/CN25/RC4
AN11/RP19
(1)
/CN28/RC3
RA9
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
PWM1L2/RP13
(1)
/CN13/RB13
PWM1H2/RP12
(1)
/CN14/RB12
PWM1L3/RP11
(1)
/CN15/RB11
PWM1H3/RP10
(1)
/CN16/RB10
V
CAP
VSS
RP25
(1)
/CN19/RC9
RP24
(1)
/CN20/RC8
RP23
(1)
/CN17/RC7
RP22
(1)
/CN18/RC6
SDA1/RP9
(1)
/CN21/RB9
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available peripherals.
2: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.
3: The PWM Fault pins are enabled and asserted during any Reset event. Refer to Section 15.2 “PWM Faults”
for more information on the PWM Faults.

Pin Diagrams (Continued)

DS70652E-page 20  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
dsPIC33FJ32GP104
44-Pin TLA
(2)
= Pins are up to 5V tolerant
RA10
RA7
RTCC/RP14
(1)
/CN12/RB14
RP15
(1)
/CN11/RB15
A
VSS
AVDD
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN6/RP16
(1)
/CN8/RC0
AN7/RP17
(1)
/CN9/RC1
AN8/RP18
(1)
/CN10/RC2
V
DD
VSS
OSC1/CLKI/CN30/RA2
OSC2/CLKO/CN29/RA3
RA8
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
SCL1/RP8
(1)
/CN22/RB8
INT0/RP7
(1)
/CN23/RB7
ASCL1/RP6
(1)
/CN24/RB6
ASDA1/RP5
(1)
/CN27/RB5
V
DD
VSS
AN15/RP21
(1)
/CN26/RC5
AN12/RP20
(1)
/CN25/RC4
AN11/RP19
(1)
/CN28/RC3
RA9
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
RP13
(1)
/CN13/RB13
RP12
(1)
/CN14/RB12
RP11
(1)
/CN15/RB11
RP10
(1)
/CN16/RB10
V
CAP
VSS
RP25
(1)
/CN19/RC9
RP24
(1)
/CN20/RC8
RP23
(1)
/CN17/RC7
RP22
(1)
/CN18/RC6
SDA1/RP9
(1)
/CN21/RB9
34 33
32
31
30
29
28
27
26
25
24
23
2221
11
12 13 14 15 16 17 18 19 20
10
9
8
7
6
5
4
3
2
1
44 43 42 41 36 3540 39 38 37
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available peripherals.
2: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.

Pin Diagrams (Continued)

2011-2012 Microchip Technology Inc. DS70652E-page 21
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
dsPIC33FJ32MC104
44-Pin TLA
(2)
= Pins are up to 5V tolerant
RA10
RA7
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
PWM1L1/RP15
(1)
/CN11/RB15
A
VSS
AVDD
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
SCL1/RP8
(1)
/CN22/RB8
INT0/RP7
(1)
/CN23/RB7
FLTA1
(3)
/ASCL1/RP6
(1)
/CN24/RB6
FLTB1
(3)
/ASDA1/RP5
(1)
/CN27/RB5
V
DD
VSS
AN15/RP21
(1)
/CN26/RC5
AN12/RP20
(1)
/CN25/RC4
AN11/RP19
(1)
/CN28/RC3
RA9
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
PWM1L2/RP13
(1)
/CN13/RB13
PWM1H2/RP12
(1)
/CN14/RB12
PWM1L3/RP11
(1)
/CN15/RB11
PWM1H3/RP10
(1)
/CN16/RB10
V
CAP
VSS
RP25
(1)
/CN19/RC9
RP24
(1)
/CN20/RC8
RP23
(1)
/CN17/RC7
RP22
(1)
/CN18/RC6
SDA1/RP9
(1)
/CN21/RB9
34 33
32
31
30
29
28
27
26
25
24
23
2221
11
12 13 14 15 16 17 18 19 20
10
9
8
7
6
5
4
3
2
1
44 43 42 41 36 3540 39 38 37
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available peripherals.
2: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.
3: The PWM Fault pins are enabled and asserted during any Reset event. Refer to Section 15.2 “PWM Faults”
for more information on the PWM Faults.
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN6/RP16
(1)
/CN8/RC0
AN7/RP17
(1)
/CN9/RC1
AN8/RP18
(1)
/CN10/RC2
V
DD
VSS
OSC1/CLKI/CN30/RA2
OSC2/CLKO/CN29/RA3
RA8
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4

Pin Diagrams (Continued)

DS70652E-page 22  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104

Table of Contents

dsPIC33FJ16(GP/MC)101/102 and dsPIC33FJ32(GP/MC)101/102/104 Product Families .................................................................. 2
1.0 Device Overview ........................................................................................................................................................................ 27
2.0 Guidelines for Getting Started with 16-bit Digital Signal Controllers .......................................................................................... 33
3.0 CPU............................................................................................................................................................................................ 37
4.0 Memory Organization ................................................................................................................................................................. 49
5.0 Flash Program Memory.............................................................................................................................................................. 83
6.0 Resets ....................................................................................................................................................................................... 87
7.0 Interrupt Controller ..................................................................................................................................................................... 95
8.0 Oscillator Configuration ............................................................................................................................................................ 125
9.0 Power-Saving Features ............................................................................................................................................................ 133
10.0 I/O Ports ................................................................................................................................................................................... 139
11.0 Timer1 ...................................................................................................................................................................................... 163
12.0 Timer2/3 and Timer4/5 ............................................................................................................................................................. 165
13.0 Input Capture............................................................................................................................................................................ 173
14.0 Output Compare....................................................................................................................................................................... 175
15.0 Motor Control PWM Module ..................................................................................................................................................... 179
16.0 Serial Peripheral Interface (SPI)............................................................................................................................................... 195
17.0 Inter-Integrated Circuit™ (I
18.0 Universal Asynchronous Receiver Transmitter (UART) ........................................................................................................... 209
19.0 10-Bit Analog-to-Digital Converter (ADC)................................................................................................................................. 215
20.0 Comparator Module.................................................................................................................................................................. 229
21.0 Real-Time Clock and Calendar (RTCC) .................................................................................................................................. 241
22.0 Charge Time Measurement Unit (CTMU) ............................................................................................................................... 253
23.0 Special Features ...................................................................................................................................................................... 259
24.0 Instruction Set Summary .......................................................................................................................................................... 267
25.0 Development Support............................................................................................................................................................... 275
26.0 Electrical Characteristics .......................................................................................................................................................... 279
27.0 Packaging Information.............................................................................................................................................................. 337
Appendix A: Revision History............................................................................................................................................................. 367
Index ................................................................................................................................................................................................. 375
The Microchip Web Site ..................................................................................................................................................................... 381
Customer Change Notification Service .............................................................................................................................................. 381
Customer Support.............................................................................................................................................................................. 381
Reader Response .............................................................................................................................................................................. 382
Product Identification System ............................................................................................................................................................ 383
2
C™).............................................................................................................................................. 201
2011-2012 Microchip Technology Inc. DS70652E-page 23
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors@microchip.com or fax the Reader Response Form in the back of this data sheet to (480) 792-4150. We welcome your feedback.

Most Current Data Sheet

To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000A is version A of document DS30000).

Errata

An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; http://www.microchip.com
• Your local Microchip sales office (see last page) When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are
using.

Customer Notification System

Register on our web site at www.microchip.com to receive the most current information on all of our products.
DS70652E-page 24  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104

Referenced Sources

This device data sheet is based on the following individual chapters of the “dsPIC33F/PIC24H Family Reference Manual”. These documents should be considered as the primary reference for the operation of a particular module or device feature.
Note 1: To access the documents listed below,
browse to the documentation section of the dsPIC33FJ16MC102 product page of the Microchip Web site (www.microchip.com).
In addition to parameters, features, and other documentation, the resulting page provides links to the related family reference manual sections.
• Section 2. “CPU” (DS70204)
• Section 3. “Data Memory” (DS70202)
• Section 4. “Program Memory” (DS70203)
• Section 5. “Flash Programming” (DS70191)
• Section 8. “Reset” (DS70192)
• Section 9. “Watchdog Timer and Power-Saving Modes” (DS70196)
• Section 11. “Timers” (DS70205)
• Section 12. “Input Capture” (DS70198)
• Section 13. “Output Compare” (DS70209)
• Section 14. “Motor Control PWM” (DS70187)
• Section 16. “Analog-to-Digital Converter (ADC)” (DS70183)
• Section 17. “UART” (DS70188)
• Section 18. “Serial Peripheral Interface (SPI)” (DS70206)
• Section 19. “Inter-Integrated Circuit™ (I
• Section 23. “CodeGuard Security” (DS70199)
• Section 24. “Programming and Diagnostics” (DS70207)
• Section 25. “Device Configuration” (DS70194)
• Section 30. “I/O Ports with Peripheral Pin Select (PPS)” (DS70190)
• Section 37. “Real-Time Clock and Calendar (RTCC)” (DS70301)
• Section 51. “Introduction (Part VI)” (DS70655)
• Section 52. “Oscillator (Part VI)” (DS70644)
• Section 53. “Interrupts (Part VI)” (DS70633)
• Section 54. “Comparator with Blanking” (DS70647)
• Section 55. “Charge Time Measurement Unit (CTMU)” (DS70635)
2
C™)” (DS70195)
2011-2012 Microchip Technology Inc. DS70652E-page 25
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
NOTES:
DS70652E-page 26  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104

1.0 DEVICE OVERVIEW

Note: This data sheet summarizes the features
of the dsPIC33FJ16(GP/MC)101/102 and dsPIC33FJ32(GP/MC)101/102/104 devices. However, it is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to the latest family reference sections of the “dsPIC33F/PIC24H Family Reference Manual”, which are available from the Microchip web site (www.microchip.com).
This data sheet contains device-specific information for dsPIC33FJ16(GP/MC)101/102 and dsPIC33FJ32(GP/ MC)101/102/104 Digital Signal Controller (DSC) Devices. These devices contain extensive Digital Signal Processor (DSP) functionality with a high-performance, 16-bit microcontroller (MCU) architecture.
Figure 1-1 shows a general block diagram of the core
and peripheral modules in the dsPIC33FJ16(GP/ MC)101/102 and dsPIC33FJ32(GP/MC)101/102/104 family of devices. Ta bl e 1 - 1 lists the functions of the various pins shown in the pinout diagrams.
2011-2012 Microchip Technology Inc. DS70652E-page 27
16
OSC1/CLKI
OSC2/CLKO
V
DD, VSS
Timi ng
Generation
MCLR
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Precision
Reference
Band Gap
FRC/LPRC
Oscillators
Regulator
Voltage
VCAP
IC1-IC3
I2C1
PORTA
Instruction
Decode and
Control
PCH PCL
16
Program Counter
16-Bit ALU
23
23
24
23
Instruction Reg
PCU
16 x 16
W Register Array
ROM Latch
16
EA MUX
16
16
8
Interrupt
Controller
PSV and Table
Data Access
Control Block
Stac k
Control
Logic
Loop
Control
Logic
Data Latch
Address
Latch
Address Latch
Program Memory
Data Latch
Literal Data
16
16
16
16
Data Latch
Address
Latch
16
X RAM
Y RAM
16
Y Data Bus
X Data Bus
DSP Engine
Divide Support
16
Control Signals to Various Blocks
ADC1
Timers
PORTB
Address Generator Units
1-5
CNx
UART1
OC/
PWM1-2
RTCC
PWM
6-ch
Remappable
Pins
SPI1
CTMU
External
Interrupts
1-3
Comparators
1-3
Note: Not all pins or features are implemented on all device pinout configurations. See the “Pin Diagrams” section for the specific pins
and features present on each device.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
FIGURE 1-1: dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104 BLOCK
DIAGRAM
DS70652E-page 28  2011-2012 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104

TABLE 1-1: PINOUT I/O DESCRIPTIONS

Pin Name
AN0-AN12,
(5)
AN15
Pin
Type
CLKI CLKO
OSC1
OSC2
SOSCI SOSCO
CN0-CN30
(5)
IC1-IC3 I ST Yes Capture Inputs 1/2/3.
OCFA OC1-OC2
INT0 INT1 INT2
RA0-RA4, RA7-RA10
RB0-RB15
RC0-RC9
(5)
(5)
(5)
T1CK T2CK T3CK
(6)
T4CK
(6)
T5CK
U1CTS U1RTS U1RX U1TX
SCK1 SDI1 SDO1
Legend: CMOS = CMOS compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input PPS = Peripheral Pin Select
Note 1: An external pull-down resistor is required for the FLTA1
2: The FLTA1 3: The FLTB1 4: The PWM Fault pins are enabled during any Reset event. Refer to Section 15.2 “PWM Faults” for more
information on the PWM Faults.
5: Not all pins are available on all devices. Refer to the specific device in the “Pin Diagrams” section for
availability.
6: This pin is available in dsPIC33FJ32(GP/MC)104 (44-pin) devices only.
Buffer
Type
PPS Description
I Analog No Analog input channels.
IOST/CMOS—NoNoExternal clock source input. Always associated with OSC1 pin function.
Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator mode. Optionally functions as CLKO in RC and EC modes. Always associated with OSC2 pin function.
I
ST/CMOS—NoNoOscillator crystal input. ST buffer when configured in RC mode; CMOS
otherwise.
I/O
Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator mode. Optionally functions as CLKO in RC and EC modes.
IOST/CMOS—NoNo32.768 kHz low-power oscillator crystal input; CMOS otherwise.
32.768 kHz low-power oscillator crystal output.
I ST No Change Notification inputs. Can be software programmed for internal weak
pull-ups on all inputs.
I
O
I I I
ST
—
ST ST ST
Yes
Compare Fault A input (for Compare Channels 1 and 2).
Yes
Compare Outputs 1 through 2.
No
External Interrupt 0.
Yes
External Interrupt 1.
Yes
External Interrupt 2.
I/O ST No PORTA is a bidirectional I/O port.
I/O ST No PORTB is a bidirectional I/O port.
I/O ST No PORTC is a bidirectional I/O port.
I I I I I
I
O
I
O
I/O
I
O
ST ST ST ST ST
ST
—
ST
—
ST ST
—
No
Timer1 external clock input.
Yes
Timer2 external clock input.
Yes
Timer3 external clock input.
Yes
Timer4 external clock input.
Yes
Timer5 external clock input.
Yes
UART1 Clear-to-Send.
Yes
UART1 Ready-to-Send.
Yes
UART1 receive.
Yes
UART1 transmit.
Yes
Synchronous serial clock input/output for SPI1.
Yes
SPI1 data in.
Yes
SPI1 data out.
pin on dsPIC33FJXXMC101 (20-pin) devices. pin and the PWM1Lx/PWM1Hx pins are available in dsPIC(16/32)MC10X devices only. pin is available in dsPIC(16/32)MC102/104 devices only.
2011-2012 Microchip Technology Inc. DS70652E-page 29
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin
Type
Buffer
Type
PPS Description
SCL1 SDA1 ASCL1 ASDA1
(1,2,4)
FLTA1
(3,4)
FLTB1 PWM1L1 PWM1H1 PWM1L2 PWM1H2 PWM1L3 PWM1H3
I/O I/O I/O I/O
O O O O O O
ST ST ST ST
I I
ST ST
— — — — — —
No
Synchronous serial clock input/output for I2C1.
No
Synchronous serial data input/output for I2C1.
No
Alternate synchronous serial clock input/output for I2C1.
No
Alternate synchronous serial data input/output for I2C1.
No
PWM1 Fault A input.
No
PWM1 Fault B input.
No
PWM1 Low Output 1
No
PWM1 High Output 1
No
PWM1 Low Output 2
No
PWM1 High Output 2
No
PWM1 Low Output 3
No
PWM1 High Output 3
RTCC O Digital No RTCC Alarm output.
CTPLS CTED1 CTED2
REFIN
CV CVREFOUT C1INA C1INB C1INC C1IND C1OUT C2INA C2INB C2INC C2IND C2OUT C3INA C3INB C3INC C3IND C3OUT
PGED1 PGEC1 PGED2 PGEC2 PGED3 PGEC3
MCLR
O
O
O
O
O
I/O
I/O
I/O
Digital
I
Digital
I
Digital
I
Analog Analog
I
Analog
I
Analog
I
Analog
I
Analog
Digital
I
Analog
I
Analog
I
Analog
I
Analog
Digital
I
Analog
I
Analog
I
Analog
I
Analog
Digital
ST
I
ST ST
I
ST ST
I
ST
Yes
CTMU pulse output.
No
CTMU External Edge Input 1.
No
CTMU External Edge Input 2.
No
Comparator Voltage Positive Reference Input.
No
Comparator Voltage Positive Reference Output.
No
Comparator 1 Positive Input A.
No
Comparator 1 Negative Input B.
No
Comparator 1 Negative Input C.
No
Comparator 1 Negative Input D.
Yes
Comparator 1 Output.
No
Comparator 2 Positive Input A.
No
Comparator 2 Negative Input B.
No
Comparator 2 Negative Input C.
No
Comparator 2 Negative Input D.
Yes
Comparator 2 Output.
No
Comparator 3 Positive Input A.
No
Comparator 3 Negative Input B.
No
Comparator 3 Negative Input C.
No
Comparator 3 Negative Input D.
Yes
Comparator 3 Output.
No
Data I/O pin for Programming/Debugging Communication Channel 1.
No
Clock input pin for Programming/Debugging Communication Channel 1.
No
Data I/O pin for Programming/Debugging Communication Channel 2.
No
Clock input pin for Programming/Debugging Communication Channel 2.
No
Data I/O pin for Programming/Debugging Communication Channel 3.
No
Clock input pin for Programming/Debugging Communication Channel 3.
I/P ST No Master Clear (Reset) input. This pin is an active-low Reset to the device.
Legend: CMOS = CMOS compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input PPS = Peripheral Pin Select
Note 1: An external pull-down resistor is required for the FLTA1
2: The FLTA1 3: The FLTB1
pin and the PWM1Lx/PWM1Hx pins are available in dsPIC(16/32)MC10X devices only.
pin is available in dsPIC(16/32)MC102/104 devices only.
pin on dsPIC33FJXXMC101 (20-pin) devices.
4: The PWM Fault pins are enabled during any Reset event. Refer to Section 15.2 “PWM Faults” for more
information on the PWM Faults.
5: Not all pins are available on all devices. Refer to the specific device in the “Pin Diagrams” section for
availability.
6: This pin is available in dsPIC33FJ32(GP/MC)104 (44-pin) devices only.
DS70652E-page 30  2011-2012 Microchip Technology Inc.
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