Datasheet dsPIC33FJ32GS406, dsPIC33FJ32GS606, dsPIC33FJ32GS608, dsPIC33FJ32GS610, dsPIC33FJ64GS406 Datasheet
...
dsPIC33FJ32GS406/606/608/610 and
dsPIC33FJ64GS406/606/608/610
Data Sheet
High-Performance,
16-bit Digital Signal Controllers
2010 Microchip Technology Inc. Preliminary DS70591C
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and t he lik e is provided only for your convenience
and may be su perseded by upda t es . It is y our responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life supp ort and/or safety ap plications is entir ely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless M icrochip from any and all dama ges, claims,
suits, or expenses re sulting from such use. No licens es are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
K
EELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
32
PIC
logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance,
TSHARC, UniWinDriver, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2010, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-60932-027-0
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
®
MCUs and dsPIC® DSCs, KEELOQ
®
code hopping
DS70591C-page 2 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and
dsPIC33FJ64GS406/606/608/610
High-Performance, 16-Bit Digital Signal Controllers
Operating Range:
• Up to 40 MIPS operation (at 3.0-3.6V):
- Industrial temperature range (-40°C to +85°C)
- Extended temperature range (-40°C to +125°C)
High-Performance DSC CPU:
• Modified Harvard architecture
• C compiler optimized inst ruction set
• 16-bit wide data path
• 24-bit wide instructions
• Linear program memory addressing up to 4M
instruction words
• Linear data memory addressing up to 64 Kbytes
• 83 base instructions: mostly 1 word/1 cycle
• Two 40-bit accumulators with rounding and
saturation options
• Flexible and powerful addressing modes:
-Indirect
- Modulo
- Bit-Reversed
• Software stack
• 16 x 16 fractional/integer multiply operations
• 32/16 and 16/16 divide operations
• Single-cycle multiply and accumulate:
- Accumulator write back for DSP operations
- Dual data fetch
• Up to ±16-bit shifts for up to 40-bit data
Direct Memory Access (DMA):
• 4-channel hardware DMA
• 1 Kbyte dual ported DMA buff er area (DMA RAM)
to store data transferred via DMA:
- Allows data transfer between RAM and a
peripheral while CPU is executing code (no
cycle steali ng)
• Most peripherals support DMA
Digital I/O:
• Up to 85 programmable digital I/O pi ns
• Wake-up/Interrupt-on-Change for up to 24 pins
• Output pins can drive voltage from 3.0V to 3.6V
• Up to 5V output with open drain configuration
• 5V tolerant digital input pins
• 16 mA source/sink on all PWM pins
On-Chip Flash and SRAM:
• Flash program memory (up to 64 Kbytes)
• Data SRAM (up to 8 Kbytes)
• Boot and General Security for program Flash
Peripheral Features:
• Timer/Counters, up to five 16-bit timers
- Can pair up to make one 32-bit timer
• Input Capture (up to four channels):
- Capture on up, down or both edges
- 16-bit capture input functions
- 4-deep FIFO on each capture
• Output Compare (up to four channels):
- Single or Dual 16-bit Compare mode
- 16-bit Glitchless PWM mode
• 4-wire SPI (up to two modules):
- Framing supports I/O interface to simpl e
codecs
- 1-deep FIFO buffer
- Supports 8-bit and 16-bit data
- Supports all serial clock formats and
sampling modes
2
•I
C™ (up to two modules):
- Supports Full Multi-Master Slave mode
- 7-bit and 10-bit addressing
- Bus collision detection and arbitration
- Integrated signal conditioning
- Slave address masking
2010 Microchip Technology Inc. Preliminary DS70591C-page 3
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
Peripheral Features (Continued)
• UART (up to two modules):
- Interrupt on address bit detect
- Interrupt on UART error
- Wake-up on Start bit from Sleep mode
- 4-character TX and RX FIFO buffers
- LIN bus support
©
-IrDA
- High-Speed Baud mode
- Hardware Flow Control with CTS and RTS
• Enhanced CAN (ECAN™ module) 2.0B active:
- Up to eight transmit and up to 32 receive buffers
- 16 receive filters and three masks
- Loopback, Listen Only and Listen All
- Messages modes for diagnostics and bus
- Wake-up on CAN message
- Automatic processing of Remote
- FIFO mode using DMA
- DeviceNet™ addressing support
• Quadrature Encoder Interface (up to 2 modul es ):
- Phase A, Phase B, and index pulse input
- 16-bit up/down position counter
- Count direction status
- Position Measurement (x2 and x 4) mode
- Programmable digital noise filters on inputs
- Alternate 16-bit Timer/Cou nte r mode
- Interrupt on position counter rollover/underflow
encoding and decoding in hardware
monitoring
Transmission Requests
High-Speed PWM Module Features:
• Up to nine PWM generators with up to 18 outputs
• Primary and Secondary time-base
• Individual time base an d duty c ycle fo r each of the
PWM output
• Dead time for rising and falling edges:
- Duty cycle resolution of 1.04 ns
- Dead-time resolution of 1.04 ns
• Phase shift resolution of 1.04 ns
• Frequency resolution of 1.04 ns
• PWM modes supported:
- Standard Edge -Aligned
- True Independent Output
- Complementary
- Center-Aligned
- Push-Pull
-Multi-Phase
- Variable Phase
- Fixed Off-Time
- Current Reset
- Current-Limit
• Independent Fault/Current-Limit inputs
• Output override control
• Special Event Trigger
• PWM capture feature
• Prescaler for input clock
• Dual Trigger from PWM TO ADC
• PWMxL, PWMxH output pin swapping
• On-the-Fly PWM Frequency, Duty cycle and
Phase Shift changes
• Disabling of Individual PWM generators
• Leading-Edge Blanking (LEB) functionality
High-Speed Analog Comparator:
• Up to four Analog Comparators:
- 20 ns response time
- 10-bit DAC for each analog comparator
- DACOUT pin to provide DAC output
- Programmable output polarity
- Selectable input source
- ADC sample and convert capability
• PWM module interface:
- PWM Duty Cycle Control
- PWM Period Control
- PWM Fault Detect
Interrupt Controller:
• 5-cycle latency
• Up to five external interrupts
• Seven programmable priority levels
• Five proc essor exceptions
High-Speed 10-bit ADC:
• 10-bit resolution
• Up to 24 input channels grouped into 12
conversion pairs
• Two internal reference monitoring inputs grouped
into a pair
• Successive Approximation Register (SAR)
converters for parallel conversions of analog pairs:
- 4 Msps for devices with two SARs
- 2 Msps for devices with one SAR
• Dedicated result buffer for each analog channel
• Independent trigger source section for each
analog input conversion pairs
Power Management:
• On-chip 2.5V voltage regulator
• Switch between clock sources in real time
• Idle, Sleep, and Doze modes with fast wake-up
DS70591C-page 4 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
CMOS Flash Technology:
• Low-power, high-speed Flash technology
• Fully static design
• 3.3V (±10%) operating voltag e
• Industrial and Extended tempera t ure
• Low power consumption
System Management:
• Flexible clock options :
- External, crystal, resonator, internal RC
- Phase-Locked Loop (PLL) with 120 MHz VCO
- Primary Crystal Os cill ator (OSC) in t he range
of 3 MHz to 40 MHz
- Second ary oscillator (SOSC)
- Internal Low-Power RC (LPRC) o scillator at a
frequency of 32.767 kHz
- Internal Fast RC (FRC) oscillator at a
frequency of 7.37 MHz
• Power-o n Reset (POR )
• Brown-out Reset (BOR)
• Power-up Timer (PWRT)
• Oscillator Start-up Timer (OST)
• Watchdog Timer with its RC oscillator
• Fail-Safe Clock Monitor
• Reset by multiple sources
• In-Circuit Serial Programming™ (ICSP™)
• Reference Oscillator Output
Application Examples:
• AC-to-DC Converters
• Automotive HID
• Battery Chargers
• DC-to-DC Converters
• Digital Lighting
• Induction Cooking
•LED Ballast
• Renewable Power/Pure Sine Wave Inverters
• Uninterruptible Power Supply (UPS)
Packaging:
• 64-pin QFN (9x9x0.9 mm)
• 64-pin TQFP (10x10x1 mm)
• 80-pin TQFP (12x12x1 mm)
• 100-pin TQFP (14x14x1 mm and 12x12x1 mm)
Note: See the dsPIC33FJ32GS406/606/608/
610 and dsPIC33FJ64GS406/606/608/
610 Controller Families table for exact
peripheral features per device.
2010 Microchip Technology Inc. Preliminary DS70591C-page 5
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610 PRODUCT FAMILIES
The device names, pin counts, memory sizes, and
peripheral availability of each device are listed in
Table 1. The following pages show their pinout
diagrams.
TABLE 1: dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610 CONTROLLER
FAMILIES
ADC
Device
dsPIC33FJ32GS40664324K544212006x20502151658PT,
dsPIC33FJ32GS60664324K544222006x24512261658PT,
dsPIC33FJ32GS60880324K544222008x24512261874PT
dsPIC33FJ32GS610100324K544222009x24512262485PT,
dsPIC33FJ64GS40664648K544212006x20502151658PT,
dsPIC33FJ64GS606 64 64 9K
dsPIC33FJ64GS608 80 64 9K
dsPIC33FJ64GS610 100 64 9K
Note 1: RAM size is inclusive of 1 Kbyte DMA RAM.
Pins
Program Flash Memory (Kbytes)
UART
16-bit Timer
RAM (Bytes)
(1)
(1)
(1)
Input Capture
Output Compare
544222146x24512261658PT,
544222148x24512261874PT
544222149x24512262485PT,
SPI
Quadrature Encoder Interface
ECAN™
PWM
DMA Channels
Analog Compara tor
External Interrupts
C™
2
I
DAC Output
SARs
Sample and Hold (S&H) Circuit
I/O Pins
Packages
Analog-to-Digital Inputs
MR
MR
PF
MR
MR
PF
DS70591C-page 6 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
64-Pin TQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
36
35
34
33
32
31
30
29
28
27
26
646362616059585756
14
15
16
171819202122232425
dsPIC33FJ32GS406
PGEC2/SOSCO/T1CK/CN0/RC14
PGED2/SOSCI/T4CK/CN1/RC13
OC1/QEB1/FLT5/RD0
IC4/QEA1/FLT4/INT4/RD11
IC2/FLT2/U1CTS
/INT2/RD9
IC1/FLT1/SYNCI1/INT1/RD8
V
SS
OSC2/REFCLKO/CLKO/RC15
OSC1/CLKIN/RC12
V
DD
SCL1/RG2
U1RTS
/SCK1/INT0/RF6
U1RX/SDI1/RF2
U1TX/SDO1/RF3
PWM3H/RE5
PWM4L/RE6
PWM4H/RE7
SCK2/FLT12/CN8/RG6
SDI2/FLT11/CN9/RG7
SDO2/FLT10/CN10/RG8
MCLR
VSS
VDD
AN3/AINDX1/CN5/RB3
AN2/ASS1
/CN4/RB2
PGEC3/B/AN1/CN3/RB1
PGED3/AN0/CN2/RB0
PWM5H/UPDN1/CN16/RD7
PWM3L/RE4
PWM2H/RE3
PWM2L/RE2
V
CAP/VDDCORE
PWM1L1/FLT8/RE0
RF1
PWM1H1/RE1
OC2/SYNCO2/FLT6/RD1
OC3/FLT7/SYNCI3/RD2
PGEC1/AN6/OCFA/RB6
PGED1/AN7/RB7
AV
DD
AVSS
AN8/U2CTS/RB8
AN9/RB9
TMS/AN10/RB10
TDO/AN11/RB11
V
SS
VDD
TCK/AN12/RB12
TDI/AN13/RB13
AN14/SS1
/U2RTS/RB14
AN15/OCFB/CN12/RB15
U2TX/SCL2/FLT18/CN18/RF5
U2RX/SDA2/FLT17/CN17/RF4
SDA1/RG3
43
42
41
40
39
38
37
44
48
47
46
504951
545352
55
45
SS2
/FLT9/SYNCI2/T5CK/CN11/RG9
AN5/AQEB1/CN7/RB5
AN4/AQEA1/CN6/RB4
IC3/INDX1/FLT3/INT3/RD10
VDD
SYNCI4/RF0
OC4/SYNCO1/RD3
PWM5L/CN15/RD6
PWM6H/CN14/RD5
PWM6L/CN13/RD4
dsPIC33FJ64GS406
= Pins are up to 5V tolerant
Pin Diagrams
2010 Microchip Technology Inc. Preliminary DS70591C-page 7
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
64-Pin QFN
PGEC2/SOSCO/T1CK/CN0/RC14
PGED2/SOSCI/T4CK/CN1/RC13
OC1/QEB1/FLT5/RD0
IC4/QEA1/FLT4/INT4/RD11
IC2/FLT2/U1CTS
/INT2/RD9
IC1/FLT1/SYNCI1/INT1/RD8
V
SS
OSC2/REFCLKO/CLKO/RC15
OSC1/CLKIN/RC12
V
DD
SCL1/RG2
U1RTS
/SCK1/INT0/RF6
U1RX/SDI1/RF2
U1TX/SDO1/RF3
PWM3H/RE5
PWM4L/RE6
PWM4H/RE7
SCK2/FLT12/CN8/RG6
SDI2/FLT11/CN9/RG7
SDO2/FLT10/CN10/RG8
MCLR
VSS
VDD
AN3/AINDX1/CN5/RB3
AN2/ASS1
/CN4/RB2
PGEC3/B/AN1/CN3/RB1
PGED3/AN0/CN2/RB0
PWM5H/UPDN1/CN16/RD7
PWM3L/RE4
PWM2H/RE3
PWM2L/RE2
V
CAP/VDDCORE
PWM1L1/FLT8/RE0
RF1
PWM1H1/RE1
OC2/SYNCO2/FLT6/RD1
OC3/FLT7/SYNCI3/RD2
PGEC1/AN6/OCFA/RB6
PGED1/AN7/RB7
AV
DD
AVss
AN8/U2CTS
/RB8
AN9/RB9
TMS/AN10/RB10
TDO/AN11/RB11
V
SS
VDD
TCK/AN12/RB12
TDI/AN13/RB13
AN14/SS1
/U2RTS/RB14
AN15/OCFB/CN12/RB15
U2TX/SCL2/FLT18/CN18/RF5
U2RX/SDA2/FLT17/CN17/RF4
SDA1/RG3
SS2
/FLT9/SYNCI2/T5CK/CN11/RG9
AN5/AQEB1/CN7/RB5
AN4/AQEA1/CN6/RB4
IC3/INDX1/FLT3/INT3/RD10
VDD
SYNCI4/RF0
OC4/SYNCO1/RD3
PWM5L/CN15/RD6
PWM6H/CN14/RD5
PWM6L/CN13/RD4
646362 61 60595857 56 55
2223 24 2526272829 30 31
3
40
39
38
37
36
35
34
33
4
5
7
8
9
10
11
1
2
42
41
6
32
43
54
14
15
16
12
13
17
1819 20 21
45
44
47
46
48
53
52515049
dsPIC33FJ32GS406
dsPIC33FJ64GS406
= Pins are up to 5V tolerant
Note: The metal plane at the bottom of the device is not connected to any pins and is recomm ended t o be connected to
V
SS externally.
Pin Diagrams (Continued)
DS70591C-page 8 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
64-Pin TQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
36
35
34
33
32
31
30
29
28
27
26
646362616059585756
14
15
16
171819202122232425
PGEC2/SOSCO/T1CK/CN0/RC14
PGED2/SOSCI/T4CK/CN1/RC13
OC1/QEB1/FLT5/RD0
IC4/QEA1/FLT4/INT4/RD11
IC2/FLT2/U1CTS
/INT2/RD9
IC1/FLT1/SYNCI1/INT1/RD8
V
SS
OSC2/REFCLKO/CLKO/RC15
OSC1/CLKIN/RC12
V
DD
SCL1/RG2
U1RTS
/SCK1/INT0/RF6
U1RX/SDI1/RF2
U1TX/SDO1/RF3
PWM3H/RE5
PWM4L/RE6
PWM4H/RE7
SCK2/FLT12/CN8/RG6
SDI2/FLT11/CN9/RG7
SDO2/FLT10/CN10/RG8
MCLR
VSS
VDD
AN3/CMP2B/AINDX1/CN5/RB3
AN2/CMP1C/CMP2A/ASS1
/CN4/RB2
PGEC3/B/AN1/CMP1B/CN3/RB1
PGED3/AN0/CMP1A/CMP4C/CN2/RB0
PWM5H/UPDN1/CN16/RD7
PWM3L/RE4
PWM2H/RE3
PWM2L/RE2
V
CAP/VDDCORE
PWM1L1/FLT8/RE0
RF1
PWM1H1/RE1
OC2/SYNCO2/FLT6/RD1
OC3/FLT7/SYNCI3/RD2
PGEC1/AN6/CMP3C/CMP4A/OCFA/RB6
PGED1/AN7/CMP4B/RB7
AVdd
AV
SS
AN8/U2CTS/RB8
AN9/DACOUT/RB9
TMS/AN10/RB10
TDO/AN11/EXTREF/RB11
V
SS
VDD
TCK/AN12/CMP1D/RB12
TDI/AN13/CMP2D/RB13
AN14/CMP3D/SS1
/U2RTS/RB14
AN15/CMP4D/OCFB/CN12/RB15
U2TX/SCL2/FLT18/CN18/RF5
U2RX/SDA2/FLT17/CN17/RF4
SDA1/RG3
43
42
41
40
39
38
37
44
48
47
46
504951
545352
55
45
SS2
/FLT9/SYNCI2/T5CK/CN11/RG9
AN5/CMP3B/AQEB1/CN7/RB5
AN4/CMP2C/CMP3A/AQEA1/CN6/RB4
IC3/INDX1/FLT3/INT3/RD10
VDD
SYNCI4/RF0
OC4/SYNCO1/RD3
PWM5L/CN15/RD6
PWM6H/CN14/RD5
PWM6L/CN13/RD4
dsPIC33FJ32GS606
= Pins are up to 5V tolerant
Pin Diagrams (Continued)
2010 Microchip Technology Inc. Preliminary DS70591C-page 9
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
64-Pin TQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
36
35
34
33
32
31
30
29
28
27
26
646362616059585756
14
15
16
171819202122232425
PGEC2/SOSCO/T1CK/CN0/RC14
PGED2/SOSCI/T4CK/CN1/RC13
OC1/QEB1/FLT5/RD0
IC4/QEA1/FLT4/INT4/RD11
IC2/FLT2/U1CTS
/INT2/RD9
IC1/FLT1/SYNCI1/INT1/RD8
V
SS
OSC2/REFCLKO/CLKO/RC15
OSC1/CLKIN/RC12
V
DD
SCL1/RG2
U1RTS
/SCK1/INT0/RF6
U1RX/SDI1/RF2
U1TX/SDO1/RF3
PWM3H/RE5
PWM4L/RE6
PWM4H/RE7
SCK2/FLT12/CN8/RG6
SDI2/FLT11/CN9/RG7
SDO2/FLT10/CN10/RG8
MCLR
VSS
VDD
AN3/CMP2B/AINDX1/CN5/RB3
AN2/CMP1C/CMP2A/ASS1
/CN4/RB2
PGEC3/B/AN1/CMP1B/CN3/RB1
PGED3/AN0/CMP1A/CMP4C/CN2/RB0
PWM5H/UPDN1/CN16/RD7
PWM3L/RE4
PWM2H/RE3
PWM2L/RE2
V
CAP/VDDCORE
PWM1L1/FLT8/RE0
C1TX/RF1
PWM1H1/RE1
OC2/SYNCO2/FLT6/RD1
OC3/FLT7/SYNCI3/RD2
PGEC1/AN6/CMP3C/CMP4A/OCFA/RB6
PGED1/AN7/CMP4B/RB7
AVdd
AV
SS
AN8/U2CTS/RB8
AN9/DACOUT/RB9
TMS/AN10/RB10
TDO/AN11/EXTREF/RB11
V
SS
VDD
TCK/AN12/CMP1D/RB12
TDI/AN13/CMP2D/RB13
AN14/CMP3D/SS1
/U2RTS/RB14
AN15/CMP4D/OCFB/CN12/RB15
U2TX/SCL2/FLT18/CN18/RF5
U2RX/SDA2/FLT17/CN17/RF4
SDA1/RG3
43
42
41
40
39
38
37
44
48
47
46
504951
545352
55
45
SS2
/FLT9/SYNCI2/T5CK/CN11/RG9
AN5/CMP3B/AQEB1/CN7/RB5
AN4/CMP2C/CMP3A/AQEA1/CN6/RB4
IC3/INDX1/FLT3/INT3/RD10
VDD
C1RX/SYNCI4/RF0
OC4/SYNCO1/RD3
PWM5L/CN15/RD6
PWM6H/CN14/RD5
PWM6L/CN13/RD4
dsPIC33FJ64GS606
= Pins are up to 5V tolerant
Pin Diagrams (Continued)
DS70591C-page 10 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
PGEC2/SOSCO/T1CK/CN0/RC14
PGED2/SOSCI/T4CK/CN1/RC13
OC1/QEB1/FLT5/RD0
IC4/QEA1/FLT4/INT4/RD11
IC2/FLT2/U1CTS
/INT2/RD9
IC1/FLT1/SYNCI1/INT1/RD8
V
SS
OSC2/REFCLKO/CLKO/RC15
OSC1/CLKIN/RC12
V
DD
SCL1/RG2
U1RTS
/SCK1/INT0/RF6
U1RX/SDI1/RF2
U1TX/SDO1/RF3
PWM3H/RE5
PWM4L/RE6
PWM4H/RE7
SCK2/FLT12/CN8/RG6
SDI2/FLT11/CN9/RG7
SDO2/FLT10/CN10/RG8
MCLR
VSS
VDD
AN3/CMP2B/AINDX1/CN5/RB3
AN2/CMP1C/CMP2A/ASS1
/CN4/RB2
PGEC3/B/AN1/CMP1B/CN3/RB1
PGED3/AN0/CMP1A/CMP4C/CN2/RB0
PWM5H/UPDN1/CN16/RD7
PWM3L/RE4
PWM2H/RE3
PWM2L/RE2
V
CAP/VDDCORE
PWM1L1/FLT8/RE0
RF1
PWM1H1/RE1
OC2/SYNCO2/FLT6/RD1
OC3/FLT7/SYNCI3/RD2
PGEC1/AN6/CMP3C/CMP4A/OCFA/RB6
PGED1/AN7/CMP4B/RB7
AV
DD
AVSS
AN8/U2CTS/RB8
AN9/DACOUT/RB9
TMS/AN10/RB10
TDO/AN11/EXTREF/RB11
V
SS
VDD
TCK/AN12/CMP1D/RB12
TDI/AN13/CMP2D/RB13
AN14/CMP3D/SS1
/U2RTS/RB14
AN15/CMP4D/OCFB/CN12/RB15
U2TX/SCL2FLT18//CN18/RF5
U2RX/SDA2/FLT17/CN17/RF4
SDA1/RG3
SS2
/FLT9/SYNCI2/T5CK/CN11/RG9
AN5/CMP3B/AQEB1/CN7/RB5
AN4/CMP2C/CMP3A/AQEA1/CN6/RB4
IC3/INDX1/FLT3/INT3/RD10
VDD
SYNCI4/RF0
OC4/SYNCO1/RD3
PWM5L/CN15/RD6
PWM6H/CN14/RD5
PWM6L/CN13/RD4
64 63 62 6160 59 58 57 56 55
22 23 2425 26 27 28 29 30 31
3
40
39
38
37
36
35
34
33
4
5
7
8
9
10
11
1
2
42
41
6
32
43
54
14
15
16
12
13
17
18 19 2021
45
44
47
46
48
53
52 51 5049
dsPIC33FJ32GS606
64-Pin QFN
= Pins are up to 5V tolerant
Note: The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to
V
SS externally.
Pin Diagrams (Continued)
2010 Microchip Technology Inc. Preliminary DS70591C-page 11
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
64-Pin QFN
PGEC2/SOSCO/T1CK/CN0/RC14
PGED2/SOSCI/T4CK/CN1/RC13
OC1/QEB1/FLT5/RD0
IC4/QEA1/FLT4/INT4/RD11
IC2/FLT2/U1CTS
/INT2/RD9
IC1/FLT1/SYNCI1/INT1/RD8
V
SS
OSC2/REFCLKO/CLKO/RC15
OSC1/CLKIN/RC12
V
DD
SCL1/RG2
U1RTS
/SCK1/INT0/RF6
U1RX/SDI1/RF2
U1TX/SDO1/RF3
PWM3H/RE5
PWM4L/RE6
PWM4H/RE7
SCK2/FLT12/CN8/RG6
SDI2/FLT11/CN9/RG7
SDO2/FLT10/CN10/RG8
MCLR
VSS
VDD
AN3/CMP2B/AINDX1/CN5/RB3
AN2/CMP1C/CMP2A/ASS1
/CN4/RB2
PGEC3/B/AN1/CMP1B/CN3/RB1
PGED3/AN0/CMP1A/CMP4C/CN2/RB0
PWM5H/UPDN1/CN16/RD7
PWM3L/RE4
PWM2H/RE3
PWM2L/RE2
V
CAP/VDDCORE
PWM1L1/FLT8/RE0
C1TX/RF1
PWM1H1/RE1
OC2/SYNCO2/FLT6/RD1
OC3/FLT7/SYNCI3/RD2
PGEC1/AN6/CMP3C/CMP4A/OCFA/RB6
PGED1/AN7/CMP4B/RB7
AV
DD
AVSS
AN8/U2CTS/RB8
AN9/DACOUT/RB9
TMS/AN10/RB10
TDO/AN11/EXTREF/RB11
V
SS
VDD
TCK/AN12/CMP1D/RB12
TDI/AN13/CMP2D/RB13
AN14/CMP3D/SS1
/U2RTS/RB14
AN15/CMP4D/OCFB/CN12/RB15
U2TX/SCL2/FLT18/CN18/RF5
U2RX/SDA2/FLT17/CN17/RF4
SDA1/RG3
SS2
/FLT9/SYNCI2/T5CK/CN11/RG9
AN5/CMP3B/AQEB1/CN7/RB5
AN4/CMP2C/CMP3A/AQEA1/CN6/RB4
IC3/INDX1/FLT3/INT3/RD10
VDD
C1RX/SYNCI4/RF0
OC4/SYNCO1/RD3
PWM5L/CN15/RD6
PWM6H/CN14/RD5
PWM6L/CN13/RD4
64 63 62 61 60 59 5857 56 55
22 23 2425 26 27 28 29 30 31
3
40
39
38
37
36
35
34
33
4
5
7
8
9
10
11
1
2
42
41
6
32
43
54
14
15
16
12
13
17
18 19 2021
45
44
47
46
48
53
52 51 5049
dsPIC33FJ64GS606
= Pins are up to 5V tolerant
Note: The metal plane at the bottom of the device is not connected to any pins and is recomm ended t o be connected to
V
SS externally.
Pin Diagrams (Continued)
DS70591C-page 12 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
80-Pin TQFP
727473
7170696867666564636261
20
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
50
49
48
47
46
45
44
21
41
40
39
38
37
36
35
34
2324252627282930313233
dsPIC33FJ32GS608
17
18
19
75
1
57
56
55
54
53
52
51
60
59
58
43
42
767877
79
22
80
QEA2/RD12
PWM7H/OC4/SYNCO1/RD3
OC3/FLT7/RD2
OC2/SYNCO2/FLT6/RD1
PWM2L/RE2
PWM1H1/RE1
PWM1L1/FLT8/RE0
INDX2SYNCI4//RG0
QEB2/RG1
RF1
RF0
PWM3L/RE4
PWM2H/RE3
PWM5H/UPDN1/CN16/RD7
PWM6H/CN14/RD5
OC1/QEB1/FLT5/RD0
IC4/QEA1/FLT4/RD11
IC2/FLT2/RD9
IC1/FLT1/SYNCI1/RD8
SDA2/INT4/FLT19/RA15
IC3/INDX1/FLT3/RD10
SCL2/INT3/FLT20/RA14
V
SS
OSC1/CLKIN/RC12
V
DD
SCL1/RG2
U1RX/RF2
U1TX/RF3
PGEC2/SOSCO/T1CK/CN0/R C14
PGED2/SOSCI/T4CK/CN1/RC13
PWM8H/RA10
PWM8L/RA9
AV
DD
AVSS
AN8/U2CTS/RB8
AN9/DACOUT/RB9
AN10/RB10
AN11/EXTREF/RB11
V
DD
U2RX/FLT17/CN17/RF4
U1RTS
/FLT16/SYNCI2/CN21/RD15
U2TX/FLT18/CN18/RF5
PGEC1/AN6CMP3C/CMP4A//OCFA/RB6
PGED1/AN7/CMP4B/RB7
PWM4H/RE7
SCK2/FLT12/CN8/RG6
SDI2/FLT11/CN9/RG7
SDO2/FLT10/CN10/RG8
MCLR
SS2/FLT9/T5CK/CN11/RG9
AN4/CMP2C/CMP3A/AQEA1/CN6/RB4
AN3/CMP2B/AINDX1/CN5/RB3
AN2/CMP1C/CMP2A/ASS1
/CN4/RB2
PGEC3/AN1/CMP1B/CN3/RB1
PGED3/AN0/CMP1A/CMP4C/CN2/RB0
V
SS
VDD
PWM3H/RE5
PWM4L/RE6
TDO/FLT14/INT2/RE9
TMS/FLT13/INT1/RE8
TCK/AN12/CMP1D/RB12
TDI/AN13/CMP2D/RB13
AN14/CMP3D/SS1
/U2RTS/RB14
AN15/CMP4D/OCFB/CN12/RB15
V
DD
VCAP/VDDCORE
PWM6L/CN13/RD4
PWM7L/CN19/RD13
SDA1/RG3
SDI1/RF7
SDO1/RF8
AN5/CMP3B/AQEB1/CN7/RB5
VSS
OSC2/REFCLKO/CLKO/RC15
PWM5L/CN15/RD6
SCK1/INT0/RF6
U1CTS/FLT15/SYNCI3/CN20/RD14
AN16/T2CK/RC1
AN17/T3CK/RC2
= Pins are up to 5V tolerant
Pin Diagrams (Continued)
2010 Microchip Technology Inc. Preliminary DS70591C-page 13
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
80-Pin TQFP
727473
7170696867666564636261
20
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
50
49
48
47
46
45
44
21
41
40
39
38
37
36
35
34
2324252627282930313233
17
18
19
75
1
57
56
55
54
53
52
51
60
59
58
43
42
767877
79
22
80
QEA2/RD12
PWM7H/OC4/SYNCO1/RD3
OC3/FLT7/RD2
OC2/SYNCO2/FLT6/RD1
PWM2L/RE2
PWM1H1/RE1
PWM1L1/FLT8/RE0
INDX2SYNCI4//RG0
QEB2/RG1
C1TX/RF1
C1RX/RF0
PWM3L/RE4
PWM2H/RE3
PWM5H/UPDN1/CN16/RD7
PWM6H/CN14/RD5
OC1/QEB1/FLT5/RD0
IC4/QEA1/FLT4/RD11
IC2/FLT2/RD9
IC1/FLT1/SYNCI1/RD8
SDA2/INT4/FLT19/RA15
IC3/INDX1/FLT3/RD10
SCL2/INT3/FLT20/RA14
V
SS
OSC1/CLKIN/RC12
V
DD
SCL1/RG2
U1RX/RF2
U1TX/RF3
PGEC2/SOSCO/T1CK/CN0/R C14
PGED2/SOSCI/T4CK/CN1/RC13
PWM8H/RA10
PWM8L/RA9
AV
DD
AVSS
AN8/U2CTS/RB8
AN9/DACOUT/RB9
AN10/RB10
AN11/EXTREF/RB11
V
DD
U2RX/FLT17/CN17/RF4
U1RTS
/FLT16/SYNCI2/CN21/RD15
U2TX/FLT18/CN18/RF5
PGEC1/AN6CMP3C/CMP4A//OCFA/RB6
PGED1/AN7/CMP4B/RB7
PWM4H/RE7
SCK2/FLT12/CN8/RG6
SDI2/FLT11/CN9/RG7
SDO2/FLT10/CN10/RG8
MCLR
SS2/FLT9/T5CK/CN11/RG9
AN4/CMP2C/CMP3A/AQEA1/CN6/RB4
AN3/CMP2B/AINDX1/CN5/RB3
AN2/CMP1C/CMP2A/ASS1
/CN4/RB2
PGEC3/AN1/CMP1B/CN3/RB1
PGED3/AN0/CMP1A/CMP4C/CN2/RB0
V
SS
VDD
PWM3H/RE5
PWM4L/RE6
TDO/FLT14/INT2/RE9
TMS/FLT13/INT1/RE8
TCK/AN12/CMP1D/RB12
TDI/AN13/CMP2D/RB13
AN14/CMP3D/SS1
/U2RTS/RB14
AN15/CMP4D/OCFB/CN12/RB15
V
DD
VCAP/VDDCORE
PWM6L/CN13/RD4
PWM7L/CN19/RD13
SDA1/RG3
SDI1/RF7
SDO1/RF8
AN5/CMP3B/AQEB1/CN7/RB5
VSS
OSC2/REFCLKO/CLKO/RC15
PWM5L/CN15/RD6
SCK1/INT0/RF6
U1CTS/FLT15/SYNCI3/CN20/RD14
AN16/T2CK/RC1
AN17/T3CK/RC2
dsPIC33FJ64GS608
= Pins are up to 5V tolerant
Pin Diagrams (Continued)
DS70591C-page 14 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
100-Pin TQFP
9294939190898887868584838281807978
20
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
65
64
63
62
61
60
59
26
56
45
44
43
42
41
40
39
2829303132333435363738
17
18
19
21
22
95
1
76
77
72
71
70
69
68
67
66
75
74
73
58
57
24
23
25
969897
99
27
4647484950
55
54
53
52
51
100
PWM6H/CN14/RD5
PWM6L/CN13/RD4
PWM7L/CN19/RD13
QEA2/RD12
PWM7H/OC4/RD3
OC3/FLT7/RD2
OC2/SYNCO2/FLT6/RD1
AN23/CN23/RA7
AN22/CN22/RA6
PWM2L/RE2
PWM9L/RG13
PWM9H/RG12
SYNCO1/FLT23/RG14
PWM1H/RE1
PW/M1L/FLT8/RE0
INDX2/RG0
PWM3L/RE4
PWM2H/RE3
RF0
V
CAP/VDDCORE
PGED2/SOSCI/CN1/RC13
OC1/QEB1/FLT5/RD0
IC3/INDX1/FLT3/RD10
IC2/FLT2/RD9
IC1/FLT1/RD8
IC4/QEA1/FLT4/RD11
SDA2/FLT21/RA3
SCL2/FLT22/RA2
OSC2/REFCLKO/CLKO/RC15
OSC1/CLKIN/RC12
V
DD
SCL1/RG2
SCK1/INT0/RF6
SDI1/RF7
SDO1/RF8
SDA1/RG3
U1RX/RF2
U1TX/RF3
Vss
PGEC2/SOSCO/T1CK/CN0/RC14
PWM8H/RA10
PWM8L/RA9
AV
DD
AVSS
AN8/RB8
AN9/DACOUT/RB9
AN10/RB10
AN11/EXTREF/RB11
V
DD
U2CTS/RF12
U2RTS
/RF13
U1CTS
/FLT15/SYNCI3/CN20/RD14
U1RTS
/FLT16/SYNCI2/CN21/RD15
V
DD
VSS
PGEC1/AN6/CMP3C/CMP4A//OCFA/RB6
PGED1/AN7/CMP4B/RB7
U2TX/FLT18/CN18/RF5
U2RX/FLT17/CN17/RF4
PWM3H/RE5
PWM4L/RE6
PWM4H/RE7
SCK2/FLT12/CN8/RG6
V
DD
TMS/RA0
AN20/FLT13/INT1/RE8
AN21/FLT14/INT2/RE9
AN5/CMP3B/AQEB1/CN7/RB5
AN4/CMP2C/CMP3A/AQEA1/CN 6/RB4
AN3/CMP2B/AINDX1/CN5 /RB3
AN2/CMP1C/CMP2A/ASS1
/CN4/RB2
SDI2/FLT11/CN9/RG7
SDO2/FLT10/CN10/RG8
PGEC3/AN1/CMP1B/CN3/RB1
PGED3/AN0/CMP1A/CMP4C/CN2/RB0
SYNCI1/RG15
V
DD
SS2/FLT9/CN11/RG9
MCLR
AN12/CMP1D/RB12
AN13/CMP2D/RB13
AN14/CMP3D/SS1
/RB14
AN15/CMP4D/OCFB/CN12/RB15
QEB2/RG1
RF1
PWM5H/UPDN1/CN16/RD7
PWM5L/CN15/RD6
TDO/RA5
INT4/FLT19/SYNCI4/RA15
INT3/FLT20/RA14
V
SS
VSS
VSS
VDD
TDI/RA4
TCK/RA1
AN16/T2CK/RC1
AN17/T3CK/RC2
AN18/T4CK/RC3
AN19/T5CK/RC4
dsPIC33FJ32GS610
= Pins are up to 5V tolerant
Pin Diagrams (Continued)
2010 Microchip Technology Inc. Preliminary DS70591C-page 15
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
9294939190898887868584838281807978
20
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
65
64
63
62
61
60
59
26
56
45
44
43
42
41
40
39
2829303132333435363738
17
18
19
21
22
95
1
76
77
72
71
70
69
68
67
66
75
74
73
58
57
24
23
25
969897
99
27
4647484950
55
54
53
52
51
100
PWM6H/CN14/RD5
PWM6L/CN13/RD4
PWM7L/CN19/RD13
QEA2/RD12
PWM7H/OC4/RD3
OC3/FLT7/RD2
OC2/SYNCO2/FLT6/RD1
AN23/CN23/RA7
AN22/CN22/RA6
PWM2L/RE2
PWM9L/RG13
PWM9H/RG12
SYNCO1/FLT23/RG14
PWM1H/RE1
PW/M1L/FLT8/RE0
INDX2/RG0
PWM3L/RE4
PWM2H/RE3
C1RX/RF0
V
CAP/VDDCORE
PGED2/SOSCI/CN1/RC13
OC1/QEB1/FLT5/RD0
IC3/INDX1/FLT3/RD10
IC2/FLT2/RD9
IC1/FLT1/RD8
IC4/QEA1/FLT4/RD11
SDA2/FLT21/RA3
SCL2/FLT22/RA2
OSC2/REFCLKO/CLKO/RC15
OSC1/CLKIN/RC12
V
DD
SCL1/RG2
SCK1/INT0/RF6
SDI1/RF7
SDO1/RF8
SDA1/RG3
U1RX/RF2
U1TX/RF3
Vss
PGEC2/SOSCO/T1CK/CN0/RC14
PWM8H/RA10
PWM8L/RA9
AV
DD
AVSS
AN8/RB8
AN9/DACOUT/RB9
AN10/RB10
AN11/EXTREF/RB11
V
DD
U2CTS/RF12
U2RTS
/RF13
U1CTS
/FLT15/SYNCI3/CN20/RD14
U1RTS
/FLT16/SYNCI2/CN21/RD15
V
DD
VSS
PGEC1/AN6/CMP3C/CMP4A//OCFA/RB6
PGED1/AN7/CMP4B/RB7
U2TX/FLT18/CN18/RF5
U2RX/FLT17/CN17/RF4
PWM3H/RE5
PWM4L/RE6
PWM4H/RE7
SCK2/FLT12/CN8/RG6
V
DD
TMS/RA0
AN20/FLT13/INT1/RE8
AN21/FLT14/INT2/RE9
AN5/CMP3B/AQEB1/CN7/RB5
AN4/CMP2C/CMP3A/AQEA1/CN 6/RB4
AN3/CMP2B/AINDX1/CN5 /RB3
AN2/CMP1C/CMP2A/ASS1
/CN4/RB2
SDI2/FLT11/CN9/RG7
SDO2/FLT10/CN10/RG8
PGEC3/AN1/CMP1B/CN3/RB1
PGED3/AN0/CMP1A/CMP4C/CN2/RB0
SYNCI1/RG15
V
DD
SS2/FLT9/CN11/RG9
MCLR
AN12/CMP1D/RB12
AN13/CMP2D/RB13
AN14/CMP3D/SS1
/RB14
AN15/CMP4D/OCFB/CN12/RB15
QEB2/RG1
C1TX/RF1
PWM5H/UPDN1/CN16/RD7
PWM5L/CN15/RD6
TDO/RA5
INT4/FLT19/SYNCI4/RA15
INT3/FLT20/RA14
V
SS
VSS
VSS
VDD
TDI/RA4
TCK/RA1
AN16/T2CK/RC1
AN17/T3CK/RC2
AN18/T4CK/RC3
AN19/T5CK/RC4
dsPIC33FJ64GS610
= Pins are up to 5V tolerant
100-Pin TQFP
Pin Diagrams (Continued)
DS70591C-page 16 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
Table of Contents
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610 Product Families ............................................................... 6
1.0 Device Overview........................................................................................................................................................................ 19
2.0 Guidelines for Getting Started with 16-bit Digital Signal Controllers ..........................................................................................25
3.0 CPU............................................................................................................................................................................................ 35
4.0 Memory Organization................................................................................................................................................................. 47
5.0 Flash Program Memory............................................................................................................................................................ 109
6.0 Resets ..................................................................................................................................................................................... 115
7.0 Interrupt Controller................................... ................................................................. ............................................................... 123
8.0 Direct Memory Access (DMA)......................................................................... ......................................................................... 177
9.0 Oscillator Configuration .........................................................................................................................................................187
10.0 Power-Saving Features............................................................ ................................................................................................ 199
11.0 I/O Ports.............................................. .................................................................................................................................... 209
12.0 Timer1......................................................................................................................................................................................211
13.0 Timer2/3/4/5 feature s ....................................... .............................................................. ......................................................... 213
14.0 Input Capture......................................................................................................... .... ...............................................................219
15.0 Output Compare...................................................... .................................................................................................................221
16.0 High-Speed PWM........ .......................................................................................... ........... ........................................................ 225
17.0 Quadrature Encoder Interface (QEI) Module ........................................................................................................................... 255
18.0 Serial Peripheral Interface (SPI)............................................................................................................................................... 259
19.0 Inter-Integrated Circuit (I
20.0 Universal Asynchronous Receiver Transmitter (UART) ........................................................................................................... 273
21.0 Enhanced CAN (ECAN™) Module........................................................................................................................................... 279
22.0 High-Speed 10-bit Analog- to-Digital Converter (ADC)...................................... ........................... ............................................ 305
23.0 High-Speed Analog Comparato r......................... .................................................... ................................................................. 329
24.0 Special Features...................................................................................................................................................................... 333
25.0 Instruction Set Summary .......................................................................................................................................................... 341
26.0 Development Support............................................................................................................................................................... 349
27.0 Electrical Characteristics.......................................................................................................................................................... 353
28.0 Packaging Information. ................................................................. ............................................................................................ 389
Appendix A: Migrating from dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04 to dsPIC33FJ32GS406/606/608/610
and dsPIC33FJ64GS406/606/608/610 Devices ................................................................................................................................ 403
Appendix B: Revision History............................................................................................................................................................. 404
Index ................................................................................................................................................................................................. 409
The Microchip Web Site.............. ....................................................................................................................................................... 415
Customer Change Notification Service .............................................................................................................................................. 415
Customer Support..............................................................................................................................................................................415
Reader Response.............................................................................................................................................................................. 416
Product Identification System............................................................................................................................................................ 417
2
C™) ................................................................................................................................................. 265
2010 Microchip Technology Inc. Preliminary DS70591C-page 17
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
TO OUR VALUED CUSTOMERS
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DS70591C-page 18 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
1.0 DEVICE OVERVIEW
Note: This data sheet summarizes the features
of the dsPIC33FJ32GS406/606/608/610
and dsPIC33FJ64GS406/606/608/610
families of devic es . It is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to the “dsPIC33F/PIC24H
Family Reference Manual”. Please see
the Microchip web site (www.microchip.com) for the latest dsPIC3 3F/PIC 24H
Family Reference Manual sections.
This document cont a ins dev ice -specific information for
the following dsPIC33F Digital Signal Controller (DSC)
devices:
• dsPIC33FJ32GS406
• dsPIC33FJ32GS606
• dsPIC33FJ32GS608
• dsPIC33FJ32GS610
• dsPIC33FJ64GS406
• dsPIC33FJ64GS606
• dsPIC33FJ64GS608
• dsPIC33FJ64GS610
The dsPIC33FJ32GS406/606/608/610 and
dsPIC33FJ64GS406/606/608/610 families of devices
contain extensiv e Di gital Signal Processo r (DSP) fun ctionality with a high-performance 16-bit microcontroller
(MCU) architecture.
Figure 1-1 shows a general block diagram of the core
and peripheral modules in the dsPIC33FJ32GS406/
606/608/610 and dsPIC33FJ64GS406/606/608/610
devices. Table 1-1 lists the functio ns of th e various pins
shown in the pinout diagrams.
2010 Microchip Technology Inc. Preliminary DS70591C-page 19
16
OSC1/CLKI
OSC2/CLKO
V
DD, VSS
Timing
Generation
MCLR
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Precision
Reference
Band Gap
FRC/LPRC
Oscillators
Regulator
Voltage
VCAP/VDDCORE
IC1-4
I2C1,2
PORTA
Instruction
Decode &
Control
PCH PCL
16
Program Counter
16-bit ALU
23
23
24
23
Instruction Reg
PCU
16 x 16
W Register Array
ROM Latch
16
EA MUX
16
16
8
Interrupt
Controller
PSV & Table
Data Access
Control Block
Stack
Control
Logic
Loop
Control
Logic
Data Latch
Address
Latch
Address Latch
Program Memory
Data Latch
Literal Data
16
16
16
16
Data Latch
Address
Latch
16
X RAM
Y RAM
16
Y Data Bus
X Data Bus
DSP Engine
Divide Support
16
Control Signals
to Various Blocks
ADC1
Timers
PORTB
Address Generator Units
1-5
CNx
UART1,2
PWM
9 x 2
PORTC
SPI1,2
OC1-4
Analog
Comparator 1-4
Note: Not all pins or features are implemented on all device pinout configurations. See pinout diagrams for the specific pins and features
present on each device.
ECAN1
QEI1,2
PORTD
PORTE
PORTF
PORTG
DMA
DMA
RAM
Controller
16
16
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
FIGURE 1-1: BLOCK DIAGRAM
DS70591C-page 20 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
TABLE 1-1: PINOUT I/O DESCRIPTIONS
Pin Name
AN0-AN23 I Analog Analog input channels
CLKI
CLKO
OSC1
OSC2
SOSCI
SOSCO
CN0-CN23 I ST Change notification inputs. Can be software programmed for internal
C1RX
C1TX
IC1-IC4 I ST Capture inputs 1/4
INDX1, INDX2, AINDX1
QEA1, QEA2, AQEA1
QEB1, QEB2, AQEB1
UPDN1
OCFA
OCFB
OC1-OC4
INT0
INT1
INT2
INT3
INT4
RA0-RA15 I/O ST PORTA is a bidirectional I/O port
RB0-RB15 I/O ST PORTB is a bidirectional I/O port
RC0-RC15 I/O ST PORTC is a bidirectional I/O port
RD0-RD15 I/O ST PORTD is a bidirectional I/O port
RE0-RE9 I/O ST PORTE is a bidirectional I/O port
RF0-RF13 I/O ST PORTF is a bidirectional I/O port
RG0-RG15 I/O ST PORTG is a bidirectional I/O port
T1CK
T2CK
T3CK
T4CK
T5CK
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input
ST = Schmitt Trigger input with CMOS levels P = Power O = Output
TTL = Transistor-Transistor Logic
Pin
Type
I/O
O
O
O
Buffer
Type
IOST/CMOS—External clock source input. Always associated with OSC1 pin function.
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes.
Always associated with OSC2 pin function.
I
ST/CMOS—Oscillator crystal input. ST buffer when configured in RC mode; CMOS
otherwise.
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes.
IOST/CMOS—32.768 kHz low-power oscillator crystal input; CMOS otherwise.
32.768 kHz low-power oscillator cry s tal output.
weak pull-ups on all inputs.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
ST—ECAN1 bus receive pin.
ST
ST
ST
CMOS
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ECAN1 bus transmit pin.
Quadrature Encoder Index Pulse input.
Quadrature Encoder Phase A input in QEI mode.
Auxiliary Timer External Clock/Gate input in Timer mode.
Quadrature Encoder Phase A input in QEI mode.
Auxiliary Timer External Clock/Gate input in Timer mode.
Position Up/Down Counter Direction State.
Compare Fault A input (for Compare Channels 1 and 2)
Compare Fault B input (for Compare Channels 3 and 4)
—
Compare Outputs 1 through 4
External Interrupt 0
External Interrupt 1
External Interrupt 2
External Interrupt 3
External Interrupt 4
Timer1 External Clock Input
Timer2 External Clock Input
Timer3 External Clock Input
Timer4 External Clock Input
Timer5 External Clock Input
Description
2010 Microchip Technology Inc. Preliminary DS70591C-page 21
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin
Type
Buffer
Type
Description
U1CTS
U1RTS
U1RX
U1TX
U2CTS
U2RTS
U2RX
U2TX
SCK1
SDI1
SDO1
SS1, ASS1
SCK2
SDI2
SDO2
SS2
SCL1
SDA1
SCL2
SDA2
TMS
TCK
TDI
TDO
CMP1A
CMP1B
CMP1C
CMP1D
CMP2A
CMP2B
CMP2C
CMP2D
CMP3A
CMP3B
CMP3C
CMP3D
CMP4A
CMP4B
CMP4C
CMP4D
DACOUT 0 — DAC output voltage
EXTREF I Analog External Voltage Reference Input for the Reference DACs
REFCLK 0 — REFCLK output signal is a postscaled derivative of the system clock
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input
ST = Schmitt Trigger input with CMOS levels P = Power O = Output
TTL = Transistor-Transistor Logic
I
O
I
O
I
O
I
O
I/O
I
O
I/O
I/O
I
O
I/O
I/O
I/O
I/O
I/O
I
I
I
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
ST
—
ST
—
ST
—
ST
—
ST
ST
—
ST
ST
ST
—
ST
ST
ST
ST
ST
TTL
TTL
TTL
—
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
UART1 clear to send
UART1 ready to send
UART1 receive
UART1 transmit
UART2 clear to send
UART2 ready to send
UART2 receive
UART2 transmit
Synchronous serial clock input/output for SPI1
SPI1 data in
SPI1 data ou t
SPI1 slave synchronization or frame pulse I/O
Synchronous serial clock input/output for SPI2
SPI2 data in
SPI2 data ou t
SPI2 slave synchronization or frame pulse I/O
Synchronous serial clock input/output for I2C1
Synchronous serial data input/output for I2C1
Synchronous serial clock input/output for I2C2
Synchronous serial data input/output for I2C2
JTAG Test mode select pin
JTAG test clock input pi n
JTAG test data input pin
JTAG test data output pin
Comparator 1 Channel A
Comparator 1 Channel B
Comparator 1 Channel C
Comparator 1 Channel D
Comparator 2 Channel A
Comparator 2 Channel B
Comparator 2 Channel C
Comparator 2 Channel D
Comparator 3 Channel A
Comparator 3 Channel B
Comparator 3 Channel C
Comparator 3 Channel D
Comparator 4 Channel A
Comparator 4 Channel B
Comparator 4 Channel C
Comparator 4 Channel D
DS70591C-page 22 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin
Type
Buffer
Type
Description
FLT1-FLT23
SYNCI1-SYNCI4
SYNCO1-SYNCO2
PWM1L
PWM1H
PWM2L
PWM2H
PWM3L
PWM3H
PWM4L
PWM4H
PWM5L
PWM5H
PWM6L
PWM6H
PWM7L
PWM7H
PWM8L
PWM8H
PWM9L
PWM9H
PGED1
PGEC1
PGED2
PGEC2
PGED3
PGEC3
MCLR
AV
DD P P Positive supply for analog modules
AVSS P P Ground reference for analog modules
DD P — Positive supply for peripheral logic and I/O pins
V
VCAP/VDDCORE P — CPU logic filter capacitor connection
VSS P — Ground reference for logic and I/O pins
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input
ST = Schmitt Trigger input with CMOS levels P = Power O = Output
TTL = Transistor-Transistor Logic
I
I
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I/O
I
I/O
I
I/O
I
I/P ST Master Clear (Reset) input. This pin is an active-low Reset to the
ST
ST
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ST
ST
ST
ST
ST
ST
Fault Inputs to PWM Module
External synchronization signal to PWM Master Time Base
PWM Master Time Base for external device synchronization
PWM1 Low output
PWM1 High output
PWM2 Low output
PWM2 High output
PWM3 Low output
PWM3 High output
PWM4 Low output
PWM4 High output
PWM5 Low output
PWM5 High output
PWM6 Low output
PWM6 High output
PWM7 Low output
PWM7 High output
PWM8 Low output
PWM8 High output
PWM9 Low output
PWM9 High output
Data I/O pin for programming/debugging communication Channel 1
Clock input pin for programming/debugging communication Channel 1
Data I/O pin for programming/debugging communication Channel 2
Clock input pin for programming/debugging communication Channel 2
Data I/O pin for programming/debugging communication Channel 3
Clock input pin for programming/debugging communication Channel 3
device.
2010 Microchip Technology Inc. Preliminary DS70591C-page 23
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
NOTES:
DS70591C-page 24 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
2.0 GUIDELINES FOR GETTING STARTED WITH 16-BIT DIGITAL SIGNAL CONTROLLERS
Note 1: This data sheet summarizes the features
of the dsPIC33FJ32GS406/606/608/610
and dsPIC33FJ64GS406/606/608/610
family of devices. It is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to the “dsPIC33F/PIC24H
Family Reference Manual”. Please see
the Microchip web site
(www.microchip.com) for the latest
74dsPIC33F/PIC24H Family Reference
Manual sections.
2: Some registers and associated bits
described in this section may not be available on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
2.1 Basic Connection Requirements
Getting started with the
dsPIC33FJ32GS406/606/608/610 and
dsPIC33FJ64GS406/606/608/610 family of 16-bit
Digital Signal Controllers (DSC) requires attention to a
minimal set of device pin connections before
proceeding with development. The following is a list of
pin names, which must always be connected:
DD and VSS pins
•All V
(see Section 2.2 “Decoupling Capacitors”)
•All AV
•V
•MCLR pin
• PGECx/PGEDx pins used for In-Circuit Serial
• OSC1 and OSC2 pins when external oscillator
DD and AVSS pins (regardless if ADC module
is not used)
(see Section 2.2 “Decoupling Capacitors”)
CAP/VDDCORE
(see Section 2.3 “Capacitor on Internal Voltage
Regulator (V
(see Section 2.4 “Master Clear (MCLR) Pin”)
Programming™ (ICSP™) and debugging purposes
(see Section 2.5 “ICSP Pins”)
source is used
(see Section 2.6 “External Oscillator Pins”)
CAP/VDDCORE)”)
2.2 Decoupling Capacitors
The use of decoupling capacitors on every pair of
power supply pins, such as V
SS is required.
AV
Consider the following criteria when using decoupling
capacitors:
• Value and type of cap a cito r: Reco mm endation
of 0.1 µF (100 nF), 10-20V. This capacitor should
be a low-ESR and have resonance frequency in
the range of 20 MHz and higher. It is
recommended that ceramic c apacitors be used.
• Placement on the printed circuit board: The
decoupling capacitors should be placed as close
to the pins as possible. It is recommended to
place the capacitors on the same side of the
board as the device. If space is constricted, the
capacitor can be placed on another layer on the
PCB using a via; however, ensure that the trace
length from the pin to the capacitor is within
one-quarter inch (6mm) in length.
• Handling high frequency noise: If the board is
experiencing high frequency noise, upward of
tens of MHz, add a second ceramic-type capacitor in parallel to the above described decoupling
capacitor. The value of the second capacitor can
be in the range of 0.01 µF to 0.001 µF. Place this
second capacitor next to the primary decoupling
capacitor. In high-speed circuit designs, consider
implementing a decade pair of capacitances as
close to the power and ground pins as possible.
For example, 0.1 µF in parallel with 0.001 µF.
• Maximizing performance: On the board layout
from the power supply circuit, run the power and
return traces to the decoupling cap acito rs firs t,
and then to the device pins. This ensures that the
decoupling capacitors are first in the power chain.
Equally important is to keep the trace length
between the capacitor and the power pins to a
minimum, thereby reducing PCB track
inductance.
DD, VSS, AVDD, and
2010 Microchip Technology Inc. Preliminary DS70591C-page 25
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
dsPIC33F
VDD
VSS
VDD
VSS
VSS
VDD
AVDD
AVSS
VDD
VSS
0.1 µF
Ceramic
0.1 µF
Ceramic
0.1 µF
Ceramic
0.1 µF
Ceramic
C
R
V
DD
MCLR
0.1 µF
Ceramic
VCAP/VDDCORE
10
R1
Note 1: R 10 k is recommended. A suggested
starting value is 10 k. Ensure that the
MCLR
pin VIH and VIL specifications are met.
2: R1 470 will limit any current flowing into
MCLR
from the external capacitor C, in the
event of MCLR
pin breakdown, due to
Electrostatic Discharge (ESD) or Electrical
Overstress (EOS). Ensure that the MCLR
pin
V
IH and VIL specifications are met.
C
R1
R
V
DD
MCLR
dsPIC33F
JP
FIGURE 2-1: RECOMMENDED
MINIMUM CONNECTION
2.2.1 TANK CAPACITORS
On boards with power traces running longer than six
inches in length, it is suggested to use a tank capacitor
for integrated circuits including DSCs to supply a local
power source. The value of the tank capacitor should
be determined based on the trace resistance that connects the power supply source to the device, and the
maximum current drawn by the device in the application. In other words, select the tank capacitor so that it
meets the ac ceptable volta ge sag at th e device . T ypical
values range from 4.7 µF to 47 µF.
2.4 Master Clear (MCLR) Pin
The MCLR pin provides for two specific device
functions:
• Device Reset
• Device programming and debugging.
During device programming and debugging, the
resistance and capacitance that can be added to the
pin must be considered. Device programmers and
debuggers drive the MCLR
specific voltage levels (V
transitions must not be adversely affected. Therefore,
specific values of R and C will need to be adjusted
based on the application and PCB requirements.
For example, as shown in Figure 2-2, it is
recommended that the capacitor C, be isolated from
the MCLR
pin during programming and debugging
operations.
Place the components shown in Figure2-2 within
one-quarter inch (6mm) from the MCLR
FIGURE 2-2: EXAMPLE OF MCLR PIN
CONNECTIONS
pin. Consequently,
IH and VIL) and fast signal
pin.
2.3 Capacitor on Internal Voltage
Regulator (V
A low-ESR (< 5 Ohms) capacitor is required on the
CAP/VDDCORE pin, which is used to stabilize the
V
voltage regulator output voltage. The V
pin must not be connected to VDD, and must have a
capacitor bet ween 4.7µF and 10 µF, 16V connected to
ground. The type can be ceramic or tantalum. Refer to
Section 27.0 “Electrical Characteristics” for
additional information.
The placement of this capacitor should be close to the
CAP/VDDCORE. It is recommended that the trace
V
length not exceed one-quarter inch (6 mm). Refer to
Section 24.2 “On-Chip Voltage Regulator” for
details.
DS70591C-page 26 Preliminary 2010 Microchip Technology Inc.
CAP/VDDCORE)
CAP/VDDCORE
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
13
Main Oscillator
Guard Ring
Guard Trace
Secondary
Oscillator
14
15
16
17
18
19
20
2.5 ICSP Pins
The PGECx and PGEDx pins are used for In-Circuit
Serial Programming™ (ICSP™) and debugging purposes. It is recommended to keep the trace length
between the ICSP connec tor an d th e ICSP pi ns on th e
device as short as possible. If the ICSP connector is
expected to experience an ESD event, a serie s resistor
is recommended, with the value in the range of a few
tens of Ohms, not to exceed 100 Ohms.
Pull-up resistors, series diodes, and capacitors on the
PGCx and PGDx pins are not recommended as they
will interfere with the programmer/debugger communications to the device. If such discrete components are
an application requirement, they should be removed
from the circuit during programming and debugging.
Alternatively, refer to the AC/DC characteristics and
timing requirements information in the respective
device Flash programming specification for information
on capacitive loading limits and pin input voltage high
IH) and input low (VIL) requirements.
(V
Ensure that the “Communication Channel Select” (i.e.,
PGECx/PGEDx pins) programmed into the device
matches the physical connections for the ICSP to
MPLAB
ICE™.
For more information on ICD 2, ICD 3, and REAL ICE
connection requirements, refer to the following
documents that are available on the Microchip web
site.
• “MPLAB
• “Using MPLAB
• “MPLAB
• “Using MPLAB® ICD 3” (poster) DS51765
• “MPLAB® ICD 3 Design Advisory” DS51764
• “MPLAB
• “Using MPLAB
®
ICD 2, MPLAB® ICD 3, or MPLAB® REAL
®
ICD 2 In-Circuit Debugger User's
Guide” DS51331
®
®
®
ICD 2” (poster) DS51265
ICD 2 Design Advisory” DS51566
REAL ICE™ In-Circuit Debugger
User's Guide” DS51616
®
REAL ICE™” (poster) DS51749
2.6 External Oscillator Pins
Many DSCs have options for at least two oscillators: a
high-frequency primary oscillator and a low-frequency
secondary oscillator (refer to Section 9.0 “Oscillator
Configuration” for details).
The oscillator circuit should be placed on the same
side of the board as the device. Also, place the
oscillator circuit close to the respective oscillator pins,
not exceeding one-half inch (12 mm) distance
between them. The load capacitors should be placed
next to the oscillator itself, on the same side of the
board. Use a grounded copper pour around the
oscillator circuit to isolate them from surrounding
circuits. The grounded copper pour should be routed
directly to the MCU ground. Do not run any signal
traces or power traces inside the ground pour. Also, if
using a two-sided board, avoid any traces on the
other side of the board where the crystal is placed. A
suggested layout is shown in Figure 2-3.
FIGURE 2-3: SUGGESTED PLACEMENT
OF THE OSCILLATOR
CIRCUIT
2010 Microchip Technology Inc. Preliminary DS70591C-page 27
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
2.7 Oscillator Value Conditions on
Device Start-up
If the PLL of the target device is enabled and
configured for the device start-up oscillator, the
maximum oscil lator source freque ncy must be limit ed
to 4 MHz < F
start-up conditions. This means that if the external
oscillator frequency is outside this range, the
application must start-up in the FRC mode first. The
default PLL settings after a POR with an oscillator
frequency outside this range will violate the device
operating speed.
Once the device powers up, the application firmware
can initialize the PLL SFR s, CLKDIV, and PLLDBF to a
suitable value, and then perform a clock switch to the
Oscillator + PLL clock source. Note that clock switching
must be enabled in the device Configuration Word.
IN < 8 MHz to comply with device PLL
2.8 Configuration of Analog and
Digital Pins During ICSP
Operations
If MPLAB ICD 2, ICD 3, or R EAL ICE i s sele cted as a
debugger, it automatical ly ini tia liz es al l of the A/D input
pins (ANx) as “digital” pins, by setting all bits in the
ADPCFG and ADPCFG2 registers.
The bits in the re gister s that co rrespond to the A/D pin s
that are initialized by MPLAB ICD 2, ICD 3, or REAL
ICE, must not be cleared by the user application
firmware; otherwise, communication errors will result
between the debugger and the device.
If your application needs to use certain A/D pins as
analog input pins during the debug session, the user
application must clear the corresponding bits in the
ADPCFG and ADPCFG2 registers during initialization
of the ADC module.
When MPLAB ICD 2, ICD 3, or REAL ICE is used as a
programmer, the user application firmware must
correctly configure the ADPCFG and ADPCFG2
registers. Automatic initialization of these registers is
only done during debugger operation. Failure to
correctly configure the register(s) will result in all A/D
pins being recogn ized as a nalog inpu t pins , res ulting in
the port value being read as a logic '0', which may
affect user application functionality.
2.9 Unused I/Os
Unused I/O pins s hould b e config ured as outputs and
driven to a logic-low state.
Alternatively, connect a 1k to 10k resistor to V
unused pins and drive the output to logic low.
SS on
2.10 Typical Application Connection
Examples
Examples of typical applicati on connecti ons are shown
in Figure 2-4 through Figure 2-11.
DS70591C-page 28 Preliminary 2010 Microchip Technology Inc.
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
VAC
IPFC
VHV_BUS
ADC Channel
ADC Channel
ADC Channel
PWM Output
|V
AC|
k
1
k
2
k
3
FET
dsPIC33FJ32GS406
Driver
IPFC
VOUTPUT
ADC Channel
ADC
ADC Channel
PWM
k
1
k
2
k
3
FET
dsPIC33FJ32GS406
V
INPUT
Channel Output
Driver
FIGURE 2-4: DIGITAL PFC
FIGURE 2-5: BOOST CONVERTER IMPLEMENTATION
2010 Microchip Technology Inc. Preliminary DS70591C-page 29
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
k
1
Analog
Comp.
k
2
k
7
PWM
PWM
ADC
Channel
ADC
Channel
5V Output
I
5V
12V Input
FET
Driver
dsPIC33FJ32GS606
k
5
k
4
k
3
k
6
k
7
Analog Comparator
Analog Comparator
ADC Channel
Analog Comparator
ADC
Channel
PWM
PWM
PWM
PWM
PWM
PWM
3.3V Output
12V Input
FET
Driver
FET
Driver
FET
Driver
dsPIC33FJ32GS608
FIGURE 2-6: SINGLE-PHASE SYNCHRONOUS BUCK CONVERTER
FIGURE 2-7: MULTI-PHASE SYNCHRONOUS BUCK CONVERTER
DS70591C-page 30 Preliminary 2010 Microchip Technology Inc.
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