Page 1
A
B
C
D
E
MODEL NAME : VAW00
ZZZ
R1@
ZZZ
GCER3@
ZZZ
TRIR3@
PROJECT CODE : ANRVAW0000
1 1
DA60000VV00 LA-9104P M/B
DA40001FO00 LS-9101P POWER BUTTON/B
PCB NO : LA-9104P (Thames XT )
PCB VAW00 LA-9104P LS-9101P/9102P/9103P
DAZ0SZ00200
PCB VAW00 LA-9104P LS-9101P/9102P/9103P GOLD A31 !
DAZ0SZ00201
ZZZ
HANNR3@
PCB VAW00 LA-9104P LS-9101P/9102P/9103P TRIPOD A31 !
DAZ0SZ00202
ZZZ
ZDTR3@
DA40001FP00 LS-9102P USB/B
DA40001FQ00 LS-9103P TP BUTTON/B
PCB VAW00 LA-9104P LS-9101P/9102P/9103P HANNSTARB A31 !
DAZ0SZ00203
PCB VAW00 LA-9104P LS-9101P/9102P/9103P ZDT A31 !
DAZ0SZ00204
Dell / Compal Confidential
2 2
Ivy Bridge(BGA) + Panther Point
OAK 15" UMA/DIS AMD Thames XT
Schematic Document
Intel Chief River
2012-08-22
3 3
46@ : for 46 level
@ : Nopop Component
CONN@ : Connector Component
R1@ : R1 P/N
R3@ : R3 P/N
KB9012@ : ENE KB9012 Implemented
UMA@ : Only for UMA
EMC@ : EMI/ESD parts
Rev: 1.0
i3R1@ : CPU i3-3217 1.8G
i3VOSR1@ : CPU i3-2365 1.4G
i5R1@ : CPU i5-3317 1.7G
i7R1@ : CPU i7-3517 1.9G
CELR1@ : CPU Celeron 887 1.5G
PENR1@ : CPU Pentium 997 1.6G
DIS@ : Only for Discrete
TH@/THR1@ : Thames-XT
MS@/MSR1@ : Mars Pro
X76@ :
SPI-ROM & VRAM Group
GCLK@ : Green CLK implemented
GCLKUMA@ : Green CLK for UMA
GCLKDIS@ : Green CLK for DIS
XTAL@ : X'tal implemented
XTALDIS@ : X'tal with DIS implemented
A
B
C
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Title
Title
Title
Cover Page
Cover Page
Cover Page
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-9104P
LA-9104P
LA-9104P
Date: Sheet of
Date: Sheet of
Date: Sheet of
E
1 57Wednesday, August 29, 2012
1 57Wednesday, August 29, 2012
1 57Wednesday, August 29, 2012
1.0
1.0
1.0
4
Page 2
A
64M*16
V
RAM * 4
DDR3
1 1
64M*16
RAM * 4
V
DDR3
128M*16
RAM * 4
V
DDR3
P.31
P.31
4bit
6
P.30
AMD
Thames-XT
24-26 W
A
MD Thames XT, 128b,
B
128M*16
VRAM * 4
DDR3
64bit
P.24~29
P.30
PEG 2.0 x8
Intel
vy Bridge
I
Processor
17W DC
BGA 1023
C
emory Bus (DDR3)
M
1.5V DDR3 1333 MHz
P.5~10
Dual Channel
D
Fan Control
DDRIII-DIMM X2
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
P.40
C
Conn.
8GB Max
E
PU XDP
P.6
P.11~12
Radeon HD7670M,
P5500
1GB DDR3 (8-64Mx16),
2
GB DDR3 (8-128Mx16)
100MHz 100M
2.7GT/s
DMI x4FDI x8
5GB/s
Hz
SATA3.0
LVDS Conn.
LVDS
P.21
HDMI
2 2
HDMI Conn.
P.22
I
ntel
Port 0
Port 2
SATA HDD Conn.
SATA ODD Conn.
P.35
P.35
Panther Point
PCH HM76
USB 3.0
USB2.0
PCI-E x1
Port 2
M
ini Card
WLAN/BT4.0
Half
3 3
P.38
E
R
thernet
TL8105E
RJ45
Port 1
P.32
P.32
BGA 989 Balls
HD Audio
13~20
P
RTC CKT.
Power On/Off CKT.
DC/DC Interface CKT.
P.44
P.40
P.41
SPI ROM
4MB
SPI ROM
MB
2
P.13
P.13
SPI
S
LPC Bus
PI
33MHz
ENE KBC
KB9012
P.39
Port 1,2
Port 0,1
Port 2,3
Port 11
Port 8
Port 10
Port 9
USB 3.0 Conn. 1
USB 3.0 Conn. 2
USB 3.0 Conn. 3
USB 2.0 Conn. 4
Digital Camera
(With Digital MIC)
Mini Card
W
LAN (Half)
Card Reader
R
TS5179
Touch Screen
Digital Mic.
A
udio Codec
ALC3221
P.33
P.36
P
.37
Daughter board
P.21
P.38
3 in 1 Socket
P.34
P.21
P.34
Headphone Jack / Mic. Jack combo
Int. Speaker R / L
P
P.33
.33
4 4
PS/2
Int.KBD
A
B
P.40
Touch Pad
P.40
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
C
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Block diagram
Block diagram
Block diagram
LA-9104P
LA-9104P
LA-9104P
E
2 57Wednesday, August 29, 2012
2 57Wednesday, August 29, 2012
2 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 3
A
B
C
D
E
Compal Confidential
Project Code : VAW00
File Name : LA-9104P
1 1
LS-9101P (PWR/B)
Lid
UE5
(SA00003VQ00)
SW1
(SN100004Y00)
4 pin-Hot Bar
PBATT
Battery
PWR-BTN FFC
2 2
3 3
TP-MB FFC
6 pin
JHDMI
JLAN
JUSB1
JUSB2
JUSB3
JHP
4 pin
HDMI
RJ-45
USB
USB
USB
HP
JTOUCH
6 pin
JPWR
4 pin
JFAN
3 pin
RTC JRTC
2 pin
Led1
Led3
Led2
XDP
JXDP
Led4
JTP
6 pin
JMINI
MINI Card
PJPDC
5 pin
LA-9104P M/B
(OAK 15")
JSPK
4 pin
Top Side
Bottom Side
JLVDS
40 pin
JREAD
Card
Reader
JKB
30 pin
JDB
8 pin
JODD
JHDD
USB-DB FFC
8 pin
LS-9102P (USB/B)
USB
8 pin
Hot Bar
JUSB4
TP-Module
4 4
TP-BTN FFC
4 pin
A
4 pin
Hot Bar
SW2 S
B
LS-9103P (TP-BTN/B)
W3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Compal Electronics, Inc.
DB block diagram
DB block diagram
DB block diagram
LA-9104P
LA-9104P
LA-9104P
E
3 57Wednesday, August 29, 2012
3 57Wednesday, August 29, 2012
3 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 4
Board ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
0
1
2
3
4
5
6
7
SMBUS Control Table
100K +/- 5%Ra
Rb V min
0 0 V
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
SOURCE
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
PCH_SML0CLK PCH
PCH_SML0DATA
PCH_SML1CL K
PCH_SML1DA TA
MEM_SMBCLK
MEM_SMBDAT A
KB9012
KB9012
PCH
PCH
AD_BID
0.168 V
0.375 V 0.503 V
.634 V
0
0.958 V
1.372 V
1.851 V 2.200 V
2.433 V
MINI1 BATT SODIMM
MINI2
V typ
AD_BID
V
0 V 0.155 V
0.250 V
0.819 V
1.185 V
1.650 V
3.300 V
Express
Card
V
VV V
V
AD_BID
0.362 V
0.621 V
0.945 V
1.359 V
1.838 V
2.420 V
3.300 V
max
Thermal
Sensor
EC AD3
0x00-0x0C
0x0D-0x1C
0x1D-0x30
0x31-0x49
0x4A-0x69
0x6A-0x8E
0x8F-0xBB
0xBC-0xFF
VGA Thermal
FFS VGA
Sensor
V
V
V
A
BOARD ID Table
ID
PCB Revision
0
0.1
1
2
3
4
5
6
7
XDP
0.1
0.2
0.2
0.3
0.3
1.0
1.0
UMA THM
Charger
V
V
Project ID Table
ID
0
0.1
0.2
0.3
1.0
MARS
1
2
3
4
5
6
7
Link
Project Revision
UMA
DIS THAMES
DIS MARS PRO
PCH
USB PORT#
0
1
2
3
4
5
6
7
8
9
10
11
DESTINATION
USB conn.2
USB conn.1
USB conn.3
USB conn.4 (DB)
NC
NC
NC
NC
MINI CARD (WLAN)
Touch Screen
Card Reader
Camera
1 1
CLKOUT_PCIE0
CLKOUT_PCIE1
CLKOUT_PCIE2
CLK
CLKOUT_PCIE3
CLKOUT_PCIE4
CLKOUT_PCIE5
CLKOUT_PCIE6
DESTINATIONDIFFERENTIAL
10/100 LAN
MINI CARD WLAN
None
None
None
None
None
CLKOUT_PCIE7 None
CLKOUT_PEG_B
None
FLEX CLOCKS DESTINATION
CLKOUTFLEX0
CLKOUTFLEX1
CLKOUTFLEX2
CLKOUTFLEX3
CLKOUT
PCI0
PCI1
PCI2
PCI3
None
None
None
None
DESTINATION
PCH_LOOPBACK
EC LPC
None
None
SATA
SATA0
SATA1
SATA2
SATA3
SATA4
SATA5
DESTINATION
HDD
None
ODD
None
None
None None
Symbol Note :
PCI4
: means Digital Ground
: means Analog Ground
None
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
12
13
PCI EXPRESS
Lane 1
Lane 2
Lane 3
Lane 4
Lane 5
Lane 6
Lane 7
Lane 8 None
NC
NC
DESTINATION
10/100 LAN
MINI CARD (WLAN)
None
None
None
None
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Notes List
Notes List
Notes List
LA-9104P
LA-9104P
LA-9104P
4 57Wednesday, August 29, 2012
4 57Wednesday, August 29, 2012
4 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 5
5
(1)PEG_RCOMPO (G4) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC1.
D D
(2)PEG_ICOMPO use 12mil connect to RC1
PEG_RCOMPO (G4)
PEG_ICOMPI (G3)
Trace length
M
ax is 500 mils
DMI_CRX_PTX_N0<15>
DMI_CRX_PTX_N1<15>
DMI_CRX_PTX_N2<15>
DMI_CRX_PTX_N3<15>
DMI_CRX_PTX_P0<15>
DMI_CRX_PTX_P1<15>
DMI_CRX_PTX_P2<15>
DMI_CRX_PTX_P3<15>
DMI_CTX_PRX_N0<15>
DMI_CTX_PRX_N1<15>
C C
B B
eDP_COMPIO and ICOMPO signals should be shor ted near
balls and route d with typical impedance <25 mohms
DMI_CTX_PRX_N2<15>
DMI_CTX_PRX_N3<15>
DMI_CTX_PRX_P0<15>
DMI_CTX_PRX_P1<15>
DMI_CTX_PRX_P2<15>
DMI_CTX_PRX_P3<15>
FDI_CTX_PRX_N0<15>
FDI_CTX_PRX_N1<15>
FDI_CTX_PRX_N2<15>
FDI_CTX_PRX_N3<15>
FDI_CTX_PRX_N4<15>
FDI_CTX_PRX_N5<15>
FDI_CTX_PRX_N6<15>
FDI_CTX_PRX_N7<15>
FDI_CTX_PRX_P0<15>
FDI_CTX_PRX_P1<15>
FDI_CTX_PRX_P2<15>
FDI_CTX_PRX_P3<15>
FDI_CTX_PRX_P4<15>
FDI_CTX_PRX_P5<15>
FDI_CTX_PRX_P6<15>
FDI_CTX_PRX_P7<15>
FDI_FSYNC0<15>
FDI_FSYNC1<15>
FDI_INT<15>
FDI_LSYNC0<15>
FDI_LSYNC1<15>
+VCCP
RC36 24.9_0402_1%
RC158 10K_0402_5%
1 2
@
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
+EDP_COM
12
PEG_ICOMPO (G1)
UC1A
i5R1@
M2
DMI_RX#[0]
P6
DMI_RX#[1]
P1
DMI_RX#[2]
P10
DMI_RX#[3]
N3
DMI_RX[0]
P7
DMI_RX[1]
P3
DMI_RX[2]
P11
DMI_RX[3]
K1
DMI_TX#[0]
M8
DMI_TX#[1]
N4
DMI_TX#[2]
R2
DMI_TX#[3]
K3
DMI_TX[0]
M7
DMI_TX[1]
P4
DMI_TX[2]
T3
DMI_TX[3]
U7
FDI0_TX#[0]
W11
FDI0_TX#[1]
W1
FDI0_TX#[2]
AA6
FDI0_TX#[3]
W6
FDI1_TX#[0]
V4
FDI1_TX#[1]
Y2
FDI1_TX#[2]
AC9
FDI1_TX#[3]
U6
FDI0_TX[0]
W10
FDI0_TX[1]
W3
FDI0_TX[2]
AA7
FDI0_TX[3]
W7
FDI1_TX[0]
T4
FDI1_TX[1]
AA3
FDI1_TX[2]
AC8
FDI1_TX[3]
AA11
FDI0_FSYNC
AC12
FDI1_FSYNC
U11
FDI_INT
AA10
FDI0_LSYNC
AG8
FDI1_LSYNC
AF3
eDP_COMPIO
AD2
eDP_ICOMPO
AG11
eDP_HPD#
AG4
eDP_AUX#
AF4
eDP_AUX
AC3
eDP_TX#[0]
AC4
eDP_TX#[1]
AE11
eDP_TX#[2]
AE7
eDP_TX#[3]
AC1
eDP_TX[0]
AA4
eDP_TX[1]
AE10
eDP_TX[2]
AE6
eDP_TX[3]
AV8063801058002-SR0N8-L1-1.7G_BGA1023~D
4
R_COMP place close to CPU
width 4 mils
width 12 mils
SA00005K63L
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
DMI Intel(R) FDI
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PCI EXPRESS -- GRAPHICS
eDP
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
R
_COMP
G3
G1
G4
H22
J21
B22
D21
A19
D17
B14
D13
A11
B10
G8
A8
B6
H8
E5
K7
K22
K19
C21
D19
C19
D16
C13
D12
C11
C9
F8
C8
C5
H6
F6
K6
G22
C23
D23
F21
H19
C17
K15
F17
F14
A15
J14
H13
M10
F10
D9
J4
F22
A23
D24
E21
G19
B18
K17
G17
E14
C15
K13
G13
K10
G10
D8
K4
VCC_IO
PEG_COMP
PEG_GTX_C_HRX_N7
PEG_GTX_C_HRX_N6
PEG_GTX_C_HRX_N5
PEG_GTX_C_HRX_N4
PEG_GTX_C_HRX_N3
PEG_GTX_C_HRX_N2
PEG_GTX_C_HRX_N1
PEG_GTX_C_HRX_N0
PEG_GTX_C_HRX_P7
PEG_GTX_C_HRX_P6
PEG_GTX_C_HRX_P5
PEG_GTX_C_HRX_P4
PEG_GTX_C_HRX_P3
PEG_GTX_C_HRX_P2
PEG_GTX_C_HRX_P1
PEG_GTX_C_HRX_P0
PEG_HTX_GRX_N7
PEG_HTX_GRX_N6
PEG_HTX_GRX_N5
PEG_HTX_GRX_N4
PEG_HTX_GRX_N3
PEG_HTX_GRX_N2
PEG_HTX_GRX_N1
PEG_HTX_GRX_N0
PEG_HTX_GRX_P7
PEG_HTX_GRX_P6
PEG_HTX_GRX_P5
PEG_HTX_GRX_P4
PEG_HTX_GRX_P3
PEG_HTX_GRX_P2
PEG_HTX_GRX_P1
PEG_HTX_GRX_P0
+VCCP
12
RC2
24.9_0402_1%
1 2
CC9 220nF_0402_16V7KDIS@
1 2
CC10 220nF_0402_16V7KDIS@
1 2
CC11 220nF_0402_16V7KDIS@
1 2
CC12 220nF_0402_16V7KDIS@
1 2
CC13 220nF_0402_16V7KDIS@
1 2
CC14 220nF_0402_16V7KDIS@
1 2
CC15 220nF_0402_16V7KDIS@
1 2
CC16 220nF_0402_16V7KDIS@
1 2
CC25 220nF_0402_16V7KDIS@
1 2
CC26 220nF_0402_16V7KDIS@
1 2
CC27 220nF_0402_16V7KDIS@
1 2
CC28 220nF_0402_16V7KDIS@
1 2
CC29 220nF_0402_16V7KDIS@
1 2
CC30 220nF_0402_16V7KDIS@
1 2
CC31 220nF_0402_16V7KDIS@
1 2
CC32 220nF_0402_16V7KDIS@
3
UC1
i3R1@
SA00005L52L
AV8063801058401-SR0N9-L1-1.8G_BGA1023~D
UC1
i5R3@
UC1
i3R3@
SA00005L53L
AV8063801058401-SR0N9-L1-1.8G_BGA1023~D
SA00005K62L
AV8063801058002-SR0N8-L1-1.7G_BGA1023~D
UC1
CELR1@
S
A00006021L
AV8062701085401-SR0VA-Q0-1.5G_BGA1023~D
UC1
PENR1@
SA00005ZZ1L
AV8062701084801-SR0V5-Q0-1.6G_BGA1023~D
PEG_ICOMPI and RCOMPO signals should be shor ted and routed
with - max leng th = 500 mils - typical imped ance = 43 mohms
PEG_ICOMPO sign als should be routed with - m ax length = 500 mils
- typical imped ance = 14.5 mo hms
PEG_GTX_C_HRX_N7 <24>
PEG_GTX_C_HRX_N6 <24>
PEG_GTX_C_HRX_N5 <24>
PEG_GTX_C_HRX_N4 <24>
PEG_GTX_C_HRX_N3 <24>
PEG_GTX_C_HRX_N2 <24>
PEG_GTX_C_HRX_N1 <24>
PEG_GTX_C_HRX_N0 <24>
PEG_GTX_C_HRX_P7 <24>
PEG_GTX_C_HRX_P6 <24>
PEG_GTX_C_HRX_P5 <24>
PEG_GTX_C_HRX_P4 <24>
PEG_GTX_C_HRX_P3 <24>
PEG_GTX_C_HRX_P2 <24>
PEG_GTX_C_HRX_P1 <24>
PEG_GTX_C_HRX_P0 <24>
PEG_HTX_C_GRX_N7 <24>
PEG_HTX_C_GRX_N6 <24>
PEG_HTX_C_GRX_N5 <24>
PEG_HTX_C_GRX_N4 <24>
PEG_HTX_C_GRX_N3 <24>
PEG_HTX_C_GRX_N2 <24>
PEG_HTX_C_GRX_N1 <24>
PEG_HTX_C_GRX_N0 <24>
PEG_HTX_C_GRX_P7 <24>
PEG_HTX_C_GRX_P6 <24>
PEG_HTX_C_GRX_P5 <24>
PEG_HTX_C_GRX_P4 <24>
PEG_HTX_C_GRX_P3 <24>
PEG_HTX_C_GRX_P2 <24>
PEG_HTX_C_GRX_P1 <24>
PEG_HTX_C_GRX_P0 <24>
UC1
CELR3@
SA00006022L
AV8062701085401-SR0VA-Q0-1.5G_BGA1023~D
UC1
PENR3@
SA00005ZZ2L
AV8062701084801-SR0V5-Q0-1.6G_BGA1023~D
2
UC1
i3VOSR1@
AV8062701313000-SR0U3-J1-1.4G_BGA1023~D
UC1
i7R1@
AV8063801057605-SR0N6-L1-1.9G_BGA1023~D
UC1I
i5R1@
BG17
VSS[181]
BG21
VSS[182]
BG24
VSS[183]
BG28
VSS[184]
BG37
VSS[185]
BG41
VSS[186]
BG45
VSS[187]
BG49
VSS[188]
BG53
VSS[189]
BG9
VSS[190]
C29
VSS[191]
C35
VSS[192]
C40
VSS[193]
D10
VSS[194]
D14
VSS[195]
D18
VSS[196]
D22
VSS[197]
D26
VSS[198]
D29
VSS[199]
D35
VSS[200]
D4
VSS[201]
D40
VSS[202]
D43
VSS[203]
D46
D50
D54
D58
D6
E25
E29
E3
E35
E40
F13
F15
F19
F29
F35
F40
F55
G51
G6
G61
H10
H14
H17
H21
H4
H53
H58
J1
J49
J55
K11
K21
K51
K8
L16
L20
L22
L26
L30
L34
L38
L43
L48
L61
M11
M15
AV8063801058002-SR0N8-L1-1.7G_BGA1023~D
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS
SA00005UH1L
SA00005K53L
VSS_NCTF_10
VSS_NCTF_11
NCTF
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
1
UC1
i3VOSR3@
AV8062701313000-SR0U3-J1-1.4G_BGA1023~D
UC1
i7R3@
AV8063801057605-SR0N6-L1-1.9G_BGA1023~D
M4
M58
M6
N1
N17
N21
N25
N28
N33
N36
N40
N43
N47
N48
N51
N52
N56
N61
P14
P16
P18
P21
P58
P59
P9
R17
R20
R4
R46
T1
T47
T50
T51
T52
T53
T55
T56
U13
U8
V20
V61
W13
W15
W18
W21
W46
W8
Y4
Y47
Y58
Y59
G48
A5
A57
BC61
BD3
BD59
BE4
BE58
BG5
BG57
C3
C58
D59
E1
E61
@
RC20
1 2
1K_0402_5%
SA00005UH2L
SA00005K52L
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(1/6) DMI,FDI,PEG
PROCESSOR(1/6) DMI,FDI,PEG
PROCESSOR(1/6) DMI,FDI,PEG
LA-9104P
LA-9104P
LA-9104P
1
5 57Wednesday, August 29, 2012
5 57Wednesday, August 29, 2012
5 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 6
5
4
3
2
1
+3VALW
12
D D
CFG10<8>
CFG11<8>
H_CPUPWRGD H_CPUPWRGD_XDP
CFG0<8>
VGATE<15,52>
PCH_JTAG_TCK<13>
The resistor
for HOOK2 shoul d be
placed such tha t the
stub is very sm all
C C
B B
Place on BOTTOM(-4059,5169) area.
VDDPWRGOOD_R
Place close to CPU
A A
on CFG0 net
+VCCP
RC127 56_0402_1%
RC128 49.9_0402_1%~D
RC44 62_0402_5%~D
PROC_DETECT (Processor Detect): pulled to
ground on the processor package. There is no
connection to the processor silicon for this
signal. System board designers may use this
signal to determine if the processor is present
H_PECI
0.1U_0402_10V7K~D
0.1U_0402_25V6K
CC142
1
CC151
@
2
1
@
2
@
RC49
1K_0402_5%
SYS_PWROK_XDP
1 2
1 2
1 2
1 2
PCH_SMBDATA<11,12,14,38>
PCH_SMBCLK<11,12,14,38>
@
1 2
@
1 2
1 2
1 2
0_0402_5% @
H_THERMTRIP#
H_CATERR#
H_PROCHOT#
H_PROCHOT#<40,46>
place RC57 near CPU 300mils ~1530mils
H_THERMTRIP#<17>
place RC129 nea r CPU 250mils ~2530 mils
H_CPUPWRGD<17>
1
CC141
0.1U_0402_25V6K
@
2
ESD request to reserve CC141
12
RC130_0402_5% @
12
RC150_0402_5% @
RC221K_0402_5% @
RC310_0402_5% @
RC381K_0402_5% @
RC340_0402_5% @
RC30
H_SNB_IVB#<17>
RC124 10K_0402_5%@
H_PECI<17,40>
RC57 56_0402_1%
RC130 0_0402_1%
H_PM_SYNC<15>
+VCCP +VCCP
JXDP
1
GND0
XDP_PREQ#_R
XDP_PRDY#_R
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
CFG10_R
CFG11_R
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7
CFD_PWRBTN#_XDP
SYS_PWROK_XDP
XDP_TCK1
XDP_TCK_R
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/HOOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH-030-01-L-D-A
CONN@
SP02000L900
UC1B
F49
PROC_SELECT #
12
H_CATERR#
VR1 TOPOLOGY
1 2
H_PROCHOT#_R
1 2
H_THERMTRIP#_R
@
H_PM_SYNC
1 2
VCCPWRGOOD_0_R
RC25 1K_0402_5%
RC64
1 2
130_0402_1%
BUF_CPU_RST#
VDDPWRGOOD_RVDDPWRGOOD
C57
PROC_DETEC T#
C49
CATERR#
A48
PECI
C45
PROCHOT#
D45
THERMTRIP#
C48
PM_SYNC
B46
UNCOREPW RGOOD
BE45
SM_DRAMPWR OK
D44
RESET#
AV8063801058002-SR0N8-L1-1.7G_BGA1023~D
OBSFN_C0
OBSFN_C1
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSFN_D0
OBSFN_D1
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TRST#
GND17
i5R1@
2
GND1
4
6
8
GND3
10
12
14
GND5
16
18
20
GND7
22
24
26
GND9
28
30
32
34
36
38
40
CLK_CPU_ITP
42
CLK_CPU_ITP#
44
46
XDP_RST#_RXDP_HOOK2
48
XDP_DBRESET#
50
52
TD0
TDI
TMS
XDP_TDO
54
XDP_TRST#_R
56
XDP_TDI
58
XDP_TMS_R
60
MISC THERMAL PWR MANAGEMENT
CLOCKS
DDR3
JTAG & BPM
RC33 0_0402_5%@
RC37 0_0402_5%@
RC39 0_0402_5%@
DPLL_REF_CL K
DPLL_REF_CL K#
SM_DRAMRST#
MISC
+VCCP
0.1U_0402_16V7K
1
2
Place near JXDP1
1 2
@
RC55 1K_0402_5%
1 2
1 2
1 2
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PRDY#
PREQ#
TCK
TMS
TRST#
TDI
TDO
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
0.1U_0402_16V7K
1
CC35
CC36
2
CLK_CPU_ITP <14>
CLK_CPU_ITP# <14>PBTN_OUT#<15,40>
PLT_RST#
PCH_JTAG_TDO <13>
PCH_JTAG_TDI <13>
PCH_JTAG_TMS <13>
J3
H2
AG3
CLK_CPU_DPLL_R
AG1
CLK_CPU_DPLL#_R
Remove DPLL Ref clock (for eDP only)
N59
N58
AT30
H_DRAMRST#
BF44
SM_RCOMP0
BE43
SM_RCOMP1
BG43
SM_RCOMP2
CLK_CPU_DMI <14>
CLK_CPU_DMI# <14>
1 2
RC65 1K_0402_1%
1 2
RC77 1K_0402_1%
H_DRAMRST# <7>
1 2
RC86140_0402_1%
1 2
RC8325.5_0402_1%
1 2
RC85200_0402_1%
DDR3 Compensation Signals
N53
N55
L56
L55
J58
M60
L59
K58
XDP_DBRESET#_R
G58
E55
E59
G55
G59
H60
J59
J61
XDP_PRDY#
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO_R
XDP_BPM#0_R
XDP_BPM#1_R
XDP_BPM#2_R
XDP_BPM#3_R
XDP_BPM#4_R
XDP_BPM#5_R
XDP_BPM#6_R
XDP_BPM#7_R
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7
1 2
RC125 0_0402_5%@
1 2
RC135 0_0402_5%@
1 2
RC136 0_0402_5%@
1 2
RC137 0_0402_5%@
1 2
RC126 0_0402_5%@
1 2
RC50 0_0402_5%@
1 2
RC92 0_0402_5%@
1 2
RC89 0_0402_5%
1 2
RC95 0_0402_5%@
1 2
RC91 0_0402_5%@
1 2
RC101 0_0402_5%@
1 2
RC102 0_0402_5%@
1 2
RC103 0_0402_5%@
1 2
RC97 0_0402_5%@
1 2
RC88 0_0402_5%@
1 2
RC87 0_0402_5%@
1 2
RC90 0_0402_5%@
1 2
RC96 0_0402_5%@
1 2
RC93 0_0402_5%@
1 2
RC94 0_0402_5%@
PM_DRAM_PWRGD<15>
+3V_PCH
XDP_PRDY#_R
XDP_PREQ#_R
XDP_TCK_R
XDP_TMS_R
XDP_TRST#_R
XDP_TDI
XDP_TDO
XDP_DBRESET#
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7
CFG12 <8>
CFG13 <8>
CFG14 <8>
CFG15 <8>
PCH_PWROK<15,40>
SYS_PWROK<15>
RC5
1 2
200_0402_1%
+VCCP
H_DRAMRST#
1
@
CC143
0.1U_0402_25V6K
2
Place close to CPU
RC132
0_0402_1%
@
1 2
1 2
RC11 0_0402_1%
RUN_ON_CPU1.5VS3#<10,35>
PLT_RST#<16,32,38,40>
XDP_DBRESET# <15>
+3VS
RC129
@
1 2
0_0402_5%
D_PWG
@
XDP_DBRESET#_R
0.1U_0402_25V6K
Place close to CPU
12
@
RC6
10K_0402_5%
UC2
1
B
2
A
GND3Y
74AHC1G09GW TSSOP 5P
RUN_ON_CPU1.5VS3#
CC144
+3V_PCH
0.1U_0402_16V7K
+1.5V_CPU_VDDQ
CC33
1
12
2
5
VCC
4
RC28
@
39_0402_1%
1 2
13
D
2
QC1
G
+3VALW
UC3
1
5
NC
VCC
2
A
4
GND3Y
SN74LVC1G07DCKR_SC70-5~D
@
2N7002K_SOT23-3
S
0.1U_0402_16V7K
1
CC34
2
BUFO_CPU_RST# BUF_CPU_RST#
PU/PD for JTAG signals
XDP_TMS_R
XDP_TDI_R
XDP_PREQ#
XDP_TDO
XDP_TCK_R
XDP_TRST#_R
XDP_DBRESET#_R
1
VCCPWRGOOD_0_R
2
Avoid stub in t he PWRGD path
while placing r esistors RC25 & RC130
RC8
200_0402_1%
VDDPWRGOOD
RC8
CRB 1.1K
CHECK LIST 0.7 --> 4.75K
INTEL recommand 1.1K
PDG 0.71 rev -- >200
+VCCP
12
RC59
75_0402_5%
RC58
1 2
43_0402_1%
0.1U_0402_16V7K
1
@
2
1 2
RC4751_0402_5%
1 2
RC4651_0402_5%
1 2
RC4851_0402_5% @
1 2
RC10651_0402_5%
1 2
RC10551_0402_5%
1 2
RC10451_0402_5%
+3VS
RC42
1 2
1K_0402_5%
1 2
RC4510K_0402_5%
CC63
+VCCP
12
@
RC62
0_0402_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(2/6) PM,XDP,CLK
PROCESSOR(2/6) PM,XDP,CLK
PROCESSOR(2/6) PM,XDP,CLK
LA-9104P
LA-9104P
LA-9104P
1
6 57Wednesday, August 29, 2012
6 57Wednesday, August 29, 2012
6 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 7
5
UC1C
AP11
AJ10
AR11
AT13
AU13
BA13
BB11
AY13
AV14
AR14
AY17
AR19
BA14
AU14
BB14
BB17
BA45
AR43
AW48
BC48
BC45
AR45
AT48
AY48
BA49
AV49
BB51
AY53
BB49
AU49
BA53
BB55
BA55
AV56
AP50
AP53
AV54
AT54
AP56
AP52
AN57
AN53
AG56
AG53
AN55
AN52
AG55
AK56
BD37
BF36
BA28
BE39
BD39
AT41
i5R1@
AG6
SA_DQ[0]
AJ6
SA_DQ[1]
SA_DQ[2]
AL6
SA_DQ[3]
SA_DQ[4]
AJ8
SA_DQ[5]
AL8
SA_DQ[6]
AL7
SA_DQ[7]
SA_DQ[8]
AP6
SA_DQ[9]
AU6
SA_DQ[10]
AV9
SA_DQ[11]
AR6
SA_DQ[12]
AP8
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
BC7
SA_DQ[16]
BB7
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
BA7
SA_DQ[20]
BA9
SA_DQ[21]
BB9
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR_A_D[0..63]<11>
D D
C C
DDR_A_BS0<11>
DDR_A_BS1<11>
DDR_A_BS2<11>
B B
DDR_A_CAS#<11>
DDR_A_RAS#<11>
DDR_A_WE#<11>
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
4
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AU36
AV36
AY26
AT40
AU40
BB26
BB40
BC41
AY40
BA41
AL11
AR8
AV11
AT17
AV45
AY51
AT55
AK55
AJ11
AR10
AY11
AU17
AW45
AV51
AT56
AK54
BG35
BB34
BE35
BD35
AT34
AU34
BB32
AT32
AY32
AV32
BE37
BA30
BC30
AW41
AY28
AU26
M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
M_ODT0
M_ODT1
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
M_CLK_DDR0 <11>
M_CLK_DDR#0 <11>
DDR_CKE0_DIMMA <11>
M_CLK_DDR1 <11>
M_CLK_DDR#1 <11>
DDR_CKE1_DIMMA <11>
DDR_CS0_DIMMA# <11>
DDR_CS1_DIMMA# <11>
M_ODT0 <11>
M_ODT1 <11>
DDR_A_DQS#[0..7] <11>
DDR_A_DQS[0..7] <11>
DDR_A_MA[0..15] <11>
3
BD13
BF12
BD10
BD14
BE13
BF16
BE17
BE18
BE21
BE14
BG14
BG18
BF19
BD50
BF48
BD53
BF52
BD49
BE49
BD54
BE53
BF56
BE57
BC59
AY60
BE54
BG54
BA58
AW59
AW58
AU58
AN61
AN59
AU59
AU61
AN58
AR58
AK58
AL58
AG58
AG59
AM60
AL59
AF61
AH60
BG39
BD42
AT22
AV43
BF40
BD45
UC1D
AL4
SB_DQ[0]
AL1
SB_DQ[1]
AN3
SB_DQ[2]
AR4
SB_DQ[3]
AK4
SB_DQ[4]
AK3
SB_DQ[5]
AN4
SB_DQ[6]
AR1
SB_DQ[7]
AU4
SB_DQ[8]
AT2
SB_DQ[9]
AV4
SB_DQ[10]
BA4
SB_DQ[11]
AU3
SB_DQ[12]
AR3
SB_DQ[13]
AY2
SB_DQ[14]
BA3
SB_DQ[15]
BE9
SB_DQ[16]
BD9
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
BF8
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
DDR_B_D[0..63]<12>
DDR_B_BS0<12>
DDR_B_BS1<12>
DDR_B_BS2<12>
DDR_B_CAS#<12>
DDR_B_RAS#<12>
DDR_B_WE#<12>
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
i5R1@
2
BA34
AY34
AR22
BA36
BB36
BF27
BE41
BE47
AT43
BG47
AL3
AV3
BG11
BD17
BG51
BA59
AT60
AK59
AM2
AV1
BE11
BD18
BE51
BA61
AR59
AK61
M_CLK_DDR2
M_CLK_DDR#2
DDR_CKE2_DIMMB
M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_ODT2
M_ODT3
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
SB_CS#[0]
SB_CS#[1]
SB_ODT[0]
SB_ODT[1]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
BF32
BE33
BD33
AU30
BD30
AV30
BG30
BD29
BE30
BE28
BD43
AT28
AV28
BD46
AT26
AU22
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
M_CLK_DDR2 <12>
M_CLK_DDR#2 <12>
DDR_CKE2_DIMMB <12>
M_CLK_DDR3 <12>
M_CLK_DDR#3 <12>
DDR_CKE3_DIMMB <12>
DDR_CS2_DIMMB# <12>
DDR_CS3_DIMMB# <12>
M_ODT2 <12>
M_ODT3 <12>
DDR_B_DQS#[0..7] <12>
DDR_B_DQS[0..7] <12>
DDR_B_MA[0..15] <12>
1
AV8063801058002-SR0N8-L1-1.7G_BGA1023~D
+1.5V
4
12
RC108
1K_0402_5%
1 2
RC110 1K_0402_5%
1 2
@
RC111 0_0402_1%
DDR3_DRAMRST# <11,12>
DRAMRST_CNTRL_PCH <14>
DRAMRST_CNTRL <11>
Place close to RC110
3
DDR3_DRAMRST#
1
@
CC145
0.1U_0402_25V6K
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
@
RC107 0_0402_5%
QC2
BSS138_SOT23
D
S
13
H_DRAMRST#<6>
A A
5
H_DRAMRST#
4.99K_0402_1%
RC109
12
G
2
1
CC37
.047U_0402_16V7K
2
DDR3_DRAMRST#_R
DRAMRST_CNTRL
AV8063801058002-SR0N8-L1-1.7G_BGA1023~D
Compal Secret Data
Compal Secret Data
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(3/6) DDRIII
PROCESSOR(3/6) DDRIII
PROCESSOR(3/6) DDRIII
LA-9104P
LA-9104P
LA-9104P
1
7 57Wednesday, August 29, 2012
7 57Wednesday, August 29, 2012
7 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 8
5
4
3
2
1
D D
UC1E
i5R1@
CFG0<6>
+VCC_CORE
CFG10<6>
CFG11<6>
1 2
1 2
@
RC123
50_0402_1%
CFG12<6>
CFG13<6>
CFG14<6>
CFG15<6>
VCC_VAL_SENSE
VSS_VAL_SENSE
1 2
RC21 1K_0402_5%
+VCC_GFXCORE_AXG
C C
@
RC120
50_0402_1%
B B
1 2
1 2
@
RC119
50_0402_1%
@
RC121
50_0402_1%
VCC_AXG_VAL_SENSE
VSS_AXG_VAL_SENSE
CFG0
T91PAD~D @
CFG2
T92PAD~D @
CFG4
CFG5
CFG6
CFG7
T66PAD~D @
T41PAD~D @
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
T69PAD~D @
T89PAD~D @
@
TP_VCC_DIESENSE
T46PAD~D @
T36PAD~D @
T32PAD~D @
T34PAD~D @
T35PAD~D @
T40PAD~D @
T42PAD~D @
T47PAD~D @ T132 PAD~D@
T71PAD~D @
T72PAD~D @
T51PAD~D @
T68PAD~D @
T49PAD~D @
B50
CFG[0]
C51
CFG[1]
B54
CFG[2]
D53
CFG[3]
A51
CFG[4]
C53
CFG[5]
C55
CFG[6]
H49
CFG[7]
A55
CFG[8]
H51
CFG[9]
K49
CFG[10]
K53
CFG[11]
F53
CFG[12]
G53
CFG[13]
L51
CFG[14]
F51
CFG[15]
D52
CFG[16]
L53
CFG[17]
H43
VCC_VAL_SENSE
K43
VSS_VAL_SENSE
H45
VAXG_VAL_SENSE
K45
VSSAXG_VAL_SENSE
F48
VCC_DIE_SENSE
H48
RSVD6
K48
RSVD7
BA19
RSVD8
AV19
RSVD9
AT21
RSVD10
BB21
RSVD11
BB19
RSVD12
AY21
RSVD13
BA22
RSVD14
AY22
RSVD15
AU19
RSVD16
AU21
RSVD17
BD21
RSVD18
BD22
RSVD19
BD25
RSVD20
BD26
RSVD21
BG22
RSVD22
BE22
RSVD23
BG26
RSVD24
BE26
RSVD25
BF23
RSVD26
BE24
RSVD27
AV8063801058002-SR0N8-L1-1.7G_BGA1023~D
RESERVED
DC_TEST_C 59
DC_TEST_C 61
DC_TEST_D 61
DC_TEST_B D61
DC_TEST_B E61
DC_TEST_B E59
DC_TEST_B G61
DC_TEST_B G59
DC_TEST_B G58
DC_TEST_B G4
DC_TEST_B G3
DC_TEST_B E3
DC_TEST_B G1
DC_TEST_B E1
DC_TEST_B D1
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
DC_TEST_A4
DC_TEST_C 4
DC_TEST_D 3
DC_TEST_D 1
DC_TEST_A58
DC_TEST_A59
DC_TEST_A61
BE7
+SA_DIMM_VREFDQ
BG7
+SB_DIMM_VREFDQ
N42
L42
L45
L47
M13
M14
U14
W14
P13
AT49
K24
AH2
AG13
AM14
AM15
N50
A4
TP_DC_TEST_A4
C4
D3
DC_TEST_C4_D3
D1
TP_DC_TEST_D1
A58
TP_DC_TEST_A58
A59
C59
DC_TEST_A59_C59
A61
C61
DC_TEST_A61_C61
D61
TP_DC_TEST_D61
BD61
TP_DC_TEST_BD61
BE61
BE59
DC_TEST_BE59_BE61
BG61
BG59
DC_TEST_BG59_BG61
BG58
TP_DC_TEST_BG58
BG4
TP_DC_TEST_BG4
BG3
BE3
DC_TEST_BE3_BG3
BG1
BE1
DC_TEST_BE1_BG1
BD1
TP_DC_TEST_BD1
T14 PAD~D@
T15 PAD~D@
T16 PAD~D@
T17 PAD~D@
T22 PAD~D@
T21 PAD~D@
T19 PAD~D@
T20 PAD~D@
T18 PAD~D@
T23 PAD~D@
T28 PAD~D@
T27 PAD~D@
T25 PAD~D@
T26 PAD~D@
T29 PAD~D@
+SA_DIMM_VREFDQ +SA_DIMM_VREFDQ
12
@
RC117
1K_0402_1%
T121 PAD~D@
T118 PAD~D@
T119 PAD~D@
T120 PAD~D@
T122 PAD~D@
T123 PAD~D@
T124 PAD~D@
1K_0402_1%
CFG Straps for Processor
CFG2
PEG Static Lane Reversal - CFG2 is for the 16x
1:(Default) Normal Operation; Lane #
CFG2
RC115
12
@
CFG[6:5]
definition matches socket pin map definition
0:Lane Reversed
*
CFG4
Display Port Presence Strap
1 : Disabled; No Physical Display Port
*
CFG4
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
CFG6
CFG5
RC114
1K_0402_1%
PCIE Port Bifurcation Straps
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2
*
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
12
12
12
RC116
1K_0402_1%
RC112
1K_0402_1%@
12
RC113
1K_0402_1%
@
CFG7
12
@
RC118
1K_0402_1%
PEG DEFER TRAINING
1: (Default) PEG Train immediately
*
CFG7
following xxRESETB de assertion
0: PEG Wait for BIOS for training
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Compal Electronics, Inc.
PROCESSOR(4/6) RSVD,CFG
PROCESSOR(4/6) RSVD,CFG
PROCESSOR(4/6) RSVD,CFG
LA-9104P
LA-9104P
LA-9104P
1
8 57Wednesday, August 29, 2012
8 57Wednesday, August 29, 2012
8 57Wednesday, August 29, 2012
of
1.0
1.0
1.0
Page 9
5
4
3
2
1
AF46
AG48
AG50
AG51
AJ17
AJ21
AJ25
AJ43
AJ47
AK50
AK51
AL14
AL15
AL16
AL20
AL22
AL26
AL45
AL48
AM16
AM17
AM21
AM43
AM47
AN20
AN42
AN45
AN48
AA14
AA15
AB17
AB20
AC13
AD16
AD18
AD21
AE14
AE15
AF16
AF18
AF20
AG15
AG16
AG17
AG20
AG21
AJ14
AJ15
W16
W17
BC22
AM25
AN22
A44
B43
C44
F43
G43
AN16
AN17
8.5A
+VCCP
+VCCP
1 2
RC140 0_0402_5%@
+VCCP
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
VCCSENSE_R
VSSSENSE_R
+3VS
RC141
10K_0402_5%@
1 2
VCCP_PWRCTRL
1U_0402_6.3V6K
CC573
1
2
RC147 close to CPU
12
RC147
130_0402_1%
1 2
RC142 43_0402_1%<BOM Structure>
1 2
RC146 0_0402_1%@
1 2
RC144 0_0402_1%@
CAD Note: Place the PU
resistors close to CPU
RC147 close to CPU 300~1500mi ls
1 2
RC139 0_0402_1%@
1 2
RC122 0_0402_1%@
12
RC98 10_0402_1%
1 2
RC133 10_0402_1%
Place RC98 close to CPU
VCCP_PWRCTRL Pull high on power side
+VCCP
Note: Place the PU resistors close to CPU
RC145 close to CPU 300~1500mi ls
12
RC145
75_0402_5%
VR_SVID_ALRT# <52>
VR_SVID_CLK <52>
VR_SVID_DAT <52>
+VCC_CORE
12
RC138
100_0402_1%
+VCCP
VCCIO_SENSE <49>
VSSIO_SENSE_R <49>
12
RC131
100_0402_1%
VCCSENSE <52>
VSSSENSE <52>
Iccmax current changed for PD DG Rev0.7
CPU Power Rail Table
Voltage Rail
VCC
VCCIO
VAXG
VCCPLL
VDDQ
VCCSA
+1.5V_MEM 1.5
Description
*
5A to Mem contr oller(+1.5V_CP U_VDDQ)
5-6A to 2 DIMMs /channel
2-5A to +1.5V_R UN & +0.75V_DD R_VTT
Voltage
0.65-1.3
0.0-1.1
0.65-0.9
1.05/1
1.8
1.5
S0 Iccmax
Current (A)
53
8.5
33
1.2
5
6
12-16
*
i5R1@
POWER
CORE SUPPLY
VCCIO[1]
VCCIO[3]
VCCIO[4]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCIO[9]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
PEG IO AND DDR IO
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO50
VCCIO51
VCCIO_SEL
VCCPQE[1]
VCCPQE[2]
RAILS
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES SVID QUIET
D D
ULV 17W , Max Current
in Turbo Mode or HFM
C C
B B
A A
+VCC_CORE
UC1F
33A
A26
VCC[1]
A29
VCC[2]
A31
VCC[3]
A34
VCC[4]
A35
VCC[5]
A38
VCC[6]
A39
VCC[7]
A42
VCC[8]
C26
VCC[9]
C27
VCC[10]
C32
VCC[11]
C34
VCC[12]
C37
VCC[13]
C39
VCC[14]
C42
VCC[15]
D27
VCC[16]
D32
VCC[17]
D34
VCC[18]
D37
VCC[19]
D39
VCC[20]
D42
VCC[21]
E26
VCC[22]
E28
VCC[23]
E32
VCC[24]
E34
VCC[25]
E37
VCC[26]
E38
VCC[27]
F25
VCC[28]
F26
VCC[29]
F28
VCC[30]
F32
VCC[31]
F34
VCC[32]
F37
VCC[33]
F38
VCC[34]
F42
VCC[35]
G42
VCC[36]
H25
VCC[37]
H26
VCC[38]
H28
VCC[39]
H29
VCC[40]
H32
VCC[41]
H34
VCC[42]
H35
VCC[43]
H37
VCC[44]
H38
VCC[45]
H40
VCC[46]
J25
VCC[47]
J26
VCC[48]
J28
VCC[49]
J29
VCC[50]
J32
VCC[51]
J34
VCC[52]
J35
VCC[53]
J37
VCC[54]
J38
VCC[55]
J40
VCC[56]
J42
VCC[57]
K26
VCC[58]
K27
VCC[59]
K29
VCC[60]
K32
VCC[61]
K34
VCC[62]
K35
VCC[63]
K37
VCC[64]
K39
VCC[66]
K42
VCC[67]
L25
VCC[68]
L28
VCC[69]
L33
VCC[70]
L36
VCC[71]
L40
VCC[72]
N26
VCC[73]
N30
VCC[74]
N34
VCC[75]
N38
VCC[76]
AV8063801058002-SR0N8-L1-1.7G_BGA1023~D
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Compal Electronics, Inc.
PROCESSOR(5/6) PWR,BYPASS
PROCESSOR(5/6) PWR,BYPASS
PROCESSOR(5/6) PWR,BYPASS
LA-9104P
LA-9104P
LA-9104P
1
of
9 57Wednesday, August 29, 2012
9 57Wednesday, August 29, 2012
9 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 10
5
4
3
2
1
+1.5V_CPU_VDDQ Source
+1.5V +1.5V_CPU_VDDQ
B+_BIAS+3VALW
QC7B
@
CC174
1U_0402_6.3V6K
CC261
1
2
12
RC151
470K_0402_5%
3
5
4
RUN_ON_CPU1.5VS3# <35,6>
+VCC_GFXCORE_AXG
12
1.2A
1U_0402_6.3V6K
1
CC175
2
1U_0402_6.3V6K
CC260
1
2
4
RUN_ON_CPU1.5VS3
33A
6A
12
RC143
100K_0402_5%
CC264
1
2
+1.8VS
330U_D2_2.5VM_R6M~D
1U_0402_6.3V6K
1U_0402_6.3V6K
CC263
1
2
2N7002DW-7-F_SOT363-6
RC76
100_0402_1%
1U_0402_6.3V6K
1
CC176
1
+
2
2
1U_0402_6.3V6K
CC262
1
2
D D
RC149
0_0402_5%
+VCCSA
CC172
1 2
@
1 2
@
RC148
0_0402_1%
VCC_AXG_SENSE<52>
VSS_AXG_SENSE<52>
330U_D2_2VM_R6M~D
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CC171
+
2
5
10U_0603_6.3V6M
1
1
CC170
CC169
2
2
SUSP#<35,40,48,49,50>
CPU1.5V_S3_GATE<40>
C C
B B
A A
61
2
1
@
CC40
0.1U_0402_10V7K~D
2
+VCC_GFXCORE_AXG
RC99
100_0402_1%
RC100
100_0402_1%
10U_0603_6.3V6M
1
1
CC183
CC168
2
2
RUN_ON_CPU1.5VS3#
QC7A
2N7002DW-7-F_SOT363-6
12
12
10U_0603_6.3V6M
1
2
QC3
AO4304L_SO8
8
7
6
5
4
0.1U_0603_50V_X7R
12
i5R1@
1
CC39
2
POWER
GRAPHICS
SENSE
LINES
RC150
2M_0402_5%~D
UC1G
AA46
VAXG[1]
AB47
VAXG[2]
AB50
VAXG[3]
AB51
VAXG[4]
AB52
VAXG[5]
AB53
VAXG[6]
AB55
VAXG[7]
AB56
VAXG[8]
AB58
VAXG[9]
AB59
VAXG[10]
AC61
VAXG[11]
AD47
VAXG[12]
AD48
VAXG[13]
AD50
VAXG[14]
AD51
VAXG[15]
AD52
VAXG[16]
AD53
VAXG[17]
AD55
VAXG[18]
AD56
VAXG[19]
AD58
VAXG[20]
AD59
VAXG[21]
AE46
VAXG[22]
N45
VAXG[23]
P47
VAXG[24]
P48
VAXG[25]
P50
VAXG[26]
P51
VAXG[27]
P52
VAXG[28]
P53
VAXG[29]
P55
VAXG[30]
P56
VAXG[31]
P61
VAXG[32]
T48
VAXG[33]
T58
VAXG[34]
T59
VAXG[35]
T61
VAXG[36]
U46
VAXG[37]
V47
VAXG[38]
V48
VAXG[39]
V50
VAXG[40]
V51
VAXG[41]
V52
VAXG[42]
V53
VAXG[43]
V55
VAXG[44]
V56
VAXG[45]
V58
VAXG[46]
V59
VAXG[47]
W50
VAXG[48]
W51
VAXG[49]
W52
VAXG[50]
W53
VAXG[51]
W55
VAXG[52]
W56
VAXG[53]
W61
VAXG[54]
Y48
VAXG[55]
Y61
VAXG[56]
F45
VAXG_SENSE
G45
VSSAXG_SENSE
BB3
VCCPLL[1]
BC1
VCCPLL[2]
BC4
VCCPLL[3]
L17
VCCSA[1]
L21
VCCSA[2]
N16
VCCSA[3]
N20
VCCSA[4]
N22
VCCSA[5]
P17
VCCSA[6]
P20
VCCSA[7]
R16
VCCSA[8]
R18
VCCSA[9]
R21
VCCSA[10]
U15
VCCSA[11]
V16
VCCSA[12]
V17
VCCSA[13]
V18
VCCSA[14]
V21
VCCSA[15]
W20
VCCSA[16]
AV8063801058002-SR0N8-L1-1.7G_BGA1023~D
1
2
12
3
1
CC38
2
RC152
10U_0805_10V6K
SM_VREF
VREF
VDDQ[10]
VDDQ[11]
VDDQ[12]
VDDQ[13]
VDDQ[14]
VDDQ[15]
VDDQ[16]
VDDQ[17]
VDDQ[18]
DDR3 - 1.5V RAILS
VDDQ[19]
VDDQ[20]
VDDQ[21]
VDDQ[22]
VDDQ[23]
VDDQ[24]
VDDQ[25]
VDDQ[26]
VCCDQ[1]
VCCDQ[2]
QUIET RAILS
1.8V RAIL
SA RAIL
VDDQ_SENSE
VSS_SENSE_VDDQ
VCCSA_SENSE
SENSE LINES
VCCSA_VID[0]
VCCSA_VID[1]
VCCSA VID
lines
20K_0402_5%
VDDQ[1]
VDDQ[2]
VDDQ[3]
VDDQ[4]
VDDQ[5]
VDDQ[6]
VDDQ[7]
VDDQ[8]
VDDQ[9]
AY43
AJ28
AJ33
AJ36
AJ40
AL30
AL34
AL38
AL42
AM33
AM36
AM40
AN30
AN34
AN38
AR26
AR28
AR30
AR32
AR34
AR36
AR40
AV41
AW26
BA40
BB28
BG33
AM28
AN26
BC43
BA43
U10
D48
D49
+V_SM_VREF_CNT
+V_SM_VREF should
have 10 mil trace width
5A
+1.5V_CPU_VDDQ
+1.5V_CPU_VDDQ
CC178 0.1U_0402_10V7K~D
CC179 0.1U_0402_10V7K~D
CC149 0.1U_0402_10V7K~D
CC150 0.1U_0402_10V7K~D
10U_0603_6.3V6M
1
1
CC181
2
2
1U_0402_6.3V6K
CC250
1
2
1U_0402_6.3V6K
1
CC574
2
3
+V_DDR_SMREF+1.5V
12
RC80
1K_0402_1%@
12
RC81
1K_0402_1%@
12
12
12
12
10U_0603_6.3V6M
10U_0603_6.3V6M
CC161
CC252
1
2
1
CC162
2
1U_0402_6.3V6K
CC253
1
2
VCCSA_VID0 <51>
VCCSA_VID1 <51>
10U_0603_6.3V6M
1
CC163
2
1U_0402_6.3V6K
1
2
10U_0603_6.3V6M
1
CC180
2
1U_0402_6.3V6K
CC251
1
2
VCCSA_SENSE <51>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
6A
+1.5V
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
CC164
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CC254
CC255
1
2
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
330U_D2_2VM_R6M~D
1
1
CC166
CC165
CC256
1
2
2
1U_0402_6.3V6K
CC257
1
2
CC167
+
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CC258
1
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
RC134 0_0402_5%@
NTR4503NT1G_SOT23-3~D
RUN_ON_CPU1.5VS3
1U_0402_6.3V6K
CC259
1
2
Deciphered Date
Deciphered Date
Deciphered Date
2
1 2
QC5
@
1
3
2
+1.5V_CPU_VDDQ
UC1H
A13
VSS[1]
A17
VSS[2]
A21
VSS[3]
A25
VSS[4]
A28
VSS[5]
A33
VSS[6]
A37
VSS[7]
A40
VSS[8]
A45
VSS[9]
A49
VSS[10]
A53
VSS[11]
A9
VSS[12]
AA1
VSS[13]
AA13
VSS[14]
AA50
VSS[15]
AA51
VSS[16]
AA52
VSS[17]
AA53
VSS[18]
AA55
VSS[19]
AA56
VSS[20]
AA8
VSS[21]
AB16
VSS[22]
AB18
VSS[23]
AB21
VSS[24]
AB48
VSS[25]
AB61
VSS[26]
AC10
VSS[27]
AC14
VSS[28]
AC46
VSS[29]
AC6
VSS[30]
AD17
VSS[31]
AD20
VSS[32]
AD4
VSS[33]
AD61
VSS[34]
AE13
VSS[35]
AE8
VSS[36]
AF1
VSS[37]
AF17
VSS[38]
AF21
VSS[39]
AF47
VSS[40]
AF48
VSS[41]
AF50
VSS[42]
AF51
VSS[43]
AF52
VSS[44]
AF53
VSS[45]
AF55
VSS[46]
AF56
VSS[47]
AF58
VSS[48]
AF59
VSS[49]
AG10
VSS[50]
AG14
VSS[51]
AG18
VSS[52]
AG47
VSS[53]
AG52
VSS[54]
AG61
VSS[55]
AG7
VSS[56]
AH4
VSS[57]
AH58
VSS[58]
AJ13
VSS[59]
AJ16
VSS[60]
AJ20
VSS[61]
AJ22
VSS[62]
AJ26
VSS[63]
AJ30
VSS[64]
AJ34
VSS[65]
AJ38
VSS[66]
AJ42
VSS[67]
AJ45
VSS[68]
AJ48
VSS[69]
AJ7
VSS[70]
AK1
VSS[71]
AK52
VSS[72]
AL10
VSS[73]
AL13
VSS[74]
AL17
VSS[75]
AL21
VSS[76]
AL25
VSS[77]
AL28
VSS[78]
AL33
VSS[79]
AL36
VSS[80]
AL40
VSS[81]
AL43
VSS[82]
AL47
VSS[83]
AL61
VSS[84]
AM13
VSS[85]
AM20
VSS[86]
AM22
VSS[87]
AM26
VSS[88]
AM30
VSS[89]
AM34
VSS[90]
AV8063801058002-SR0N8-L1-1.7G_BGA1023~D
12
RC84
1K_0402_1%
+V_SM_VREF_CNT
12
RC78
1K_0402_1%
i5R1@
AM38
VSS[91]
AM4
VSS[92]
AM42
VSS[93]
AM45
VSS[94]
AM48
VSS[95]
AM58
VSS[96]
AN1
VSS[97]
AN21
VSS[98]
AN25
VSS[99]
AN28
VSS[100]
AN33
VSS[101]
AN36
VSS[102]
AN40
VSS[103]
AN43
VSS[104]
AN47
VSS[105]
AN50
VSS[106]
AN54
VSS[107]
AP10
VSS[108]
AP51
VSS[109]
AP55
VSS[110]
AP7
VSS[111]
AR13
VSS[112]
AR17
VSS[113]
AR21
VSS[114]
AR41
VSS[115]
AR48
VSS[116]
AR61
VSS[117]
AR7
VSS[118]
AT14
VSS[119]
AT19
VSS[120]
AT36
VSS[121]
AT4
VSS[122]
AT45
VSS[123]
VSS
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(6/6) PWR,VSS
PROCESSOR(6/6) PWR,VSS
PROCESSOR(6/6) PWR,VSS
LA-9104P
LA-9104P
LA-9104P
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
AT52
AT58
AU1
AU11
AU28
AU32
AU51
AU7
AV17
AV21
AV22
AV34
AV40
AV48
AV55
AW13
AW43
AW61
AW7
AY14
AY19
AY30
AY36
AY4
AY41
AY45
AY49
AY55
AY58
AY9
BA1
BA11
BA17
BA21
BA26
BA32
BA48
BA51
BB53
BC13
BC5
BC57
BD12
BD16
BD19
BD23
BD27
BD32
BD36
BD40
BD44
BD48
BD52
BD56
BD8
BE5
BG13
10 57Wednesday, August 29, 2012
10 57Wednesday, August 29, 2012
1
10 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 11
5
4
3
2
1
+1.5V
JDIMM1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
VSS49DQS#0
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
VSS925VSS10
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
DQS247VSS17
VSS1849DQ22
51
DQ18
DQ1953VSS19
VSS2055DQ28
57
DQ24
DQ2559VSS21
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
A12/BC#83A11
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
VDD999VDD10
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
BELLW_80001-5021
C
ONN@
SP07000LZ00
CD21
1
2
2.2U_0603_6.3V6K
1
2
+V_DDR_REFA
DDR_A_D0
DDR_A_D1
CD2
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
1 2
RD6 10K_0402_5%
1 2
RD7 10K_0402_5%
CD22
+0.75VS
+V_DDR_REFA
@
1
CD13
+
2
220U_2V_D2
CD14
+V_DDR_REFA
2.2U_0603_6.3V6K
0.1U_0402_16V7K
1
CD1
2
DDR_CKE0_DIMMA<7> DDR_CKE1_DIMMA <7>
DDR_A_BS2<7>
M_CLK_DDR0<7>
M_CLK_DDR#0<7>
DDR_A_BS0<7>
DDR_A_WE#<7>
DDR_A_CAS#<7>
DDR_CS1_DIMMA#<7>
0.1U_0402_16V7K
+3VS
1
2
DDR_A_DQS#[0..7]<7>
D D
C C
B B
A A
DDR_A_DQS[0..7]<7>
DDR_A_D[0..63]<7>
DDR_A_MA[0..15]<7>
Layout Note:
Place near JDIMM1
+1.5V
1U_0402_6.3V6K
1U_0402_6.3V6K
+1.5V
10U_0603_6.3V6M
+0.75VS
CD4
CD3
1
1
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CD8
CD7
1
1
2
2
Layout Note:
Place near JDIMM1.203,204
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CD17
CD18
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD5
1
2
10U_0603_6.3V6M
CD9
CD10
1
1
2
2
1U_0402_6.3V6K
1
CD19
2
+1.5V
12
RD1
1K_0402_1%
12
RD3
1K_0402_1%
All VREF traces should
have 10 mil trace width
CD6
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD12
CD11
1
1
2
1U_0402_6.3V6K
1
2
1
2
2
CD20
VSS3
DQS0
VSS6
VSS8
DQ12
DQ13
DQ14
DQ15
DQ20
DQ21
DQ23
DQ29
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
VTT2
+1.5V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR3_DRAMRST#
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_CKE1_DIMMA
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PCH_SMBDATA
PCH_SMBCLK
+0.75VS
M_CLK_DDR1 <7>
M_CLK_DDR#1 <7>
DDR_A_BS1 <7>
DDR_A_RAS# <7>
DDR_CS0_DIMMA# <7>
M_ODT0 <7>
M_ODT1 <7>
+VREF_CA
0.1U_0402_16V7K
2.2U_0603_6.3V6K
1
CD15
2
PCH_SMBDATA <12,14,38,6>
PCH_SMBCLK <12,14,38,6>
DDR3_DRAMRST# <12,7>
+1.5V
12
12
1
CD16
2
RD4
1K_0402_1%
RD5
1K_0402_1%
M3
DRAMRST_CNTRL<7>
+SA_DIMM_VREFDQ
DRAMRST_CNTRL
+SB_DIMM_VREFDQ
DRAMRST_CNTRL
RD8 0_0402_5%@
RD9 0_0402_5%@
1 2
S
G
2
1 2
S
G
2
QD1
D
13
BSS138_NL_SOT23-3
QD2
D
13
BSS138_NL_SOT23-3
+V_DDR_REFA
+V_DDR_REFB
DQ4
DQ5
DQ6
DQ7
DM1
DM2
A15
A14
A7
A6
A4
A2
A0
CK1
BA1
S0#
NC2
DM4
DM6
SDA
SCL
G2
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII DIMMA
DDRIII DIMMA
DDRIII DIMMA
LA-9104P
LA-9104P
LA-9104P
1
11 57Wednesday, August 29, 2012
11 57Wednesday, August 29, 2012
11 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 12
5
4
3
2
1
+1.5V
D D
DDR_B_DQS#[0..7]<7>
DDR_B_DQS[0..7]<7>
DDR_B_D[0..63]<7>
DDR_B_MA[0..15]<7>
Layout Note:
Place near JDIMMB
C C
B B
A A
+1.5V
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD28
CD29
1
1
2
2
+1.5V
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD32
1
2
Layout Note:
Place near JDIMMB.203,204
+0.75VS
10U_0603_6.3V6M
CD34
CD33
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CD43
CD42
2
2
1U_0402_6.3V6K
CD30
CD31
1
1
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CD35
1
2
1U_0402_6.3V6K
1
2
10U_0603_6.3V6M
@
1
CD37
CD36
1
2
CD44
CD38
1
1
+
2
2
2
1U_0402_6.3V6K
1
CD45
2
12
RD15
1K_0402_1%
+V_DDR_REFB
12
RD16
1K_0402_1%
220U_2V_D2
CD39
+V_DDR_REFB
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
All VREF traces should
have 10 mil trace width
+3VS
2.2U_0603_6.3V6K
12
RD19
10K_0402_5%
0.1U_0402_16V7K
1
1
2
DDR_CKE2_DIMMB<7>
DDR_CS3_DIMMB#<7>
CD26
CD27
2
DDR_B_BS2<7>
M_CLK_DDR2<7>
M_CLK_DDR#2<7>
DDR_B_BS0<7>
DDR_B_WE#<7>
DDR_B_CAS#<7>
+3VS
0.1U_0402_16V7K
12
10K_0402_5%
RD20
+V_DDR_REFB
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
2.2U_0603_6.3V6K
+0.75VS
CD46
1
1
2
2
+1.5V
CD47
JDIMM2
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
BOSS1
BELLW_80001-1021
CONN@
SP07000P700
DQS0#
DQS0
DQ12
DQ13
DM1
RESET#
DQ14
DQ15
DQ20
DQ21
DM2
DQ22
DQ23
DQ28
DQ29
DQS3#
DQS3
DQ30
DQ31
CKE1
CK1#
RAS#
ODT0
ODT1
VREF_CA
DQ36
DQ37
DM4
DQ38
DQ39
DQ44
DQ45
DQS5#
DQS5
DQ46
DQ47
DQ52
DQ53
DM6
DQ54
DQ55
DQ60
DQ61
DQS7#
DQS7
DQ62
DQ63
EVENT#
GND2
BOSS2
+1.5V
2
VSS
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR3_DRAMRST#
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31DDR_B_D27
DDR_CKE3_DIMMB
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
M_ODT3
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
PCH_SMBDATA
PCH_SMBCLK
+0.75VS
DDR3_DRAMRST# <11,7>
DDR_CKE3_DIMMB <7>
M_CLK_DDR3 <7>
M_CLK_DDR#3 <7>
DDR_B_BS1 <7>
DDR_B_RAS# <7>
DDR_CS2_DIMMB# <7>
M_ODT2 <7>
M_ODT3 <7>
+VREF_CB
2.2U_0603_6.3V6K
0.1U_0402_16V7K
1
CD40
2
PCH_SMBDATA <11,14,38,6>
PCH_SMBCLK <11,14,38,6>
RD17
1K_0402_1%
1
CD41
2
+1.5V
12
12
RD18
1K_0402_1%
DQ4
DQ5
VSS
VSS
DQ6
DQ7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
VDD
BA1
VDD
S0#
VDD
NC
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SDA
SCL
VTT
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII DIMMB
DDRIII DIMMB
DDRIII DIMMB
LA-9104P
LA-9104P
LA-9104P
1
12 57Wednesday, August 29, 2012
12 57Wednesday, August 29, 2012
12 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 13
5
4
3
2
1
+3VS
12
12
12
+3VS
12
+3V_PCH
12
+RTCVCC
1
CH4
18P_0402_50V8J
2
1 2
RH5 33_0402_5%
1 2
RH6 33_0402_5%
1 2
RH7 33_0402_5%
1 2
RH8 1M_0402_5%
ME_EN<40>
+3V_PCH +3V_PCH+3V_PCH
12
@
RH19
200_0402_1%
PCH_JTAG_TMS_R PCH_JTAG_TDI_RPCH_JTAG_TDO_R
12
RH25
100_0402_1%
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
RH35 51_0402_5%
PCH_SPI_WP#
PCH_SPI_HOLD#
PCH_RTCX1
PCH_RTCX2
XTAL@
+RTCVCC
HDA_BIT_CLK
HDA_RST#
HDA_SYNC_R
1 2
RH11 1K_0402_1%
1 2
RH15 33_0402_5%
12
RH20
200_0402_1%
12
100_0402_1%
1 2
RH44 0_0402_5%
1 2
RH48 0_0402_5%
1 2
RH70 0_0402_5%
1 2
PCH_RTCX1_R<23>
+RTCVCC
1U_0603_10V6K
1 2
RH3 20K_0402_5%
1 2
RH4 20K_0402_5%
1U_0603_10V6K
@
RH26
@
@
@
RH30 0_0402_5%
1 2
RH2
1
CH5
2
1
CH6
2
+5VS
G
2
13
D
S
QH1BSS138_SOT23
1 2
@
RH9 0_0402_5%
HDA_SDOUT
HDA_SDOUT
PCH_JTAG_TMS_R
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
close to YH1
GCLK@
1 2
PCH_RTCX1
SM_INTRUDER#
1M_0402_5%
12
CMOS
CLRP1
SHORT PADS
12
CLRP2
SHORT PADS
ME CMOS
CLP1 & CLP2 place near DIMM
HDA_SPKR<33>
HDA_SYNC
HDA_SDIN0<33>
NEC flash issue .
+3V_PCH
@
RH262
3.3K_0402_5%
1 2
@
1 2
PCH_SPI_SO
RH36 0_0402_1%
RH37 33_0402_5%
PCH_RTCX1
PCH_RTCX2
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
HDA_BIT_CLK
HDA_SYNC
HDA_SPKR
HDA_RST#
HDA_SDIN0
HDA_SDOUT
PCH_JTAG_TCK
PCH_JTAG_TMS_R
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
+3V_PCH
@
RH33
3.3K_0402_5%
12
@
12
CH1 10P_0402_50V8J
@
12
CH2 10P_0402_50V8J
Reserve for RF please close t o UH1
R1@
UH1A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN# / GPIO33
N32
HDA_DOCK_RST # / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
BD82HM76-SLJ8E-C1_BGA989~D
SA00005FH1L
RTCIHDA
JTAG
SPI
SPI ROM FOR WIN8( 2MByte )
1 2
PCH_SPI_CS1#_RPCH_SPI_CS1#
PCH_SPI_WP#
UH2
X76@
1
CS#
2
SO
HOLD#
3
WP#
SCLK
4
GND
EN25QH16-104HIP_SO8
EON
EN25QH16-104HIP_SO8
HDA_SDOUT
HDA_BIT_CLK
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
LPC
FWH4 / LFRAME#
LDRQ1# / GPIO23
SATA 6G
SATA
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATA0GP / GPIO21
SATA1GP / GPIO19
8
VCC
7
6
5
SI
LDRQ0#
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATALED#
+3V_PCH
CH11
PCH_SPI_HOLD#PCH_SPI_SO_R
PCH_SPI_CLK_R
PCH_SPI_SI_R
UH1
BD82HM76-SLJ8E-C1_BGA989~D
S
C38
LPC_AD0
A38
LPC_AD1
B37
LPC_AD2
C37
LPC_AD3
D36
LPC_FRAME#
E36
K36
V5
SERIRQ
AM3
AM1
AP7
SATA_PTX_DRX_N0
AP5
SATA_PTX_DRX_P0
AM10
AM8
AP11
AP10
AD7
SATA_PRX_DTX_N2
AD5
SATA_PRX_DTX_P2
AH5
SATA_PTX_DRX_N2
AH4
SATA_PTX_DRX_P2
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
Y10
SATA_COMP
AB12
AB13
SATA3_COMP
AH1
RBIAS_SATA3
P3
PCH_SATALED#
V14
P1
BBS_BIT0_R
0.1U_0402_16V7K
1
2
RH27 33_0402_5%
RH39 33_0402_5%
1
CH99
@
10P_0402_50V8J
2
R3@
A00005FH2L
LPC_AD0 <40>
LPC_AD1 <40>
LPC_AD2 <40>
LPC_AD3 <40>
LPC_FRAME# <40>
SERIRQ <40>
1 2
CH7 0.01U_0402_16V7K
1 2
CH8 0.01U_0402_16V7K
1 2
RH21 37.4_0402_1%
1 2
RH22 49.9_0402_1%
1 2
RH28 750_0402_1%~D
PCH_SATALED# <38>
@
1 2
RH268 0_0402_1%
RH29
12
PCH_SPI_CLK
12
PCH_SPI_SI
+1.05VS_VCC_SATA
+1.05VS_SATA3
12
10K_0402_5%
HDD_DET#HDD_DET#_R
+3VS
SATA_PRX_DTX_N0 <41>
SATA_PRX_DTX_P0 <41>
SATA_PTX_DRX_N0_C <41>
SATA_PTX_DRX_P0_C <41>
SATA_PRX_DTX_N2 <41>
SATA_PRX_DTX_P2 <41>
SATA_PTX_DRX_N2 <41>
SATA_PTX_DRX_P2 <41>
HDD_DET# <41>
PCH_SPI_CS0#
3.3K_0402_5%
@
1 2
RH264 0_0402_1%
12
RH265 33_0402_5%
330K_0402_5%
RH13
PCH_INTVRMEN
RH16
@
INTVRMEN
H：Integrated VRM enable
*
L
：
Integrated VRM disable
HDA_SDO
ME debug mode , this signal has a weak internal PD
L=>security measures defined in the Flash
Descriptor will be in effect (default)
330K_0402_5%
+RTCVCC
12
12
H=>Flash Descriptor Security will be overridden
HDD
ODD
JP12
+CHGRTC
+3V_PCH
2
JUMP_43X39
SPI ROM FOR ME
PCH_SPI_CS0#_R
1 2
PCH_SPI_SO_LPCH_SPI_SO
( 4MByte )
UH6
X76@
1
CS#
2
3
4
EON
EN25Q32B-104HIP_SO8
VCC
SO/SIO1
HOLD#
WP#
SCLK
GND
SI/SIO0
EN25Q32B-104HIP_SO8
8
7
PCH_SPI_HOLD#
6
PCH_SPI_CLK_L
5
PCH_SPI_SI_L PCH_SPI_SI
@
RH263
SERIRQ
RH10 10K_0402_5%
HDD_DET#
RH12 10K_0402_5%
PCH_SATALED#PCH_INTVRMEN
RH14 10K_0402_5%
HDA_SPKR
RH17 1K_0402_5%@
LOW=Default
HIGH=No Reboot
*
HDA_SDOUT
RH23 1K_0402_5%@
Low = Disabled
*
High = Enabled
HDA_SYNC
This signal has a weak intern al pull-down
On Die PLL VR i s supplied by
1.5V when smapl ed high
1.8V when sampl ed low
Needs to be pul led High for H uron River plat from
HDA_SYNC
RH32 1K_0402_5%
+3V_PCH
12
RTC Battery
+RTCBATT
+CHGRTC
3
1 2
2
1
1
CH12
1U_0603_10V6K
2
112
+3V_PCH
CH98
+3VLP
0.1U_0402_16V7K
1
2
12
RH266 33_0402_5%
12
RH267 33_0402_5%
W=20mils
W=20mils
PCH_SPI_CLKPCH_SPI_WP#
RH34
1K_0402_5%
W=20mils
DH1
BAT54CW_SOT323-3
XTAL@
1 2
RH1 10M_0402_5%
YH1
1 2
32.768KHZ_12.5PF_9H03200019
D D
XTAL@
18P_0402_50V8J
1
CH3
XTAL@
2
keep away hot s pot
HDA_BITCLK_AUDIO<33>
HDA_RST_AUDIO#<33>
C C
HDA_SYNC_AUDIO<33>
HDA_SDOUT_AUDIO<33>
12
@
RH18
200_0402_1%
12
RH24
100_0402_1%
B B
PCH_JTAG_TCK<6>
PCH_JTAG_TMS<6>
PCH_JTAG_TDI<6>
PCH_JTAG_TDO<6>
PCH_JTAG_TCK
+3V_PCH
1 2
RH38 3.3K_0402_5%
1 2
A A
RH40 3.3K_0402_5%
ZZZ
SPIEON@
X7644031L07
5
4
ZZZ
SPIWB@
X7644031L08
ZZZ
SPIMXIC@
X7644031L09
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (1/8) SATA/HDA/SPI/LPC
PCH (1/8) SATA/HDA/SPI/LPC
PCH (1/8) SATA/HDA/SPI/LPC
LA-9104P
LA-9104P
LA-9104P
1
13 57Wednesday, August 29, 2012
13 57Wednesday, August 29, 2012
13 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 14
5
4
3
2
1
1 2
RH45 2.2K_0402_5%
1 2
RH46 2.2K_0402_5%
1 2
RH47 2.2K_0402_5%
1 2
RH49 2.2K_0402_5%
1 2
RH50 2.2K_0402_5%
1 2
RH51 2.2K_0402_5%
1 2
RH52 10K_0402_5%
1 2
RH86 10K_0402_5%
1 2
RH53 1K_0402_5%
1 2
RH54 10K_0402_5%
1 2
RH55 10K_0402_5%
1 2
RH56 10K_0402_5%
1 2
RH57 10K_0402_5%
1 2
RH58 10K_0402_5%
1 2
RH59 10K_0402_5%
1 2
RH60 10K_0402_5%
1 2
RH61 10K_0402_5%
1 2
RH62 10K_0402_5%
+3VS
+3VS +3VS
+3VS
RH71
2.2K_0402_5%
5
4
PCH_SMBCLK
PCH_SMBDATA
RH80
2.2K_0402_5%
@
5
4
61
5
4
DMN66D0LDW-7_SOT363-6
QH3B
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
1 2
1 2
1 2
RH87 0_0402_1%
1 2
RH93 0_0402_1%
1 2
1 2
3
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PCH (2/8) PCIE/SMBUS/CLK
PCH (2/8) PCIE/SMBUS/CLK
PCH (2/8) PCIE/SMBUS/CLK
LA-9104P
LA-9104P
LA-9104P
RH72
2.2K_0402_5%
PCH_SMBCLK <11,12,38,6>
PCH_SMBDATA <11,12,38,6>
@
@
RH81
2.2K_0402_5%
@
TP_SMBCLK <39>
TP_SMBDATA <39>
PCH_SMLCLK <40>
PCH_SMLDATA <40>
1
+3V_PCH
TP_SMBCLK
TP_SMBDATA
1.0
1.0
1.0
of
14 57Wednesday, August 29, 2012
14 57Wednesday, August 29, 2012
14 57Wednesday, August 29, 2012
6 1
QH2A
RH78
1 2
@
0_0402_5%
DMN66D0LDW-7_SOT363-6
6 1
@
QH7A
DMN66D0LDW-7_SOT363-6
SML1CLK
SML1DATA
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK
SML1DATA
SMBALERT#
PCH_HOT#
DRAMRST_CNTRL_PCH
CLKIN_DMI2#
CLKIN_DMI2
CLKIN_DMI#
CLKIN_DMI
CLKIN_DOT96#
CLKIN_DOT96
CLKIN_SATA#
CLKIN_SATA
CLK_PCH_14M
If use extenal CLK gen, please place close to CLK gen
else, please place close to PCH
2
3
QH2B
RH82
1 2
@
0_0402_5%
2
3
@
QH7B
+3V_PCH
2
DMN66D0LDW-7_SOT363-6
QH3A
UH1B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_ B_N
AB40
CLKOUT_PEG_ B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
BD82HM76-SLJ8E-C1_BGA989~D
R1@
@
CH25
@
22P_0402_50V8J
RH63
1 2
33_0402_5%
RH65
33_0402_5%
@
12
CH26
22P_0402_50V8J
12
1 2
@
CLK_PCH_14M
CLK_PCI_LPBACK
Reserve for EMI please close to
UH1
SMBUSController
SML1ALERT# / PCH HOT# / GPIO74
PCI-E*
CLOCKS
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_ A_N
CLKOUT_PEG_ A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_ N
CLKOUT_DP_ P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96 N
CLKIN_DOT_96 P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
3
E12
SMBALERT#
H14
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
XTAL25_IN
SMBCLK
C9
SMBDATA
A12
DRAMRST_CNTRL_PCH
C8
SML0CLK
G12
SML0DATA
C13
PCH_HOT#
E14
SML1CLK
M16
SML1DATA
M7
T11
No support iAMT
P10
M10
PEG_A_CLKRQ#
AB37
CLK_PEG_VGA#
AB38
CLK_PEG_VGA
AV22
CLK_CPU_DMI#
AU22
CLK_CPU_DMI
AM12
AM13
BF18
CLKIN_DMI#
BE18
CLKIN_DMI
BJ30
CLKIN_DMI2#
BG30
CLKIN_DMI2
G24
CLKIN_DOT96#
E24
CLKIN_DOT96
AK7
CLKIN_SATA#
AK5
CLKIN_SATA
K45
CLK_PCH_14M
H45
CLK_PCI_LPBACK
V47
XTAL25_IN
V49
XTAL25_OUT
Y47
XCLK_RCOMP
K43
CLK_FLEX0
F47
CLK_14M_R
H47
CLK_LAN_25M_R
K49
DGPU_PRSNT#
LAN_X1<23>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Total device
1 2
RH125
22_0402_5%
RH270 22_0402_5%
RH269 10K_0402_5%
RH261
10K_0402_5%DIS@
1 2
MEMORY
DRAMRST_CNTRL_PCH <7>
PCH_HOT# <40>
20090512
add double mosfet prevent
ATI M92 electric leakage
+3V_PCH
RH64
10K_0402_5%
1 2
CLK_PEG_VGA# <24>
CLK_PEG_VGA <24>
CLK_CPU_DMI# <6>
CLK_CPU_DMI <6>
1 2
RH85 90.9_0402_1%
12
@
12
UMA@
close to RH270
1 2
RH31 0_0402_5%
GCLK@
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
PEG_A_CLKRQ# <25>
CLK_PCI_LPBACK <16>
+1.05VS_VCCDIFFCLKN
T53 PAD~D@
T54 PAD~D@
CLK_LAN_25M <32>
+3VS
CLK_LAN_25M
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
SMBCLK
DMN66D0LDW-7_SOT363-6
SMBDATA
SMBCLK
DMN66D0LDW-7_SOT363-6
SMBDATA
12
12
12
12
PCIE_PRX_LANTX_N1
PCIE_PRX_LANTX_P1
PCIE_PTX_LANRX_N1_C
PCIE_PTX_LANRX_P1_C
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C
PCIE_LAN#
PCIE_LAN
LAN_CLKREQ#
PCIE_WLAN#
PCIE_WLAN
WLAN_CLKREQ#
GPIO20
GPIO25
GPIO26
GPIO44
GPIO56
GPIO45
GPIO46
CLK_BCLK_ITP#
CLK_BCLK_ITPCLK_BCLK_ITP
4
PCIE_PRX_LANTX_N1<32>
10/100 LAN --->
D D
WLAN (Mini Card)--->
C C
10/100 LAN --->
WLAN (Mini Card)--->
B B
XTAL@
RH89 1M_0402_5%
A A
12P_0402_50V8J
CH27
XTAL@
1
2
25MHZ_10PF_7V25000014
5
PCIE_PRX_LANTX_P1<32>
PCIE_PTX_LANRX_N1<32>
PCIE_PTX_LANRX_P1<32>
PCIE_PRX_WLANTX_N2<38>
PCIE_PRX_WLANTX_P2<38>
PCIE_PTX_WLANRX_N2<38>
PCIE_PTX_WLANRX_P2<38>
*PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2
CLK_CPU_ITP#<6>
CLK_CPU_ITP<6>
XTAL25_IN
12
XTAL25_OUT
3
1
YH2
XTAL@
CH28
12P_0402_50V8J
XTAL@
2
OSC1OSC
GND2GND
4
CLK_PCIE_LAN#<32>
CLK_PCIE_LAN<32>
LAN_CLKREQ#<32>
CLK_PCIE_WLAN#<38>
CLK_PCIE_WLAN<38>
WLAN_CLKREQ#<38>
CLK_CPU_ITP#
CLK_CPU_ITP
PCH_X1<23>
1 2
CH19 0.1U_0402_10V7K~D
1 2
CH20 0.1U_0402_10V7K~D
1 2
CH21 0.1U_0402_10V7K~D
1 2
CH22 0.1U_0402_10V7K~D
RH67 0_0402_1%@
RH68 0_0402_1%@
RH69 10K_0402_5%
+3V_PCH
RH75 0_0402_1%@
RH76 0_0402_1%@
RH77 10K_0402_5%
+3VS
+3VS
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
RH79 10K_0402_5%
RH74 10K_0402_5%
RH66 10K_0402_5%
RH83 10K_0402_5%
RH84 10K_0402_5%
RH88 10K_0402_5%
RH90 10K_0402_5%
1 2
RH91 0_0402_1%@
1 2
RH92 0_0402_1%@
close to YH2
1 2
RH41 0_0402_5%
GCLK@
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
XTAL25_IN
Page 15
5
UH1C
D D
Reserve for ESD
CH105
12
0.1U_0402_16V7K
SYS_PWROK_R
Please close to PCH
C C
PM_DRAM_PWRGD<6>
Reserve for ESD
PBTN_OUT#
1
@
CH103
0.1U_0402_16V7K
Place close to PCH
B B
A A
2
GPIO72
RI#
PCIE_WAKE#
AC_PRESENT_R
SUSWARN#
WAKE#
EC_RSMRST#
DMI_CTX_PRX_N0<5>
DMI_CTX_PRX_N1<5>
DMI_CTX_PRX_N2<5>
DMI_CTX_PRX_N3<5>
DMI_CTX_PRX_P0<5>
DMI_CTX_PRX_P1<5>
DMI_CTX_PRX_P2<5>
DMI_CTX_PRX_P3<5>
DMI_CRX_PTX_N0<5>
DMI_CRX_PTX_N1<5>
DMI_CRX_PTX_N2<5>
DMI_CRX_PTX_N3<5>
DMI_CRX_PTX_P0<5>
DMI_CRX_PTX_P1<5>
DMI_CRX_PTX_P2<5>
DMI_CRX_PTX_P3<5>
+1.05VS
XDP_DBRESET#<6>
PCH_PWROK
EC_RSMRST#<40>
PBTN_OUT#<40,6>
ACIN<25,40,45,46>
1 2
RH116 10K_0402_5%
1 2
RH117 10K_0402_5%
1 2
RH118 10K_0402_5%@
1 2
RH121 200K_0402_5%
1 2
RH124 10K_0402_5%
1 2
RH126 10K_0402_5%
1 2
RH127 10K_0402_5%
PCH_PWROK<40,6>
VGATE<52,6>
RH99 49.9_0402_1%
RH100 750_0402_1%~D
4mil width and place
within 500mil of the PCH
T57PAD~D
SYS_PWROK
PCH_PWROK
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
1 2
RH104 0_0402_1%
RH105 0_0402_1%
RH106 0_0402_1%
RH108 0_0402_1%
RH110 0_0402_1%
1 2
XDP_DBRESET#
1 2
@
1 2
@
1 2
@
PM_DRAM_PWRGD
1 2
@
1 2
@
DH4
1 2
RB751V-40_SOD323-2
+3V_PCH
1
CH30
0.1U_0402_16V7K
2
1
IN1
2
IN2
DMI_IRCOMP
RBIAS_CPY
PCH_RSMRST#_R
GPIO72
+3VS
BC24
BE20
BG18
BG20
BE24
BC20
BJ18
BJ20
AW24
AW20
BB18
AV18
AY24
AY20
AY18
AU18
BJ24
BG25
BH21
C12
K3
P12
SYS_PWROK_R
L22
L10
B13
C21
K16
SUSWARN#
E20
H20
AC_PRESENT_R
E10
A10
RI#
DSWODVREN
DSWODVREN
5
UH3
VCC
4
SYS_PWROK
OUT
GND
MC74VHC1G08DFT2G_SC70-5
3
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
DMI_ZCOMP
DMI_IRCOMP
DMI2RBIAS
SUSACK#
SYS_RESET#
SYS_PWROK
PWROK
APWROK
DRAMPWROK
RSMRST#
SUSWARN#/SU SPWRDNACK/GPIO30
PWRBTN#
ACPRESENT / GPIO31
BATLOW# / GPIO72
RI#
BD82HM76-SLJ8E-C1_BGA989~D
R1@
DSWODVREN - On Die DSW VR Ena ble
：
H
*
L：Disable
4
DMI
System Power Management
RH119 330K_0402_5%
RH122 330K_0402_5%@
Enable
SYS_PWROK <6>
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN# / GPIO29
Check EC for S3 S4 LED
12
12
+RTCVCC
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWODVREN
1 2
@
RH128
1 2
WAKE#
RH103 0_0402_5%
PM_CLKRUN#
SUS_STAT#
1 2
SUSCLK
@
RH107 0_0402_1%
PM_SLP_S5#
PM_SLP_S4#
PM_SLP_S3#
PM_SLP_SUS#
H_PM_SYNC
If not using in tegrated
LAN,signal may be left as NC.
@
3
FDI_CTX_PRX_N0 <5>
FDI_CTX_PRX_N1 <5>
FDI_CTX_PRX_N2 <5>
FDI_CTX_PRX_N3 <5>
FDI_CTX_PRX_N4 <5>
FDI_CTX_PRX_N5 <5>
FDI_CTX_PRX_N6 <5>
FDI_CTX_PRX_N7 <5>
FDI_CTX_PRX_P0 <5>
FDI_CTX_PRX_P1 <5>
FDI_CTX_PRX_P2 <5>
FDI_CTX_PRX_P3 <5>
FDI_CTX_PRX_P4 <5>
FDI_CTX_PRX_P5 <5>
FDI_CTX_PRX_P6 <5>
FDI_CTX_PRX_P7 <5>
FDI_INT <5>
FDI_FSYNC0 <5>
FDI_FSYNC1 <5>
FDI_LSYNC0 <5>
FDI_LSYNC1 <5>
PCH_RSMRST#_RPCH_DPWROK
0_0402_1%
T58 PAD~D
T59 PAD~D
PCIE_WAKE# <32,40>
SUSCLK_R <40>
PM_SLP_S5# <40>
PM_SLP_S4# <40>
PM_SLP_S3# <40>
H_PM_SYNC <6>
Can be left NC when IAMT is
not support on the platfrom
SUSCLK
Reserve for RF please close t o UH1
CH29
@
10P_0402_50V8J
PCH_ENVDD<21>
LVDS_DDC_CLK<21>
LVDS_DDC_DATA<21>
LVDS_ACLK-<21>
LVDS_ACLK+<21>
LVDS_A0-<21>
LVDS_A1-<21>
LVDS_A2-<21>
LVDS_A0+<21>
LVDS_A1+<21>
LVDS_A2+<21>
LVDS_BCLK-<21>
LVDS_BCLK+<21>
LVDS_B0-<21>
LVDS_B1-<21>
LVDS_B2-<21>
LVDS_B0+<21>
LVDS_B1+<21>
LVDS_B2+<21>
12
+3VS
1 2
RH133 2.2K_0402_5%
1 2
RH135 2.2K_0402_5%
1 2
RH136 8.2K_0402_5%@
1 2
RH137 2.2K_0402_5%
1 2
RH138 2.2K_0402_5%
1 2
RH233 2.2K_0402_5%
1 2
RH234 2.2K_0402_5%
1 2
RH238 2.2K_0402_5%
1 2
RH239 2.2K_0402_5%
2
UH1D
CTRL_CLK
CTRL_DATA
LVDS_IBG
CRT_IREF
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_C LK
P39
L_CTRL_D ATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_ CLK
M40
CRT_DDC_ DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
BD82HM76-SLJ8E-C1_BGA989~D
R1@
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCL K
SDVO_CTRLDATA
HDMI
LVDS
DDPC_CTR LCLK
DDPC_CTR LDATA
mDP
Digital Display Interface
DDPD_CTR LCLK
DDPD_CTR LDATA
CRT
DMC
T56PAD~D
1K_0402_0.5%
ENBKL
PCH_ENVDD
LVDS_DDC_CLK
LVDS_DDC_DATA
LVDS_ACLKLVDS_ACLK+
LVDS_A0LVDS_A1LVDS_A2-
LVDS_A0+
LVDS_A1+
LVDS_A2+
LVDS_BCLKLVDS_BCLK+
LVDS_B0LVDS_B1LVDS_B2-
LVDS_B0+
LVDS_B1+
LVDS_B2+
CRT_DDC_CLK
CRT_DDC_DATA
12
RH115
CTRL_CLK
CTRL_DATA
PM_CLKRUN#
LVDS_DDC_CLK
LVDS_DDC_DATA
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
CRT_DDC_CLK
CRT_DDC_DATA
ENBKL<40>
VGA_PWM<21>
@
@
AP43
AP45
AM42
AM40
AP39
SDVO_INTN
AP40
SDVO_INTP
P38
M39
AT49
DDPB_AUXN
AT47
DDPB_AUXP
AT40
1 2
1 2
1 2
1 2
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
HDMI_DET
HDMI_A2N_VGA
HDMI_A2P_VGA
HDMI_A1N_VGA
HDMI_A1P_VGA
HDMI_A0N_VGA
HDMI_A0P_VGA
HDMI_A3N_VGA
HDMI_A3P_VGA
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
RH120 10K_0402_5%
RH123 2.37K_0402_1%
RH132 100K_0402_5%
RH134 100K_0402_5%
PCH_SDVO_CTRLCLK <22>
PCH_SDVO_CTRLDATA <22>
HDMI_DET <22>
HDMI_A2N_VGA <22>
HDMI_A2P_VGA <22>
HDMI_A1N_VGA <22>
HDMI_A1P_VGA <22>
HDMI_A0N_VGA <22>
HDMI_A0P_VGA <22>
HDMI_A3N_VGA <22>
HDMI_A3P_VGA <22>
PM_CLKRUN#
LVDS_IBG
PCH_ENVDD
ENBKL
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (3/8) DMI/FDI/PM/GFX/DP
PCH (3/8) DMI/FDI/PM/GFX/DP
PCH (3/8) DMI/FDI/PM/GFX/DP
LA-9104P
LA-9104P
LA-9104P
1
15 57Wednesday, August 29, 2012
15 57Wednesday, August 29, 2012
15 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 16
5
+3VS
1 2
RH129 8.2K_0402_5%
1 2
+3VS
12
PCH_PLTRST#
12
CLK_PCI1
RH130 8.2K_0402_5%
1 2
RH131 8.2K_0402_5%
1 2
RH141 8.2K_0402_5%
1 2
RH142 8.2K_0402_5%
1 2
RH146 8.2K_0402_5%
1 2
RH147 8.2K_0402_5%
1 2
RH148 8.2K_0402_5%
1 2
RH151 8.2K_0402_5%
1 2
RH153 8.2K_0402_5%
1 2
RH154 8.2K_0402_5%
RH140 10K_0402_5%
PT:
Port 1 USB Conn JUSB2
Port 2 USB Conn JUSB1
Port 3 Cancel
CLK_PCI_LPBACK<14>
CLK_PCI_LPC<40>
D D
C C
B B
SSI:
Port 1 USB Conn 1
Port 2 USB Conn 2
Port 3 USB Conn 3
Reserve for ESD
CH104
0.1U_0402_16V7K
Please close to PCH
CH31
@
10P_0402_50V8J
Reserve for RF please close t o PCH
@
RH150
10K_0402_5%
PLT_RST#<32,38,40,6>
A A
12
+3VS
1 2
4
CLK_PCI_LPBACK
CLK_PCI_LPC
12
RH155
100K_0402_5%
PCI_PIRQA#
PCI_PIRQD#
PCI_PIRQB#
PCI_PIRQC#
GPIO51
GPIO5
GPIO52
WL_OFF#
ODD_DA#
GPIO4
PXS_PWREN
DGPU_HOLD_RST#
USB3RN1_JUSB2<36>
USB3RN2_JUSB1<36>
USB3RP1_JUSB2<36>
USB3RP2_JUSB1<36>
USB3TN1_JUSB2<36>
USB3TN2_JUSB1<36>
USB3TP1_JUSB2<36>
USB3TP2_JUSB1<36>
DGPU_HOLD_RST#<24>
PXS_PWREN<26,53>
PCH_PLTRST#<24>
RH144 22_0402_5%
1 2
RH145 22_0402_5%
1 2
@
RH149 0_0402_5%
+3VS
5
UH5
1
P
IN1
4
O
2
IN2
G
SN74AHC1G08DCKR_SC70-5
3
@
WL_OFF#<38>
ODD_DA#<41>
1 2
T60PAD~D @
12
T61PAD~D @
T62PAD~D @
T63PAD~D @
CH101
1 2
PCH_PLTRST#
RH157
10K_0402_5%
USB3RN1_JUSB2
USB3RN2_JUSB1
USB3RP1_JUSB2
USB3RP2_JUSB1
USB3TN1_JUSB2
USB3TN2_JUSB1
USB3TP1_JUSB2
USB3TP2_JUSB1
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
DGPU_HOLD_RST#
GPIO52
PXS_PWREN
GPIO51
WL_OFF#
ODD_DA#
GPIO4
GPIO5
PCH_PLTRST#
CLK_PCI0
CLK_PCI1
CLK_PCI2
CLK_PCI3
CLK_PCI4
0.1U_0402_25V6K
UH1E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
TP25
BC30
TP26
BE32
TP27
BJ32
TP28
BC28
TP29
BE30
TP30
BF32
TP31
BG32
TP32
AV26
TP33
BB26
TP34
AU28
TP35
AY30
TP36
AU26
TP37
AY26
TP38
AV28
TP39
AW30
TP40
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
BD82HM76-SLJ8E-C1_BGA989~D
R1@
RSVD
PCI
3
AY7
RSVD1
AV7
RSVD2
AU3
RSVD3
BG4
RSVD4
AT10
RSVD5
BC8
RSVD6
AU2
RSVD7
AT4
RSVD8
AT3
RSVD9
AT1
RSVD10
AY3
RSVD11
USB
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
Intel Anti-Thef t Techonlogy
High=Endabled
NV_ALE
Low=Disable(floating)
NV_ALE
USB20_JUSB2_N0
USB20_JUSB2_P0
USB20_JUSB1_N1
USB20_JUSB1_P1
USB20_JUSB3_N2
USB20_JUSB3_P2
USB20_USBDB_N3
USB20_USBDB_P3
USB20_MINI1_N8
USB20_MINI1_P8
USB20_TOUCH_N9
USB20_TOUCH_P9
USB20_CR_N10
USB20_CR_P10
USB20_CAM_N11
USB20_CAM_P11
USBRBIAS
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
RH139 1K_0402_5%@
Within 500 mils
1 2
RH143 22.6_0402_1%
1 2
USB20_JUSB2_N0 <36>
USB20_JUSB2_P0 <36>
USB20_JUSB1_N1 <36>
USB20_JUSB1_P1 <36>
USB20_JUSB3_N2 <37>
USB20_JUSB3_P2 <37>
USB20_USBDB_N3 <37>
USB20_USBDB_P3 <37>
USB20_MINI1_N8 <38>
USB20_MINI1_P8 <38>
USB20_TOUCH_N9 <41>
USB20_TOUCH_P9 <41>
USB20_CR_N10 <34>
USB20_CR_P10 <34>
USB20_CAM_N11 <21>
USB20_CAM_P11 <21>
2
*
+1.8VS
USB Conn JUSB2
USB Conn JUSB1
USB Conn JUSB3
USB Conn 4 (DB)
Mini Card (WLAN)
Touch panel
Touch panel
Card Reader
Camera
USB_OC0# <36>
USB_OC1# <36>
USB_OC2# <37>
USB_OC3# <37>
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC6#
USB_OC5#
USB_OC4#
USB_OC7#
SSI:
Port 0 USB Conn 1
Port 1 USB Conn 4 (DB)
Port 2 USB Conn 2
Port 3 USB Conn 3
Port 4 Mini Card (WLAN)
Port 6 Card Reader
Port 12 Camera
PT:
Port 0 USB Conn JUSB2
Port 1 USB Conn JUSB1
Port 2 USB Conn JUSB3
Port 3 USB Conn 4 (DB)
Port 8 Mini Card (WLAN)
Port 9 Touch panel
Port 10 Card Reader
Port 11 Camera
+3V_PCH
12
RH15610K_0402_5%
12
RH15810K_0402_5%
12
RH16010K_0402_5%
12
RH16610K_0402_5%
12
RH16710K_0402_5%
12
RH17010K_0402_5%
12
RH18910K_0402_5%
12
RH21110K_0402_5%
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (4/8) PCI/USB/NVRAM
PCH (4/8) PCI/USB/NVRAM
PCH (4/8) PCI/USB/NVRAM
LA-9104P
LA-9104P
LA-9104P
1
16 57Wednesday, August 29, 2012
16 57Wednesday, August 29, 2012
16 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 17
5
4
3
2
1
D D
C C
B B
A A
+3V_PCH
12
RH240 1K_0402_5%
RH241 10K_0402_5%
+3V_PCH +3VS +3VS
12
@
RH244
10K_0402_5%
12
@
RH179
10K_0402_5%
System ID
LOW Entry
HIGH VOSTROVAW10 17''
+3VS
GPIO28
On-Die PLL Voltage Regulator
This signal has a weak internal pull up
H：On-Die voltage regulator enab le
*
L：On-Die PLL Volt age Regulator disable
PCH_GPIO37
FDI TERMINATION VOLTAGE OVERRIDE
LOW - Tx, Rx te rminated
*
to same voltage
(DC Coupling Mo de)
+3VS
RH168 1K_0402_5%@
1 2
RH169
PCH_LID_SW_IN#
12
PCH_GPIO28
12
@
RH182
10K_0402_5%
PCH_GPIO39PCH_GPIO57 PCH_GPIO38
12
@
RH202
10K_0402_5%
PCH_GPIO57 PCH_GPIO39
VAW00 15''
RH16410K_0402_5%
1 2
RH165 1K_0402_5%@
12
12
GPIO1
PCH_GPIO28
10K_0402_5%
12
@
RH181
10K_0402_5%
12
@
RH225
10K_0402_5%
INSPIRON
PCH_GPIO37
PCH_GPIO37
EC_LID_OUT#<40>
PCH_GPIO38
Mainstream
EC_SCI#<40>
EC_SMI#<40>
1 2
RH73 0_0402_1%
VGA_PWRGD<53>
KB_DET#
BT_ON#<38>
ODD_DETECT#<41>
GPIO1
GPIO6
EC_SCI#
EC_SMI#
PCH_LID_SW_IN#EC_LID_OUT#
@
GPIO16
VGA_PWRGD
PCH_GPIO22
KB_DET#
PCH_GPIO27
PCH_GPIO28
BT_ON#
GPIO35
ODD_DETECT#
PCH_GPIO37
PCH_GPIO38
PCH_GPIO39
PCH_GPIO48
GPIO49
PCH_GPIO57
RH173 10K_0402_5%@
PCH_GPIO28 needs to be connected to XDP_FN8
PCH_GPIO35 needs to be connected to XDP_FN9
PCH_GPIO15 needs to be connected to XDP_FN16
Please refer to Huron River Debug Board DG 0.5
UH1F
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
GPIO8
C4
LAN_PHY_PWR _CTRL / GPIO12
G2
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24 / MEM_LED
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49
D6
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
BD82HM76-SLJ8E-C1_BGA989~D
R1@
1 2
PCH_GPIO27
GPIO
NCTF
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
CPU/MISC
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
ODD_EN#
GPIO69
KB_RST#
H_THERMTRIP#_C
INIT3_3V#
DF_TVS
EC_SMI#
ODD_EN# <41>
T64 PAD~D@
KB_RST# <40>
H_CPUPWRGD <6>
1 2
RH162390_0402_5%
1 2
RH183
+3VS
RH159
10K_0402_5%
1 2
H_THERMTRIP#
12
@
RH163
10K_0402_5%
H_THERMTRIP# <6>
INIT3_3V
This signal has weak internal
PU, can't pull low
Due to remove VCCDFERM
jumper(PJP66), need to
change the power rail to
+1.8V_RUN for D12" only
H_SNB_IVB#<6>
+3V_PCH
10K_0402_5%
GATEA20 <40>
PLACE RH150 CLO SE TO THE BRAN CHING POINT
( TO CPU and NV RAM CONNECTOR)
+1.8VS
12
RH152
2.2K_0402_5%
PCH_PECI_RPCH_PECI_R
RH149 need to close to CPU
1 2
RH358 1K_0402_1%
DMI & FDI Termination Voltage
Set to Vss when LOW
Set to Vcc when HIGH
1 2
RH171
1 2
RH172
1 2
RH174
1 2
RH175
1 2
RH242
1 2
RH176
1 2
RH177
1 2
RH180
1 2
RH184
1 2
RH245
1 2
RH178
ODD_DETECT#
GPIO16
BT_ON#
KB_RST#
VGA_PWRGD
PCH_GPIO22
GPIO35
GPIO49
GPIO6
PCH_GPIO48
ODD_EN#
DF_TVS
200K_0402_5%
10K_0402_5%
8.2K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
1 2
@
RH1610_0402_5%
1
@
CH102
0.1U_0402_10V7K~D
2
Place CH102 close to RH161
& PCH.
DF_TVS
+3VS
H_PECI <40,6>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Compal Electronics, Inc.
PCH (5/8) GPIO/CPU/MISC
PCH (5/8) GPIO/CPU/MISC
PCH (5/8) GPIO/CPU/MISC
LA-9104P
LA-9104P
LA-9104P
1
17 57Wednesday, August 29, 2012
17 57Wednesday, August 29, 2012
17 57Wednesday, August 29, 2012
of
1.0
1.0
1.0
Page 18
5
4
3
2
1
Reserve for LVDS issue
D D
+1.05VS
1
CH37
2
1U_0402_6.3V6K
1
CH48
2
1U_0402_6.3V6K
1U_0402_6.3V6K
RH195
@
1 2
0_0805_1%
+VCCP_VCCDMI
1
CH38
2
1U_0402_6.3V6K
1U_0402_6.3V6K
+1.05VS_VCCDPLLEXP
+VCCAPLLEXP
1
CH42
2
@
10U_0805_4VAM~D
1
CH49
2
1U_0402_6.3V6K
+VCCAFDI_VRM
+1.05VS_VCCAPLL_FDI
+1.05VS_VCCDPLL_FDI
1
1
CH36
CH35
2
2
10U_0805_4VAM~D
+1.05VS
+1.05VS
C C
RH192
0_0805_1% @
+1.05VS
B B
@
RH187 0_0603_5%~D
+3VS
12
+3VS_VCCA3GBG
1
CH51
0.1U_0402_10V7K~D
2
@
RH194 0_0603_5%~D
12
+VCCAPLLEXP_R
+1.05VS
Place CH53 Near BG6 pin
12
1 2
RH186 0_0603_1%@
LH3
@
1 2
1UH_LB2012T1R0M_20%~D
lace CH40 Near BJ22 pin
P
1
2
1
1
CH45
CH47
CH46
2
2
1U_0402_6.3V6K
10U_0805_4VAM~D
1
+1.05VS
CH53
2
@
1U_0402_6.3V6K
UH1G
1300mA
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
AP21
AP23
AP24
AP26
AT24
AN33
AN34
BH29
AP16
AP17
AU20
2925mA
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCC3_3[3]
VCCVRM[2]
BG6
VccAFDIPLL
VCCIO[27]
VCCDMI[2]
BD82HM76-SLJ8E-C1_BGA989~D
R1@
POWER
VCC CORE
VCCIO
FDI
1mA
CRTLVDS
1mA
VCCTX_LVDS[1]
VCCTX_LVDS[2]
60mA
VCCTX_LVDS[3]
VCCTX_LVDS[4]
DMI
20mA
VCCDFTERM[1]
190mA
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
DFT / SPI HVCMOS
20mA
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCSPI
U48
+VCCADAC
U47
AK36
+VCCA_LVDS
AK37
AM37
AM38
AP36
AP37
V33
+3VS_VCC3_3_6
V34
AT16
+VCCAFDI_VRM
AT20
+VCCP_VCCDMI
AB36
+1.05VS_VCC_DMI_CCI
AG16
AG17
AJ16
AJ17
V1
+3V_VCCPSPI
+VCCTX_LVDS
+VCCA_LVDS
1
2
1
1
CH32
2
2
0.01U_0402_16V7K
CH39
1
0.01U_0402_16V7K
2
RH188
1 2
@
0_0805_1%
1
CH43
0.1U_0402_10V7K~D
2
1
2
+VCCPNAND
1
CH52
2
0.1U_0402_10V7K~D
1
CH54
1U_0402_6.3V6K
2
CH106
@
1U_0402_6.3V6K
4.7UH_LQM18FN4R7M00D_20%
1
CH34
10U_0805_4VAM~D
CH33
2
1
CH40
0.01U_0402_16V7K
2
+3VS
RH191
0_0805_1%
RH193
1 2
@
@
12
1 2
0_0805_1%
CH41
22U_0805_6.3V6M
0.1U_0402_10V7K~D
Near AP43
+VCCP_VCCDMI
@
1 2
CH50
1U_0402_6.3V6K
1 2
RH196 0_0805_1%
RH243 0_0603_5%~D
LH1
RH185
@
+1.05VS
0_0805_1%@
1
2
+3VS
12
0.1UH_MLF1608DR10KT_10%_1608
0.1uH inductor, 200mA
RH190
@
1 2
1
0_0805_1%
CH44
2
1U_0402_6.3V6K
+1.8VS
+3V_PCH
+3VS
PCH Power Rail Table
Voltage Rail
V_PROC_IO
+1.8VS
V5REF
V5REF_Sus
Vcc3_3
VccADAC
+3VS
LH2
12
VccADPLLA
VccADPLLB
VccCore
VccDMI
Voltage
1.05
3.3
3.3
1.05
1.05
1.05
1.05
S0 Iccmax
Current (A)
0.001
5
0.001
0.001
5
0.266
0.001
0.08
0.08
1.3
0.042
1.05VccIO 2.9 25
1.05VccASW 1.01
3.3VccSPI 0.02
+VCCP
3.3VccDSW 0.003
1.8 0. 19VccpNAND
3.3VccRTC 6 uA
3.3VccSus 3_3
3.3 / 1.5VccSusHDA
0.119
0.01
VccVRM 1.8 / 1.5 0.16
1.05VccCLKDMI
0.02
VccSSC 1 .05 0.095
VccDIFFCLKN 1.05 0.055
VccALVDS 3 .3
0.001
1.8VccTX_ LVDS 0.06
+1.5VS +VCCAFDI_VRM
RH197
@
1 2
A A
5
4
0_0603_1%
+VCCAFDI_VRM
1
CH100
1U_0402_6.3V6K
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (6/8) PWR
PCH (6/8) PWR
PCH (6/8) PWR
LA-9104P
LA-9104P
LA-9104P
1
18 57Wednesday, August 29, 2012
18 57Wednesday, August 29, 2012
18 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 19
5
4
3
2
1
+1.05VS
+3V_PCH
1 2
D D
+1.05VS
RH204
@
1 2
0_0805_5%
C C
+1.05VS
RH219 0_0603_5%~D
+1.05VS
B B
+1.05VS
A A
RH220 0_0603_1%
+1.05VS
+1.05VS
@
1 2
RH232 0_0805_1%
RH199
+VCCAPLL_CPY +3VS_VCC_CLKF33
+3VS
10UH_LBR2012T100M_20%
@
12
1 2
@
RH224 0_0603_1%
+VCCP
1 2
RH227 0_0603_1%
+VCCA_DPLL_L
10UH_LBR2012T100M_20%
0_0603_1%@
LH4
@
10UH_LBR2012T100M_20%
1 2
10U_0805_10V6K
@
CH59
+1.05VS
@
1 2
RH215 0_0805_1%
LH5
1 2
@
+1.05VM_VCCSUS
1
CH80
1U_0402_6.3V6K
2
1 2
@
RH223 0_0603_1%
1 2
@
@
LH7
10UH_LBR2012T100M_20%
1 2
1 2
LH8
1
+1.05VS
2
+3VS_VCC_CLKF33
1
CH74
2
+1.05VS_VCCDIFFCLKN
1
CH82
1U_0402_6.3V6K
2
1
CH84
1U_0402_6.3V6K
2
+V_CPU_IO
1
CH87
4.7U_0603_6.3V6K
2
220U_B2_2.5VM_R35
1
+
2
RH207
1
2
10U_0805_10V6K
+VCCDIFFCLK
CH94
1
2
CH75
1
2
CH55
0.1U_0402_10V7K~D
1 2
1U_0402_6.3V6K
+1.05VS_VCCDIFFCLKN
+1.05VS_SSCVCC
1
2
1
2
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
CH96
@
RH198 0_0603_5%~D
CH58
@
0.1U_0402_10V7K~D
0_0603_1%@
1
CH65
2
22U_0805_6.3V6M
1
CH68
2
1U_0402_6.3V6K
1
CH79
0.1U_0402_10V7K~D
2
CH85
0.1U_0402_10V7K~D
1
CH88
CH89
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
220U_B2_2.5VM_R35
CH95
1
1
+
2
2
1U_0402_6.3V6K
12
1
2
1
CH66
2
22U_0805_6.3V6M
1
CH69
2
1U_0402_6.3V6K
+VCCRTCEXT
1
@
CH86
1U_0402_6.3V6K
2
+RTCVCC
CH97
1U_0402_6.3V6K
+VCCACLK
+VCCPDSW
+PCH_VCCDSW
+VCCAPLL_CPY_PCH
+VCCDPLL_CPY
+VCCSUS1
1
@
CH62
1U_0402_6.3V6K
2
1
CH70
2
1U_0402_6.3V6K
+VCCAFDI_VRM
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
+VCCSST
+1.05VM_VCCSUS
1
1
CH90
2
2
0.1U_0402_10V7K~D
UH1J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
1
CH91
CH92
2
R1@
1U_0402_6.3V6K
0.1U_0402_10V7K~D
POWER
3mA
1010mA
Clock and Miscellaneous
80mA
80mA
55mA
95mA
1mA
CPURTC
BD82HM76-SLJ8E-C1_BGA989~D
119mA
PCI/GPIO/LPCMISC
SATA USB
HDA
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
1mA
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCAPLLSATA
10mA
VCCSUSHDA
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
1mA
V5REF
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
+1.05VS_VCCUSBCORE
1
2
+3V_VCCPUSB
1
2
+1.05VS_VCCAUPLL
+PCH_V5REF_SUS
+VCCA_USBSUS
+3V_VCCPSUS_1
+PCH_V5REF_RUN
1
2
+3VS_VCCPPCI
+VCC3_3_2
+VCCAFDI_VRM
+1.05VS_VCC_SATA
+VCCSUSHDA
1
CH930.1U_0402_10V7K~D
2
CH56
1U_0402_6.3V6K
+3V_VCCAUBG
CH60
0.1U_0402_10V7K~D
1 2
RH209 0_0603_1%
+3V_VCCPSUS
CH71
1U_0402_6.3V6K
+3VS_VCCPCORE
RH217
1 2
1
CH77
0.1U_0402_10V7K~D
2
+1.05VS_SATA3
+VCCSATAPLL
+VCCAFDI_VRM
+1.05VS_VCC_SATA
@
RH231
1 2
@
RH200 0_0603_1%
1 2
@
RH205 0_0603_1%
RH206 0_0603_1%
1
CH61
2
@
0.1U_0402_10V7K~D
1 2
@
RH210 0_0603_1%
1
CH67
2
0.1U_0402_10V7K~D
1 2
@
RH213 0_0603_1%
1 2
RH214 0_0805_1%
1
CH73
0.1U_0402_10V7K~D
2
+3VS
+1.05VS_SATA3
0_0603_1%@
RH222
1 2
1
CH83
2
+1.05VS
1U_0402_6.3V6K
1 2
RH229 0_0603_1%
12
150_0402_1%
+1.05VS
1 2
@
+1.05VS
@
1 2
RH216 0_0603_1%
1
CH76
0.1U_0402_10V7K~D
2
RH218 0_0805_1%
1
CH78
1U_0402_6.3V6K
2
+1.05VS
0_0805_1%@
@
VCC3_3 = 266mA detal waiting for newest spec
VCCDMI = 42mA detal waiting for newest spec
+5VALW +5V_PCH
1 2
RH201 0_0603_1%
PCH_PWR_EN#<35>
+3V_PCH
+3V_PCH
+3V_PCH
+3VS
@
@
1 2
+3V_PCH
+VCCA_USBSUS
1
2
1
@
CH63
2
+3V_PCH
+3VS
@
10UH_LBR2012T100M_20%
1 2
CH81
@
10U_0805_10V6K
1U_0402_6.3V6K
+1.05VS
LH6
+VCCSATAPLL_R
If it support 3 .3V audio sign als
POP:RH244
Depop RH245 / R H246
If it support 1 .5V audio sign als
POP:RH245 / RH2 46
Depop R244
@
100_0402_1%
100_0402_1%
AO3419L_SOT23-3
S
RH208
RH212
@
RH221
0_0805_5%
QH5
G
2
12
12
12
D
13
1
2
+3V_PCH+5V_PCH
21
DH2
RB751S40T1_SOD523-2~D
+PCH_V5REF_SUS
1
CH64
0.1U_0603_25V7K
2
+3VS+5VS
21
DH3
RB751S40T1_SOD523-2~D
+PCH_V5REF_RUN
1
CH72
1U_0603_10V6K
2
+1.05VS
12
RH203
CH57
20K_0402_5%
0.1U_0402_10V7K~D
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (7/8) PWR
PCH (7/8) PWR
PCH (7/8) PWR
LA-9104P
LA-9104P
LA-9104P
1
of
19 57Wednesday, August 29, 2012
19 57Wednesday, August 29, 2012
19 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 20
5
UH1H
H5
D D
C C
B B
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
BD82HM76-SLJ8E-C1_BGA989~D
R1@
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
4
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
3
UH1I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
BD82HM76-SLJ8E-C1_BGA989~D
R1@
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
2
1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (8/8) VSS
PCH (8/8) VSS
PCH (8/8) VSS
LA-9104P
LA-9104P
LA-9104P
1
20 57Wednesday, August 29, 2012
20 57Wednesday, August 29, 2012
20 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 21
5
LCD PWR CTRL
+LCDVDD +5VALW
RV15
1 2
2
G
13
D
2
G
12
S
4 5
RV25
100K_0402_5%
12
PWR_SRC_ON
12
RV26
100K_0402_5%
13
D
QV7
2N7002BKW_SOT323-3~D
S
47K_0402_5%
RV17
56K_0402_5%
12
QV5
BSS138_SOT23~D
QV6
SI3457CDV-T1-E3_TSOP6~D
+INV_PWR_SRC_R
D
6
S
2
1
G
1
3
CV26
0.1U_0603_50V_X7R
2
B+ +INV_PWR_SRC
RV14
100_0402_1%
D D
2N7002BKW_SOT323-3~D
DV7
PCH_ENVDD<15>
EC_ENVDD<40>
C C
EN_INVPWR<40>
B B
PCH_ENVDD
EC_ENVDD
+LCDVDD
2
3
BAT54C-7-F_SOT23-3
1 2
@
RV28 0_0402_1%
RV31
0_0402_5%
12
@
+LCDVDD_R
1 2
13
D
QV3
S
1
RV18
10K_0402_5%
LCD backlight PWR CTRL
6
0mil
B+
CV25
1000P_0402_50V7K
1
2
2
G
4
+3VS
2
G
CV19
0.1U_0402_16V7K
1
2
60mil
RV27 0_0805_5%
RV24 0_0805_1%
@
1 2
1 3
1
2
1 2
W=60mils
S
QV4
AO3419L_SOT23-3
D
+LCDVDD
CV20
4.7U_0805_10V4Z
@
+LCDVDD
W=60mils
1
CV21
0.1U_0402_16V7K
2
+INV_PWR_SRC
3
BKOFF#<40>
USB20_CAM_P11<16>
USB20_CAM_N11<16>
MIC_DATA<33>
MIC_CLK<33>
CE_EN<40>
DBC_EN<40>
CH751H-40PT_SOD323-2~D
DV6
2 1
CH751H-40PT_SOD323-2~D
MIC_DATA
MIC_CLK MIC_CLK_R
RV30
0_0402_5%
CE_EN
DBC_EN DBC_EN_R
1 2
RV62 0_0402_5%
1 2
RV99 0_0402_5%
+3VS
@
@
DV5
21
WCM-2012HS-900T_4P
4
4
1
1
LV24
EMC@
1 2
RV210 0_0402_5%@
1 2
RV208 0_0402_5%@
12
1
@
CV29
470P_0402_50V7K~D
2
@
0_0402_5%
12
RV13
4.7K_0402_5%
3
3
2
2
RV100
12
12
DISPOFF#BKOFF#
10K_0402_5%
RV16
CE_EN_R
12
@
RV216
0_0402_5%
USB20_CAM_P11_R
USB20_CAM_N11_R
2
5P_0402_50V8C @
CE_EN_R only fo r reserve.
LVDS_DDC_CLK<15>
LVDS_DDC_DATA<15>
+LCDVDD+3VS
0.1U_0402_16V7K
0.1U_0402_16V7K
CV23
CV22
1
2
5P_0402_50V8C
CE_EN_R
DBC_EN_R
RV19 0_0402_1%@
RV20 0_0402_1%@
1
2
+3VS_CAM
10U_0805_10V6K
CV24
1
2
CV17
@
1 2
CV18
1 2
LVDS_A0-<15>
LVDS_A0+<15>
LVDS_A1-<15>
LVDS_A1+<15>
LVDS_A2-<15>
LVDS_A2+<15>
LVDS_ACLK-<15>
LVDS_ACLK+<15>
LVDS_B0-<15>
LVDS_B0+<15>
LVDS_B1-<15>
LVDS_B1+<15>
LVDS_B2-<15>
LVDS_B2+<15>
LVDS_BCLK-<15>
LVDS_BCLK+<15>
USB20_CAM_P11_R
USB20_CAM_N11_R
MIC_CLK_R
MIC_DATA
LCD_TEST<40>
12
12
W=60mils
=60mils
W
+LCDVDD
EDID_CLK_LCD
EDID_DATA_LCD
INV_PWM
DISPOFF#
+INV_PWR_SRC
1
LVDS Conn.
LVDS_A0LVDS_A0+
LVDS_A1LVDS_A1+
LVDS_A2LVDS_A2+
LVDS_ACLKLVDS_ACLK+
LVDS_B0LVDS_B0+
LVDS_B1LVDS_B1+
LVDS_B2LVDS_B2+
LVDS_BCLKLVDS_BCLK+
+3VS
LCD_TEST
JLVDS
1
1
2
2
G1
3
3
G2
4
4
G3
5
5
G4
6
6
G5
7
7
G6
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
STARC_107K40-000001-G2
CONN@
SP01000XE00
41
42
43
44
45
46
Place close to JLVDS
@
CV27
5P_0402_50V8C
1 2
LVDS_BCLK-
@
CV28
5P_0402_50V8C
1 2
LVDS_BCLK+
@
VGA_PWM<15>
1 2
RV29 0_0402_1%
100K_0402_5%
RV230
12
INV_PWM
1
@
2
CV30
680P_0402_50V7K
* Reserved for EMI/ESD/RF
need to close to JLVDS
+5VS
MIC_CLK_R
MIC_DATA
DV8
6
5
4
IP4223CZ6_SO6~D
@
V I/O
V BUS
V I/O
Ground
1
V I/O
V I/O
USB20_CAM_P11_R
2
3
USB20_CAM_N11_R
Webcam PWR CTRL
RV34
100K_0402_5%
A A
CMOS_ON#<40>
5
+3VS +3VS_CAM
+3VS
SI2301CDS-T1-GE3_SOT23-3
12
CV319
@
RV209
@
12
47K_0402_5%
0.1U_0402_16V7K @
@
1000P_0402_50V7K
1
2
CV31
RV231
1 2
@
0_0603_1%
S
G
2
+3VS_CAM
QV8
D
13
@
2
1
4
* Reserved for LCD
sequence tuning
+INV_PWR_SRC
+LCDVDD_R
RV33
100K_0402_5%
@
@
QV9A
2
+5VALW
12
@
12
61
RV32
820_0805_1%
3
@
QV9B
5
4
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Compal Secret Data
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LVDS/webcam
LVDS/webcam
LVDS/webcam
LA-9104P
LA-9104P
LA-9104P
1
21 57Wednesday, August 29, 2012
21 57Wednesday, August 29, 2012
21 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 22
5
4
3
2
1
W=40mils
D D
12
HDMI_A3N_VGA<15>
HDMI_A3P_VGA<15>
HDMI_A0N_VGA<15>
HDMI_A0P_VGA<15>
HDMI_A1N_VGA<15>
HDMI_A1P_VGA<15>
HDMI_A2N_VGA<15>
HDMI_A2P_VGA<15>
C C
B B
CV32 0.1U_0402_10V7K~D
12
CV33 0.1U_0402_10V7K~D
12
CV36 0.1U_0402_10V7K~D
12
CV37 0.1U_0402_10V7K~D
12
CV38 0.1U_0402_10V7K~D
12
CV39 0.1U_0402_10V7K~D
12
CV40 0.1U_0402_10V7K~D
12
CV41 0.1U_0402_10V7K~D
TMDS_TXCN
TMDS_TXCP
TMDS_TX0N
TMDS_TX0P
TMDS_TX1N
TMDS_TX1P
TMDS_TX2N
TMDS_TX2P
TMDS_TXCP
TMDS_TX0N TMDS_L_TX0N
TMDS_TX0P
RV45 680_0402_1%
RV44 680_0402_1%
12
RV51
12
12
0_0402_1%
1 2
@
RV53
100K_0402_5%
TMDS_TXCN
TMDS_TXCP
TMDS_TX0N
TMDS_TX0P
TMDS_TX1N
TMDS_TX1P
TMDS_TX2N
TMDS_TX2P
RV46 680_0402_1%
RV48 680_0402_1%
RV47 680_0402_1%
RV49 680_0402_1%
12
12
12
TMDS_TX1N
TMDS_TX1P
13
D
2
QV11
G
12
2N7002_SOT23-3
S
CV358 100P_0402_50V8J@
CV360 100P_0402_50V8J@
CV362 100P_0402_50V8J@
CV363 100P_0402_50V8J@
CV359 100P_0402_50V8J@
CV357 100P_0402_50V8J@
CV361 100P_0402_50V8J@
CV364 100P_0402_50V8J@
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
TMDS_TX2P TMDS_L_TX2P
TMDS_TX2N
RV42 680_0402_1%
RV43 680_0402_1%
12
12
+3VS
Place close to JHDMI1
1 2
RV35 0_0402_5%@
WCM-2012HS-900T_4P
1
1
4
4
LV7
1 2
RV37 0_0402_5%@
1 2
RV38 0_0402_5%@
WCM-2012HS-900T_4P
1
1
4
4
LV8
1 2
RV40 0_0402_5%@
1 2
RV41 0_0402_5%@
WCM-2012HS-900T_4P
1
1
4
4
LV9
1 2
RV50 0_0402_5%@
1 2
RV52 0_0402_5%@
WCM-2012HS-900T_4P
1
1
4
4
LV10
1 2
RV54 0_0402_5%@
EMC@
EMC@
EMC@
EMC@
2
2
3
3
2
2
3
3
2
2
3
3
2
2
3
3
TMDS_L_TXCNTMDS_TXCN
TMDS_L_TXCP
TMDS_L_TX0P
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TX2N
TMDS_L_TXCN
TMDS_L_TXCP
TMDS_L_TX0N
TMDS_L_TX0P
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TX2N
TMDS_L_TX2P
RV36 0_1206_5%~D
12
DV9
2 1
+5VS
3
NC
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
@
BAT1000-7-F_SOT23-3~D
CV349 3.3P_0402_50V8C~D
CV350 3.3P_0402_50V8C~D
CV351 3.3P_0402_50V8C~D
CV352 3.3P_0402_50V8C~D
CV353 3.3P_0402_50V8C~D
CV354 3.3P_0402_50V8C~D
CV355 3.3P_0402_50V8C~D
CV356 3.3P_0402_50V8C~D
FV1
12
1.5A_6V_1206L150PR~D
HDMI_HPLUG
DDC_DAT_HDMI
DDC_CLK_HDMI
TMDS_L_TXCN
TMDS_L_TXCP
TMDS_L_TX0N
TMDS_L_TX0P
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TX2N
TMDS_L_TX2P
+3VS
12
RV39
10K_0402_5%
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
DC232000B00
+VDISPLAY_VCC
CV34
1
1
CV35
2
2
10U_0603_6.3V6M
0.1U_0402_10V7K~D
JHDMI
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CK-
GND
CK_shield
GND
CK+
GND
D0-
GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
LOTES_ABA-HDM-022-K01
CONN@
20
21
22
23
20110805 EMI ADD20111024 EMI ADD
+3VS
+5VS
+3VS
@
DV10
QV12A
2
DMN66D0LDW-7_SOT363-6
61
PCH_SDVO_CTRLCLK<15>
PCH_SDVO_CTRLDATA<15>
A A
5
5
4
QV12B
DMN66D0LDW-7_SOT363-6
DDC_CLK_HDMI +5V_HDMI_DDC
3
DDC_DAT_HDMI
RV58 2.2K_0402_5%
RV60 2.2K_0402_5%
RB751V-40_SOD323-2
1 2
1 2
4
12
@
0_0402_1%
RV56
1 2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MMBT3904_NL_SOT23-3
HDMI_DET<15>
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
C
QV13
E
3 1
12
RV55
100K_0402_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
RV57
2
1 2
B
150K_0402_5%
@
RV59
200K_0402_5%
1
1 2
2
+3VS
HDMI_HPLUG
1
CV42
220P_0402_50V8J
2
DV11
BAV99-7-F_SOT23-3
@
3
ROYALTY HDMI W/LOGO46@
Part Number Description
HDMI W/Logo:RO0000002HM
RO0000002HM
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
HDMI
HDMI
HDMI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-9104P
LA-9104P
LA-9104P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
22 57Wednesday, August 29, 2012
22 57Wednesday, August 29, 2012
22 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 23
5
D D
4
UG1
3
GCLK-UMA@
2
1
SLG3NB244VTR TQFN 16P CLK GEN
SLG3NB244VTR SA000057I00 Intel-UMA
+RTCBATT
12
R787
330_0402_5%
+LAN_IO
0.1U_0402_16V7K
1
2
GCLK@
C8
+3VLP
0.1U_0402_16V7K
2
C5
GCLK@
22U_0805_6.3V6M
GCLK@
1
C9
2
+3VLP
+3VALW
+1.8VGS
+LAN_IO
+VCCP
1
CLK_X1
CLK_X2
SLG3NB274VTR_TQFN16_2X3
reserved for sw ing level adju stment
(close to U2)
+VCCP
GCLK@
GCLK@
12
GCLK@
12
+1.8VGS
1
C6
2
0.1U_0402_16V7K
Y1
1
OSC
3
OSC
25MHZ_10PF_7V25000014
0.1U_0402_16V7K
GCLK@
GND
GND
1
2
GCLK@
C7
2
4
Place close
to UG1.8
CLK_X1
CLK_X2
C C
Depop if GCLK
with UMA
C11
12P_0402_50V8J~D
C12
B B
12P_0402_50V8J~D
SLG3NB300VTR SA00005RS00 Intel-DIS
GCLK@
UG1
10
VBAT
VDD_RTC_OUT
15
+V3.3A
2
VDD
VDDIO_27M1127MHz
8
VDDIO_25M_A
3
VDDIO_25M_B
1
XTAL_IN
16
XTAL_OUT
GCLK-DIS@
R784
0_0402_5%
1 2
LAN_X1_R
@
4
25MHz_A
25MHz_B
GND1
GND2
7
32kHz
GND3
GND4
13
17
+RTCVCC
12
1
VGA_X1_R
LAN_X1_R
PCH_X1_R
2
1 2
10_0402_1%
1 2
1 2
14
9
12
6
5
R788
@
0_0402_5%
2.2U_0603_6.3V6K
C10
GCLK@
PCH_RTCX1_R <13>
GCLK@
R785
R782
GCLK@
33_0402_5%
R783
0_0402_5%
GCLK@
VGA_X1 <25>
PCH_X1 <14>
1
GCLK@
C14
5P_0402_50V8C
2
LAN_X1 <14>
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
GCLK
GCLK
GCLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-9104P
LA-9104P
LA-9104P
Date: Sheet of
Date: Sheet of
Date: Sheet
1
of
57Wednesday, August 29, 2012
23
57Wednesday, August 29, 2012
23
57Wednesday, August 29, 2012
23
1.0
1.0
1.0
Page 24
5
4
3
2
1
D D
PEG_HTX_C_GRX_P[7..0]<5>
PEG_HTX_C_GRX_N[7..0]<5>
C C
B B
CLK_PEG_VGA<14>
CLK_PEG_VGA#<14>
PEG_HTX_C_GRX_P[7..0]
PEG_HTX_C_GRX_N[7..0]
PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0
PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_N1
PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2
PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3
PEG_HTX_C_GRX_P4
PEG_HTX_C_GRX_N4
PEG_HTX_C_GRX_P5
PEG_HTX_C_GRX_N5
PEG_HTX_C_GRX_P6
PEG_HTX_C_GRX_N6
PEG_HTX_C_GRX_N7
DIS@
1 2
RV64 1K_0402_5%
GPU_RST#
GFX PCIE LANE REVERSAL
UV1A
AA38
PCIE_RX0P
Y37
PCIE_RX0N
Y35
PCIE_RX1P
W36
PCIE_RX1N
W38
PCIE_RX2P
V37
PCIE_RX2N
V35
PCIE_RX3P
U36
PCIE_RX3N
U38
PCIE_RX4P
T37
PCIE_RX4N
T35
PCIE_RX5P
R36
PCIE_RX5N
R38
PCIE_RX6P
P37
PCIE_RX6N
P35
PCIE_RX7P
N36
PCIE_RX7N
N38
PCIE_RX8P
M37
PCIE_RX8N
M35
PCIE_RX9P
L36
PCIE_RX9N
L38
PCIE_RX10P
K37
PCIE_RX10N
K35
PCIE_RX11P
J36
PCIE_RX11N
J38
PCIE_RX12P
H37
PCIE_RX12N
H35
PCIE_RX13P
G36
PCIE_RX13N
G38
PCIE_RX14P
F37
PCIE_RX14N
F35
PCIE_RX15P
E37
PCIE_RX15N
12
DIS@
RV66
100K_0402_5%
AB35
PCIE_REFCLKP
AA36
PCIE_REFCLKN
AH16
PWRGOOD
AA30
PERSTB
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
HAMES XT M2
T
CLK_PEG_VGA
CLK_PEG_VGA#
CLOCK
THR1@
SA00004WI0L
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCI EXPRESS INTERFACE
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
CALIBRATION
PCIE_CALRP
PCIE_CALRN
PEG_GTX_C_HRX_P[7..0]
PEG_GTX_C_HRX_N[7..0]
Y33
PCIE_CRX_C_GTX_P0
Y32
PCIE_CRX_C_GTX_N0
W33
PCIE_CRX_C_GTX_P1
W32
PCIE_CRX_C_GTX_N1 PEG_GTX_C_HRX_N1
U33
PCIE_CRX_C_GTX_P2
U32
PCIE_CRX_C_GTX_N2
U30
PCIE_CRX_C_GTX_P3
U29
PCIE_CRX_C_GTX_N3 PEG_GTX_C_HRX_N3
T33
PCIE_CRX_C_GTX_P4
T32
PCIE_CRX_C_GTX_N4 PEG_GTX_C_HRX_N4
T30
PCIE_CRX_C_GTX_P5
T29
PCIE_CRX_C_GTX_N5 PEG_GTX_C_HRX_N5
P33
PCIE_CRX_C_GTX_P6
P32
PCIE_CRX_C_GTX_N6
P30
PCIE_CRX_C_GTX_P7
P29
PCIE_CRX_C_GTX_N7 PEG_GTX_C_HRX_N7
N33
N32
N30
N29
L33
L32
L30
L29
K33
K32
J33
J32
K30
K29
H33
H32
1 2
RV198 1.69K_0402_1%~DMS@
Y30
Y29
1 2
1 2
1 2
PEG_GTX_C_HRX_P[7..0] <5>
PEG_GTX_C_HRX_N[7..0] <5>
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
+1.0VGS
RV631.27K_0402_1% TH@
RV652K_0402_1% TH@
+1.0VGS
RV2031K_0402_1% MS@
CV43220nF_0402_16V7K DIS@
CV44220nF_0402_16V7K DIS@
CV45220nF_0402_16V7K DIS@
CV46220nF_0402_16V7K DIS@
CV47220nF_0402_16V7K DIS@
CV48220nF_0402_16V7K DIS@
CV49220nF_0402_16V7K DIS@
CV50220nF_0402_16V7K DIS@
CV51220nF_0402_16V7K DIS@
CV52220nF_0402_16V7K DIS@
CV53220nF_0402_16V7K DIS@
CV54220nF_0402_16V7K DIS@
CV55220nF_0402_16V7K DIS@
CV56220nF_0402_16V7K DIS@
CV57220nF_0402_16V7K DIS@
CV58220nF_0402_16V7K DIS@
PEG_GTX_C_HRX_P0
PEG_GTX_C_HRX_N0
PEG_GTX_C_HRX_P1
PEG_GTX_C_HRX_P2
PEG_GTX_C_HRX_N2
PEG_GTX_C_HRX_P3
PEG_GTX_C_HRX_P4
PEG_GTX_C_HRX_P5
PEG_GTX_C_HRX_P6
PEG_GTX_C_HRX_N6
PEG_GTX_C_HRX_P7PEG_HTX_C_GRX_P7
Install 2K for Thames/Seymour
LVDS Interface
UV1G
LVDS CONTROL
TXCLK_UP_DP F3P
TXCLK_UN_D PF3N
TXOUT_U0P_D PF2P
TXOUT_U0N_ DPF2N
TXOUT_U1P_D PF1P
TXOUT_U1N_ DPF1N
TXOUT_U2P_D PF0P
TXOUT_U2N_ DPF0N
LVTMDP
TXCLK_LP_DPE 3P
TXCLK_LN_DP E3N
TXOUT_L0P_D PE2P
TXOUT_L0N_D PE2N
TXOUT_L1P_D PE1P
TXOUT_L1N_D PE1N
TXOUT_L2P_D PE0P
TXOUT_L2N_D PE0N
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
THR1@
RV61 0_0402_5%@
+3VGS
5
DGPU_HOLD_RST#<16>
PCH_PLTRST#<16>
1
IN1
2
IN2
3
AK27
VARY_BL
AJ27
DIGON
AK35
AL36
AJ38
AK37
AH35
AJ36
AG38
AH37
AF35
TXOUT_U3P
AG36
TXOUT_U3N
AP34
AR34
AW37
AU35
AR37
AU39
AP35
AR35
AN36
TXOUT_L3P
AP37
TXOUT_L3N
12
VCC
4
GPU_RST#
OUT
GND
UV13
MC74VHC1G08DFT2G_SC70-5
DIS@
Place CV326 Close to UV13
+3VGS
2
CV326
0.1U_0402_25V6K
1
DIS@
UV1
THR3@
SA00004WI1L
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
UV1
UV1
MSR1@
CHR1@
SA00005X10L
4
UV1
CHR3@
Chelsea Pro
A A
MARS-PRO_FCBGA962~D
MARS Pro
UV1
Chelsea Pro
5
MSR3@
SA00005X10L
MARS-PRO_FCBGA962~D
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ATI_ThamesXT_M2_PCIE/LVDS
ATI_ThamesXT_M2_PCIE/LVDS
ATI_ThamesXT_M2_PCIE/LVDS
LA-9104P
LA-9104P
LA-9104P
1
24 57Wednesday, August 29, 2012
24 57Wednesday, August 29, 2012
24 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 25
64MX16 (1G)
64MX16 (1G)
64MX16 (1G)
128Mx16 (2G)
128Mx16 (2G)
*
128Mx16 (2G)
+3VGS
+3VGS
LV14
DIS@
LV15
DIS@
BLM15BD121SN1D_0402
RV97
1M_0402_5%
YV1
27MHZ_10PF_7V2700005 0
3
3
12
GND
4
5
+1.8VGS
STRAPS
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
(Thames 75mA)
12
1
CV82
2
DIS@
10U_0603_6.3V6M
(Thames 125mA)
0.935V@ Mars Pro
12
1
CV86
2
DIS@
10U_0603_6.3V6M
XTAL-DIS@
XTALINXTALOUT
XTAL-DIS@
1
GND
2
PEG_A_CLKRQ#<14>
5
RV67 10K_0402_5%X76@
1 2
RV68 10K_0402_5%X76@
1 2
RV69 10K_0402_5%X76@
1 2
RV70 10K_0402_5%X76@
1 2
RV71 10K_0402_5%X76@
1 2
RV72 10K_0402_5%X76@
1 2
Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2
K4W1G1646G-BC11
Samsung 1GB
SA00004GS0L(R1)
SA00004GS1L(R3)
H5TQ1G63DFR-11C
Hynix 1GB
SA000041S3L
MT41J64M16JT-107G:G
Micron 1GB
SA00004Y20L(R1)
SA00004Y21L(R3)
K4W2G1646E-BC11
Samsung 2GB
SA00005SH0L(R1)
SA00005SH1L(R3)
H5TQ2G63DFR-11C
Hynix 2GB
SA00003YO2L(R1)
SA00003YO3L(R3)
H5TQ2G63DFR-11C
Micron 2GB
SA00005XB0L(R1)
SA00005XB1L(R3)
VGA_SMB_DA2
VGA_SMB_CK2
RV7510K_0402_5% TH@
GPU_GPIO0
RV7610K_0402_5% TH@
GPU_GPIO1
RV7710K_0402_5% @
GPU_GPIO2
RV7810K_0402_5% @
AC_BATT
RV7910K_0402_5% @
GPU_GPIO8
RV8010K_0402_5% @
GPU_GPIO9
RV8110K_0402_5% TH@
GPU_GPIO11
RV8210K_0402_5% @
GPU_GPIO12
RV8310K_0402_5% @
GPU_GPIO13
RV8510K_0402_5% @
GPIO24_TRSTB
RV8610K_0402_5% @
GPIO25_TDI
RV8710K_0402_5% @
GPIO27_TMS
RV8810K_0402_5% @
GPIO26_TCK
+DPLL_PVDD
1
1
CV83
CV84
2
2
1U_0402_6.3V6K
DIS@
DIS@
0.1U_0402_16V7K
+DPLL_VDDC
1
1
CV87
CV88
2
2
1U_0402_6.3V6K
DIS@
DIS@
0.1U_0402_16V7K
1
12
CV95
10P_0402_50V8J
XTAL-DIS@
Need to CHECK CIS symbol
VRAM_ID0
VRAM_ID1
VRAM_ID2
RV69RV68
1
0 0
RV67 RV70 RV72
1
0
RV67 RV69 RV71
1 1
RV68
RV69 RV71
0 1 1
RV67 RV70 RV71
01
TH@
1 2
RV251 0_0402_5%
TH@
1 2
RV252 0_0402_5%
+1.8VGS
DIS@
RV93 49 9_0402_1%
DIS@
RV95 24 9_0402_1%
CV81 0.1U_0402_16V7K
DIS@
+3VGS
12
RV235
10K_0402_5%
@
TS_FDO
12
RV236
10K_0402_5%
MS@
Add 12/6 for MLPS
(Thames 5mA)
DIS@
LV16
1 2
+1.8VGS
BLM15BD121SN1D_0402
+3VGS
+3VGS
2
G
1 3
D
S
@
2N7002_SOT23-3
QV28
RV200
12
0_0402_5%
@
RV72
0
1
1
VDDCI_VID<54>
GPU_VID5<53>
GPU_VID4<53>
GPU_VID3<53>
GPU_VID2<53>
RV89 10K_040 2_5%@
1 2
GPU_VID1<53>
T78
T79
0.60 V level, Please
VREFG Divider ans
cap close to ASIC
12
12
12
1 2
RV248
0_0402_1%
XTALIN
Voltage Swing: 1.8 V
(1.8V@20mA TSVDD)
CV91
DIS@
12
RV199
2.2K_0402_5%
@
VGA_CLKREQ#_R
ZZZ4
X7644031L10
ZZZ3
X7644031L11
ZZZ2
X7644031L12
ZZZ1
X7644031L13
CV94
10P_0402_50V8J
XTAL-DIS@
Sam1GR3@
Micron1GR3@
Sam2GR3@ZZZ7
Hyn2GR3@
+1.8VGS
BLM15BD121SN1D_0402
+1.0VGS
ZZZ8
Sam1GR1@
X7644031L01
ZZZ5
Micron1GR1@
X7644031L02
D D
Sam2GR1@
X7644031L05
ZZZ6
Hyn2GR1@ QV14A
X7644031L06
C C
B B
A A
@
1
2
10U_0603_6.3V6M
VRAM_ID0
VRAM_ID1
VRAM_ID2
PT
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
VGA_SMB_DA2_R
VGA_SMB_CK2_R
AC_BATT
VDDCI_VID
GPU_GPIO8
GPU_GPIO9
GPU_VID5
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
GPU_VID4
GPU_VID3
GPU_VID2
THM_ALERT#
GPU_VID1
GPIO21_BBEN
VGA_CLKREQ#_R
GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO
20mil
+VREFG_GPU
+VREFG_GPU
20mil
+DPLL_PVDD
DPLL_PVSS
20mil
+DPLL_VDDC
XTALIN
XTALOUT
GPU_THERMAL_D+
GPU_THERMAL_D-
TS_FDO
+TSVDD
1
CV92
CV93
2
DIS@
DIS@
1U_0402_6.3V6K
4
UV1B
MUTI GFX
AR8
DVPCNTL_MVP_0
AU8
DVPCNTL_MVP_1
AP8
DVPCNTL_0
AW8
DVPCNTL_1
AR3
DVPCNTL_2
AR1
DVPCLK
AU1
DVPDATA_0
AU3
DVPDATA_1
AW3
DVPDATA_2
AP6
DVPDATA_3
AW5
DVPDATA_4
AU5
DVPDATA_5
AR6
DVPDATA_6
AW6
DVPDATA_7
AU6
DVPDATA_8
AT7
DVPDATA_9
AV7
DVPDATA_10
AN7
DVPDATA_11
AV9
DVPDATA_12
AT9
DVPDATA_13
AR10
DVPDATA_14
AW10
DVPDATA_15
AU10
DVPDATA_16
AP10
DVPDATA_17
AV11
DVPDATA_18
AT11
DVPDATA_19
AR12
DVPDATA_20
AW12
DVPDATA_21
AU12
DVPDATA_22
AP12
DVPDATA_23
AJ21
SWAPLOCKA
AK21
SWAPLOCKB
I2C
AK26
SCL
AJ26
SDA
GENERAL PURPOSE I/O
AH20
GPIO_0
AH18
GPIO_1
AN16
GPIO_2
AH23
GPIO_3_SMBDATA
AJ23
GPIO_4_SMBCLK
AH17
GPIO_5_AC_BATT
AJ17
GPIO_6
AK17
GPIO_7_BLON
AJ13
GPIO_8_ROMSO
AH15
GPIO_9_ROMSI
AJ16
GPIO_10_ROMSCK
AK16
GPIO_11
AL16
GPIO_12
AM16
GPIO_13
AM14
GPIO_14_HPD2
AM13
GPIO_15_PWRCNTL_0
AK14
GPIO_16
AG30
GPIO_17_THERMAL_INT
AN14
GPIO_18_HPD3
AM17
GPIO_19_CTF
AL13
GPIO_20_PWRCNTL_1
AJ14
GPIO_21_BB_EN
AK13
GPIO_22_ROMCSB
AN13
GPIO_23_CLKREQB
AM23
JTAG_TRSTB
AN23
JTAG_TDI
AK23
JTAG_TCK
AL24
JTAG_TMS
AM24
JTAG_TDO
AJ19
GENERICA
AK19
GENERICB
AJ20
GENERICC
AK20
GENERICD
AJ24
GENERICE_HPD4
AH26
GENERICF_HPD5
AH24
GENERICG_HPD6
AK24
HPD1
AH13
VREFG
AM32
DPLL_PVDD
AN32
DPLL_PVSS
AN31
DPLL_VDDC
AV33
XTALIN
AU34
XTALOUT
AW34
XO_IN
AW35
XO_IN2
AF29
DPLUS
AG29
DMINUS
AK32
TS_FDO
AL31
TS_A/NC
10mil
AJ32
TSVDD
AJ33
TSVSS
1
216-0833000-A1 1-THAMES-XT-M2_FCBGA962~D
2
THR1@
0.1U_0402_16V7K
VGA_X1<23>
4
PLL/CLOCK
THERMAL
close to YV1
1 2
RV232 0_0 402_5%
GCLK-DIS@
TXCAP_DPA3P
TXCAM_DPA3N
TX0P_DPA2P
TX0M_DPA2N
DPA
TX1P_DPA1P
TX1M_DPA1N
TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
TX3P_DPB2P
TX3M_DPB2N
DPB
TX4P_DPB1P
TX4M_DPB1N
TX5P_DPB0P
TX5M_DPB0N
TXCCP_DPC3P
TXCCM_DPC3N
TX0P_DPC2P
TX0M_DPC2N
DPC
TX1P_DPC1P
TX1M_DPC1N
TX2P_DPC0P
TX2M_DPC0N
TXCDP_DPD3P
TXCDM_DPD3N
TX3P_DPD2P
TX3M_DPD2N
DPD
TX4P_DPD1P
TX4M_DPD1N
TX5P_DPD0P
TX5M_DPD0N
DAC1
HSYNC
VSYNC
AVSSQ
VDD1DI
VSS1DI
R2B/NC
G2B/NC
B2B/NC
COMP/NC
DAC2
H2SYNC/GENLK_CLK
V2SYNC/GENLK_VSYNC
VDD2DI/NC
VSS2DI/NC
A2VDD/NC
A2VDDQ/NC
A2VSSQ/TSVSSQ
R2SET/NC
DDC/AUX
DDC1CLK
DDC1DATA
AUX1P
AUX1N
DDC2CLK
DDC2DATA
AUX2P
AUX2N
DDCCLK_AUX3P
DDCDATA_AUX3N
DDCCLK_AUX4P
DDCDATA_AUX4N
DDCCLK_AUX5P
DDCDATA_AUX5N
DDC6CLK
DDC6DATA
DDCCLK_AUX7P
DDCDATA_AUX7N
XTALIN
RSET
AVDD
R2/NC
G2/NC
B2/NC
3
AU24
AV23
AT25
AR24
AU26
AV25
AT27
AR26
AR30
AT29
AV31
AU30
AR32
AT31
AT33
AU32
AU14
AV13
AT15
AR14
AU16
AV15
AT17
AR16
AU20
AT19
AT21
AR20
AU22
AV21
AT23
AR22
AD39
R
AD37
RB
AE36
G
AD35
GB
AF37
B
AE38
BB
AC36
AC38
AB34
RV84 499_04 02_1%DIS@
1 2
10mil
AD34
+AVDD
AE34
10mil
AC33
+VDD1DI
AC34
AC30
AC31
AD30
AD31
PS_1
0.1U_0402_16V7K
AF30
AF31
AC32
C/NC
AD32
Y/NC
AF32
AD29
GENLK_CLK
AC29
GENLK_VSYNC
AG31
PS_2
AG32
AG33
AD33
PS_3
AF33
AA29
AM26
AN26
AM27
AL27
AM19
AL19
AN20
AM20
AL30
AM30
AL29
AM29
AN21
AM21
AJ30
AJ31
AK30
AK29
2N7002DW-7-F_SOT363-6
ACIN<15,40,45,46 >
ACIN_65W<40>
(1.8V@65mA AVDD)
(1.8V@100mA VDD1DI)
BLM15BD121SN1D_0402
1
1
1
CV80
CV78
CV79
2
2
2
1U_0402_6.3V6K
DIS@
DIS@
DIS@
10U_0603_6.3V6M
RV246
1 2
+DPLL_PVDD
0_0402_5%@
RV247
1 2
DPLL_PVSS
0_0402_5%@
T80
T81
TH@
1 2
RV207 0_0402_5%
NC_TSVSSQ should be tied to GND on Thames/Seymour
3
4.7K_0402_5%
DIS@
1 2
RV250
0_0402_5%
@
100mA
1 2
LV13
DIS@
RV74
+3VGS
12
DIS@
2N7002DW-7-F_SOT363-6
61
2
+1.8VGS
PACIN#
+3VGS
12
RV73
10K_0402_5%
QV14B
3
DIS@
5
4
1
1
CV77
CV76
CV75
2
2
1U_0402_6.3V6K
DIS@
DIS@
DIS@
0.1U_0402_16V7K
10U_0603_6.3V6M
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE
GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
STRAPS
RSVD
RSVD
DIS@
AC_BATT
RSVD
BIOS_ROM_EN
VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS
RSVD
RSVD
AMD RESERVED CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL
RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND
NOT CONFLICT DURING RESET
GPIO21 GPIO2
+1.8VGS
65mA
1 2
LV12
DIS@
BLM15BD121SN1D_0402
1
2
VGA_SMB_CK2
VGA_SMB_DA2
VGA Thermal Sensor ADM1032ARMZ
Closed to GPU
GPU_THERMAL_D+ VGA_SMB_DA2
GPU_THERMAL_D-
RV98 4.7K_ 0402_5%
Issued Date
Issued Date
Issued Date
2
GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB
GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS
GPIO2
GPIO8
GPIO9 VGA ENABLEDBIF_VGA DIS
GPIO21
GPIO_22_ROMCSB
GPIO[13:11]ROMIDCFG(2:0)
H2SYNC
GENERICC
HSYNCAUD[1]
VSYNCAUD[0]
H2SYNC GENERICC
PS_1 PS_2 PS_3
CV329
@
0.68U_0402_10V
Add 12/6 for MLPS
TX_PWRS_ENB G PIO0
+3VGS
12
12
DIS@
RV90
10K_0402_5%
0.1U_0402_16V7K
CV89
1 2
MS@
2200P_0402_50V7K
+3VGS
1 2
MS@
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2
DESCRIPTION OF DEFAULT SETTINGSPIN
Advertises PCIE speed
when compliance test
RESERVED
RESERVED
ENABLE EXTERNAL BIOS ROM
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI
GPIO8
1
2
+1.8VGS
12
RV237
8.45K_0402_1%
@
12
RV238
4.75K_0402_1%
MS@
+1.8VGS +1.8VGS
12
12
1
CV331
2
MS@
0.68U_0402_10V
0402 1% resistors are required.
Transmitter Power Saving Enable
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
PCI Express Transmitter De-emphasis Enable
GPIO1TX_DEEMPH_EN
0: Tx de-emphasis diabled for mobile mode
1: Tx de-emphasis enabled (Defailt setting for desktop)
Internal VGA Thermal Sensor
+3VGS
DIS@
RV91
10K_0402_5%
2
61
5
QV15A
DMN66D0LDW-7_SOT363-6
RV92 0_ 0402_5%@
1 2
1 2
+3VGS
MS@
2
1
1
2
3
ADM1032ARMZ-2REEL_MSOP8
Address:100_1101
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
DIS@
4
QV15B
RV94 0_ 0402_5%@
UV14
VDD
D+
ALERT#
D-
THERM#4GND
MS@
SDATA
3
DIS@
8
SCLK
7
6
5
DMN66D0LDW-7_SOT363-6
CV85
RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
0: 50% swing
1: Full swing
0: disable
1: enable
0: 2.5GT/s
1: 5GT/s
0: disable
1: enable
RV239
10K_0402_1%
@
RV240
4.75K_0402_1%
MS@
EC_SMB_CK2 <40>
EC_SMB_DA2 <40>
+3VGS
RV96
MS@
4.7K_0402_5%
1 2
1
2
1
RECOMMENDED
SETTINGS
X
X
0
0
0
0
X
XXX
0
0
0
11
12
RV241
8.45K_0402_1%
X76@
12
1
CV333
2
@
0.68U_0402_10V
VGA_SMB_CK2
THM_ALERT#
CV90
10P_0402_50V8J
@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Mars Pro
MLPs
RV242
2K_0402_1%
X76@
Hynix
Samsung
Micron
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
ATI_ThamesXT_M2_Main_MSIC
ATI_ThamesXT_M2_Main_MSIC
ATI_ThamesXT_M2_Main_MSIC
LA-9104P
LA-9104P
LA-9104P
1
RV241 RV242 Bits [3:1]
NC 4.75k
8.45k
4.75k NC
000
2k
001
111
25 57Wednesday, August 29, 2012
25 57Wednesday, August 29, 2012
25 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 26
5
4
3
2
1
+3VGS
RV101
10K_0402_5%
@
DV12
RV233
@
2
G
20K_0402_5%
DIS@
1 2
13
D
QV21
2N7002K_SOT23-3
DIS@
S
DIS@
RV105
+3VGS
@
D D
for PX4.0
PX_EN<27>
5.11K_0402_1%
PXS_PWREN PX_MODE
fo
r PX4.0 and PX5.0
C C
Note:
PX4.0 +VGA_CORE,VDDCI,+1.5VGS ON
PX4.0 +3VGS, +1.0VGS,+1.8VGS OFF
PX5.0 +3VGS,+VGA_CORE,VDDCI,+1.5VGV,+1.0VGS,+1.8VGS OFF
12
RV104
DIS@
RB751V-40_SOD323-2
1 2
1 2
0_0402_1%
Circuits to support BACO
+3VGS
CV99
0.1U_0402_16V7K
5
1
IN1
2
IN2
12
1
CV100
1U_0603_10V6K
2
RUNPWROK
3
1 2
RV102 0_0402_1%
for PX5.0
@
1 2
VCC
4
UV16
PX_MODE
@
@
OUT
GND
MC74VHC1G08DFT2G_SC70-5
PX_MODE <40,53,54>
PX_MODE=1 for Normal Operation
PX_MODE=0 for BACO mode to shut down power rails expcept VDDR3,PCIE_VDDC and 1.8V rail
+3VALW
12
DIS@
RV109
100K_0402_5%
PXS_PWREN<16,53>
PXS_PWREN
PXS_PWREN#
13
D
2
QV25
2N7002_SOT23-3
S
DIS@
G
+1.5VGPU TO +1.5VGS
RV112
DIS@
2
CV104
DIS@
B+_BIAS
+1.5VGPU
2 1
2MM
UV17
DIS@
AO4304L_SO8
8
7
1
6
5
2
12
DIS@
20K_0402_5%
RV113
6
DIS@
QV27A
DMN66D0LDW-7_SOT363-6
1
RV115
DIS@
2M_0402_5%~D
Power Seguence of Thames and Mars Pro
B B
A A
+3VGS
VGA_CORE
+
+VDDCI
+1.5VGS
+1.0VGS
+1.8VGS
<20ms
PX_MODE
RV117
DIS@
100K_0402_5%
10U_0603_6.3V6M
DIS@
RV114
100K_0402_5%
5
12
+3VALW
CV309
DIS@
12
34
DIS@
QV27B
10U_0603_6.3V6M
1
2
300K_0402_5%
PX_MODE#
DMN66D0LDW-7_SOT363-6
+1.5VGS
JP9
@
1
10U_0603_6.3V6M
2
1
3
CV105
DIS@
2
4
1
CV107
DIS@
0.1U_0603_25V7K
2
1 2
Switch circuits in BACO desingns for Thanes/Seymour only
55mA@1.0V, in BACO mode
60mil
TH@
1 2
12
RV213
470_0603_5%
@
13
D
S
0_0402_5%@
12
13
D
S
RV110
1 2
+VGA_CORE+1.0VGS +BIF_VDDC
2
G
RV106
470_0603_5%
@
2
G
QV23
2N7002K_SOT23-3
@
0_0402_5%@
1
CV106
DIS@
1U_0603_10V6K
2
PX_MODE#
PXS_PWREN#
12
RV111
470_0603_5%
13
D
2
G
QV26
S
2N7002K_SOT23-3
@
1 2
RV116 0_0402_5%
PXS_PWREN
60mil
MS@
1 2
RV103 0_0805_5%
RV234 0_0603_5%~D
for PX5.0
1
CV97
22U_0805_6.3V6MDIS@
2
+1.8VS TO +1.8VGS
+1.8VS
B+_BIAS
12
330K_0402_5%
RV128
DIS@
13
D
2
G
S
2N7002H_SOT23-3
@
@
+5VALW
20K_0402_5%
2 1
DMN3030LSS-13_SOP8L-8
8
7
5
DIS@
1 2
RV211
470K_0402_5%DIS@
QV10
DIS@
DIS@
RV107
2
G
@
1 2
1 2
1K_0402_5%
13
D
S
2N7002H_SOT23-3
+1.8VGS
J92MM
UV35
1
2
36
1
CV320
4
RV212
0_0402_5%
@
10U_0805_10V6K
2
DIS@
1
CV2
0.1U_0603_25V7K
DIS@
2
+3.3VS TO +3.3VGS
+3VS +3VGS
JP8
@
2 1
2MM
3 1
QV22
DIS@
RV108
QV24
DIS@
DIS@
AP2301GN-HF_SOT23-3
2
DIS@
1
CV103
0.1U_0603_25V7K
2
1
CV321
1U_0603_10V6K
2
DIS@
2N7002H_SOT23-3
PXS_PWREN#
10U_0603_6.3V6M
1
CV101
DIS@
2
PXS_PWREN#
QV29
@
1 2
RV214
1U_0603_10V6K
1
CV102
DIS@
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ATI_ThamesXT_M2_BACO POWER
ATI_ThamesXT_M2_BACO POWER
ATI_ThamesXT_M2_BACO POWER
LA-9104P
LA-9104P
LA-9104P
1
of
26 57Wednesday, August 29, 2012
26 57Wednesday, August 29, 2012
26 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 27
5
D D
+1.8VGS
+1.0VGS
C C
+1.0VGS
B B
RV201
MS@
2K_0402_1%
A A
(Thames 220mA)
1.0V@220mA DPCD_VDD10)
0.935V@Mars Pro
1 2
@
RV121
0_0402_1%
(Thames 220mA)
1.0V@240mA DPEF_VDD10)
0.935V@Mars Pro
1 2
@
RV126
0_0402_1%
+1.8VGS
12
RV243
8.45K_0402_1%
MS@
12
RV201
0_0402_5%
TH@
1
CV117
@
2
10U_0603_6.3V6M
+1.8VGS
CV123
@
(Thames 330mA)
1.8V@300mA DPCD_VDD18)
1 2
@
RV119
0_0402_1%
+DPCD_VDD10
1
CV119
CV118
@
@
2
1U_0402_6.3V6K
(Thames 330mA)
1 2
0_0402_1%
+DPEF_VDD10
1
CV124
@
2
1U_0402_6.3V6K
10U_0603_6.3V6M
CV335
@
1
CV111
@
2
10U_0603_6.3V6M
+DPCD_VDD10
1
2
0.1U_0402_16V7K
1.8V@300mA DPEF_VDD18)
@
RV124
CV120
@
+DPEF_VDD10
1
1
CV125
@
2
2
0.1U_0402_16V7K
PS_0
1
2
0.68U_0402_10V
Do not install for Heathrow/Mars Pro
PS_0 Should be tied to GND on Thames/Seymour
1
1
CV113
CV112
@
@
2
2
1U_0402_6.3V6K
0.1U_0402_16V7K
+DPEF_VDD18
1
1
CV122
CV121
@
@
2
2
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
+DPEF_VDD18
+DPEF_VDD10
Thames/Seymour Only
+DPCD_VDD18
+DPCD_VDD10
+DPCD_VDD18
+DPCD_VDD10
+DPEF_VDD18
+DPEF_VDD10
1
2
20mil
20mil
PS_0
150_0402_1%
20mil
+DPCD_VDD18
20mil
20mil
20mil
12
RV122150_0402_1% DIS@
20mil
20mil
12
RV127
DIS@
4
UV1H
DP C/D POWER
AP20
DPCD/DPC_VDD 18#1
AP21
DPCD/DPC_VDD 18#2
AP13
DPCD/DPC_VDD 10#1
AT13
DPCD/DPC_VDD 10#2
AN17
DP/DPC_VSSR#1
AP16
DP/DPC_VSSR#2
AP17
DP/DPC_VSSR#3
AW14
DP/DPC_VSSR#4
AW16
DP/DPC_VSSR#5
AP22
DPCD/DPD_VDD 18#1
AP23
DPCD/DPD_VDD 18#2
AP14
DPCD/DPD_VDD 10#1
AP15
DPCD/DPD_VDD 10#2
AN19
DP/DPD_VSSR#1
AP18
DP/DPD_VSSR#2
AP19
DP/DPD_VSSR#3
AW20
DP/DPD_VSSR#4
AW22
DP/DPD_VSSR#5
AW18
DPCD_CALR
DP E/F POWER
AH34
DPEF/DPE_VDD18# 1
AJ34
DPEF/DPE_VDD18# 2
AL33
DPEF/DPE_VDD10# 1
AM33
DPEF/DPE_VDD10# 2
AN34
DP/DPE_VSSR#1
AP39
DP/DPE_VSSR#2
AR39
DP/DPE_VSSR#3
AU37
DP/DPE_VSSR#4
AF34
DPEF/DPF_VDD18# 1
AG34
DPEF/DPF_VDD18# 2
AK33
DPEF/DPF_VDD10# 1
AK34
DPEF/DPF_VDD10# 2
AF39
DP/DPF_VSSR#1
AH39
DP/DPF_VSSR#2
AK39
DP/DPF_VSSR#3
AL34
DP/DPF_VSSR#4
AM34
DP/DPF_VSSR#5
AM39
DPEF_CALR
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
THR1@
DP A/B POWER
DPAB/DPA_VDD18#1
DPAB/DPA_VDD18#2
DPAB/DPA_VDD10#1
DPAB/DPA_VDD10#2
DP/DPA_VSSR#1
DP/DPA_VSSR#2
DP/DPA_VSSR#3
DP/DPA_VSSR#4
DP/DPA_VSSR#5
DPAB/DPB_VDD18#1
DPAB/DPB_VDD18#2
DPAB/DPB_VDD10#1
DPAB/DPB_VDD10#2
DP/DPB_VSSR#1
DP/DPB_VSSR#2
DP/DPB_VSSR#3
DP/DPB_VSSR#4
DP/DPB_VSSR#5
DPAB_CALR
DP PLL POWER
DPAB_VDD18/DPA_PVDD
DP_VSSR/DPA_PVSS
DPAB_VDD18/DPB_P VDD
DP_VSSR/DPB_PVSS
DPCD_VDD18/D PC_PVDD
DP_VSSR/DPC_PVSS
DPCD_VDD18/D PD_PVDD
DP_VSSR/DPD_PVSS
DPEF_VDD18/DPE_ PVDD
DP_VSSR/DPE_PVSS
DPEF_VDD18/DPF_ PVDD
DP_VSSR/DPF_PVSS
20mil
130mA
AN24
AP24
20mil
110mA
AP31
AP32
AN27
AP27
AP28
AW24
AW26
20mil
AP25
AP26
20mil
AN33
AP33
AN29
AP29
AP30
AW30
AW32
AW28
20mA
AU28
AV27
20mA
AV29
AR28
+DPCD_VDD18
20mA
AU18
AV17
20mA
AV19
AR18
20mA
AM37
AN38
20mA
AL38
AM35
MLPS Bit
PS0:
PS1:
PS2:
PS3:
(Thames 330mA)
1.8V@300mA DPAB_VDD18)
+DPAB_VDD18
1
CV108
CV109
2
@
@
1U_0402_6.3V6K
0.1U_0402_16V7K
(1
.0V@220mA DPAB_VDD10)
0.935V@Mars Pro
+DPAB_VDD10
1
CV115
CV114
@
@
2
1U_0402_6.3V6K
0.1U_0402_16V7K
+DPAB_VDD18
130mA
+DPAB_VDD10
110mA
1 2
RV123 150_0402_1%DIS@
+DPAB_VDD18
10mil
+DPAB_VDD18
10mil
10mil
+DPCD_VDD18
10mil
+DPEF_VDD18
10mil
+DPEF_VDD18
10mil
11001
11000
00000
11000
3
+DPAB_VDD18
1 2
1
CV110
2
@
10U_0603_6.3V6M
1
@
2
10U_0603_6.3V6M
AMD recommended setting
R_PU R_PD Cstrap
RV243=8.45K
RV237=NC
RV239=NC
RV241=NC
RV118 0_0402_1%
1
2
(Thames 330mA)
+DPAB_VDD10
RV120 0_0402_1%
1
CV116
2
RV201=2K CV335=NC
RV238=4.75K CV329=NC
RV240=4.75K CV331=0.68u
RV242=4.75K CV333=NC
1 2
2
UV1F
AB39
PCIE_VSS#1
E39
PCIE_VSS#2
F34
PCIE_VSS#3
F39
PCIE_VSS#4
G33
PCIE_VSS#5
G34
PCIE_VSS#6
H31
PCIE_VSS#7
H34
PCIE_VSS#8
H39
PCIE_VSS#9
J31
PCIE_VSS#10
J34
PCIE_VSS#11
K31
PCIE_VSS#12
K34
PCIE_VSS#13
K39
PCIE_VSS#14
L31
PCIE_VSS#15
+1.8VGS
@
+1.0VGS
@
L34
PCIE_VSS#16
M34
PCIE_VSS#17
M39
PCIE_VSS#18
N31
PCIE_VSS#19
N34
PCIE_VSS#20
P31
PCIE_VSS#21
P34
PCIE_VSS#22
P39
PCIE_VSS#23
R34
PCIE_VSS#24
T31
PCIE_VSS#25
T34
PCIE_VSS#26
T39
PCIE_VSS#27
U31
PCIE_VSS#28
U34
PCIE_VSS#29
V34
PCIE_VSS#30
V39
PCIE_VSS#31
W31
PCIE_VSS#32
W34
PCIE_VSS#33
Y34
PCIE_VSS#34
Y39
PCIE_VSS#35
F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13
GND
GND#100
GND#101
GND#102
GND#103
GND#104
GND#105
GND#106
GND#107
GND#108
GND#109
GND#110
GND#111
GND#112
GND#113
GND#114
GND#115
GND#116
GND#117
GND#118
GND#119
GND#120
GND#121
GND#122
GND#123
GND#124
GND#125
GND#126
GND#127
GND#128
GND#129
GND#130
GND#131
GND#132
GND#133
GND#134
GND#135
GND#136
GND#137
GND#138
GND#139
GND#140
GND#141
GND#142
GND#143
GND#144
GND#145
GND#146
GND#147
GND#148
GND#149
GND#150
GND#151
GND#153
GND#154
GND#155
GND#156
GND#157
GND#158
GND#159
GND#160
GND#161
GND#163
GND#164
GND#165
GND#166
GND#167
GND#168
GND#169
GND#170
GND#171
GND#172
GND#173
GND#174
GND#175
GND#152
GND#162
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
THR1@
GND/PX_EN#61
GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13
A39
AW1
AW39
MECH#1
MECH#2
MECH#3
12
RV125
4.7K_0402_5%
DIS@
T82 PAD
T83 PAD
T84 PAD
PX_EN <26>
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ATI_ThamesXT_M2_PWR_GND
ATI_ThamesXT_M2_PWR_GND
ATI_ThamesXT_M2_PWR_GND
LA-9104P
LA-9104P
LA-9104P
1
27 57Wednesday, August 29, 2012
27 57Wednesday, August 29, 2012
27 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 28
5
4
3
2
1
+PCIE_VDDR
1
1
1
CV128
CV127
CV126
2
2
D D
C C
+1.8VGS
B B
+1.0VGS
A A
+1.5VGS
220U_B2_2.5VM_R35
CV135
1
+
@
2
+1.8VGS +VDDC_CT
+3VGS
(Thames 60mA)
1
1
CV187
CV188
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
10U_0603_6.3V6M
(Thames 50mA)
LV22
DIS@
1 2
BLM15BD121SN1D_0402
(Thames 100mA)
0.935V@Mars Pro
LV23
DIS@
1 2
MCK1608471YZF 0603
For DDR3 MVDDQ = 1.5V
(Thames 1.7)A
1
1
1
CV138
CV137
CV136
2
2
2
DIS@
DIS@
DIS@
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
(Thames 250mA)
LV19
DIS@
1 2
BLM15BD121SN1D_0402
1
1
CV189
CV190
2
2
1U_0402_6.3V6K
DIS@
DIS@
+1.8VGS
(Thames 150mA)
+1.8VGS
(M97, Broadway and Madison: 1.8V@150mA MPV18)
1 2
MCK1608471YZF 0603
(1.8V@75mA SPV18)
1
1
CV202
CV201
CV200
2
2
1U_0402_6.3V6K
DIS@
DIS@
DIS@
0.1U_0402_16V7K
10U_0603_6.3V6M
(120mA SPV10)
1
1
1
CV217
CV216
CV215
2
2
2
1U_0402_6.3V6K
DIS@
DIS@
DIS@
0.1U_0402_16V7K
10U_0603_6.3V6M
VCCSENSE_VGA<53>
VDDCI_SEN<54>
VSSSENSE_VGA<53>
1
1
CV139
CV140
2
2
1U_0402_6.3V6K
DIS@
DIS@
10U_0603_6.3V6M
10U_0603_6.3V6M
+1.5VGS
0.1U_0402_16V7K
(1.8V@110mA VDD_CT)
1
1
CV170
CV171
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
10U_0603_6.3V6M
LV20
DIS@
1 2
BLM15BD121SN1D_0402
LV21
DIS@
1
2
1
CV142
CV141
2
1U_0402_6.3V6K
DIS@
DIS@
1
CV152
CV153
2
DIS@
DIS@
0.1U_0402_16V7K
1
CV173
CV172
2
1U_0402_6.3V6K
DIS@
DIS@
1U_0402_6.3V6K
1
CV197
2
1U_0402_6.3V6K
DIS@
10U_0603_6.3V6M
+VDDCI
RV215
10_0402_1%
DIS@
1
2
1
2
1
2
1
CV193
2
DIS@
1
CV198
2
DIS@
1
CV143
2
1U_0402_6.3V6K
DIS@
1
CV154
2
DIS@
0.1U_0402_16V7K
1
CV174
2
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
12
1
CV144
2
1U_0402_6.3V6K
DIS@
1
CV155
2
DIS@
0.1U_0402_16V7K
1
CV194
2
DIS@
0.1U_0402_16V7K
1
CV199
2
DIS@
10mil
20mil
+VGA_CORE
VCCSENSE_VGA
VDDCI_SEN
VSSSENSE_VGA
1
CV145
2
1U_0402_6.3V6K
DIS@
1
CV156
2
DIS@
0.1U_0402_16V7K
+MPV18
12
RV202
10_0402_1%
DIS@
12
RV204
10_0402_1%DIS@
UV1E
MEM I/O
AC7
VDDR1#1
AD11
VDDR1#2
AF7
VDDR1#3
AG10
VDDR1#4
AJ7
VDDR1#5
AK8
VDDR1#6
AL9
VDDR1#7
G11
VDDR1#8
G14
VDDR1#9
G17
VDDR1#10
G20
VDDR1#11
G23
VDDR1#12
G26
VDDR1#13
G29
VDDR1#14
H10
VDDR1#15
J7
VDDR1#16
J9
VDDR1#17
K11
VDDR1#18
K13
VDDR1#19
K8
VDDR1#20
L12
VDDR1#21
L16
VDDR1#22
L21
VDDR1#23
L23
VDDR1#24
L26
VDDR1#25
L7
VDDR1#26
M11
VDDR1#27
N11
VDDR1#28
P7
VDDR1#29
R11
VDDR1#30
U11
VDDR1#31
U7
VDDR1#32
Y11
VDDR1#33
Y7
VDDR1#34
LEVEL
20mil
TRANSLATION
AF26
VDD_CT#1
AF27
VDD_CT#2
AG26
VDD_CT#3
AG27
VDD_CT#4
10mil
20mil
+VDDR4
20mil
+SPV18
+SPV10
I/O
AF23
VDDR3#1
AF24
VDDR3#2
AG23
VDDR3#3
AG24
VDDR3#4
AF13
VDDR4#4
AF15
VDDR4#5
AG13
VDDR4#7
AG15
VDDR4#8
AD12
VDDR4#1
AF11
VDDR4#2
AF12
VDDR4#3
AG11
VDDR4#6
M20
NC_VDDRHA
M21
NC_VSSRHA
V12
NC_VDDRHB
U12
NC_VSSRHB
PLL
H7
MPV18#1
H8
MPV18#2
AM10
SPV18
AN9
SPV10
AN10
SPVSS
VOLTAGE
SENESE
10mil
AF28
FB_VDDC
10mil
AG28
FB_VDDCI
AH29
FB_GND
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
THR1@
PCIE
PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
PCIE_VDDR/PCIE_PVDD
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
VDDC#1
CORE
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
POWER
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC/BIF_VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC/BIF_VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58
VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
VDDCI#9
VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
VDDCI#15
ISOLATED
VDDCI#16
CORE I/O
VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22
40mil
AA31
AA32
AA33
AA34
V28
W29
W30
Y31
AB37
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28
AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13
2
1U_0402_6.3V6K
DIS@
DIS@
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
1 2
TH@
RV244 0_0402_5%
@
RV245 0_0402_5%
+PCIE_PVDD
1
CV157
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
1
CV175
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
55mA
1
CV195
2
1U_0402_6.3V6K
DIS@
(GDDR3/DDR3 1.12V@4A VDDCI)
(GDDR5 1.12V@16A VDDCI)
1
CV203
2
1U_0402_6.3V6K
DIS@
VDDCI and VDDC should have seperate regulators with a merge option on PCB
For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator
+PCIE_VDDR
1 2
1
CV146
2
1U_0402_6.3V6K
DIS@
1
1
1
CV160
CV158
CV159
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
1
1
1
CV178
CV176
CV177
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
+BIF_VDDC
For non-BACO designs, connect BIF_VDDC to VDDC.
1
For BACO designs - see BACO reference schematics
CV196
2
1U_0402_6.3V6K
DIS@
1
1
1
CV205
CV206
CV204
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
MBK1608121YZF_0603
1
1
1
CV129
CV131
CV130
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
10U_0603_6.3V6M
+BIF_VDDC
1
1
1
CV149
CV148
CV147
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
1
1
1
CV161
CV163
CV162
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
1
1
1
CV179
CV180
CV181
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
1
1
CV366
CV365
2
2
DIS@
DIS@
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
CV208
CV207
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
(Thames 440mA)
(1.8V@504mA PCIE_VDDR)
+1.8VGS
LV17
DIS@
12
(1.8V@40mA PCIE_PVDD)
1
1
CV132
CV133
2
2
1U_0402_6.3V6K
DIS@
DIS@
0.1U_0402_16V7K
+1.0VGS
(Thames 1.1A)
1
1
CV151
CV150
(1.0V@1920mA PCIE_VDDC)
(Mars Pro)
2
2
(0.935V@2.5A PCIE_VDDC)
1U_0402_6.3V6K
DIS@
DIS@
10U_0603_6.3V6M
(Thames 20.5A)
1
1
1
CV165
CV164
CV166
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
1
1
1
CV182
CV183
CV184
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
+VGA_CORE
1
1
1
CV192
CV367
CV191
2
2
2
DIS@
DIS@
DIS@
22U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
4A
1
1
1
1
CV211
CV212
CV210
CV209
2
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
DIS@
1
CV325
2
1U_0402_6.3V6K
DIS@
DIS@
MBK1608121YZF_0603
1
CV134
2
DIS@
10U_0603_6.3V6M
+VGA_CORE
1
1
CV168
CV167
2
2
1U_0402_6.3V6K
DIS@
DIS@
+VGA_CORE
1
1
CV186
CV185
2
2
1U_0402_6.3V6K
DIS@
DIS@
+VDDCI
1
1
CV213
CV214
2
2
DIS@
DIS@
10U_0603_6.3V6M
22U_0603_6.3V6M
1
CV324
2
DIS@
10U_0603_6.3V6M
10U_0603_6.3V6M
40mA
1
CV169
2
1U_0402_6.3V6K
DIS@
1
CV322
2
DIS@
LV18
1
+
DIS@
2
1
CV323
2
DIS@
10U_0603_6.3V6M
+1.8VGS
12
330U_D2_2VM_R6M~D
CV327
LV25
1 2
BLM15BD121SN1D_0402
LV26
1 2
BLM15BD121SN1D_0402
@
@
+VGA_CORE
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Compal Electronics, Inc.
ATI_ThamesXT_M2_Power
ATI_ThamesXT_M2_Power
ATI_ThamesXT_M2_Power
LA-9104P
LA-9104P
LA-9104P
1
28 57Wednesday, August 29, 2012
28 57Wednesday, August 29, 2012
28 57Wednesday, August 29, 2012
of
1.0
1.0
1.0
Page 29
5
4
3
2
1
UV1C
DDR2
GDDR3/GDDR5
DDR3
C37
MDA0
DQA0_0/DQA_0
C35
MDA1
DQA0_1/DQA_1
A35
MDA2
DQA0_2/DQA_2
E34
MDA3
DQA0_3/DQA_3
G32
MDA4
DQA0_4/DQA_4
D33
MDA5
DQA0_5/DQA_5
F32
MDA6
DQA0_6/DQA_6
E32
MDA7
DQA0_7/DQA_7
D31
MDA8
DQA0_8/DQA_8
F30
MDA9
DQA0_9/DQA_9
C30
D D
C C
+1.5VGS
1 2
RV129 240_0402_1%T H@
1 2
RV130 240_0402_1%SE@
1 2
RV131 240_0402_1%T H@
1 2
RV132 240_0402_1%SE@
1 2
RV134 240_0402_1%T H@
1 2
RV135 240_0402_1%T H@
1 2
RV206 120_0402_5%MS@
1 2
RV205 120_0402_5%@
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
+VDD_MEM15_REFDA
+VDD_MEM15_REFSA
AG12
AH12
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5
L18
L20
L27
N12
M12
M27
DQA0_10/DQA_10
DQA0_11/DQA_11
DQA0_12/DQA_12
DQA0_13/DQA_13
DQA0_14/DQA_14
DQA0_15/DQA_15
DQA0_16/DQA_16
DQA0_17/DQA_17
DQA0_18/DQA_18
DQA0_19/DQA_19
DQA0_20/DQA_20
DQA0_21/DQA_21
DQA0_22/DQA_22
DQA0_23/DQA_23
DQA0_24/DQA_24
DQA0_25/DQA_25
DQA0_26/DQA_26
DQA0_27/DQA_27
DQA0_28/DQA_28
DQA0_29/DQA_29
DQA0_30/DQA_30
DQA0_31/DQA_31
DQA1_0/DQA_32
DQA1_1/DQA_33
DQA1_2/DQA_34
DQA1_3/DQA_35
DQA1_4/DQA_36
DQA1_5/DQA_37
DQA1_6/DQA_38
DQA1_7/DQA_39
DQA1_8/DQA_40
DQA1_9/DQA_41
DQA1_10/DQA_42
DQA1_11/DQA_43
DQA1_12/DQA_44
DQA1_13/DQA_45
DQA1_14/DQA_46
DQA1_15/DQA_47
DQA1_16/DQA_48
DQA1_17/DQA_49
DQA1_18/DQA_50
DQA1_19/DQA_51
DQA1_20/DQA_52
DQA1_21/DQA_53
DQA1_22/DQA_54
DQA1_23/DQA_55
DQA1_24/DQA_56
DQA1_25/DQA_57
DQA1_26/DQA_58
DQA1_27/DQA_59
DQA1_28/DQA_60
DQA1_29/DQA_61
DQA1_30/DQA_62
DQA1_31/DQA_63
MVREFDA
MVREFSA
MEM_CALRN0
MEM_CALRN1
MEM_CALRN2
MEM_CALRP1
MEM_CALRP0
MEM_CALRP2
DDR2
GDDR5/GDDR3
DDR3
MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA1_0/MAA_8
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_13_BA2
MAA1_6/MAA_14_BA0
MAA1_7/MAA_A15_BA1
WCKA0_0/DQM A_0
WCKA0B_0/DQ MA_1
WCKA0_1/DQM A_2
WCKA0B_1/DQ MA_3
WCKA1_0/DQM A_4
WCKA1B_0/DQ MA_5
WCKA1_1/DQM A_6
WCKA1B_1/DQ MA_7
GDDR5/DDR2/GDDR3
MEMORY INTERFACE A
EDCA0_0/QSA_0/RDQS A_0
EDCA0_1/QSA_1/RDQS A_1
EDCA0_2/QSA_2/RDQS A_2
EDCA0_3/QSA_3/RDQS A_3
EDCA1_0/QSA_4/RDQS A_4
EDCA1_1/QSA_5/RDQS A_5
EDCA1_2/QSA_6/RDQS A_6
EDCA1_3/QSA_7/RDQS A_7
DDBIA0_0/QSA_0B/WD QSA_0
DDBIA0_1/QSA_1B/WD QSA_1
DDBIA0_2/QSA_2B/WD QSA_2
DDBIA0_3/QSA_3B/WD QSA_3
DDBIA1_0/QSA_4B/WD QSA_4
DDBIA1_1/QSA_5B/WD QSA_5
DDBIA1_2/QSA_6B/WD QSA_6
DDBIA1_3/QSA_7B/WD QSA_7
ADBIA0/ODTA0
ADBIA1/ODTA1
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1
CSA1B_0
CSA1B_1
CKEA0
CKEA1
WEA0B
WEA1B
MAA0_8
MAA1_8
GDDR5
G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17
A32
C32
D23
E22
C14
A14
E10
D9
C34
D29
D25
E20
E16
E12
J10
D7
A34
E30
E26
C20
C16
C12
J11
F8
J21
G19
H27
G27
J14
H14
K23
K19
K20
K17
K24
K27
M13
K16
K21
J20
K26
L15
H23
J19
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
A_BA2
A_BA0
A_BA1
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7
ODTA0
ODTA1
CLKA0
CLKA0#
CLKA1
CLKA1#
RASA0#
RASA1#
CASA0#
CASA1#
CSA0#_0
CSA1#_0
CKEA0
CKEA1
WEA0#
WEA1#
MAA13
MAA14
MDA[0..63]<30> MDB[0..63]<31>
ODTA0 <30>
ODTA1 <30>
CLKA0 <30>
CLKA0# <30>
CLKA1 <30>
CLKA1# <30>
RASA0# <30>
RASA1# <30>
CASA0# <30>
CASA1# <30>
CSA0#_0 <30>
CSA1#_0 <30>
CKEA0 <30>
CKEA1 <30>
WEA0# <30>
WEA1# <30>
MAA13 <29,30>
MAA14 <29,30> MAB14 <29,31>
MDA[0..63] MDB[0..63]
MAA[14..0] MAB[14..0]
A_BA[2..0] B_BA[2..0]
DQMA#[7..0] <30>
QSA[7..0] <30>
QSA#[7..0] <30>
MAA[14..0] <30>
A_BA[2..0] <30>
RV133
+VDD_MEM15_REFDB
+VDD_MEM15_REFSB
DIS@
1 2
5.11K_0402_1%
TESTEN
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
AA12
AD28
AK10
AL10
C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5
Y12
UV1D
DDR2
GDDR3/GDDR5
DDR3
DQB0_0/DQB_0
DQB0_1/DQB_1
DQB0_2/DQB_2
DQB0_3/DQB_3
DQB0_4/DQB_4
DQB0_5/DQB_5
DQB0_6/DQB_6
DQB0_7/DQB_7
DQB0_8/DQB_8
DQB0_9/DQB_9
DQB0_10/DQB_1 0
DQB0_11/DQB_1 1
DQB0_12/DQB_1 2
DQB0_13/DQB_1 3
DQB0_14/DQB_1 4
DQB0_15/DQB_1 5
DQB0_16/DQB_1 6
DQB0_17/DQB_1 7
DQB0_18/DQB_1 8
DQB0_19/DQB_1 9
DQB0_20/DQB_2 0
DQB0_21/DQB_2 1
DQB0_22/DQB_2 2
DQB0_23/DQB_2 3
DQB0_24/DQB_2 4
DQB0_25/DQB_2 5
DQB0_26/DQB_2 6
DQB0_27/DQB_2 7
DQB0_28/DQB_2 8
DQB0_29/DQB_2 9
DQB0_30/DQB_3 0
DQB0_31/DQB_3 1
DQB1_0/DQB_32
DQB1_1/DQB_33
DQB1_2/DQB_34
DQB1_3/DQB_35
DQB1_4/DQB_36
DQB1_5/DQB_37
DQB1_6/DQB_38
DQB1_7/DQB_39
DQB1_8/DQB_40
DQB1_9/DQB_41
DQB1_10/DQB_4 2
DQB1_11/DQB_4 3
DQB1_12/DQB_4 4
DQB1_13/DQB_4 5
DQB1_14/DQB_4 6
DQB1_15/DQB_4 7
DQB1_16/DQB_4 8
DQB1_17/DQB_4 9
DQB1_18/DQB_5 0
DQB1_19/DQB_5 1
DQB1_20/DQB_5 2
DQB1_21/DQB_5 3
DQB1_22/DQB_5 4
DQB1_23/DQB_5 5
DQB1_24/DQB_5 6
DQB1_25/DQB_5 7
DQB1_26/DQB_5 8
DQB1_27/DQB_5 9
DQB1_28/DQB_6 0
DQB1_29/DQB_6 1
DQB1_30/DQB_6 2
DQB1_31/DQB_6 3
MVREFDB
MVREFSB
TESTEN
CLKTESTA
CLKTESTB
DDR2
GDDR5/GDDR3
DDR3
MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8
MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12
WCKB0_0 /DQMB_0
WCKB0B_0 /DQMB_1
WCKB0_1 /DQMB_2
WCKB0B_1 /DQMB_3
WCKB1_0 /DQMB_4
WCKB1B_0 /DQMB_5
WCKB1_1 /DQMB_6
WCKB1B_1 /DQMB_7
GDDR5/DDR2/GDDR3
EDCB0_0/QSB_0 /RDQSB_0
MEMORY INTERFACE B
EDCB0_1/QSB_1 /RDQSB_1
EDCB0_2/QSB_2 /RDQSB_2
EDCB0_3/QSB_3 /RDQSB_3
EDCB1_0/QSB_4 /RDQSB_4
EDCB1_1/QSB_5 /RDQSB_5
EDCB1_2/QSB_6 /RDQSB_6
EDCB1_3/QSB_7 /RDQSB_7
DDBIB0_0/QSB_0B/W DQSB_0
DDBIB0_1/QSB_1B/W DQSB_1
DDBIB0_2/QSB_2B/W DQSB_2
DDBIB0_3/QSB_3B/W DQSB_3
DDBIB1_0/QSB_4B/W DQSB_4
DDBIB1_1/QSB_5B/W DQSB_5
DDBIB1_2/QSB_6B/W DQSB_6
DDBIB1_3/QSB_7B/W DQSB_7
ADBIB0/ODTB0
ADBIB1/ODTB1
MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1
CLKB0
CLKB0B
CLKB1
CLKB1B
RASB0B
RASB1B
CASB0B
CASB1B
CSB0B_0
CSB0B_1
CSB1B_0
CSB1B_1
CKEB0
CKEB1
WEB0B
WEB1B
MAB0_8
MAB1_8
DRAM_RST
GDDR5
P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9
H3
H1
T3
T5
AE4
AF5
AK6
AK5
F6
K3
P3
V5
AB5
AH1
AJ9
AM5
G7
K1
P1
W4
AC4
AH3
AJ8
AM3
T7
W7
L9
L8
AD8
AD7
T10
Y10
W10
AA10
P10
L10
AD10
AC10
U10
AA11
N10
AB11
T8
W8
AH11
DRAM_RST#_R
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
B_BA2
B_BA0
B_BA1
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7
ODTB0
ODTB1
CLKB0
CLKB0#
CLKB1
CLKB1#
RASB0#
RASB1#
CASB0#
CASB1#
CSB0#_0
CSB1#_0
CKEB0
CKEB1
WEB0#
WEB1#
MAB13
MAB14
DQMB#[7..0] <31>
QSB[7..0] <31>
QSB#[7..0] <31>
ODTB0 <31>
ODTB1 <31>
CLKB0 <31>
CLKB0# <31>
CLKB1 <31>
CLKB1# <31>
RASB0# <31>
RASB1# <31>
CASB0# <31>
CASB1# <31>
CSB0#_0 <31>
CSB1#_0 <31>
CKEB0 <31>
CKEB1 <31>
WEB0# <31>
WEB1# <31>
MAB13 <29,31>
MAB[14..0] <31>
B_BA[2..0] <31>
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
B B
Co-lay Thames/Seymour/Mars Pro
RV129
RV130
RV131
RV132
RV134
RV135
RV206
RV205
+1.5VGS +1.5VGS
12
RV139
40.2_0402_1%
DIS@
A A
100_0402_1%
DIS@
RV146
12
12
THR1@
Thames M2@Seymour M2@Mars Pro
TH@
@
TH@
TH@
TH@
@
+VDD_MEM15_REFDA
CV220
0.1U_0402_16V7K
DIS@
5
SE@
@
SE@
@
@
@
@
RV140
40.2_0402_1%
DIS@
RV147
100_0402_1%
DIS@
12
12
@
@
@
@
@
@
MS@
@@
+VDD_MEM15_REFSA
12
CV221
0.1U_0402_16V7K
DIS@
This basic topo logy should be used for DRAM_ RST for DDR3/GD DR5.These
Capacitors and Resistor value s are an exampl e only. The Ser ies R and
|| Cap values w ill depend on the DRAM load a nd will have to be
calculated for different Mem ory ,DRAM Load and board to p ass Reset
Signal Spec.
Place all these components ve ry close to GPU (Within
25mm) and keep all component close to each O ther (within
5mm) except Rse r2
+1.5VGS
12
RV138
4.7K_0402_5%
@
DIS@
CV222
12
1 2
RV144
10_0402_1%
DIS@
3
DRAM_RST#_R
DIS@
RV145
4.99K_0402_1%
1 2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
DRAM_RST#< 30,31>
4
RV143
51.1_0402_1%
DIS@
120P_0402_50V9
0.1U_0402_16V7K
12
@
RV136
51.1_0402_1%
+1.5VGS +1.5VGS
12
RV141
40.2_0402_1%
DIS@
12
RV148
100_0402_1%
DIS@
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
12
@
CV218
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
THR1@
12
@
CV219
0.1U_0402_16V7K
12
@
RV137
51.1_0402_1%
Compal Secret Data
Compal Secret Data
Compal Secret Data
route 50ohms single-ended/100ohms diff
and keep short
Debug only, for clock observation, if not needed, DNI
5mil 5mil
+VDD_MEM15_REFDB
12
CV223
0.1U_0402_16V7K
DIS@
Deciphered Date
Deciphered Date
Deciphered Date
2
RV142
40.2_0402_1%
DIS@
RV149
100_0402_1%
DIS@
12
12
+VDD_MEM15_REFSB
12
CV224
0.1U_0402_16V7K
DIS@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ATI_ThamesXT_M2_MEM IF
ATI_ThamesXT_M2_MEM IF
ATI_ThamesXT_M2_MEM IF
LA-9104P
LA-9104P
LA-9104P
1
1.0
1.0
29 57Wednesday, August 29, 2012
29 57Wednesday, August 29, 2012
29 57Wednesday, August 29, 2012
1.0
Page 30
5
4
3
2
1
CHANNEL A: 256MB/512MB DDR3
VREFC_A1
VREFD_Q1
D D
DIS@
1 2
DIS@
1 2
DIS@
1 2
DIS@
1 2
MDA[0..63]
MAA[14..0]
DQMA#[7..0]
QSA[7..0]
QSA#[7..0]
12
CV225
0.01U_0402_16V7K
DIS@
12
CV234
0.01U_0402_16V7K
DIS@
A_BA0<29>
A_BA1<29>
A_BA2<29>
CLKA0<29>
CLKA0#<29>
CKEA0<29>
ODTA0<29>
CSA0#_0<29>
RASA0#<29>
CASA0#<29>
WEA0#<29>
DRAM_RST#< 29,31>
RV150
240_0402_1%
DIS@
QSA3
QSA0
DQMA#3
DQMA#0
QSA#3
QSA#0
MDA[0..63]<29>
MAA[14..0]<29>
DQMA#[7..0]<29>
QSA[7..0]<29>
QSA#[7..0]<29>
C C
CLKA0
RV154 56_0402_1%
CLKA0#
RV155 56_0402_1%
B B
CLKA1
RV164 56_0402_1%
CLKA1#
RV165 56_0402_1%
VREFCA
H1
VREFDQ
N3
MAA0
A0
P7
MAA1
A1
P3
MAA2
A2
N2
MAA3
A3
P8
MAA4
A4
P2
MAA5
A5
R8
MAA6
A6
R2
MAA7
A7
T8
MAA8
A8
R3
MAA9
A9
L7
MAA10
A10/AP
R7
MAA11
A11
N7
MAA12
A12/BC
T3
MAA13
A13
T7
MAA14
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
12
J1
NC
L1
NC
J9
NC
L9
NC
M7
NC
96-BALL
SDRAM DDR3L
W2G1646E-BC11_FBGA96~D
K4
+1.5VGS +1.5VGS+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS
12
RV156
4.99K_0402_1%
DIS@
15mil 15mil 15mil 15mil 15mil 15mil 15mil 15mil
12
RV166
4.99K_0402_1%
DIS@
DIS@
UV18
M8
E3
MDA29
DQL0
F7
MDA27
DQL1
F2
MDA30
DQL2
F8
MDA26
DQL3
H3
MDA28
DQL4
H8
MDA24
DQL5
G2
MDA31
DQL6
H7
MDA25
DQL7
D7
MDA0
DQU0
C3
MDA5
DQU1
C8
MDA1
DQU2
C2
MDA6
DQU3
A7
MDA3
DQU4
A2
MDA4
DQU5
B8
MDA2
DQU6
A3
MDA7
DQU7
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VREFD_Q1 VREFD_Q2
0.1U_0402_16V7K
12
CV226
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
4.99K_0402_1%
4.99K_0402_1%
+1.5VGS
RV157
DIS@
RV167
DIS@
+1.5VGS
12
12
VREFC_A2
VREFD_Q2
A_BA0 A_BA0 A_BA0
A_BA1 A_BA1 A_BA1
A_BA2 A_BA2 A_BA2
CLKA0
CLKA0#
CKEA0 CKEA1
ODTA0 ODTA1
CSA0#_0 CSA1#_0
RASA0# RASA1#
CASA0# CASA1#
WEA0# WEA1#
QSA2 QSA4
QSA1
DQMA#2 DQMA#4
DQMA#1
QSA#2 QSA#4
QSA#1
DRAM_RST# DRAM_RST# DRAM_RST#
12
RV151
240_0402_1%
DIS@
VREFC_A1 VREFC_A2
0.1U_0402_16V7K
12
CV227
DIS@
UV19
M8
VREFCA
H1
VREFDQ
N3
MAA0 MAA0 MAA0
A0
P7
MAA1 MAA1 MAA1
A1
P3
MAA2 MAA2 MAA2
A2
N2
MAA3 MAA3 MAA3
A3
P8
MAA4 MAA4 MAA4
A4
P2
MAA5 MAA5 MAA5
A5
R8
MAA6 MAA6 MAA6
A6
R2
MAA7 MAA7 MAA7
A7
T8
MAA8 MAA8 MAA8
A8
R3
MAA9 MAA9 MAA9
A9
L7
MAA10 MAA10 MAA10
A10/AP
R7
MAA11 MAA11 MAA11
A11
N7
MAA12 MAA12 MAA12
A12/BC
T3
MAA13 MAA13 MAA13
A13
T7
MAA14 MAA14 MAA14
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC
L1
NC
J9
NC
L9
NC
M7
NC
96-BALL
SDRAM DDR3L
W2G1646E-BC11_FBGA96~D
K4
12
RV158
4.99K_0402_1%
DIS@
12
RV168
4.99K_0402_1%
DIS@
DIS@
E3
MDA18
DQL0
F7
MDA23
DQL1
F2
MDA19
DQL2
F8
MDA20
DQL3
H3
MDA17
DQL4
H8
MDA21
DQL5
G2
MDA16
DQL6
H7
MDA22
DQL7
D7
MDA15
DQU0
C3
MDA10
DQU1
C8
MDA14
DQU2
C2
MDA11
DQU3
A7
MDA13
DQU4
A2
MDA9
DQU5
B8
MDA12
DQU6
A3
MDA8
DQU7
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
0.1U_0402_16V7K
12
CV228
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
4.99K_0402_1%
4.99K_0402_1%
DIS@
RV159
DIS@
RV169
+1.5VGS
+1.5VGS
12
12
240_0402_1%
12
CV229
DIS@
RV152
DIS@
VREFC_A3
VREFD_Q3
CLKA1<29>
CLKA1#<29>
CKEA1<29>
ODTA1<29>
CSA1#_0<29>
RASA1#<29>
CASA1#<29>
WEA1#<29>
QSA5
DQMA#5
QSA#5
12
0.1U_0402_16V7K
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
M7
RV160
4.99K_0402_1%
DIS@
RV170
4.99K_0402_1%
DIS@
UV20
DQL0
VREFCA
DQL1
VREFDQ
DQL2
DQL3
A0
DQL4
A1
A2
DQL5
A3
DQL6
A4
DQL7
A5
A6
A7
DQU0
A8
DQU1
A9
DQU2
A10/AP
DQU3
A11
DQU4
A12/BC
DQU5
DQU6
A13
DQU7
A14
K4
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC
NC
NC
NC
NC
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
96-BALL
SDRAM DDR3L
W2G1646E-BC11_FBGA96~D
12
VREFC_A3
12
0.1U_0402_16V7K
12
CV230
DIS@
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
RV161
4.99K_0402_1%
DIS@
RV171
4.99K_0402_1%
DIS@
MDA38
MDA36
MDA39
MDA34
MDA35
MDA33
MDA37
MDA32
MDA42
MDA44
MDA40
MDA46
MDA43
MDA45
MDA41
MDA47
12
12
+1.5VGS
+1.5VGS
240_0402_1%
CV231
DIS@
12
RV153
DIS@
VREFD_Q3
0.1U_0402_16V7K
VREFC_A4
VREFD_Q4
CLKA1
CLKA1#
QSA6
QSA7
DQMA#6
DQMA#7
QSA#6
QSA#7
12
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
M7
RV162
4.99K_0402_1%
DIS@
RV172
4.99K_0402_1%
DIS@
UV21
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC
NC
NC
NC
NC
K4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
96-BALL
SDRAM DDR3L
W2G1646E-BC11_FBGA96~D
12
VREFC_A4
0.1U_0402_16V7K
12
12
CV232
DIS@
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
RV163
4.99K_0402_1%
DIS@
RV173
4.99K_0402_1%
DIS@
MDA55
MDA51
MDA50
MDA52
MDA48
MDA53
MDA49
MDA54
MDA60
MDA58
MDA63
MDA56
MDA61
MDA59
MDA62
MDA57
+1.5VGS
+1.5VGS
12
12
DIS@
CV233
12
VREFD_Q4
0.1U_0402_16V7K
+1.5VGS
1
1
CV235
2
DIS@
A A
0.1U_0402_16V7K
1
1
CV237
CV236
2
2
DIS@
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
5
1
1
CV239
CV238
2
2
DIS@
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
CV240
CV241
2
2
DIS@
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
1
CV242
CV243
2
2
DIS@
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
CV244
2
DIS@
0.1U_0402_16V7K
1
CV245
2
DIS@
0.1U_0402_16V7K
1
CV246
CV247
2
2
DIS@
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
4
+1.5VGS
CV248
DIS@
10U_0603_6.3V6M
+1.5VGS +1.5VGS
1
1
CV249
2
2
DIS@
10U_0603_6.3V6M
1
1
CV251
CV250
2
2
DIS@
DIS@
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CV252
2
1U_0402_6.3V6K
DIS@
3
1
1
CV253
2
1U_0402_6.3V6K
DIS@
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CV254
2
1U_0402_6.3V6K
DIS@
Issued Date
Issued Date
Issued Date
1
CV255
2
1U_0402_6.3V6K
DIS@
1
1
CV256
2
1U_0402_6.3V6K
DIS@
1
CV257
2
1U_0402_6.3V6K
DIS@
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
1
CV258
CV259
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
1
1
CV261
CV260
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
1
1
CV262
2
1U_0402_6.3V6K
DIS@
1
CV263
2
1U_0402_6.3V6K
DIS@
1
CV264
CV265
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
1
1
CV266
2
1U_0402_6.3V6K
DIS@
1
CV267
CV268
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
Title
Title
Title
ATI_ThamesXT_M2_VRAM_A
ATI_ThamesXT_M2_VRAM_A
ATI_ThamesXT_M2_VRAM_A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
CV270
1U_0402_6.3V6K
DIS@
2
LA-9104P
LA-9104P
LA-9104P
1
1
CV271
2
1U_0402_6.3V6K
DIS@
1
CV269
2
1U_0402_6.3V6K
DIS@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1.0
1.0
30 57Wednesday, August 29, 2012
30 57Wednesday, August 29, 2012
30 57Wednesday, August 29, 2012
1.0
Page 31
5
4
3
2
1
CHANNEL B: 256MB/512MB DDR3
VREFC_A1_B
DRAM_RST#< 29,30>
RV176
240_0402_1%
DIS@
VREFD_Q1_B
B_BA0<29>
B_BA1<29>
B_BA2<29>
CLKB0<29>
CLKB0#<29>
CKEB0<29>
ODTB0<29>
CSB0#_0<29>
RASB0#<29>
CASB0#<29>
WEB0#<29>
QSB3 QSB2 QSB4
QSB0 QSB1
DQMB#3 DQMB#2 DQMB#4
DQMB#0 DQMB#1
QSB#3 QSB#2 QSB#4
QSB#0 QSB#1
12
DIS@
1 2
DIS@
1 2
DIS@
DIS@
MDB[0..63]
MAB[14..0]
DQMB#[7..0]
QSB[7..0]
QSB#[7..0]
12
12
CV272
0.01U_0402_16V7K
DIS@
CV273
0.01U_0402_16V7K
DIS@
MDB[0..63]<29>
D D
MAB[14..0]<29>
DQMB#[7..0]<29>
QSB[7..0]<29>
QSB#[7..0]<29>
CLKB0
C C
RV174 56_0402_1%
CLKB0#
RV175 56_0402_1%
1 2
CLKB1
RV180 56_0402_1%
1 2
CLKB1#
RV181 56_0402_1%
VREFCA
H1
VREFDQ
N3
MAB0 MAB0 MAB0 MAB0
A0
P7
MAB1 MAB1 MAB1 MAB1
A1
P3
MAB2 MAB2 MAB2 MAB2
A2
N2
MAB3 MAB3 MAB3 MAB3
A3
P8
MAB4 MAB4 MAB4 MAB4
A4
P2
MAB5 MAB5 MAB5 MAB5
A5
R8
MAB6 MAB6 MAB6 MAB6
A6
R2
MAB7 MAB7 MAB7 MAB7
A7
T8
MAB8 MAB8 MAB8 MAB8
A8
R3
MAB9 MAB9 MAB9 MAB9
A9
L7
MAB10 MAB10 MAB10 MAB10
A10/AP
R7
MAB11 MAB11 MAB11 MAB11
A11
N7
MAB12 MAB12 MAB12 MAB12
A12/BC
T3
MAB13 MAB13 MAB13 MAB13
A13
T7
MAB14 MAB14 MAB14 MAB14
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC
L1
NC
J9
NC
L9
NC
M7
NC
96-BALL
SDRAM DDR3L
W2G1646E-BC11_FBGA96~D
K4
UV22
M8
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
E3
MDB29
F7
MDB26
F2
MDB30
F8
MDB27
H3
MDB31
H8
MDB25
G2
MDB28
H7
MDB24
D7
MDB0
C3
MDB4
C8
MDB1
C2
MDB6
A7
MDB3
A2
MDB7
B8
MDB2
A3
MDB5
+1.5VGS
B2
VDD
D9
VDD
G7
VDD
K2
VDD
K8
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
+1.5VGS
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
RV177
240_0402_1%
DIS@
VREFC_A2_B
VREFD_Q2_B
B_BA0 B_BA0 B_BA0
B_BA1 B_BA1 B_BA1
B_BA2 B_BA2 B_BA2
CLKB0
CLKB0#
CKEB0 CKEB1
ODTB0 ODTB1
CSB0#_0 CSB1#_0
RASB0# RASB1#
CASB0# CASB1#
WEB0# WEB1#
DRAM_RST# DRAM_RST# DRAM_RST#
12
UV23
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC
L1
NC
J9
NC
L9
NC
M7
NC
96-BALL
SDRAM DDR3L
W2G1646E-BC11_FBGA96~D
K4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
E3
MDB16
F7
MDB19
F2
MDB20
F8
MDB22
H3
MDB17
H8
MDB21
G2
MDB18
H7
MDB23
D7
MDB15
C3
MDB10
C8
MDB14
C2
MDB11
A7
MDB12
A2
MDB9
B8
MDB13
A3
MDB8
+1.5VGS
B2
VDD
D9
VDD
G7
VDD
K2
VDD
K8
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
+1.5VGS
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
RV178
240_0402_1%
DIS@
CLKB1<29>
CLKB1#<29>
CKEB1<29>
ODTB1<29>
CSB1#_0<29>
RASB1#<29>
CASB1#<29>
WEB1#<29>
VREFC_A3_B
VREFD_Q3_B
QSB5
DQMB#5
QSB#5
12
UV24
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC
L1
NC
J9
NC
L9
NC
M7
NC
96-BALL
SDRAM DDR3L
W2G1646E-BC11_FBGA96~D
K4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
E3
MDB33
F7
MDB37
F2
MDB35
F8
MDB39
H3
MDB32
H8
MDB36
G2
MDB34
H7
MDB38
D7
MDB44
C3
MDB41
C8
MDB47
C2
MDB43
A7
MDB45
A2
MDB40
B8
MDB46
A3
MDB42
+1.5VGS
B2
VDD
D9
VDD
G7
VDD
K2
VDD
K8
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
+1.5VGS
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
RV179
240_0402_1%
DIS@
VREFC_A4_B
VREFD_Q4_B
CLKB1
CLKB1#
QSB6
QSB7
DQMB#6
DQMB#7
QSB#6
QSB#7
12
UV25
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC
L1
NC
J9
NC
L9
NC
M7
NC
96-BALL
SDRAM DDR3L
W2G1646E-BC11_FBGA96~D
K4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
E3
MDB55
F7
MDB50
F2
MDB54
F8
MDB51
H3
MDB53
H8
MDB49
G2
MDB52
H7
MDB48
D7
MDB56
C3
MDB59
C8
MDB63
C2
MDB62
A7
MDB57
A2
MDB61
B8
MDB58
A3
MDB60
+1.5VGS
B2
VDD
D9
VDD
G7
VDD
K2
VDD
K8
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
+1.5VGS
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
B B
+1.5VGS
1
1
1
CV283
CV282
2
2
DIS@
DIS@
0.1U_0402_16V7K
A A
0.1U_0402_16V7K
1
CV284
CV285
2
2
DIS@
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
5
+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS
4.99K_0402_1%
4.99K_0402_1%
1
CV286
2
DIS@
0.1U_0402_16V7K
12
RV182
DIS@
15mil 15mil 15mil 15mil 15mil 15mil 15mil 15mil
VREFD_Q1_B VREFD_Q2_B
12
1
RV190
DIS@
1
CV287
2
DIS@
0.1U_0402_16V7K
CV274
2
DIS@
0.1U_0402_16V7K
1
1
1
CV290
CV289
CV288
2
2
2
DIS@
DIS@
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
4.99K_0402_1%
4.99K_0402_1%
1
CV291
2
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
RV183
DIS@
RV191
DIS@
12
VREFC_A1_B
12
1
CV275
2
DIS@
0.1U_0402_16V7K
1
CV292
2
DIS@
1
1
CV294
CV293
2
2
DIS@
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
4
RV184
4.99K_0402_1%
DIS@
RV192
4.99K_0402_1%
DIS@
12
VREFC_A2_B
12
12
RV185
4.99K_0402_1%
DIS@
12
1
CV276
2
DIS@
0.1U_0402_16V7K
+1.5VGS
CV295
DIS@
10U_0603_6.3V6M
4.99K_0402_1%
1
2
10U_0603_6.3V6M
RV193
DIS@
1
CV296
2
DIS@
1
CV277
2
DIS@
0.1U_0402_16V7K
1
1
CV297
CV298
2
2
DIS@
DIS@
10U_0603_6.3V6M
10U_0603_6.3V6M
3
12
RV186
4.99K_0402_1%
DIS@
VREFC_A3_B
12
1
RV194
4.99K_0402_1%
DIS@
+1.5VGS +1.5VGS
1U_0402_6.3V6K
CV278
2
DIS@
0.1U_0402_16V7K
1
1
CV299
2
DIS@
1
CV300
CV301
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4.99K_0402_1%
4.99K_0402_1%
1
CV302
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
12
RV187
DIS@
VREFD_Q3_B
12
1
RV195
DIS@
CV279
2
DIS@
0.1U_0402_16V7K
1
1
1
1
CV304
CV303
2
1U_0402_6.3V6K
DIS@
DIS@
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
CV306
CV305
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
Compal Secret Data
Compal Secret Data
Compal Secret Data
4.99K_0402_1%
4.99K_0402_1%
1
CV307
2
1U_0402_6.3V6K
DIS@
Deciphered Date
Deciphered Date
Deciphered Date
RV188
DIS@
RV196
DIS@
1U_0402_6.3V6K
12
12
1
CV308
2
DIS@
2
CV280
DIS@
0.1U_0402_16V7K
VREFC_A4_B
1
2
RV189
4.99K_0402_1%
DIS@
RV197
4.99K_0402_1%
DIS@
1
CV310
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
12
VREFD_Q4_B
12
1
CV281
2
DIS@
0.1U_0402_16V7K
1
1
CV312
CV311
2
2
1U_0402_6.3V6K
DIS@
DIS@
1
1
CV314
CV313
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1
CV316
CV315
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
ATI_ThamesXT_M2_VRAM_B
ATI_ThamesXT_M2_VRAM_B
ATI_ThamesXT_M2_VRAM_B
1
CV317
2
1U_0402_6.3V6K
DIS@
1
CV318
2
1U_0402_6.3V6K
DIS@
LA-9104P
LA-9104P
LA-9104P
1
1.0
1.0
31 57Wednesday, August 29, 2012
31 57Wednesday, August 29, 2012
31 57Wednesday, August 29, 2012
1.0
Page 32
5
W=40mils
+3VALW
CL38
1U_0402 _6.3V6K
D D
10K_040 2_5%
WOL_E N#<4 0>
C C
+LAN_IO
B B
A A
WOL_E N#
PCIE_PRX _LANTX_P1< 14>
PCIE_PRX _LANTX_N1<14 >
PCIE_PTX_ LANRX_P1< 14>
PCIE_PTX_ LANRX_N1<14 >
10K_040 2_5%
1 2
RL34
12
@
3.3V : Enable switching regulator
V : Disable switching regulator
0
10/100
B+_BIAS
+3VALW
RL18
RL28
470K_04 02_5%
1 2
1 2
2
G
EN_WOL
13
D
QL2
2N7002B KW_SOT323 -3~D
S
CL28,C30 Close UL1
1 2
CL28 0.1U_0402 _16V7K
1 2
CL30 0.1U_0402 _16V7K
LAN_CLKR EQ#<14 >
PLT_RST#<16,38,40,6>
CLK_PCIE _LAN<14>
CLK_PCIE _LAN#<14 >
PCIE_W AKE#<15,4 0>
PCIE_W AKE#
+3VS
12
ENSWRE G ISOLATEB
RL36
0_0402_ 1%
：：：：
100@ (LDO mode used)
5
1 2
1 2
RL31 2.4 9K_0402_ 1%
RL33
1K_0402 _5%
RL35
15K_040 2_5%
1
2
JP3
@
2 1
2MM
QL1
D
6
S
45
2
1
SI3456DD V-T1-GE3_TSOP6 ~D
G
3
RL27
1.5M_040 2_5%
1 2
PCIE_CRX_ C_DTX_P0
PCIE_CRX_ C_DTX_N0
XTLO
XTLI
PCIE_W AKE#
ISOLATEB
ENSWRE G
+LAN_VDDRE G
1
2
UL1
22
HSOP
23
HSON
17
HSIP
18
HSIN
16
CLKREQB
25
PERSTB
19
REFCLK_P
20
REFCLK_N
43
CKXTAL1
44
CKXTAL2
28
LANWAKEB
26
ISOLATEB
14
NC/SMBCLK
15
NC/SMBDATA
38
GPO/SMBALERT
33
ENSWREG
34
VDDREG
35
VDDREG
46
RSET
24
GND
49
PGND
S IC RTL810 5E-VD-CGT QFN 48 P LAN CTRL
4
W=40mils
W
40mils
=
CL15
0.1U_0603_50V_X7R
CL39
31
LED3/EEDO
37
LED1/EESK
40
LED0
30
32
1
2
4
5
7
8
10
11
13
29
41
27
39
12
42
47
48
21
3
6
9
45
36
LAN_CLKR EQ#
WOL_E N#
MDI0+
MDI0MDI1+
MDI1-
+LAN_EVDD 10
RL23 10K_040 2_5%@
RL24 10K_040 2_5%
EECS/SCL
EEDI/SDA
MDIP0
MDIN0
MDIP1
MDIN1
NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3
DVDD10
DVDD10
DVDD10
DVDD33
DVDD33
AVDD33
AVDD33
AVDD33
AVDD33
EVDD10
AVDD10
AVDD10
AVDD10
AVDD10
REGOUT
These caps close to Pin 12,27,39,42,47,48
F
or 8105E-VD pop the capacitor close pin 27,39,47,48
+LAN_VDD
1
CL20
2
These caps close to Pin 3,6,9,13,29,41,45
For 8105E-VD pop capacitor close to pin 13,29,45
1 2
1 2
@
+LAN_VDD
+LAN_IO
+LAN_VDD
@
RL37 10K_04 02_5%
1 2
RL38 10K_04 02_5%
1 2
@
+LAN_IO rising time : >1ms and <100ms
+LAN_IO
1.5A
1
1
CL19
CL16
@
2
2
CL21
0.1U_0402_16V7K
+LAN_IO
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
CL23
CL22
@
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
+LAN_VDD
RL26
1 2
@
0_0603_ 1%
Reserve 10K pull LAN_IO
4
3
1
1
1
CL18
CL17
@
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
CL24
@
2
0.1U_0402_16V7K
1
CL25
@
@
2
2
0.1U_0402_16V7K
W=20mils
+LAN_EVDD 10
1
1
CL35
CL34
2
2
0.1U_0402_16V7K
3
1
CL27
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
1
CL26
2
0.1U_0402_16V7K
0.1U_0402_16V7K
1U_0402_6.3V6K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MCT0
MCT1
CL36
1 2
12P_040 2_50V8J
XTAL@
CL37
1 2
12P_040 2_50V8J
XTAL@
MDO1-
MDO1+
MDO0-
MDO0+
RL30 0_0402 _5%
1
3
25MHZ_10 PF_7V2500 0014
JLAN
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
SANTA_130 456-311
CONN@
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2
1 2
RL19 75_0 603_5%
1 2
RL20 75_0 603_5%
Place close to TCT pin
MDI1MDI1+
MDI0MDI0+
2
CL41
0.01U_04 02_16V7K
1
XTAL@
12
XTAL@
GND
GND
XTLI
2
4
XTLO
YL2
OSC
OSC
RJ45 Conn.
SP011207090
DC234004V00 (OLD)
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
TL1
1
RD+
2
RD-
3
CT
4
NC
5
NC
6
CT
7
TD+
TD-8TX-
X'FORM_ NS0 014
SHLD1
SHLD2
1
CL33
100P_12 06_2KV8J
2
RX+
RX-
NC
NC
TX+
9
10
1
2
3
@
DL11
PESD5V0 U2BT_SOT23-3~D
1
16
MDO1-
15
MDO1+
14
MCT0
CT
13
12
11
MCT1
CT
10
MDO0-
9
MDO0+
CLK_LAN_ 25M<14 >
DL11 as close as
possible to C27
and C32
CLK_LAN_ 25M XTLI
Title
Title
Title
LAN RTL8105E
LAN RTL8105E
LAN RTL8105E
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
LA-9104P
LA-9104P
LA-9104P
Date: Sheet of
Date: Sheet of
Date: Sheet of
12
RL21
GCLK@
0_0402_ 5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1
12
RL39
22_0402 _5%
32 57Wednesday, August 29, 2012
32 57Wednesday, August 29, 2012
32 57Wednesday, August 29, 2012
@
1.0
1.0
1.0
Page 33
5
4
3
2
1
JACK_PLUG Delay cricutis
0.1U_0402_16V7K
1
D D
CA58
CA59, CA60
Close to UA1
Pin36
HDA_RST_AUDIO#
0.1U_0402_16V7K
C C
Place close to UA1.11
1
CA68
2
HDA_BITCLK_AUDIO
22P_0402_50V8J
CA21
2
+3VS
1
1
4.7U_0603_6.3V6K
0.1U_0402_16V7K
CA57
+3VS
2
2
HDA_SDIN0<13>
HDA_SDOUT_AUDIO<13>
HDA_BITCLK_AUDIO<13>
HDA_SYNC_AUDIO<13>
HDA_RST_AUDIO#<13>
1
2
+MIC2-VREFO
4.7U_0603_6.3V6K
+1.5VS
+3VS
1
1
2
2
CA59
CA60
1
2
1 2
RA9 0_0402_1%@
1 2
RA10 0_0402_5%
@
1 2
RA130 22_0402_5%
1 2
RA129 22_0402_5%
CA23 2.2U_0603_6.3V6K
RA153 20K_0402_1%
+MIC2-VREFO
RA49 0_0402_5%@
RA50 0_0402_1%@
1
2
1
2
1 2
1 2
1 2
CA24 1U_0402_6.3V6K
1 2
CA25 1U_0402_6.3V6K
1 2
1 2
1 2
CA62 10U_0603_6.3V6M
1 2
CA63 10U_0603_6.3V6M
1 2
CA64 10U_0603_6.3V6M
+5V_PVDD+5V_PVDD +5VA
CA54
0.1U_0402_16V7K
CA55
10U_0603_6.3V6M
CA56
CA53
10U_0603_6.3V6M
0.1U_0402_16V7K
4.7U_0603_6.3V6K
0.1U_0402_16V7K
1
2
CA51
CA61
HDA_BITCLK
CA71
4.7U_0603_6.3V6K
1
2
1
2
UA1
26
AVDD1
41
PVDD1
46
PVDD2
1
DVDD
36
CPVDD
9
DVDD-IO
40
AVDD2
8
SDATA-IN
5
SDATA-OUT
6
BCLK
10
SYNC
11
RESETB
28
VREF
15
JDREF
37
CBP
35
CBN
34
CPVEE
31
MIC1-VREFO-L
30
MIC1-VREFO-R
29
MIC2-VREFO
27
LDO1-CAP
39
LDO2-CAP
7
LDO3-CAP
4
DVSS
25
AVSS1
38
AVSS2
49
Thermal PAD
ALC3221-CG_MQFN48_6X6~D
RA203
12
@
0_0603_1%
RA204
12
@
0_0603_1%
PCBEEP
MONO-OUT
LINE2-L(PORT-E-L )
LINE2-R(PORT-E-R )
LINE1-L(PORT-C- L)
LINE1-R(PORT-C- R)
MIC1-R(PORT-B-R )
MIC1-L(PORT-B-L)
MIC2-R(PORT-F-R)
MIC2-L(PORT-F-L)
SENSE B
SENSE A
SPK-OUT-R+
SPK-OUT-R-
SPK-OUT-L-
SPK-OUT-L+
HPOUT-R(PORT -I-R)
HPOUT-L(PORT -I-L)
SPDIF-OUT/GPIO2
GPIO0/DMIC-DATA
GPIO1/DMIC-CLK
+5VS+5V_PVDD
+5VS+5VA
12
16
24
23
22
21
20
19
18
17
14
13
45
44
43
42
33
32
48
2
3
47
PDB
1 2
CA65
0.1U_0402_16V7K
@
1 2
CA67 4.7U_0603_6.3V6K
1 2
CA66 4.7U_0603_6.3V6K
1 2
RA51 39.2K_0402_1%
INT-SPK-R+
INT-SPK-RINT-SPK-LINT-SPK-L+
HPOUT-R
HPOUT-L
MIC_DATA
MIC_CLK_C
EC_MUTE#
MIC_CLK_C MIC_CLK
RA131
22_0402_5%
RA79 1K_0402_1%
CA365 100P_0402_50V8J@
RA81 10K_0402_5%@
MIC_DATA <21>
EC_MUTE# <40>
12
RA23 1K_0402_1%
1
22P_0402_50V8J
2
1 2
1 2
JACK_SENSE#
1
2
CA22
@
12
12
RA1107
22K_0402_1%
1 2
CA70
10U_0603_6.3V6M
PC_BEEP
MIC_CLK <21>
MIC_IN
MIC_IN MIC_IN
+MIC2-VREFO
RA53
2.2K_0402_5%
1 2
RA1108
22K_0402_1%
1 2
JACK_PLUG#
+3VS +3VS
12
RA1
@
10K_0402_5%
DMN66D0LDW-7_SOT363-6
1 2
RA3
100K_0402_5%
10U_0603_6.3V6M
EC Beep
ICH Beep
12
RA2
@
100K_0402_5%
QA4A
@
61
2
@
1
CA1
@
2
JACK_PLUG#
Reserve for cancel Delay cricutis
5
1
CA2
@
10U_0603_6.3V6M
2
1 2
@
RA4 0_0402_1%
RA25 0_0603_1%@
RA28 0_0603_1%@
RA29 0_0603_1%@
RA30 0_0603_1%@
RA31 0_0603_1%@
RA32 0_0603_1%@
JACK_SENSE#
3
QA4B
@
DMN66D0LDW-7_SOT363-6
4
JACK_SENSE#
1 2
1 2
1 2
1 2
1 2
1 2
GNDA GND
Place on the moat between GND & GNDA.
DA8
BEEP#<40>
HDA_SPKR<13>
2
1
3
BAT54C-7-F_SOT23-3
0.1U_0402_16V7K
12
RA19
@
10K_0402_5%
CA41
1 2
PC_BEEP
PC Beep
B B
Close to UA1
n11,13,14,16
Pi
INT-SPK-RINT-SPK-R+
LA7
iPhone type Combo Jack
FBMA-L10-160808-800LMT_2P
MIC_IN
18_0402_5%
1 2
1 2
5
AUD_HP_OUT_LLHPOUT-L
18_0402_5%
AUD_HP_OUT_RL
JACK_PLUG#
RA55
HPOUT-R
RA56
A A
LA8 FBMA-L10-160808-800LMT_2P
LA9 FBMA-L10-160808-800LMT_2P
@
RA21 0_0402_1%
12
12
AUD_HP_OUT_L_CN
12
AUD_HP_OUT_R_CN
12
AUD_HP_NB_SENSE_R
3
DA10
CA38
100P_0402_50V8J
CA33
100P_0402_50V8J
CA39
100P_0402_50V8J
1
1
1
2
2
2
4
AZ5125-02S.R7G_SOT23-3
1
EMC@
AZ5125-02S.R7G_SOT23-3
1
EMC@
2
3
2
JHP
CONN@
3
6
1
2
4
5
DA12
SINGA_2SJ-E960-001F
DC230007Y00
DC021103300 (OLD)
3
INT-SPK-LINT-SPK-L+
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
LA3 0_0603_5%~D
1 2
LA4 0_0603_5%~D
1 2
LA5 0_0603_5%~D
1 2
LA6 0_0603_5%~D
Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R-
Speaker 4 ohm : 40mil
Speaker 8 ohm : 20mil
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
close to Codec
SPK_R1-_CONN
SPK_R2+_CONN
SPK_L1-_CONN
SPK_L2+_CONN
1
CA29
2
1000P_0402_50V7K
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
JSPK
1
1
2
2
3
5
3
GND
4
6
4
3
1
CA30
2
1
1
CA32
CA31
2
2
1000P_0402_50V7K
1000P_0402_50V7K
1
1000P_0402_50V7K
EMC@
AZ5125-02S.R7G_SOT23-3
DA5
AZ5125-02S.R7G_SOT23-3
1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
3
2
GND
E&T_3703-Q04N-11R
DA6
CONN@
SP02000H300
EMC@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Audio Codec ALC3221
Audio Codec ALC3221
Audio Codec ALC3221
LA-9104P
LA-9104P
LA-9104P
1
1.0
1.0
33 57Wednesday, August 29, 2012
33 57Wednesday, August 29, 2012
33 57Wednesday, August 29, 2012
1.0
Page 34
5
4
3
2
1
D D
+VCC_3IN1+3VS
WCM-2012HS-900T_4P
USB20_CR_P10<16>
USB20_CR_N10<16>
C C
B B
USB20_CR_P10
USB20_CR_N10
1
4
LR2
RR8 0_0402_5%@
RR7 0_0402_5%@
1
4
EMC@
1 2
1 2
2
2
3
3
0.1U_0402_16V7K
USB20_CR_P10_R
USB20_CR_N10_R
+3VS
1
CR1
2
1
CR2
4.7U_0603_6.3V6K
2
12
RR1 6.19K_0402_1%
USB20_CR_N10_R
USB20_CR_P10_R
CR4
CR3
2
2
1
1
1U_0402_6.3V6K
1U_0402_6.3V6K
RREF
UR1
1
RREF
2
DM
3
DP
7
XD_CD#
23
XD_D7
17
GPIO0
6
SDREG
24
V18
Trace width:40mil
4
5
3V3_IN
CARD_3V3
RTS5179-GR_QFN24
Thermal pad
25
RTS5179-GR_QFN24_4X4
22
MS_BS
SP14
21
SP13
SP12
SP11
SP10
SP9
SP8
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SD_D2
20
MS_D1_SD_D3
19
18
SD_CMD
16
MS_D0
15
MS_D2_SD_CLK_R MS_D2_SD_CLK
14
13
SD_CD#
12
MS_D3
11
SD_D0
10
SD_D1
9
MS_INS#
8
MS_CLK_SD_WP_R MS_CLK_SD_WPV18
SD_CD# MS_INS#
CR9
0.1U_0402_16V7K
close to chip side
1 2
RR2 0_0402_5%
1 2
RR3 0_0402_5%
+VCC_3IN1
1
CR8
4.7U_0603_6.3V6K
2
1
CR7
0.1U_0402_16V7K
2
Close to JREAD1
1
2
SD_CMD
CR11
10P_0402_50V8J
0.1U_0402_16V7K
For ESD request.
Place close to UR1
RR4
@
10K_0402_5%
1 2
12
CR10
CR55P_0402_50V8C
1
2
SD_D2
MS_D1_SD_D3
MS_CLK_SD_WP
SD_CMD
MS_D3
MS_INS#
MS_D2_SD_CLK
MS_D0
MS_D1_SD_D3
MS_D2_SD_CLK
MS_BS
SD_D0
SD_D1
SD_CD#
MS_CLK_SD_WP
1
2
拉
MS_D2_SD_CLK到Conn pin 13 SD_CLK
再再
Via拉到pin 10 MS_D2
拉
MS_CLK_SD_WP到Conn pin 5 MS_CLK
CR65P_0402_50V8C
1
再再
2
Via拉到pin 20 SD_W
+VCC_3IN1
JREAD
1
SD-DAT2
2
MS-VSS1
3
SD-CD/DAT3 MMC -RSV
4
MS-VCC
5
MS-SCLK
6
SD-CMD MMC-C MD
7
MS-DATA3
8
MS-INS
9
SD-VSS MMC-VSS1
10
MS-DATA2
11
SD-VDD MMC-VDD
12
MS-DATA0
13
MS-DATA1
14
SD-CLK MMC-CL K
15
MS-BS
16
MS-VSS2
17
SD-VSS MMC-VSS2
18
SD-DAT0 MMC-DAT
19
SD-DAT1
20
SD-CD
SD-GND21GND1
22
SD-WP(SW )
T-SOL_143-2300302602_RV
CONN@
SP071204100
TCX004AK00
L
GND2
23
24
For ESD request.
Place close to JREAD
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Card Reader RTS5179
Card Reader RTS5179
Card Reader RTS5179
LA-9104P
LA-9104P
LA-9104P
1
34 57Wednesday, August 29, 2012
34 57Wednesday, August 29, 2012
34 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 35
A
B
C
D
E
+5VALW to +5VS
+5VALW
QZ1
1 1
B+_BIAS
DMN66D0LDW-7_SOT363-6
1
CZ1
10U_0805_10V6K
2
RZ4
1 2
56K_0402_5%
SUSP
1
CZ2
10U_0805_10V6K
2
5
SI4128DY-T1-GE3_SO8
8
7
6
5
1 2
@
RZ5 0_0402_1%
3
QZ2B
4
4
0.1U_0603_50V_X7R
1
2
+3VALW to +3VS
+3VALW
QZ7
SI4128DY-T1-GE3_SO8
2 2
Reserve for ESD
CZ23
12
0.1U_0402_16V7K
SUSP
B+_BIAS
1
CZ11
10U_0805_10V6K
2
RZ13
1 2
56K_0402_5%
SUSP
QZ9
2N7002K_SOT23-3
Please close to QZ9
B+_BIAS
12
RZ18
3 3
SUSP
+5VALW
+3VS
+3VS
4 4
+3VS +1.05VS
470K_0402_5%
13
D
2
G
S
1 2
CZ24
@
0.1U_0402_16V7K
1 2
CZ25
@
0.1U_0402_16V7K
1 2
CZ26
@
0.1U_0402_16V7K
1 2
CZ27
@
0.1U_0402_16V7K
1 2
CZ28
@
0.1U_0402_16V7K
1 2
CZ29
@
0.1U_0402_16V7K
QZ11
2N7002BKW_SOT323-3~D
Reserve for ESD
A
8
7
6
1
5
CZ12
10U_0805_10V6K
2
39.2K_0402_1%
13
D
2
G
S
+1.5V To +1.5VS
+1.5V +1.5VS
1 2
@
RZ20 0_0402_1%
+5VALW
4
RZ14
UZ1
SI4634DY-T1-E3_SO8~D
8
7
6
5
0.1U_0603_50V_X7R
1
2
0.1U_0603_50V_X7R
1
2
CZ20
+5VS
1
2
3
CZ9
1
2
3
CZ15
4
12
2M_0402_5%~D
CZ3
@
RZ6
1.5M_0402_5%
1 2
1 2
1
2
3
RZ21
10U_0805_10V6K
1U_0603_10V6K
1
1
CZ4
2
+3VS
1
CZ13
10U_0805_10V6K
2
@
RZ15
2M_0402_5%~D
10U_0805_10V6K
CZ18
CZ19
1
1
2
2
470_0402_5%
SUSP SUSP
2
0.1U_0402_16V7K
QZ13A
+1.5VS
RZ23
2
B
RZ1
470_0603_5%
1 2
+5VS_D
61
QZ2A
DMN66D0LDW-7_SOT363-6
1
CZ14
1U_0603_10V6K
2
12
+1.5VS_D
61
2N7002DW-7-F_SOT363-6
2
SUSP
470_0402_5%
SUSP
QZ13B
5
RZ24
12
+VCCP_D
3
4
SUSP#<10,40,48,49,50>
RZ16
100K_0402_5%
PCH_PWR_EN#
2N7002DW-7-F_SOT363-6
B+_BIAS
470_0402_5%
12
QZ14A
2
1
CZ5
10U_0805_10V6K
2
RZ7
470K_0402_5%
PCH_PWR_EN#
2N7002K_SOT23-3
SUSP
2
0.1U_0603_50V_X7R
1
@
CZ16
2
+3V_PCH
12
RZ25
+3V_D
61
+3VALW to +3V_PCH
+3VALW
1
CZ6
10U_0805_10V6K
2
2
G
QZ4
12
RZ10
100K_0402_5%
13
D
QZ8
2N7002K_SOT23-3
S
1 2
RZ8 0_0402_1%
13
D
S
QZ14B
5
C
1 2
+5VALW
G
2N7002DW-7-F_SOT363-6
+3VS+VCCP
12
3
4
8
7
6
5
@
RZ26
470_0402_5%
+3VS_D
2N7002DW-7-F_SOT363-6
JP2
@
2
112
JUMP_43X79
QZ3
SI4128DY-T1-GE3_SO8
4
1
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
0.1U_0603_50V_X7R
CZ10
1
2
3
470_0402_5%
SYSON#
+3V_PCH
40mil
1
CZ7
10U_0805_10V6K
2
RZ9
2M_0402_5%~D
1 2
10K_0402_5%
PCH_PWR_EN<40>
+1.5V
12
RZ27
+1.5V_D
13
D
2
G
S
1
CZ8
1U_0603_10V6K
2
PCH_PWR_EN#
2
G
0.1U_0603_50V_X7R
1
CZ17
2
D
2N7002BKW_SOT323-3~D
+5VALW
12
RZ12
100K_0402_5%
13
D
QZ10
2N7002K_SOT23-3
S
RUN_ON_CPU1.5VS3#<10,6>
+3VALW
RZ11
@
1 2
PCH_PWR_EN#<19>
12
RZ17
100K_0402_5%
QZ15
2N7002BKW_SOT323-3~D
Compal Secret Data
Compal Secret Data
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
QZ5
2
G
SYSON<40,50>
RZ22
100K_0402_5%
+0.75VS+1.5V_CPU_VDDQ
12
RZ3
220_0402_5%
+1.5V_CPU_VDDQ_CHG
13
D
S
SYSON#
0.1U_0402_25V6K
12
RZ2
22_0603_5%~D
+DDR_CHG
QZ6
13
D
2N7002BKW_SOT323-3~D
2
G
S
+5VALW
12
RZ19
100K_0402_5%
1
CZ22
2
13
D
2
QZ12
G
0.1U_0603_50V_X7R
1
12
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2N7002K_SOT23-3
S
@
CZ21
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DC/DC Interface
DC/DC Interface
DC/DC Interface
LA-9104P
LA-9104P
LA-9104P
1.0
1.0
35 57Wednesday, August 29, 2012
35 57Wednesday, August 29, 2012
E
35 57Wednesday, August 29, 2012
1.0
Page 36
5
4
3
2
1
4.7U_0805_10V4Z
4.7U_0805_10V4Z
CI12
CI6
+5VALW
USB_EN#
+5VALW
USB_EN#
1
2
1
2
1
CI14
0.1U_0402_16V7K
2
1
CI13
0.1U_0402_16V7K
2
1
CI7
0.1U_0402_16V7K
2
1
CI26
0.1U_0402_16V7K
2
USB3RN1_JUSB2_R
USB3RP1_JUSB2_R
USB3TN1_JUSB2_R
USB3TP1_JUSB2_R
2.0A
UI3
1
GND
VOUT
2
VOUT
VIN
VIN3VOUT
4
FLG
EN
EPAD
9
AP2301MPG-13_MSOP8
USB3RN2_JUSB1_R
USB3RP2_JUSB1_R
USB3TP2_JUSB1_R
2.0A
UI2
1
GND
VOUT
2
VOUT
VIN
VIN3VOUT
4
FLG
EN
EPAD
9
AP2301MPG-13_MSOP8
DI4
EMC@
1
2
4
5
3
8
IP4292CZ10-TBR_XSON10_2.5X1~D
+5V_USB_PWR1
8
80mil
7
6
5
1
2
4
5
3
8
IP4292CZ10-TBR_XSON10_2.5X1~D
8
7
6
5
DI1
EMC@
+5V_USB_PWR2
10
9
7
6
0_0402_1%
1 2
RI19
@
10
9
7
6
80mil
0_0402_1%
1 2
RI20
@
USB3RN1_JUSB2_R
USB3RP1_JUSB2_R
USB3TN1_JUSB2_R
USB3TP1_JUSB2_R
1
CI15
0.1U_0402_16V7K
2
USB3RN2_JUSB1_R
USB3RP2_JUSB1_R
USB3TN2_JUSB1_RUSB3TN2_JUSB1_R
USB3TP2_JUSB1_R
1
CI17
0.1U_0402_16V7K
2
USB_OC1# <16>
USB_OC0# <16>
220U_6.3V_M
+5V_USB_PWR2
CI8
220U_6.3V_M
+5V_USB_PWR1
1
+
CI1
2
1
+
2
USB conn.1
JUSB1
9
SSTX+
1
VBUS
8
SSTX-
3
D+
7
GND
2
D-
6
SSRX+
4
GND
5
SSRX-
ACON_TARA4-9K1311
CONN@
USB 2.0 Port 1
USB 3.0 Port 2
DC233007O10
DC231204030 (OLD)
10
GND
11
GND
12
GND
13
GND
3
EMC@
1
2
PESD5V0U2BT_SOT23-3~D
USB3TP2_JUSB1_R
USB3TN2_JUSB1_R
USB20_JUSB1_P1_R
USB20_JUSB1_N1_R
USB3RP2_JUSB1_R
DI2
USB3RN2_JUSB1_R
0.1U_0402_25V6K
1
CI2
2
USB conn.2
JUSB2
CONN@
9
SSTX+
1
VBUS
8
SSTX-
3
D+
7
GND
2
D-
6
SSRX+
4
GND
5
SSRX-
ACON_TARA4-9K1311
USB 2.0 Port 0
USB 3.0 Port 1
DC233007O10
DC
231204030 (OLD)
10
GND
11
GND
12
GND
13
GND
3
EMC@
1
2
DI5
PESD5V0U2BT_SOT23-3~D
USB3TP1_JUSB2_R
USB3TN1_JUSB2_R
USB20_JUSB2_P0_R
USB20_JUSB2_N0_R
USB3RP1_JUSB2_R
USB3RN1_JUSB2_R
0.1U_0402_25V6K
1
CI9
2
WCM-2012HS-900T_4P
12
USB3TN2_JUSB1_CUSB3TN2_JUSB1
12
USB3TP2_JUSB1_C
4
1
RI13 0_0402_5%@
RI14 0_0402_5%@
12
USB3TN1_JUSB2_CUSB3TN1_JUSB2
12
USB3TP1_JUSB2_C
USB20_JUSB2_N0
USB20_JUSB2_P0
4
4
1
1
LI1
1 2
RI1 0_0402_5%@
1 2
RI2 0_0402_5%@
4
1
WCM-2012HS-900T_4P
4
1
LI4
EMC@
1 2
1 2
D D
C C
B B
A A
USB3RN2_JUSB1<16>
USB3RP2_JUSB1<16>
USB3TN2_JUSB1<16>
USB3TP2_JUSB1<16>
USB20_JUSB1_N1<16>
USB20_JUSB1_P1<16>
USB3RN1_JUSB2<16>
USB3RP1_JUSB2<16>
USB3TN1_JUSB2<16>
USB3TP1_JUSB2<16>
USB3RN2_JUSB1
USB3RP2_JUSB1
USB3TP2_JUSB1
USB3RN1_JUSB2
USB3RP1_JUSB2
USB3TP1_JUSB2
USB20_JUSB2_N0<16>
USB20_JUSB2_P0<16>
CI3 0.01U_0402_16V7K
CI4 0.01U_0402_16V7K
USB20_JUSB1_N1
USB20_JUSB1_P1
CI10 0.01U_0402_16V7K
CI11 0.01U_0402_16V7K
3
3
2
2
EMC@
WCM-2012HS-900T_4P
4
4
1
1
LI3
RI4 0_0402_5%@
RI6 0_0402_5%@
WCM-2012HS-900T_4P
3
4
1
2
LI2
EMC@
1 2
RI3 0_0402_5%@
1 2
RI5 0_0402_5%@
3
3
2
2
3
2
EMC@
1 2
1 2
3
2
WCM-2012HS-900T_4P
4
4
1
1
LI6
EMC@
1 2
RI17 0_0402_5%@
1 2
RI18 0_0402_5%@
WCM-2012HS-900T_4P
4
4
1
1
LI5
EMC@
1 2
RI15 0_0402_5%@
1 2
RI16 0_0402_5%@
USB3RN2_JUSB1_R
USB3RP2_JUSB1_R
3
2
USB20_JUSB1_N1_R
USB20_JUSB1_P1_R
USB3RN1_JUSB2_R
USB3RP1_JUSB2_R
3
3
2
2
3
3
2
2
USB_EN#<37,40>
USB3TN2_JUSB1_R
USB3TP2_JUSB1_R
USB3TN1_JUSB2_R
USB3TP1_JUSB2_R
USB20_JUSB2_N0_R
USB20_JUSB2_P0_R
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
USB3.0
USB3.0
USB3.0
LA-9104P
LA-9104P
LA-9104P
1
36 57Wednesday, August 29, 2012
36 57Wednesday, August 29, 2012
36 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 37
5
D D
WCM-2012HS-900T_4P
USB20_JUSB3_P2<16>
USB20_JUSB3_N2<16>
C C
USB20_JUSB3_P2
USB20_JUSB3_N2
4
4
1
1
LI7
RI25 0_0402_5%@
RI21 0_0402_5%@
EMC@
1 2
1 2
4
+5VALW
1
1
USB_EN#
2
CI22
0.1U_0402_16V7K
2
1
CI16
0.1U_0402_16V7K
2
UI4
1
GND
2
VIN
VIN3VOUT
4
EN
CI23
4.7U_0805_10V4Z
USB_EN#<36,40> USB_OC2# <16>
3
2
USB20_JUSB3_P2_R
USB20_JUSB3_N2_R
3
2
2.0A
8
VOUT
7
VOUT
6
5
FLG
EPAD
9
AP2301MPG-13_MSOP8
3
+5V_USB_PWR3
80mil
RI24
0_0402_1%
1 2
@
1
CI24
0.1U_0402_16V7K
2
2
USB20_JUSB3_N2_R
USB20_JUSB3_P2_R
1
USB conn.3
+5V_USB_PWR3
2
3
DI7
PESD5V0U2BT_SOT23-3~D
EMC@
1
JUSB3
1
VBUS
2
D-
3
D+
4
GND
5
GND
6
GND
7
GND
8
GND
ACON_UARBG-4K1926
CONN@
USB 2.0 Port 2
DC233007P00
DC233007P00(OLD)
+5V_USB_PWR3
1
+
CI20
220U_6.3V_M
2
Place close to JUSB3
0.1U_0402_25V6K
1
CI19
2
+5VALW
1
1
USB_EN#
2
CI30
0.1U_0402_16V7K
2
1
CI25
0.1U_0402_16V7K
2
UI5
1
GND
2
VIN
VIN3VOUT
4
EN
2.0A
8
VOUT
7
VOUT
6
5
FLG
EPAD
9
AP2301MPG-13_MSOP8
+5V_USB_PWR4
80mil
RI31
3
0_0402_1%
1 2
@
1
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CI32
0.1U_0402_16V7K
USB_OC3# <16>
USB20_USBDB_P3_R
USB20_USBDB_N3_R
2
3
DI8
PESD5V0U2BT_SOT23-3~D
@
1
Compal Secret Data
Compal Secret Data
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
USB conn.4
+5V_USB_PWR4
1
+
CI27
@
220U_6.3V_M
2
JDB
1
1
2
2
3
3
4
4
5
5
6
9
6
G1
7
10
7
G2
8
8
ACES_51524-0080N-001
CONN@
USB 2.0 Port 3
SP01001A900
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MB to USB2.0 DB
MB to USB2.0 DB
MB to USB2.0 DB
LA-9104P
LA-9104P
LA-9104P
1
1.0
1.0
37 57Wednesday, August 29, 2012
37 57Wednesday, August 29, 2012
37 57Wednesday, August 29, 2012
1.0
CI31
B B
USB20_USBDB_P3<16>
USB20_USBDB_N3<16>
A A
USB20_USBDB_P3
USB20_USBDB_N3
5
WCM-2012HS-900T_4P
4
4
1
1
LI10
EMC@
1 2
RI32 0_0402_5%@
1 2
RI28 0_0402_5%@
3
3
2
2
USB20_USBDB_P3_R
USB20_USBDB_N3_R
4.7U_0805_10V4Z
4
Page 38
5
4
3
2
1
Mini WLAN/WIMAX H=6.7
1 2
CC47
CC47
CC47CC47
0.047U_0402_16V4Z
C40
1
2
靠靠靠靠靠靠靠靠
0.047U_0402_16V4Z
C42
+3V_WLAN
0.1U_0402_25V6K
2
1
JMINI
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
CONCR_525B01BE17A
CONN@
DC040009U00
wlan connector
wlan connector
wlan connectorwlan connector
0.1U_0402_25V6K
1
2
C46
C48
2
1
D D
BT_ON#
PCIE_PRX_WLANTX_N2<14>
PCIE_PRX_WLANTX_P2<14>
PCIE_PTX_WLANRX_N2<14>
PCIE_PTX_WLANRX_P2<14>
BT_ON#<17>
C C
R12 0_0402_5%
BT_ON#
47P_0402_50V8J
WLAN_WAKE#<40>
WLAN_CLKREQ#<14>
CLK_PCIE_WLAN#<14>
CLK_PCIE_WLAN<14>
@
12
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2
EC_TX
EC_TX<40>
EC_RX
EC_RX<40>
R13 1K_0402_1%
+1.5VS
0.047U_0402_16V4Z
1
1
@
C87
2
2
WLAN_WAKE#
WLAN_CLKREQ#
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
C49 0.1U_0402_10V7K~D
1 2
PCIE_PRX_WLANTX_N2_C
1 2
PCIE_PRX_WLANTX_P2_C
C44 0.1U_0402_10V7K~D
1 2
R14 0_0402_1%@
1 2
R15 0_0402_1%@
12
100K_0402_5%
+3V_WLAN
0.047U_0402_16V4Z
0.1U_0402_25V6K
@
1
1
C47
C45
C50
2
2
R11
1
2
HDD LED
LED2
B B
PCH_SATALED#<13>
PCH_SATALED#
R2
1 2
390_0402_5%
12-21C-T3D-CM2P1B18X-2C_WHITE
1 2
3
+3V_WLAN
+1.5VS
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
34
36
38
40
42
44
46
48
50
52
GND2
4.7U_0603_6.3V6K
1
+
C43
2
PCH_SMBCLK
32
PCH_SMBDATA
34
36
38
40
42
44
46
48
50
52
54
CC47
1
@
330U_D2_2VM_R6M~D
C88
47P_0402_50V8J
@
2
12
@
R16 0_0402_1%
PCH_SMBCLK <11,12,14,6>
PCH_SMBDATA <11,12,14,6>
USB20_MINI1_N8
USB20_MINI1_P8
PLT_RST#
+3VS
12
PLT_RST# <16,32,40,6>
USB20_MINI1_N8 <16>
USB20_MINI1_P8 <16>
R110
10K_0402_5%
+3VS
2
G
1 3
D
QV30
2N7002_SOT23-3
WL_OFF#WLAN_RADIO_DIS#_R
S
WL_OFF# <16>
WLAN_ON<40>
DMN66D0LDW-7_SOT363-6
WLAN_ON
+3V_AOAC
Power Control for Mini card
@
12
+3VALW
Q4A
2
R18
100K_0402_5%
@
1 2
R25
0_1206_5%~D
1 2
R22
0_1206_5%~D
@
+3VALW
B+_BIAS
100K_0402_5%
12
61
100K_0402_5%
12
R19
@
R20
@
DMN66D0LDW-7_SOT363-6
3
Q4B
5
@
4
+3V_WLAN+3VS
SI3456DDV-T1-GE3_TSOP6~D
D
6
S
45
2
1
G
3
1M_0402_5%
12
R21
@
Q2
+3V_AOAC
@
12
R17
@
4700P_0402_25V7K
1
C13
2
@
20K_0402_5%
Battery LED
+5VS
R3
BATT_CHG_LED#<40>
BATT_LOW_LED#<40>
BATT_CHG_LED#
BATT_LOW_LED#
1 2
680_0402_1%
R4
1 2
390_0402_5%
White
2
1
3
Amber
LED3
HT-210UD5-BP5_AMBER-WHITE
+5VALW
Power LED
10mils, All pins
13
D
PWR_PWM_LED#<40>
R786
100K_0402_5%
A A
5
2
G
S
12
PWR_LED#
Q1
2N7002_SOT23-3
R1
1 2
390_0402_5%
LED1
12-21C-T3D-CM2P1B18X-2C_WHITE
1 2
3
4
+5VALW
WL_BT_LED#<40>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
WL_BT_LED#
Compal Secret Data
Compal Secret Data
Compal Secret Data
Wireless LED
R9
1 2
680_0402_1%
Deciphered Date
Deciphered Date
Deciphered Date
2
LED4
12-21C-T3D-CM2P1B18X-2C_WHITE
1 2
+5VALW
3
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Mini Card/LED
Mini Card/LED
Mini Card/LED
LA-9104P
LA-9104P
LA-9104P
1
38 57Wednesday, August 29, 2012
38 57Wednesday, August 29, 2012
38 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 39
5
4
3
2
1
D D
ON/OFF switch
TOP Side
SW1
@
SMT1-05-A_4P
3
1
2
4
5
6
Bottom Side
SW2
@
SMT1-05-A_4P
3
1
2
4
5
6
C C
Pop only
b
efore MP
Power ON Circuit
DE1
ON/OFFBTN#
1
CE20
0.1U_0402_25V6K
2
P
OWER/B
1
EC_ON<40,47>
10K_0402_5%
BAV70W_SOT323-3
@
RE51
+3VLP
RE49
100K_0402_5%
KB9012@
2
3
1 2
13
D
2
G
S
1 2
QE1
@
2N7002K_SOT23-3
ON/OFF <40>
+FAN_POWER
40mil
1
1
CE23
CE22
2
2
2.2U_0603_6.3V6K
1000P_0402_50V7K
EN_DFAN1<40>
FAN_SPEED1<40>
EN_DFAN1
FAN Control circuit
+5VS
+3VS
12
1
2
1 2
UE3
1
VEN
2
VIN
3
VO
4
VSET
APE8873M SOP 8P
+FAN_POWER
RE50
10K_0402_5%
CE24
0.01U_0402_16V7K
CE25
2.2U_0603_6.3V6K
8
GND
7
GND
6
GND
5
GND
40mil
JFAN
1
1
2
2
3
3
4
GND
5
GND
ACES_85204-0300N
CONN@
SP02000JR00
INT_KBD Conn.
+3VALW
LID_SW#<40>
B B
LID_SW#
ON/OFFBTN#
EMC@
2
3
DE5
PESD24VS2UT_SOT23-3~D
1
JPWR
1
1
2
2
3
3
4
4
5
GND
6
GND
HB_A090420-SAHR21
CONN@
SP01001G200
SP01000Z300 (OLD)
KSI[0..7]<40>
KSO[0..16]<40>
Touch pad
+3VS
TP_CLK<40>
TP_DATA<40>
TP_SMBCLK<14>
TP_SMBDATA<14>
A A
TP_CLK
TP_DATA
TP_SMBCLK
TP_SMBDATA
EMC@
2
3
DE3
PESD5V0U2BT_SOT23-3~D
1
JTP
1
1
2
2
3
3
4
4
5
7
5
G1
6
8
6
G2
ACES_51524-0060N-001
CONN@
SP010014M10
+5VS
CAPS_LED<40>
2
G
KSO[0..16]
RE60
1 2
240_0402_1%
13
D
QE3
2N7002BKW_SOT323-3~D
S
KSI[0..7]
KSI7
KSI6
KSI4
KSI2
KSI5
KSI1
KSI3
KSI0
KSO5
KSO4
KSO7
KSO6
KSO8
KSO3
KSO1
KSO2
KSO0
KSO12
KSO16
KSO15
KSO13
KSO14
KSO9
KSO11
KSO10
KB_CAPS_PWR
KB_CAPS_PWR-
JKB
CONN@
HB_A823020-SBHR21
30
30
GND
29
29
GND
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
S
P01001H500
32
31
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
FAN/TP/KB/PWR SW
FAN/TP/KB/PWR SW
FAN/TP/KB/PWR SW
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-9104P
LA-9104P
LA-9104P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
39 57Wednesday, August 29, 2012
39 57Wednesday, August 29, 2012
39 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 40
5
4
3
2
1
Board ID
DIS@
12
VCIN0_PHVCIN0_PH_R
12
PCH_PWR_EN
ECAGND
ADP_I <45,46>
WL_BT_LED#
ENBKL
H_PECI
Rb => NC
BATT_TEMP <45,46>
TP_CLK
TP_DATA
+3VLP
12
ACIN <15,25,45,46>
EC_ON <39,47>
+3VALW
D D
+3VS
@
1 2
1 2
@
10K_0402_5%
1
2
EC_SCI#
PCH_HOT#
EC_SMB_CK1_R
EC_SMB_DA1_R
KSO1
KSO2
LID_SW#
WLAN_WAKE#
EC_SMI#
EC_PME#
EC_SMB_CK2
EC_SMB_DA2
ODD_EC_EN#
12
12
RE18
12
H_PROCHOT#<46,6>
PM_SLP_S3#_R
PM_SLP_S5#_R
PCH_PWROK
PCIE_WAKE#<15,32>
VR_HOT#<52>
CE10
22P_0402_50V8J@
RE8 47K_0402_5%
+3VALW
CE11 0.1U_0402_16V7K
EC_SMB_CK2 <25>
EC_SMB_DA2 <25>
EC_SMB_CK1<45,46>
EC_SMB_DA1<45,46>
PCH_SMLCLK<14>
PCH_SMLDATA<14>
PCH_PWROK<15,6>
1 2
RE61 0_0402_1%
VR_HOT#
12
SN74LVC1G06DCKR_SC70-5
47P_0402_50V8J
CE19
1
2
12
RE6 33_0402_5%@
CLK_PCI_LPC<16>
12
12
KSI[0..7]<39>
KSO[0..16]<39>
PM_SLP_S3#<15>
PM_SLP_S5#<15> EC_LID_OUT# <17>
CE_EN<21>
DBC_EN<21>
@
RE82 please clo se to EC
+3VS
@
0_0402_1%
RE44
5
UE2
Y4A
1
RE32 10K_0402_5%
RE35 10K_0402_5%
+3VALW
1 2
RE11 2.2K_0402_5%
1 2
RE13 2.2K_0402_5%
1 2
RE62 47K_0402_5%@
1 2
RE63 47K_0402_5%@
1 2
RE71 10K_0402_5%
1 2
C C
B B
RE70 10K_0402_5%
1 2
RE16 1K_0402_1%
1 2
RE21 10K_0402_5%
1 2
RE24 2.2K_0402_5%
1 2
RE25 2.2K_0402_5%
1 2
RE72 10K_0402_5%
Reserve for ESD
FAN_SPEED1
CE29
220P_0402_50V8J
@
@
CE27
0.1U_0402_16V7K
CE28
0.1U_0402_16V7K
Please close to EC
Please close to EC
A A
@
1 2
RE1 0_0805_1%
12
KSI[0..7]
KSO[0..16]
TOUCH_ON#<41>
EC_SMB_CK1 EC_SMB_CK1_R
1 2
RE28 0_0402_1%@
1 2
RE29 0_0402_1%@
RE31 0_0402_1%@
RE33 0_0402_1%@
CE_EN
DBC_EN
PCH_PWROK
RE40 0_0402_1%
EC_PME#
SUSCLK_R<15>
0.1U_0402_16V7K
CE15
1
2
P
2
VCOUT1_PHH_PROCHOT#
G3NC
RE47
100K_0402_5%
1 2
1
CE1
2
0.1U_0402_16V7K
GATEA20<17>
KB_RST#<17>
SERIRQ<13>
LPC_FRAME#<13>
PLT_RST#<16,32,38,6>
WLAN_ON<38>
1 2
RE26 0_0402_1%@
1 2
RE27 0_0402_1%@
1 2
1 2
EC_SMI#<17>
PS_ID<45>
CMOS_ON#<21>
130W/90W#<45>
FAN_SPEED1<39>
1 2
@
0.1U_0402_16V7K
1
CE2
2
0.1U_0402_16V7K
LPC_AD3<13>
LPC_AD2<13>
LPC_AD1<13>
LPC_AD0<13>
EC_SCI#<17>
TOUCH_ON#
EC_TX<38>
EC_RX<38>
RE82
0_0402_5%
1 2
RE45 100K_0402_5%
1 2
CE17 20P_0402_50V8
@
CE12
22P_0402_50V8J
1
CE3
2
GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
EC_RST#
EC_SCI#
EC_SMB_CK2
EC_SMB_DA2
PM_SLP_S3#_R
PM_SLP_S5#_R
EC_SMI#
FAN_SPEED1
EC_PME#
@
YE1
32.768KHZ_12.5PF_Q13MC14610002
0.1U_0402_16V7K
1
CE4
2
1000P_0402_50V7K
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
EC_SMB_DA1_REC_SMB_DA1
EC_TX
EC_RX
EC_CRY1
EC_CRY2
12
EC_CRY1
1
1
2
2
2
1
EC_CRY2
OSC4OSC
NC3NC
CE5
122
123
2
CE6
1000P_0402_50V7K
1
UE1
1
GATEA20/GPIO00
2
KBRST#/GPIO01
3
SERIRQ
4
LPC_FRAME#
5
LPC_AD3
7
LPC_AD2
8
LPC_AD1
10
LPC_AD0
12
CLK_PCI_EC
13
PCIRST#/GPIO05
37
EC_RST#
20
EC_SCII#/GPIO0E
38
GPIO1D
55
KSI0/GPIO30
56
KSI1/GPIO31
57
KSI2/GPIO32
58
KSI3/GPIO33
59
KSI4/GPIO34
60
KSI5/GPIO35
61
KSI6/GPIO36
62
KSI7/GPIO37
39
KSO0/GPIO20
40
KSO1/GPIO21
41
KSO2/GPIO22
42
KSO3/GPIO23
43
KSO4/GPIO24
44
KSO5/GPIO25
45
KSO6/GPIO26
46
KSO7/GPIO27
47
KSO8/GPIO28
48
KSO9/GPIO29
49
KSO10/GPIO2A
50
KSO11/GPIO2B
51
KSO12/GPIO2C
52
KSO13/GPIO2D
53
KSO14/GPIO2E
54
KSO15/GPIO2F
81
KSO16/GPIO48
82
KSO17/GPIO49
77
EC_SMB_CK1/GP IO44
78
EC_SMB_DA1/GPIO45
79
EC_SMB_CK2/GP IO46
80
EC_SMB_DA2/GPIO47
6
PM_SLP_S3#/GPIO04
14
PM_SLP_S5#/GPIO07
15
EC_SMI#/GPIO08
16
GPIO0A
17
GPIO0B
18
GPIO0C
19
GPIO0D
25
EC_INVT_PWM/GP IO11
28
FAN_SPEED1/GPIO14
29
EC_PME#/GPIO15
30
EC_TX/GPIO16
31
EC_RX/GPIO17
32
PCH_PWR OK/GPIO18
34
SUSP_LED#/GPIO19
36
NUM_LED#/GPIO1A
XCLKI/GPIO5D
XCLKO/GPIO5E
@
1
CE13
22P_0402_50V8J
2
+3VALW_EC
LPC & MISC
Int. K/B
Matrix
LE1
FBMA-L11-160808-800LMT_0603
1 2
111
9
22
33
96
125
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
PWM Output
AD Input
DA Output
PS2 Interface
CPU1.5V_S3_GATE/GP XIOA00
SPI Device Interface
SPI Flash ROM
GPIO
SM Bus
GPIO
GND/GND
GND/GND
GND/GND
GND/GND
GND0
11
24
35
94
113
+EC_VCCA
+EC_VCCA
1
0.1U_0402_16V7K
2
1 2
@
RE4 0_0402_1%
Reserved for KB9012
67
GPIO0F
BEEP#/GPIO10
EC_VDD/AVCC
GPIO12
ACOFF/GPIO13
BATT_TEMP/GPIO38
GPIO39
ADP_I/GPIO3A
GPIO3B
GPIO42
IMON/GPIO43
DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D
IREF/GPIO3E
CHGVADJ/GPIO3F
EC_MUTE#/GPIO4A
USB_EN#/GPIO4B
CAP_INT#/GPIO4C
EAPD/GPIO4D
TP_CLK/GPIO4E
TP_DATA/GPIO4F
WOL_EN/GPXIOA01
ME_EN/GPXIOA02
VCIN0_PH/GPXIOD00
SPIDI/GPIO5B
SPIDO/GPIO5C
SPICLK/GPIO58
SPICS#/GPIO5A
ENBKL/GPIO40
PECI_KB930/GPIO41
FSTCHG/GPIO50
BATT_CHG_LE D#/GPIO52
CAPS_LED#/GPIO53
PWR_LED #/GPIO54
BATT_LOW_ LED#/GPIO55
SYSON/GPIO56
VR_ON/GPIO57
PM_SLP_S4#/GPIO59
EC_RSMRST# /GPXIOA03
EC_LID_OUT#/GPXIOA04
PROCHOT_IN/GPXIOA05
H_PROCHOT# _EC/GPXIOA06
VCOUT0_PH/GPXIOA07
GPO
BKOFF#/GPXIOA08
PBTN_OUT# /GPXIOA09
PCH_APWROK /GPXIOA10
SA_PGOOD/GPXIOA11
AC_IN/GPXIOD01
EC_ON/GPXIOD02
ON/OFF/GPXIOD03
GPI
LID_SW#/GPXIOD04
SUSP#/GPXIOD05
GPXIOD06
PECI_KB9012/GPXIOD07
AGND/AGND
69
FBMA-L11-160808-800LMT_0603
KB9012QF-A3_LQFP128_14X14KB9012@
20mil
ECAGND
V18R
LE2
CE7
ECAGND
ECAGND <4 5>
+3VLP
21
KB_LED_PWM
23
BEEP#
26
27
63
64
65
66
75
76
68
70
71
72
83
84
85
86
87
88
97
98
99
109
119
120
126
128
73
74
89
90
91
92
93
95
121
127
100
101
102
103
104
105
106
107
108
110
112
114
115
116
117
118
124
12
RE3643_0402_1%
ACOFF
BATT_TEMP
ADP_I
AD_BID0
PCH_HOT#_R PCH_HOT#
AD_PID0
EN_DFAN1
EC_MUTE#
USB_EN#
TP_CLK_R
TP_DATA_R
CPU1.5V_S3_GATE
WOL_EN#
ME_EN
HDD_S3.5
ODD_EC_EN#
PECI_KB930
BATT_CHG_LED#
CAPS_LED
PWR_PWM_LED#
BATT_LOW_LED#
SYSON
VR_ON
PM_SLP_S4#_R
EC_RSMRST#
EC_LID_OUT#
VCOUT0
BKOFF#
PBTN_OUT#
ACIN_65W_R
SA_PGOOD
ACIN_D
EC_ON_R
ON/OFF_R
LID_SW#_R
SUSP#
PECI_KB9012
+V18R
ACOFF <46>
RE17
0_0402_5% @
RE7 0_0402_5%
RE23 0_0402_1%
RE38 0_0402_1%
1 2
@
RE15 0_0402_1%
WL_BT_LED#_R
RE34 0_0402_1%
1 2
RE22 0_0402_1%@
12
@
RE37 0_0402_1%
RE14 0_0402_1%@
RE41 0_0402_1%@
RE42 0_0402_1%@
RE43
1
CE16
4.7U_0805_10V4Z
2
RE67 0_0402_1%
1 2
1 2
1 2
1 2
KB_LED_PWM
BEEP# <33>
12
CE9 100P_0402_50V8J
12
@
EN_INVPWR <21>
EN_DFAN1 <39>
EC_ENVDD <21>
LCD_TEST <21>
EC_MUTE# <33>
USB_EN# <36,37>
IMVP_PWRGD <52>
12
@
12
@
CPU1.5V_S3_GATE <10>
WOL_EN# <32>
ME_EN <13>
VCIN0_PH <45>
HDD_S3.5 <41>
ODD_EC_EN# <41>
1 2
@
PX_MODE <26,53,54>
BATT_CHG_LED# <38>
CAPS_LED <39>
PWR_PWM_LED# <38>
BATT_LOW_LED# <38>
SYSON <35,50>
VR_ON <52>
EC_RSMRST# <15>
VCOUT1_PH
12
@
BKOFF# <21>
PBTN_OUT# <15,6>
SA_PGOOD <51>
SUSP# <10,35,48,49,50>
65W/90W# <45>
43_0402_1%KB9012@
+3VALW +3VALW
RE3
100K_0402_5%
Ra
1 2
AD_BID0 AD_PID0
UMA@
1
RE5
Rb
200K_0402_5%
1 2
Analog Board ID definition,
Please see page 4.
PCH_PWR_EN <35>
PCH_HOT# <14>
TP_CLK
TP_DATA
TP_CLK <39>
TP_DATA <39>
WL_BT_LED# <38>
ENBKL <15>
CE8
0.1U_0402_16V7K
2
1 2
PECI_KB930
RE69 0_0402_1%
12
RE94.7K_0402_5%
12
RE104.7K_0402_5%
@
reserve for KB9 012 Rev.A2
RE30
47K_0402_5%@
VCIN1_PH <45>
VCOUT0_PH <47>
ON/OFF <39>
H_PECI <17,6>
PM_SLP_S4#_R
RE39 0_0402_1%
ACIN_65W_R
LID_SW#_R
1 2
@
1 2
@
RE80 0_0402_1%
RE81 0_0402_1%
For LID SW debug & test
Place close to UE1.115
SA_PGOOD
ACIN
Project ID
RE12
200K_0402_5%
+5VS
WL_BT_LED#_R
1
CE30
0.1U_0402_16V7K
2
Reserve for ESD
Place close to UE1.128
PM_SLP_S4#
1 2
@
CE14
1 2
CE18 100P_0402_50V8J
MS@
Rb => NC
TH@
WLAN_WAKE# <38>
PM_SLP_S4# <15>
ACIN_65W <25>
LID_SW#
0.1U_0402_16V7K
12
RE19
100K_0402_5%
Ra
1 2
1
CE21
UMA@
RE12
Rb
100K_0402_5%
1 2
Analog Project ID definition,
Please see page 4.
LID_SW# <39>
0.1U_0402_16V7K
2
SYSON
1
CE26
0.1U_0402_16V7K
2
Place close to UE1.95
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
EC ENE-KB9012
EC ENE-KB9012
EC ENE-KB9012
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-9104P
LA-9104P
LA-9104P
Date: Sheet of
Date: Sheet of
Date: Sheet
1
of
40 57Wednesday, August 29, 2012
40 57Wednesday, August 29, 2012
40 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 41
A
B
C
D
E
F
G
H
* Touch Screen Panel
+5VS_TOUCH+5VS
1 2
RV249 0_0603_5%~D
SATA HDD Conn.
1 1
SATA_PTX_DRX_P0_C<13>
SATA_PTX_DRX_N0_C<13>
1 2
JP13
112
JUMP_43X79
2
CN3 0.01U_0402_16V7K
1 2
CN4 0.01U_0402_16V7K
+3VS
HDD_DET#<13>
+5V_HDD
+5VS
SATA_PRX_DTX_N0<13>
SATA_PRX_DTX_P0<13>
+5V_HDD Source
RN9
100K_0402_5%@
HDD_EN_5V
DMN66D0LDW-7_SOT363-6
QN5B
+5VALW
@
6
2
1
D
S
4 5
10U_0805_10V6K
CN17
1
@
CN18
2
QN4
SI3456DDV-T1-GE3_TSOP6~D
+5V_HDD
@
12
SHORT DEFAULT
RN11
@
100K_0402_5%
G
3
0.1U_0603_50V_X7R
1
@
2
B+_BIAS
+3VALW
12
100K_0402_5%@
61
2 2
HDD_S3.5<40>
100K_0402_5%
@
2
12
RN12
@
12
RN10
3
5
DMN66D0LDW-7_SOT363-6
4
@
QN5A
SATA_PTX_DRX_P0_C
SATA_PTX_DRX_N0_C
SATA_PRX_DTX_N0_C
SATA_PRX_DTX_P0_C
HDD_DET#
0.1U_0402_25V6K
1
CN8
2
CN9
0.1U_0402_25V6K
1
2
JHDD
1
GND
2
A+
3
A-
4
GND
5
B-
6
B+
7
GND
8
VCC3.3
9
VCC3.3
10
VCC3.3
11
GND
12
GND
13
GND
14
VCC5
15
VCC5
16
VCC5
17
GND
18
RESERVED
19
GND
20
VCC12
21
VCC12
22
VCC12
SANTA_193202-1
CONN@
DC010008700
+5V_HDD+3VS
1000P_0402_50V7K
1
CN5
2
23
GND
24
GND
0.1U_0402_25V6K
10U_0805_10V6K
1
1
CN7
CN6
2
2
Place close
to JTOUCH
100K_0402_5%
TOUCH_ON#<40>
USB20_TOUCH_N9
USB20_TOUCH_P9
USB20_TOUCH_N9<16>
USB20_TOUCH_P9<16>
+5VS +5VS_TOUCH
SI2301CDS-T1-GE3_SOT23-3
12
2
@
1 2
47K_0402_5%
PESD5V0U2BT_SOT23-3~D
@
CV328
@
RV218
0.1U_0402_16V7K
USB20_TOUCH_N9
USB20_TOUCH_P9
TOUCH_RST
+5VS_TOUCH
DV13
EMC@
RV217
3
1
S
1000P_0402_50V7K
1
2
CV59
+5VS_TOUCH
0.1U_0402_16V7K
QV16
D
13
@
G
2
1
@
2
JTOUCH
ACES_88460-00601-P01
1
1
2
2
3
3
4
4
5
G1
5
6
G2
6
CONN@
SP010013W00
RV219
100K_0402_5%
1 2
CV60
7
8
TOUCH_RST
1
2
ODD Power Control
JP7
@
3 3
+5VS
1
CN13
RN6
470K_0402_5%
1 2
13
D
QN3
2N7002BKW_SOT323-3~D
S
2
G
12
2
1U_0402_6.3V6K
ODD_EN
ODD_EN
13
D
QN6
2N7002BKW_SOT323-3~D
S
B+_BIAS
100K_0402_5%
A
2
G
RN15
@
ODD_EN#<17>
4 4
ODD_EC_EN#<40>
112
JUMP_43X79
6
2
1
@
2
QN2
D
S
45
SI3456BDV-T1-E3 1N TSOP6
G
3
RN7
1.5M_0402_5%@
1 2
B
+5VS_ODD
0.1U_0603_50V_X7R
1
CN16
2
12
SATA_PTX_DRX_P2<13>
SATA_PTX_DRX_N2<13>
SATA_PRX_DTX_N2<13>
SATA_PRX_DTX_P2<13>
C
CH10 0.01U_0402_16V7K
12
CH9 0.01U_0402_16V7K
12
12
CN14 0.01U_0402_16V7K
CN15 0.01U_0402_16V7K
ODD_DETECT#<17>
ODD_DA#<16>
SATA_PTX_DRX_P2_C
SATA_PTX_DRX_N2_C
SATA_PRX_DTX_N2_C
SATA_PRX_DTX_P2_C
1 2
RN8 0_0402_1%
@
D
SATA ODD Conn.
+5VS_ODD
Pleace near ODD CONN
1000P_0402_50V7K
1
CN10
2
JODD
1
GND
2
A+
3
A-
4
GND
5
B-
6
B+
7
GND
8
DP
9
+5V
10
+5V
ODD_DA#_R
11
MD
12
GND
GND13NPTH2
SANTA_202801-1
CONN@
DC010007300
0.1U_0402_25V6K
10U_0805_10V6K
1
1
CN11
CN12
2
2
14
GND
15
GND
16
NPTH1
17
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
F
G
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
HDD / ODD
HDD / ODD
HDD / ODD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-9104P
LA-9104P
LA-9104P
Date: Sheet of
Date: Sheet of
Date: Sheet of
41 57Wednesday, August 29, 2012
41 57Wednesday, August 29, 2012
41 57Wednesday, August 29, 2012
H
1.0
1.0
1.0
Page 42
5
D D
4
3
2
1
Screw Hole
H2
C C
B B
H1
H11
H31
FD1
FIDUCAL@
H_2P8
H_2P8
@
@
1
1
H16
H12
H_2P8
@
1
H32
H_3P7
@
1
FD2
FIDUCIAL@
1
H_2P8
H_2P8
@
@
1
1
H33
H_3P7
H_3P7
@
@
1
1
FD3
FIDUCAL@
1
1
H5
H4
H_2P8N
@
1
H17
H_2P8
@
1
H34
H_3P7
@
1
FD4
FIDUCIAL@
1
1
H18
1
H35
1
H_2P8
@
H_3P3N
@
H_3P7X3P2N
@
H6
H_3P3
@
1
H8
H7
H_3P3
@
1
H9
H_2P8
@
1
H10
H_2P8
H_3P3
@
@
1
1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Screw Hole
Screw Hole
Screw Hole
LA-9104P
LA-9104P
LA-9104P
1
42 57Wednesday, August 29, 2012
42 57Wednesday, August 29, 2012
42 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 43
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Page# Title
Item
Item Issue Description
Page#Page#
ItemItem
21,39 LVDS
1
21 LVDS
D D
C C
B B
A A
2
3
16,21 Touch Screen
4
5
21,39 Touch Screen
6
7
15,16,
8
39,41
9
10,26,41 DC/DC
10
11
06,15,16,
12
39,41
13
14
15
16
17
18
21,35,
19
39,40,41
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
33
32
41 ODD
39 FAN
6 CPU
40
38
6
23
35
18
13
40
21
32
14
32
41
34
23
33
23
Title
TitleTitle
Audio codec
Board ID39
Audio codec33
ESD
Green CLK14
DC/DC41
ESD
Green CLK
DC/DC41
Schematic page modify35,41
Circuit adjuest
LID SW
GPU Change RV205 fr om "MS@" to "@ "
MINI card
XDP
GREEN CLK
PCH
PCH
LVDS
FAN40 For FAN_SPEED1 noise issue
Touch PAD
GREEN CLK
Touch Screen
Card Reader
GREEN CLK
CODEC
GREEN CLK 2012/08/17 HW
LAN HW
5
Date
DateDate
2012/05/17
2012/05/22
2012/05/23
2012/05/29
2012/05/30
2012/05/30
2012/05/30
2012/05/30
2012/05/30
2012/05/31
2012/05/31
2012/05/31
2012/06/15
2012/06/15
2012/06/18
2012/06/18
2012/06/29 HW
2012/06/29 ESD
2012/07/01 HW
2012/07/01 HW
2012/07/01
2012/07/01
2012/07/03 HW
2012/07/06 HW
2012/07/09 HW
2012/07/09 ESD
2012/07/10 HW
2012/07/16
2012/07/17
2012/07/19
2012/08/07
2012/08/14
2012/08/16
2012/08/16
2012/08/17
2012/08/20
RequestRequest
Owner
Owner
OwnerOwner
SED
SED
CODEC
HW
HW
HW
HW
ESD
HW
HW
HW
ESD
HW
HW
HW
HW
HW
HW
ESD2012/07/11
ESD2012/07/11
HW2012/07/11
ME2012/07/12
HW
SED
HW
SED
ESD
HW
HW
ESDCard Reader
4
Issue DescriptionDate
Issue DescriptionIssue Description
Add FHD Panel C E_ENABLE, DBC_ ENABLE function from SED reque st
Follow SED team request disab le CE_EN functi on
Follow CODEC ve ndor suggestio n
Add touch scree n function
Board ID change for PT
Add touch scree n function pow er control
Follow RealTek suggestion rem ove, delete res erve MUTE circu it
ESD ask CAP for reserve
For Green CLK t est
Change "+1.5V_C PU_VDDQ", "+1. 5VS", "+1.5VGS" derating
For power seque nce trunning
Follow ESD team request
Change for Gree n CLK bom cont rol
For WLAN card p ower sequence issue
Schematic page modify for eas ily maintain.
Change componen t location for easily maintai n.
Fan speed noise issue Reserve 220p/04 02 CE24
System boot-up shot down issu e.
Circuit & page adjust for OAK 15" & OAK 17"
LID SW need a t race for debug and switch. Add RE81 for LI D SW.
Follow AMD requ est, MarsPro w ill used MPLs.
Follow AMD requ est, MEM_CALRP 2 is not need f or Mars ASIC no w.
Power Control f or Mini card d idn't need
S3 return hang issue
Follow Green CL K FAE suggesti on
For ESD request reserve CAP.
Change RES and reserve CAP fo r LVDS issue
Follow ESD team request
Follow ESD team request
Reserve for CE function for L VDS connector
For ME requestConnector
Change Touch PA D SMBUS port f or SMBUS issue
Follow Silego F AE request
Follow SED team request chang e JTOUCH USB si gnal conatct.
Follow ESD team request
Fixed GCLK outp ut abnormal is sue
The issue alrea dy fixed by ne w CODEC.
For RTC discharge issue
For LAN Chip ab normal leakage issue32,34
Follow ESD team request34
4
3
Page 1
Page 1
Page 1Page 1
Add CE_EN, DBC_ EN control pin to EC
Change RV62 to DE-POP and RV1 00 to POP for d isable CE_EN fu nction
Add AUDIO JACK PLUG delay cir cuit, Spearate NET JACK_PLUG t o
=> JACK_SENSE# & => JA CK_PLUG#
Add RV217, RV21 8, RV219, RV24 9, CV59, CV60, CV328,
DV13, QV16, JTO UCH
Change RE5 from 8.2k_0402(SD0 28820180) to 33 k_0402(SD028330 280)
Add NET "TOUCH_ ON#" from JTOU CH to UE1.82(KB 9012) for
TOUCH SCREEN PA NEL power cont rol
Delete D1,QA1,Q A2,QA3,RA24,RA 26,RA60,RA62,RA 68,RA109,CA72,C A73
Reserve 0.1u/04 02 CH104,CZ23, CH105,CE27,CE29
Change RH31,RH4 1,RV232 0ohm f orm "GCLK@" to "@"
for break the c lock signal to device
Change RC150 3 30K/0402 to 2M /0402, RC151 10 0K/0402 to 470K /0402,
RZ18 100K/0402 to 470K/0402, RV115 0/0402 to 2M/0403
Change RZ15 to DE-POP
Change 0.1u/040 2 from "@" to POP
Change RL21,RL3 0 from "@" to "GCLK@"
Change RZ4,RZ13 from 470K/040 2 56K/0403
Swap Page. 35 & Page 41.
Move CH9,CH10 from Page.13 to Page.41
Change CC151 fr om POP to "@"
1. Swap P.35 & P.41and move t ouch screen cir cuit from P.21 to P.41.
2. Swap P.39 & P.40 page no
Change RV75,RV7 6,RV81 from "D IS@" to "TH@"2529GPU
Change R17 to " @"
Change RC89 fro m "@" to POP
1. Change UG1.2 (+3VLP) & UG1. 8(+3VALW) conne ct to +LAN_IO
2. Add R787 con nect from +RTC BATT to C5.2 & UG1.10
3. Change C14 f rom 0.1u to 5p /0402
4. Change C8 co nnect from +3V _ALW to +LAN_IO
5. Add R788 0oh m/0402 from +R TCVCC to UG1 fo r GCLK & DH1 se lect
Reserve those C AP for ESD MOA T.MOAT
Change RH185 fr om 0ohm-short to 0ohm/0805, a nd reserve CH10 6 1U/0402LVDS
Add RH44,RH48,R H70 & NET PCH_ JTAG_TMS_R, PCH _JTAG_TDI_R,
PCH_JTAG_TDO_R for break sign al trace
1.Change NET NA ME "N59110727" to "WL_BT_LED# _R"
2. Reserve 0.1u /0402 on "WL_B T_LED#_R" for E SD
Change CE_EN_R from dummy to JLVDS.18
Change JLAN CPN from "DC23400 4V00" to "SP011 207090"
Change CE29 fro m "@" to POP
Change Touch PA D SMBUS port f or SMB0 to SMB
Change RL21 fro m 510 ohm to 0 ohm/0402
Change JTOUCH P in define.
Reserve CR11 10 0p/0402 close to JREAD
Change UG1.2(UG 1/VDD) from +L AN_IO to+3VALW
Remove delay ci rcuit and POP RA4
De-pop R788
Pop RL34 and de -pop RE21
Change CR11 fro m 100p/0402 to 10p/0402 and P OP
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Rev.Page#
Rev.Rev.
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1
Compal Electronics, Inc.
Title
Title
Title
HW-PIR
HW-PIR
HW-PIR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-9104P
LA-9104P
LA-9104P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
43 57Wednesday, August 29, 2012
43 57Wednesday, August 29, 2012
43 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 44
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Page# Title
Item
Item Issue Description
Page#Page#
ItemItem
4142
38 Change LED light
D D
C C
43
44
41
45
40 BATMAN2
47 14,17 PCH
Title
TitleTitle
Touch Screen
LED
WLAN
Date
DateDate
2012/08/20
2012/08/20
2012/08/2038
2012/08/20
2012/08/21 HW
2012/08/21 HW
RequestRequest
Owner
Owner
OwnerOwner
4
Issue DescriptionDate
Issue DescriptionIssue Description
SED
HW
HW
HW
Follow SED team request
Remove AOAC fun ction power co ntrol
Add EC control for Touch Scre en functionTouch Screen
For BATMAN246 Add RE82 0oh m/0402 between trace SUSCLK_R & EC_CRY2
For SYSTEM S3 l eakage issue Change RH79.2 & RH245.2 conn ect from +3V_PC H to +3VS
3
Page 2
Page 2
Page 2Page 2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
Change Touch sc reen power rai l for +3VS to + 5VS
Change LED1,LED 2,LED4 CPN fro m SC500006O00 t o SC50000DC00
Change R18,R19, R20,R21,C13,Q2 ,Q4 component B OM structure to "@"
Add RN15 & QN6 and relative c ircuit connect
2
Rev.Page#
Rev.Rev.
1.0
1.0
1.0
1.0
1.0
1.0
1
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
HW-PIR
HW-PIR
HW-PIR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-9104P
LA-9104P
LA-9104P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
44 57Wednesday, August 29, 2012
44 57Wednesday, August 29, 2012
44 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 45
A
B
C
D
12
2
PR905
10K_0402_1%
PR906
1 2
10K_0402_1%
13
PQ902
PR927
11K_0402_1%
+3VALW+5VALW
2.2K_0402_5%
PR902
1 2
+5VALW
PD900
@
DA204U_SOT323~D
PSID-5
12
+EC_VCCA
1 2
3
1
PC909
0.1U_0402_25V6
PH900
2
B+_BIAS
+3VLP
PR916
11K_0402_1%
1 2
12
PS_ID <40>
@
ECAGND <40>
1 1
PJPDC
1
1
2
2
3
3
4
4
5
5
6
GND
7
GND
ACES_50299-00501-003
CONN@
ADPIN
12
PC901
1000P_0402_50V7K
PSID
PL901
SMB3025500YA_2P
1 2
12
PC902
100P_0402_50V8J
PL902
BLM18BD102SN1D_0603~D
12
BATT++BATT+
PL900
2 2
3 3
4 4
PBATT battery connector
SMART
SMART
SMARTSMART
Battery:
Battery:
Battery:Battery:
01.BATT1+
01.BATT1+
01.BATT1+01.BATT1+
02.BATT2+
02.BATT2+
02.BATT2+02.BATT2+
03.CLK_SMB
03.CLK_SMB
03.CLK_SMB03.CLK_SMB
04.DAT_SMB
04.DAT_SMB
04.DAT_SMB04.DAT_SMB
05.BATT_PRS
05.BATT_PRS
05.BATT_PRS05.BATT_PRS
06.SYS_PRES
06.SYS_PRES
06.SYS_PRES06.SYS_PRES
07.BAT_ALERT
07.BAT_ALERT
07.BAT_ALERT07.BAT_ALERT
08.GND1
08.GND1
08.GND108.GND1
09.GND2
09.GND2
09.GND209.GND2
BATT+
12
12
PC905
100P_0402_50V8J
PBATT
1
2
3
4
5
6
7
8
9
GND
GND
SUYIN_200028MR009G502ZL
CONN@
SMB3025500YA_2P
1 2
PC906
0.01U_0402_25V7K
1
2
3
BAT_ALERT
4
SYS_PRES
5
BATT_PRS
6
DAT_SMB
7
CLK_SMB
8
9
10
11
BATT++
12
12
PC907
PC900
1000P_0402_50V7K
1
100P_0402_50V8J
PD904
PESD24VS2UT_SOT23-3~D
2
3
PR919
@
0_0402_5%~D
1 2
1
2
VIN
12
PC903
1000P_0402_50V7K
PD903
PESD24VS2UT_SOT23-3~D
3
PR910
100_0402_5%
1 2
PR914
100_0402_5%
1 2
PR913
100_0402_5%
1 2
12
PC904
Erp lot6 Circuit
100P_0402_50V8J
ACIN <15,25,40,46>
200K_0402_1%
PC916
0.1U_0402_25V6
PR911
10K_0402_1%
1 2
1M_0402_1%
12
PR928
2
JRTC
LOTES_AAA-BAT-054-K01
CONN@
-
5
12
3
4
BATT_TEMP <40,46>
+3VALW
EC_SMB_CK1 <40,46>
EC_SMB_DA1 <40,46>
PR929
PQ904B
L2N7002DW1T1G_SC88-6
+
VIN
1 2
1 2
1
2
PR930
1M_0402_1%
RB751V-40_SOD323-2
1 2
VCIN1_PH<40>
12
61
@
PD905
PR931
3.3K_1206_5%~D
PQ904A
L2N7002DW1T1G_SC88-6
PR917
499K_0402_1%
2
3
1
PD902
SM24_SOT23
+RTCBATT
+3VLP
POK<47>
ADP_I <40,46>
@
100K_0402_1%
PR915
332K_0402_1%
1 2
1 2
1 2
PR904
1 2
100K_0402_1%
PR900
15K_0402_1%
1 2
+5VALW
PR909
1 2
2N7002KW_SOT323-3
PC915
@
.1U_0402_16V7K
PSID-1
B+
PR912
@
12
0_0402_5%~D
1 2
13
D
PQ905
S
VSB_N_002
12
PC910
PR918
90.9K_0402_1%
2
G
65W/90W# <40>
65W/90W#
130W/90W#
@
2
G
.1U_0402_16V7K
PR901
0_0402_5%
1 2
PR903
1 3
2
B
22K_0402_1%
VSB_N_003
13
D
S
@
PQ906
2N7002KW_SOT323-3
65W 90W 130W
High
33_0402_5%
1 2
PSID-3
D
S
PQ901
FDV301N_NL_SOT23-3~D
G
2
PSID-2
C
PQ900
MMST3904-7-F_SOT323~D
E
3 1
12
PR907
PR908
1 2
PQ903
2N7002KW_SOT323-3
100K_0402_1%
PH900 under CPU botten side :
CPU thermal protection at 96 +/- 3 degree C
PR926
@
6.81K_0402_1%
1 2
13
D
2
G
130W/90W# <40>
S
Low
High
Low
12
VSB_N_001
3
PD901
BAV99W-7-F_SOT-323-3~D
PC908
0.22U_0603_25V7K
2
1
+5VALW
TP0610K-T1-E3_SOT23-3
VCIN0_PH<40>
100K_0402_1%_TSM0B104F4251RZ
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_DCIN/BATT CONN/OTP
PWR_DCIN/BATT CONN/OTP
PWR_DCIN/BATT CONN/OTP
LA-9104P
LA-9104P
LA-9104P
D
45 57Wednesday, August 29, 2012
45 57Wednesday, August 29, 2012
45 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 46
A
B
C
D
8
7
5
PC102
61
PC109
PC124
1 2
747@
12
PC134
731@
0.01U_0402_25V7K
P3
5600P_0402_25V7K~D
@
PR116
49.9K_0402_1%
PC139
0.1U/0603
PR107
0/0402
Iada=0~3.34A(65W)
Iada=0~4.62A(90W)
ADP_I = 19.9*Iadapter*Rsense
PR102
0.01_1206_1%
1
2
1 2
VIN
PR109
10_1206_1%
1 2
PQ113A
L2N7002DW1T1G_SC88-6
1U_0603_25V6K~D
PC111
12
VIN
731@
PR142
232K_0402_1%
1 2
747@
2200P_0402_50V7K
747@
56P_0402_50V8~D
12
1U_0603_10V6K
747@PU100
0_0402_5%~D
PR119
1 2
0_0402_5%~D
PR120
1 2
PC117
1 2
10K_0402_5%
PC125
747@
@
@
12
1 2
MAX8731_REF
PR129
PR132
ACSETIN
PR123
7.5K_0402_5%
12
PC128
@
0.1U_0402_10V7K
747@
0/0402
PC123
747@
747@
0.1U/0603
PR127
747@
0/0402
B+
4
3
CSIN
CSIP
12
PR127
731@
0.1U_0603_25V7K
1 2
PC107
0.047U_0603_25V7M
731@
1
PU100
22
DCIN
DCIN
ICREF
2
ACIN
13
ACOK
11
VDDSMB
10
SCL
9
SDA
14
NC
8
VICM
6
FBO
5
EAI
747@
4
EAO
3
VREF
7
CE
12
GND
29
TP
ISL88731CHRTZ-T_QFN28_5X5~D
ISL88731C
PU100
ISL88731C BQ24747 0.1u
@
12
PR107
10_0402_5%
28
CSSP
731@
PC123
1 2
27
ICOUT
CSSN
BOOT
VDDP
UGATE
PHASE
LGATE
PGND
CSOP
CSON
10_0402_5%
731@
26
25
BST
21
24
23
20
19
18
17
15
VFB
VFB
16
NC
BQ24747
100k
100k @
PR117
PR142
PC135
PC132
158k
232k
0.1u
0.01u0@
@
3
24k
220p
PL101
1UH_NRS4018T1R0NDGJ_3.2A_30%
1 2
PC108
PC110
0.1U_0603_25V7K
1U_0603_10V6K
1 2
PR111
4.7_0603_5%
12
PR114
2.2_0603_5%
1 2
BAT54HT1G_SOD323-2~D
1 2
PR130
100_0402_5%
731@
731@
BST_CHGA
1 2
BATT+
1 2
731@
VDDP_LDO
DH_CHG
LX_CHG
PR122
PR123
PR129
PC117
PC124
PC126
PC125
PD101
12
12
PC103
4.7U_0805_25V6-K
747@
PC104
4.7U_0805_25V6-K
0.1U_0603_25V7K
PC115
1 2
1U_0603_10V6K
0.1U_0603_25V7K
PC106
PC136
1 2
DL_CHG
12
@
BQ24747ISL88731C
@
@
@
@
@
200k
7.5kPR137
10kPR112
2200p
56p
120p
@
1u
CHG_B+
12
PC105
2200P_0402_25V7K
12
PC112
1000P_0402_50V7K
786
5
PQ108
4
123
786
5
PQ110
4
123
47K_0402_1%
PQ107
AO4466L_SO8~D
10UH_PCMB063T-100MS_4A_20%
AO4712L_SO8~D
PC129
PC139
PR132
PR111
PC110
PD101
PQ102
AO4407AL_SO8
1
2
3 6
4
PR110
1 2
13
VDDP_LDO
DDTC115EUA-7-F_SOT323
PL100
1 2
12
4.7_1206_5%
PR141
12
10_0402_5%731@
PR132
PC121
680P_0402_50V7K
PC129
747@
0.1U_0603_25V7K
1 2
BQ24747ISL88731C
0.01u
@
0.22u
10
4.7
1u@
@
BAT54HT1G
8
7
5
PR108
200K_0402_1%
1 2
100K_0402_1%
PR118
1 2
2
10K_0402_5%
PR121
0.01_1206_1%
1
CHG
2
12
PC139
731@
1 2
0.22U_0603_25V7K
@
0.1u
0.1u
@
@
3S2P : CV = 13.3V CC: 1.54A
4S1P: CV = 17.7V CC: 1.1A
VIN
V1
ACOFF
2
4
3
0_0402_5%
PR128
5
61
PQ112A
L2N7002DW1T1G_SC88-6
12
PC122
PC130
@
1 2
0.1U_0603_25V7K
PR138
1 2
PC108
PR127
PR107
PC123
731@ for ISL88731C
747@ for BQ24747
3
4
12
10U_0805_25V5K~D
10
10
0.047u
PQ112B
L2N7002DW1T1G_SC88-6
BATT+
12
12
PC118
10U_0805_25V5K~D
12
PC119
PC120
@
10U_0805_25V5K~D
10U_0805_25V5K~D
BQ24747ISL88731C
@PC134
0
0
0.1u
VIN
PQ100
AO4407AL_SO8
8
7
PR100
PR104
PC100
2.2U_0805_25V6K
ACOFF
BATT_TEMP
12
3.3_1210_5%
12
3.3_1210_5%
1 2
2
ACIN
1 2
10K_0402_5%
12
61
PR133
5
PR103
200K_0402_1%
V1
PQ114A
L2N7002DW1T1G_SC88-6
PR139
200K_0402_5%
1 2
5
1 1
2 2
ACOFF<40>
BATT_TEMP<40,45>
1
2
36
4
PQ103
PDTA144EU PNP_SOT323
2
13
2
13
2
3
PQ1111B
4
L2N7002DW1T1G_SC88-6
PQ104
DDTC115EUA-7-F_SOT323
PQ109
P2
12
1 3
12
PR105
150K_0402_1%
3
PQ114B
5
L2N7002DW1T1G_SC88-6
4
731@
ACIN
100_0402_1%
731@
PR125
PR112
PR117
ACIN <15,25,40,45>
DDTC115EUA-7-F_SOT323
PC101
0.1U_0603_25V7K
VDDP_LDO
12
PR137
100K_0402_1%
100K_0402_1%
12
158K_0402_1%
PR126
1 2
ADP_I<40,45>
H_PROCHOT#<40,6>
3 3
1U_0603_25V6K~D
For DT Mode
@
BATT_TEMP
PC127
2
G
12
13
D
PQ111
@
SSM3K7002FU_SC70-3
S
731@
PC135
.1U_0402_16V7K
747@
1 2
PC132
731@
PR142
AO4409L_SO8
1
2
3 6
12
PR101
200K_0402_1%
BATT_TEMP
MAX8731_REF
1000P_0402_50V7K
12
747@
+5VALW
12
PC116
0.1U_0402_10V7K
1 2
PR122
747@
200K_0402_5%
12
4.7K_0402_5%
PC126
747@
1 2
120P_0402_50VNPO~D
MAX8731_REF
PR134
0_0402_5%
@
1 2
12
PR135
0_0402_5%
@
1 2
0.01U_0402_25V7K
747@
PQ101
PC135
4
0.1U_0402_10V7K
PC138
@
0.01U_0402_25V7K
2
12
@
PC113
1 2
1 2
EC_SMB_CK1<40,45>
EC_SMB_DA1<40,45>
12
747@
VIN
12
PR136
3.3K_1206_5%~D
61
2
PQ1111A
4 4
L2N7002DW1T1G_SC88-6
BQ24747
BATT_TEMPACOFF
324K/0402
5
0.1U/0402
V1
3
@
PQ113B
4
L2N7002DW1T1G_SC88-6
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_CHARGER
PWR_CHARGER
PWR_CHARGER
LA-9104P
LA-9104P
LA-9104P
D
46 57Wednesday, August 29, 2012
46 57Wednesday, August 29, 2012
46 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 47
A
1 1
B
C
D
E
2VREF_6182
1U_0603_16V6K
12
PC201
4
15
TONSEL
FB_5V
2
3
REF
VIN16GND
17
12
12
PC218
0.1U_0402_25V6
0.1U_0402_25V6
1
FB1
ENTRIP1
PGOOD
BOOT1
UGATE1
PHASE1
LGATE1
NC18VREG5
PC216
4.7U_0805_10V6K
+5VALW
PC200
@
1 2
PR202
30.9K_0402_1%
1 2
PR204
20K_0402_1%
1 2
PR206
130K_0402_1%
1 2
ENTRIP1
24
VO1
23
22
21
20
19
RT8205LZQW(2) W QFN 24P PWM
BST_5V
UG_5V
LX_5V
LG_5V
PR208
1 2
2.2_0603_5%
VL
+3VALWP
B++
12
PC208
PC207
0.1U_0402_25V6
0.22U_0603_10V7K
POK <45>
BST1_5VBST1_3V
PJP203
1 2
PAD-OPEN 4x4m
PJP200
1 2
PAD-OPEN 4x4m
2200P_0402_50V7K
12
PC211
12
PC209
4.7U_0805_25V6-K
12
PC230
@
AON7702A_DFN8-5
+3VALW
PQ203
AON7408L_DFN8-5
3 5
241
5
4
12
1000P_0402_50V7K
123
PQ205
5VALWP
TDC 5.6A
Peak Current 8A
OCP current 9.6A
TYP MAX
H/S Rds(on) :27mohm , 34mohm
L/S Rds(on) :11mohm , 14mohm
PL201
3.3UH_PCMB063T-3R3MS_6.5A_20%
1 2
12
@
PR210
4.7_1206_5%
SNUB_5V
12
PC215
@
680P_0402_50V7K
1
+
2
PC213
330U_6.3V_M
+5VALWP
0.1U_0402_25V6
@
PC202
1 2
PR201
13.7K_0402_1%
1 2
BST_3V
12
@
+5VALWP
133K_0402_1%
UG_3V
PC217
1U_0603_10V6K
PR203
20K_0402_1%
1 2
PR205
1 2
PU200
25
P PAD
7
VO2
8
VREG3
9
BOOT2
10
UGATE2
11
PHASE2
12
LGATE2
12
2VREF_6182
1 2
1 2
FB_3V
ENTRIP2
5
6
FB2
ENTRIP2
SKIPSEL
EN
14
13
B++
PJP202
PAD-OPEN 4x4m
PJP204
PAD-OPEN 4x4m
12
PC203
0.1U_0402_25V6
+3VALWP
VCOUT0_PH
B++
12
12
PC204
2200P_0402_50V7K
PR213 2.2K_0402_5%
1 2
1 2
12
PC226
@
0.1U_0402_10V7K
PC205
4.7U_0805_25V6-K
PL200
3.3UH_PCMB063T-3R3MS_6.5A_20%
1 2
1
+
PC212
330U_6.3V_M
2
ENTRIP1
ENTRIP1
34
PQ206B
12
PC227
@
L2N7002DW1T1G_SC88-6
0.1U_0402_10V7K
reserve from ESD requirement
PR215
@
3/5V_EN-2
0_0402_5%~D
12
PR209
4.7_1206_5%
5
2
PC219
4.7U_0603_10V6K
12
@
SNUB_3V
12
PC214
@
N_3_5V_001
680P_0402_50V7K
13
PQ202
AON7408L_DFN8-5
3 5
241
5
4
@
12
123
PQ204
AON7702A_DFN8-5
ENTRIP2
ENTRIP2
61
PQ206A
2
L2N7002DW1T1G_SC88-6
1 2
PR214
100K_0402_5%
PQ201
DDTC115EUA-7-F_SOT-323
10U_0805_6.3V6M
0.22U_0603_10V7K
B++
PC229
BZV55-B5V1_SOD80C2
1000P_0402_50V7K
12
PC210
@
PC206
PC228
12
LX_3V
PD200@
VCOUT0_PH
0.1U_0402_10V7K
VL
12
+3VLP
@
1 2
21
0_0402_5%@
1 2
PR207
1 2
2.2_0603_5%
LG_3V
PR200
499K_0402_1%
PR211
@
PR212
200K_0402_1%
B+
12
12
12
2 2
PC220 0.1U_0402_25V6
@
@
eserve from ESD requirement
r
3 3
12
PC222 0.1U_0402_25V6
PC221 0.1U_0402_25V6
PC223 0.1U_0402_25V6
@
@
@
3.3VALWP
TDC 5.4A
Peak Current 7.7A
OCP current 9.2A
TYP MAX
H/S Rds(on) :27mohm , 34mohm
L/S Rds(on) :11mohm , 14mohm
PL202
1UH_PCMB053T-1R0MS_7A_20%
1 2
12
12
PC224 0.1U_0402_25V6
PC225 0.1U_0402_25V6
@
EC_ON<39,40>
VCOUT0_PH<40>
reserve from ESD requirement
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_3.3VALWP/5VALWP
PWR_3.3VALWP/5VALWP
PWR_3.3VALWP/5VALWP
LA-9104P
LA-9104P
LA-9104P
E
47 57Wednesday, August 29, 2012
47 57Wednesday, August 29, 2012
47 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 48
A
1 1
2 2
+3VALW
SUSP#<10,35,40,49,50>
PJP400
1 2
PAD-OPEN 3x3m
@
1 2
PR402 100K_0402_5%
12
PC403
22U_0805_6.3VAM
EN_1.8VSP
47K_0402_5%
1.8VSP_VIN
PR401
@
B
PU400
4
LX
PVIN
PG
LX
PVIN
SVIN
FB
EN
TP
NC
7
1
11
SY8033BDBC_DFN10_3X3
2
1.8VSP_LX
3
6
1.8VSP_FB
NC
10
9
8
5
12
12
PC405
0.22U_0402_16V7K
PL400
1UH_NRS4018T1R0NDGJ_3.2A_30%
1 2
12
SNUB_1.8VSP
12
PR403
20K_0402_1%
PR404
4.7_1206_5%
PR400
10K_0402_1%
PC401
680P_0402_50V7K
12
12
PC402
22P_0402_50V8J
12
C
<Vo=1.8V> VFB=0.6V
Vo=VFB*(1+PR403/PR400)=0.6*(1+20K/10K)=1.8V
D
+1.8VSP
+1.8VSP
TDC 2.6A
12
12
PC404
PC400
22U_0805_6.3V6M
22U_0805_6.3V6M
Peak Current 3.8A
OCP current 4.5A
PJP401
@
+1.8VSP
3 3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
1 2
PAD-OPEN 3x3m
Compal Secret Data
Compal Secret Data
Compal Secret Data
C
+1.8VS
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_1.8VSP
PWR_1.8VSP
PWR_1.8VSP
LA-9104P
LA-9104P
LA-9104P
D
48 57Wednesday, August 29, 2012
48 57Wednesday, August 29, 2012
48 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 49
5
D D
+V1.05S_VCCP_PWRGOOD<51>
PR502
1 2
TRIP_+V1.05S_VCCPP
53.6K_0402_1%
12
EN_+V1.05S_VCCPP
FB_+V1.05S_VCCPP
RF_+V1.05S_VCCPP
12
PR504
470K_0402_1%
PR503
150K_0402_5%
SUSP#<10,35,40,48,50>
C C
1 2
PC506
0.22U_0402_16V7K
+3VS
PR501
100K_0402_5%
1 2
1
2
3
4
5
PR507
4.99K_0402_1%
4
PU500
PGOOD
TRIP
EN
VFB
TST
TPS51212DSCR_SON10_3X3
1000P_0402_50V7K@
12
PC509
10
VBST
9
DRVH
8
SW
7
V5IN
6
DRVL
11
TP
12
BST_+V1.05S_VCCPP
UG_+V1.05S_VCCPP
SW_+V1.05S_VCCPP
LG_+V1.05S_VCCPP
12
PR506
1.2K_0402_1%@
PR500
1 2
2.2_0603_5%
PC500
1 2
1U_0603_10V6K
+VCCP
PC505
.1U_0603_25V7K
12
+5VALW
@
3
+V1.05S_VCCPP_B+
12
12
5
PQ500
4
SIR472DP-T1-GE3_POWERPAK8-5~D
123
5
PQ501
4
12
213
PC510
1000P_0402_50V7K
SIR818DP-T1_POWERPAK-SO8-5~D
PC502
0.1U_0402_25V6
PL500
1UH_PCMB063T-1R0MS_12A_20%
1 2
12
PR505
4.7_1206_5%@
12
PC508
@
680P_0402_50V7K
12
PC501
PC503
2200P_0402_50V7K
1 2
2
PJP500
@
2
112
JUMP_43X118
12
PC504
4.7U_0805_25V6-K
4.7U_0805_25V6-K
B+
1
+VCCP
PC507
0.1U_0402_10V7K
PR508
100_0402_5%
1 2
VCCIO_SENSE <9>
PR511
@
1 2
PR509
10K_0402_1%
1 2
B B
+V1.05S_VCCP
TDC 11A
Peak Current 16A
OCP current 19A
TYP MAX
PJP501
@
PR510
@
10_0402_1%
1 2
A A
5
4
+VCCP +1.05VS
1 2
PAD-OPEN 4x4m
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
H/S Rds(on) 10mohm , 14.5mohm
L/S Rds(on) :3mohm , 3.6mohm
Compal Secret Data
Compal Secret Data
Compal Secret Data
0_0402_5%~D
Deciphered Date
Deciphered Date
Deciphered Date
2
VSSIO_SENSE_R <9>
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_+VCCIO
PWR_+VCCIO
PWR_+VCCIO
LA-9104P
LA-9104P
LA-9104P
1
49 57Wednesday, August 29, 2012
49 57Wednesday, August 29, 2012
49 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 50
5
B+
D D
+1.5VP
1.5VP
TDC 6A
Peak Current 8A
OCP current 10A
PJP303
@
2
+1.5VP +1.5V
C C
B B
JUMP_43X118
PJP304
@
2
JUMP_43X118
112
112
SUSP#
SUSP#<10,35,40,48,49>
0.1U_0402_16V7K
A A
1 2
62K_0402_1%
PR1101
1 2
0_0402_5%~D
PJP302
@
2
112
JUMP_43X118
1UH_PCMB063T-1R0MS_12A_20%
1
+
PC308
330U_2.5V_M
2
VGA@
PR1104
@
12
@
PC1104
1 2
PR1103
10K_0402_1%
1 2
VGA@
1.5V_B+
12
PC301
PL300
TRIP_+1.5VGPU
EN_+1.5VGPU
FB_+1.5VGPU
RF_+1.5VGPU
12
VGA@
PR1106
470K_0402_1%
12
4.7U_0805_25V6-K
12
PC302
4.7U_0805_25V6-K
12
@
PR303
4.7_1206_5%
SNUB_1.5V
12
@
SYSON<35,40>
VGA@
PU1100
1
PGOOD
2
TRIP
3
EN
4
VFB
5
RF
TPS51212DSCR_SON10_3X3
VGA@
PR1105
11.5K_0402_1%
4
PR301
1 2
2.2_0603_5%
12
PC305
PC303
0.1U_0402_25V6
2200P_0402_50V7K
PQ300
AON7408L_DFN8-5
241
PQ301
AON7702A_DFN8-5
123
PC312
680P_0402_50V7K
PR306
200K_0402_5%
1 2
10
BST_+1.5VGPU
VBST
9
DRVH
V5IN
DRVL
12
UG_+1.5VGPU
8
SW_+1.5VGPU
SW
7
6
LG_+1.5VGPU
11
TP
3 5
5
4
12
PC300
1U_0402_6.3VX5R
PC304
0.22U_0603_10V7K
1 2
+5VALW
12
PC316
12
VGA@
PC1107
1U_0603_10V6K
1000P_0402_50V7K
+5VALW
5.1_0603_5%
1 2
SUSP#
VGA@
PR1100
1 2
2.2_0603_5%
PR304
100K_0402_5%
1 2
BOOT_1.5V
PR302
8.66K_0402_1%
1 2
1 2
12
PC311
1U_0603_10V6K
PR308
VGA@
PC1108
0.1U_0603_25V7K
1 2
+1.5VGPUP
3
DH_1.5V
SW_1.5V
DL_1.5V
VDD_1.5V
12
PC1109
@
1000P_0402_50V7K
CS_1.5V
PC309
1U_0603_10V6K
+5VALW
1.5V_B+
S5_1.5V
S3_1.5V
PC315
0.1U_0402_10V7K
4
12
2
3 5
241
5
PJP1102
JUMP_43X118@
15
14
13
12
11
1M_0402_1%
123
112
16
17
PHASE
UGATE
LGATE
PGND
CS
RT8207MZQW_WQ FN20_3X3
VDDP
VDD
PGOOD
TON
9
10
PR300
1 2
+V1.05SP_B+
VGA@
PQ1100
AON7408L_DFN8-5
12
VGA@
@
PQ1101
PR1102
4.7_1206_5%
AON7702A_DFN8-5
12
PC1106
@
680P_0402_50V7K
+1.5VGPU
VLDOIN_1.5V
20
19
18
PU300
VTT
PAD
BOOT
VLDOIN
VTTGND
VTTSNS
GND
VTTREF
VDDQ
FB
S5
S3
6
8
7
1.5V_FB
VGA@
12
12
VGA@
PC1101
PC1100
0.1U_0402_25V6
2200P_0402_50V7K
PL1100
1 2
VGA@
1UH_PCMB053T-1R0MS_7A_20%
2
PJP301
12
+1.5VP
PAD-OPEN1x1m
21
1
2
3
4
5
PC314 220P_0402_50V8J~D
1 2
PR305
10K_0402_1%
12
PR307
10K_0402_1%
1 2
VGA@
12
12
VGA@
PC1102
PC1105
4.7U_0805_25V6-K
4.7U_0805_25V6-K
+1.5VGPU
TDC 4.2A
Peak Current 6A
OCP current 7.2A
VTTREF_1.5V
+1.5VP
12
PJP1100
@
2
JUMP_43X118
1
+
2
12
PC306
PC313
.1U_0402_16V7K
@
112
VGA@
PC1103
330U_2.5V_M
10U_0805_6.3V6M
+1.5VP
12
PC307
10U_0805_6.3V6M
PC310
0.033U_0402_16V7K
B+
+0.75VSP
+0.75VSP
+1.5VGPUP
1
@
PJP300
1 2
PAD-OPEN 3x3m
0.75Volt +/- 5%
TDC 0.7A
Peak Current 1A
OCP Current 1.2A
+0.75VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_+1.5VP/+1.5VGPUP/0.75VSP
PWR_+1.5VP/+1.5VGPUP/0.75VSP
PWR_+1.5VP/+1.5VGPUP/0.75VSP
LA-9104P
LA-9104P
LA-9104P
1
50 57Wednesday, August 29, 2012
50 57Wednesday, August 29, 2012
50 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 51
5
D D
4
3
2
1
VID [0] VID[1] VCCSA Vout
0 0 0.9V
0 1 0.85V
1 0 0.775V
1 1 0.75V
output voltage adjustable network
12
PC600
PR605
100K_0402_5%
1 2
12
PC601
@
0.1U_0402_10V7K
SNUB_+1.5VP
680P_0402_50V7K
PR600
4.7_1206_5%
1 2
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2
SA_PGOOD <40>
12
+3VS
PR601
@
0_0402_5%~D
VCCSA_VID0 <10>
VCCSA_VID1 <10>
PL600
+V1.05S_VCCP_PWRGOOD <49>
PC604
1 2
22U_0805_6.3VAM
C C
PL601
HCB1608KF-121T30_0603
+3VALW +VCCSAP
B B
1 2
PC605
2200P_0402_50V7K
+VCCSA_PWR_SRC +VCCSA_PHASE
2
12
12
12
68P_0402_50V8J
+VCCSAP_FB
PC611
1
PC603
0.1U_0603_25V7K
PC612
10U_0805_6.3V6M
10U_0805_6.3V6M
PC610
SY8037DDCC_DFN12_3X3
12
PR603
1 2
1K_0402_5%
PU600
12
PVIN
11
PVIN
10
SVIN
9
FB
8
VOUT
7
VID1
1
LX
2
LX
3
LX
4
PG
5
+VCCSA_EN
EN
6
VID0
GND
13
PR604
1 2
1K_0402_5%
+VCC_SAP
TDC 4.2A
Peak Current 6A
OCP current 7.2A
PC607
PC606
1 2
1 2
22U_0805_6.3VAM
22U_0805_6.3VAM
PC609
1 2
22U_0805_6.3VAM
PR606
100_0402_5%
12
PR602
@
1 2
0_0402_5%~D
VCCSA_SENSE <10>
The 1k PD on the VCCSA VIDs are empty.
hese should be stuffed to ensure that
T
VCCSA VID is 00 prior to VCCIO stability.
@
PJP601
+VCCSAP
+VCCP
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
reserve for Pentium and Celeron only
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
1 2
PAD-OPEN 4x4m
1
2
PR607
@
0.004_2512_1%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
+VCCSA
4
+VCCSA
3
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_+VCCSAP
PWR_+VCCSAP
PWR_+VCCSAP
LA-9104P
LA-9104P
LA-9104P
1
1.0
1.0
51 57Wednesday, August 29, 2012
51 57Wednesday, August 29, 2012
51 57Wednesday, August 29, 2012
1.0
Page 52
5
4
3
2
1
330P_0402_50V7K
12
12
PC705
1 2
68P_0402_50V8J
IMVP_PWRGD <40>
BOOTG
24
PHASEG
23
LGATEG
22
VCCP
21
VDD
20
PWM2
19
LGATE1
18
PHASE1
17
UGATE1
@
PR728
1.91K_0402_1%
499_0402_1%
@
1 2
330P_0402_50V7K
PC741
1 2
0.01U_0402_50V7K
PC701
12
PC702
12
150P_0402_50V8F~D
0.22U_0402_16V7K
UGATEG
PHASEG
LGATEG
VDD
LGATE1
PHASE1
UGATE1
12
PC722
PR736
390P_0402_50V7K
12
PR740
12
1.78K_0402_1%
PC737
PC750
2.2_0603_5%
12
VGATE <15,6>
+3VS
12
130K_0402_1%
PR744
1 2
2K_0402_1%
12
PR705
33.2K_0402_1%
1 2
12
PR763
PR720
1_0603_5%
PC714
1U_0603_10V6K
BOOT1
47P_0402_50V8J
PR741
12
@
12
PR749
2.2_0603_5%
PC723
12
PC727
12
150P_0402_50V8F~D
PC729
1 2
330P_0402_50V7K
VCCSENSE <9>
VSSSENSE <9>
4
4
12
PC755
1000P_0402_50V7K
12
PC715
1U_0603_10V6K
12
PC742
0.22U_0402_16V7K
LGATE1
5
5
213
+5VS
UGATE1
PHASE1
1 2
PC756
@
1000P_0402_50V7K
PR742
42.2K_0402_1%
1 2
123
12
PQ700
PQ702
4
4
+VCC_GFX_PWR_SRC
SIR472DP-T1-GE3_POWERPAK8-5~D
5
4
213
SIR818DP-T1_POWERPAK-SO8-5~D
5
123
5
213
PQ701
PQ704
12
PC746
10U_0805_25V6K
0.22UH_FDUE0640J-H-R22M-P3_25A_20%
12
PQ703
PR760
@
4.7_1206_5%
12
SIR818DP-T1_POWERPAK-SO8-5~D
PC751
@
680P_0402_50V7K
+VCC_PWR_SRC
PC733
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR818DP-T1_POWERPAK-SO8-5~D
12
PC747
10U_0805_25V6K
12
10U_0805_25V6K
12
PC749
0.1U_0402_25V6
PL700
1
2
PR758
1 2
3.65K_0603_1%
VSUMG+ VSUMG-
12
PC734
PR751
PC736
10U_0805_25V6K
0.22UH_FDUE0640J-H-R22M-P3_25A_20%
12
@
4.7_1206_5%
12
PC745
@
1 2
VSUM+
3.65K_0603_1%
680P_0402_50V7K
VSUM-
PR755
PJP701
@
2
112
JUMP_43X118
12
PC752
2200P_0402_25V7K
4
3
VCC_GFXCORE
TDC 21.5A
Peak Current 33A
OCP current 40A
Load line -3.9mV/A
+VCC_GFXCORE_AXG
GP1_Vo
12
PR759
1_0402_5%
B+
PJP700
@
2
112
JUMP_43X118
1
1
+
B+
12
12
PC754
0.1U_0402_25V6
2200P_0402_25V7K
PL701
1
2
P1_SW
PR757
12
1_0402_5%
+
PC730
PC731
2
2
100U_25V_M~D
100U_25V_M~D
4
3
P1_Vo
VCC_core
TDC 16A
Peak Current 33A
OCP current 40A
Load line -2.9mV/A
+VCC_CORE
PR701
Local sense put on HW site
PC703
@
D D
VSUMG+
12
PR707
2.61K_0402_1%
12
PH700
VSUMG-
10KB_0402_5%_ERTJ0ER103J
12
C C
PC711
.1U_0402_16V7K
VR_ON<40>
VR_SVID_CLK<9>
VR_SVID_ALRT#<9>
VR_SVID_DAT<9>
VR_HOT#<40>
+VCCP
PR730 54.9_0402_1%
12
B B
A A
PR735 75_0402_5%@
PR737 130_0402_1%
@
12
PC710
.1U_0402_16V7K
12
12
12
PR709
PR724
1 2
0_0402_5%
SCLK
ALERT#
SDA
12
11K_0402_1%
PR722
1 2
0_0402_5%~D
@
VCC_AXG_SENSE<10>
VSS_AXG_SENSE<10>
12
12
PC707
PR710
0.033U_0402_16V7K
0_0402_5%
1 2
@
12
PC719
43P_0402_50V8J~D
VSUM+
VSUM-
PC709
PC708
.1U_0402_16V7K
@
0.082U_0402_16V7K
PR753
@
649_0402_1%
12
PH701
470K_0402_5%_ TSM0B474J4702RE
12
PR715
27.4K_0402_1%
1 2
PR723 0_0402_5%~D@
1 2
PR729 0_0402_5%~D@
1 2
PR731 0_0402_5%~D@
1 2
PR732 0_0402_5%~D@
PH702
470K_0402_5%_ TSM0B474J4702RE
PR727
27.4K_0402_1%
12
12
PR746
12
2.61K_0402_1%
PR747 11K_0402_1%
PH703
10KB_0402_5%_ERTJ0ER103J
12
PC743
.1U_0402_16V7K
392_0402_1%
1 2
12
12
12
12
PR713
0_0402_5%
1 2
PC738
330P_0402_50V7K
0.01U_0402_50V7K
PR711
2200P_0402_50V7K
PR725
3.83K_0402_1%
1 2
.1U_0402_16V7K
PC706
1 2
PC735
@
1 2
PR712
3.83K_0402_1%
1 2
+5VS
12
0.22U_0402_16V7K
@
12
PC739
NTCG
VR_EN
SCLK
ALERT#
SDA
VR_HOT#_1
NTC
PR733
1 2
0_0402_5%~D
12
0.033U_0402_16V7K
PR752
@
649_0402_1%
@
PC740
12
499_0402_1%
1
2
3
4
5
6
7
8
PR750
365_0402_1%
2200P_0402_50V7K
PR702
12
2.61K_0402_1%
PR704
12
390P_0402_50V7K
32
33
31
30
PAD
ISUMPG
ISUMNG
NTCG
VR_ON
SCLK
PU700
ALERT#
ISL95833HRTZ-T_TQFN32_4X4
SDA
VR_HOT#
NTC
ISEN2
ISEN19ISUMP10ISUMN11RTN12FB13COMP14PGOOD15BOOT1
12
PC732
@
1 2
2K_0402_1%
PR703
130K_0402_1%
PC704
12
IMVP_PWRGD
PR708
0_0402_5%@
1 2
29
26
28
27
25
FBG
RTNG
BOOTG
COMPG
UGATEG
PGOODG
16
PGOOD
PR726
1 2
0_0402_5%~D
Local sense put on HW site
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_VCORE
PWR_VCORE
PWR_VCORE
LA-9104P
LA-9104P
LA-9104P
1
52 57Wednesday, August 29, 2012
52 57Wednesday, August 29, 2012
52 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 53
5
D D
VSSSENSE_VGA<28>
VGA@
100K_0402_1%
C C
VGA_PWRGD<17>
PR811
VGA@
2.2K_0402_5%
PX_MODE<26,40,54>
B B
1 2
1 2
PC805
VGA@
.1U_0402_16V7K
EN_VGA_CORE
Thames XT
GPU_VID3
(GPIO15)
1 1
1 0
0
0 0
+VGA_CORE
TDC 20A
Peak Current 30A
OCP current 36A
FSW=350kHz
DCR 1.4mohm +/-5%
A A
Core Voltage Le vel
GPU_VID1
(GPIO20)
1 0.9V
0.8V
0.85V
1.0V
PR804
PR803
@
0_0402_5%~D
12
PR810
@
0_0402_5%~D
4
VCCSENSE_VGA<28>
PC801VGA@
10P_0402_50V8J
VGA@
1 2
PC800
10P_0402_50V8J
12
VGA@
PU800
PR805
1
1 2
PR806
1 2
VGA@
6.19K_0402_1%
1 2
PR808
1 2
VGA@
124K_0402_1%
+3VS
12
12
GSNS
VGA@
6.19K_0402_1%
2
V3
3
V2
4
V1
5
V0
PR807
VGA@
12.4K_0402_1%
PR809
VGA@
10K_0402_1%
PR801
@
0_0402_5%~D
1 2
12
1 2
4700P_0402_25V7K
20
21
19
PAD
VSNS
TPS51518RUKR_QFN20_3X3
VREF
7
6
12
PC804
PR838
@
0_0402_5%~D
VGA@
0.1U_0402_10V7K
PR812
1 2
1K_0402_5%
VGA@
PR802
VGA@
47.5K_0402_1%
1 2
PC802 VGA@
SLEW
VID08PGOOD
1 2
GPU_VID1
18
TRIP
1 2
VID19EN
@
0_0402_5%~D
GPU_VID3
16
17
GND
MODE
15
V5IN
14
DRVL
13
DRVH
12
SW
11
BST
10
PR839
PR813
1 2
1K_0402_5%
VGA@
<25>
<25>
VGA_CORE_5V
LG_VGA_CORE
UG_VGA_CORE
SW_VGA_CORE
+3VALW
3
PC803
VGA@
1U_0603_10V6K
1 2
+5VALW
12
BST_VGA_CORE-1BST_VGA_CORE
PR817
VGA@
2.2_0603_5%
@
PJP807
2
112
JUMP_43X79
VGA@
PXS_PWREN<16,26>
+VGA_PCIEP +1.0VGS
PR843
1 2
200K_0402_5%
47K_0402_5%
1 2
PC839
0.1U_0603_25V7K
EN_PCIE
PR844
@
VGA@
PCIE_B+
VGA@
12
PC833
22U_0805_6.3VAM
12
PJP806
2
JUMP_43X79
VGA@
12
PC842
@
112
2
@
VGA@
PC816
4.7U_0805_25V6-K
1
+
2
12
PC835
22U_0805_6.3VAM
VGA@
2
JUMP_43X118
PC843
VGA@
470U_D2_2VM_R4.5M
Thames XT Mars Pro
VGA_CORE_B+
VGA@
VGA@
12
PC846
5
PQ800
4
VGA@
123
SIR472DP-T1-GE3_POWERPAK8-5~D
5
4
12
PC853
@
1000P_0402_50V7K
VGA@
4
PU801
10
PVIN
PG
9
PVIN
8
SVIN
5
EN
TP
SS
7
11
12
0.1U_0402_10V7K
PQ802
4
VGA@
213
SIR818DP-T1_POWERPAK-SO8-5~D
2
LX_PCIE
LX
3
LX
6
FB_PCIE
FB
LX
SY8036LDBC_DFN10_3x3
1
PC832
VGA@
0.1U_0402_10V7K
PR831
VGA@
10K_0402_1%
5
PQ801
VGA@
213
VGA@
12
PC847
0.1U_0402_25V6
0.36UH_FDUM0640J-H-R36M-P3_22A_20%
12
PR821
@
4.7_1206_5%
12
PC841
@
1000P_0603_50V7K
SIR818DP-T1_POWERPAK-SO8-5~D
PR832
VGA@
6.81K_0402_1%
12
PC840
12
22P_0402_50V8J
VGA@
12
2200P_0402_50V7K
12
12
PC848
4.7U_0805_25V6-K
PL800
VGA@
1
4
3
2
PL803
VGA@
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2
12
PR841
4.7_1206_5%
VGA@
SNUB_PCIE
12
PC834
VGA@
680P_0402_50V7K
+VGA_PCIEP
PR832 6.81K
1
PJP800
112
1
+
2
+VGA_PCIE
T
DC 3.6A
Peak Current 5.2A
OCP current 6A
B+
VGA@
VGA@
12
12
PC849
PC817
VGA@
470U_D2_2VM_R4.5M
PC850
10U_0805_6.3V6M
10U_0805_6.3V6M
+VGA_PCIEP
12
12
PC852
22U_0805_6.3VAM
VGA@
1.0VVGA_PCIE
12
PC837
PC851
22U_0805_6.3VAM
22U_0805_6.3VAM
VGA@
VGA@
0.95V
5.9K
12
+VGA_CORE
VGA@
PC815
10U_0805_6.3V6M
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_VGA_CORE/VGA_PCIE
PWR_VGA_CORE/VGA_PCIE
PWR_VGA_CORE/VGA_PCIE
LA-9104P
LA-9104P
LA-9104P
1
53 57Wednesday, August 29, 2012
53 57Wednesday, August 29, 2012
53 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 54
5
D D
PJP1002
@
+3VALW
C C
PX_MODE<26,40,53>
112
JUMP_43X79
2
12
1 2
PR1020 10K_0402_5%
VGA@
PC1009
VGA@
22U_0805_6.3V6M
PR1021
1M_0402_5%
@
4
VGA@
PU1000
4
SY8033BDBC_DFN10_3X3
10
9
8
5
EN_VDDCIP
VGA@
12
PC1008
1 2
0.1U_0402_10V7K
PVIN
PVIN
SVIN
EN
2
LX_VDDCIP
LX
PG
3
LX
6
FB_VDDCIP
FB
TP
NC
NC
7
1
11
PL1000
1UH_NRS4018T1R0NDGJ_3.2A_30%
1 2
12
VGA@
PR1012
4.7_1206_5%
FB=0.6Volt
12
PC1011
680P_0402_50V7K
VGA@
VGA@
10K_0402_1%
PC1007
VGA@
PR1018
VGA@
22P_0402_50V8J
12
3
1 2
VGA@
4.99K_0402_1%
12
PR1013
D
S
PR1011
VGA@
10_0402_5%
1 2
PR1014
1 2
0_0402_5%~D
12
VGA@
PR1015
29.4K_0402_1%
13
2
G
PQ1006
VGA@
2N7002W-T/R7_SOT323-3
@
12
PR1017
10K_0402_5%
12
PC1013
@
4700P_0402_25V7K
2
+VDDCI
TDC 2.2A
Peak Current 2.2A
OCP current 4A
+VDDCIP
12
PC1012
PC1010
22U_0805_6.3V6M
22U_0805_6.3V6M
VGA@
VGA@
VDDCI_SEN <28>
+3VGS
12
PR1016
VGA@
10K_0402_5%
VGA@
12
12
PR1019
100K_0402_5%
@
VDDCI_VID <25>
1
VDDCI_VID (GPIO_6)
B B
PJP1003
@
2
+VDDCIP
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
112
JUMP_43X79
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
+VDDCI
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Low 0.9V
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_+VDDCIP
PWR_+VDDCIP
PWR_+VDDCIP
LA-9104P
LA-9104P
LA-9104P
1
54 57Wednesday, August 29, 2012
54 57Wednesday, August 29, 2012
54 57Wednesday, August 29, 2012
1.0
1.0
1.0
1VHigh
Page 55
5
4
3
2
1
+VCC_CORE
D D
+VCC_CORE
C C
+VCC_CORE
2.2U_0402_6.3V6M
12
2.2U_0402_6.3V6M
12
22U_0805_6.3V6M
1
2
22U_0805_6.3V6M
1
2
1
+
2
PC1200
PC1208
Fo
PC1216
PC1222
PC1228
330U_D2_2V_Y
For BOT side
PC1201
2.2U_0402_6.3V6M
12
PC1209
2.2U_0402_6.3V6M
12
r TOP side
PC1217
22U_0805_6.3V6M
1
1
2
2
PC1223
22U_0805_6.3V6M
1
1
2
2
1
+
PC1229
330U_D2_2V_Y
2
+VCC_GFXCORE_AXG
PC1207
PC1204
PC1202
2.2U_0402_6.3V6M
12
12
PC1210
2.2U_0402_6.3V6M
12
12
PC1218
22U_0805_6.3V6M
1
2
PC1224
22U_0805_6.3V6M
1
2
2.2U_0402_6.3V6M
PC1205
PC1203
2.2U_0402_6.3V6M
12
PC1211
2.2U_0402_6.3V6M
12
PC1219
22U_0805_6.3V6M
1
2
PC1225
22U_0805_6.3V6M
1
2
2.2U_0402_6.3V6M
12
PC1212
2.2U_0402_6.3V6M
PC1213
2.2U_0402_6.3V6M
12
PC1220
22U_0805_6.3V6M
PC1221
22U_0805_6.3V6M
1
2
PC1227
22U_0805_6.3V6M
PC1226
22U_0805_6.3V6M
1
2
2.2U_0402_6.3V6M
PC1206
2.2U_0402_6.3V6M
12
12
PC1214
2.2U_0402_6.3V6M
PC1215
2.2U_0402_6.3V6M
12
12
+
PC1254
330U_D2_2V_Y
12
PC1231
12
PC1242
22U_0805_6.3V6M
1
2
1
1
+
PC1255
2
2
330U_D2_2V_Y
12
12
12
PC1233
PC1232
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC1243
PC1244
10U_0603_6.3V6M
10U_0603_6.3V6M
PC1248
PC1250
22U_0805_6.3V6M
PC1249
22U_0805_6.3V6M
1
1
2
2
12
PC1234
1U_0402_6.3V6K
10U_0603_6.3V6M
PC1235
1U_0402_6.3V6K
12
12
PC1246
PC1245
10U_0603_6.3V6M
22U_0805_6.3V6M
PC1251
22U_0805_6.3V6M
1
1
2
2
12
12
PC1236
1U_0402_6.3V6K
12
PC1247
10U_0603_6.3V6M
PC1252
22U_0805_6.3V6M
1
2
12
PC1237
PC1238
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
PC1253
12
12
PC1239
1U_0402_6.3V6K
12
PC1240
PC1241
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
Vaxg
Can connect to GND if motherboard only
‧‧‧‧
1
+
PC1230
330U_D2_2V_Y
2
supports external graphics and if GFX VR is not
stuffed in a common motherboard design,
VAXG can be left floating in a common
‧‧‧‧
motherboard design (Gfx VR keeps VAXG from
floating) if the VR is stuffed
B B
A A
5
+VCCP
12
12
PC1257
12
PC1270
12
PC1258
PC1259
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC1271
PC1272
1U_0402_6.3V6K
1U_0402_6.3V6K
4
12
12
PC1260
1U_0402_6.3V6K
12
PC1273
1U_0402_6.3V6K
12
PC1283
12
PC1261
PC1262
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC1274
PC1275
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC1284
PC1285
10U_0603_6.3V6M
10U_0603_6.3V6M
12
12
PC1264
PC1263
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC1277
PC1276
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC1287
PC1286
10U_0603_6.3V6M
10U_0603_6.3V6M
12
12
PC1265
1U_0402_6.3V6K
12
PC1278
1U_0402_6.3V6K
12
PC1288
10U_0603_6.3V6M
12
PC1266
PC1267
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC1279
PC1280
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC1289
PC1290
10U_0603_6.3V6M
10U_0603_6.3V6M
3
12
12
PC1269
PC1268
1U_0402_6.3V6K
12
1U_0402_6.3V6K
12
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
12
PC1281
PC1282
1U_0402_6.3V6K
1U_0402_6.3V6K
12
PC1291
PC1292
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
+
+
PC1294
330U_D2_2V_Y
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PC1293
2
2
330U_D2_2V_Y
Compal Secret Data
Compal Secret Data
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_PROCESSOR DECOUPLING
PWR_PROCESSOR DECOUPLING
PWR_PROCESSOR DECOUPLING
LA-9104P
LA-9104P
LA-9104P
1
55 57Wednesday, August 29, 2012
55 57Wednesday, August 29, 2012
55 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 56
5
4
3
2
1
D D
Power block
CPU OTP
Page 44
Turn Off
B+
+3VALWP: TDC:5.4A
+5VALWP: TDC:5.6A
RT8205LZQW(2) WQFN
Always
Page 46
DC IN
Input
Switch
Page 45
CHARGER
CC:0A~1A(4cell) or 2.1A(6cell)
CV:17.7V(4cell) / 13.3V(6cell)
C C
ISL88731CHRTZ-T
Page 45
Battery
B B
PX_MODE
VR_ON
+VGA_CORE
TDC: 22A
ADP3211AMNR2G_QFN32
+VCC_CORE
TDC: 16A
ISL95833HRTZ-T_TQFN32
Page 52
Page 51
+3VALW
+1.8VSP: TDC:2.6A
SY8033BDBC
Page 47
+VCCSAP: TDC:4.2A
SY8037DDCC
Page 50
+VGA_PCIEP: TDC:3.6A
SY8036LDBC
Page 52
+VDDCIP: TDC:2.2A
SY8033BDBC
Page 53
+VCCP: TDC:11A
TPS51212DSCR
Page 48
+1.5VP/+0.75VSP: TDC:6A/0.7A
RT8207MZQW
Page 49
SUSP#
+V1.05S_VCCP_PWRGOOD
PXS_PWREN
PX_MODE
SUSP#
SYSON
VR_ON
A A
5
+VCC_GFXCORE_AXG
TDC: 12A
ISL95833HRTZ-T_TQFN32
4
Page 51
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+1.5VGPUP: TDC:4.2A
TPS51212DSCR
Compal Secret Data
Compal Secret Data
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Page 49
SUSP#
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_POWER BLOCK DIAGRAM
PWR_POWER BLOCK DIAGRAM
PWR_POWER BLOCK DIAGRAM
LA-9104P
LA-9104P
LA-9104P
1
56 57Wednesday, August 29, 2012
56 57Wednesday, August 29, 2012
56 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 57
5
D D
C C
Page# Title
Item
Item Issue Description
Page#Page#
ItemItem
1 Morris51 VCORE 12/05/11 change PL700 an d PL701 from 0 .36u to 0.22u
2 44
45
46
3 49 +1.5VP/1.5VDGPU/0.75VSP 12/0 5/15 d esign change change PR302 fr om 12k to 8.66 k X00Morris
504 12/05/ 23+VCCSAP Morris for P entium and Cele ron special BOM add PR607 a nd reserve X00
5 49 +1.5VP/1.5VDGPU/0.75VSP 12/0 7/06 Morris de sign change to reduce low-side mosfet induce X01add PC316 1000p f
6 12/07/17 Morr is X01
45
7
45
8
44 DCIN/BA TT CONN/OTP revise OTP setting to 96C from the rmal request change PR927 fr om 12.1k to 11 k
Title
TitleTitle
DCIN/BATT CONN/ OTP
CHARGER
3.3VALWP/5VALWP
CHARGER
CHARGER 12/07/17 Morri s
Date
DateDate
12/05/11 Morris follow SSI mem o for part shor tage issue X00change PQ112,PQ 114,PQ1111,PQ2 06,PQ904 from S B00000CQ00 to S B00000PV00
12/07/17 Morris
4
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
RequestRequest
Owner
Owner
OwnerOwner
adjust VR param eter X00
from EMI reques t change PR114 fr om 0 to 2.2
design change t o solve Batter y LED
is still on aft er unplug AC w hen SUT in S3S4 S5 issue
Issue DescriptionDate
Issue DescriptionIssue Description
3
Page 1
Page 1
Page 1Page 1
change PC707 an d PC740 from 0 .047u to 0.033u
change PR750 fr om 649 to 365
change PR711 fr om 649 to 392
change PR740 fr om 1.91k to 1. 78k
change PR705 fr om 150k to 33. 2k
add PR141 and P C121
change PR142 fr om 210k to 232 k for ISL88731C (X76)
change PR142 fr om 309k to 324 k for BQ24747 ( X76)
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
Rev.Page#
Rev.Rev.
X01
X01
1
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/08/22 2013/08/31
2012/08/22 2013/08/31
2012/08/22 2013/08/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR-PIR
PWR-PIR
PWR-PIR
LA-9104P
LA-9104P
LA-9104P
1
57 57Wednesday, August 29, 2012
57 57Wednesday, August 29, 2012
57 57Wednesday, August 29, 2012
1.0
1.0
1.0
Page 58
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