Compal LA-9101P Schematics

CyberForum.ru

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M

ODEL NAME : VAW01

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R

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1@

G

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CER3@

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RIR3@

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PROJECT CODE : ANRVAW0100

CB VAW01 LA-9101P LS-9101P/9102P/9103P

PCB NO : LA-9101P (Mars Pro)

1 1

DA60000UT00 LA-9101P M/B

P

DAZ0U500100

DA40001FO00 LS-9101P POWER BUTTON/B

CB VAW01 LA-9101P LS-9101P/9102P/9103P GOLD A31 !

P

DAZ0U500101

ZZ

ANNR3@

Z

H

CB VAW00 LA-9101P LS-9101P/9102P/9103P TRIPOD A31 !

P

DAZ0U500102

ZZ

DTR3@

Z

DA40001FP00 LS-9102P USB/B DA40001FQ00 LS-9103P TP BUTTON/B

PCB VAW00 LA-9101P LS-9101P/9102P/9103P HANNSTARB A31 !

DAZ0U500103

PCB VAW00 LA-9101P LS-9101P/9102P/9103P ZDT A31 !

DAZ0U500104

Dell / Compal Confidential

2 2

Schematic Document

Intel Chief River

Ivy Bridge(BGA) + Panther Point

OAK 15" UMA/DIS AMD Mars Pro

2012-08-22

3 3

46@ : for 46 level @ : Nopop Component CONN@ : Connector Component

R1@ : R1 P/N R3@ : R3 P/N

KB9012@ : ENE KB9012 Implemented UMA@ : Only for UMA EMC@ : EMI/ESD parts

GCLK@ : Green CLK implemented

4 4

GCLKUMA@ : Green CLK for UMA

Rev: 0.4

i3R1@ : CPU i3-3217 1.8G i3VOSR1@ : CPU i3-2365 1.4G i5R1@ : CPU i5-3317 1.7G i7R1@ : CPU i7-3517 1.9G CELR1@ : CPU Celeron 887 1.5G PENR1@ : CPU Pentium 997 1.6G

DIS@ : Only for Discrete TH@/THR1@ : Thames-XT MS@/MSR1@ : Mars Pro

X76@ : SPI-ROM & VRAM Group

GCLKDIS@ : Green CLK for DIS XTAL@ : X'tal implemented XTALDIS@ : X'tal with DIS implemented

A

B

C

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Cover Page

Size Document Number Rev

Custom

LA-9101P

Date: Sheet of

E

1 57Wednesday, August 29, 2012

0.4

CyberForum.ru

A

B

C

D

E

6

4M*16

VRAM * 4 D

DR3

1 1

6

4M*16

VRAM * 4 D

DR3

128M*16

VRAM * 4 DDR3

P

P.31

.31

64bit

AMD Mars Pro, 128b, Radeon HD8650M, P7000-P8000

1GB DDR3 (8-64Mx16), 2GB DDR3 (8-128Mx16)

LVDS Conn.

2 2

HDMI Conn.

P.21

P.22

P

.30

A

MD

Mars Pro

24-26 W

1

28M*16

VRAM * 4 D

DR3

6

4bit

P.24~29

P

.30

P

EG 2.0 x8

LVDS

HDMI

Intel Ivy Bridge P

rocessor

17W DC

BGA 1023

100MHz 100MHz

2.7GT/s

P.5~10

DMI x4FDI x8

5GB/s

Intel

Memory Bus (DDR3)

D

ual Channel

1

.5V DDR3 1333 MHz

SATA3.0

Port 0

Port 2

F

an Control

D

DRIII-DIMM X2

B

ANK 0, 1, 2, 3, 4 ,5 ,6 ,7

SATA HDD Conn.

SATA ODD Conn.

P

.40

8GB Max

CPU XDP Conn.

P.11~12

P.41

P

.6

Panther Point

PCH HM76

USB 3.0

USB2.0

PCI-E x1

RJ45

Port 1

P.32

Port 2

Mini Card WLAN/BT4.0 Half

3 3

P.38

Ethernet

RTL8105E

BGA 989 Balls

HD Audio

P13~20

RTC CKT.

Power On/Off CKT.

DC/DC Interface CKT.

P.44

P.40

P.35

SPI ROM

4MB

SPI ROM

2MB

P.13

SPI

LPC Bus

33MHz

ENE KBC KB9012

P.39

Port 1,2

Port 0,1

Port 2,3

Port 11

Port 8

Port 10

Port 9

USB 3.0 Conn. 1 USB 3.0 Conn. 2

USB 3.0 Conn. 3 USB 2.0 Conn. 4

Digital Camera (With Digital MIC)

Mini Card WLAN (Half)

Card Reader RTS5170/RTS5179

Touch Screen

Digital Mic.

Audio Codec

ALC3221

P.33

P.36

P.37

Daughter board

P.21

P.38

P.34

3 in 1 Socket

P.21

P.34

Headphone Jack / Mic. Jack combo

Int. Speaker R / L

P.33

4 4

PS/2

Int.KBD

A

B

P.40

Touch Pad

P.40

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Block diagram

LA-9101P

E

2 57Wednesday, August 29, 2012

0.4

CyberForum.ru

A

ompal Confidential

C

P

roject Code : VAW01

B

C

D

E

File Name : LA-9101P

S-9101P (PWR/B)

1 1

L

E5

U

L

id

(SA00003VQ00)

SW1 (SN100004Y00)

4 pin-Hot Bar

PBATT

Battery

PWR-BTN FFC

2 2

3 3

TP-MB FFC

6 pin

JHDMI

JLAN

JUSB1

JUSB2

JUSB3

JHP

4 pin

HDMI

RJ-45

USB

HP

JTOUCH 6 pin

JPWR 4 pin

JFAN 3 pin

RTC JRTC

2 pin

Led1

Led3

Led2

XDP

JXDP

Led4

JTP 6 pin

JMINI

MINI Card

PJPDC 5 pin

LA-9101P M/B

(OAK 15")

JSPK 4 pin

Top Side

Bottom Side

JLVDS 40 pin

JREAD

Card Reader

JKB 30 pin

JDB 8 pin

JODD

JHDD

USB-DB FFC

8 pin

LS-9102P (USB/B)

USB

8 pin Hot Bar

JUSB4

TP-Module

4 4

TP-BTN FFC

4 pin

LS-9103P (TP-BTN/B)

Security Classification

4 pin Hot Bar

SW2 SW3

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DB block diagram

LA-9101P

E

0.4

3 57Wednesday, August 29, 2012

0.4

CyberForum.ru

oard ID Table for AD channel

B

Vcc 3.3V +/- 5%

B

oard ID

0 1 2 3 4 5 6 7

SMBUS Control Table

100K +/- 5%Ra

R

b V min

0 0 V

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5%

100K +/- 5% 200K +/- 5%

NC

SOURCE

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

PCH_SML0CLK PCH PCH_SML0DATA

PCH_SML1CL K PCH_SML1DA TA

MEM_SMBCLK MEM_SMBDAT A

KB9012

PCH

MINI1 BATT SODIMM

V

A

D_BID

0.168 V

0.375 V 0.503 V

0.634 V

0.958 V

1.372 V

1.851 V 2.200 V

2.433 V

MINI2

typ

A

D_BID

0 V 0.155 V

0.250 V

0.819 V

1.185 V

1.650 V

3.300 V

V

Express Card

VV V

V

A

D_BID

0.362 V

0.621 V

0.945 V

1.359 V

1.838 V

2.420 V

3.300 V

m

ax

Thermal Sensor

EC AD3

0

x00-0x0C 0x0D-0x1C 0x1D-0x30 0x31-0x49 0x4A-0x69 0x6A-0x8E 0x8F-0xBB 0xBC-0xFF

VGA Thermal

FFS VGA

Sensor

V

A

B

OARD ID Table

I

D

PCB Revision

0

.1

1 2 3 4 5 6 7

XDP

0.1

0.2 0

0

.3

0.4

0.3

1.0

UMA THM

Charger

V

P

roject ID Table

P

roject Revision

I

D

0 1

.1

0

.2

0.2

0.3

0.4

1.0

MARS

2 3 4

UMA

5

DIS THAMES

6

DIS MARS PRO

7

PCH

Link

USB PORT#

0

1

2

3

4

5

6

7

8

9

10

11

DESTINATION

USB conn.2

USB conn.1

USB conn.3

USB conn.4 (DB)

NC

MINI CARD (WLAN)

Touch Screen

Card Reader

Camera

1 1

CLKOUT_PCIE0

CLKOUT_PCIE1

CLKOUT_PCIE2

CLK

CLKOUT_PCIE3

CLKOUT_PCIE4

CLKOUT_PCIE5

CLKOUT_PCIE6

DESTINATIONDIFFERENTIAL

10/100 LAN

MINI CARD WLAN

None

CLKOUT_PCIE7 None

CLKOUT_PEG_B

None

FLEX CLOCKS DESTINATION

CLKOUTFLEX0

CLKOUTFLEX1

CLKOUTFLEX2

CLKOUTFLEX3

CLKOUT

PCI0

PCI1

PCI2

PCI3

None

DESTINATION

PCH_LOOPBACK

EC LPC

None

SATA

SATA0

SATA1

SATA2

SATA3

SATA4

SATA5

DESTINATION

HDD

None

ODD

None

None None

Symbol Note :

PCI4

: means Digital Ground

: means Analog Ground

None

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

12

13

PCI EXPRESS

Lane 1

Lane 2

Lane 3

Lane 4

Lane 5

Lane 6

Lane 7

Lane 8 None

NC

DESTINATION

10/100 LAN

MINI CARD (WLAN)

None

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Notes List

LA-9101P

4 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

(1)PEG_RCOMPO (G4) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC1.

D D

(2)PEG_ICOMPO use 12mil connect to RC1

PEG_RCOMPO (G4)

PEG_ICOMPI (G3)

Trace length Max is 500 mils

DMI_CRX_PTX_N0<15> DMI_CRX_PTX_N1<15> DMI_CRX_PTX_N2<15> DMI_CRX_PTX_N3<15>

DMI_CRX_PTX_P0<15> DMI_CRX_PTX_P1<15> DMI_CRX_PTX_P2<15> DMI_CRX_PTX_P3<15>

DMI_CTX_PRX_N0<15> DMI_CTX_PRX_N1<15>

C C

B B

eDP_COMPIO and ICOMPO signals should be short ed near balls and route d with typical impedance <25 m ohms

DMI_CTX_PRX_N2<15> DMI_CTX_PRX_N3<15>

DMI_CTX_PRX_P0<15> DMI_CTX_PRX_P1<15> DMI_CTX_PRX_P2<15> DMI_CTX_PRX_P3<15>

FDI_CTX_PRX_N0<15> FDI_CTX_PRX_N1<15> FDI_CTX_PRX_N2<15> FDI_CTX_PRX_N3<15> FDI_CTX_PRX_N4<15> FDI_CTX_PRX_N5<15> FDI_CTX_PRX_N6<15> FDI_CTX_PRX_N7<15>

FDI_CTX_PRX_P0<15> FDI_CTX_PRX_P1<15> FDI_CTX_PRX_P2<15> FDI_CTX_PRX_P3<15> FDI_CTX_PRX_P4<15> FDI_CTX_PRX_P5<15> FDI_CTX_PRX_P6<15> FDI_CTX_PRX_P7<15>

FDI_FSYNC0<15> FDI_FSYNC1<15>

FDI_INT<15>

FDI_LSYNC0<15> FDI_LSYNC1<15>

+VCCP

RC36 24.9_0402_1%

RC158 10K_0402_5%

1 2

@

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

+EDP_COM

12

PEG_ICOMPO (G1)

UC1A

i5R1@

M2

DMI_RX#[0]

P6

DMI_RX#[1]

P1

DMI_RX#[2]

P10

DMI_RX#[3]

N3

DMI_RX[0]

P7

DMI_RX[1]

P3

DMI_RX[2]

P11

DMI_RX[3]

K1

DMI_TX#[0]

M8

DMI_TX#[1]

N4

DMI_TX#[2]

R2

DMI_TX#[3]

K3

DMI_TX[0]

M7

DMI_TX[1]

P4

DMI_TX[2]

T3

DMI_TX[3]

U7

FDI0_TX#[0]

W11

FDI0_TX#[1]

W1

FDI0_TX#[2]

AA6

FDI0_TX#[3]

W6

FDI1_TX#[0]

V4

FDI1_TX#[1]

Y2

FDI1_TX#[2]

AC9

FDI1_TX#[3]

U6

FDI0_TX[0]

W10

FDI0_TX[1]

W3

FDI0_TX[2]

AA7

FDI0_TX[3]

W7

FDI1_TX[0]

T4

FDI1_TX[1]

AA3

FDI1_TX[2]

AC8

FDI1_TX[3]

AA11

FDI0_FSYNC

AC12

FDI1_FSYNC

U11

FDI_INT

AA10

FDI0_LSYNC

AG8

FDI1_LSYNC

AF3

eDP_COMPIO

AD2

eDP_ICOMPO

AG11

eDP_HPD#

AG4

eDP_AUX#

AF4

eDP_AUX

AC3

eDP_TX#[0]

AC4

eDP_TX#[1]

AE11

eDP_TX#[2]

AE7

eDP_TX#[3]

AC1

eDP_TX[0]

AA4

eDP_TX[1]

AE10

eDP_TX[2]

AE6

eDP_TX[3]

AV8063801058002-SR0N8-L1-1.7G_BGA1023~D

4

R_COMP place close to CPU

width 4 mils

width 12 mils

SA00005K63L

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

DMI Intel(R) FDI

PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PCI EXPRESS -- GRAPHICS

eDP

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

R_COMP

G3 G1 G4

H22 J21 B22 D21 A19 D17 B14 D13 A11 B10 G8 A8 B6 H8 E5 K7

K22 K19 C21 D19 C19 D16 C13 D12 C11 C9 F8 C8 C5 H6 F6 K6

G22 C23 D23 F21 H19 C17 K15 F17 F14 A15 J14 H13 M10 F10 D9 J4

F22 A23 D24 E21 G19 B18 K17 G17 E14 C15 K13 G13 K10 G10 D8 K4

VCC_IO

PEG_GTX_C_HRX_N7 PEG_GTX_C_HRX_N6 PEG_GTX_C_HRX_N5 PEG_GTX_C_HRX_N4 PEG_GTX_C_HRX_N3 PEG_GTX_C_HRX_N2 PEG_GTX_C_HRX_N1 PEG_GTX_C_HRX_N0

PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_P5 PEG_GTX_C_HRX_P4 PEG_GTX_C_HRX_P3 PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_P0

PEG_HTX_GRX_N7 PEG_HTX_GRX_N6 PEG_HTX_GRX_N5 PEG_HTX_GRX_N4 PEG_HTX_GRX_N3 PEG_HTX_GRX_N2 PEG_HTX_GRX_N1 PEG_HTX_GRX_N0

PEG_HTX_GRX_P7 PEG_HTX_GRX_P6 PEG_HTX_GRX_P5 PEG_HTX_GRX_P4 PEG_HTX_GRX_P3 PEG_HTX_GRX_P2 PEG_HTX_GRX_P1 PEG_HTX_GRX_P0

PEG_COMP

CC9 220nF_0402_16V7KDIS@ CC10 220nF_0402_16V7KDIS@ CC11 220nF_0402_16V7KDIS@ CC12 220nF_0402_16V7KDIS@ CC13 220nF_0402_16V7KDIS@ CC14 220nF_0402_16V7KDIS@ CC15 220nF_0402_16V7KDIS@ CC16 220nF_0402_16V7KDIS@

CC25 220nF_0402_16V7KDIS@ CC26 220nF_0402_16V7KDIS@ CC27 220nF_0402_16V7KDIS@ CC28 220nF_0402_16V7KDIS@ CC29 220nF_0402_16V7KDIS@ CC30 220nF_0402_16V7KDIS@ CC31 220nF_0402_16V7KDIS@ CC32 220nF_0402_16V7KDIS@

+VCCP

12

RC2

24.9_0402_1%

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

3

U

i

C1

3R1@

SA00005L52L

A

V8063801058401-SR0N9-L1-1.8G_BGA1023~D

U

i

C1

5R3@

U

i

C1

3R3@

SA00005L53L

A

V8063801058401-SR0N9-L1-1.8G_BGA1023~D

SA00005K62L

A

V8063801058002-SR0N8-L1-1.7G_BGA1023~D

C1

ELR1@

U

C

SA00006021L

A

V8062701085401-SR0VA-Q0-1.5G_BGA1023~D

UC1

PENR1@

SA00005ZZ1L

AV8062701084801-SR0V5-Q0-1.6G_BGA1023~D

PEG_ICOMPI and RCOMPO signals should be shor ted and routed with - max leng th = 500 mils - typical impeda nce = 43 mohms PEG_ICOMPO sign als should be r outed with - ma x length = 500 mils

- typical imped ance = 14.5 moh ms

PEG_GTX_C_HRX_N7 <24> PEG_GTX_C_HRX_N6 <24> PEG_GTX_C_HRX_N5 <24> PEG_GTX_C_HRX_N4 <24> PEG_GTX_C_HRX_N3 <24> PEG_GTX_C_HRX_N2 <24> PEG_GTX_C_HRX_N1 <24> PEG_GTX_C_HRX_N0 <24>

PEG_GTX_C_HRX_P7 <24> PEG_GTX_C_HRX_P6 <24> PEG_GTX_C_HRX_P5 <24> PEG_GTX_C_HRX_P4 <24> PEG_GTX_C_HRX_P3 <24> PEG_GTX_C_HRX_P2 <24> PEG_GTX_C_HRX_P1 <24> PEG_GTX_C_HRX_P0 <24>

PEG_HTX_C_GRX_N7 <24> PEG_HTX_C_GRX_N6 <24> PEG_HTX_C_GRX_N5 <24> PEG_HTX_C_GRX_N4 <24> PEG_HTX_C_GRX_N3 <24> PEG_HTX_C_GRX_N2 <24> PEG_HTX_C_GRX_N1 <24> PEG_HTX_C_GRX_N0 <24>

PEG_HTX_C_GRX_P7 <24> PEG_HTX_C_GRX_P6 <24> PEG_HTX_C_GRX_P5 <24> PEG_HTX_C_GRX_P4 <24> PEG_HTX_C_GRX_P3 <24> PEG_HTX_C_GRX_P2 <24> PEG_HTX_C_GRX_P1 <24> PEG_HTX_C_GRX_P0 <24>

C1

ELR3@

U

C

SA00006022L

A

V8062701085401-SR0VA-Q0-1.5G_BGA1023~D

UC1

PENR3@

SA00005ZZ2L

AV8062701084801-SR0V5-Q0-1.6G_BGA1023~D

2

U

i

C1

3VOSR1@

A

V8062701313000-SR0U3-J1-1.4G_BGA1023~D

U

i

C1

7R1@

A

V8063801057605-SR0N6-L1-1.9G_BGA1023~D

UC1I

i5R1@

BG17

VSS[181]

BG21

VSS[182]

BG24

VSS[183]

BG28

VSS[184]

BG37

VSS[185]

BG41

VSS[186]

BG45

VSS[187]

BG49

VSS[188]

BG53

VSS[189]

BG9

VSS[190]

C29

VSS[191]

C35

VSS[192]

C40

VSS[193]

D10

VSS[194]

D14

VSS[195]

D18

VSS[196]

D22

VSS[197]

D26

VSS[198]

D29

VSS[199]

D35

VSS[200]

D4

VSS[201]

D40

VSS[202]

D43

VSS[203]

D46 D50 D54 D58

D6 E25 E29

E3 E35 E40 F13 F15 F19 F29 F35 F40 F55

G51

G6

G61 H10 H14 H17 H21

H4

H53 H58

J1 J49 J55 K11 K21 K51

K8 L16 L20 L22 L26 L30 L34 L38 L43 L48 L61

M11 M15

AV8063801058002-SR0N8-L1-1.7G_BGA1023~D

VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249]

VSS

SA00005UH1L

SA00005K53L

VSS_NCTF_10 VSS_NCTF_11

NCTF

VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14

VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258] VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301]

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9

M4 M58 M6 N1 N17 N21 N25 N28 N33 N36 N40 N43 N47 N48 N51 N52 N56 N61 P14 P16 P18 P21 P58 P59 P9 R17 R20 R4 R46 T1 T47 T50 T51 T52 T53 T55 T56 U13 U8 V20 V61 W13 W15 W18 W21 W46 W8 Y4 Y47 Y58 Y59 G48

A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61

1

U

i

C1

3VOSR3@

SA00005UH2L

A

V8062701313000-SR0U3-J1-1.4G_BGA1023~D

U

i

C1

7R3@

SA00005K52L

A

V8063801057605-SR0N6-L1-1.9G_BGA1023~D

@

RC20

1 2

1K_0402_5%

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(1/6) DMI,FDI,PEG

LA-9101P

1

5 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

2

1

+

DP_PREQ#_R DP_PRDY#_R

DP_BPM#0 DP_BPM#1

12

VR1 TOPOLOGY

1 2

@

1 2

RC64

1 2

130_0402_1%

VCCP

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59

H_CATERR#

H_PROCHOT#_R

H_THERMTRIP#_R

H_PM_SYNC

VCCPWRGOOD_0_R

VDDPWRGOOD_RVDDPWRGOOD

BUF_CPU_RST#

J

XDP

G

ND0 BSFN_A0

O O

BSFN_A1 ND2

G O

BSDATA_A0 BSDATA_A1

O GND4 OBSDATA_A2 OBSDATA_A3 GND6 OBSFN_B0 OBSFN_B1 GND8 OBSDATA_B0 OBSDATA_B1 GND10 OBSDATA_B2 OBSDATA_B3 GND12 PWRGOOD/HOOK0 HOOK1 VCC_OBS_AB HOOK2 HOOK3 GND14 SDA SCL TCK1 TCK0 GND16

SAMTE_BSH-030-01-L-D-A

CONN@

ITPCLK/HOOK4

ITPCLK#/HOOK5

VCC_OBS_CD

RESET#/HOOK6

SP02000L900

UC1B

i5R1@

F49

PROC_SELECT #

C57

PROC_DETEC T#

C49

CATERR#

A48

PECI

C45

PROCHOT#

D45

THERMTRIP#

C48

PM_SYNC

B46

UNCOREPW RGOOD

BE45

SM_DRAMPWR OK

D44

RESET#

AV8063801058002-SR0N8-L1-1.7G_BGA1023~D

O O

O

BSDATA_C0 BSDATA_C1

O

OBSDATA_C2 OBSDATA_C3

OBSFN_D0 OBSFN_D1

OBSDATA_D0 OBSDATA_D1

OBSDATA_D2 OBSDATA_D3

DBR#/HOOK7

+

3VALW

12

D D

CFG10<8> CFG11<8>

H_CPUPWRGD H_CPUPWRGD_XDP

CFG0<8>

VGATE<15,52>

PCH_JTAG_TCK<13>

The resistor for HOOK2 shoul d be placed such tha t the stub is very sm all

C C

B B

Place on BOTTOM(-4059,5169) area.

VDDPWRGOOD_R

Place close to CPU

A A

on CFG0 net

+VCCP

RC127 56_0402_1%

RC128 49.9_0402_1%~D

RC44 62_0402_5%~D

PROC_DETECT (Processor Detect): pulled to ground on the processor package. There is no connection to the processor silicon for this signal. System board designers may use this signal to determine if the processor is present

H_PECI

0.1U_0402_10V7K~D

0.1U_0402_25V6K

CC142

1

CC151

@

2

1

@

2

@

C49

R 1K_0402_5%

SYS_PWROK_XDP

1 2 1 2

PCH_SMBDATA<11,12,14,38> PCH_SMBCLK<11,12,14,38>

@

1 2

@

1 2

0_0402_5% @

H_THERMTRIP#

H_CATERR#

H_PROCHOT#

H_PROCHOT#<40,46>

place RC57 near CPU 300mils ~ 1530mils

H_THERMTRIP#<17>

place RC129 ne ar CPU 250mils ~2530 mils

H_CPUPWRGD<17>

1

CC141

0.1U_0402_25V6K

2

ESD request to reserve CC141

X X

XDP_BPM#2 XDP_BPM#3

12

CFG10_R

RC130_0402_5% @

12

CFG11_R

RC150_0402_5% @

XDP_BPM#4 XDP_BPM#5

XDP_BPM#6 XDP_BPM#7

RC221K_0402_5% @

CFD_PWRBTN#_XDP

RC310_0402_5% @

RC381K_0402_5% @

SYS_PWROK_XDP

RC340_0402_5% @

XDP_TCK1

RC30

XDP_TCK_R

H_SNB_IVB#<17>

RC124 10K_0402_5%@

H_PECI<17,40>

RC57 56_0402_1%

RC130 0_0402_1%

H_PM_SYNC<15>

RC25 1K_0402_5%

@

G BSFN_C0 BSFN_C1

G

GND5

GND7

GND9

GND11

GND13

GND15

TRST#

GND17

+

VCCP

2

ND1

4 6 8

ND3

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

CLK_CPU_ITP

42

CLK_CPU_ITP#

44 46

XDP_RST#_RXDP_HOOK2

48

XDP_DBRESET#

50 52

TD0

TDI

TMS

XDP_TDO

54

XDP_TRST#_R

56

XDP_TDI

58

XDP_TMS_R

60

MISC THERMAL PWR MANAGEMENT

CLOCKS

MISC

DDR3

JTAG & BPM

+

VCCP

Place near JXDP1

1 2

@

RC55 1K_0402_5%

1 2

RC33 0_0402_5%@

1 2

RC37 0_0402_5%@

1 2

RC39 0_0402_5%@

BCLK

BCLK#

DPLL_REF_CL K

DPLL_REF_CL K#

BCLK_ITP

BCLK_ITP#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PRDY# PREQ#

TRST#

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

0.1U_0402_16V7K

1

CC36

CC35

2

CLK_CPU_ITP <14> CLK_CPU_ITP# <14>PBTN_OUT#<15,40>

PLT_RST#

PCH_JTAG_TDO <13>

PCH_JTAG_TDI <13> PCH_JTAG_TMS <13>

J3 H2

AG3

CLK_CPU_DPLL_R

AG1

CLK_CPU_DPLL#_R

Remove DPLL Ref clock (for eDP only)

N59 N58

AT30

H_DRAMRST#

BF44

SM_RCOMP0

BE43

SM_RCOMP1

BG43

SM_RCOMP2

CLK_CPU_DMI <14> CLK_CPU_DMI# <14>

1 2

RC65 1K_0402_1%

1 2

RC77 1K_0402_1%

H_DRAMRST# <7>

1 2

RC86140_0402_1%

1 2

RC8325.5_0402_1%

1 2

RC85200_0402_1%

DDR3 Compensation Signals

TCK TMS

TDI

TDO

N53 N55

L56 L55 J58

M60 L59

K58

XDP_DBRESET#_R

G58 E55 E59 G55 G59 H60 J59 J61

XDP_PRDY# XDP_PREQ#

XDP_TCK XDP_TMS XDP_TRST#

XDP_TDI_R XDP_TDO_R

XDP_BPM#0_R XDP_BPM#1_R XDP_BPM#2_R XDP_BPM#3_R XDP_BPM#4_R XDP_BPM#5_R XDP_BPM#6_R XDP_BPM#7_R

XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7

1 2

RC125 0_0402_5%@

1 2

RC135 0_0402_5%@

1 2

RC136 0_0402_5%@

1 2

RC137 0_0402_5%@

1 2

RC126 0_0402_5%@

1 2

RC50 0_0402_5%@

1 2

RC92 0_0402_5%@

1 2

RC89 0_0402_5%

1 2

RC95 0_0402_5%@

1 2

RC91 0_0402_5%@

1 2

RC101 0_0402_5%@

1 2

RC102 0_0402_5%@

1 2

RC103 0_0402_5%@

1 2

RC97 0_0402_5%@

1 2

RC88 0_0402_5%@

1 2

RC87 0_0402_5%@

1 2

RC90 0_0402_5%@

1 2

RC96 0_0402_5%@

1 2

RC93 0_0402_5%@

1 2

RC94 0_0402_5%@

PM_DRAM_PWRGD<15>

+3V_PCH

XDP_PRDY#_R XDP_PREQ#_R

XDP_TCK_R XDP_TMS_R XDP_TRST#_R

XDP_TDI XDP_TDO

XDP_DBRESET#

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7

CFG12 <8> CFG13 <8> CFG14 <8> CFG15 <8>

CH_PWROK<15,40>

P

S

YS_PWROK<15>

RC5

1 2

200_0402_1%

+VCCP

H_DRAMRST#

1

@

CC143

0.1U_0402_25V6K

2

Place close to CPU

C132

R

0_0402_1%

@

1 2

RC11 0_0402_1%

RUN_ON_CPU1.5VS3#<10,35>

PLT_RST#<16,32,38,40>

XDP_DBRESET# <15>

+

3VS

R

C129

@

1 2

0_0402_5%

D_PWG

@

XDP_DBRESET#_R

0.1U_0402_25V6K

Place close to CPU

12

@

C6

R

10K_0402_5%

U

1 2

74AHC1G09GW TSSOP 5P

RUN_ON_CPU1.5VS3#

CC144

+

3V_PCH

0.1U_0402_16V7K

CC33

1

C2

B

VCC A GND3Y

UC3

1

NC

2

A GND3Y

SN74LVC1G07DCKR_SC70-5~D

2

5

4

@

1 2

13

D

2

G

S

+3VALW

1

2

5

VCC

4

BUFO_CPU_RST# BUF_CPU_RST#

PU/PD for JTAG signals

XDP_TMS_R

XDP_TDI_R

XDP_PREQ#

XDP_TDO

XDP_TCK_R

XDP_TRST#_R

XDP_DBRESET#_R

1

VCCPWRGOOD_0_R

2

Avoid stub in the PWRGD path while placing r esistors RC25 & RC130

+

1.5V_CPU_VDDQ

12

C8

R 200_0402_1%

VDDPWRGOOD

RC8 CRB 1.1K CHECK LIST 0.7 --> 4.75K

RC28

INTEL recommand 1.1K

39_0402_1%

PDG 0.71 rev -- >200

QC1

@

2N7002K_SOT23-3

0.1U_0402_16V7K

+VCCP

CC34

12

1 2

1K_0402_5%

1 2

RC59 75_0402_5%

RC58

1 2

43_0402_1%

RC42

0.1U_0402_16V7K

12

@

1

@

RC4751_0402_5%

RC4651_0402_5%

RC4851_0402_5% @

RC10651_0402_5%

RC10551_0402_5%

RC10451_0402_5%

RC4510K_0402_5%

RC62

CC63

0_0402_5%

2

+VCCP

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(2/6) PM,XDP,CLK

LA-9101P

1

6 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

2

1

BD13 BF12

BD10 BD14 BE13 BF16 BE17 BE18 BE21 BE14 BG14 BG18 BF19 BD50 BF48 BD53 BF52 BD49 BE49 BD54 BE53 BF56 BE57 BC59 AY60 BE54 BG54

BA58 AW59 AW58

AU58

AN61

AN59

AU59

AU61

AN58

AR58

AK58

AL58 AG58 AG59 AM60

AL59 AF61 AH60

BG39 BD42 AT22

AV43 BF40 BD45

U

C1D

i5R1@

AL4

S

B_DQ[0]

AL1

B_DQ[1]

S

AN3

S

B_DQ[2]

AR4

B_DQ[3]

S

AK4

S

B_DQ[4]

AK3

B_DQ[5]

S

AN4

SB_DQ[6]

AR1

SB_DQ[7]

AU4

SB_DQ[8]

AT2

SB_DQ[9]

AV4

SB_DQ[10]

BA4

SB_DQ[11]

AU3

SB_DQ[12]

AR3

SB_DQ[13]

AY2

SB_DQ[14]

BA3

SB_DQ[15]

BE9

SB_DQ[16]

BD9

SB_DQ[17] SB_DQ[18] SB_DQ[19]

BF8

SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

DDR SYSTEM MEMORY B

B_CK[0]

S

B_CK#[0] B_CKE[0]

S

SB_CK[1] SB_CK#[1] SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

BA34 AY34 AR22

BA36 BB36 BF27

BE41 BE47

AT43 BG47

AL3 AV3 BG11 BD17 BG51 BA59 AT60 AK59

AM2 AV1 BE11 BD18 BE51 BA61 AR59 AK61

BF32 BE33 BD33 AU30 BD30 AV30 BG30 BD29 BE30 BE28 BD43 AT28 AV28 BD46 AT26 AU22

_CLK_DDR2

M M

_CLK_DDR#2

D

DR_CKE2_DIMMB

M_CLK_DDR3 M_CLK_DDR#3 DDR_CKE3_DIMMB

DDR_CS2_DIMMB# DDR_CS3_DIMMB#

M_ODT2 M_ODT3

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

_CLK_DDR2 <12>

M M

_CLK_DDR#2 <12>

DR_CKE2_DIMMB <12>

D

M_CLK_DDR3 <12> M_CLK_DDR#3 <12> DDR_CKE3_DIMMB <12>

DDR_CS2_DIMMB# <12> DDR_CS3_DIMMB# <12>

M_ODT2 <12> M_ODT3 <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

DDR_B_MA[0..15] <12>

U

C1C

AP11

AJ10

AR11

AT13 AU13

BA13 BB11

AY13 AV14 AR14 AY17 AR19 BA14 AU14 BB14 BB17 BA45 AR43

AW48

BC48 BC45 AR45 AT48 AY48 BA49 AV49 BB51 AY53 BB49 AU49 BA53 BB55 BA55 AV56 AP50 AP53 AV54 AT54 AP56 AP52 AN57 AN53 AG56 AG53 AN55 AN52 AG55 AK56

BD37 BF36 BA28

BE39 BD39 AT41

i5R1@

AG6

S

A_DQ[0]

AJ6

A_DQ[1]

S S

A_DQ[2]

AL6

A_DQ[3]

S S

A_DQ[4]

AJ8

A_DQ[5]

S

AL8

SA_DQ[6]

AL7

SA_DQ[7] SA_DQ[8]

AP6

SA_DQ[9]

AU6

SA_DQ[10]

AV9

SA_DQ[11]

AR6

SA_DQ[12]

AP8

SA_DQ[13] SA_DQ[14] SA_DQ[15]

BC7

SA_DQ[16]

BB7

SA_DQ[17] SA_DQ[18] SA_DQ[19]

BA7

SA_DQ[20]

BA9

SA_DQ[21]

BB9

SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

DDR SYSTEM MEMORY A

A_CK[0]

S

A_CK#[0] A_CKE[0]

S

SA_CK[1] SA_CK#[1] SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0]

SA_MA[1]

SA_MA[2]

SA_MA[3]

SA_MA[4]

SA_MA[5]

SA_MA[6]

SA_MA[7]

SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AU36 AV36 AY26

AT40 AU40 BB26

BB40 BC41

AY40 BA41

AL11 AR8 AV11 AT17 AV45 AY51 AT55 AK55

AJ11 AR10 AY11 AU17 AW45 AV51 AT56 AK54

BG35 BB34 BE35 BD35 AT34 AU34 BB32 AT32 AY32 AV32 BE37 BA30 BC30 AW41 AY28 AU26

_CLK_DDR0

M M

_CLK_DDR#0

D

DR_CKE0_DIMMA

M_CLK_DDR1 M_CLK_DDR#1 DDR_CKE1_DIMMA

DDR_CS0_DIMMA# DDR_CS1_DIMMA#

M_ODT0 M_ODT1

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

_CLK_DDR0 <11>

M M

_CLK_DDR#0 <11> DR_CKE0_DIMMA <11>

D

M_CLK_DDR1 <11> M_CLK_DDR#1 <11> DDR_CKE1_DIMMA <11>

DDR_CS0_DIMMA# <11> DDR_CS1_DIMMA# <11>

M_ODT0 <11> M_ODT1 <11>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

DDR_A_MA[0..15] <11>

D

DR_B_D[0..63]<12>

DDR_B_BS0<12> DDR_B_BS1<12> DDR_B_BS2<12>

DDR_B_CAS#<12> DDR_B_RAS#<12> DDR_B_WE#<12>

D

DR_B_D0 DR_B_D1

D D

DR_B_D2

D

DR_B_D3

D

DR_B_D4

D

DR_B_D5 DR_B_D6

D DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

D

DR_A_D[0..63]<11>

D D

C C

DDR_A_BS0<11> DDR_A_BS1<11> DDR_A_BS2<11>

B B

DDR_A_CAS#<11> DDR_A_RAS#<11> DDR_A_WE#<11>

D

DR_A_D0 DR_A_D1

D D

DR_A_D2

D

DR_A_D3

D

DR_A_D4

D

DR_A_D5 DR_A_D6

D DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AV8063801058002-SR0N8-L1-1.7G_BGA1023~D

+1.5V

4

12

RC108 1K_0402_5%

1 2

RC110 1K_0402_5%

1 2

@

RC111 0_0402_1%

DDR3_DRAMRST# <11,12>

DRAMRST_CNTRL_PCH <14>

DRAMRST_CNTRL <11>

Place close to RC110

3

DDR3_DRAMRST#

1

@

CC145

0.1U_0402_25V6K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

@

RC107 0_0402_5%

QC2

BSS138_SOT23

D

S

13

H_DRAMRST#<6>

A A

H_DRAMRST#

4.99K_0402_1%

RC109

12

G

2

1

CC37 .047U_0402_16V7K

2

DDR3_DRAMRST#_R

DRAMRST_CNTRL

5

AV8063801058002-SR0N8-L1-1.7G_BGA1023~D

Compal Secret Data

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(3/6) DDRIII

LA-9101P

1

7 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

D D

CFG0<6>

+VCC_CORE

CFG10<6> CFG11<6>

1 2

@

RC123 50_0402_1%

CFG12<6> CFG13<6> CFG14<6> CFG15<6>

VCC_VAL_SENSE VSS_VAL_SENSE

1 2

+VCC_GFXCORE_AXG

C C

@

RC120

50_0402_1%

B B

1 2

@

RC119 50_0402_1%

@

RC121 50_0402_1%

VCC_AXG_VAL_SENSE VSS_AXG_VAL_SENSE

4

CFG0

T91PAD~D @

CFG2

T92PAD~D @

CFG4 CFG5 CFG6

CFG7

T66PAD~D @ T41PAD~D @

CFG10

CFG11

CFG12

CFG13

CFG14

CFG15

T69PAD~D @ T89PAD~D @

@

TP_VCC_DIESENSE

RC21 1K_0402_5%

T46PAD~D @ T36PAD~D @

T32PAD~D @

T34PAD~D @ T35PAD~D @

T40PAD~D @

T42PAD~D @

T47PAD~D @ T71PAD~D @

T72PAD~D @ T51PAD~D @ T68PAD~D @ T49PAD~D @

UC1E

i5R1@

B50

CFG[0]

C51

CFG[1]

B54

CFG[2]

D53

CFG[3]

A51

CFG[4]

C53

CFG[5]

C55

CFG[6]

H49

CFG[7]

A55

CFG[8]

H51

CFG[9]

K49

CFG[10]

K53

CFG[11]

F53

CFG[12]

G53

CFG[13]

L51

CFG[14]

F51

CFG[15]

D52

CFG[16]

L53

CFG[17]

H43

VCC_VAL_SENSE

K43

VSS_VAL_SENSE

H45

VAXG_VAL_SENSE

K45

VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48

RSVD6

K48

RSVD7

BA19

RSVD8

AV19

RSVD9

AT21

RSVD10

BB21

RSVD11

BB19

RSVD12

AY21

RSVD13

BA22

RSVD14

AY22

RSVD15

AU19

RSVD16

AU21

RSVD17

BD21

RSVD18

BD22

RSVD19

BD25

RSVD20

BD26

RSVD21

BG22

RSVD22

BE22

RSVD23

BG26

RSVD24

BE26

RSVD25

BF23

RSVD26

BE24

RSVD27

AV8063801058002-SR0N8-L1-1.7G_BGA1023~D

RESERVED

DC_TEST_A4 DC_TEST_C 4 DC_TEST_D 3

DC_TEST_D 1 DC_TEST_A58 DC_TEST_A59

DC_TEST_C 59

DC_TEST_A61

DC_TEST_C 61

DC_TEST_D 61 DC_TEST_B D61 DC_TEST_B E61 DC_TEST_B E59 DC_TEST_B G61 DC_TEST_B G59 DC_TEST_B G58

DC_TEST_B G4

DC_TEST_B G3

DC_TEST_B E3

DC_TEST_B G1

DC_TEST_B E1

DC_TEST_B D1

RSVD28 RSVD29

RSVD30 RSVD31 RSVD32 RSVD33

RSVD34 RSVD35 RSVD36 RSVD37 RSVD38

RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44

RSVD45

BE7

+SA_DIMM_VREFDQ

BG7

+SB_DIMM_VREFDQ

N42 L42 L45 L47

M13 M14 U14 W14 P13

AT49 K24

AH2 AG13 AM14 AM15

N50

A4

TP_DC_TEST_A4

C4 D3

DC_TEST_C4_D3

D1

TP_DC_TEST_D1

A58

TP_DC_TEST_A58

A59 C59

DC_TEST_A59_C59

A61 C61

DC_TEST_A61_C61

D61

TP_DC_TEST_D61

BD61

TP_DC_TEST_BD61

BE61 BE59

DC_TEST_BE59_BE61

BG61 BG59

DC_TEST_BG59_BG61

BG58

TP_DC_TEST_BG58

BG4

TP_DC_TEST_BG4

BG3 BE3

DC_TEST_BE3_BG3

BG1 BE1

DC_TEST_BE1_BG1

BD1

TP_DC_TEST_BD1

3

+SA_DIMM_VREFDQ +SA_DIMM_VREFDQ

2

FG Straps for Processor

C

FG2

12

RC116 1K_0402_1%

1

PEG Static Lane Reversal - CFG2 is for the 16x

1:(Default) Normal Operation; Lane #

CFG2

12

@

definition matches socket pin map definition

0:Lane Reversed

*

Display Port Presence Strap

*

CFG4

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

CFG[6:5]

10: x8, x8 - Device 1 function 1 enabled ; function 2

*

disabled 01: Reserved - (Device 1 function 1 disabled ; function

2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

CFG4

12

RC112 1K_0402_1%@

1 : Disabled; No Physical Display Port attached to Embedded Display Port

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

CFG6

CFG5

1K_0402_1%

RC114

12

RC113 1K_0402_1%

@

T14 PAD~D@ T15 PAD~D@ T16 PAD~D@ T17 PAD~D@

T22 PAD~D@ T21 PAD~D@ T19 PAD~D@ T20 PAD~D@ T18 PAD~D@

T23 PAD~D@

T28 PAD~D@ T27 PAD~D@ T25 PAD~D@ T26 PAD~D@

T29 PAD~D@

RC117

1K_0402_1%

T121 PAD~D@

T118 PAD~D@ T119 PAD~D@

T120 PAD~D@ T122 PAD~D@

T132 PAD~D@ T123 PAD~D@

T124 PAD~D@

12

@

RC115

1K_0402_1%

CFG7

12

@

RC118 1K_0402_1%

PEG DEFER TRAINING

1: (Default) PEG Train immediately

*

CFG7

following xxRESETB de assertion

0: PEG Wait for BIOS for training

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/6) RSVD,CFG

LA-9101P

1

8 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

U

C1F

VCC_CORE

D D

ULV 17W , Max Current in Turbo Mode or HFM

C C

B B

A A

+

3

3A

i5R1@

A26

VCC[1]

A29

VCC[2]

A31

VCC[3]

A34

VCC[4]

A35

VCC[5]

A38

VCC[6]

A39

VCC[7]

A42

VCC[8]

C26

VCC[9]

C27

VCC[10]

C32

VCC[11]

C34

VCC[12]

C37

VCC[13]

C39

VCC[14]

C42

VCC[15]

D27

VCC[16]

D32

VCC[17]

D34

VCC[18]

D37

VCC[19]

D39

VCC[20]

D42

VCC[21]

E26

VCC[22]

E28

VCC[23]

E32

VCC[24]

E34

VCC[25]

E37

VCC[26]

E38

VCC[27]

F25

VCC[28]

F26

VCC[29]

F28

VCC[30]

F32

VCC[31]

F34

VCC[32]

F37

VCC[33]

F38

VCC[34]

F42

VCC[35]

G42

VCC[36]

H25

VCC[37]

H26

VCC[38]

H28

VCC[39]

H29

VCC[40]

H32

VCC[41]

H34

VCC[42]

H35

VCC[43]

H37

VCC[44]

H38

VCC[45]

H40

VCC[46]

J25

VCC[47]

J26

VCC[48]

J28

VCC[49]

J29

VCC[50]

J32

VCC[51]

J34

VCC[52]

J35

VCC[53]

J37

VCC[54]

J38

VCC[55]

J40

VCC[56]

J42

VCC[57]

K26

VCC[58]

K27

VCC[59]

K29

VCC[60]

K32

VCC[61]

K34

VCC[62]

K35

VCC[63]

K37

VCC[64]

K39

VCC[66]

K42

VCC[67]

L25

VCC[68]

L28

VCC[69]

L33

VCC[70]

L36

VCC[71]

L40

VCC[72]

N26

VCC[73]

N30

VCC[74]

N34

VCC[75]

N38

VCC[76]

AV8063801058002-SR0N8-L1-1.7G_BGA1023~D

P

OWER

CORE SUPPLY

4

CCIO[1]

V V

CCIO[3] CCIO[4]

V VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]

VCCIO[9] VCCIO[10] VCCIO[11] VCCIO[12] VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16] VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20] VCCIO[21] VCCIO[22] VCCIO[23] VCCIO[24] VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29]

VCCIO[30] VCCIO[31] VCCIO[32]

PEG IO AND DDR IO

VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49]

VCCIO50

VCCIO51

VCCIO_SEL

VCCPQE[1] VCCPQE[2]

RAILS

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE

VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID QUIET

AF46 AG48 AG50 AG51 AJ17 AJ21 AJ25 AJ43 AJ47 AK50 AK51 AL14 AL15 AL16 AL20 AL22 AL26 AL45 AL48 AM16 AM17 AM21 AM43 AM47 AN20 AN42 AN45 AN48

AA14 AA15 AB17 AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15

W16 W17

BC22

AM25 AN22

A44 B43 C44

F43 G43

AN16 AN17

8.5A

+

VCCP

+VCCP

1 2

RC140 0_0402_5%@

+VCCP

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

VCCSENSE_R VSSSENSE_R

+3VS

RC141 10K_0402_5%@

1 2

VCCP_PWRCTRL

1U_0402_6.3V6K

CC573

1

2

RC147 close to CPU

12

RC147 130_0402_1%

1 2

RC142 43_0402_1%<BOM Structure>

1 2

RC146 0_0402_1%@

1 2

RC144 0_0402_1%@

CAD Note: Place the PU resistors close to CPU RC147 close to CPU 300~1500mil s

1 2

RC139 0_0402_1%@

1 2

RC122 0_0402_1%@

12

RC98 10_0402_1%

1 2

RC133 10_0402_1%

Place RC98 close to CPU

3

VCCP_PWRCTRL Pull high on power side

+VCCP

Note: Place th e PU resistors close to CPU RC145 close to CPU 300~1500mil s

12

RC145 75_0402_5%

VR_SVID_ALRT# <52> VR_SVID_CLK <52> VR_SVID_DAT <52>

+VCC_CORE

12

RC138 100_0402_1%

+VCCP

VCCIO_SENSE <49> VSSIO_SENSE_R <49>

12

RC131 100_0402_1%

VCCSENSE <52> VSSSENSE <52>

2

I

ccmax current c hanged for PDDG Rev0.7

CPU Power Rail Table

Voltage Rail

VCC

VCCIO

VAXG

VCCPLL

VDDQ

VCCSA

+1.5V_MEM 1.5

Description

*

5A to Mem cont roller(+1.5V_CP U_VDDQ) 5-6A to 2 DIMMs /channel 2-5A to +1.5V_R UN & +0.75V_DDR _VTT

Voltage

0.65-1.3

0.0-1.1

0.65-0.9

1.05/1

1.8

1.5

S0 Iccmax Current (A)

53

8.5

33

1.2

5

6

12-16

1

*

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(5/6) PWR,BYPASS

LA-9101P

1

9 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

2

1

+1.5V_CPU_VDDQ Source

+

RC76

100_0402_1%

1U_0402_6.3V6K

1

CC174

2

1U_0402_6.3V6K

1

2

B

Q

C7B

5

@

12

1U_0402_6.3V6K

1

CC175

2

1U_0402_6.3V6K

CC261

CC260

1

2

+_BIAS

12

R

C151

470K_0402_5%

R

UN_ON_CPU1.5VS3

3

4

RUN_ON_CPU1.5VS3# <35,6>

33A

+VCC_GFXCORE_AXG

1.2A

6A

1U_0402_6.3V6K

3VALW

+

12

C143

R 100K_0402_5%

CC264

1

2

+1.8VS

330U_D2_2.5VM_R6M~D

1U_0402_6.3V6K

CC263

1

2

2N7002DW-7-F_SOT363-6

1

CC176

+

2

CC262

1

2

D D

RC149

0_0402_5%

+VCCSA

CC172

1 2

@

1 2

@

RC148

0_0402_1%

VCC_AXG_SENSE<52> VSS_AXG_SENSE<52>

330U_D2_2VM_R6M~D

10U_0603_6.3V6M

1

CC171

+

2

10U_0603_6.3V6M

1

CC169

CC170

2

SUSP#<35,40,48,49,50>

CPU1.5V_S3_GATE<40>

C C

B B

A A

61

2

1

@

CC40

0.1U_0402_10V7K~D

2

+VCC_GFXCORE_AXG

RC99

100_0402_1%

RC100

100_0402_1%

10U_0603_6.3V6M

1

CC183

CC168

2

R

UN_ON_CPU1.5VS3#

QC7A 2N7002DW-7-F_SOT363-6

12

10U_0603_6.3V6M

1

2

Q

1.5V

C3

AO4304L_SO8

8 7 6 5

4

12

i5R1@

1

2

POWER

C150

R

2M_0402_5%~D

UC1G

AA46

VAXG[1]

AB47

VAXG[2]

AB50

VAXG[3]

AB51

VAXG[4]

AB52

VAXG[5]

AB53

VAXG[6]

AB55

VAXG[7]

AB56

VAXG[8]

AB58

VAXG[9]

AB59

VAXG[10]

AC61

VAXG[11]

AD47

VAXG[12]

AD48

VAXG[13]

AD50

VAXG[14]

AD51

VAXG[15]

AD52

VAXG[16]

AD53

VAXG[17]

AD55

VAXG[18]

AD56

VAXG[19]

AD58

VAXG[20]

AD59

VAXG[21]

AE46

VAXG[22]

N45

VAXG[23]

P47

VAXG[24]

P48

VAXG[25]

P50

VAXG[26]

P51

VAXG[27]

P52

VAXG[28]

P53

VAXG[29]

P55

VAXG[30]

P56

VAXG[31]

P61

VAXG[32]

T48

VAXG[33]

T58

VAXG[34]

T59

VAXG[35]

T61

VAXG[36]

U46

VAXG[37]

V47

VAXG[38]

V48

VAXG[39]

V50

VAXG[40]

V51

VAXG[41]

V52

VAXG[42]

V53

VAXG[43]

V55

VAXG[44]

V56

VAXG[45]

V58

VAXG[46]

V59

VAXG[47]

W50

VAXG[48]

W51

VAXG[49]

W52

VAXG[50]

W53

VAXG[51]

W55

VAXG[52]

W56

VAXG[53]

W61

VAXG[54]

Y48

VAXG[55]

Y61

VAXG[56]

F45

VAXG_SENSE

G45

VSSAXG_SENSE

BB3

VCCPLL[1]

BC1

VCCPLL[2]

BC4

VCCPLL[3]

L17

VCCSA[1]

L21

VCCSA[2]

N16

VCCSA[3]

N20

VCCSA[4]

N22

VCCSA[5]

P17

VCCSA[6]

P20

VCCSA[7]

R16

VCCSA[8]

R18

VCCSA[9]

R21

VCCSA[10]

U15

VCCSA[11]

V16

VCCSA[12]

V17

VCCSA[13]

V18

VCCSA[14]

V21

VCCSA[15]

W20

VCCSA[16]

AV8063801058002-SR0N8-L1-1.7G_BGA1023~D

5

4

+

1.5V_CPU_VDDQ

1 2 3

1

CC38

2

0.1U_0603_50V_X7R 10U_0805_10V6K

CC39

VREF

DDR3 - 1.5V RAILS

GRAPHICS

LINES

SENSE

QUIET RAILS

1.8V RAIL

VSS_SENSE_VDDQ

SENSE LINES

SA RAIL

lines

VCCSA VID

12

RC152

20K_0402_5%

SM_VREF

VDDQ[1] VDDQ[2] VDDQ[3] VDDQ[4] VDDQ[5] VDDQ[6] VDDQ[7] VDDQ[8]

VDDQ[9] VDDQ[10] VDDQ[11] VDDQ[12] VDDQ[13] VDDQ[14] VDDQ[15] VDDQ[16] VDDQ[17] VDDQ[18] VDDQ[19] VDDQ[20] VDDQ[21] VDDQ[22] VDDQ[23] VDDQ[24] VDDQ[25] VDDQ[26]

VCCDQ[1] VCCDQ[2]

VDDQ_SENSE

VCCSA_SENSE

VCCSA_VID[0] VCCSA_VID[1]

+V_SM_VREF_CNT

AY43

+V_SM_VREF should have 10 mil trace width

5A

+1.5V_CPU_VDDQ

AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33

AM28 AN26

BC43 BA43

U10

D48 D49

1

2

1

2

+1.5V_CPU_VDDQ

1U_0402_6.3V6K

1

2

3

10U_0603_6.3V6M

CC250

CC574

V_DDR_SMREF

1.5V

+

12

R

C80

1K_0402_1%@

12

R

C81

1K_0402_1%@

RUN_ON_CPU1.5VS3

12

CC178 0.1U_0402_10V7K~D

12

CC179 0.1U_0402_10V7K~D

12

CC149 0.1U_0402_10V7K~D

12

CC150 0.1U_0402_10V7K~D

10U_0603_6.3V6M

CC161

CC252

1

2

1

CC162

2

1U_0402_6.3V6K

CC253

1

2

VCCSA_VID0 <51> VCCSA_VID1 <51>

10U_0603_6.3V6M

1

CC163

2

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

1

CC181

CC180

2

1U_0402_6.3V6K

CC251

1

2

VCCSA_SENSE <51>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

6A

+1.5V

10U_0603_6.3V6M

1

CC164

2

1U_0402_6.3V6K

CC254

CC255

1

2

2012/08/22 2013/08/31

330U_D2_2VM_R6M~D

10U_0603_6.3V6M

1

CC165

CC256

1

2

CC166

2

1U_0402_6.3V6K

CC257

1

2

CC167

+

2

1U_0402_6.3V6K

CC258

1

2

Compal Secret Data

R

C134 0_0402_5%@

NTR4503NT1G_SOT23-3~D

1U_0402_6.3V6K

CC259

1

2

Deciphered Date

2

1 2

Q

C5

@

1

3

2

A13 A17 A21 A25 A28 A33 A37 A40 A45 A49 A53

A9

AA1 AA13 AA50 AA51 AA52 AA53 AA55 AA56

AA8 AB16 AB18 AB21 AB48 AB61 AC10 AC14 AC46

AC6 AD17 AD20

AD4 AD61 AE13

AE8

AF1 AF17 AF21 AF47 AF48 AF50 AF51 AF52 AF53 AF55 AF56 AF58 AF59 AG10 AG14 AG18 AG47 AG52 AG61

AG7 AH4

AH58

AJ13 AJ16 AJ20 AJ22 AJ26 AJ30 AJ34 AJ38 AJ42 AJ45 AJ48

AJ7

AK1 AK52 AL10 AL13 AL17 AL21 AL25 AL28 AL33 AL36 AL40 AL43 AL47 AL61

AM13 AM20 AM22 AM26 AM30 AM34

1.5V_CPU_VDDQ

+

12

R

C84

1K_0402_1%

+

V_SM_VREF_CNT

12

R

C78

1K_0402_1%

UC1H

i5R1@

VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90]

AV8063801058002-SR0N8-L1-1.7G_BGA1023~D

VSS

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(6/6) PWR,VSS

LA-9101P

VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180]

AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13

1

0.4

10 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

2

1

+

1.5V

DIMM1

J

+

CD21

1

2

2.2U_0603_6.3V6K

1

2

V_DDR_REFA

DR_A_D0

D D

DR_A_D1

CD2

D

DR_A_D2

D

DR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS#

DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

1 2

RD6 10K_0402_5%

1 2

RD7 10K_0402_5%

CD22

+0.75VS

+

V_DDR_REFA

+

@

CD13

V_DDR_REFA

220U_2V_D2

1

CD14

+

2

2.2U_0603_6.3V6K

0.1U_0402_16V7K

1

CD1

2

DDR_CKE0_DIMMA<7> DDR_CKE1_DIMMA <7>

DDR_A_BS2<7>

M_CLK_DDR0<7> M_CLK_DDR#0<7>

DDR_A_BS0<7>

DDR_A_WE#<7> DDR_A_CAS#<7>

DDR_CS1_DIMMA#<7>

0.1U_0402_16V7K

+3VS

1

2

D

DR_A_DQS#[0..7]<7>

D

D D

C C

B B

A A

DR_A_DQS[0..7]<7>

DR_A_D[0..63]<7>

D

DR_A_MA[0..15]<7>

D

Layout Note: Place near JDIMM1

+1.5V

1U_0402_6.3V6K

+1.5V

10U_0603_6.3V6M

+0.75VS

CD4

CD3

1

2

10U_0603_6.3V6M

CD8

CD7

1

2

Layout Note: Place near JDIMM1.203,204

1U_0402_6.3V6K

1

CD18

CD17

2

1U_0402_6.3V6K

CD5

1

2

10U_0603_6.3V6M

CD9

CD10

1

2

1U_0402_6.3V6K

1

CD19

2

+

1.5V

12

R

D1

1K_0402_1%

12

RD3 1K_0402_1%

All VREF traces should have 10 mil trace width

CD6

1

2

10U_0603_6.3V6M

CD11

CD12

1

2

1U_0402_6.3V6K

1

2

1

2

CD20

1

V

REF_DQ

3

V

SS2

5

D

Q0

7

D

Q1

9

SS4

V

11

D

M0

13

SS5

V

15

D

Q2

17

Q3

D

19

VSS7

21

DQ8

23

DQ9 VSS925VSS10

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17 VSS1849DQ22

51

DQ18 DQ1953VSS19 VSS2055DQ28

57

DQ24 DQ2559VSS21 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3 A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

BELLW_80001-5021 CONN@

SP07000LZ00

V

QS#0

D

V

VSS8 DQ12 DQ13

DQ14 DQ15

DQ20 DQ21

DQ23

DQ29

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

+

1.5V

2

SS1

4

D

6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DR_A_D4 DR_A_D5

D

DR_A_DQS#0

D D

DR_A_DQS0

D

DR_A_D6

D

DR_A_D7

DDR_A_D12 DDR_A_D13

DDR3_DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA# M_ODT0

M_ODT1

DDR_A_D36 DDR_A_D37

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

PCH_SMBDATA PCH_SMBCLK

+0.75VS

M_CLK_DDR1 <7> M_CLK_DDR#1 <7>

DDR_A_BS1 <7> DDR_A_RAS# <7>

DDR_CS0_DIMMA# <7> M_ODT0 <7>

M_ODT1 <7>

+VREF_CA

2.2U_0603_6.3V6K

0.1U_0402_16V7K

1

CD15

2

PCH_SMBDATA <12,14,38,6> PCH_SMBCLK <12,14,38,6>

DDR3_DRAMRST# <12,7>

+1.5V

12

1

CD16

2

RD4 1K_0402_1%

RD5 1K_0402_1%

M3

DRAMRST_CNTRL<7>

+SA_DIMM_VREFDQ

DRAMRST_CNTRL

+SB_DIMM_VREFDQ

DRAMRST_CNTRL

RD8 0_0402_5%@

RD9 0_0402_5%@

1 2

S

G

2

1 2

S

G

2

QD1

D

13

BSS138_NL_SOT23-3

QD2

D

13

BSS138_NL_SOT23-3

+V_DDR_REFA

+V_DDR_REFB

D

Q4

D

Q5

SS3

QS0 SS6 D

Q6 Q7

D

DM1

DM2

A15 A14

A7

A6 A4

A2 A0

CK1

BA1

S0#

NC2

DM4

DM6

SDA SCL

G2

M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMMA

LA-9101P

1

11 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

2

1

+

1.5V

J

+

1.5V

D D

DDR_B_DQS#[0..7]<7>

DDR_B_DQS[0..7]<7>

DDR_B_D[0..63]<7>

DDR_B_MA[0..15]<7>

Layout Note: Place near JDIMMB

C C

B B

A A

+1.5V

1U_0402_6.3V6K

1

2

+1.5V

10U_0603_6.3V6M

CD32

1

2

Layout Note: Place near JDIMMB.203,204

+0.75VS

1

2

1U_0402_6.3V6K

CD28

CD29

1

2

10U_0603_6.3V6M

CD33

CD34

1

2

1U_0402_6.3V6K

1

CD42

CD43

2

1U_0402_6.3V6K

CD30

CD31

1

2

10U_0603_6.3V6M

CD35

1

2

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

@

1

CD36

1

2

CD44

CD38

CD37

1

2

1U_0402_6.3V6K

1

CD45

2

+

2

12

D15

R 1K_0402_1%

V_DDR_REFB

+

12

RD16 1K_0402_1%

220U_2V_D2

CD39

V_DDR_REFB

+

Note: Check voltage tolerance of VREF_DQ at the DIMM socket

All VREF traces should have 10 mil trace width

+3VS

2.2U_0603_6.3V6K

12

RD19

10K_0402_5%

0.1U_0402_16V7K

1

CD27

2

DDR_CKE2_DIMMB<7>

DDR_B_BS2<7>

M_CLK_DDR2<7> M_CLK_DDR#2<7>

DDR_B_BS0<7>

DDR_B_WE#<7> DDR_B_CAS#<7>

DDR_CS3_DIMMB#<7>

+3VS

10K_0402_5%

+

V_DDR_REFB

D

DR_B_D0 DR_B_D1

D

1

CD26

D

DR_B_D2

2

DR_B_D3

D

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

0.1U_0402_16V7K

2.2U_0603_6.3V6K

12

RD20

+0.75VS

CD46

CD47

1

2

DIMM2

1

V

REF_DQ

3

V

SS

5

D

Q0

7

Q1

D

9

V

SS

11

M0

D

13

V

SS

15

Q2

D

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

BELLW_80001-1021

CONN@

SP07000P700

D

QS0# D

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3

DQ30 DQ31

CKE1

CK1#

RAS#

ODT0

ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5

DQ46 DQ47

DQ52 DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7

DQ62 DQ63

EVENT#

GND2

BOSS2

+

1.5V

2

V

SS

4

DR_B_D4

6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206 208

D D

DR_B_D5

D

DR_B_DQS#0

D

DR_B_DQS0

D

DR_B_D6 DR_B_D7

D

DDR_B_D12 DDR_B_D13

DDR3_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31DDR_B_D27

DDR_CKE3_DIMMB

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# M_ODT2

M_ODT3

DDR_B_D36 DDR_B_D37

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PCH_SMBDATA PCH_SMBCLK

+0.75VS

DDR3_DRAMRST# <11,7>

DDR_CKE3_DIMMB <7>

M_CLK_DDR3 <7> M_CLK_DDR#3 <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>

DDR_CS2_DIMMB# <7> M_ODT2 <7>

M_ODT3 <7>

+VREF_CB

0.1U_0402_16V7K

2.2U_0603_6.3V6K

1

CD40

2

PCH_SMBDATA <11,14,38,6> PCH_SMBCLK <11,14,38,6>

RD17 1K_0402_1%

1

CD41

2

+1.5V

12

RD18 1K_0402_1%

D

Q4

D

Q5 SS

V

QS0 V

SS Q6

D DQ7 VSS

VSS DM1

VSS

VSS DM2 VSS

VSS

VDD

A15 A14

VDD

A11

A7

VDD

A6 A4

VDD

A2

A0 VDD CK1

VDD BA1

VDD S0#

VDD

NC

VDD

VSS

VSS DM4 VSS

VSS

VSS DM6 VSS

VSS

SDA SCL VTT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMMB

LA-9101P

1

12 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

CH_RTCX1

1

C

H4

18P_0402_50V8J

2

1 2

RH5 33_0402_5%

1 2

RH6 33_0402_5%

1 2

RH7 33_0402_5%

1 2

RH8 1M_0402_5%

ME_EN<40>

+3V_PCH +3V_PCH+3V_PCH

12

@

RH19 200_0402_1%

PCH_JTAG_TMS_R PCH_JTAG_TDI_RPCH_JTAG_TDO_R

12

RH25 100_0402_1%

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

RH35 51_0402_5%

PCH_SPI_WP#

PCH_SPI_HOLD#

P

CH_RTCX2

XTAL@

+RTCVCC

HDA_BIT_CLK

HDA_RST#

HDA_SYNC_R

1 2

RH11 1K_0402_1%

1 2

RH15 33_0402_5%

12

RH20 200_0402_1%

12

100_0402_1%

1 2

RH44 0_0402_5%

1 2

RH48 0_0402_5%

1 2

RH70 0_0402_5%

1 2

CH_RTCX1_R<23>

P

+RTCVCC

1U_0603_10V6K

1 2

RH3 20K_0402_5%

1 2

RH4 20K_0402_5%

1U_0603_10V6K

@

RH26

@

H30 0_0402_5%

R

1 2

RH2

1

CH5

2

1

CH6

2

+5VS

G

2

13

D

S

QH1BSS138_SOT23

1 2

@

RH9 0_0402_5%

HDA_SDOUT

PCH_JTAG_TMS_R

PCH_JTAG_TDI_R

PCH_JTAG_TDO_R

close to YH1

GCLK@

1 2

1M_0402_5%

12

CMOS

CLRP1

SHORT PADS

12

CLRP2

SHORT PADS

ME CMOS

CLP1 & CLP2 place near DIMM

HDA_SYNC

3.3K_0402_5%

PCH_SPI_SO

CH_RTCX1

P

SM_INTRUDER#

HDA_SPKR<33>

HDA_SDIN0<33>

NEC flash issu e.

+3V_PCH

@

RH262

1 2

@

1 2

RH36 0_0402_1% RH37 33_0402_5%

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS_R

PCH_JTAG_TDI_R

PCH_JTAG_TDO_R

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_CS1#

PCH_SPI_SI

PCH_SPI_SO

3.3K_0402_5%

12

XTAL@

1 2

H1 10M_0402_5%

R

Y

H1

1 2

32.768KHZ_12.5PF_9H03200019

D D

XTAL@

18P_0402_50V8J

1

C

H3

XTAL@

2

keep away hot s pot

HDA_BITCLK_AUDIO<33>

HDA_RST_AUDIO#<33>

C C

HDA_SYNC_AUDIO<33>

HDA_SDOUT_AUDIO<33>

12

@

RH18 200_0402_1%

12

RH24 100_0402_1%

B B

PCH_JTAG_TCK<6>

PCH_JTAG_TMS<6>

PCH_JTAG_TDI<6>

PCH_JTAG_TDO<6>

PCH_JTAG_TCK

+3V_PCH

1 2

RH38 3.3K_0402_5%

1 2

A A

RH40 3.3K_0402_5%

4

C

H1 10P_0402_50V8J

C

H2 10P_0402_50V8J

Reserve for RF please close t o UH1

R1@

UH1A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST # / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

BD82HM76-SLJ8E-C1_BGA989~D

+3V_PCH

@

RH33

SPI ROM FOR WIN8( 2MByte )

1 2

PCH_SPI_CS1#_RPCH_SPI_CS1#

PCH_SPI_WP#

EON EN25QH16-104HIP_SO8

@

12

@

12

SA00005FH1L

RTCIHDA

JTAG

SPI

UH2

X76@

1

CS#

VCC

2

SO

HOLD#

3

WP#

SCLK

4

GND

EN25QH16-104HIP_SO8

H

DA_SDOUT

H

DA_BIT_CLK

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LPC

FWH4 / LFRAME#

LDRQ1# / GPIO23

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN

SATA 6G

SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

8 7

PCH_SPI_HOLD#PCH_SPI_SO_R

6

PCH_SPI_CLK_R

5

PCH_SPI_SI_R

SI

LDRQ0#

SERIRQ

+3V_PCH

CH11

C38 A38 B37 C37

D36

E36 K36

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

U

R

H1

BD82HM76-SLJ8E-C1_BGA989~D

SA00005FH2L

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

SATA_PTX_DRX_N0 SATA_PTX_DRX_P0

SATA_PRX_DTX_N2 SATA_PRX_DTX_P2 SATA_PTX_DRX_N2 SATA_PTX_DRX_P2

SATA_COMP

SATA3_COMP

RBIAS_SATA3

PCH_SATALED#

RH268 0_0402_1%

BBS_BIT0_R

0.1U_0402_16V7K

1

2

12

RH27 33_0402_5%

12

RH39 33_0402_5%

1

CH99

@

10P_0402_50V8J

2

3

3@

LPC_AD0 <40> LPC_AD1 <40> LPC_AD2 <40> LPC_AD3 <40>

LPC_FRAME# <40>

SERIRQ <40>

1 2

CH7 0.01U_0402_16V7K

1 2

CH8 0.01U_0402_16V7K

PCH_SATALED# <38>

@

12

10K_0402_5%

PCH_SPI_CLK PCH_SPI_SI

+1.05VS_VCC_SATA

+1.05VS_SATA3

1 2

RH21 37.4_0402_1%

1 2

RH22 49.9_0402_1%

1 2

RH28 750_0402_1%~D

1 2

RH29

HDD_DET#HDD_DET#_R

+3VS

SATA_PRX_DTX_N0 <41> SATA_PRX_DTX_P0 <41> SATA_PTX_DRX_N0_C <41> SATA_PTX_DRX_P0_C <41>

SATA_PRX_DTX_N2 <41> SATA_PRX_DTX_P2 <41> SATA_PTX_DRX_N2 <41> SATA_PTX_DRX_P2 <41>

HDD_DET# <41>

PCH_SPI_CS0#

3.3K_0402_5%

@

1 2

RH264 0_0402_1%

12

RH265 33_0402_5%

2

+

330K_0402_5%

P

CH_INTVRMEN

H13

R

P

CH_INTVRMEN

H16

R

INTVRMEN

ntegrated VRM e nable

H

：

I

*

L

：

Integrated VRM disable

HDA_SDO

ME debug mode , this signal has a weak internal PD

L=>security measures defined in the Flash Descriptor will be in effect (default)

12

@

330K_0402_5%

RTCVCC

H=>Flash Descriptor Security will be overridden

HDD

ODD

JP12

+CHGRTC

+3V_PCH

2

JUMP_43X39

SPI ROM FOR ME

PCH_SPI_CS0#_R

1 2

PCH_SPI_SO_LPCH_SPI_SO

( 4MByte )

UH6

X76@

1

CS#

2 3 4

EON EN25Q32B-104HIP_SO8

VCC

SO/SIO1

HOLD#

WP#

SCLK

GND

SI/SIO0

EN25Q32B-104HIP_SO8

8 7

PCH_SPI_HOLD#

6

PCH_SPI_CLK_L

5

PCH_SPI_SI_L PCH_SPI_SI

@

RH263

1

S

ERIRQ

H10 10K_0402_5%

R

H

DD_DET#

R

H12 10K_0402_5%

P

CH_SATALED#

H14 10K_0402_5%

R

HDA_SPKR

RH17 1K_0402_5%@

LOW=Default HIGH=No Reboot

*

HDA_SDOUT

RH23 1K_0402_5%@

Low = Disabled

*

High = Enabled

HDA_SYNC

This signal has a weak interna l pull-down On Die PLL VR i s supplied by

1.5V when smapl ed high

1.8V when sampl ed low Needs to be pul led High for Hu ron River platf rom

HDA_SYNC

RH32 1K_0402_5%

+3V_PCH

12

RTC Battery

+RTCBATT

+CHGRTC

3

1 2

2

1

CH12 1U_0603_10V6K

2

112

+3V_PCH

CH98

+3VLP

0.1U_0402_16V7K

1

2

12

RH266 33_0402_5%

12

RH267 33_0402_5%

W=20mils

PCH_SPI_CLKPCH_SPI_WP#

12

+3V_PCH

12

RH34 1K_0402_5%

W=20mils

DH1 BAT54CW_SOT323-3

+RTCVCC

+

3VS

+

ZZZ9

SPIEON@

5

X7644031L07

4

ZZZ10

SPIWB@

X7644031L08

ZZZ11

SPIMXIC@

X7644031L09

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (1/8) SATA/HDA/SPI/LPC

LA-9101P

1

13 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

2

1

MBCLK

6 1

QH2A

RH78

1 2

@

0_0402_5%

DMN66D0LDW-7_SOT363-6

6 1

@

QH7A

DMN66D0LDW-7_SOT363-6

SML1CLK

SML1DATA

S

MBDATA

S

ML0CLK

S

ML0DATA

S

ML1CLK

S

ML1DATA

S

MBALERT#

CH_HOT#

P

DRAMRST_CNTRL_PCH

CLKIN_DMI2# CLKIN_DMI2 CLKIN_DMI# CLKIN_DMI CLKIN_DOT96# CLKIN_DOT96 CLKIN_SATA# CLKIN_SATA CLK_PCH_14M

If use extenal CLK gen, please place close to CLK gen else, please place close to PCH

2

3

QH2B

RH82

1 2

@

0_0402_5%

2

3

@

QH7B

+3V_PCH

2

DMN66D0LDW-7_SOT363-6

QH3A

U

H1B

P

12

CIE_PRX_LANTX_N1

P

CIE_PRX_LANTX_P1

P

CIE_PTX_LANRX_N1_C CIE_PTX_LANRX_P1_C

P

CIE_PRX_WLANTX_N2

P P

CIE_PRX_WLANTX_P2

P

CIE_PTX_WLANRX_N2_C

P

CIE_PTX_WLANRX_P2_C

PCIE_LAN# PCIE_LAN

LAN_CLKREQ#

PCIE_WLAN# PCIE_WLAN

WLAN_CLKREQ#

GPIO20

GPIO25

GPIO26

GPIO44

GPIO56

GPIO45

GPIO46

CLK_BCLK_ITP# CLK_BCLK_ITPCLK_BCLK_ITP

P

CIE_PRX_LANTX_N1<32>

P

1

0/100 LAN --->

D D

WLAN (Mini Card)--->

C C

10/100 LAN --->

WLAN (Mini Card)--->

B B

XTAL@

RH89 1M_0402_5%

A A

12P_0402_50V8J

CH27

XTAL@

1

2

25MHZ_10PF_7V25000014

CIE_PRX_LANTX_P1<32>

P

CIE_PTX_LANRX_N1<32>

P

CIE_PTX_LANRX_P1<32>

P

CIE_PRX_WLANTX_N2<38>

P

CIE_PRX_WLANTX_P2<38> CIE_PTX_WLANRX_N2<38>

P P

CIE_PTX_WLANRX_P2<38>

*PCIE REQ power rail: suspend: 0 3 4 5 6 7 core: 1 2

CLK_CPU_ITP#<6> CLK_CPU_ITP<6>

XTAL25_IN

12

XTAL25_OUT

3

1

CH28

YH2

OSC1OSC

GND2GND

12P_0402_50V8J

XTAL@

2

4

CLK_PCIE_LAN#<32> CLK_PCIE_LAN<32>

LAN_CLKREQ#<32>

CLK_PCIE_WLAN#<38> CLK_PCIE_WLAN<38>

WLAN_CLKREQ#<38>

CLK_CPU_ITP# CLK_CPU_ITP

PCH_X1<23>

1 2

C

H19 0.1U_0402_10V7K~D

1 2

C

H20 0.1U_0402_10V7K~D

1 2

C

H21 0.1U_0402_10V7K~D

1 2

H22 0.1U_0402_10V7K~D

C

RH67 0_0402_1%@ RH68 0_0402_1%@

RH69 10K_0402_5%

+3V_PCH

RH75 0_0402_1%@ RH76 0_0402_1%@ RH77 10K_0402_5%

+3VS

+3V_PCH

RH79 10K_0402_5%

RH74 10K_0402_5%

RH66 10K_0402_5%

RH83 10K_0402_5%

RH84 10K_0402_5%

RH88 10K_0402_5%

RH90 10K_0402_5%

1 2

RH91 0_0402_1%@

1 2

RH92 0_0402_1%@

close to YH2

1 2

RH41 0_0402_5%

GCLK@

1 2 1 2

1 2

XTAL25_IN

5

4

BG34

P

ERN1

BJ34

P

ERP1

AV32

P

ETN1

AU32

P

ETP1

BE34

ERN2

P

BF34

P

ERP2

BB32

ETN2

P

AY32

P

ETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_ B_N

AB40

CLKOUT_PEG_ B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

BD82HM76-SLJ8E-C1_BGA989~D

R1@

@

CH25

RH63

22P_0402_50V8J

12

RH65

@

1 2

CH26

22P_0402_50V8J

1 2

12

@

CLK_PCH_14M

33_0402_5%

CLK_PCI_LPBACK

33_0402_5%

Reserve for EM I please close to UH1

SMBUSController

SML1ALERT# / PCH HOT# / GPIO74

PCI-E*

CLOCKS

S

MBALERT# / GPIO11

ML0ALERT# / GPIO60

S

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_ N CLKOUT_DP_ P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

3

E12

S

MBALERT#

H14

MBCLK

S

MBCLK

MBDATA

S

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

XTAL25_IN

S

C9

MBDATA

S

A12

D

RAMRST_CNTRL_PCH

C8

SML0CLK

G12

SML0DATA

C13

PCH_HOT#

E14

SML1CLK

M16

SML1DATA

M7

T11

No support iAMT

P10

M10

PEG_A_CLKRQ#

AB37

CLK_PEG_VGA#

AB38

CLK_PEG_VGA

AV22

CLK_CPU_DMI#

AU22

CLK_CPU_DMI

AM12 AM13

BF18

CLKIN_DMI#

BE18

CLKIN_DMI

BJ30

CLKIN_DMI2#

BG30

CLKIN_DMI2

G24

CLKIN_DOT96#

E24

CLKIN_DOT96

AK7

CLKIN_SATA#

AK5

CLKIN_SATA

K45

CLK_PCH_14M

H45

CLK_PCI_LPBACK

V47

XTAL25_IN

V49

XTAL25_OUT

Y47

XCLK_RCOMP

K43

CLK_FLEX0

F47

CLK_14M_R

H47

CLK_LAN_25M_R

K49

DGPU_PRSNT#

LAN_X1<23>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Total device

1 2

RH125

22_0402_5%

RH270 22_0402_5%

RH269 10K_0402_5%

RH261 10K_0402_5%DIS@

1 2

MEMORY

RAMRST_CNTRL_PCH <7>

D

PCH_HOT# <40>

20090512 add double mosfet prevent ATI M92 electric leakage

+3V_PCH

RH64 10K_0402_5%

1 2

CLK_PEG_VGA# <24> CLK_PEG_VGA <24>

CLK_CPU_DMI# <6> CLK_CPU_DMI <6>

1 2

RH85 90.9_0402_1%

12

@

12

UMA@

close to RH270

1 2

RH31 0_0402_5%

GCLK@

2012/08/22 2013/08/31

PEG_A_CLKRQ# <25>

CLK_PCI_LPBACK <16>

+1.05VS_VCCDIFFCLKN

T53 PAD~D@

T54 PAD~D@

CLK_LAN_25M <32>

+3VS

CLK_LAN_25M

Compal Secret Data

Deciphered Date

2

SMBCLK

DMN66D0LDW-7_SOT363-6

SMBDATA

SMBCLK

DMN66D0LDW-7_SOT363-6

SMBDATA

1 2

R

H45 2.2K_0402_5%

1 2

H46 2.2K_0402_5%

R

1 2

R

H47 2.2K_0402_5%

1 2

R

H49 2.2K_0402_5%

1 2

R

H50 2.2K_0402_5%

1 2

R

H51 2.2K_0402_5%

1 2

R

H52 10K_0402_5%

1 2

RH86 10K_0402_5%

1 2

RH53 1K_0402_5%

1 2

RH54 10K_0402_5%

1 2

RH55 10K_0402_5%

1 2

RH56 10K_0402_5%

1 2

RH57 10K_0402_5%

1 2

RH58 10K_0402_5%

1 2

RH59 10K_0402_5%

1 2

RH60 10K_0402_5%

1 2

RH61 10K_0402_5%

1 2

RH62 10K_0402_5%

+3VS

+3VS +3VS

+3VS

RH71

2.2K_0402_5%

5

4

PCH_SMBCLK

PCH_SMBDATA

RH80

2.2K_0402_5%

@

5

4

61

5

4

DMN66D0LDW-7_SOT363-6

QH3B

Title

Size Document Number Rev

Date: Sheet of

1 2

RH87 0_0402_1%

1 2

RH93 0_0402_1%

1 2

3

Compal Electronics, Inc.

PCH (2/8) PCIE/SMBUS/CLK

LA-9101P

RH72

2.2K_0402_5%

PCH_SMBCLK <11,12,38,6>

PCH_SMBDATA <11,12,38,6>

@

RH81

2.2K_0402_5%

@

TP_SMBCLK <39>

TP_SMBDATA <39>

PCH_SMLCLK <40>

PCH_SMLDATA <40>

1

+

3V_PCH

TP_SMBCLK

TP_SMBDATA

0.4

14 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

U

H1C

MI_CTX_PRX_N0

D D

Reserve for ESD

CH105

12

0.1U_0402_16V7K

SYS_PWROK_R

Please close to PCH

C C

PM_DRAM_PWRGD<6>

Reserve for ESD

PBTN_OUT#

1

@

CH103

0.1U_0402_16V7K

Place close to PCH

B B

A A

2

GPIO72

RI#

PCIE_WAKE#

AC_PRESENT_R

SUSWARN#

WAKE#

EC_RSMRST#

D

MI_CTX_PRX_N0<5>

D

MI_CTX_PRX_N1<5>

D

MI_CTX_PRX_N2<5>

D

MI_CTX_PRX_N3<5>

D

MI_CTX_PRX_P0<5> DMI_CTX_PRX_P1<5> DMI_CTX_PRX_P2<5> DMI_CTX_PRX_P3<5>

DMI_CRX_PTX_N0<5> DMI_CRX_PTX_N1<5> DMI_CRX_PTX_N2<5> DMI_CRX_PTX_N3<5>

DMI_CRX_PTX_P0<5> DMI_CRX_PTX_P1<5> DMI_CRX_PTX_P2<5> DMI_CRX_PTX_P3<5>

+1.05VS

XDP_DBRESET#<6>

PCH_PWROK

EC_RSMRST#<40>

PBTN_OUT#<40,6>

ACIN<25,40,45,46>

1 2

RH116 10K_0402_5%

1 2

RH117 10K_0402_5%

1 2

RH118 10K_0402_5%@

1 2

RH121 200K_0402_5%

1 2

RH124 10K_0402_5%

1 2

RH126 10K_0402_5%

1 2

RH127 10K_0402_5%

PCH_PWROK<40,6>

VGATE<52,6>

RH99 49.9_0402_1%

RH100 750_0402_1%~D

4mil width and place within 500mil of the PCH

T57PAD~D

SYS_PWROK

PCH_PWROK

D D

MI_CTX_PRX_N1

D

MI_CTX_PRX_N2

D

MI_CTX_PRX_N3

MI_CTX_PRX_P0

D DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

1 2

RH104 0_0402_1%

RH105 0_0402_1%

RH106 0_0402_1%

RH108 0_0402_1%

RH110 0_0402_1%

1 2

XDP_DBRESET#

1 2

@

1 2

@

1 2

@

PM_DRAM_PWRGD

1 2

@

1 2

@

DH4

1 2

RB751V-40_SOD323-2

+3V_PCH

1

CH30

0.1U_0402_16V7K

2

1

IN1

2

IN2

DMI_IRCOMP

RBIAS_CPY

PCH_RSMRST#_R

GPIO72

+3VS

BC24 BE20 BG18 BG20

BE24 BC20 BJ18 BJ20

AW24 AW20

BB18 AV18

AY24 AY20 AY18 AU18

BJ24

BG25

BH21

C12

K3

SYS_PWROK_R

SUSWARN#

AC_PRESENT_R

RI#

P12

L22

L10

B13

C21

K16

E20

H20

E10

A10

DSWODVREN

5

UH3

VCC

4

SYS_PWROK

OUT

GND

MC74VHC1G08DFT2G_SC70-5

3

MI0RXN

D D

MI1RXN MI2RXN

D D

MI3RXN

DMI0RXP DMI1RXP DMI2RXP DMI3RXP

DMI0TXN DMI1TXN DMI2TXN DMI3TXN

DMI0TXP DMI1TXP DMI2TXP DMI3TXP

DMI_ZCOMP

DMI_IRCOMP

DMI2RBIAS

SUSACK#

SYS_RESET#

SYS_PWROK

PWROK

APWROK

DRAMPWROK

RSMRST#

SUSWARN#/SU SPWRDNACK/GPIO30

PWRBTN#

ACPRESENT / GPIO31

BATLOW# / GPIO72

RI#

BD82HM76-SLJ8E-C1_BGA989~D

R1@

DSWODVREN - On Die DSW VR Enab le

H：Enable

*

L：Disable

4

DI_RXN0

F F

DI_RXN1 DI_RXN2

F F

DI_RXN3 DI_RXN4

F FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6

DMI

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

System Power Management

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

Check EC for S3 S4 LED

SYS_PWROK <6>

12

RH119 330K_0402_5%

RH122 330K_0402_5%@

WAKE#

+RTCVCC

BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9

BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

DI_CTX_PRX_N0

F F

DI_CTX_PRX_N1

F

DI_CTX_PRX_N2

F

DI_CTX_PRX_N3

F

DI_CTX_PRX_N4 DI_CTX_PRX_N5

F FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWODVREN

1 2

@

RH128

1 2

WAKE#

RH103 0_0402_5%

PM_CLKRUN#

SUS_STAT#

1 2

SUSCLK

@

RH107 0_0402_1%

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

PM_SLP_SUS#

H_PM_SYNC

If not using i ntegrated LAN,signal may be left as NC.

@

3

F

DI_CTX_PRX_N0 <5>

F

DI_CTX_PRX_N1 <5>

F

DI_CTX_PRX_N2 <5>

F

DI_CTX_PRX_N3 <5> DI_CTX_PRX_N4 <5>

F F

DI_CTX_PRX_N5 <5> FDI_CTX_PRX_N6 <5> FDI_CTX_PRX_N7 <5>

FDI_CTX_PRX_P0 <5> FDI_CTX_PRX_P1 <5> FDI_CTX_PRX_P2 <5> FDI_CTX_PRX_P3 <5> FDI_CTX_PRX_P4 <5> FDI_CTX_PRX_P5 <5> FDI_CTX_PRX_P6 <5> FDI_CTX_PRX_P7 <5>

FDI_INT <5>

FDI_FSYNC0 <5>

FDI_FSYNC1 <5>

FDI_LSYNC0 <5>

FDI_LSYNC1 <5>

PCH_RSMRST#_RPCH_DPWROK

0_0402_1%

T58 PAD~D

T59 PAD~D

PCIE_WAKE# <32,40>

SUSCLK_R <40>

PM_SLP_S5# <40>

PM_SLP_S4# <40>

PM_SLP_S3# <40>

H_PM_SYNC <6>

Can be left NC when IAMT is not support on the platfrom

SUSCLK

Reserve for RF please close t o UH1

CH29

@

10P_0402_50V8J

PCH_ENVDD<21>

LVDS_DDC_CLK<21>

LVDS_DDC_DATA<21>

LVDS_ACLK-<21> LVDS_ACLK+<21>

LVDS_A0-<21> LVDS_A1-<21> LVDS_A2-<21>

LVDS_A0+<21> LVDS_A1+<21> LVDS_A2+<21>

LVDS_BCLK-<21> LVDS_BCLK+<21>

LVDS_B0-<21> LVDS_B1-<21> LVDS_B2-<21>

LVDS_B0+<21> LVDS_B1+<21> LVDS_B2+<21>

12

+3VS

1 2

RH133 2.2K_0402_5%

1 2

RH135 2.2K_0402_5%

1 2

RH136 8.2K_0402_5%@

1 2

RH137 2.2K_0402_5%

1 2

RH138 2.2K_0402_5%

1 2

RH233 2.2K_0402_5%

1 2

RH234 2.2K_0402_5%

1 2

RH238 2.2K_0402_5%

1 2

RH239 2.2K_0402_5%

2

H1D

U

CRT_IREF

J47

_BKLTEN

L

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_C LK

P39

L_CTRL_D ATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_ CLK

M40

CRT_DDC_ DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

BD82HM76-SLJ8E-C1_BGA989~D

R1@

DVO_TVCLKINN

S

SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

HDMI

LVDS

DDPC_CTR LCLK

DDPC_CTR LDATA

mDP

Digital Display Interface

DDPD_CTR LCLK

DDPD_CTR LDATA

CRT

DMC

E

T56PAD~D

1K_0402_0.5%

NBKL CH_ENVDD

P

LVDS_DDC_CLK LVDS_DDC_DATA

CTRL_CLK CTRL_DATA

LVDS_IBG

LVDS_ACLKLVDS_ACLK+

LVDS_A0LVDS_A1LVDS_A2-

LVDS_A0+ LVDS_A1+ LVDS_A2+

LVDS_BCLKLVDS_BCLK+

LVDS_B0LVDS_B1LVDS_B2-

LVDS_B0+ LVDS_B1+ LVDS_B2+

CRT_DDC_CLK CRT_DDC_DATA

12

RH115

CTRL_CLK

CTRL_DATA

PM_CLKRUN#

LVDS_DDC_CLK

LVDS_DDC_DATA

PCH_SDVO_CTRLCLK

PCH_SDVO_CTRLDATA

CRT_DDC_CLK

CRT_DDC_DATA

NBKL<40>

E

VGA_PWM<21>

@

AP43 AP45

AM42 AM40

AP39

SDVO_INTN

AP40

SDVO_INTP

P38 M39

AT49

DDPB_AUXN

AT47

DDPB_AUXP

AT40

1 2

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

HDMI_DET

HDMI_A2N_VGA HDMI_A2P_VGA HDMI_A1N_VGA HDMI_A1P_VGA HDMI_A0N_VGA HDMI_A0P_VGA HDMI_A3N_VGA HDMI_A3P_VGA

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

RH120 10K_0402_5%

RH123 2.37K_0402_1%

RH132 100K_0402_5%

RH134 100K_0402_5%

PCH_SDVO_CTRLCLK <22>

PCH_SDVO_CTRLDATA <22>

HDMI_DET <22>

HDMI_A2N_VGA <22>

HDMI_A2P_VGA <22>

HDMI_A1N_VGA <22>

HDMI_A1P_VGA <22>

HDMI_A0N_VGA <22>

HDMI_A0P_VGA <22>

HDMI_A3N_VGA <22>

HDMI_A3P_VGA <22>

PM_CLKRUN#

LVDS_IBG

PCH_ENVDD

ENBKL

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (3/8) DMI/FDI/PM/GFX/DP

LA-9101P

1

15 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

+

3VS

1 2

R

H129 8.2K_0402_5%

1 2

H130 8.2K_0402_5%

+3VS

12

PCH_PLTRST#

12

CLK_PCI1

R

1 2

H131 8.2K_0402_5%

R

1 2

H141 8.2K_0402_5%

R

1 2

R

H142 8.2K_0402_5%

1 2

RH146 8.2K_0402_5%

1 2

RH147 8.2K_0402_5%

1 2

RH148 8.2K_0402_5%

1 2

RH151 8.2K_0402_5%

1 2

RH153 8.2K_0402_5%

1 2

RH154 8.2K_0402_5%

RH140 10K_0402_5%

PT: Port 1 USB Conn JUSB2 Port 2 USB Conn JUSB1 Port 3 Cancel

CLK_PCI_LPBACK<14>

CLK_PCI_LPC<40>

D D

C C

B B

SSI: Port 1 USB Conn 1 Port 2 USB Conn 2 Port 3 USB Conn 3

Reserve for ESD

CH104

0.1U_0402_16V7K

Please close to PCH

CH31

@

10P_0402_50V8J

Reserve for RF please close t o PCH

+3VS

@

RH150

10K_0402_5%

PLT_RST#<32,38,40,6>

A A

12

1 2

4

CLK_PCI_LPBACK CLK_PCI_LPC

12

RH155 100K_0402_5%

P

CI_PIRQA#

P

CI_PIRQD#

P

CI_PIRQB#

P

CI_PIRQC#

PIO51

G

GPIO5

GPIO52

WL_OFF#

ODD_DA#

GPIO4

PXS_PWREN

DGPU_HOLD_RST#

USB3RN1_JUSB2<36> USB3RN2_JUSB1<36>

USB3RP1_JUSB2<36> USB3RP2_JUSB1<36>

USB3TN1_JUSB2<36> USB3TN2_JUSB1<36>

USB3TP1_JUSB2<36> USB3TP2_JUSB1<36>

DGPU_HOLD_RST#<24>

PXS_PWREN<26,53>

PCH_PLTRST#<24>

RH144 22_0402_5%

1 2

RH145 22_0402_5%

1 2

@

RH149 0_0402_5%

+3VS

5

UH5

1

P

IN1

4

O

2

IN2

G

SN74AHC1G08DCKR_SC70-5

3

@

WL_OFF#<38>

ODD_DA#<41>

1 2

T60PAD~D @

12

T61PAD~D @ T62PAD~D @ T63PAD~D @

CH101

1 2

PCH_PLTRST#

RH157 10K_0402_5%

USB3RN1_JUSB2 USB3RN2_JUSB1

USB3RP1_JUSB2 USB3RP2_JUSB1

USB3TN1_JUSB2 USB3TN2_JUSB1

USB3TP1_JUSB2 USB3TP2_JUSB1

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

DGPU_HOLD_RST# GPIO52 PXS_PWREN

GPIO51

WL_OFF#

ODD_DA# GPIO4 GPIO5

PCH_PLTRST#

CLK_PCI0 CLK_PCI1 CLK_PCI2 CLK_PCI3 CLK_PCI4

0.1U_0402_25V6K

U

H1E

BG26

P1

T

BJ26

T

P2

BH25

P3

T

BJ16

T

P4

BG16

P5

T

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

BD82HM76-SLJ8E-C1_BGA989~D

R1@

RSVD

3

AY7

R

SVD1

AV7

R

SVD2

AU3

SVD3

R

BG4

R

SVD4

AT10

R

SVD5

BC8

SVD6

R

AU2

RSVD7

AT4

RSVD8

AT3

RSVD9

AT1

RSVD10

AY3

RSVD11

AT5

RSVD12

AV3

RSVD13

AV1

RSVD14

BB1

RSVD15

BA3

RSVD16

BB5

RSVD17

BB3

RSVD18

BB7

RSVD19

BE8

RSVD20

BD4

RSVD21

BF6

RSVD22

AV5

RSVD23

AV10

RSVD24

AT8

RSVD25

AY5

RSVD26

BA2

RSVD27

AT12

RSVD28

BF3

RSVD29

C24

USBP0N

A24

USBP0P

C25

USBP1N

B25

USBP1P

C26

USBP2N

A26

USBP2P

K28

USBP3N

H28

USBP3P

E28

USBP4N

D28

USBP4P

C28

USBP5N

A28

USBP5P

C29

USBP6N

B29

USBP6P

N28

USBP7N

M28

USBP7P

L30

USBP8N

K30

USB

USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

PCI

Intel Anti-The ft Techonlogy

High=Endabled

NV_ALE

Low=Disable(floating)

NV_ALE

USB20_JUSB2_N0 USB20_JUSB2_P0 USB20_JUSB1_N1 USB20_JUSB1_P1 USB20_JUSB3_N2 USB20_JUSB3_P2 USB20_USBDB_N3 USB20_USBDB_P3

USB20_MINI1_N8 USB20_MINI1_P8 USB20_TOUCH_N9 USB20_TOUCH_P9 USB20_CR_N10 USB20_CR_P10 USB20_CAM_N11 USB20_CAM_P11

USBRBIAS

USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#

RH139 1K_0402_5%@

Within 500 mils

1 2

RH143 22.6_0402_1%

1 2

USB20_JUSB2_N0 <36> USB20_JUSB2_P0 <36> USB20_JUSB1_N1 <36> USB20_JUSB1_P1 <36> USB20_JUSB3_N2 <37> USB20_JUSB3_P2 <37> USB20_USBDB_N3 <37> USB20_USBDB_P3 <37>

USB20_MINI1_N8 <38> USB20_MINI1_P8 <38> USB20_TOUCH_N9 <41> USB20_TOUCH_P9 <41> USB20_CR_N10 <34> USB20_CR_P10 <34> USB20_CAM_N11 <21> USB20_CAM_P11 <21>

2

*

+1.8VS

USB Conn JUSB2

USB Conn JUSB1

USB Conn JUSB3

USB Conn 4 (DB)

Mini Card (WLAN)

Touch panel

Card Reader

Camera

USB_OC0# <36> USB_OC1# <36> USB_OC2# <37> USB_OC3# <37>

USB_OC0#

USB_OC1#

USB_OC2#

USB_OC3#

USB_OC6#

USB_OC5#

USB_OC4#

USB_OC7#

SSI: Port 0 USB Conn 1 Port 1 USB Conn 4 (DB) Port 2 USB Conn 2 Port 3 USB Conn 3 Port 4 Mini Card (WLAN) Port 6 Card Reader Port 12 Camera

PT: Port 0 USB Conn JUSB2 Port 1 USB Conn JUSB1 Port 2 USB Conn JUSB3 Port 3 USB Conn 4 (DB) Port 8 Mini Card (WLAN) Port 9 Touch panel Port 10 Card Reader Port 11 Camera

+3V_PCH

12

RH15610K_0402_5%

12

RH15810K_0402_5%

12

RH16010K_0402_5%

12

RH16610K_0402_5%

12

RH16710K_0402_5%

12

RH17010K_0402_5%

12

RH18910K_0402_5%

12

RH21110K_0402_5%

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (4/8) PCI/USB/NVRAM

LA-9101P

1

16 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

+

D D

C C

B B

A A

3V_PCH

12

P

R

H240 1K_0402_5%

RH241 10K_0402_5%

RH245 10K_0402_5%

+3V_PCH +3V_PCH+3V_PCH

12

@

RH244 10K_0402_5%

12

@

RH179 10K_0402_5%

System ID

LOW Entry

HIGH VOSTROVAW10 17''

+3VS

GPIO28

On-Die PLL Voltage Regulator This signal has a weak internal pull up

H：On-Die voltage regulator enab le

*

L：On-Die PLL Vol tage Regulator disable

PCH_GPIO37

FDI TERMINATION VOLTAGE OVERRIDE

LOW - Tx, Rx te rminated

*

to same voltage (DC Coupling Mo de)

+3VS

RH168 1K_0402_5%@

1 2

RH169

CH_LID_SW_IN#

12

PCH_GPIO28

12

PCH_GPIO48

12

GPIO1

PCH_GPIO28

10K_0402_5%

12

@

RH181 10K_0402_5%

12

@

RH225 10K_0402_5%

INSPIRON

PCH_GPIO37

12

@

RH182 10K_0402_5%

PCH_GPIO39PCH_GPIO57 PCH_GPIO38

12

@

RH202 10K_0402_5%

PCH_GPIO57 PCH_GPIO39

VAW00 15''

RH16410K_0402_5%

1 2

RH165 1K_0402_5%@

12

EC_LID_OUT#<40>

PCH_GPIO38

Mainstream

4

EC_SCI#<40>

EC_SMI#<40>

1 2

RH73 0_0402_1%

VGA_PWRGD<53>

KB_DET#

BT_ON#<38>

ODD_DETECT#<41>

U

H1F

T7

B

MBUSY# / GPIO0

RH173 10K_0402_5%@

A42

T

ACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR _CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

BD82HM76-SLJ8E-C1_BGA989~D

R1@

1 2

PCH_GPIO27

GPIO

G

PIO1

PIO6

G

EC_SCI#

EC_SMI#

PCH_LID_SW_IN#EC_LID_OUT#

@

GPIO16

VGA_PWRGD

PCH_GPIO22

KB_DET#

PCH_GPIO27

PCH_GPIO28

BT_ON#

GPIO35

ODD_DETECT#

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

PCH_GPIO48

GPIO49

PCH_GPIO57

PCH_GPIO28 needs to be connected to XDP_FN8 PCH_GPIO35 needs to be connected to XDP_FN9 PCH_GPIO15 needs to be connected to XDP_FN16

Please refer to Huron River Debug Board DG 0.5

NCTF

3

T

ACH4 / GPIO68

T

ACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

A20GATE

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

PECI

NC_1

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

O

DD_EN#

G

PIO69

KB_RST#

H_THERMTRIP#_C

INIT3_3V#

DF_TVS

ODD_EN#

EC_SMI#

O

DD_EN# <41>

64 PAD~D@

T

KB_RST# <40>

H_CPUPWRGD <6>

1 2

RH162390_0402_5%

1 2

RH178

1 2

RH183

2

3VS

+

RH159 10K_0402_5%

1 2

H_THERMTRIP#

12

@

RH163 10K_0402_5%

H_THERMTRIP# <6>

INIT3_3V

This signal has weak internal PU, can't pull low

Due to remove VCCDFERM jumper(PJP66), need to change the power rail to +1.8V_RUN for D12" only

H_SNB_IVB#<6>

+3V_PCH

10K_0402_5%

GATEA20 <40>

PLACE RH150 CL OSE TO THE BRAN CHING POINT ( TO CPU and NV RAM CONNECTOR)

+1.8VS

12

RH152

2.2K_0402_5%

PCH_PECI_RPCH_PECI_R

RH149 need to close to CPU

1 2

RH358 1K_0402_1%

DMI & FDI Termination Voltage

Set to Vss when LOW

Set to Vcc when HIGH

1 2

RH171

1 2

RH172

1 2

RH174

1 2

RH175

1 2

RH242

1 2

RH176

1 2

RH177

1 2

RH180

1 2

RH184

ODD_DETECT#

GPIO16

BT_ON#

KB_RST#

VGA_PWRGD

PCH_GPIO22

GPIO35

GPIO49

GPIO6

DF_TVS

200K_0402_5%

10K_0402_5%

8.2K_0402_5%

10K_0402_5%

1 2

@

RH1610_0402_5%

1

@

CH102

0.1U_0402_10V7K~D

2

Place CH102 close to RH161 & PCH.

DF_TVS

+3VS

1

H_PECI <40,6>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (5/8) GPIO/CPU/MISC

LA-9101P

1

17 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

D D

+1.05VS

1

CH37

CH36

CH35

2

+1.05VS

C C

@

12

+VCCAPLLEXP_R

RH187 0_0603_5%~D

1 2

RH186 0_0603_1%@

@

1 2

1UH_LB2012T1R0M_20%~D

Place CH40 Near BJ22 pin

+1.05VS

1

+3VS

12

RH192

0_0805_1% @

+3VS_VCCA3GBG

1

+1.05VS

B B

CH51

0.1U_0402_10V7K~D

2

@

Place CH53 Near BG6 pin

12

RH194 0_0603_5%~D

1

CH45

2

10U_0805_4VAM~D

1

CH53

2

@

1U_0402_6.3V6K

10U_0805_4VAM~D

LH3

CH46

+1.05VS

1U_0402_6.3V6K

2

1

CH47

2

1U_0402_6.3V6K

1

CH48

2

1U_0402_6.3V6K

RH195

@

1 2

0_0805_1%

+VCCP_VCCDMI

1U_0402_6.3V6K

+1.05VS_VCCDPLLEXP

1

CH42

2

@

1

CH49

2

+1.05VS_VCCAPLL_FDI

+1.05VS_VCCDPLL_FDI

1

CH38

2

1U_0402_6.3V6K

+VCCAPLLEXP

10U_0805_4VAM~D

1U_0402_6.3V6K

+VCCAFDI_VRM

4

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

BD82HM76-SLJ8E-C1_BGA989~D

R1@

UH1G

1300mA

2925mA

POWER

VCC CORE

VCCIO

FDI

1mA

CRTLVDS

1mA

60mA

DMI

20mA

190mA

DFT / SPI HVCMOS

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

20mA

VCCSPI

U48

+VCCADAC

U47

AK36

+VCCA_LVDS

AK37

AM37

AM38

AP36

AP37

V33

+3VS_VCC3_3_6

V34

AT16

+VCCAFDI_VRM

AT20

+VCCP_VCCDMI

AB36

+1.05VS_VCC_DMI_CCI

AG16

AG17

AJ16

AJ17

V1

+3V_VCCPSPI

3

R

eserve for LVDS issue

1

CH32

2

0.01U_0402_16V7K

+VCCTX_LVDS

CH39

0.01U_0402_16V7K

@

1 2

1

CH43

0.1U_0402_10V7K~D

2

1

CH52

2

0.1U_0402_10V7K~D

1

CH54 1U_0402_6.3V6K

2

+

VCCA_LVDS

1

C

H106

@

1U_0402_6.3V6K

2

1

CH34 10U_0805_4VAM~D

CH33

2

RH185 0_0805_5%

0.1U_0402_10V7K~D

Near AP43

1

CH40

0.01U_0402_16V7K

2

RH188

0_0805_1%

+VCCP_VCCDMI

RH191

@

1 2

1

0_0805_1% CH50 1U_0402_6.3V6K

2

+VCCPNAND

1 2

@

1 2

RH196 0_0805_1%

@

RH243 0_0603_5%~D

LH1

4.7UH_LQM18FN4R7M00D_20%

1 2

CH41

1

22U_0805_6.3V6M

2

+3VS

+1.05VS

RH193

0_0805_1%@

12

+3VS

12

0.1UH_MLF1608DR10KT_10%_1608

0.1uH inductor, 200mA

RH190

@

1 2

1

0_0805_1%

CH44

2

1U_0402_6.3V6K

+1.8VS

+3V_PCH

+3VS

2

PCH Power Rail Table

Voltage Rail

V_PROC_IO

+1.8VS

V5REF

V5REF_Sus

Vcc3_3

VccADAC

+3VS

LH2

12

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

1.05

S0 Iccmax Current (A)

0.001

5

0.001

5

0.266

0.001

0.08

1.3

0.042

1

1.05VccIO 2.9 25

1.05VccASW 1.01

3.3VccSPI 0.02

+VCCP

3.3VccDSW 0.003

1.8 0. 19VccpNAND

3.3VccRTC 6 uA

3.3VccSus3 _3

3.3 / 1.5VccSusHDA

0.119

0.01

VccVRM 1.8 / 1.5 0.16

1.05VccCLKDMI

0.02

VccSSC 1 .05 0.095

VccDIFFCLKN 1.05 0.055

VccALVDS 3 .3

0.001

1.8VccTX_L VDS 0.06

+1.5VS +VCCAFDI_VRM

RH197

@

1 2

A A

5

4

0_0603_1%

+VCCAFDI_VRM

1

CH100 1U_0402_6.3V6K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (6/8) PWR

LA-9101P

1

18 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

+

1.05VS

3V_PCH

+

1 2

D D

+1.05VS

RH204

@

1 2

0_0805_5%

C C

+1.05VS

@

RH219 0_0603_5%~D

+1.05VS

1 2

B B

+1.05VS

A A

RH220 0_0603_1%

+1.05VS

@

1 2

RH232 0_0805_1%

H199

R

+VCCAPLL_CPY +3VS_VCC_CLKF33

+3VS

10UH_LBR2012T100M_20%

12

@

RH224 0_0603_1%

+VCCP

1 2

RH227 0_0603_1%

+VCCA_DPLL_L

10UH_LBR2012T100M_20%

0_0603_1%@

LH4

@

10UH_LBR2012T100M_20%

1 2

10U_0805_10V6K

@

CH59

+1.05VS

@

1 2

RH215 0_0805_1%

LH5

1 2

@

+1.05VM_VCCSUS

1

CH80

1U_0402_6.3V6K

2

1 2

@

RH223 0_0603_1%

1 2

@

LH7

10UH_LBR2012T100M_20%

1 2

LH8

1

+1.05VS

2

+3VS_VCC_CLKF33

1

CH74

2

+1.05VS_VCCDIFFCLKN

1

CH82 1U_0402_6.3V6K

2

1

CH84 1U_0402_6.3V6K

2

+V_CPU_IO

1

CH87

4.7U_0603_6.3V6K

2

220U_B2_2.5VM_R35

1

+

2

RH207

1

2

10U_0805_10V6K

+VCCDIFFCLK

CH94

1

2

CH75

1

2

C

0.1U_0402_10V7K~D

1 2

1U_0402_6.3V6K

+1.05VS_VCCDIFFCLKN

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

CH96

R

H198 0_0603_5%~D

H55

@

0.1U_0402_10V7K~D

0_0603_1%@

1

2

1

2

1

CH79

0.1U_0402_10V7K~D

2

+1.05VS_SSCVCC

1

CH85

0.1U_0402_10V7K~D

2

1

CH88

2

0.1U_0402_10V7K~D

220U_B2_2.5VM_R35

CH95

1

+

2

1U_0402_6.3V6K

4

@

CH58

CH65

22U_0805_6.3V6M

CH68

1U_0402_6.3V6K

CH89

0.1U_0402_10V7K~D

1

2

12

1

2

1

CH66

2

22U_0805_6.3V6M

1

CH69

2

1U_0402_6.3V6K

+VCCRTCEXT

1

@

CH86 1U_0402_6.3V6K

2

+RTCVCC

CH97

1U_0402_6.3V6K

+

VCCACLK

+

VCCPDSW

+PCH_VCCDSW

+VCCAPLL_CPY_PCH

+VCCDPLL_CPY

+VCCSUS1

1

@

CH62 1U_0402_6.3V6K

2

1

CH70

2

1U_0402_6.3V6K

+VCCAFDI_VRM

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+VCCSST

+1.05VM_VCCSUS

1

CH90

2

0.1U_0402_10V7K~D

3

U

H1J

AD49

V

CCACLK

T16

CCDSW3_ 3

V

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

VCCRTC

1

BD82HM76-SLJ8E-C1_BGA989~D

CH92

CH91

2

R1@

1U_0402_6.3V6K

0.1U_0402_10V7K~D

1010mA

95mA

1mA

3mA

80mA

OWER

P

Clock and Miscellaneous

55mA

CPURTC

119mA

PCI/GPIO/LPCMISC

SATA USB

HDA

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

1mA

VCCSUS3_3[1]

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCCAPLLSATA

10mA

V

CCIO[29]

V

CCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

1mA

V5REF

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

+

1.05VS_VCCUSBCORE

1

2

+3V_VCCPUSB

1

2

+1.05VS_VCCAUPLL

+PCH_V5REF_SUS

+VCCA_USBSUS

+3V_VCCPSUS_1

+PCH_V5REF_RUN

1

2

+3VS_VCCPPCI

+VCC3_3_2

+VCCAFDI_VRM

+1.05VS_VCC_SATA

+VCCSUSHDA

1

CH930.1U_0402_10V7K~D

2

C

H56

1U_0402_6.3V6K

+3V_VCCAUBG

CH60

0.1U_0402_10V7K~D

1 2

RH209 0_0603_1%

+3V_VCCPSUS

CH71 1U_0402_6.3V6K

+3VS_VCCPCORE

RH217

1 2

1

CH77

0.1U_0402_10V7K~D

2

+1.05VS_SATA3

+VCCSATAPLL

+VCCAFDI_VRM

+1.05VS_VCC_SATA

@

RH231

1 2

@

R

H200 0_0603_1%

1 2

RH205 0_0603_1%

RH206 0_0603_1%

1

CH61

2

@

0.1U_0402_10V7K~D

1 2

RH210 0_0603_1%

1

CH67

2

0.1U_0402_10V7K~D

1 2

RH213 0_0603_1%

RH214 0_0805_1%

1

CH73

0.1U_0402_10V7K~D

2

+3VS

+1.05VS_SATA3

0_0603_1%@

1 2

1

CH83

2

+1.05VS

1U_0402_6.3V6K

1 2

RH229 0_0603_1%

12

150_0402_1%

@

1 2

@

1 2

1

2

RH222

2

+

1.05VS

+3V_PCH

@

+1.05VS

+3V_PCH

+3VS

@

1 2

@

RH216 0_0603_1%

CH76

0.1U_0402_10V7K~D

@

1 2

RH218 0_0805_1%

1

CH78 1U_0402_6.3V6K

2

+1.05VS

0_0805_1%@

@

V

CC3_3 = 266mA detal waiting for newest spec

VCCDMI = 42mA detal waiting for newest spec

5VALW

+

+3V_PCH

+VCCA_USBSUS

+3V_PCH

+3VS

LH6

@

10UH_LBR2012T100M_20%

1 2

1

CH81

@

10U_0805_10V6K

2

+3V_PCH

1 2

@

H201 0_0603_1%

R

PCH_PWR_EN#<35>

100_0402_1%

1

@

CH63

2

1U_0402_6.3V6K

100_0402_1%

+1.05VS

+VCCSATAPLL_R

If it support 3.3V audio sign als POP:RH244 Depop RH245 / R H246

If it support 1 .5V audio signa ls POP:RH245 / RH2 46 Depop R244

Q

H5

AO3419L_SOT23-3

S

12

RH208

12

RH212

@

RH221

0_0805_5%

D

G

2

+3V_PCH+5V_PCH

21

1

2

+3VS+5VS

21

1

2

12

5V_PCH

+

13

1

CH57

2

0.1U_0402_10V7K~D

DH2 RB751S40T1_SOD523-2~D

+PCH_V5REF_SUS

CH64

0.1U_0603_25V7K

DH3 RB751S40T1_SOD523-2~D

+PCH_V5REF_RUN

CH72 1U_0603_10V6K

+1.05VS

1

12

RH203

20K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

PCH (7/8) PWR

LA-9101P

1

of

19 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

U

H1H

H5

V

D D

C C

B B

SS[0]

AA17

V

SS[1]

AA2

SS[2]

V

AA3

V

SS[3]

AA33

SS[4]

V

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

BD82HM76-SLJ8E-C1_BGA989~D

R1@

V

SS[80] SS[81]

V V

SS[82] SS[83]

V VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

4

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

3

U

H1I

AY4

V

SS[159]

AY42

V

SS[160]

AY46

V

SS[161]

AY8

V

SS[162]

B11

V

SS[163]

B15

V

SS[164]

B19

SS[165]

V

B23

V

SS[166]

B27

SS[167]

V

B31

V

SS[168]

B35

SS[169]

V

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

BD82HM76-SLJ8E-C1_BGA989~D

R1@

V

SS[259]

V

SS[260]

V

SS[261]

V

SS[262]

V

SS[263]

V

SS[264] SS[265]

V V

SS[266] SS[267]

V V

SS[268] SS[269]

V VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

2

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (8/8) VSS

LA-9101P

1

20 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

LCD PWR CTRL

+

LCDVDD

D D

2N7002BKW_SOT323-3~D

DV7

PCH_ENVDD<15>

EC_ENVDD<40>

C C

PCH_ENVDD

EC_ENVDD

2

3

BAT54C-7-F_SOT23-3

D

Q

V3

S

1

10K_0402_5%

LCD backlight PWR CTRL

R

V14

100_0402_1%

1 2 13

RV18

+

5VALW

R

V15

47K_0402_5%

1 2

R

V17

2

G

13

D

QV5 BSS138_SOT23~D

S

56K_0402_5%

12

2

G

12

4

+

3VS

W

=60mils

S

Q

V4

2

CV19

0.1U_0402_16V7K

1

2

AO3419L_SOT23-3

G

D

+

+LCDVDD

CV20

4.7U_0805_10V4Z

LCDVDD

W=60mils

1

CV21

0.1U_0402_16V7K

2

1 3

1

2

3

KOFF#

B

KOFF#<40>

SB20_CAM_P11<16>

U

USB20_CAM_N11<16>

MIC_DATA<33> MIC_CLK<33>

CE_EN<40>

DBC_EN<40>

B

CH751H-40PT_SOD323-2~D

V6

D

2 1

CH751H-40PT_SOD323-2~D

MIC_DATA MIC_CLK MIC_CLK_R

RV30

0_0402_5%

1 2

CE_EN

RV62 0_0402_5%

1 2

DBC_EN DBC_EN_R

RV99 0_0402_5%

+

@

D

V5

21

WCM-2012HS-900T_4P

4

1

LV24

EMC@

1 2

RV210 0_0402_5%@

1 2

RV208 0_0402_5%@

12

1

@

CV29 470P_0402_50V7K~D

2

@

0_0402_5%

3VS

12

R

V13

4.7K_0402_5%

3

2

RV100

12

ISPOFF#

D

10K_0402_5% R

V16

CE_EN_R

12

@

RV216 0_0402_5%

U

SB20_CAM_P11_R

USB20_CAM_N11_R

2

5P_0402_50V8C @

CE_EN_R

CE_EN_R only fo r reserve.

DBC_EN_R

LVDS_DDC_CLK<15> LVDS_DDC_DATA<15>

+LCDVDD+3VS

0.1U_0402_16V7K

CV23

CV22

1

2

5P_0402_50V8C

+3VS_CAM

RV19 0_0402_1%@ RV20 0_0402_1%@

10U_0805_10V6K

1

2

@

1 2

CV24

C

V17

V18

C

L

VDS_A0-<15> VDS_A0+<15>

L

VDS_A1-<15>

L

VDS_A1+<15>

VDS_A2-<15>

L L

VDS_A2+<15>

L

VDS_ACLK-<15>

L

VDS_ACLK+<15>

L

VDS_B0-<15> VDS_B0+<15>

L

LVDS_B1-<15> LVDS_B1+<15>

LVDS_B2-<15> LVDS_B2+<15>

LVDS_BCLK-<15> LVDS_BCLK+<15>

USB20_CAM_P11_R USB20_CAM_N11_R

MIC_CLK_R

MIC_DATA

LCD_TEST<40>

12 12

W=60mils

+INV_PWR_SRC

VDS_A0-

L

VDS_A0+

L

VDS_A1-

L

VDS_A1+

L

VDS_A2VDS_A2+

L

VDS_ACLK-

L L

VDS_ACLK+

L

VDS_B0-

L

VDS_B0+

LVDS_B1LVDS_B1+

LVDS_B2LVDS_B2+

LVDS_BCLKLVDS_BCLK+

+LCDVDD

+3VS

LCD_TEST EDID_CLK_LCD EDID_DATA_LCD INV_PWM DISPOFF#

1

VDS Conn.

L

J

LVDS

1

2

3

4

5

6

7

8

9

10

0

1

11

1

12

2

1

13

1

3

14

4

1

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

STARC_107K40-000001-G2

CONN@

SP01000XE00

41

G

1

42

G

2

43

G

3

44

G

4

45

G

5

46

G

6

60mil

CV25

1000P_0402_50V7K

1

2

EN_INVPWR<40>

+LCDVDD

B B

1 2

RV28 0_0402_1%

@

RV31 0_0402_5%

@

+LCDVDD_R

12

2

G

Webcam PWR CTRL

+3VS

12

RV34

100K_0402_5%

A A

CMOS_ON#<40>

@

RV209

47K_0402_5%

0.1U_0402_16V7K @

5

QV6 SI3457CDV-T1-E3_TSOP6~D

B+

RV25

100K_0402_5%

12

PWR_SRC_ON

12

RV26 100K_0402_5%

13

D

QV7 2N7002BKW_SOT323-3~D

S

+3VS +3VS_CAM

SI2301CDS-T1-GE3_SOT23-3

CV319

@

12

1

2

@

CV31

D

6

S

4 5

2 1

G

3

B+ +INV_PWR_SRC

RV231

1 2

@

0_0603_1%

QV8

S

D

1000P_0402_50V7K

@

G

2

1

+INV_PWR_SRC_R

1

CV26

0.1U_0603_50V_X7R

2

RV27 0_0805_5%

+3VS_CAM

13

60mil

@

1 2

@

1 2

RV24 0_0805_1%

4

+INV_PWR_SRC

5P_0402_50V8C

@

VGA_PWM<15>

1 2

RV29 0_0402_1%

100K_0402_5%

* Reserved for LCD sequence tuning

+INV_PWR_SRC

+LCDVDD_R

RV33

100K_0402_5%

@

QV9A

2

+5VALW

12

@

12

61

RV32 820_0805_1%

3

@

QV9B

5

4

2N7002DW-7-F_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

RV230

@

CV27

1 2

LVDS_BCLK-

@

CV28

1 2

LVDS_BCLK+

INV_PWM

12

1

CV30

@

680P_0402_50V7K

2

2012/08/22 2013/08/31

Place close to JLVDS

* Reserved for EMI/ESD/RF need to close to JLVDS

+5VS

Compal Secret Data

Deciphered Date

2

MIC_CLK_R

MIC_DATA

DV8

6

V I/O

5

V BUS

4

V I/O

IP4223CZ6_SO6~D

@

Ground

1

V I/O

USB20_CAM_P11_R

2

3

USB20_CAM_N11_R

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

LVDS/webcam

LA-9101P

1

0.4

21 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

W

=40mils

2

1

D D

12

HDMI_A3N_VGA<15> HDMI_A3P_VGA<15>

HDMI_A0N_VGA<15> HDMI_A0P_VGA<15>

HDMI_A1N_VGA<15> HDMI_A1P_VGA<15>

HDMI_A2N_VGA<15> HDMI_A2P_VGA<15>

C C

B B

CV32 0.1U_0402_10V7K~D

12

CV33 0.1U_0402_10V7K~D

12

CV36 0.1U_0402_10V7K~D

12

CV37 0.1U_0402_10V7K~D

12

CV38 0.1U_0402_10V7K~D

12

CV39 0.1U_0402_10V7K~D

12

CV40 0.1U_0402_10V7K~D

12

CV41 0.1U_0402_10V7K~D

TMDS_TXCN TMDS_TXCP

TMDS_TX0N TMDS_TX0P

TMDS_TX1N TMDS_TX1P

TMDS_TX2N TMDS_TX2P

TMDS_TXCP

TMDS_TX0N T MDS_L_TX0N

TMDS_TX0P

RV43 680_0402_1%

RV45 680_0402_1%

RV44 680_0402_1%

RV42 680_0402_1%

12

0_0402_1%

+3VS

1 2

RV51

100K_0402_5%

RV46 680_0402_1%

12

@

RV53

TMDS_TXCN

TMDS_TXCP

TMDS_TX0N

TMDS_TX0P

TMDS_TX1N

TMDS_TX1P

TMDS_TX2N

TMDS_TX2P

RV48 680_0402_1%

RV47 680_0402_1%

RV49 680_0402_1%

12

TMDS_TX1N

TMDS_TX1P

13

D

2

QV11

G

12

2N7002_SOT23-3

S

CV358 100P_0402_50V8J@

CV360 100P_0402_50V8J@

CV362 100P_0402_50V8J@

CV363 100P_0402_50V8J@

CV359 100P_0402_50V8J@

CV357 100P_0402_50V8J@

CV361 100P_0402_50V8J@

CV364 100P_0402_50V8J@

1 2

TMDS_TX2P TMDS_L_TX2P

TMDS_TX2N

Place close to JHDMI1

1 2

V35 0_0402_5%@

R

WCM-2012HS-900T_4P

1

4

LV7

1 2

RV37 0_0402_5%@

1 2

RV38 0_0402_5%@

WCM-2012HS-900T_4P

1

4

LV8

1 2

RV40 0_0402_5%@

1 2

RV41 0_0402_5%@

WCM-2012HS-900T_4P

1

4

LV9

1 2

RV50 0_0402_5%@

1 2

RV52 0_0402_5%@

WCM-2012HS-900T_4P

1

4

LV10

1 2

RV54 0_0402_5%@

EMC@

2

3

2

3

2

3

2

3

TMDS_L_TXCNTMDS_TXCN

TMDS_L_TXCP

TMDS_L_TX0P

TMDS_L_TX1N

TMDS_L_TX1P

TMDS_L_TX2N

TMDS_L_TXCN

TMDS_L_TXCP

TMDS_L_TX0N

TMDS_L_TX0P

TMDS_L_TX1N

TMDS_L_TX1P

TMDS_L_TX2N

TMDS_L_TX2P

V36 0_1206_5%~D

R

12

D

V9

2 1

+5VS

3

NC

1 2

@

BAT1000-7-F_SOT23-3~D

CV349 3.3P_0402_50V8C~D

CV350 3.3P_0402_50V8C~D

CV351 3.3P_0402_50V8C~D

CV352 3.3P_0402_50V8C~D

CV353 3.3P_0402_50V8C~D

CV354 3.3P_0402_50V8C~D

CV355 3.3P_0402_50V8C~D

CV356 3.3P_0402_50V8C~D

F

V1

12

1.5A_6V_1206L150PR~D

HDMI_HPLUG

DDC_DAT_HDMI DDC_CLK_HDMI

TMDS_L_TXCN

TMDS_L_TXCP TMDS_L_TX0N

TMDS_L_TX0P TMDS_L_TX1N

TMDS_L_TX1P TMDS_L_TX2N

TMDS_L_TX2P

+3VS

12

RV39 10K_0402_5%

19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

DC232000B00

VDISPLAY_VCC

+

CV34

1

CV35

2

10U_0603_6.3V6M

0.1U_0402_10V7K~D

JHDMI

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CK-

GND

CK_shield

GND

CK+

GND

D0-

GND D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

LOTES_ABA-HDM-022-K01

CONN@

20 21 22 23

20110805 EMI ADD20111024 EMI ADD

+3VS

+5VS

+3VS

@

DV10

QV12A

2

DMN66D0LDW-7_SOT363-6

61

PCH_SDVO_CTRLCLK<15>

PCH_SDVO_CTRLDATA<15>

A A

5

4

QV12B

DMN66D0LDW-7_SOT363-6

DDC_CLK_HDMI +5V_HDMI_DDC

3

DDC_DAT_HDMI

RV58 2.2K_0402_5%

RV60 2.2K_0402_5%

RB751V-40_SOD323-2

1 2

5

4

12

@

0_0402_1% RV56

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MMBT3904_NL_SOT23-3

HDMI_DET<15>

2012/08/22 2013/08/31

C

QV13

E

3 1

12

RV55 100K_0402_5%

Compal Secret Data

Deciphered Date

2

RV57

1 2

2

B

150K_0402_5%

@

RV59

200K_0402_5%

1

1 2

2

+3VS

HDMI_HPLUG

1

CV42 220P_0402_50V8J

2

DV11 BAV99-7-F_SOT23-3

@

3

ROYALTY HDMI W/LOGO46@

Part Number Description

HDMI W/Logo:RO0000002HM

RO0000002HM

Compal Electronics, Inc.

Title

HDMI

Size Document Number Rev

LA-9101P

Date: Sheet of

1

22 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

D D

4

UG1

3

GCLKUMA@

2

1

SLG3NB244VTR TQFN 16P CLK GEN

SLG3NB244VTR SA000057I00 Intel-UMA

+RTCBATT

12

R787 330_0402_5%

+LAN_IO

0.1U_0402_16V7K

1

2

GCLK@

C8

+3VLP

0.1U_0402_16V7K

2

C5

GCLK@

22U_0805_6.3V6M

GCLK@

1

C9

2

+3VLP

+3VALW

+1.8VGS

+LAN_IO

+VCCP

1

CLK_X1 CLK_X2

SLG3NB274VTR_TQFN16_2X3

reserved for sw ing level adjus tment (close to U2)

+VCCP

GCLK@

12

GCLK@

12

+1.8VGS

1

C6

2

0.1U_0402_16V7K

Y1

1

OSC

3

OSC

25MHZ_10PF_7V25000014

0.1U_0402_16V7K

GCLK@

GND

1

2

GCLK@

C7

2

4

Place close to UG1.8

CLK_X1

CLK_X2

C C

Depop if GCLK with UMA

C11

12P_0402_50V8J~D

C12

B B

12P_0402_50V8J~D

SLG3NB300VTR SA00005RS00 Intel-DIS

GCLK@

UG1

10

VBAT

VDD_RTC_OUT

15

+V3.3A

2

VDD

VDDIO_27M1127MHz

8

VDDIO_25M_A

3

VDDIO_25M_B

1

XTAL_IN

16

XTAL_OUT

GCLKDIS@

R784 0_0402_5%

1 2

LAN_X1_R

@

4

25MHz_A

25MHz_B

GND1

GND2

7

13

GND3

32kHz

14

9

12

6

5

GND4

17

+RTCVCC

12

R788 0_0402_5%

1

C10

2

GCLK@

1 2

VGA_X1_R

10_0402_1%

1 2

LAN_X1_R

GCLK@

33_0402_5%

1 2

PCH_X1_R

0_0402_5%

GCLK@

@

2.2U_0603_6.3V6K

GCLK@

PCH_RTCX1_R <13>

R785

R782

R783

VGA_X1 <25>

PCH_X1 <14>

1

GCLK@

C14 5P_0402_50V8C

2

LAN_X1 <14>

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

GCLK

Size Document Number Rev

LA-9101P

Date: Sheet of

1

57Wednesday, August 29, 2012

23

57Wednesday, August 29, 2012

23

57Wednesday, August 29, 2012

23

0.4

CyberForum.ru

5

4

3

2

1

D D

EG_HTX_C_GRX_P[7..0]

P

EG_HTX_C_GRX_P[7..0]<5>

PEG_HTX_C_GRX_N[7..0]<5>

C C

B B

CLK_PEG_VGA<14> CLK_PEG_VGA#<14>

P

PEG_HTX_C_GRX_N[7..0]

PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0

PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1

PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N2

PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_N3

PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_N4

PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_N5

PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_N6

PEG_HTX_C_GRX_N7

DIS@

1 2

RV64 1K_0402_5%

GPU_RST#

CLK_PEG_VGA CLK_PEG_VGA#

12

DIS@

RV66 100K_0402_5%

G

FX PCIE LANE REVERSAL

U

V1A

AA38

PCIE_RX0P

Y37

PCIE_RX0N

Y35

PCIE_RX1P

W36

PCIE_RX1N

W38

PCIE_RX2P

V37

PCIE_RX2N

V35

PCIE_RX3P

U36

PCIE_RX3N

U38

PCIE_RX4P

T37

PCIE_RX4N

T35

PCIE_RX5P

R36

PCIE_RX5N

R38

PCIE_RX6P

P37

PCIE_RX6N

P35

PCIE_RX7P

N36

PCIE_RX7N

N38

PCIE_RX8P

M37

PCIE_RX8N

M35

PCIE_RX9P

L36

PCIE_RX9N

L38

PCIE_RX10P

K37

PCIE_RX10N

K35

PCIE_RX11P

J36

PCIE_RX11N

J38

PCIE_RX12P

H37

PCIE_RX12N

H35

PCIE_RX13P

G36

PCIE_RX13N

G38

PCIE_RX14P

F37

PCIE_RX14N

F35

PCIE_RX15P

E37

PCIE_RX15N

AB35

PCIE_REFCLKP

AA36

PCIE_REFCLKN

AH16

PWRGOOD

AA30

PERSTB

216-0833000-A11-THAMES-XT-M2_FCBGA962~D

THAMES XT M2

CLOCK

THR1@

S

A00004WI0L

PCIE_TX0P

PCIE_TX0N

PCIE_TX1P

PCIE_TX1N

PCIE_TX2P

PCIE_TX2N

PCIE_TX3P

PCIE_TX3N

PCIE_TX4P

PCI EXPRESS INTERFACE

PCIE_TX4N

PCIE_TX5P

PCIE_TX5N

PCIE_TX6P

PCIE_TX6N

PCIE_TX7P

PCIE_TX7N

PCIE_TX8P

PCIE_TX8N

PCIE_TX9P

PCIE_TX9N

PCIE_TX10P PCIE_TX10N

PCIE_TX11P PCIE_TX11N

PCIE_TX12P PCIE_TX12N

PCIE_TX13P PCIE_TX13N

PCIE_TX14P PCIE_TX14N

PCIE_TX15P PCIE_TX15N

CALIBRATION

PCIE_CALRP

PCIE_CALRN

EG_GTX_C_HRX_P[7..0]

P

PEG_GTX_C_HRX_N[7..0]

Y33

PCIE_CRX_C_GTX_P0

Y32

PCIE_CRX_C_GTX_N0

W33

PCIE_CRX_C_GTX_P1

W32

PCIE_CRX_C_GTX_N1 PEG_GTX_C_HRX_N1

U33

PCIE_CRX_C_GTX_P2

U32

PCIE_CRX_C_GTX_N2

U30

PCIE_CRX_C_GTX_P3

U29

PCIE_CRX_C_GTX_N3 PEG_GTX_C_HRX_N3

T33

PCIE_CRX_C_GTX_P4

T32

PCIE_CRX_C_GTX_N4 PEG_GTX_C_HRX_N4

T30

PCIE_CRX_C_GTX_P5

T29

PCIE_CRX_C_GTX_N5 PEG_GTX_C_HRX_N5

P33

PCIE_CRX_C_GTX_P6

P32

PCIE_CRX_C_GTX_N6

P30

PCIE_CRX_C_GTX_P7

P29

PCIE_CRX_C_GTX_N7 PEG_GTX_C_HRX_N7

N33 N32

N30 N29

L33 L32

L30 L29

K33 K32

J33 J32

K30 K29

H33 H32

Y30

Y29

Install 2K for Thames/Seymour

1 2

RV198 1.69K_0402_1%~DMS@

1 2

1 2 1 2

PEG_GTX_C_HRX_P[7..0] <5>

PEG_GTX_C_HRX_N[7..0] <5>

12 12

+1.0VGS

RV631.27K_0402_1% TH@

RV652K_0402_1% TH@

+1.0VGS

RV2031K_0402_1% MS@

CV43220nF_0402_16V7K DIS@ CV44220nF_0402_16V7K DIS@

CV45220nF_0402_16V7K DIS@ CV46220nF_0402_16V7K DIS@

CV47220nF_0402_16V7K DIS@ CV48220nF_0402_16V7K DIS@

CV49220nF_0402_16V7K DIS@ CV50220nF_0402_16V7K DIS@

CV51220nF_0402_16V7K DIS@ CV52220nF_0402_16V7K DIS@

CV53220nF_0402_16V7K DIS@ CV54220nF_0402_16V7K DIS@

CV55220nF_0402_16V7K DIS@ CV56220nF_0402_16V7K DIS@

CV57220nF_0402_16V7K DIS@ CV58220nF_0402_16V7K DIS@

PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0

PEG_GTX_C_HRX_P1

PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2

PEG_GTX_C_HRX_P3

PEG_GTX_C_HRX_P4

PEG_GTX_C_HRX_P5

PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_N6

PEG_GTX_C_HRX_P7PEG_HTX_C_GRX_P7

LVDS Interface

UV1G

LVDS CONTROL

TXCLK_UP_DPF3 P TXCLK_UN_DP F3N

TXOUT_U0P_D PF2P TXOUT_U0N_D PF2N

TXOUT_U1P_D PF1P TXOUT_U1N_D PF1N

TXOUT_U2P_D PF0P TXOUT_U2N_D PF0N

LVTMDP

TXCLK_LP_DPE 3P

TXCLK_LN_DP E3N

TXOUT_L0P_D PE2P TXOUT_L0N_D PE2N

TXOUT_L1P_D PE1P TXOUT_L1N_D PE1N

TXOUT_L2P_D PE0P TXOUT_L2N_D PE0N

216-0833000-A11-THAMES-XT-M2_FCBGA962~D

THR1@

RV61 0_0402_5%@

+3VGS

5

DGPU_HOLD_RST#<16>

PCH_PLTRST#<16>

1

IN1

2

IN2

3

AK27

VARY_BL

AJ27

DIGON

AK35 AL36

AJ38 AK37

AH35 AJ36

AG38 AH37

AF35

TXOUT_U3P

AG36

TXOUT_U3N

AP34 AR34

AW37 AU35

AR37 AU39

AP35 AR35

AN36

TXOUT_L3P

AP37

TXOUT_L3N

12

VCC

4

GPU_RST#

OUT

GND

UV13

MC74VHC1G08DFT2G_SC70-5

DIS@

Place CV326 Close to UV13

+3VGS

2

CV326

0.1U_0402_25V6K

1

DIS@

UV1

THR3@

SA00004WI1L

216-0833000-A11-THAMES-XT-M2_FCBGA962~D

UV1

MSR1@

CHR1@

SA00005X10L

UV1

Chelsea Pro

CHR3@

A A

MARS-PRO_FCBGA962~D

MARS Pro

UV1

Chelsea Pro

5

4

MSR3@

SA00005X10L

MARS-PRO_FCBGA962~D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

ATI_ThamesXT_M2_PCIE/LVDS

LA-9101P

1

24 57Wednesday, August 29, 2012

0.4

CyberForum.ru

icron1GR3@

6

64MX16 (1G)

128Mx16 (2G)

*

128Mx16 (2G)

+3VGS

LV14

DIS@

LV15

DIS@

BLM15BD121SN1D_0402

RV97 1M_0402_5%

YV1

27MHZ_10PF_7V2700005 0

3

12

GND

4

5

1.8VGS

+

4MX16 (1G)

STRAPS

1 2 1 2 1 2

1 2

1 2 1 2

1 2 1 2 1 2

1 2

(Thames 75mA)

12

1

CV82

2

DIS@

10U_0603_6.3V6M

(Thames 125mA)

0.935V@ Mars Pro

12

1

CV86

2

DIS@

10U_0603_6.3V6M

XTALDIS@

XTALINXTALOUT

XTALDIS@

1

GND

2

PEG_A_CLKRQ#<14 >

5

V67 10K_0402_5%X76@

R

1 2

V68 10K_0402_5%X76@

R

1 2

V69 10K_0402_5%X76@

R

1 2

R

1 2

V70 10K_0402_5%X76@

R

1 2

V71 10K_0402_5%X76@

R

1 2

V72 10K_0402_5%X76@

Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2

K

4W1G1646G-BC11

Samsung 1GB SA00004GS0L(R1) SA00004GS1L(R3)

H

5TQ1G63DFR-11C

Hynix 1GB SA000041S3L

MT41J64M16JT-107G:G

Micron 1GB SA00004Y20L(R1) SA00004Y21L(R3)

K4W2G1646E-BC11

Samsung 2GB SA00005SH0L(R1) SA00005SH1L(R3)

H5TQ2G63DFR-11C

Hynix 2GB SA00003YO2L(R1) SA00003YO3L(R3)

H5TQ2G63DFR-11C

Micron 2GB SA00005XB0L(R1) SA00005XB1L(R3)

VGA_SMB_DA2

VGA_SMB_CK2

RV7510K_0402_5% TH@

GPU_GPIO0

RV7610K_0402_5% TH@

GPU_GPIO1

RV7710K_0402_5% @

GPU_GPIO2

RV7810K_0402_5% @

AC_BATT

RV7910K_0402_5% @

GPU_GPIO8

RV8010K_0402_5% @

GPU_GPIO9

RV8110K_0402_5% TH@

GPU_GPIO11

RV8210K_0402_5% @

GPU_GPIO12

RV8310K_0402_5% @

GPU_GPIO13

RV8510K_0402_5% @

GPIO24_TRSTB

RV8610K_0402_5% @

GPIO25_TDI

RV8710K_0402_5% @

GPIO27_TMS

RV8810K_0402_5% @

GPIO26_TCK

+DPLL_PVDD

1

CV83

CV84

2

1U_0402_6.3V6K

DIS@

0.1U_0402_16V7K

+DPLL_VDDC

1

CV87

CV88

2

1U_0402_6.3V6K

DIS@

0.1U_0402_16V7K

1

12

CV95

10P_0402_50V8J

XTALDIS@

Need to CHECK CIS symbol

V

RAM_ID0

RAM_ID1

V

RAM_ID2

RV69RV68

1

0 0

RV67 RV70 RV72

0

1

RV67 RV69 RV71

1 1

RV68

RV69 RV71

0 1 1

RV67 RV70 RV71

01

TH@

1 2

RV251 0_0402_5%

TH@

1 2

RV252 0_0402_5%

+1.8VGS

DIS@

RV93 49 9_0402_1%

DIS@

RV95 24 9_0402_1%

CV81 0.1U_0402_16V7K

DIS@

+3VGS

12

RV235 10K_0402_5%

@

TS_FDO

12

RV236 10K_0402_5%

MS@

Add 12/6 for MLPS

(Thames 5mA)

DIS@

LV16

1 2

+1.8VGS

BLM15BD121SN1D_0402

+3VGS

2

G

1 3

D

S

@

2N7002_SOT23-3

QV28

RV200

12

0_0402_5%

@

RV72

0

1

VDDCI_VID<54>

GPU_VID5<53>

GPU_VID4<53> GPU_VID3<53> GPU_VID2<53>

RV89 10K_040 2_5%@

1 2

GPU_VID1<53>

T78

T79

0.60 V level, Please VREFG Divider ans cap close to ASIC

12

1 2

RV248

0_0402_1%

XTALIN Voltage Swing: 1.8 V

(1.8V@20mA TSVDD)

CV91

DIS@

12

RV199

2.2K_0402_5%

@

VGA_CLKREQ#_R

Z

S

Z

X

Z

X

Z

X7644031L12

ZZZ1

X7644031L13

CV94

10P_0402_50V8J

XTALDIS@

S

ZZ4

am1GR3@

7644031L10

M

ZZ3

7644031L11

ZZ2

am2GR3@

S

Hyn2GR3@

+1.8VGS

BLM15BD121SN1D_0402

+1.0VGS

ZZ8

am1GR1@

X

7644031L01

Z

M

ZZ5

icron1GR1@

X

7644031L02

D D

ZZ7

am2GR1@

Z

S

X7644031L05

ZZZ6

Hyn2GR1@

X7644031L06

C C

B B

A A

@

1

2

10U_0603_6.3V6M

V

RAM_ID0 RAM_ID1

V V

RAM_ID2

PT

GPU_GPIO0 GPU_GPIO1 GPU_GPIO2 VGA_SMB_DA2_R VGA_SMB_CK2_R AC_BATT VDDCI_VID

GPU_GPIO8 GPU_GPIO9 GPU_VID5 GPU_GPIO11 GPU_GPIO12 GPU_GPIO13 GPU_VID4 GPU_VID3 GPU_VID2 THM_ALERT#

GPU_VID1

GPIO21_BBEN

VGA_CLKREQ#_R

GPIO24_TRSTB GPIO25_TDI GPIO26_TCK GPIO27_TMS

GPIO28_TDO

20mil

+VREFG_GPU

20mil

+DPLL_PVDD

DPLL_PVSS

20mil

+DPLL_VDDC

XTALIN XTALOUT

GPU_THERMAL_D+

GPU_THERMAL_D-

TS_FDO

+TSVDD

1

CV92

CV93

2

DIS@

1U_0402_6.3V6K

4

U

V1B

MUTI GFX

AR8

D

VPCNTL_MVP_0

AU8

D

VPCNTL_MVP_1

AP8

D

VPCNTL_0

AW8

D

VPCNTL_1

AR3

VPCNTL_2

D

AR1

D

VPCLK

AU1

D

VPDATA_0

AU3

VPDATA_1

D

AW3

D

VPDATA_2

AP6

D

VPDATA_3

AW5

VPDATA_4

D

AU5

D

VPDATA_5

AR6

D

VPDATA_6

AW6

VPDATA_7

D

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

DVPDATA_17

AV11

DVPDATA_18

AT11

DVPDATA_19

AR12

DVPDATA_20

AW12

DVPDATA_21

AU12

DVPDATA_22

AP12

DVPDATA_23

AJ21

SWAPLOCKA

AK21

SWAPLOCKB

I2C

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH23

GPIO_3_SMBDATA

AJ23

GPIO_4_SMBCLK

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18_HPD3

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21_BB_EN

AK13

GPIO_22_ROMCSB

AN13

GPIO_23_CLKREQB

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_HPD4

AH26

GENERICF_HPD5

AH24

GENERICG_HPD6

AK24

HPD1

AH13

VREFG

AM32

DPLL_PVDD

AN32

DPLL_PVSS

PLL/CLOCK

AN31

DPLL_VDDC

AV33

XTALIN

AU34

XTALOUT

AW34

XO_IN

AW35

XO_IN2

AF29

DPLUS

AG29

DMINUS

AK32

TS_FDO

AL31

TS_A/NC

10mil

AJ32

TSVDD

AJ33

TSVSS

216-0833000-A1 1-THAMES-XT-M2_FCBGA962~D

THR1@

0.1U_0402_16V7K

VGA_X1<23>

4

D

PA

DPB

DPC

DPD

DAC1

DAC2

H2SYNC/GENLK_CLK

V2SYNC/GENLK_VSYNC

DDC/AUX

THERMAL

close to YV1

1 2

RV232 0_04 02_5%

GCLKDIS@

XCAP_DPA3P

T T

XCAM_DPA3N

T

X0P_DPA2P

T

X0M_DPA2N

X1P_DPA1P

T

X1M_DPA1N

T

X2P_DPA0P

T

X2M_DPA0N

T

XCBP_DPB3P XCBM_DPB3N

T

X3P_DPB2P

X3M_DPB2N

T

X4P_DPB1P

X4M_DPB1N

T

X5P_DPB0P

X5M_DPB0N

T

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P TX0M_DPC2N

TX1P_DPC1P TX1M_DPC1N

TX2P_DPC0P TX2M_DPC0N

TXCDP_DPD3P

TXCDM_DPD3N

TX3P_DPD2P TX3M_DPD2N

TX4P_DPD1P TX4M_DPD1N

TX5P_DPD0P TX5M_DPD0N

HSYNC VSYNC

AVSSQ

VDD1DI

VSS1DI

R2/NC

R2B/NC

G2/NC

G2B/NC

B2/NC

B2B/NC

COMP/NC

VDD2DI/NC VSS2DI/NC

A2VDD/NC

A2VDDQ/NC

A2VSSQ/TSVSSQ

R2SET/NC

DDC1CLK

DDC1DATA

AUX1P AUX1N

DDC2CLK

DDC2DATA

AUX2P AUX2N

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

DDCCLK_AUX7P

DDCDATA_AUX7N

XTALIN

3

AU24 AV23

AT25 AR24

AU26 AV25

AT27 AR26

AR30 AT29

AV31 AU30

AR32 AT31

AT33 AU32

AU14 AV13

AT15 AR14

AU16 AV15

AT17 AR16

AU20 AT19

AT21 AR20

AU22 AV21

AT23 AR22

AD39

R

AD37

RB

AE36

G

AD35

GB

AF37

B

AE38

BB

AC36 AC38

RV84 499_04 02_1%DIS@

1 2

AB34

RSET

10mil

AD34

+AVDD

AVDD

AE34

10mil

AC33

+VDD1DI

AC34

AC30 AC31

AD30 AD31

PS_1

0.1U_0402_16V7K

AF30 AF31

AC32

C/NC

AD32

Y/NC

AF32

AD29

GENLK_CLK

AC29

GENLK_VSYNC

AG31

PS_2

AG32

AG33

AD33

PS_3

AF33

AA29

AM26 AN26

AM27 AL27

AM19 AL19

AN20 AM20

AL30 AM30

AL29 AM29

AN21 AM21

AJ30 AJ31

AK30 AK29

2N7002DW-7-F_SOT363-6

ACIN<15,40,45,46 >

ACIN_65W<40>

(1.8V@65mA AVDD)

(1.8V@100mA VDD1DI)

BLM15BD121SN1D_0402

1

CV78

CV80

CV79

2

1U_0402_6.3V6K

DIS@

10U_0603_6.3V6M

RV246

1 2

+DPLL_PVDD

0_0402_5%@

RV247

1 2

DPLL_PVSS

0_0402_5%@

T80 T81

TH@

1 2

RV207 0_0402_5%

NC_TSVSSQ should be tied to GND on Thames/Seymour

3

4.7K_0402_5%

DIS@

QV14A

1 2

RV250

0_0402_5%

@

100mA

1 2

LV13

DIS@

R

V74

2

3VGS

+

+1.8VGS

12

61

DIS@

2N7002DW-7-F_SOT363-6

PACIN#

+

3VGS

R

V73

10K_0402_5%

Q

V14B

DIS@

5

1

CV76

CV75

2

1U_0402_6.3V6K

DIS@

0.1U_0402_16V7K

10U_0603_6.3V6M

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

ONFIGURATION STRAPS

LLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE

A GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

STRAPS

R

12

DIS@

A

3

4

65mA

1

CV77

2

DIS@

Issued Date

SVD

R

SVD

C_BATT

R

SVD

BIOS_ROM_EN

VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS

RSVD

AMD RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND NOT CONFLICT DURING RESET

GPIO21 GPIO2

+1.8VGS

1 2

LV12

DIS@

BLM15BD121SN1D_0402

VGA_SMB_CK2

VGA_SMB_DA2

VGA Thermal Sensor ADM1032ARMZ

Closed to GPU

GPU_THERMAL_D+ VGA_SMB_DA2

GPU_THERMAL_D-

RV98 4.7K_ 0402_5%

2

D

G

PIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB

GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS

GPIO2

G

PIO8

GPIO9 VGA ENABLEDBIF_VGA DIS

G

PIO21

GPIO_22_ROMCSB

GPIO[13:11]ROMIDCFG(2:0)

H2SYNC

GENERICC

HSYNCAUD[1]

VSYNCAUD[0]

H2SYNC GENERICC

PS_1 PS_2 PS_3

1

CV329

2

@

0.68U_0402_10V

Add 12/6 for MLPS

TX_PWRS_ENB G PIO0

+3VGS

12

DIS@

RV91

RV90

10K_0402_5%

DMN66D0LDW-7_SOT363-6

CV85

0.1U_0402_16V7K

CV89

1 2

MS@

2200P_0402_50V7K

+3VGS

1 2

MS@

2012/08/22 2013/08/31

2

ESCRIPTION OF DEFAULT SETTINGSPIN

Advertises PCIE speed

when compliance test

R

ESERVED

R

ESERVED

ENABLE EXTERNAL BIOS ROM

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

AUD[1] AUD[0] 0 0 No audio function 0 1 Audio for DisplayPort and HDMI if dongle is detected 1 0 Audio for DisplayPort only 1 1 Audio for both DisplayPort and HDMI

GPIO8

+1.8VGS

12

RV237

8.45K_0402_1%

@

12

RV238

4.75K_0402_1%

MS@

+1.8VGS +1.8VGS

12

1

CV331

2

MS@

0.68U_0402_10V

0402 1% resistors are required.

Transmitter Power Saving Enable 0: 50% Tx output swing for mobile mode 1: full Tx output swing (Default setting for Desktop)

PCI Express Transmitter De-emphasis Enable

GPIO1TX_DEEMPH_EN

0: Tx de-emphasis diabled for mobile mode 1: Tx de-emphasis enabled (Defailt setting for desktop)

Internal VGA Thermal Sensor

+3VGS

2

61

5

QV15A

DIS@

3

4

QV15B

DIS@

DMN66D0LDW-7_SOT363-6

RV92 0_ 0402_5%@

1 2

RV94 0_ 0402_5%@

1 2

+3VGS

MS@

2

1

UV14

1

VDD

2

D+

3

D-

THERM#4GND

ADM1032ARMZ-2REEL_MSOP8

MS@

Address:100_1101

Compal Secret Data

Deciphered Date

SDATA

ALERT#

8

SCLK

7

6

5

RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE

0

: 50% swing

1: Full swing

0: disable 1: enable

0: 2.5GT/s 1: 5GT/s

0: disable 1: enable

RV239 10K_0402_1%

@

RV240

4.75K_0402_1% CV333

MS@

@

EC_SMB_CK2 <40>

EC_SMB_DA2 <40>

+3VGS

RV96

MS@

4.7K_0402_5%

1 2

1

2

1

R

ECOMMENDED

SETTINGS

X

0

X

XXX

0

11

12

RV241

8.45K_0402_1%

X76@

12

1

2

0.68U_0402_10V

VGA_SMB_CK2

THM_ALERT#

CV90 10P_0402_50V8J

@

Title

Size Document Number Rev

Date: Sheet of

Mars Pro MLPs

RV242 2K_0402_1%

X76@

Hynix

Samsung

Micron

Compal Electronics, Inc.

ATI_ThamesXT_M2_Main_MSIC

LA-9101P

1

RV241 RV242 Bits [3:1]

NC 4.75k

8.45k

4.75k NC

000

2k

001

111

25 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

C

+

3VGS

R

V101

10K_0402_5%

@

DV12

RV233

2

G

20K_0402_5%

DIS@

1 2

13

D

QV21 2N7002K_SOT23-3

DIS@

S

DIS@

RV105

@

+3VGS

12

1

2

D D

for PX4.0

PX_EN<27>

5.11K_0402_1%

PXS_PWREN PX_MODE

for PX4.0 and PX5.0

C C

Note:

PX4.0 +VGA_CORE,VDDCI,+1.5VGS ON

PX4.0 +3VGS, +1.0VGS,+1.8VGS OFF

PX5.0 +3VGS,+VGA_CORE,VDDCI,+1.5VGV,+1.0VGS,+1.8VGS OFF

12

RV104

DIS@

RB751V-40_SOD323-2

DIS@

1 2

0_0402_5%

ircuits to support BACO

+3VGS

1

IN1

2

IN2

RUNPWROK

CV100

1U_0603_10V6K

RV102 0_0402_1%

Power Seguence of Thames and Mars Pro

B B

A A

+3VGS

+VGA_CORE

+VDDCI

+1.5VGS

+1.0VGS

+1.8VGS

<20ms

4

CV99

@

0.1U_0402_16V7K

1 2

5

VCC

4

OUT

GND

@

UV16

3

MC74VHC1G08DFT2G_SC70-5

1 2

@

for PX5.0

PX_MODE

3

witch circuits in BACO desingns for Thanes/Seymour only

S

PX_MODE <40,53,54>

PX_MODE=1 for Normal Operation

PX_MODE=0 for BACO mode to shut down power rails expcept VDDR3,PCIE_VDDC and 1.8V rail

+3VALW

12

DIS@

RV109

100K_0402_5%

PXS_PWREN<16,53>

PXS_PWREN

PXS_PWREN#

13

D

2

QV25

2N7002_SOT23-3

S

DIS@

G

+1.5VGPU TO +1.5VGS

PX_MODE

RV117

DIS@

100K_0402_5%

10U_0603_6.3V6M

DIS@

RV114

100K_0402_5%

5

12

+3VALW

CV309

DIS@

12

34

DIS@

QV27B

10U_0603_6.3V6M

1

2

300K_0402_5%

PX_MODE#

DMN66D0LDW-7_SOT363-6

RV112

DIS@

2

CV104

DIS@

B+_BIAS

+1.5VGPU

2 1

2MM

UV17

DIS@

AO4304L_SO8

8 7

1

6 5

2

12

DIS@

20K_0402_5% RV113

6

DIS@

QV27A

DMN66D0LDW-7_SOT363-6

1

RV115

DIS@

2M_0402_5%~D

+1.5VGS

JP9

@

1

10U_0603_6.3V6M

2

1

3

CV105

DIS@

2

4

1

CV107

DIS@

0.1U_0603_25V7K

2

1 2

1

CV106

DIS@

1U_0603_10V6K

2

PX_MODE#

PXS_PWREN#

12

RV111 470_0603_5%

13

D

2

G

QV26

S

2N7002K_SOT23-3

@

1 2

RV116 0_0402_5%

PXS_PWREN

2

5mA@1.0V, in BACO mode

5

+

1.0VGS

0mil

6

1 2

R

V103 0_0805_5%

MS@

+

BIF_VDDC

R

V234 0_0603_5%~D

1

CV97

22U_0805_6.3V6MDIS@

2

6

1 2

for PX5.0

0mil

TH@

1

+

VGA_CORE

+1.8VS TO +1.8VGS

+1.8VS

B+_BIAS

12

330K_0402_5% RV128

DIS@

13

D

2

G

S

2N7002H_SOT23-3

@

+5VALW

20K_0402_5%

2 1

DMN3030LSS-13_SOP8L-8

8 7

5

DIS@

1 2

RV211

470K_0402_5%DIS@

QV10

DIS@

RV107

2

G

@

1 2

1K_0402_5%

13

D

S

2N7002H_SOT23-3

+1.8VGS

J92MM

UV35

1 2 36

1

CV320

4

RV212 0_0402_5%

@

10U_0805_10V6K

2

DIS@

1

CV2

0.1U_0603_25V7K

DIS@

2

+3.3VS TO +3.3VGS

+3VS +3VGS

JP8

@

2 1

2MM

3 1

QV22

DIS@

RV108

QV24

DIS@

AP2301GN-HF_SOT23-3

2

DIS@

1

CV103

0.1U_0603_25V7K

2

1

CV321 1U_0603_10V6K

2

DIS@

2N7002H_SOT23-3

PXS_PWREN#

10U_0603_6.3V6M

1

CV101

DIS@

2

PXS_PWREN#

QV29

@

1 2

RV214

1U_0603_10V6K

1

CV102

DIS@

2

12

RV213 470_0603_5%

@

13

D

S

0_0402_5%@

12

13

D

S

RV110

1 2

2

G

RV106 470_0603_5%

@

2

G

QV23 2N7002K_SOT23-3

@

0_0402_5%@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

ATI_ThamesXT_M2_BACO POWER

LA-9101P

1

of

26 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

D D

+1.8VGS

+1.0VGS

C C

+1.0VGS

B B

RV201

MS@

2K_0402_1%

A A

(Thames 220mA)

1.0V@220mA DPCD_VDD10)

DIS@

0.935V@Mars Pro

1 2

RV121

0_0402_5%

(Thames 220mA)

1.0V@240mA DPEF_VDD10)

DIS@

0.935V@Mars Pro

1 2

RV126

0_0402_5%

+1.8VGS

12

RV243

8.45K_0402_1%

MS@

12

RV201 0_0402_5%

TH@

1

CV117

@

2

10U_0603_6.3V6M

+1.8VGS

CV123

@

(Thames 330mA)

1.8V@300mA DPCD_VDD18)

DIS@

1 2

RV119

0_0402_5%

+DPCD_VDD10

1

CV119

CV118

@

2

1U_0402_6.3V6K

(Thames 330mA)

1 2

0_0402_5%

+DPEF_VDD10

1

CV124

@

2

1U_0402_6.3V6K

10U_0603_6.3V6M

CV335

@

1

CV111

@

2

10U_0603_6.3V6M

+DPCD_VDD10

1

2

0.1U_0402_16V7K

DIS@

1.8V@300mA DPEF_VDD18)

RV124

CV120

@

+DPEF_VDD10

1

CV125

@

2

0.1U_0402_16V7K

PS_0

1

2

0.68U_0402_10V

Do not install for Heathrow/Mars Pro

PS_0 Should be tied to GND on Thames/Seymour

1

CV113

CV112

@

2

1U_0402_6.3V6K

0.1U_0402_16V7K

+DPEF_VDD18

1

CV122

CV121

@

2

1U_0402_6.3V6K

10U_0603_6.3V6M

0.1U_0402_16V7K

+DPEF_VDD18

+DPEF_VDD10

Thames/Seymour Only

+DPCD_VDD18

+DPCD_VDD10

+DPCD_VDD18

+DPCD_VDD10

+DPEF_VDD18

+DPEF_VDD10

1

2

20mil

PS_0

150_0402_1%

20mil

+DPCD_VDD18

20mil

12

RV122150_0402_1% DIS@

20mil

12

RV127

DIS@

AW14 AW16

AW20 AW22

AW18

AM33

AM34

AM39

4

UV1H

DP C/D POWER

AP20

DPCD/DPC_VDD 18#1

AP21

DPCD/DPC_VDD 18#2

AP13

DPCD/DPC_VDD 10#1

AT13

DPCD/DPC_VDD 10#2

AN17

DP/DPC_VSSR#1

AP16

DP/DPC_VSSR#2

AP17

DP/DPC_VSSR#3 DP/DPC_VSSR#4 DP/DPC_VSSR#5

AP22

DPCD/DPD_VDD 18#1

AP23

DPCD/DPD_VDD 18#2

AP14

DPCD/DPD_VDD 10#1

AP15

DPCD/DPD_VDD 10#2

AN19

DP/DPD_VSSR#1

AP18

DP/DPD_VSSR#2

AP19

DP/DPD_VSSR#3 DP/DPD_VSSR#4 DP/DPD_VSSR#5

DPCD_CALR

DP E/F POWER

AH34

DPEF/DPE_VDD18# 1

AJ34

DPEF/DPE_VDD18# 2

AL33

DPEF/DPE_VDD10# 1 DPEF/DPE_VDD10# 2

AN34

DP/DPE_VSSR#1

AP39

DP/DPE_VSSR#2

AR39

DP/DPE_VSSR#3

AU37

DP/DPE_VSSR#4

AF34

DPEF/DPF_VDD18# 1

AG34

DPEF/DPF_VDD18# 2

AK33

DPEF/DPF_VDD10# 1

AK34

DPEF/DPF_VDD10# 2

AF39

DP/DPF_VSSR#1

AH39

DP/DPF_VSSR#2

AK39

DP/DPF_VSSR#3

AL34

DP/DPF_VSSR#4 DP/DPF_VSSR#5

DPEF_CALR

216-0833000-A11-THAMES-XT-M2_FCBGA962~D

THR1@

DP A/B POWER

DPAB/DPA_VDD18#1 DPAB/DPA_VDD18#2

DPAB/DPA_VDD10#1 DPAB/DPA_VDD10#2

DP/DPA_VSSR#1 DP/DPA_VSSR#2 DP/DPA_VSSR#3 DP/DPA_VSSR#4 DP/DPA_VSSR#5

DPAB/DPB_VDD18#1 DPAB/DPB_VDD18#2

DPAB/DPB_VDD10#1 DPAB/DPB_VDD10#2

DP/DPB_VSSR#1 DP/DPB_VSSR#2 DP/DPB_VSSR#3 DP/DPB_VSSR#4 DP/DPB_VSSR#5

DPAB_CALR

DP PLL POWER

DPAB_VDD18/DPA_PVDD

DP_VSSR/DPA_PVSS

DPAB_VDD18/DPB_P VDD

DP_VSSR/DPB_PVSS

DPCD_VDD18/D PC_PVDD

DP_VSSR/DPC_PVSS

DPCD_VDD18/D PD_PVDD

DP_VSSR/DPD_PVSS

DPEF_VDD18/DPE_ PVDD

DP_VSSR/DPE_PVSS

DPEF_VDD18/DPF_ PVDD

DP_VSSR/DPF_PVSS

20mil

130mA

AN24 AP24

20mil

110mA

AP31 AP32

AN27 AP27 AP28 AW24 AW26

20mil

AP25 AP26

20mil

AN33 AP33

AN29 AP29 AP30 AW30 AW32

AW28

20mA

AU28 AV27

20mA

AV29 AR28

+DPCD_VDD18

20mA

AU18 AV17

20mA

AV19 AR18

20mA

AM37 AN38

20mA

AL38 AM35

MLPS Bit

PS0:

PS1:

PS2:

PS3:

130mA

110mA

RV123 150_0402_1%DIS@

+DPAB_VDD18

+DPCD_VDD18

+DPEF_VDD18

(Thames 330mA)

1.8V@300mA DPAB_VDD18)

+DPAB_VDD18

1

CV108

2

@

0.1U_0402_16V7K

(1.0V@220mA DPAB_VDD10)

0.935V@Mars Pro

+DPAB_VDD10

CV114

@

0.1U_0402_16V7K

+DPAB_VDD18

+DPAB_VDD10

1 2

10mil

11001

11000

00000

11000

1

CV110

CV109

2

@

1U_0402_6.3V6K

10U_0603_6.3V6M

1

CV116

CV115

@

2

1U_0402_6.3V6K

10U_0603_6.3V6M

AMD recommended setting

R_PU R_PD Cstrap

RV243=8.45K

RV237=NC

RV239=NC

RV241=NC

3

+DPAB_VDD18

DIS@

1 2

RV118 0_0402_5%

(Thames 330mA)

+DPAB_VDD10

DIS@

1 2

RV120 0_0402_5%

1

2

RV201=2K CV335=NC

RV238=4.75K CV329=NC

RV240=4.75K CV331=0.68u

RV242=4.75K CV333=NC

+1.8VGS

+1.0VGS

2

U

V1F

AB39

P

CIE_VSS#1

E39

P

CIE_VSS#2

F34

P

CIE_VSS#3

F39

P

CIE_VSS#4

G33

P

CIE_VSS#5

G34

P

CIE_VSS#6

H31

P

CIE_VSS#7

H34

CIE_VSS#8

P

H39

P

CIE_VSS#9

J31

CIE_VSS#10

P

J34

P

CIE_VSS#11

K31

CIE_VSS#12

P

K34

PCIE_VSS#13

K39

PCIE_VSS#14

L31

PCIE_VSS#15

L34

PCIE_VSS#16

M34

PCIE_VSS#17

M39

PCIE_VSS#18

N31

PCIE_VSS#19

N34

PCIE_VSS#20

P31

PCIE_VSS#21

P34

PCIE_VSS#22

P39

PCIE_VSS#23

R34

PCIE_VSS#24

T31

PCIE_VSS#25

T34

PCIE_VSS#26

T39

PCIE_VSS#27

U31

PCIE_VSS#28

U34

PCIE_VSS#29

V34

PCIE_VSS#30

V39

PCIE_VSS#31

W31

PCIE_VSS#32

W34

PCIE_VSS#33

Y34

PCIE_VSS#34

Y39

PCIE_VSS#35

F15 F17 F19 F21 F23 F25 F27 F29 F31 F33

F7

F9 G2 G6 H9

J2

J27

J6

J8

K14

K7

L11 L17

L2

L22 L24

L6

M17 M22 M24

N16 N18

N2

N21 N23 N26

N6

R15 R17

R2

R20 R22 R24 R27

R6

T11 T13 T16 T18 T21 T23 T26 U15 U17

U2

U20 U22 U24 U27

U6

V11 V16 V18 V21 V23 V26

W2

W6 Y15 Y17 Y20 Y22 Y24 Y27 U13 V13

GND

GND#100 GND#101 GND#102 GND#103 GND#104 GND#105 GND#106 GND#107 GND#108 GND#109 GND#110 GND#111 GND#112 GND#113 GND#114 GND#115 GND#116 GND#117 GND#118 GND#119 GND#120 GND#121 GND#122 GND#123 GND#124 GND#125 GND#126 GND#127 GND#128 GND#129 GND#130 GND#131 GND#132 GND#133 GND#134 GND#135 GND#136 GND#137 GND#138 GND#139 GND#140 GND#141 GND#142 GND#143 GND#144 GND#145 GND#146 GND#147 GND#148 GND#149 GND#150 GND#151 GND#153 GND#154 GND#155 GND#156 GND#157 GND#158 GND#159 GND#160 GND#161 GND#163 GND#164 GND#165 GND#166 GND#167 GND#168 GND#169 GND#170 GND#171 GND#172 GND#173 GND#174 GND#175 GND#152 GND#162

216-0833000-A11-THAMES-XT-M2_FCBGA962~D

THR1@

GND/PX_EN#61

VSS_MECH#1 VSS_MECH#2 VSS_MECH#3

G

ND#1

G

ND#2

G

ND#3

G

ND#4

G

ND#5

G

ND#6

G

ND#7 ND#8

G G

ND#9

ND#10

G G

ND#11 ND#12

G GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60

GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98

A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13

A39 AW1 AW39

MECH#1 MECH#2 MECH#3

12

RV125

4.7K_0402_5%

DIS@

T82 PAD T83 PAD T84 PAD

1

PX_EN <26>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

ATI_ThamesXT_M2_PWR_GND

LA-9101P

1

27 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

2

1

PCIE_VDDR

1

CV128

CV126

CV127

2

U

or DDR3 MVDDQ = 1.5V

+

D D

C C

+1.8VGS

B B

+1.0VGS

A A

1.5VGS

220U_B2_2.5VM_R35

CV135

1

+

@

2

+1.8VGS +VDDC_CT

+3VGS

(Thames 60mA)

1

CV187

CV188

2

1U_0402_6.3V6K

DIS@

10U_0603_6.3V6M

(Thames 50mA)

LV22

DIS@

1 2

BLM15BD121SN1D_0402

(Thames 100mA)

0.935V@Mars Pro

LV23

DIS@

1 2

MCK1608471YZF 0603

F

(Thames 1.7)A

1

CV136

CV138

CV137

2

DIS@

10U_0603_6.3V6M

(Thames 250mA)

LV19

DIS@

1 2

BLM15BD121SN1D_0402

1

CV190

CV189

2

1U_0402_6.3V6K

DIS@

+1.8VGS

MCK1608471YZF 0603

(1.8V@75mA SPV18)

1

CV200

CV201

2

1U_0402_6.3V6K

DIS@

0.1U_0402_16V7K

10U_0603_6.3V6M

1

CV215

CV217

CV216

2

1U_0402_6.3V6K

DIS@

0.1U_0402_16V7K

10U_0603_6.3V6M

VCCSENSE_VGA<53>

VDDCI_SEN<54>

VSSSENSE_VGA<53>

1

CV139

2

DIS@

10U_0603_6.3V6M

1

CV141

CV140

CV142

2

1U_0402_6.3V6K

DIS@

+1.5VGS

1

CV152

CV153

2

DIS@

0.1U_0402_16V7K

1

CV145

CV144

CV143

2

1U_0402_6.3V6K

DIS@

1

CV156

CV155

CV154

2

DIS@

0.1U_0402_16V7K

1

(1.8V@110mA VDD_CT)

1

CV172

2

1U_0402_6.3V6K

DIS@

CV197

DIS@

10U_0603_6.3V6M

10_0402_1%

1

2

1U_0402_6.3V6K

+VDDCI

RV215

DIS@

1

CV174

CV173

2

DIS@

0.1U_0402_16V7K

20mil

+VDDR4

1

CV193

CV194

2

1U_0402_6.3V6K

DIS@

0.1U_0402_16V7K

1

CV199

CV198

2

1U_0402_6.3V6K

DIS@

0.1U_0402_16V7K

20mil

+MPV18

10mil

+SPV18

20mil

+SPV10

+VGA_CORE

12

RV202 10_0402_1%

DIS@

VCCSENSE_VGA

VDDCI_SEN

VSSSENSE_VGA

12

RV204

10_0402_1%DIS@

1

CV171

CV170

2

1U_0402_6.3V6K

DIS@

10U_0603_6.3V6M

LV20

DIS@

1 2

BLM15BD121SN1D_0402

(Thames 150mA)

(M97, Broadway and Madison: 1.8V@150mA MPV18)

LV21

DIS@

1 2

1

CV202

2

DIS@

(120mA SPV10)

V1E

MEM I/O

AC7

DDR1#1

V

AD11

V

DDR1#2

AF7

DDR1#3

V

AG10

VDDR1#4

AJ7

VDDR1#5

AK8

VDDR1#6

AL9

VDDR1#7

G11

VDDR1#8

G14

VDDR1#9

G17

VDDR1#10

G20

VDDR1#11

G23

VDDR1#12

G26

VDDR1#13

G29

VDDR1#14

H10

VDDR1#15

J7

VDDR1#16

J9

VDDR1#17

K11

VDDR1#18

K13

VDDR1#19

K8

VDDR1#20

L12

VDDR1#21

L16

VDDR1#22

L21

VDDR1#23

L23

VDDR1#24

L26

VDDR1#25

L7

VDDR1#26

M11

VDDR1#27

N11

VDDR1#28

P7

VDDR1#29

R11

VDDR1#30

U11

VDDR1#31

U7

VDDR1#32

Y11

VDDR1#33

Y7

VDDR1#34

LEVEL

20mil

TRANSLATION

AF26

VDD_CT#1

AF27

VDD_CT#2

AG26

VDD_CT#3

AG27

VDD_CT#4

10mil

I/O

AF23

VDDR3#1

AF24

VDDR3#2

AG23

VDDR3#3

AG24

VDDR3#4

AF13

VDDR4#4

AF15

VDDR4#5

AG13

VDDR4#7

AG15

VDDR4#8

AD12

VDDR4#1

AF11

VDDR4#2

AF12

VDDR4#3

AG11

VDDR4#6

M20

NC_VDDRHA

M21

NC_VSSRHA

V12

NC_VDDRHB

U12

NC_VSSRHB

PLL

H7

MPV18#1

H8

MPV18#2

AM10

SPV18

AN9

SPV10

AN10

SPVSS

VOLTAGE SENESE

10mil

AF28

FB_VDDC

10mil

AG28

FB_VDDCI

AH29

FB_GND

216-0833000-A11-THAMES-XT-M2_FCBGA962~D

THR1@

PCIE

CIE_VDDR#1

P P

CIE_VDDR#2 CIE_VDDR#3

P PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8

PCIE_VDDR/PCIE_PVDD

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8

PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

VDDC#1

CORE

VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8

VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15

POWER

VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32

VDDC/BIF_VDDC#33

VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41

VDDC/BIF_VDDC#42

VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58

VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8

VDDCI#9 VDDCI#10 VDDCI#11 VDDCI#12 VDDCI#13 VDDCI#14 VDDCI#15

ISOLATED

VDDCI#16

CORE I/O

VDDCI#17 VDDCI#18 VDDCI#19 VDDCI#20 VDDCI#21 VDDCI#22

40mil

AA31 AA32 AA33 AA34 V28 W29 W30 Y31 AB37

+PCIE_PVDD

G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28

AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 AH27 AH28 M26 N24 N27 R18 R21 R23 R26 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28

(GDDR3/DDR3 1.12V@4A VDDCI)

(GDDR5 1.12V@16A VDDCI)

AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13

VDDCI and VDDC should have seperate regulators with a merge option on PCB For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator

DIS@

0.1U_0402_16V7K

TH@

R

V244 0_0402_5%

@

RV245 0_0402_5%

1

CV158

CV157

2

1U_0402_6.3V6K

DIS@

1

CV176

CV175

2

1U_0402_6.3V6K

DIS@

55mA

1

CV195

2

1U_0402_6.3V6K

DIS@

1

CV203

2

1U_0402_6.3V6K

DIS@

2

1U_0402_6.3V6K

DIS@

0.1U_0402_16V7K

1 2

+

1 2

1

CV146

2

1U_0402_6.3V6K

DIS@

1

CV159

CV160

2

1U_0402_6.3V6K

DIS@

1

CV178

CV177

2

1U_0402_6.3V6K

DIS@

+BIF_VDDC

For non-BACO designs, connect BIF_VDDC to VDDC.

1

For BACO designs - see BACO reference schematics

CV196

2

1U_0402_6.3V6K

DIS@

1

CV206

CV205

CV204

2

1U_0402_6.3V6K

DIS@

1

CV129

2

1U_0402_6.3V6K

DIS@

PCIE_VDDR

1

CV147

2

1U_0402_6.3V6K

DIS@

1

CV161

2

1U_0402_6.3V6K

DIS@

1

CV179

2

1U_0402_6.3V6K

DIS@

10U_0603_6.3V6M

1

CV207

2

1U_0402_6.3V6K

DIS@

1

CV130

2

1U_0402_6.3V6K

DIS@

+BIF_VDDC

1

CV148

2

1U_0402_6.3V6K

DIS@

1

CV162

2

1U_0402_6.3V6K

DIS@

1

CV180

2

1U_0402_6.3V6K

DIS@

1

CV365

2

DIS@

10U_0603_6.3V6M

CV208

1U_0402_6.3V6K

DIS@

1

2

MBK1608121YZF_0603

1

CV131

2

DIS@

10U_0603_6.3V6M

1

CV149

2

1U_0402_6.3V6K

DIS@

1

CV163

2

1U_0402_6.3V6K

DIS@

1

CV181

2

1U_0402_6.3V6K

DIS@

1

CV366

2

DIS@

10U_0603_6.3V6M

CV209

1U_0402_6.3V6K

DIS@

(Thames 440mA)

(1.8V@504mA PCIE_VDDR)

+

1.8VGS

+

L

V17

DIS@

12

1.8V@40mA PCIE_PVDD)

(

1

CV132

CV133

2

1U_0402_6.3V6K

DIS@

0.1U_0402_16V7K

10U_0603_6.3V6M

+1.0VGS

(Thames 1.1A)

1

CV150

CV151

(1.0V@1920mA PCIE_VDDC)

(Mars Pro)

2

(0.935V@2.5A PCIE_VDDC)

1U_0402_6.3V6K

DIS@

10U_0603_6.3V6M

(Thames 20.5A)

1

CV164

2

1U_0402_6.3V6K

DIS@

1

CV182

2

1U_0402_6.3V6K

DIS@

1

CV367

2

DIS@

10U_0603_6.3V6M

1

CV165

2

1U_0402_6.3V6K

DIS@

1

CV183

2

1U_0402_6.3V6K

DIS@

+VGA_CORE

1

CV191

2

DIS@

22U_0603_6.3V6M

1

CV167

CV166

2

1U_0402_6.3V6K

DIS@

+VGA_CORE

1

CV185

CV184

2

1U_0402_6.3V6K

DIS@

1

CV192

2

DIS@

4A

1

2

1

CV211

CV210

CV212

2

1U_0402_6.3V6K

DIS@

10U_0603_6.3V6M

1

CV325

2

1U_0402_6.3V6K

DIS@

40mA

DIS@

MBK1608121YZF_0603

1

CV134

2

DIS@

+VGA_CORE

1

CV168

CV169

2

1U_0402_6.3V6K

DIS@

1

CV186

2

1U_0402_6.3V6K

DIS@

+VDDCI

1

CV213

CV214

2

DIS@

22U_0603_6.3V6M

1

CV322

CV324

2

DIS@

10U_0603_6.3V6M

V18

L

12

1

+

DIS@

2

1

CV323

2

DIS@

10U_0603_6.3V6M

1.8VGS

+

330U_D2_2VM_R6M~D

CV327

LV25

1 2

BLM15BD121SN1D_0402

LV26

1 2

BLM15BD121SN1D_0402

@

+VGA_CORE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

ATI_ThamesXT_M2_Power

LA-9101P

1

28 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

2

1

DA[0..63]

V1C

U

D

DR2 GDDR3/GDDR5 DDR3

C37

M

DA0

D

QA0_0/DQA_0

C35

DA1

M

D

QA0_1/DQA_1

A35

DA2

M

D

QA0_2/DQA_2

E34

M

DA3

D

QA0_3/DQA_3

G32

M

DA4

D

QA0_4/DQA_4

D33

M

DA5

D

QA0_5/DQA_5

F32

M

DA6

D

QA0_6/DQA_6

E32

M

DA7

D

QA0_7/DQA_7

D31

DA8

M

D

QA0_8/DQA_8

F30

M

DA9

D

QA0_9/DQA_9

C30

DA10

D D

C C

+1.5VGS

1 2

RV129 240_0402_1%T H@

1 2

RV130 240_0402_1%SE@

1 2

RV131 240_0402_1%T H@

1 2

RV132 240_0402_1%SE@

1 2

RV134 240_0402_1%T H@

1 2

RV135 240_0402_1%T H@

1 2

RV206 120_0402_5%MS@

1 2

RV205 120_0402_5%@

M M

DA11

M

DA12

M

DA13

M

DA14 DA15

M MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

+VDD_MEM15_REFDA +VDD_MEM15_REFSA

AG12

AH12

A30 F28 C28 A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13

J13 H11 G10

G8

K9

K10

G9

A8

C8

E8 A6

C6

E6 A5

L18 L20

L27 N12

M12 M27

QA0_10/DQA_10

D D

QA0_11/DQA_11 QA0_12/DQA_12

D D

QA0_13/DQA_13 QA0_14/DQA_14

D DQA0_15/DQA_15 DQA0_16/DQA_16 DQA0_17/DQA_17 DQA0_18/DQA_18 DQA0_19/DQA_19 DQA0_20/DQA_20 DQA0_21/DQA_21 DQA0_22/DQA_22 DQA0_23/DQA_23 DQA0_24/DQA_24 DQA0_25/DQA_25 DQA0_26/DQA_26 DQA0_27/DQA_27 DQA0_28/DQA_28 DQA0_29/DQA_29 DQA0_30/DQA_30 DQA0_31/DQA_31 DQA1_0/DQA_32 DQA1_1/DQA_33 DQA1_2/DQA_34 DQA1_3/DQA_35 DQA1_4/DQA_36 DQA1_5/DQA_37 DQA1_6/DQA_38 DQA1_7/DQA_39 DQA1_8/DQA_40 DQA1_9/DQA_41 DQA1_10/DQA_42 DQA1_11/DQA_43 DQA1_12/DQA_44 DQA1_13/DQA_45 DQA1_14/DQA_46 DQA1_15/DQA_47 DQA1_16/DQA_48 DQA1_17/DQA_49 DQA1_18/DQA_50 DQA1_19/DQA_51 DQA1_20/DQA_52 DQA1_21/DQA_53 DQA1_22/DQA_54 DQA1_23/DQA_55 DQA1_24/DQA_56 DQA1_25/DQA_57 DQA1_26/DQA_58 DQA1_27/DQA_59 DQA1_28/DQA_60 DQA1_29/DQA_61 DQA1_30/DQA_62 DQA1_31/DQA_63

MVREFDA MVREFSA

MEM_CALRN0 MEM_CALRN1 MEM_CALRN2

MEM_CALRP1 MEM_CALRP0 MEM_CALRP2

DDR2 GDDR5/GDDR3 DDR3

M M M M M M M M M

M M M M

M

AA1_5/MAA_13_BA2 AA1_6/MAA_14_BA0

M

MAA1_7/MAA_A15_BA1

WCKA0_0/DQM A_0

WCKA0B_0/DQM A_1

WCKA0_1/DQM A_2

WCKA0B_1/DQM A_3

WCKA1_0/DQM A_4

WCKA1B_0/DQM A_5

WCKA1_1/DQM A_6

WCKA1B_1/DQM A_7

GDDR5/DDR2/GDDR3

MEMORY INTERFACE A

EDCA0_0/QSA_0/RDQS A_0 EDCA0_1/QSA_1/RDQS A_1 EDCA0_2/QSA_2/RDQS A_2 EDCA0_3/QSA_3/RDQS A_3 EDCA1_0/QSA_4/RDQS A_4 EDCA1_1/QSA_5/RDQS A_5 EDCA1_2/QSA_6/RDQS A_6 EDCA1_3/QSA_7/RDQS A_7

DDBIA0_0/QSA_0B/WD QSA_0 DDBIA0_1/QSA_1B/WD QSA_1 DDBIA0_2/QSA_2B/WD QSA_2 DDBIA0_3/QSA_3B/WD QSA_3 DDBIA1_0/QSA_4B/WD QSA_4 DDBIA1_1/QSA_5B/WD QSA_5 DDBIA1_2/QSA_6B/WD QSA_6 DDBIA1_3/QSA_7B/WD QSA_7

AA0_0/MAA_0 AA0_1/MAA_1 AA0_2/MAA_2 AA0_3/MAA_3 AA0_4/MAA_4 AA0_5/MAA_5 AA0_6/MAA_6 AA0_7/MAA_7 AA1_0/MAA_8

AA1_1/MAA_9 AA1_2/MAA_10 AA1_3/MAA_11 AA1_4/MAA_12

ADBIA0/ODTA0 ADBIA1/ODTA1

CLKA0

CLKA0B

CLKA1

CLKA1B

RASA0B RASA1B

CASA0B CASA1B

CSA0B_0 CSA0B_1

CSA1B_0 CSA1B_1

CKEA0 CKEA1

WEA0B WEA1B

MAA0_8 MAA1_8

GDDR5

G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17

A32 C32 D23 E22 C14 A14 E10 D9

C34 D29 D25 E20 E16 E12 J10 D7

A34 E30 E26 C20 C16 C12 J11 F8

J21 G19

H27 G27

J14 H14

K23 K19

K20 K17

K24 K27

M13 K16

K21 J20

K26 L15

H23 J19

M

AA0 AA1

M

AA2

M M

AA3

M

AA4

M

AA5

M

AA6

M

AA7 AA8

M M

AA9 AA10

M M

AA11

M

AA12

A

_BA2

A

_BA0 _BA1

A

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7

QSA#0 QSA#1 QSA#2 QSA#3 QSA#4 QSA#5 QSA#6 QSA#7

ODTA0 ODTA1

CLKA0 CLKA0#

CLKA1 CLKA1#

RASA0# RASA1#

CASA0# CASA1#

CSA0#_0

CSA1#_0

CKEA0 CKEA1

WEA0# WEA1#

MAA13 MAA14

DA[0..63]<30>

M

ODTA0 <30> ODTA1 <30>

CLKA0 <30> CLKA0# <30>

CLKA1 <30> CLKA1# <30>

RASA0# <30> RASA1# <30>

CASA0# <30> CASA1# <30>

CSA0#_0 <30>

CSA1#_0 <30>

CKEA0 <30> CKEA1 <30>

WEA0# <30> WEA1# <30>

MAA13 <29,30> MAA14 <29,30> MAB14 <29,31>

M

AA[14..0]

_BA[2..0]

A

DQMA#[7..0] <30>

QSA[7..0] <30>

QSA#[7..0] <30>

M

AA[14..0] <30>

A

_BA[2..0] <30>

RV133

+VDD_MEM15_REFDB +VDD_MEM15_REFSB

DIS@

1 2

5.11K_0402_1%

TESTEN

M

DB0 DB1

M

DB2

M M

DB3

M

DB4

M

DB5

M

DB6

M

DB7 DB8

M M

DB9 DB10

M M

DB11

M

DB12

M

DB13

M

DB14 DB15

M MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63

AA12

AD28

AK10

AL10

C5 C3

E3 E1 F1 F3

F5 G4 H5 H6

J4

K6

K5

L4 M6 M1 M3 M5 N4

P6

P5 R4

T6

T1 U4

V6

V1

V3

Y6

Y1

Y3

Y5

AA4 AB6 AB1 AB3 AD6 AD1 AD3 AD5 AF1 AF3 AF6

AG4

AH5 AH6 AJ4 AK3 AF8

AF9 AG8 AG7

AK9

AL7 AM8 AM7

AK1

AL4 AM6 AM1

AN4

AP3

AP1

AP5

Y12

V1D

U

DDR2 GDDR3/GDDR5 DDR3

D

QB0_0/DQB_0

D

QB0_1/DQB_1

D

QB0_2/DQB_2

D

QB0_3/DQB_3

D

QB0_4/DQB_4

D

QB0_5/DQB_5

D

QB0_6/DQB_6

D

QB0_7/DQB_7

D

QB0_8/DQB_8

D

QB0_9/DQB_9 QB0_10/DQB_10

D D

QB0_11/DQB_11 QB0_12/DQB_12

D D

QB0_13/DQB_13 QB0_14/DQB_14

D DQB0_15/DQB_1 5 DQB0_16/DQB_1 6 DQB0_17/DQB_1 7 DQB0_18/DQB_1 8 DQB0_19/DQB_1 9 DQB0_20/DQB_2 0 DQB0_21/DQB_2 1 DQB0_22/DQB_2 2 DQB0_23/DQB_2 3 DQB0_24/DQB_2 4 DQB0_25/DQB_2 5 DQB0_26/DQB_2 6 DQB0_27/DQB_2 7 DQB0_28/DQB_2 8 DQB0_29/DQB_2 9 DQB0_30/DQB_3 0 DQB0_31/DQB_3 1 DQB1_0/DQB_32 DQB1_1/DQB_33 DQB1_2/DQB_34 DQB1_3/DQB_35 DQB1_4/DQB_36 DQB1_5/DQB_37 DQB1_6/DQB_38 DQB1_7/DQB_39 DQB1_8/DQB_40 DQB1_9/DQB_41 DQB1_10/DQB_4 2 DQB1_11/DQB_4 3 DQB1_12/DQB_4 4 DQB1_13/DQB_4 5 DQB1_14/DQB_4 6 DQB1_15/DQB_4 7 DQB1_16/DQB_4 8 DQB1_17/DQB_4 9 DQB1_18/DQB_5 0 DQB1_19/DQB_5 1 DQB1_20/DQB_5 2 DQB1_21/DQB_5 3 DQB1_22/DQB_5 4 DQB1_23/DQB_5 5 DQB1_24/DQB_5 6 DQB1_25/DQB_5 7 DQB1_26/DQB_5 8 DQB1_27/DQB_5 9 DQB1_28/DQB_6 0 DQB1_29/DQB_6 1 DQB1_30/DQB_6 2 DQB1_31/DQB_6 3

MVREFDB MVREFSB

TESTEN

CLKTESTA CLKTESTB

DDR2 GDDR5/GDDR3 DDR3

M M M M M M M M M M

AB1_2/MAB_10

M M

AB1_3/MAB_11 AB1_4/MAB_12

M

WCKB0_0/D QMB_0

WCKB0B_0 /DQMB_1

WCKB0_1/D QMB_2

WCKB0B_1 /DQMB_3

WCKB1_0/D QMB_4

WCKB1B_0 /DQMB_5

WCKB1_1/D QMB_6

WCKB1B_1 /DQMB_7

GDDR5/DDR2/GDDR3

EDCB0_0/QSB_0 /RDQSB_0

MEMORY INTERFACE B

EDCB0_1/QSB_1 /RDQSB_1 EDCB0_2/QSB_2 /RDQSB_2 EDCB0_3/QSB_3 /RDQSB_3 EDCB1_0/QSB_4 /RDQSB_4 EDCB1_1/QSB_5 /RDQSB_5 EDCB1_2/QSB_6 /RDQSB_6 EDCB1_3/QSB_7 /RDQSB_7

DDBIB0_0/QSB_0B/W DQSB_0 DDBIB0_1/QSB_1B/W DQSB_1 DDBIB0_2/QSB_2B/W DQSB_2 DDBIB0_3/QSB_3B/W DQSB_3 DDBIB1_0/QSB_4B/W DQSB_4 DDBIB1_1/QSB_5B/W DQSB_5 DDBIB1_2/QSB_6B/W DQSB_6 DDBIB1_3/QSB_7B/W DQSB_7

ADBIB0/ODTB0 ADBIB1/ODTB1

AB0_0/MAB_0

AB0_1/MAB_1

AB0_2/MAB_2

AB0_3/MAB_3

AB0_4/MAB_4

AB0_5/MAB_5

AB0_6/MAB_6

AB0_7/MAB_7

AB1_0/MAB_8

AB1_1/MAB_9

M

AB1_5/BA2 AB1_6/BA0

M MAB1_7/BA1

CLKB0

CLKB0B

CLKB1

CLKB1B

RASB0B RASB1B

CASB0B CASB1B

CSB0B_0 CSB0B_1

CSB1B_0 CSB1B_1

CKEB0 CKEB1

WEB0B WEB1B

MAB0_8 MAB1_8

DRAM_RST

GDDR5

P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9

H3 H1 T3 T5 AE4 AF5 AK6 AK5

F6 K3 P3 V5 AB5 AH1 AJ9 AM5

G7 K1 P1 W4 AC4 AH3 AJ8 AM3

T7 W7

L9 L8

AD8 AD7

T10 Y10

W10 AA10

P10 L10

AD10 AC10

U10 AA11

N10 AB11

T8 W8

AH11

DRAM_RST#_R

M

AB0 AB1

M

AB2

M M

AB3

M

AB4

M

AB5

M

AB6

M

AB7 AB8

M M

AB9 AB10

M M

AB11

M

AB12

B

_BA2

B

_BA0 _BA1

B

DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7

QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7

QSB#0 QSB#1 QSB#2 QSB#3 QSB#4 QSB#5 QSB#6 QSB#7

ODTB0 ODTB1

CLKB0 CLKB0#

CLKB1 CLKB1#

RASB0# RASB1#

CASB0# CASB1#

CSB0#_0

CSB1#_0

CKEB0 CKEB1

WEB0# WEB1#

MAB13 MAB14

DB[0..63]<31>

M

DB[0..63]

M

AB[14..0]

_BA[2..0]

B

DQMB#[7..0] <31>

QSB[7..0] <31>

QSB#[7..0] <31>

ODTB0 <31> ODTB1 <31>

CLKB0 <31> CLKB0# <31>

CLKB1 <31> CLKB1# <31>

RASB0# <31> RASB1# <31>

CASB0# <31> CASB1# <31>

CSB0#_0 <31>

CSB1#_0 <31>

CKEB0 <31> CKEB1 <31>

WEB0# <31> WEB1# <31>

MAB13 <29,31>

M

AB[14..0] <31>

B

_BA[2..0] <31>

216-0833000-A11-THAMES-XT-M2_FCBGA962~D

B B

Co-lay Thames/Seymour/Mars Pro

RV129

RV130

RV131

RV132

RV134

RV135

RV206

RV205

+1.5VGS +1.5VGS

12

RV139

40.2_0402_1%

DIS@

A A

RV146

100_0402_1%

DIS@

12

THR1@

Thames M2@Seymour M2@Mars Pro

TH@

@

TH@

@

+VDD_MEM15_REFDA

CV220

0.1U_0402_16V7K

DIS@

5

SE@

@

SE@

@

RV140

40.2_0402_1%

DIS@

RV147

100_0402_1%

DIS@

12

@

MS@

@@

+VDD_MEM15_REFSA

12

CV221

0.1U_0402_16V7K

DIS@

This basic top ology should be used for DRAM_ RST for DDR3/GD DR5.These Capacitors and Resistor values are an example only. The Seri es R and || Cap values w ill depend on t he DRAM load an d will have to be calculated for different Memo ry ,DRAM Load a nd board to pa ss Reset Signal Spec. Place all these components ver y close to GPU (Within 25mm) and keep all component c lose to each Ot her (within 5mm) except Rse r2

+1.5VGS

12

RV138

4.7K_0402_5%

@

1 2

DRAM_RST#<30,31>

4

RV143

51.1_0402_1%

DIS@

CV222

120P_0402_50V9

12

1 2

RV144

10_0402_1%

DIS@

3

12

@

CV218

0.1U_0402_16V7K

12

@

RV136

51.1_0402_1%

+1.5VGS +1.5VGS

12

RV141

DRAM_RST#_R

DIS@

RV145

4.99K_0402_1%

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

40.2_0402_1%

DIS@

12

RV148

100_0402_1%

DIS@

2012/08/22 2013/08/31

216-0833000-A11-THAMES-XT-M2_FCBGA962~D

THR1@

12

@

CV219

0.1U_0402_16V7K

12

@

RV137

51.1_0402_1%

Compal Secret Data

route 50ohms single-ended/100ohms diff and keep short Debug only, for clock observation, if not needed, DNI 5mil 5mil

+VDD_MEM15_REFDB

12

CV223

0.1U_0402_16V7K

DIS@

Deciphered Date

2

RV142

40.2_0402_1%

DIS@

RV149

100_0402_1%

DIS@

12

+VDD_MEM15_REFSB

12

CV224

0.1U_0402_16V7K

DIS@

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

ATI_ThamesXT_M2_MEM IF

LA-9101P

1

0.4

29 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

UV18

M8

V

REFC_A1

V

REFD_Q1

D D

DA[0..63]

DIS@

1 2

DIS@

1 2

DIS@

1 2

DIS@

1 2

M

MAA[14..0]

DQMA#[7..0]

QSA[7..0]

QSA#[7..0]

12

CV225

0.01U_0402_16V7K

DIS@

12

CV234

0.01U_0402_16V7K

DIS@

A_BA0<29> A_BA1<29> A_BA2<29>

CLKA0<29> CLKA0#<29> CKEA0<29>

ODTA0<29> CSA0#_0<29> RASA0#<29> CASA0#<29> WEA0#<29>

DRAM_RST#<29,31>

RV150

240_0402_1%

DIS@

QSA3 QSA0

DQMA#3 DQMA#0

QSA#3 QSA#0

12

MDA[0..63]<29>

MAA[14..0]<29>

DQMA#[7..0]<29>

QSA[7..0]<29>

QSA#[7..0]<29>

C C

CLKA0

RV154 56_0402_1%

CLKA0#

RV155 56_0402_1%

B B

CLKA1

RV164 56_0402_1%

CLKA1#

RV165 56_0402_1%

V

REFCA

H1

V

REFDQ

N3

AA0

M

A

0

P7

M

AA1

A

1

P3

AA2

M

2

A

N2

M

AA3

A

3

P8

M

AA4

4

A

P2

M

AA5

A

5

R8

M

AA6

6

A

R2

AA7

M

A7

T8

MAA8

A8

R3

MAA9

A9

L7

MAA10

A10/AP

R7

MAA11

A11

N7

MAA12

A12/BC

T3

MAA13

A13

T7

MAA14

A14

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC

L1

NC

J9

NC

L9

NC

M7

NC

K4W2G1646E-BC11_FBGA96~D

+1.5VGS +1.5VGS+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS

12

RV156

4.99K_0402_1%

DIS@

12

RV166

4.99K_0402_1%

DIS@

4

HANNEL A: 256MB/512MB DDR3

C

E3

M

DA29

D

QL0

F7

M

DA27

D

QL1

F2

M

DA30

D

QL2

F8

DA26

M

D

QL3

H3

M

DA28

D

QL4

H8

DA24

M

QL5

D

G2

M

DA31

D

QL6

H7

M

DA25

QL7

D

D7

DA0

M

DQU0

C3

MDA5

DQU1

C8

MDA1

DQU2

C2

MDA6

DQU3

A7

MDA3

DQU4

A2

MDA4

DQU5

B8

MDA2

DQU6

A3

MDA7

DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

96-BALL SDRAM DDR3L

15mil 15mil 15mil 15mil 15mil 15mil 15mil 15mil

VREFD_Q1 VREFD_Q2

0.1U_0402_16V7K

12

CV226

DIS@

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

4.99K_0402_1%

+1.5VGS

RV157

DIS@

RV167

DIS@

+1.5VGS

12

V

REFC_A2

V

REFD_Q2

A_BA0 A_BA0 A_BA0 A_BA1 A_BA1 A_BA1 A_BA2 A_BA2 A_BA2

CLKA0 CLKA0# CKEA0 CKEA1

ODTA0 ODTA1 CSA0#_0 CSA1#_0 RASA0# RASA1# CASA0# CASA1# WEA0# WEA1#

QSA2 QSA4 QSA1

DQMA#2 DQMA#4 DQMA#1

QSA#2 QSA#4 QSA#1

DRAM_RST# DRAM_RST# DRAM_RST#

12

RV151

240_0402_1%

DIS@

VREFC_A1 VREFC_A2

0.1U_0402_16V7K

12

CV227

DIS@

UV19

M8

V

REFCA

H1

V

REFDQ

N3

AA0

M

A

0

P7

M

AA1

A

1

P3

AA2

M M M M M M MAA8 MAA8 MAA8 MAA9 MAA9 MAA9 MAA10 MAA10 MAA10 MAA11 MAA11 MAA11 MAA12 MAA12 MAA12 MAA13 MAA13 MAA13 MAA14 MAA14 MAA14

AA3 AA4 AA5 AA6 AA7

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9 M7

4.99K_0402_1%

2

A A

3 4

A A

5 6

A A7 A8 A9 A10/AP A11 A12/BC A13 A14

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ

NC NC NC NC NC

96-BALL SDRAM DDR3L

K4W2G1646E-BC11_FBGA96~D

12

RV158

DIS@

12

RV168

DIS@

3

AA0

M M

AA1 AA2

M M

AA3

M

AA4

M

AA5

M

AA6 AA7

M

4.99K_0402_1%

DIS@

UV20

M8

V

REFCA

H1

V

REFDQ

N3

A

0

P7

A

1

P3

2

A

N2

A

3

P8

4

A

P2

A

5

R8

6

A

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC

L1

NC

J9

NC

L9

NC

M7

NC

96-BALL SDRAM DDR3L

K4W2G1646E-BC11_FBGA96~D

12

RV160

DIS@

12

DIS@

12

CV230

RV170

D

QL0

D

QL1

D

QL2

D

QL3

D

QL4 QL5

D D

QL6 QL7

D

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VREFC_A3

0.1U_0402_16V7K

4.99K_0402_1%

E3

M

QL0 QL1 QL2 QL3 QL4 QL5 QL6 QL7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

0.1U_0402_16V7K

F7

M

F2

M

F8

M

H3

M

H8

M

G2

M

H7

M

D7

M

C3

MDA10

C8

MDA14

C2

MDA11

A7

MDA13

A2

MDA9

B8

MDA12

A3

MDA8

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

4.99K_0402_1%

DIS@

DA18 DA23 DA19 DA20 DA17 DA21 DA16 DA22

DA15

RV159

DIS@

RV169

+1.5VGS

12

D D D D D D D D

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

12

CV228

240_0402_1%

12

CV229

DIS@

RV152

DIS@

V

REFC_A3

V

REFD_Q3

CLKA1<29> CLKA1#<29> CKEA1<29>

ODTA1<29> CSA1#_0<29> RASA1#<29> CASA1#<29> WEA1#<29>

QSA5

DQMA#5

QSA#5

12

0.1U_0402_16V7K

2

AA0

M M

AA1 AA2

M M

AA3

M

AA4

M

AA5

M

AA6 AA7

M

4.99K_0402_1%

UV21

M8

V

REFCA

H1

V

REFDQ

N3

A

0

P7

A

1

P3

2

A

N2

A

3

P8

4

A

P2

A

5

R8

6

A

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC

L1

NC

J9

NC

L9

NC

M7

NC

96-BALL SDRAM DDR3L

K4W2G1646E-BC11_FBGA96~D

12

RV162

DIS@

12

DIS@

12

CV232

DIS@

RV172

D

QL0

D

QL1

D

QL2

D

QL3

D

QL4 QL5

D D

QL6 QL7

D

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VREFC_A4

0.1U_0402_16V7K

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

RV163

4.99K_0402_1%

DIS@

RV173

4.99K_0402_1%

DIS@

M

DA55

M

DA51

M

DA50 DA52

M M

DA48 DA53

M M

DA49

M

DA54

DA60

M MDA58 MDA63 MDA56 MDA61 MDA59 MDA62 MDA57

E3

M

DA38

F7

M

DA36

F2

M

DA39

F8

DA34

M

H3

M

DA35

H8

DA33

M

G2

M

DA37

H7

M

DA32

D7

DA42

M

C3

MDA44

C8

MDA40

C2

MDA46

A7

MDA43

A2

MDA45

B8

MDA41

A3

MDA47

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

12

RV161

DIS@

12

RV171

DIS@

240_0402_1%

12

CV231

DIS@

RV153

DIS@

VREFD_Q3

0.1U_0402_16V7K

V V

12

REFC_A4 REFD_Q4

CLKA1 CLKA1#

QSA6 QSA7

DQMA#6 DQMA#7

QSA#6 QSA#7

+1.5VGS

12

DIS@

CV233

12

1

VREFD_Q4

0.1U_0402_16V7K

+1.5VGS

1

CV235

CV236

2

DIS@

0.1U_0402_16V7K

A A

0.1U_0402_16V7K

1

CV237

2

DIS@

0.1U_0402_16V7K

1

CV238

2

DIS@

0.1U_0402_16V7K

1

CV239

CV240

2

DIS@

0.1U_0402_16V7K

1

CV241

CV242

2

DIS@

0.1U_0402_16V7K

1

CV244

CV243

2

DIS@

0.1U_0402_16V7K

1

CV245

2

DIS@

0.1U_0402_16V7K

1

CV246

CV247

2

DIS@

0.1U_0402_16V7K

5

4

+1.5VGS

CV248

DIS@

10U_0603_6.3V6M

+1.5VGS +1.5VGS

1

2

1

CV249

2

DIS@

10U_0603_6.3V6M

1

CV250

CV251

2

DIS@

10U_0603_6.3V6M

3

1

CV252

2

1U_0402_6.3V6K

DIS@

1

CV253

CV254

2

1U_0402_6.3V6K

DIS@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

CV255

2

1U_0402_6.3V6K

DIS@

1

CV256

CV257

2

1U_0402_6.3V6K

DIS@

2012/08/22 2013/08/31

1

CV258

2

1U_0402_6.3V6K

DIS@

1

CV259

CV260

2

1U_0402_6.3V6K

DIS@

Compal Secret Data

1

CV261

2

1U_0402_6.3V6K

DIS@

Deciphered Date

2

1

CV262

CV263

2

1U_0402_6.3V6K

DIS@

1

CV264

CV265

2

1U_0402_6.3V6K

DIS@

1

CV266

2

1U_0402_6.3V6K

DIS@

1

CV267

CV268

2

1U_0402_6.3V6K

DIS@

Title

ATI_ThamesXT_M2_VRAM_A

Size Document Number Rev

Date: Sheet of

1

CV269

2

1U_0402_6.3V6K

DIS@

Compal Electronics, Inc.

CV270

1U_0402_6.3V6K

DIS@

2

LA-9101P

1

CV271

2

1U_0402_6.3V6K

DIS@

0.4

30 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

UV22

M8

V

REFC_A1_B

V

DRAM_RST#<29,30>

RV176

240_0402_1%

DIS@

REFD_Q1_B

B_BA0<29> B_BA1<29> B_BA2<29>

CLKB0<29> CLKB0#<29> CKEB0<29>

ODTB0<29> CSB0#_0<29> RASB0#<29> CASB0#<29> WEB0#<29>

QSB3 QSB2 QSB4 QSB0 QSB1

DQMB#3 DQMB#2 DQMB#4 DQMB#0 DQMB#1

QSB#3 QSB#2 QSB#4 QSB#0 QSB#1

12

M

DIS@

DB[0..63]

AB[14..0]

M

DQMB#[7..0]

QSB[7..0]

QSB#[7..0]

12

CV272

0.01U_0402_16V7K

DIS@

CV273

0.01U_0402_16V7K

DIS@

M

DB[0..63]<29>

D D

M

AB[14..0]<29>

DQMB#[7..0]<29>

QSB[7..0]<29>

QSB#[7..0]<29>

1 2

CLKB0

C C

RV174 56_0402_1%

1 2

CLKB0#

RV175 56_0402_1%

DIS@

1 2

CLKB1

RV180 56_0402_1%

DIS@

1 2

CLKB1#

RV181 56_0402_1%

V

REFCA

H1

V

REFDQ

N3

AB0

M

A

0

P7

M

AB1

A

1

P3

AB2

M

2

A

N2

M

AB3

A

3

P8

M

AB4

4

A

P2

M

AB5

A

5

R8

M

AB6

6

A

R2

AB7

M

A7

T8

MAB8 MAB8 MAB8 MAB8

A8

R3

MAB9 MAB9 MAB9 MAB9

A9

L7

MAB10 MAB10 MAB10 MAB10

A10/AP

R7

MAB11 MAB11 MAB11 MAB11

A11

N7

MAB12 MAB12 MAB12 MAB12

A12/BC

T3

MAB13 MAB13 MAB13 MAB13

A13

T7

MAB14 MAB14 MAB14 MAB14

A14

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC

L1

NC

J9

NC

L9

NC

M7

NC

96-BALL SDRAM DDR3L

K4W2G1646E-BC11_FBGA96~D

D D D D D D D D

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

4

HANNEL B: 256MB/512MB DDR3

C

E3

M

DB29

QL0

F7

M

DB26

QL1

F2

M

DB30

QL2

F8

DB27

M

QL3

H3

M

DB31

QL4

H8

DB25

M

QL5

G2

M

DB28

QL6

H7

M

DB24

QL7

D7

DB0

M

C3

MDB4

C8

MDB1

C2

MDB6

A7

MDB3

A2

MDB7

B8

MDB2

A3

MDB5

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

RV177

240_0402_1%

DIS@

V

REFC_A2_B

V

REFD_Q2_B

B_BA0 B_BA0 B_BA0 B_BA1 B_BA1 B_BA1 B_BA2 B_BA2 B_BA2

CLKB0 CLKB0# CKEB0 CKEB1

ODTB0 ODTB1 CSB0#_0 CSB1#_0 RASB0# RASB1# CASB0# CASB1# WEB0# WEB1#

DRAM_RST# DRAM_RST# DRAM_RST#

12

M8 H1

N3

AB0

M

P7

M

AB1

P3

AB2

M

N2

M

AB3

P8

M

AB4

P2

M

AB5

R8

M

AB6

R2

AB7

M

T8 R3

L7 R7 N7 T3 T7

M2 N8 M3

J7 K7 K9

K1

L2

J3 K3

L3

F3 C7

E7 D3

G3 B7

T2

L8

J1

L1

J9

L9 M7

UV23

V

REFCA

V

REFDQ

A

0

A

1 2

A A

3 4

A A

5 6

A A7 A8 A9 A10/AP A11 A12/BC A13 A14

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ

NC NC NC NC NC

96-BALL SDRAM DDR3L

K4W2G1646E-BC11_FBGA96~D

D D D D D D D D

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

3

UV24

E3

M

DB16

QL0

F7

M

DB19

QL1

F2

M

DB20

QL2

F8

DB22

M

QL3

H3

M

DB17

QL4

H8

DB21

M

QL5

G2

M

DB18

QL6

H7

M

DB23

QL7

D7

DB15

M

C3

MDB10

C8

MDB14

C2

MDB11

A7

MDB12

A2

MDB9

B8

MDB13

A3

MDB8

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

RV178

240_0402_1%

DIS@

CLKB1<29> CLKB1#<29> CKEB1<29>

ODTB1<29> CSB1#_0<29> RASB1#<29> CASB1#<29> WEB1#<29>

V

REFC_A3_B

V

REFD_Q3_B

QSB5

DQMB#5

QSB#5

12

M8

H1

N3

AB0

M

P7

M

AB1

P3

AB2

M

N2

M

AB3

P8

M

AB4

P2

M

AB5

R8

M

AB6

R2

AB7

M

T8 R3

L7 R7 N7 T3 T7

M2

N8

M3

J7 K7 K9

K1

L2

J3 K3

L3

F3 C7

E7 D3

G3 B7

T2

L8

J1

L1

J9

L9

M7

V

REFCA

V

REFDQ

A

0

A

1 2

A A

3 4

A A

5 6

A A7 A8 A9 A10/AP A11 A12/BC A13 A14

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ

NC NC NC NC NC

96-BALL SDRAM DDR3L

K4W2G1646E-BC11_FBGA96~D

D D D D D D D D

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

2

E3

M

QL0 QL1 QL2 QL3 QL4 QL5 QL6 QL7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

DB33

F7

M

DB37

F2

M

DB35

F8

DB39

M

H3

M

DB32

H8

DB36

M

G2

M

DB34

H7

M

DB38

D7

DB44

M

C3

MDB41

C8

MDB47

C2

MDB43

A7

MDB45

A2

MDB40

B8

MDB46

A3

MDB42

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

RV179

240_0402_1%

DIS@

V

REFC_A4_B

V

REFD_Q4_B

CLKB1 CLKB1#

QSB6 QSB7

DQMB#6 DQMB#7

QSB#6 QSB#7

12

M8 H1

N3

AB0

M

P7

M

AB1

P3

AB2

M

N2

M

AB3

P8

M

AB4

P2

M

AB5

R8

M

AB6

R2

AB7

M

T8

R3

L7 R7 N7

T3

T7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9 M7

UV25

REFCA REFDQ

0 1 2 3 4 5 6

96-BALL SDRAM DDR3L

D D D D D D D D

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS

V V

A A A A A A A A7 A8 A9 A10/AP A11 A12/BC A13 A14

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ

NC NC NC NC NC

K4W2G1646E-BC11_FBGA96~D

1

E3

M

QL0 QL1 QL2 QL3 QL4 QL5 QL6 QL7

VSS VSS VSS

DB55

F7

M

DB50

F2

M

DB54

F8

DB51

M

H3

M

DB53

H8

DB49

M

G2

M

DB52

H7

M

DB48

D7

DB56

M

C3

MDB59

C8

MDB63

C2

MDB62

A7

MDB57

A2

MDB61

B8

MDB58

A3

MDB60

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

B B

+1.5VGS

1

CV283

CV282

2

DIS@

0.1U_0402_16V7K

A A

0.1U_0402_16V7K

1

CV285

CV284

2

DIS@

0.1U_0402_16V7K

5

+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS

4.99K_0402_1%

1

CV286

2

DIS@

0.1U_0402_16V7K

12

RV182

DIS@

15mil 15mil 15mil 15mil 15mil 15mil 15mil 15mil

VREFD_Q1_B VREFD_Q2_B

12

1

RV190

DIS@

CV287

DIS@

0.1U_0402_16V7K

CV274

2

DIS@

0.1U_0402_16V7K

1

CV288

2

DIS@

0.1U_0402_16V7K

1

CV289

CV290

2

DIS@

0.1U_0402_16V7K

4.99K_0402_1%

1

CV291

2

DIS@

0.1U_0402_16V7K

RV183

DIS@

RV191

DIS@

12

VREFC_A1_B

12

1

CV275

2

DIS@

0.1U_0402_16V7K

1

CV292

2

DIS@

1

CV294

CV293

2

DIS@

0.1U_0402_16V7K

4

RV184

4.99K_0402_1%

DIS@

RV192

4.99K_0402_1%

DIS@

12

VREFC_A2_B

12

1

CV276

2

DIS@

0.1U_0402_16V7K

+1.5VGS

1

CV295

2

DIS@

10U_0603_6.3V6M

RV185

4.99K_0402_1%

DIS@

RV193

4.99K_0402_1%

DIS@

1

CV296

2

DIS@

10U_0603_6.3V6M

12

1

CV277

2

DIS@

0.1U_0402_16V7K

1

CV298

CV297

2

DIS@

10U_0603_6.3V6M

3

12

RV186

4.99K_0402_1%

DIS@

VREFC_A3_B

12

1

RV194

4.99K_0402_1%

DIS@

+1.5VGS +1.5VGS

1U_0402_6.3V6K

CV278

2

DIS@

0.1U_0402_16V7K

1

CV299

2

DIS@

1

CV301

CV300

2

1U_0402_6.3V6K

DIS@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4.99K_0402_1%

1

CV302

2

1U_0402_6.3V6K

DIS@

12

RV187

DIS@

VREFD_Q3_B

12

1

RV195

DIS@

CV279

2

DIS@

0.1U_0402_16V7K

1

CV303

CV304

2

1U_0402_6.3V6K

DIS@

2012/08/22 2013/08/31

1

CV305

2

1U_0402_6.3V6K

DIS@

1

CV306

2

1U_0402_6.3V6K

DIS@

Compal Secret Data

RV188

4.99K_0402_1%

DIS@

RV196

4.99K_0402_1%

DIS@

1

CV307

2

1U_0402_6.3V6K

DIS@

Deciphered Date

12

1

CV308

2

DIS@

2

CV280

DIS@

0.1U_0402_16V7K

VREFC_A4_B

1

2

4.99K_0402_1%

1

CV310

2

1U_0402_6.3V6K

DIS@

RV189

DIS@

RV197

DIS@

12

VREFD_Q4_B

12

1

CV281

2

DIS@

0.1U_0402_16V7K

1

CV312

CV311

2

1U_0402_6.3V6K

DIS@

1

CV313

CV314

2

1U_0402_6.3V6K

DIS@

Title

Size Document Number Rev

Date: Sheet of

1

CV316

CV315

2

1U_0402_6.3V6K

DIS@

Compal Electronics, Inc.

ATI_ThamesXT_M2_VRAM_B

1

CV317

2

1U_0402_6.3V6K

DIS@

1

CV318

2

1U_0402_6.3V6K

DIS@

LA-9101P

1

31 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

=40mils

W

3VALW

+

1

L38

C

1U_0402 _6.3V6K

+_BIAS

D D

10K_040 2_5%

WOL_E N#<4 0>

C C

+LAN_IO

B B

A A

WOL_E N#

PCIE_PRX _LANTX_P1< 14>

PCIE_PRX _LANTX_N1<14 >

PCIE_PTX_ LANRX_P1< 14> PCIE_PTX_ LANRX_N1<14 >

10K_040 2_5%

1 2

RL34

12

3.3V : Enable switching regulator 0V : Disable switching regulator

10/100

B

+

3VALW

R

L18

L28

R

470K_04 02_5%

1 2

13

D

2

QL2

G

2N7002B KW_SOT323 -3~D

S

CL28,C30 Close UL1

1 2

CL28 0.1U_0402 _16V7K

1 2

CL30 0.1U_0402 _16V7K

LAN_CLKR EQ#<14 >

PLT_RST#<16,38,40,6 >

CLK_PCIE _LAN<1 4> CLK_PCIE _LAN#<1 4>

PCIE_W AKE#

ENSWRE G ISOLATEB

RL36 0_0402_ 5%

：：：：

100@ (LDO mode used)

5

PCIE_W AKE#<15, 40>

+3VS

2

EN_WOL

1 2

RL31 2.4 9K_0402_ 1%

12

RL33 1K_0402 _5%

RL35 15K_040 2_5%

1 2

2 1

6

2 1

PCIE_CRX_ C_DTX_P0

PCIE_CRX_ C_DTX_N0

PCIE_W AKE#

ISOLATEB

ENSWRE G

+LAN_VDDRE G

P3

@

J

2MM Q

L1

D

S

45

SI3456DD V-T1-GE3_TSOP6 ~D

G

3

RL27

1.5M_040 2_5%

1 2

XTLO

XTLI

1

2

UL1

22

HSOP

23

HSON

17

HSIP

18

HSIN

16

CLKREQB

25

PERSTB

19

REFCLK_P

20

REFCLK_N

43

CKXTAL1

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

14

NC/SMBCLK

15

NC/SMBDATA

38

GPO/SMBALERT

33

ENSWREG

34

VDDREG

35

VDDREG

46

RSET

24

GND

49

PGND

S IC RTL810 5E-VD-CGT QFN 48 P LAN CTRL

4

LAN_IO rising time : >1ms and <100ms

+

LAN_IO

0.1U_0402_16V7K

1

2

CL21

+LAN_IO

+

1.5A

1

L19

L16

C

@

2

0.1U_0402_16V7K

1

CL22

0.1U_0402_16V7K

+LAN_VDD

CL23

2

0.1U_0402_16V7K

RL26

1 2

0_0603_ 5%~D

@

2

W=40mils

L15

C

0.1U_0603_50V_X7R

CL39

31

LED3/EEDO

37

LED1/EESK

40

LED0

30 32

1 2 4 5 7 8 10 11

13 29 41

27 39

12 42 47 48

21

3 6 9 45

36

LAN_CLKR EQ#

WOL_E N#

MDI0+ MDI0MDI1+ MDI1-

+LAN_EVD D10

RL23 10K_04 02_5%@ RL24 10K_04 02_5%

EECS/SCL

EEDI/SDA

MDIP0

MDIN0

MDIP1

MDIN1 NC/MDIP2 NC/MDIN2 NC/MDIP3 NC/MDIN3

DVDD10 DVDD10 DVDD10

DVDD33 DVDD33

AVDD33 AVDD33 AVDD33 AVDD33

EVDD10

AVDD10 AVDD10 AVDD10 AVDD10

REGOUT

These caps close to Pin 12,27,39,42,47,48 For 8105E-VD pop the capacitor close pin 27,39,47,48

+LAN_VDD

1

CL20

2

These caps close to Pin 3,6,9,13,29,41,45 For 8105E-VD pop capacitor close to pin 13,29,45

1 2 1 2

@

+LAN_VDD

+LAN_IO

+LAN_VDD

@

RL37 10K_04 02_5%

1 2

RL38 10K_04 02_5%

1 2

@

Reserve 10K pul l LAN_IO

4

3

1

2

0.1U_0402_16V7K

1

@

2

L18

L17

C

@

2

0.1U_0402_16V7K

1

CL25

CL24

0.1U_0402_16V7K

@

2

0.1U_0402_16V7K

W=20mils

+LAN_EVD D10

1

CL35

CL34

2

0.1U_0402_16V7K

3

1

L27

C

2

0.1U_0402_16V7K

1

CL26

2

0.1U_0402_16V7K

1

2

1U_0402_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

M

CT0

CT1

M

CL36

1 2

12P_040 2_50V8J

XTAL@

CL37

1 2

12P_040 2_50V8J

XTAL@

MDO1-

MDO1+

MDO0-

MDO0+

RL30 0_0402 _5%

1

3

25MHZ_10 PF_7V2500 0014

JLAN

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

SANTA_130 456-311

CONN@

2012/08/22 2013/08/31

2

1 2

R

L19 75_06 03_5%

1 2

L20 75_06 03_5%

R

Place close to TCT pin

MDI1MDI1+

MDI0MDI0+

2

CL41

0.01U_04 02_16V7K

1

XTAL@

12

XTAL@

GND

XTLI

2

4

XTLO

YL2

OSC

RJ45 Conn.

SP011207090

DC234004V00 (OLD)

Compal Secret Data

Deciphered Date

2

TL1

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT

7

TD+ TD-8TX-

X'FORM_ NS0 014

SHLD1

SHLD2

1

CL33 100P_12 06_2KV8J

2

RX+

RX-

NC NC

TX+

9

10

1

2

3

@

DL11

PESD5V0 U2BT_SOT23-3~D

1

16

MDO1-

15

MDO1+

14

MCT0

CT

13 12 11

MCT1

CT

10

MDO0-

9

MDO0+

CLK_LAN _25M<14>

DL11 as close as possible to C27 and C32

CLK_LAN _25M XTLI

Title

LAN RTL8105E

Size Docum ent Number Rev

LA-9101P

Date: Sheet of

12

RL21

GCLK@

0_0402_ 5%

Compal Electronics, Inc.

1

12

RL39 22_0402 _5%

32 57Wednesday, August 29, 2012

@

0.4

CyberForum.ru

5

+

5V_PVDD

CA56

0.1U_0402_16V7K

1

D D

CA58

CA59, CA60 Close to UA1 Pin36

HDA_RST_AUDIO#

0.1U_0402_16V7K

C C

Place close to UA1.11

1

CA68

2

HDA_BITCLK_AUDIO

22P_0402_50V8J

CA21

2

+3VS

1

4.7U_0603_6.3V6K

0.1U_0402_16V7K

CA57

2

HDA_SDIN0<13> HDA_SDOUT_AUDIO<13> HDA_BITCLK_AUDIO<13> HDA_SYNC_AUDIO<13> HDA_RST_AUDIO#<13>

4.7U_0603_6.3V6K

+MIC2-VREFO

1

2

CA55

10U_0603_6.3V6M

1

2

+3VS

CA59

RA9 0_0402_1%@

+1.5VS

RA10 0_0402_5%

+3VS

RA130 22_0402_5%

RA129 22_0402_5%

+MIC2-VREFO

+

5V_PVDD

0.1U_0402_16V7K

1

2

1

2

1 2 1 2

@

1 2

CA23 2.2U_0603_6.3V6K RA153 20K_0402_1%

+

5VA

CA53

CA54

10U_0603_6.3V6M

1

2

CA60

1

0.1U_0402_16V7K

2

4.7U_0603_6.3V6K

1 2

CA24 1U_0402_6.3V6K

1 2

CA25 1U_0402_6.3V6K

1 2

RA49 0_0402_5%@

1 2

RA50 0_0402_1%@

1 2

CA62 10U_0603_6.3V6M

1 2

CA63 10U_0603_6.3V6M

1 2

CA64 10U_0603_6.3V6M

0.1U_0402_16V7K

1

2

CA51

CA61

HDA_BITCLK

1

2

CA71

4.7U_0603_6.3V6K

26 41 46

1

36

9

40

1

2

8 5

6 10 11

28 15

37 35 34

31 30 29

27 39

7

4 25 38

49

4

+

5V_PVDD

5VA

+

UA1

AVDD1 PVDD1 PVDD2

DVDD CPVDD

DVDD-IO AVDD2

SDATA-IN SDATA-OUT BCLK SYNC RESETB

VREF JDREF

CBP CBN CPVEE

MIC1-VREFO-L MIC1-VREFO-R MIC2-VREFO

LDO1-CAP LDO2-CAP LDO3-CAP

DVSS AVSS1 AVSS2

Thermal PAD

ALC3221-CG_MQFN48_6X6~D

R

0_0603_1%

R

0_0603_1%

LINE2-L(PORT-E-L )

LINE2-R(PORT-E-R )

LINE1-L(PORT-C-L )

LINE1-R(PORT-C- R)

MIC1-R(PORT-B-R)

MIC1-L(PORT-B-L)

MIC2-R(PORT-F-R)

MIC2-L(PORT-F-L)

HPOUT-R(PORT -I-R)

HPOUT-L(PORT -I-L)

SPDIF-OUT/GPIO2

GPIO0/DMIC-DATA

GPIO1/DMIC-CLK

A203

@

A204

@

MONO-OUT

SPK-OUT-R+

SPK-OUT-R-

SPK-OUT-L-

SPK-OUT-L+

12

PCBEEP

SENSE B SENSE A

+

12

16

24 23

22 21

20 19

18 17

14 13

45 44 43 42

33 32

48

2 3

47

PDB

5VS

1 2

CA65

0.1U_0402_16V7K

@

1 2

CA67 4.7U_0603_6.3V6K

1 2

CA66 4.7U_0603_6.3V6K

1 2

RA51 39.2K_0402_1%

INT-SPK-R+ INT-SPK-RINT-SPK-LINT-SPK-L+

HPOUT-R HPOUT-L

MIC_DATA MIC_CLK_C

EC_MUTE#

MIC_CLK_C MIC_CLK

RA131

22_0402_5%

RA79 1K_0402_1%

CA365 100P_0402_50V8J@

RA81 10K_0402_5%@

MIC_DATA <21>

EC_MUTE# <40>

12

RA23 1K_0402_1%

1

22P_0402_50V8J

2

3

1 2

JACK_SENSE#

1

2

CA22

@

12

RA1107

22K_0402_1%

1 2

CA70

10U_0603_6.3V6M

PC_BEEP

MIC_CLK <21>

MIC_IN

MIC_IN MIC_IN

2

J

ACK_PLUG Delay cricutis

+

3VS

12

R

A1

@

10K_0402_5%

JACK_PLUG#

10U_0603_6.3V6M

+MIC2-VREFO

RA53

2.2K_0402_5%

1 2

RA1108 22K_0402_1%

1 2

EC Beep

ICH Beep

A4A

@

Q

DMN66D0LDW-7_SOT363-6

1 2

RA3

@

100K_0402_5%

1

CA1

@

2

+

3VS

12

R

A2

@

100K_0402_5%

61

2

JACK_PLUG# JACK_SENSE#

5

1

CA2

@

10U_0603_6.3V6M

2

1 2

RA4 0_0402_5%

J

ACK_SENSE#

3

A4B

@

Q

DMN66D0LDW-7_SOT363-6

4

Reserve for cancel Delay cricutis

1 2

RA25 0_0603_1%@

1 2

RA28 0_0603_1%@

1 2

RA29 0_0603_1%@

1 2

RA30 0_0603_1%@

1 2

RA31 0_0603_1%@

1 2

RA32 0_0603_1%@

GNDA GND

Place on the moat between GND & GNDA.

DA8

BEEP#<40>

HDA_SPKR<13>

2

1

3

BAT54C-7-F_SOT23-3

0.1U_0402_16V7K

12

RA19

@

10K_0402_5%

CA41

1 2

1

PC_BEEP

PC Beep

B B

Close to UA1 Pin11,13,14,16

INT-SPK-RINT-SPK-R+

LA7

iPhone type Combo Jack

FBMA-L10-160808-800LMT_2P

12

AUD_HP_OUT_L_CN

12

AUD_HP_OUT_R_CN

12

2

3

2

3

DA10

CA39

100P_0402_50V8J

1

2

CA38

CA33

100P_0402_50V8J

1

2

4

AZ5125-02S.R7G_SOT23-3

1

EMC@

AZ5125-02S.R7G_SOT23-3

1

EMC@

MIC_IN

18_0402_5%

1 2

RA55

HPOUT-R

RA56

A A

AUD_HP_OUT_LLHPOUT-L

18_0402_5%

1 2

AUD_HP_OUT_RL JACK_PLUG# AUD_HP_NB_SENSE_R

LA8 FBMA-L10-160808-800LMT_2P

LA9 FBMA-L10-160808-800LMT_2P

RA21 0_0402_5%

5

JHP

CONN@

3

6

1

2 4

5

DA12

SINGA_2SJ-E960-001F

DC230007Y00

DC021103300 (OLD)

3

INT-SPK-LINT-SPK-L+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

LA3 0_0603_5%~D

1 2

LA4 0_0603_5%~D

1 2

LA5 0_0603_5%~D

1 2

LA6 0_0603_5%~D

Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R-

Speaker 4 ohm : 40mil

Speaker 8 ohm : 20mil

2012/08/22 2013/08/31

close to Codec

SPK_R1-_CONN SPK_R2+_CONN SPK_L1-_CONN SPK_L2+_CONN

1

CA29

2

1000P_0402_50V7K

Compal Secret Data

Deciphered Date

2

JSPK

1

2

3

5

3

GND

4

6

4

2

3

2

3

DA5

AZ5125-02S.R7G_SOT23-3

EMC@

AZ5125-02S.R7G_SOT23-3

1

Title

Size Document Number Rev

Date: Sheet of

1

CA30

2

1

CA32

CA31

2

1000P_0402_50V7K

GND

E&T_3703-Q04N-11R

DA6

CONN@

SP02000H300

EMC@

Compal Electronics, Inc.

Audio Codec ALC3221

LA-9101P

1

0.4

33 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

2

1

D D

+VCC_3IN1+3VS

WCM-2012HS-900T_4P

USB20_CR_P10<16>

USB20_CR_N10<16>

C C

B B

USB20_CR_P10

USB20_CR_N10

1

4

LR2

RR8 0_0402_5%@

RR7 0_0402_5%@

1

4

EMC@

1 2

2

3

0.1U_0402_16V7K

USB20_CR_P10_R

USB20_CR_N10_R

+3VS

1

CR1

2

1

CR2

4.7U_0603_6.3V6K

2

12

RR1 6.19K_0402_1%

USB20_CR_N10_R USB20_CR_P10_R

CR3

CR4

2

1

1U_0402_6.3V6K

RREF

UR1

1

RREF

2

DM

3

DP

7

XD_CD#

23

XD_D7

17

GPIO0

6

SDREG

24

V18

Trace width:40mil

4

5

3V3_IN

CARD_3V3

RTS5179-GR_QFN24

Thermal pad

25

RTS5179-GR_QFN24_4X4

22

MS_BS

SP14 SP13 SP12 SP11 SP10

21 20 19 18 16

SP9

15

SP8

14

SP7

13

SP6

12

SP5

11

SP4

10

SP3

9

SP2

8

SP1

SD_D2

MS_D1_SD_D3

SD_CMD MS_D0 MS_D2_SD_CLK_R MS_D2_SD_CLK

SD_CD# MS_D3

SD_D0

SD_D1 MS_INS# MS_CLK_SD_WP_R MS_CLK_SD_WPV18

S

D_CD#

C

0.1U_0402_16V7K

close to chip side

1 2

RR2 0_0402_5%

1 2

RR3 0_0402_5%

+VCC_3IN1

1

CR8

4.7U_0603_6.3V6K

2

1

CR7

0.1U_0402_16V7K

2

Close to JREAD1

R9

1

2

SD_CMD

CR11

10P_0402_50V8J

M

S_INS#

0.1U_0402_16V7K

For ESD request. Place close to UR1

RR4

@

10K_0402_5%

1 2

12

C

R10

CR55P_0402_50V8C

1

2

SD_D2

MS_D1_SD_D3

MS_CLK_SD_WP SD_CMD MS_D3 MS_INS#

MS_D2_SD_CLK

MS_D0 MS_D1_SD_D3 MS_D2_SD_CLK MS_BS

SD_D0 SD_D1 SD_CD#

MS_CLK_SD_WP

1

2

拉

MS_D2_SD_CLK到Conn pin 13 SD_CLK

再再

Via拉到pin 10 MS_D2

拉

MS_CLK_SD_WP到Conn pin 5 MS_CLK

CR65P_0402_50V8C

1

再再

2

Via拉到pin 20 SD_W

+VCC_3IN1

JREAD

1

SD-DAT2

2

MS-VSS1

3

SD-CD/DAT3 MMC -RSV

4

MS-VCC

5

MS-SCLK

6

SD-CMD MMC-C MD

7

MS-DATA3

8

MS-INS

9

SD-VSS MMC-VSS1

10

MS-DATA2

11

SD-VDD MMC-VDD

12

MS-DATA0

13

MS-DATA1

14

SD-CLK MMC-CL K

15

MS-BS

16

MS-VSS2

17

SD-VSS MMC-VSS2

18

SD-DAT0 MMC-DAT

19

SD-DAT1

20

SD-CD SD-GND21GND1

22

SD-WP(SW )

T-SOL_143-2300302602_RV

CONN@

SP071204100

LTCX004AK00

GND2

23 24

For ESD request. Place close to JREAD

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Card Reader RTS5179

LA-9101P

1

34 57Wednesday, August 29, 2012

0.4

CyberForum.ru

A

+

5VALW to +5VS

+

5VALW

Z1

Q

1 1

B+_BIAS

DMN66D0LDW-7_SOT363-6

1

CZ1 10U_0805_10V6K

2

RZ4

1 2

56K_0402_5%

SUSP

1

CZ2 10U_0805_10V6K

2

5

8 7 6 5

1 2

@

RZ5 0_0402_1%

3

QZ2B

4

SI4128DY-T1-GE3_SO8

4

0.1U_0603_50V_X7R

1

2

CZ9

1 2 3

1 2

5VS

+

C

Z3

@

RZ6

1.5M_0402_5%

1

2

+3VALW to +3VS

+3VALW

QZ7 SI4128DY-T1-GE3_SO8

2 2

Reserve for ESD

CZ23

12

0.1U_0402_16V7K

SUSP

B+_BIAS

1

CZ11 10U_0805_10V6K

2

RZ13

1 2

56K_0402_5%

SUSP

QZ9

2N7002K_SOT23-3

1

CZ12 10U_0805_10V6K

2

G

8 7 6 5

RZ14

39.2K_0402_1%

13

D

S

4

0.1U_0603_50V_X7R

1

2

Please close to QZ9

+1.5V To +1.5VS

B+_BIAS

12

RZ18

3 3

SUSP

+5VALW

+3VS

4 4

+3VS +1.05VS

470K_0402_5%

13

D

2

G

S

1 2

CZ24

@

0.1U_0402_16V7K

1 2

CZ25

@

0.1U_0402_16V7K

1 2

CZ26

@

0.1U_0402_16V7K

1 2

CZ27

@

0.1U_0402_16V7K

1 2

CZ28

@

0.1U_0402_16V7K

1 2

CZ29

@

0.1U_0402_16V7K

1 2

RZ20 0_0402_1%

QZ11

2N7002BKW_SOT323-3~D

+5VALW

UZ1

+1.5V +1.5VS

SI4634DY-T1-E3_SO8~D

8 7 6 5

@

0.1U_0603_50V_X7R

1

CZ20

2

Reserve for ESD

+3VS

1 2 3

1

2

CZ15

@

RZ15

2M_0402_5%~D

1 2

1 2 3

CZ18

4

12

RZ21

2M_0402_5%~D

A

B

10U_0805_10V6K

1U_0603_10V6K

1

C

Z4

CZ13 10U_0805_10V6K

10U_0805_10V6K

CZ19

1

2

470_0402_5%

SUSP SUSP

2

0.1U_0402_16V7K

QZ13A

+1.5VS

RZ23

2

B

RZ1 470_0603_5%

1 2

+5VS_D

61

QZ2A

DMN66D0LDW-7_SOT363-6

1

CZ14 1U_0603_10V6K

2

12

+1.5VS_D

61

2N7002DW-7-F_SOT363-6

2

SUSP

470_0402_5%

SUSP

QZ13B

1

CZ5 10U_0805_10V6K

2

PCH_PWR_EN#

SUSP

12

1

2

RZ25

QZ14A

2

1 2

RZ7 470K_0402_5%

2N7002K_SOT23-3

2

G

0.1U_0603_50V_X7R

@

CZ16

+3V_PCH

12

+3V_D

61

2N7002DW-7-F_SOT363-6

B+_BIAS

SUSP#<10,40,48,49,50>

RZ16 100K_0402_5%

12

RZ24

+VCCP_D

3

5

4

470_0402_5%

PCH_PWR_EN#

2N7002DW-7-F_SOT363-6

C

+3VALW to +3V_PCH

+

3VALW

1

CZ6 10U_0805_10V6K

2

1 2

@

RZ8 0_0402_1%

13

D

2

G

QZ4

S

+5VALW

12

RZ10 100K_0402_5%

13

D

QZ8 2N7002K_SOT23-3

S

+3VS+VCCP

12

RZ26

470_0402_5%

+3VS_D

3

QZ14B

5

4

C

D

P2

@

J

2

112

JUMP_43X79 QZ3 SI4128DY-T1-GE3_SO8

8 7 6 5

4

1

2

2N7002DW-7-F_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0603_50V_X7R

CZ10

1 2 3

470_0402_5%

SYSON#

+3V_PCH

40mil

1

CZ7 10U_0805_10V6K

2

RZ9

2M_0402_5%~D

1 2

10K_0402_5%

PCH_PWR_EN<40>

+1.5V

12

RZ27

+1.5V_D

13

D

2

G

S

1

CZ8 1U_0603_10V6K

2

PCH_PWR_EN#

2

G

0.1U_0603_50V_X7R

1

CZ17

2

D

2N7002BKW_SOT323-3~D

+5VALW

12

RZ12 100K_0402_5%

13

D

QZ10 2N7002K_SOT23-3

S

RUN_ON_CPU1.5VS3#<10,6>

+3VALW

RZ11

@

1 2

PCH_PWR_EN#<19>

12

RZ17 100K_0402_5%

QZ15

2N7002BKW_SOT323-3~D

Compal Secret Data

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

QZ5

+

1.5V_CPU_VDDQ

12

+1.5V_CPU_VDDQ_CHG

13

D

2

G

S

SYSON<40,50>

RZ22 100K_0402_5%

E

+

0.75VS

12

RZ3 220_0402_5%

SYSON#

0.1U_0402_25V6K

RZ2 22_0603_5%~D

+DDR_CHG

QZ6

13

D

2N7002BKW_SOT323-3~D

2

G

S

+5VALW

12

RZ19 100K_0402_5%

1

CZ22

2

13

D

2

QZ12

G

0.1U_0603_50V_X7R

1

12

2

Title

Size Document Number Rev

Date: Sheet of

2N7002K_SOT23-3

S

@

CZ21

Compal Electronics, Inc.

DC/DC Interface

LA-9101P

E

0.4

35 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

WCM-2012HS-900T_4P

12

USB3TN2_JUSB1_CUSB3TN2_JUSB1

12

USB3TP2_JUSB1_C

4

1

L

RI1 0_0402_5%@

RI2 0_0402_5%@

4

1

I1

1 2

4

1

U

D D

C C

SB3RN2_JUSB1<16>

SB3RP2_JUSB1<16>

U

USB3TN2_JUSB1<16>

USB3TP2_JUSB1<16>

USB20_JUSB1_N1<16>

USB20_JUSB1_P1<16>

SB3RN2_JUSB1

U

SB3RP2_JUSB1

USB3TP2_JUSB1

CI3 0.01U_0402_16V7K

CI4 0.01U_0402_16V7K

USB20_JUSB1_N1

USB20_JUSB1_P1

3

2

EMC@

WCM-2012HS-900T_4P

4

1

LI3

RI4 0_0402_5%@

RI6 0_0402_5%@

WCM-2012HS-900T_4P

3

4

1

2

LI2

EMC@

1 2

RI3 0_0402_5%@

1 2

RI5 0_0402_5%@

EMC@

1 2

3

2

U

3

2

4

SB3RN2_JUSB1_R

SB3RP2_JUSB1_R

USB20_JUSB1_N1_R

USB20_JUSB1_P1_R

USB_EN#<37,40>

USB3TN2_JUSB1_R

USB3TP2_JUSB1_R

4.7U_0805_10V4Z

I12

C

+

5VALW

USB_EN#

1

2

1

I14

C

0.1U_0402_16V7K

2

1

CI13

0.1U_0402_16V7K

2

.0A

UI3

1

GND

2

VIN VIN3VOUT

4

EN

EPAD

9

USB3RN2_JUSB1_R

USB3RP2_JUSB1_R

USB3TP2_JUSB1_R

3

+5V_USB_PWR1

8

VOUT

7

VOUT

6 5

FLG

AP2301MPG-13_MSOP8

DI1

EMC@

1

2

4

5

3

8

IP4292CZ10-TBR_XSON10_2.5X1~D

80mil

RI19

0_0402_1%

1 2

@

10

9

7

6

1

CI15

0.1U_0402_16V7K

2

USB3RN2_JUSB1_R

USB3RP2_JUSB1_R

USB3TN2_JUSB1_RUSB3TN2_JUSB1_R

USB3TP2_JUSB1_R

USB_OC1# <16>

2

+5V_USB_PWR1

CI1

220U_6.3V_M

1

U

SB conn.1

JUSB1

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

ACON_TARA4-9K1311

CONN@

USB 2.0 Port 1 USB 3.0 Port 2

DC233007O10

DC231204030 (OLD)

10

GND

11

GND

12

GND

13

GND

3

EMC@

1

2

PESD5V0U2BT_SOT23-3~D

USB3TP2_JUSB1_R

USB3TN2_JUSB1_R USB20_JUSB1_P1_R

USB20_JUSB1_N1_R USB3RP2_JUSB1_R

DI2

USB3RN2_JUSB1_R

0.1U_0402_25V6K

1

+

CI2

2

WCM-2012HS-900T_4P

USB3RN1_JUSB2<16>

USB3RP1_JUSB2<16>

B B

USB3TN1_JUSB2<16>

USB3TP1_JUSB2<16>

A A

USB3RN1_JUSB2

USB3RP1_JUSB2

USB3TP1_JUSB2

USB20_JUSB2_N0<16>

USB20_JUSB2_P0<16>

4

1

LI4

1 2

RI13 0_0402_5%@

1 2

RI14 0_0402_5%@

12

USB3TN1_JUSB2_CUSB3TN1_JUSB2

CI10 0.01U_0402_16V7K

12

USB3TP1_JUSB2_C

CI11 0.01U_0402_16V7K

USB20_JUSB2_N0

USB20_JUSB2_P0

EMC@

3

2

3

2

WCM-2012HS-900T_4P

4

1

LI6

EMC@

1 2

RI17 0_0402_5%@

1 2

RI18 0_0402_5%@

WCM-2012HS-900T_4P

4

1

LI5

EMC@

1 2

RI15 0_0402_5%@

1 2

RI16 0_0402_5%@

USB3RN1_JUSB2_R

USB3RP1_JUSB2_R

3

2

3

2

USB3TN1_JUSB2_R

USB3TP1_JUSB2_R

USB20_JUSB2_N0_R

USB20_JUSB2_P0_R

5

4

4.7U_0805_10V4Z

CI6

+5VALW

USB_EN#

1

2

1

CI7

0.1U_0402_16V7K

2

1

CI26

0.1U_0402_16V7K

2

USB3RN1_JUSB2_R

USB3RP1_JUSB2_R

USB3TN1_JUSB2_R

USB3TP1_JUSB2_R

2.0A

UI2

1 2

4

8

GND

VOUT

7

VOUT

VIN

6

VIN3VOUT

5

FLG

EN

EPAD

9

AP2301MPG-13_MSOP8

DI4

EMC@

1

2

4

5

3

8

IP4292CZ10-TBR_XSON10_2.5X1~D

3

+5V_USB_PWR2

80mil

0_0402_1%

1 2

RI20

@

1

2

10

USB3RN1_JUSB2_R

9

USB3RP1_JUSB2_R

7

USB3TN1_JUSB2_R

6

USB3TP1_JUSB2_R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

USB_OC0# <16>

CI17

0.1U_0402_16V7K

2012/08/22 2013/08/31

+5V_USB_PWR2

1

+

CI8

220U_6.3V_M

2

Compal Secret Data

Deciphered Date

2

0.1U_0402_25V6K

1

CI9

2

3

2

PESD5V0U2BT_SOT23-3~D

1

EMC@

USB3TP1_JUSB2_R

USB3TN1_JUSB2_R USB20_JUSB2_P0_R

USB20_JUSB2_N0_R USB3RP1_JUSB2_R

DI5

USB3RN1_JUSB2_R

USB conn.2

JUSB2

CONN@

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

ACON_TARA4-9K1311

USB 2.0 Port 0 USB 3.0 Port 1

DC233007O10

DC231204030 (OLD)

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

USB3.0

LA-9101P

10

GND

11

GND

12

GND

13

GND

36 57Wednesday, August 29, 2012

1

36 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

D D

WCM-2012HS-900T_4P

USB20_JUSB3_P2<16>

USB20_JUSB3_N2<16>

C C

USB20_JUSB3_P2

USB20_JUSB3_N2

4

1

LI7

RI25 0_0402_5%@

RI21 0_0402_5%@

EMC@

1 2

4

+

5VALW

1

I23

USB_EN#

2

C

I22

0.1U_0402_16V7K

2

1

CI16

0.1U_0402_16V7K

2

U

1

GND

2

VIN VIN3VOUT

4

EN

C

4.7U_0805_10V4Z

USB_EN#<36,40> USB_OC2# <16>

3

2

USB20_JUSB3_P2_R

USB20_JUSB3_N2_R

3

2

.0A

I4

VOUT VOUT

FLG

EPAD

9

AP2301MPG-13_MSOP8

3

8 7 6 5

5V_USB_PWR3

+

80mil

RI24

0_0402_1%

1 2

@

1

CI24

0.1U_0402_16V7K

2

USB20_JUSB3_N2_R USB20_JUSB3_P2_R

1

USB conn.3

+5V_USB_PWR3

2

3

DI7

PESD5V0U2BT_SOT23-3~D

EMC@

1

JUSB3

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

GND

7

GND

8

GND

ACON_UARBG-4K1926

CONN@

USB 2.0 Port 2

DC233007P00

DC233007P00(OLD)

+5V_USB_PWR3

1

+

CI20

220U_6.3V_M

2

Place close to JUSB3

0.1U_0402_25V6K

1

CI19

2

+5VALW

1

USB_EN#

2

CI30

0.1U_0402_16V7K

2

1

CI25

0.1U_0402_16V7K

2

UI5

1

GND

2

VIN VIN3VOUT

4

EN

2.0A

8

VOUT

7

VOUT

6 5

FLG

EPAD

9

AP2301MPG-13_MSOP8

+5V_USB_PWR4

80mil

RI31

3

0_0402_1%

1 2

@

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CI32

0.1U_0402_16V7K

USB_OC3# <16>

USB20_USBDB_P3_R USB20_USBDB_N3_R

2

3

DI8

PESD5V0U2BT_SOT23-3~D

@

1

Compal Secret Data

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

USB conn.4

+5V_USB_PWR4

1

+

CI27

@

220U_6.3V_M

2

JDB

1

2

3

4

5

6

9

6

G1

7

10

7

G2

8

ACES_51524-0080N-001

CONN@

USB 2.0 Port 3

SP01001A900

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

MB to USB2.0 DB

LA-9101P

1

0.4

37 57Wednesday, August 29, 2012

0.4

CI31

B B

USB20_USBDB_P3<16>

USB20_USBDB_N3<16>

A A

USB20_USBDB_P3

USB20_USBDB_N3

WCM-2012HS-900T_4P

4

1

LI10

EMC@

1 2

RI32 0_0402_5%@

1 2

RI28 0_0402_5%@

3

2

USB20_USBDB_P3_R

2

USB20_USBDB_N3_R

4.7U_0805_10V4Z

5

4

CyberForum.ru

5

M

ini WLAN/WIMAX H=6.7

4

3

2

1

3V_WLAN

1 2

CC47

CC47CC47

0.047U_0402_16V4Z

C40

1

2

靠靠靠靠靠靠靠靠

0.047U_0402_16V4Z

C42

+

0.1U_0402_25V6K

2

1

MINI

J

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

CONCR_525B01BE17A

CONN@

DC040009U00

wlan connector

wlan connectorwlan connector

0.1U_0402_25V6K

4.7U_0603_6.3V6K

2

1

C46

C48

1

2

D D

BT_ON#

PCIE_PRX_WLANTX_N2<14> PCIE_PRX_WLANTX_P2<14>

PCIE_PTX_WLANRX_N2<14> PCIE_PTX_WLANRX_P2<14>

BT_ON#<17>

C C

R12 0_0402_5%

BT_ON#

47P_0402_50V8J

LAN_WAKE#<40>

W

WLAN_CLKREQ#<14>

CLK_PCIE_WLAN#<14> CLK_PCIE_WLAN<14>

@

12

PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2

PCIE_PTX_WLANRX_N2 PCIE_PTX_WLANRX_P2

EC_TX

EC_TX<40>

EC_RX

EC_RX<40>

R13 1K_0402_1%

+1.5VS

0.047U_0402_16V4Z

1

@

C87

2

W

LAN_WAKE#

LAN_CLKREQ#

W

CLK_PCIE_WLAN# CLK_PCIE_WLAN

C49 0.1U_0402_10V7K~D

1 2

PCIE_PRX_WLANTX_N2_C

1 2

PCIE_PRX_WLANTX_P2_C

C44 0.1U_0402_10V7K~D

1 2

R14 0_0402_5%

1 2

R15 0_0402_5%

12

100K_0402_5%

+3V_WLAN

0.047U_0402_16V4Z

0.1U_0402_25V6K

@

1

C50

C45

C47

2

R11

1

2

HDD LED

LED2

B B

PCH_SATALED#<13>

PCH_SATALED#

R2

1 2

390_0402_5%

12-21C-T3D-CM2P1B18X-2C_WHITE

1 2

3

3V_WLAN

+

1.5VS

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

30 32 34 36 38 40 42 44 46 48 50 52

GND2

1

+

C43

2

PCH_SMBCLK

32

PCH_SMBDATA

34 36 38 40 42 44 46 48 50 52

54

CC47

1

@

330U_D2_2VM_R6M~D

C88 47P_0402_50V8J

@

2

12

@

R16 0_0402_1%

PCH_SMBCLK <11,12,14,6>

PCH_SMBDATA <11,12,14,6>

USB20_MINI1_N8 USB20_MINI1_P8

PLT_RST#

+

3VS

12

PLT_RST# <16,32,40,6>

USB20_MINI1_N8 <16> USB20_MINI1_P8 <16>

R110 10K_0402_5%

+

3VS

2

G

1 3

D

QV30

2N7002_SOT23-3

WL_OFF#WLAN_RADIO_DIS#_R

S

WL_OFF# <16>

WLAN_ON<40>

DMN66D0LDW-7_SOT363-6

WLAN_ON

+3V_AOAC

Power Control for Mini card

@

12

+3VALW

Q4A

2

R18

100K_0402_5%

@

1 2

R25 0_1206_5%~D

1 2

R22 0_1206_5%~D

@

+3VALW

B+_BIAS

100K_0402_5%

12

61

100K_0402_5%

12

R19

@

R20

@

DMN66D0LDW-7_SOT363-6

3

Q4B

5

@

4

+3V_WLAN+3VS

SI3456DDV-T1-GE3_TSOP6~D

D

6

S

45 2 1

G

3

1M_0402_5%

12

R21

@

Q2

+3V_AOAC

@

12

R17

@

4700P_0402_25V7K

1

C13

2

@

20K_0402_5%

Battery LED

+5VS

R3

BATT_CHG_LED#<40>

BATT_LOW_LED#<40>

BATT_CHG_LED#

BATT_LOW_LED#

1 2

680_0402_1%

R4

1 2

390_0402_5%

White

2

1

3

Amber

LED3

HT-210UD5-BP5_AMBER-WHITE

+5VALW

Power LED

10mils, All pins

13

D

PWR_PWM_LED#<40>

R786 100K_0402_5%

A A

2

G

S

12

PWR_LED#

Q1

2N7002_SOT23-3

R1

1 2

390_0402_5%

5

LED1

12-21C-T3D-CM2P1B18X-2C_WHITE

1 2

3

4

+5VALW

WL_BT_LED#<40>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

WL_BT_LED#

Compal Secret Data

Wireless LED

R9

1 2

680_0402_1%

Deciphered Date

2

LED4

12-21C-T3D-CM2P1B18X-2C_WHITE

1 2

+5VALW

3

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Mini Card/LED

LA-9101P

1

38 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

D D

Power ON Circuit

ON/OFF switch

TOP Side

SW1

@

SMT1-05-A_4P

3

1

2

4

5

6

Bottom Side

SW2

@

SMT1-05-A_4P

3

1

2

4

5

6

C C

Pop only before MP

ON/OFFBTN#

1

CE20

0.1U_0402_25V6K

2

1

EC_ON<40,47>

10K_0402_5%

4

DE1

2

3

BAV70W_SOT323-3

RE51

@

3

+

FAN_POWER

3VLP

+

RE49 100K_0402_5%

KB9012@

1 2

13

D

2

G

S

1 2

QE1

@

2N7002K_SOT23-3

ON/OFF <40>

2.2U_0603_6.3V6K

EN_DFAN1<40>

FAN_SPEED1<40>

40mil

1

CE22

CE23

2

1000P_0402_50V7K

EN_DFAN1

AN Control circuit

F

+5VS

UE3

1

VEN

2

VIN

3

VO

4

VSET

APE8873M SOP 8P

+3VS

12

RE50 10K_0402_5%

1

CE24

0.01U_0402_16V7K

2

CE25

2.2U_0603_6.3V6K

1 2

+FAN_POWER

GND GND GND GND

40mil

2

8 7 6 5

1 2 3

4 5

SP02000JR00

JFAN

1 2 3

GND GND

ACES_85204-0300N

CONN@

1

POWER/B

INT_KBD Conn.

+3VALW

LID_SW#<40>

B B

LID_SW# ON/OFFBTN#

EMC@

2

3

DE5 PESD24VS2UT_SOT23-3~D

1

JPWR

1

2

3

4

5

GND

6

GND

HB_A090420-SAHR21

CONN@

SP01001G200

SP01000Z300 (OLD)

KSI[0..7]<40>

KSO[0..16]<40>

Touch pad

+3VS

TP_CLK<40>

TP_DATA<40>

TP_SMBCLK<14>

TP_SMBDATA<14>

A A

TP_CLK TP_DATA

TP_SMBCLK TP_SMBDATA

EMC@

2

3

DE3

PESD5V0U2BT_SOT23-3~D

1

5

JTP

1

2

3

4

5

6

ACES_51524-0060N-001

CONN@

SP010014M10

4

+5VS

7

G1

8

G2

CAPS_LED<40>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

G

KSI[0..7]

KSO[0..16]

JKB

CONN@

HB_A823020-SBHR21

30

32

30

GND

29

KSI7 KSI6 KSI4 KSI2 KSI5 KSI1 KSI3 KSI0 KSO5 KSO4 KSO7 KSO6 KSO8 KSO3 KSO1 KSO2 KSO0 KSO12 KSO16 KSO15 KSO13 KSO14 KSO9 KSO11 KSO10

RE60

1 2

KB_CAPS_PWR

240_0402_1%

KB_CAPS_PWR-

13

D

QE3 2N7002BKW_SOT323-3~D

S

2012/08/22 2013/08/31

SP01001H500

Compal Secret Data

Deciphered Date

2

31

29

GND

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

Compal Electronics, Inc.

Title

FAN/TP/KB/PWR SW

Size Document Number Rev

LA-9101P

Date: Sheet of

1

39 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

2

1

Board ID

+

3VALW

@

1 2

R

D D

+3VS

@

1 2

@

10K_0402_5%

1

2

EC_SCI#

PCH_HOT#

EC_SMB_CK1_R

EC_SMB_DA1_R

KSO1

KSO2

LID_SW#

WLAN_WAKE#

EC_SMI#

EC_PME#

EC_SMB_CK2

EC_SMB_DA2

ODD_EC_EN#

12

RE18

12

H_PROCHOT#<46,6>

PM_SLP_S3#_R

PM_SLP_S5#_R

PCH_PWROK

PCIE_WAKE#<15,32>

VR_HOT#<52>

CE10

22P_0402_50V8J@

RE8 47K_0402_5%

+3VALW

CE11 0.1U_0402_16V7K

EC_SMB_CK2 <25>

EC_SMB_DA2 <25>

EC_SMB_CK1<45,46> EC_SMB_DA1<45,46> PCH_SMLCLK<14> PCH_SMLDATA<14>

PCH_PWROK<15,6>

1 2

RE61 0_0402_1%

VR_HOT#

12

SN74LVC1G06DCKR_SC70-5

47P_0402_50V8J

CE19

1

2

12

@

0_0402_1% RE44

CLK_PCI_LPC<16>

12

DBC_EN<21>

RE32 10K_0402_5%

RE35 10K_0402_5%

+3VALW

1 2

RE11 2.2K_0402_5%

1 2

RE13 2.2K_0402_5%

1 2

RE62 47K_0402_5%@

1 2

RE63 47K_0402_5%@

1 2

RE71 10K_0402_5%

1 2

C C

B B

RE70 10K_0402_5%

1 2

RE16 1K_0402_1%

1 2

RE21 10K_0402_5%

1 2

RE24 2.2K_0402_5%

1 2

RE25 2.2K_0402_5%

1 2

RE72 10K_0402_5%

Reserve for ESD

FAN_SPEED1

CE29

220P_0402_50V8J

@

CE27

0.1U_0402_16V7K

CE28

0.1U_0402_16V7K

Please close to EC

A A

E1 0_0805_1%

RE6 33_0402_5%@

12

PM_SLP_S3#<15> PM_SLP_S5#<15> EC_LID_OUT# <17>

CE_EN<21>

UE2

Y4A

12

KSI[0..7]<39>

KSO[0..16]<39>

EC_PME#

+3VS

5

P

1

KSI[0..7]

KSO[0..16]

TOUCH_ON#<41>

EC_SMB_CK1 EC_SMB_CK1_R

1 2

RE28 0_0402_1%@

1 2

RE29 0_0402_1%@

RE31 0_0402_1%@ RE33 0_0402_1%@

CE_EN

DBC_EN

PCH_PWROK

RE40 0_0402_1%

0.1U_0402_16V7K

CE15

1

2

VCOUT1_PHH_PROCHOT#

G3NC

RE47 100K_0402_5%

1 2

1

E1

C

2

0.1U_0402_16V7K

GATEA20<17> KB_RST#<17>

LPC_FRAME#<13>

PLT_RST#<16,32,38,6>

WLAN_ON<38>

1 2

RE26 0_0402_1%@

1 2

RE27 0_0402_1%@

1 2 1 2

EC_SMI#<17>

PS_ID<45>

CMOS_ON#<21> 130W/90W#<45>

FAN_SPEED1<39>

1 2

@

SUSCLK_R<15>

0.1U_0402_16V7K

SERIRQ<13>

LPC_AD3<13> LPC_AD2<13> LPC_AD1<13> LPC_AD0<13>

EC_SCI#<17>

22P_0402_50V8J

0.1U_0402_16V7K

1

E3

E2

C

2

0.1U_0402_16V7K

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

EC_RST# EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

TOUCH_ON#

EC_TX<38> EC_RX<38>

KSO16

EC_SMB_DA1_REC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3#_R PM_SLP_S5#_R EC_SMI#

FAN_SPEED1 EC_PME#

EC_TX EC_RX

12

RE45 100K_0402_5%

1 2

CE17 20P_0402_50V8

EC_CRY1

@

1

CE12

2

@

YE1

32.768KHZ_12.5PF_Q13MC14610002

1

E4

C

2

1000P_0402_50V7K

EC_CRY1 EC_CRY2

EC_CRY2

1

OSC4OSC

NC3NC

2

E5

C

1

UE1

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

10

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

37

EC_RST#

20

EC_SCII#/GPIO0E

38

GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/GPIO44

78

EC_SMB_DA1/GPIO45

79

EC_SMB_CK2/GPIO46

80

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

EC_INVT_PWM/GPIO11

28

FAN_SPEED1/GPIO14

29

EC_PME#/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

PCH_PWR OK/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLKI/GPIO5D

123

XCLKO/GPIO5E

@

1

CE13

22P_0402_50V8J

2

E6

C

1000P_0402_50V7K

1

+

3VALW_EC

LPC & MISC

Int. K/B Matrix

E1

L FBMA-L11-160808-800LMT_0603

1 2

111

9

22

33

96

125

EC_VDD0

EC_VDD/VCC

PWM Output

AD Input

DA Output

PS2 Interface

CPU1.5V_S3_GATE/GPXIOA00

SPI Device Interface

SPI Flash ROM

GPIO

SM Bus

H_PROCHOT# _EC/GPXIOA06

GPO

GPIO

GPI

GND/GND

GND0

11

24

35

94

113

EC_VCCA

+

EC_VCCA

RE4 0_0402_1%

Reserved for KB9012

67

EC_VDD/AVCC

BATT_TEMP/GPIO38

DAC_BRIG/GPIO3C

EN_DFAN1/GPIO3D

EC_MUTE#/GPIO4A

WOL_EN/GPXIOA01

VCIN0_PH/GPXIOD00

PECI_KB930/GPIO41

BATT_CHG_LED #/GPIO52

CAPS_LED#/GPIO53

PWR_LED #/GPIO54

BATT_LOW_ LED#/GPIO55

PM_SLP_S4#/GPIO59

EC_RSMRST# /GPXIOA03 EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

VCOUT0_PH/GPXIOA07

PBTN_OUT#/GP XIOA09

PCH_APWROK/GP XIOA10

SA_PGOOD/GPXIOA11

LID_SW#/GPXIOD04

PECI_KB9012/GPXIOD07

AGND/AGND

KB9012QF-A3_LQFP128_14X14KB9012@

69

20mil

ECAGND

FBMA-L11-160808-800LMT_0603

1

0.1U_0402_16V7K

2

1 2

@

GPIO0F

BEEP#/GPIO10

GPIO12

ACOFF/GPIO13

GPIO39

ADP_I/GPIO3A

GPIO3B

GPIO42

IMON/GPIO43

IREF/GPIO3E

CHGVADJ/GPIO3F

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

ME_EN/GPXIOA02

SPIDI/GPIO5B

SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A

ENBKL/GPIO40

FSTCHG/GPIO50

SYSON/GPIO56 VR_ON/GPIO57

BKOFF#/GPXIOA08

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

SUSP#/GPXIOD05

GPXIOD06

V18R

LE2

C

E

E7

CAGND

CAGND <4 5>

E

+

3VLP

21

KB_LED_PWM

23

BEEP#

26 27

ACOFF

63

BATT_TEMP

64 65

ADP_I

66

AD_BID0

75

PCH_HOT#_R PCH_HOT#

76

AD_PID0

68 70

EN_DFAN1

71 72

83

EC_MUTE#

84

USB_EN#

85 86 87

TP_CLK_R

88

TP_DATA_R

97

CPU1.5V_S3_GATE

98

WOL_EN#

99

ME_EN

109

1 2

@

RE15 0_0402_1%

119

HDD_S3.5

120

ODD_EC_EN#

126 128

WL_BT_LED#_R

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

12

1 2

RE22 0_0402_1%@

PECI_KB930

BATT_CHG_LED# CAPS_LED PWR_PWM_LED# BATT_LOW_LED# SYSON VR_ON PM_SLP_S4#_R

EC_RSMRST# EC_LID_OUT#

RE34 0_0402_5%

VCOUT0

BKOFF# PBTN_OUT# ACIN_65W_R SA_PGOOD

ACIN_D EC_ON_R ON/OFF_R LID_SW#_R SUSP#

PECI_KB9012

+V18R

1

CE16

4.7U_0805_10V4Z

2

KB_LED_PWM

BEEP# <33>

12

RE3643_0402_1%

ACOFF <46>

CE9 100P_0402_50V8J

12

RE17 0_0402_5% @

@

RE7 0_0402_5%

EN_INVPWR <21> EN_DFAN1 <39> EC_ENVDD <21> LCD_TEST <21>

EC_MUTE# <33> USB_EN# <36,37>

IMVP_PWRGD <52>

12

@

RE23 0_0402_1% RE38 0_0402_1%

RE37 0_0402_5%

KB9012@

RE14 0_0402_1%@ RE41 0_0402_1%@ RE42 0_0402_1%@

RE43

12

@

CPU1.5V_S3_GATE <10>

WOL_EN# <32>

ME_EN <13> VCIN0_PH <45>

HDD_S3.5 <41> ODD_EC_EN# <41>

1 2

@

RE67 0_0402_1%

PX_MODE <26,53,54> BATT_CHG_LED# <38>

CAPS_LED <39>

PWR_PWM_LED# <38>

BATT_LOW_LED# <38>

SYSON <35,50> VR_ON <52>

EC_RSMRST# <15>

12

VCOUT1_PH

KB9012@

12

BKOFF# <21> PBTN_OUT# <15,6>

SA_PGOOD <51>

1 2 1 2 1 2

SUSP# <10,35,48,49,50>

65W/90W# <45>

1 2

43_0402_1%KB9012@

PCH_PWR_EN

12

VCIN0_PHVCIN0_PH_R

12

ECAGND

ADP_I <45,46>

WL_BT_LED#

ENBKL

H_PECI

R

M

E5

S@

00K_0402_5%

2

BATT_TEMP <45,46>

TP_CLK TP_DATA

+3VLP

12

ACIN <15,25,45,46>

EC_ON <39,47>

ON/OFF <39>

3VALW

+

R

E3

100K_0402_5%

R

a

1 2

A

D_BID0

UMA@

R

E5

Rb

100K_0402_5%

1 2

Analog Board ID definition, Please see page 4.

PCH_PWR_EN <35>

PCH_HOT# <14>

TP_CLK

TP_DATA

TP_CLK <39> TP_DATA <39>

WL_BT_LED# <38>

ENBKL <15>

reserve for KB 9012 Rev.A2

RE30 47K_0402_5%@

VCIN1_PH <45>

VCOUT0_PH <47>

H_PECI <17,6>

PM_SLP_S4#_R

ACIN_65W_R

1

E8

C

0.1U_0402_16V7K

2

12

RE94.7K_0402_5%

12

RE104.7K_0402_5%

1 2

PECI_KB930

@

RE69 0_0402_1%

1 2

@

RE39 0_0402_1%

1 2

@

RE80 0_0402_1%

LID_SW#_R LID_SW#

RE81 0_0402_5%

For LID SW debug & test Place close to UE1.115

SA_PGOOD

ACIN

Project ID

R

E12

00K_0402_5%

2

+5VS

WL_BT_LED#_R

1

CE30

0.1U_0402_16V7K

2

Reserve for ESD Place close to UE1.128

PM_SLP_S4#

1 2

CE14

1 2

CE18 100P_0402_50V8J

M

S@

Rb => NC

T

H@

WLAN_WAKE# <38>

PM_SLP_S4# <15>

ACIN_65W <25>

0.1U_0402_16V7K

12

3VALW

+

R

E19

100K_0402_5%

R

a

1 2

A

D_PID0

1

E21

C

UMA@

R

E12

Rb

100K_0402_5%

1 2

Analog Project ID definition, Please see page 4.

LID_SW# <39>

0.1U_0402_16V7K

2

SYSON

1

CE26

0.1U_0402_16V7K

2

Place close to UE1.95

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

EC ENE-KB9012

Size Document Number Rev

LA-9101P

Date: Sheet of

1

40 57Wednesday, August 29, 2012

0.4

CyberForum.ru

A

1 1

+5V_HDD Source

2 2

HDD_S3.5<40>

RN12

@

100K_0402_5%

B

RN9

100K_0402_5%@

HDD_EN_5V

DMN66D0LDW-7_SOT363-6

QN5B

+5VALW

2

1

G

3

0.1U_0603_50V_X7R

CN17

1

@

2

B+_BIAS

+3VALW

12

100K_0402_5%@

61

@

2

12

RN10

3

5

DMN66D0LDW-7_SOT363-6

4

@

QN5A

SATA_PRX_DTX_N0<13>

SATA_PRX_DTX_P0<13>

@

6

D

QN4

SI3456DDV-T1-GE3_TSOP6~D

S

+5V_HDD

4 5

10U_0805_10V6K

1

12

CN18

RN11

@

2

100K_0402_5%

C

JP13

@

112

JUMP_43X79

SHORT DEFAULT

ATA_PTX_DRX_P0_C<13>

S S

ATA_PTX_DRX_N0_C<13>

1 2

CN3 0.01U_0402_16V7K

1 2

CN4 0.01U_0402_16V7K

+3VS

HDD_DET#<13>

+5V_HDD

+5VS

2

D

S

ATA_PTX_DRX_P0_C ATA_PTX_DRX_N0_C

S

SATA_PRX_DTX_N0_C SATA_PRX_DTX_P0_C

HDD_DET#

0.1U_0402_25V6K

1

CN8

2

SATA HDD Conn.

J

HDD

1

G

2

A

3

A-

4

GND

5

B-

6

B+

7

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12

22

VCC12

SANTA_193202-1

CONN@

DC010008700

+5V_HDD+3VS

0.1U_0402_25V6K

1

CN5

CN9

2

G

ND +

1000P_0402_50V7K

ND ND

G

0.1U_0402_25V6K

1

CN6

CN7

2

E

23 24

10U_0805_10V6K

1

2

F

*

TOUCH_ON#<40>

USB20_TOUCH_N9

USB20_TOUCH_P9

Place close to JTOUCH

G

Touch Screen Panel

1 2

1000P_0402_50V7K

1

2

CV59

+5VS_TOUCH

5VS_TOUCH

+

Q

V16

S

@

G

2

1

@

2

JTOUCH

ACES_88460-00601-P01

1 2 3 4 5 6

SP010013W00

RV219

100K_0402_5%

1 2

CV60

0.1U_0402_16V7K

100K_0402_5%

USB20_TOUCH_N9<16> USB20_TOUCH_P9<16>

DV13

EMC@

5VS

+

R

V249 0_0603_5%~D

+

5VS

SI2301CDS-T1-GE3_SOT23-3

12

2

@

1 2

47K_0402_5%

PESD5V0U2BT_SOT23-3~D

@

C

V328

@

RV218

0.1U_0402_16V7K

USB20_TOUCH_N9 USB20_TOUCH_P9

TOUCH_RST

+5VS_TOUCH

R

V217

3

1

D

13

+

1 2 3 4

G1

5

G2

6

CONN@

H

5VS_TOUCH

7 8

TOUCH_RST

1

2

ODD Power Control

JP7

@

3 3

+5VS

1

CN13

B+_BIAS

ODD_EN#<17>

4 4

ODD_EC_EN#<40>

2

G

@

100K_0402_5%

RN15

2

RN6 470K_0402_5%

1 2

ODD_EN

13

D

QN3 2N7002BKW_SOT323-3~D

S

2

G

12

1U_0402_6.3V6K

ODD_EN

13

D

QN6 2N7002BKW_SOT323-3~D

S

112

JUMP_43X79

6

2 1

@

2

QN2

D

S

45

SI3456BDV-T1-E3 1N TSOP6

G

3

RN7

1.5M_0402_5%@

1 2

+5VS_ODD

0.1U_0603_50V_X7R

1

CN16

2

12

SATA_PTX_DRX_P2<13> SATA_PTX_DRX_N2<13>

SATA_PRX_DTX_N2<13> SATA_PRX_DTX_P2<13>

CH10 0.01U_0402_16V7K

12

CH9 0.01U_0402_16V7K

12 12

CN14 0.01U_0402_16V7K CN15 0.01U_0402_16V7K

ODD_DETECT#<17>

ODD_DA#<16>

SATA_PTX_DRX_P2_C SATA_PTX_DRX_N2_C

SATA_PRX_DTX_N2_C SATA_PRX_DTX_P2_C

1 2

RN8 0_0402_1%

@

A

B

C

D

SATA ODD Conn.

+5VS_ODD

Pleace near ODD CONN

1000P_0402_50V7K

1

CN10

2

JODD

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

ODD_DA#_R

11

MD

12

GND GND13NPTH2

SANTA_202801-1

CONN@

DC010007300

10U_0805_10V6K

0.1U_0402_25V6K

1

CN11

CN12

2

14

GND

15

GND

16

NPTH1

17

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

F

G

Compal Electronics, Inc.

Title

HDD / ODD

Size Document Number Rev

LA-9101P

Date: Sheet of

41 57Wednesday, August 29, 2012

H

0.4

CyberForum.ru

5

D D

4

3

2

1

Screw Hole

H1

C C

B B

H2

H_2P8

@

1

H12

H11

H_2P8

@

1

H31

H_3P7

@

1

FD1 FIDUCAL@

1

H16

H_2P8

@

1

H32

H33

H_3P7

@

1

FD2

FD3

FIDUCIAL@

FIDUCAL@

1

H5

H4

H17

H34

FD4 FIDUCIAL@

1

H_2P8N

@

H_2P8

@

H_3P7

@

1

H18

1

H35

1

H_2P8

@

H_3P3N

@

H_3P7X3P2N

@

H7

H6

H_3P3

@

1

H8

H9

H_3P3

H_2P8

@

1

H10

H_2P8

H_3P3

@

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Screw Hole

LA-9101P

1

42 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

Page# Title

Item

Item Issue Description

Page#Page#

ItemItem

3

1

4 Card Reader

2

40 Keyboard

6,21,34,

D D

C C

B B

A A

1

3

36,37,38

2

4

6

5

33 Audio codec

6

6,17

7

32 LAN

8

9

32

10

21,39 LVDS

11

12

21

13

33

14

16,21

5

1

39 Board ID

16

21,39 Touch Screen

17

15,16,

18

39,41

19

14

20

10,26,41 DC/DC

21

41

06,15,16,

22

39,41

23

24

41 DC/DC

25

35,41 Schematic page modify

26

41 ODD Change componen t location for easily maintain .

39

27

6 CPU

28

21,35,

29

39,40,41

40

30

25

31

29

32

38

33

6

34

23

35

36

35

37

18

38

41

39

13

40

41

21 LVDS

Title

TitleTitle

U

SB Change USB port assignment for function team r equest USB p ort change deta il please refer ence Page.16 de scrption.

PCH

Crystal

Audio codec

Touch Screen

ESD

Green CLK

DC/DC

ESD

Green CLK3 2

FAN Fan speed noise issue Reserve 220p/04 02 CE24

Circuit adjues t

LID SW

GPU

GPU Follow AMD requ est, MEM_CALRP2 is not need fo r Mars ASIC now .

MINI card

XDP

GREEN CLK

MOAT

LVDS

PCH

Date

DateDate

012/05/03 SED

2

012/05/04 Function team

2

012/05/05

2012/05/07 HW

2012/05/09

2012/05/09 ESD

2012/05/10 HW

2012/05/15

2012/05/17

2012/05/22

2012/05/23

2012/05/30 0.2

2012/05/30 HW

2012/05/31

2012/05/31 ESD

2012/06/15

2012/06/18 HW

2012/06/29 HW

2012/06/29

2012/07/01 HW

2012/07/03 HW

2012/07/09

2012/07/09 ESD

2012/07/10

2012/07/10 ME

2012/07/11

2012/07/11 ESD

2012/07/11 HW

RequestRequest Owner

Owner

OwnerOwner

5

HW2012/04/27

H

W

ESD

HW

SED

CODEC

HW2012/05/29

HW

ESD2012/05/30

HW

ESD

HW2012/07/01

HW2012/07/06

HW

ESD

4

Issue DescriptionDate

Issue DescriptionIssue Description

The Card reader USB signal is incorrect. SWAP UR1 USB si gnal P/N

eyboard pin def ine change. Follow new SPE C.SWAP JKB pin define.

K

D

elete reserve B ACO circuit Delete UV15,QV 16,QV17,QV18,QV 19,QV20,RV99,RV 100,RV249,CV96, CV98VGA

Design change UN-POP RZ11, P OP RZ1742 DC/DC

ESD team ask so lution

ESD team ask re serve solution

Remove China G o-rural for DEL L request

Remove JUSB3 US B3.016,38 USB

Crystal vendor suggestion Change CL36,CL37 from 33p/04 02 to 12p/0402

Add FHD Panel C E_ENABLE, DBC_E NABLE function from SED reques t

Follow SED tea m request disab le CE_EN functi onLVDS

Follow CODEC ve ndor suggestion

Add touch scre en function

Board ID change for PT Change RE5 from 8.2k_0402(SD02 8820180) to 33k _0402(SD0283302 80)

Add touch scre en function pow er control

Follow RealTek suggestion rem ove, delete res erve MUTE circu itAudio codec33 Delete D1,QA1,Q A2,QA3,RA24,RA2 6,RA60,RA62,RA6 8,RA109,CA72,CA 73

ESD ask CAP for reserve

For Green CLK t est

Change "+1.5V_ CPU_VDDQ", "+1. 5VS", "+1.5VGS" derating

For power seque nce trunning Change RZ15 t o DE-POP

Follow ESD team request Change 0.1u/040 2 from "@" to P OP

Change for Gre en CLK bom cont rol Change R L21,RL30 from " @" to "GCLK@"

For WLAN card p ower sequence i ssue Change RZ4,RZ13 from 470K/0402 56K/0402

Schematic page modify for eas ily maintain.

Circuit & page adjust for OAK 15" & OAK 17"

LID SW need a trace for debug and switch. Add RE81 for LI D SW.

Follow AMD req uest, MarsPro w ill used MPLs.

S3 return hang issue Change RC89 fro m "@" to POP

Follow Green CL K FAE suggestio n

For ESD reques t reserve CAP. Reserv e those CAP for ESD MOAT.

Change RES and reserve CAP for LVDS issue Change RH185 fr om 0ohm-short t o 0ohm/0805, an d reserve CH106 1U/0402

For ME requestConnector Change JBTB1 fo otprint from SP 02000G800 (OLD) to SP02000MJ00

Follow ESD tea m requestPCH

Follow ESD tea m request

Reserve for CE function for L VDS connector

4

3

Page 1

Page 1Page 1

Solution Description

Solution DescriptionSolution Description

Add RA29,RA30,R A31,RA32 and pl ace on the moat between GND & GNDA

Add CC151,CH102 for reserve

Remove DL7,DL8, DL9

Delete LI8,LI9, DI6 and change JUSB3 to USB2.0 type

Add CE_EN, DBC _EN control pin to EC

Change RV62 to DE-POP and RV1 00 to POP for d isable CE_EN fu nction

Add AUDIO JACK PLUG delay circ uit, Spearate N ET JACK_PLUG to => JACK_SENSE# & => JAC K_PLUG#

Add RV217, RV21 8, RV219, RV249 , CV59, CV60, C V328, DV13, QV16, JTO UCH

Add NET "TOUCH_ ON#" from JTOUC H to UE1.82(KB9 012) for TOUCH SCREEN PA NEL power contr ol

Reserve 0.1u/0 402 CH104,CZ23, CH105,CE27,CE28

Change RH31,RH4 1,RV232 0ohm fo rm "GCLK@" to " @" for break the c lock signal to device

Change RC150 3 30K/0402 to 2M/ 0402, RC151 100 K/0402 to 470K/ 0402, RZ18 100K/0402 to 470K/0402, R V115 0/0402 to 2M/0402

Swap Page. 35 & Page 41.

Change CC151 f rom POP to "@"System boot-up shot down issue .

1. Swap P.35 & P.41and move to uch screen circ uit from P.21 t o P.41.

2. Swap P.39 & P.40 page no

Change RV75,RV7 6,RV81 from "DI S@" to "TH@"

Change RV205 fr om "MS@" to "@"

Change R17 to "@"Power Control f or Mini card di dn't need

1. Change UG1.2 (+3VLP) & UG1.8 (+3VALW) connec t to +LAN_IO

2. Add R787 con nect from +RTCB ATT to C5.2 & U G1.10

3. Change C14 f rom 0.1u to 5p/ 0402

4. Change C8 co nnect from +3V_ ALW to +LAN_IO

5. Add R788 0oh m/0402 from +RT CVCC to UG1 for GCLK & DH1 sel ect

Add RH44,RH48,R H70 & NET PCH_J TAG_TMS_R, PCH_ JTAG_TDI_R, PCH_JTAG_TDO_R for break signa l trace

1. Change NET N AME "N59110727" to "WL_BT_LED# _R"

2. Reserve 0.1u /0402 on "WL_BT _LED#_R" for ES D

Change CE_EN_R from dummy to J LVDS.18

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

2

Compal Secret Data

Deciphered Date

2

1

Rev.

Rev.Page#

Rev.Rev.

0

.2

0.2

0.2HW2012/05/30

0.2

0.2HW

0.2

0.2Move RH42,RH43 from Page.13 to Page.41.

0.3

0.3HW2012/07/01

0.3

0.3HW

0.3

Compal Electronics, Inc.

Title

HW-PIR

Size Document Number Rev

LA-9101P

Date: Sheet of

1

43 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

Page# Title

Item

Item Issue Description

Page#Page#

ItemItem

40

3

2

0

41 For FAN_SPEED1 noise issue

D D

C C

4

1

4

42

4

32

3

41

44

34

45

23

46

33

47

23

48

32,34

49

34

50

41

51

38

52

38

53

41

54

Title

TitleTitle

C

onnector For ME request Change JLAN CPN from "DC234004 V00" to "SP0112 07090"

AN Change CE29 fro m "@" to POP

F

Touch PAD

GREEN CLK

Touch Screen

Card Reader

GREEN CLK

CODEC

GREEN CLK

Card Reader

Touch Screen

LED

WLAN

Touch Screen

Date

DateDate

2

012/07/12 ME

2012/07/17

2012/07/19

2012/08/07

2012/08/14

2012/08/16

2012/08/17 HW

2012/08/17

2012/08/20

RequestRequest Owner

Owner

OwnerOwner

4

Issue DescriptionDate

Issue DescriptionIssue Description

W2012/07/16

H

SED

HW

SED

ESD

HW

HWLAN

ESD

SED

HW

C

hange Touch PAD SMBUS port for SMBUS issue

Follow Silego F AE request

Follow SED team request change JTOUCH USB sig nal conatct.

Follow ESD team request

Fixed GCLK outp ut abnormal iss ue

The issue alrea dy fixed by new CODEC.

For RTC discharge issue

For LAN Chip a bnormal leakage issue

Follow ESD team request

Follow SED team request

Change LED ligh t

Remove AOAC fun ction power con trol

Add EC control for Touch Scree n function

3

Page 2

Page 2Page 2

Solution Description

Solution DescriptionSolution Description

Change Touch PA D SMBUS port fo r SMB0 to SMB

Change RL21 fro m 510 ohm to 0 ohm/0402

Change JTOUCH P in define.

Reserve CR11 10 0p/0402 close t o JREAD

Change UG1.2(UG 1/VDD) from +LA N_IO to+3VALW

Remove delay ci rcuit and POP R A4

De-pop R788

Pop RL34 and d e-pop RE21

Change CR11 fro m 100p/0402 to 10p/0402 and PO P

Change Touch sc reen power rail for +3VS to +5 VS

Change LED1,LED 2,LED4 CPN from SC500006O00 to SC50000DC00

Change R18,R19, R20,R21,C13,Q2, Q4 component BO M structure to "@"

Add RN15 & QN6 and relative ci rcuit connect

2

Rev.

Rev.Page#

Rev.Rev.

0

.3

0

.4

0.4

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/08/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

HW-PIR

Size Document Number Rev

LA-9101P

Date: Sheet of

1

44 57Wednesday, August 29, 2012

0.4

CyberForum.ru

A

B

C

D

12

2

PR905

10K_0402_1%

PR906

1 2

10K_0402_1%

13

PQ902

PR927

11K_0402_1%

+

3VALW

2.2K_0402_5%

PR902

1 2

+5VALW

PD900

@

DA204U_SOT323~D

PSID-5

12

+EC_VCCA

1 2

3

1

PC909

0.1U_0402_25V6

PH900

2

B+_BIAS

+3VLP

PR916 11K_0402_1%

1 2

12

PS_ID <40>

@

ECAGND <40>

+

PD901

PR903

33_0402_5%

1 2

12

PC908

PR907

100K_0402_1%

VSB_N_001

130W/90W# <40>

High

5VALW

2

3

BAV99W-7-F_SOT-323-3~D

1

+5VALW

TP0610K-T1-E3_SOT23-3

0.22U_0603_25V7K

VCIN0_PH<40>

100K_0402_1%_TSM0B104F4251RZ

IN

P

1 1

PJPDC

1

2

3

4

5

6

GND

7

GND

ACES_50299-00501-003

CONN@

DPIN

A

12

PC901

1000P_0402_50V7K

PSID

L901

SMB3025500YA_2P

1 2

12

PC902

100P_0402_50V8J

PL902

BLM18BD102SN1D_0603~D

12

BATT++BATT+

PL900

2 2

3 3

4 4

PBATT battery connector

SMART

SMARTSMART Battery:

Battery:

Battery:Battery:

01.BATT1+

01.BATT1+01.BATT1+

02.BATT2+

02.BATT2+02.BATT2+

03.CLK_SMB

03.CLK_SMB03.CLK_SMB

04.DAT_SMB

04.DAT_SMB04.DAT_SMB

05.BATT_PRS

05.BATT_PRS05.BATT_PRS

06.SYS_PRES

06.SYS_PRES06.SYS_PRES

07.BAT_ALERT

07.BAT_ALERT07.BAT_ALERT

08.GND1

08.GND108.GND1

09.GND2

09.GND209.GND2

BATT+

12

PC905

100P_0402_50V8J

PBATT

1 2 3 4 5 6 7 8

9 GND GND

SUYIN_200028MR009G502ZL

CONN@

SMB3025500YA_2P

1 2

PC906

0.01U_0402_25V7K

1 2 3

BAT_ALERT

4

SYS_PRES

5

BATT_PRS

6

DAT_SMB

7

CLK_SMB

8 9 10 11

BATT++

12

PC900

PC907

1

100P_0402_50V8J

1000P_0402_50V7K

PD904 PESD24VS2UT_SOT23-3~D

2

3

PR919

@

0_0402_5%~D

1 2

1

2

V

12

PC903

1000P_0402_50V7K

PD903 PESD24VS2UT_SOT23-3~D

3

PR910 100_0402_5%

1 2

PR914

100_0402_5%

1 2

PR913

100_0402_5%

1 2

12

PC904

Erp lot6 Circuit

100P_0402_50V8J

ACIN <15,25,40,46>

200K_0402_1%

PC916

0.1U_0402_25V6

PR911 10K_0402_1%

1 2

1M_0402_1%

12

PR928

2

JRTC LOTES_AAA-BAT-054-K01

CONN@

-

5

12

3

4

BATT_TEMP <40,46>

+3VALW

EC_SMB_CK1 <40,46>

EC_SMB_DA1 <40,46>

PR929

PQ904B

L2N7002DW1T1G_SC88-6

+

VIN

1 2

1

2

PR930

1M_0402_1%

RB751V-40_SOD323-2

1 2

VCIN1_PH<40>

12

61

@

PD905

PR931

3.3K_1206_5%~D

PQ904A

L2N7002DW1T1G_SC88-6

PR917

499K_0402_1%

2

3

1

PD902 SM24_SOT23

+RTCBATT

+3VLP

POK<47>

ADP_I <40,46>

@

100K_0402_1%

PR915 332K_0402_1%

1 2

PR904

1 2

100K_0402_1%

PR900

15K_0402_1%

1 2

+5VALW

PR909

1 2

2N7002KW_SOT323-3

PC915

@

.1U_0402_16V7K

PSID-1

B+

PR912

@

12

0_0402_5%~D

1 2 13

D

PQ905

S

VSB_N_002

12

PC910

PR918

90.9K_0402_1%

2

G

65W/90W# <40>

65W/90W#

130W/90W#

@

2

G

.1U_0402_16V7K

R901

P 0_0402_5%

1 2

1 3

PSID-3

D

S

PQ901 FDV301N_NL_SOT23-3~D

G

2

PSID-2

C

2

PQ900

B

MMST3904-7-F_SOT323~D

E

3 1

12

PR908

22K_0402_1%

1 2

VSB_N_003

13

D

PQ903 2N7002KW_SOT323-3

S

PH900 under CPU botten side :

CPU thermal protection at 96 +/- 3 degree C

PR926

@

6.81K_0402_1%

1 2

@

13

D

2

G

PQ906

S

2N7002KW_SOT323-3

65W 90W 130W

High

Low

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

A

B

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/07/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_DCIN/BATT CONN/OTP

LA-9101P

D

45 57Wednesday, August 29, 2012

0.4

CyberForum.ru

A

V

IN

P

Q100

AO4407AL_SO8

8 7

PR100

PR104

PC100

2.2U_0805_25V6K

ACOFF

BATT_TEMP

12

3.3_1210_5%

12

3.3_1210_5%

1 2

2

ACIN

1 2

10K_0402_5%

12

61

PR133

5

PR103

200K_0402_1%

V1

PQ114A

L2N7002DW1T1G_SC88-6

PR139

200K_0402_5%

1 2

5

1 1

2 2

ACOFF<40>

BATT_TEMP<40,45>

1 2 36

4

Q103

P

PDTA144EU PNP_SOT323

2

13

2

13

2

3

PQ1111B

4

L2N7002DW1T1G_SC88-6

PQ104

DDTC115EUA-7-F_SOT323

PQ109

P

2

12

1 3

12

PR105 150K_0402_1%

3

PQ114B

5

L2N7002DW1T1G_SC88-6

4

731@

ACIN

100_0402_1%

731@

PR125

PR112

PR117

ACIN <15,25,40,45>

DDTC115EUA-7-F_SOT323

PC101

0.1U_0603_25V7K

VDDP_LDO

12

PR137

100K_0402_1%

12

158K_0402_1%

PR126

1 2

ADP_I<40,45>

H_PROCHOT#<40,6>

3 3

1U_0603_25V6K~D

BATT_TEMP

For DT Mode

12

PC127

@

13

D

2

PQ111

G

SSM3K7002FU_SC70-3

S

.1U_0402_16V7K

@

PC135

PU100

731@

747@

1 2

PC132

731@

PR142

AO4409L_SO8

1 2 3 6

12

PR101

200K_0402_1%

BATT_TEMP

MAX8731_REF

1000P_0402_50V7K

12

747@

+5VALW

12

PC116

0.1U_0402_10V7K

1 2

PR122

747@

200K_0402_5%

12

4.7K_0402_5%

PC126

747@

1 2

120P_0402_50VNPO~D

MAX8731_REF

PR134

0_0402_5%

@

1 2

12

PR135

0_0402_5%

@

1 2

0.01U_0402_25V7K

747@

P

PC135

Q101

4

0.1U_0402_10V7K

PC138

@

0.01U_0402_25V7K

2

12

PC109

@

PC113

1 2

EC_SMB_CK1<40,45>

EC_SMB_DA1<40,45>

12

PC134

731@

747@

8 7

5

PC102

61

PC124

1 2

747@

12

0.01U_0402_25V7K

VIN

12

PR136

3.3K_1206_5%~D

61

2

PQ1111A

4 4

L2N7002DW1T1G_SC88-6

BQ24747

BATT_TEMPACOFF

324K/0402

5

0.1U/0402

V1

3

@

PQ113B

4

L2N7002DW1T1G_SC88-6

B

I

ada=0~3.34A(65W)

I

ada=0~4.62A(90W)

3

P

A

DP_I = 19.9*Iadapter*Rsense

1

2

1 2

5600P_0402_25V7K~D

VIN

PR109

10_1206_1%

1 2

PQ113A

@

L2N7002DW1T1G_SC88-6

PC111

1U_0603_25V6K~D

VIN

731@

PR142

232K_0402_1%

1 2

PR116

49.9K_0402_1%

0_0402_5%~D PR119

@

1 2

0_0402_5%~D PR120

@

1 2

PC117

747@

12

2200P_0402_50V7K

MAX8731_REF

PR129

747@

1 2

10K_0402_5%

56P_0402_50V8~D

12

PC125

747@

1U_0603_10V6K

747@

PR132

0/0402

PC123

0.1U/0603

PR127

PC139

0.1U/0603

PR107

0/0402

P

R102

0.01_1206_1%

12

PR123

1 2

7.5K_0402_5%

PC128

@

0.1U_0402_10V7K

747@

DCIN

ACSETIN

747@

12

4

3

C

PU100

PR117

PR142

PC135

PC132

C

P

+

B

SIN

CSIP

12

PR127

731@

0.1U_0603_25V7K

1 2

PC107

0.047U_0603_25V7M

731@

1

PU100

22

DCIN

ICREF

2

ACIN

13

ACOK

11

VDDSMB

10

SCL

9

SDA

14

NC

8

VICM

6

FBO

5

EAI

4

EAO

3

VREF

7

CE

12

GND

29

TP

ISL88731CHRTZ-T_QFN28_5X5~D

ISL88731C

12

PR107

10_0402_5%

28

CSSP

731@

PC123

1 2

27

ICOUT

CSSN

BOOT

VDDP

UGATE

PHASE

LGATE

PGND

CSOP

CSON

10_0402_5%

731@

26

25

BST

21

24

23

20

19 18

17

15

VFB

16

NC

BQ24747

ISL88731C BQ24747 0.1u

@

100k

100k @

158k

232k

0.1u

@

324k

220p

0.01u0@

PL101

1UH_NRS4018T1R0NDGJ_3.2A_30%

1 2

PC108

PC110

0.1U_0603_25V7K

1U_0603_10V6K

1 2

PR111

4.7_0603_5%

12

PR114

2.2_0603_5%

1 2

BAT54HT1G_SOD323-2~D

1 2

PR130

100_0402_5%

731@

BST_CHGA

1 2

BATT+

1 2

731@

VDDP_LDO

DH_CHG

LX_CHG

PR122

PR123

PR129

PC117

PC124

PC126

PC125

PD101

PC103

12

4.7U_0805_25V6-K

PC104

747@

@

12

0.1U_0603_25V7K

PC106

4.7U_0805_25V6-K

PC136

0.1U_0603_25V7K

1 2

PC115

1 2

1U_0603_10V6K

DL_CHG

BQ24747ISL88731C

@

200k

7.5kPR137

10kPR112

2200p

56p

120p

1u

CHG_B+

12

PC105

2200P_0402_25V7K

12

PC112

1000P_0402_50V7K

786

5

PQ108

4

123

786

5

PQ110

4

123

47K_0402_1%

PQ107

AO4466L_SO8~D

10UH_PCMB063T-100MS_4A_20%

AO4712L_SO8~D

PC129

PC139

PR132

PR111

PC110

PD101

Q102

AO4407AL_SO8

1 2 3 6

4

PR110

1 2

13

VDDP_LDO

DDTC115EUA-7-F_SOT323

PL100

1 2

12

4.7_1206_5%

PR141

12

10_0402_5%731@

PC121

PR132

680P_0402_50V7K

PC129

747@

0.1U_0603_25V7K

1 2

BQ24747ISL88731C

0.01u

@

0.22u

10

4.7

1u@

@

BAT54HT1G

8 7

5

PR108

200K_0402_1%

1 2

100K_0402_1%

PR118

1 2

2

10K_0402_5%

PR121

0.01_1206_1%

1

CHG

2

12

PC139

731@

1 2

0.22U_0603_25V7K

@

0.1u

@

VIN

V1

PR138

1 2

2

ACOFF

L2N7002DW1T1G_SC88-6

4

3

12

0_0402_5%

PR128

PC130

@

0.1U_0603_25V7K

PC108

PR127

PR107

PC123

731@ for ISL88731C

747@ for BQ24747

D

3

S2P : CV = 13.3V CC: 1.54A

4S1P: CV = 17.7V CC: 1.1A

3

5

PQ112B

4

L2N7002DW1T1G_SC88-6

61

PQ112A

BATT+

12

1 2

12

PC118

PC122

10U_0805_25V5K~D

PC120

PC119

@

10U_0805_25V5K~D

BQ24747ISL88731C

@PC134

10

0.047u

0

0.1u

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

A

B

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/07/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_CHARGER

LA-9101P

D

46 57Wednesday, August 29, 2012

0.4

CyberForum.ru

A

1 1

12

PC203

0.1U_0402_25V6

+3VALWP

VCOUT0_PH

B++

12

PC204

2200P_0402_50V7K

PR213 2.2K_0402_5%

1 2

12

PC226

@

0.1U_0402_10V7K

PC205

4.7U_0805_25V6-K

PL200

3.3UH_PCMB063T-3R3MS_6.5A_20%

1 2

1

+

PC212 330U_6.3V_M

2

ENTRIP1

34

PQ206B

12

PC227

@

L2N7002DW1T1G_SC88-6

0.1U_0402_10V7K

reserve from ESD requirement

PR215

@

3/5V_EN-2

0_0402_5%~D

12

B+

12

2 2

PC220 0.1U_0402_25V6

PC222 0.1U_0402_25V6

PC223 0.1U_0402_25V6

PC221 0.1U_0402_25V6

@

PL202

1UH_PCMB053T-1R0MS_7A_20%

1 2

12

PC224 0.1U_0402_25V6

PC225 0.1U_0402_25V6

@

reserve from ESD requirement

3.3VALWP TDC 5.4A Peak Current 7.7A OCP current 9.2A

3 3

TYP MAX H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :11mohm , 14mohm

EC_ON<39,40>

VCOUT0_PH<40>

reserve from ESD requirement

4 4

PR209

4.7_1206_5%

5

2

PC219

4.7U_0603_10V6K

12

@

SNUB_3V

12

PC214

@

N_3_5V_001

680P_0402_50V7K

13

B

PQ202 AON7408L_DFN8-5

3 5

241

5

4

123

PQ204 AON7702A_DFN8-5

ENTRIP2

61

PQ206A

2

L2N7002DW1T1G_SC88-6

1 2

PR214

100K_0402_5%

PQ201

DDTC115EUA-7-F_SOT-323

12

PC206

10U_0805_6.3V6M

PC210

0.22U_0603_10V7K

12

LX_3V

PD200@

B++

PC229

@12BZV55-B5V1_SOD80C2

VCOUT0_PH

1000P_0402_50V7K

12

PC228

@

0.1U_0402_10V7K

VL

+3VLP

1 2

21

0_0402_5%@

1 2

PR207

1 2

2.2_0603_5%

LG_3V

PR200

@

499K_0402_1%

PR211

@

PR212

2

VREF_6182

BST_3V

12

@

200K_0402_1%

+5VALWP

0.1U_0402_25V6

PC202

1 2

PR201

13.7K_0402_1%

1 2

PR203

20K_0402_1%

1 2

PR205

133K_0402_1%

1 2

25

7

8

9

10

UG_3V

11

12

PC217

1U_0603_10V6K

2VREF_6182

@

PU200

P PAD

VO2

VREG3

BOOT2

UGATE2

PHASE2

LGATE2

1 2

C

1U_0603_16V6K

PC201

FB_3V

ENTRIP2

5

6

FB2

ENTRIP2

SKIPSEL

EN

14

13

B++

PJP202

PAD-OPEN 4x4m PJP204

PAD-OPEN 4x4m

D

12

0.1U_0402_25V6

PC200

@

1 2

PR202

30.9K_0402_1%

1 2

PR204

4

15

TONSEL

2

3

REF

VIN16GND

17

12

PC218

0.1U_0402_25V6

FB_5V

1

FB1

ENTRIP1

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

PC216

4.7U_0805_10V6K

+5VALW

20K_0402_1%

1 2

PR206 130K_0402_1%

1 2

ENTRIP1

24

VO1

23

22

BST_5V

21

UG_5V

20

LX_5V

19

LG_5V

RT8205LZQW(2) W QFN 24P PWM

VL

+3VALWP

PR208

1 2

2.2_0603_5%

B++

12

PC208

PC207

0.1U_0402_25V6

0.22U_0603_10V7K

POK <45>

BST1_5VBST1_3V

PJP203

1 2

PAD-OPEN 4x4m PJP200

1 2

PAD-OPEN 4x4m

2200P_0402_50V7K

12

PC211

12

PC209

4.7U_0805_25V6-K

12

@

AON7702A_DFN8-5

+3VALW

PQ203 AON7408L_DFN8-5

3 5

241

5

4

12

PC230

1000P_0402_50V7K

123

PQ205

5VALWP TDC 5.6A Peak Current 8A OCP current 9.6A TYP MAX H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :11mohm , 14mohm

PL201

3.3UH_PCMB063T-3R3MS_6.5A_20%

1 2

12

@

PR210

4.7_1206_5%

SNUB_5V

12

PC215

@

680P_0402_50V7K

1

+

PC213 330U_6.3V_M

2

E

+5VALWP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/07/31

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_3.3VALWP/5VALWP

LA-9101P

E

47 57Wednesday, August 29, 2012

0.4

CyberForum.ru

A

1 1

2 2

+3VALW

SUSP#<10,35,40,49,50>

PJP400

1 2

PAD-OPEN 3x3m

@

1 2

PR402 100K_0402_5%

1.8VSP_VIN 1.8VSP_LX

12

PC403 22U_0805_6.3VAM

EN_1.8VSP

PR401

@

47K_0402_5%

12

B

PU400

4

LX

PVIN

PG

LX

PVIN

SVIN

FB

EN

TP

NC

7

1

11

SY8033BDBC_DFN10_3X3

2

3

6

1.8VSP_FB

NC

10

9

8

5

12

PC405

0.22U_0402_16V7K

PL400

1UH_NRS4018T1R0NDGJ_3.2A_30%

1 2

12

SNUB_1.8VSP

12

PR403

20K_0402_1%

PR404

4.7_1206_5%

PR400

10K_0402_1%

PC401

680P_0402_50V7K

12

PC402

22P_0402_50V8J

12

C

<Vo=1.8V> VFB=0.6V Vo=VFB*(1+PR403/PR400)=0.6*(1+20K/10K)=1.8V

D

+1.8VSP

+1.8VSP TDC 2.6A

12

PC400

PC404

22U_0805_6.3V6M

Peak Current 3.8A OCP current 4.5A

PJP401

@

+1.8VSP

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

A

B

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/07/31

1 2

PAD-OPEN 3x3m

Compal Secret Data

C

+1.8VS

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_1.8VSP

LA-9101P

D

48 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

D D

+V1.05S_VCCP_PWRGOOD<51>

PR502

1 2

TRIP_+V1.05S_VCCPP

53.6K_0402_1%

12

EN_+V1.05S_VCCPP

FB_+V1.05S_VCCPP

RF_+V1.05S_VCCPP

12

PR504

470K_0402_1%

PR503

150K_0402_5%

SUSP#<10,35,40,48,50>

C C

1 2

PC506

0.22U_0402_16V7K

+3VS

PR501 100K_0402_5%

1 2

PR507

4.99K_0402_1%

1

2

3

4

5

4

PU500

PGOOD

TRIP

EN

VFB

TST

TPS51212DSCR_SON10_3X3

1000P_0402_50V7K@

12

PC509

10

VBST

9

DRVH

8

SW

7

V5IN

6

DRVL

11

TP

12

BST_+V1.05S_VCCPP

UG_+V1.05S_VCCPP

SW_+V1.05S_VCCPP

LG_+V1.05S_VCCPP

12

PR506

1.2K_0402_1%@

PR500

1 2

2.2_0603_5%

PC500

1 2

1U_0603_10V6K

+VCCP

PC505

.1U_0603_25V7K

12

+5VALW

PC510

@

3

+V1.05S_VCCPP_B+

12

5

PQ500

4

SIR472DP-T1-GE3_POWERPAK8-5~D

123

5

PQ501

4

12

213

SIR818DP-T1_POWERPAK-SO8-5~D

1000P_0402_50V7K

PC502

0.1U_0402_25V6

PL500

1UH_PCMB063T-1R0MS_12A_20%

1 2

12

PR505

4.7_1206_5%@

12

PC508

@

680P_0402_50V7K

12

PC501

PC503

2200P_0402_50V7K

1 2

2

PJP500

@

2

112

JUMP_43X118

12

PC504

4.7U_0805_25V6-K

B+

1

+VCCP

PC507

0.1U_0402_10V7K

PR508

100_0402_5%

1 2

VCCIO_SENSE <9>

PR511

@

1 2

PR509 10K_0402_1%

1 2

B B

+V1.05S_VCCP TDC 11A Peak Current 16A OCP current 19A TYP MAX

PJP501

@

PR510

@

10_0402_1%

1 2

A A

+VCCP +1.05VS

5

4

1 2

PAD-OPEN 4x4m

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/07/31

H/S Rds(on) 10mohm , 14.5mohm L/S Rds(on) :3mohm , 3.6mohm

Compal Secret Data

0_0402_5%~D

Deciphered Date

2

VSSIO_SENSE_R <9>

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_+VCCIO

LA-9101P

1

49 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

B

+

D D

+1.5VP

1.5VP TDC 6A Peak Current 8A OCP current 10A

PJP303

@

2

+1.5VP +1.5V

C C

B B

JUMP_43X118

PJP304

@

2

JUMP_43X118

112

SUSP#

SUSP#<10,35,40,48,49>

0.1U_0402_16V7K

A A

1 2

62K_0402_1%

PR1101

1 2

0_0402_5%~D

P

JP302

@

2

112

JUMP_43X118

1UH_PCMB063T-1R0MS_12A_20%

1

+

PC308 330U_2.5V_M

2

VGA@

PR1104

@

12

@

PC1104

1 2

PR1103 10K_0402_1%

1

.5V_B+

12

PL300

1 2

TRIP_+1.5VGPU

12

VGA@

PR1106

470K_0402_1%

VGA@

12

PC301

4.7U_0805_25V6-K

EN_+1.5VGPU

FB_+1.5VGPU

RF_+1.5VGPU

12

PC302

4.7U_0805_25V6-K

12

@

PR303

4.7_1206_5%

SNUB_1.5V

12

@

SYSON<35,40>

VGA@

PU1100

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

TPS51212DSCR_SON10_3X3

VGA@

PR1105

11.5K_0402_1%

4

P

R301

1 2

2.2_0603_5%

12

PC305

PC303

0.1U_0402_25V6 2200P_0402_50V7K

PQ300

AON7408L_DFN8-5

241

PQ301

AON7702A_DFN8-5

123

PC312

680P_0402_50V7K

PR306

200K_0402_5%

1 2

10

BST_+1.5VGPU

VBST

9

DRVH

V5IN

DRVL

12

UG_+1.5VGPU

8

SW_+1.5VGPU

SW

7

6

LG_+1.5VGPU

11

TP

3 5

5

4

12

PC300

1U_0402_6.3VX5R

P

C304

0.22U_0603_10V7K

1 2

+5VALW

12

PC316

12

VGA@

PC1107 1U_0603_10V6K

1000P_0402_50V7K

+5VALW

5.1_0603_5%

1 2

SUSP#

VGA@

PR1100

1 2

2.2_0603_5%

PR304

100K_0402_5%

1 2

B

OOT_1.5V

PR302

8.66K_0402_1%

1 2

12

PC311 1U_0603_10V6K

PR308

VGA@

PC1108

0.1U_0603_25V7K

1 2

+1.5VGPUP

3

D

H_1.5V

S

W_1.5V

L_1.5V

D

VDD_1.5V

PC1109

@

CS_1.5V

PC309 1U_0603_10V6K

+5VALW

12

PC315

12

1000P_0402_50V7K

1.5V_B+

S5_1.5V

S3_1.5V

0.1U_0402_10V7K

2

P

JP301

LDOIN_1.5V

V

16

17

PHASE

LGATE

PGND

CS

RT8207MZQW_WQ FN20_3X3

VDDP

VDD

PGOOD

10

PR300

1M_0402_1%

1 2

+V1.05SP_B+

VGA@

PQ1100

AON7408L_DFN8-5

12

VGA@

@

PQ1101

4.7_1206_5%

AON7702A_DFN8-5

12

@

112

UGATE

TON

9

1UH_PCMB053T-1R0MS_7A_20%

PR1102

PC1106

680P_0402_50V7K

+1.5VGPU

15

14

13

12

11

3 5

241

5

4

123

PJP1102

2

JUMP_43X118@

19

18

BOOT

S5

8

7

12

VGA@

PC1100

0.1U_0402_25V6

PL1100

1 2

20

U300

P

VTT

P

VLDOIN

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

S3

6

VGA@

12

PC1101

2200P_0402_50V7K

VGA@

12

PAD-OPEN1x1m

21

AD

1

2

3

4

5

PC314 220P_0402_50V8J~D

1 2

PR305

10K_0402_1%

1.5V_FB

PR307 10K_0402_1%

1 2

VGA@

12

VGA@

PC1102

PC1105

4.7U_0805_25V6-K

+1.5VGPU TDC 4.2A Peak Current 6A OCP current 7.2A

1.5VP

+

12

VTTREF_1.5V

+1.5VP

12

PJP1100

@

2

JUMP_43X118

1

+

2

12

PC306

PC313 .1U_0402_16V7K

@

112

VGA@

PC1103 330U_2.5V_M

10U_0805_6.3V6M

+1.5VP

12

PC307

10U_0805_6.3V6M

PC310

0.033U_0402_16V7K

B+

0.75VSP

+

0.75VSP

+1.5VGPUP

0.75Volt +/- 5% TDC 0.7A Peak Current 1A OCP Current 1.2A

@

P

JP300

1 2

PAD-OPEN 3x3m

1

0.75VS

+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/07/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_+1.5VP/+1.5VGPUP/0.75VSP

LA-9101P

1

50 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

D D

4

3

2

1

VID [0] VID[1] VCCSA Vout 0 0 0.9V 0 1 0.85V 1 0 0.775V 1 1 0.75V

output voltage adjustable network

12

PC600

PR605

100K_0402_5%

1 2

12

PC601

@

0.1U_0402_10V7K

SNUB_+1.5VP

680P_0402_50V7K

PR600

4.7_1206_5%

1 2

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

1 2

SA_PGOOD <40>

12

+3VS

PR601

@

0_0402_5%~D

VCCSA_VID0 <10>

VCCSA_VID1 <10>

PL600

+V1.05S_VCCP_PWRGOOD <49>

PC604

1 2

22U_0805_6.3VAM

C C

PL601

HCB1608KF-121T30_0603

+3VALW +VCCSAP

B B

1 2

PC605

2200P_0402_50V7K

+VCCSA_PWR_SRC +VCCSA_PHASE

2

1

PC603

0.1U_0603_25V7K

12

68P_0402_50V8J

PC612

PC611

+VCCSAP_FB

10U_0805_6.3V6M

PC610

SY8037DDCC_DFN12_3X3

12

PR603

1 2

1K_0402_5%

PU600

12

PVIN

11

PVIN

10

SVIN

9

FB

8

VOUT

7

VID1

1

LX

2

LX

3

LX

4

PG

5

+VCCSA_EN

EN

6

VID0

GND

13

PR604

1 2

1K_0402_5%

+VCC_SAP TDC 4.2A Peak Current 6A OCP current 7.2A

PC607

PC606

1 2

22U_0805_6.3VAM

PC609

1 2

22U_0805_6.3VAM

PR606

100_0402_5%

12

PR602

@

1 2

0_0402_5%~D

VCCSA_SENSE <10>

The 1k PD on the VCCSA VIDs are empty. These should be stuffed to ensure that VCCSA VID is 00 prior to VCCIO stability.

@

PJP601

+VCCSAP

+VCCP

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

reserve for Pentium and Celeron only

2012/08/22 2013/07/31

1 2

PAD-OPEN 4x4m

1

2

PR607

@

0.004_2512_1%

Compal Secret Data

Deciphered Date

2

+VCCSA

4

+VCCSA

3

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_+VCCSAP

LA-9101P

1

0.4

51 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

2

1

P

Local sense put on HW site

P

C703

@

D D

VSUMG+

12

PR707

2.61K_0402_1%

12

PH700

VSUMG-

10KB_0402_5%_ERTJ0ER103J

12

C C

PC711

.1U_0402_16V7K

VR_ON<40>

VR_SVID_CLK<9>

VR_SVID_ALRT#<9>

VR_SVID_DAT<9>

VR_HOT#<40>

+VCCP

PR730 54.9_0402_1%

12

B B

A A

PR735 75_0402_5%@

PR737 130_0402_1%

@

12

PC710

.1U_0402_16V7K

12

PR709

PR724

1 2

0_0402_5%

SCLK

ALERT#

SDA

12

11K_0402_1%

PR722

1 2

0_0402_5%~D

@

CC_AXG_SENSE<10>

V

SS_AXG_SENSE<10>

12

PC707

PR710

0.033U_0402_16V7K

0_0402_5%

1 2

@

12

PC719

43P_0402_50V8J~D

VSUM+

VSUM-

PC709

PC708

.1U_0402_16V7K

@

0.082U_0402_16V7K

PR753

@

649_0402_1%

12

PH701

470K_0402_5%_ TSM0B474J4702RE

12

PR715

27.4K_0402_1%

1 2

PR723 0_0402_5%~D@

1 2

PR729 0_0402_5%~D@

1 2

PR731 0_0402_5%~D@

1 2

PR732 0_0402_5%~D@

PH702

470K_0402_5%_ TSM0B474J4702RE

PR727

27.4K_0402_1%

12

PR746

12

2.61K_0402_1%

PR747 11K_0402_1%

PH703

10KB_0402_5%_ERTJ0ER103J

12

PC743

.1U_0402_16V7K

392_0402_1%

1 2

12

1 2

PR711

PC738

PR713 0_0402_5%

330P_0402_50V7K

P

1 2

0.01U_0402_50V7K

PC735

@

2200P_0402_50V7K

1 2

PR712

3.83K_0402_1%

1 2

PR725

3.83K_0402_1%

1 2

+5VS

12

.1U_0402_16V7K

C706

12

NTCG

VR_EN

SCLK

ALERT#

SDA

VR_HOT#_1

NTC

PR733

@

1 2

0_0402_5%~D

PC739

0.22U_0402_16V7K

12

0.033U_0402_16V7K

PR752

@

649_0402_1%

PC740

365_0402_1%

12

@

499_0402_1%

1

NTCG

2

VR_ON

3

SCLK

4

ALERT#

5

SDA

6

VR_HOT#

7

NTC

8

ISEN2

PR750

12

PC732

@

2200P_0402_50V7K

1 2

2.61K_0402_1%

P

R704

33

PAD

R702

P

12

390P_0402_50V7K

31

32

30

ISUMPG

ISUMNG

PU700 ISL95833HRTZ-T_TQFN32_4X4

ISEN19ISUMP10ISUMN11RTN12FB13COMP14PGOOD15BOOT1

2K_0402_1%

P

130K_0402_1%

P

C704

12

IMVP_PWRGD

PR708 0_0402_5%@

1 2

29

26

28

27

25

FBG

RTNG

BOOTG

COMPG

UGATEG

PGOODG

16

PGOOD

PR726

1 2

0_0402_5%~D

R701

330P_0402_50V7K

12

R703

12

P

C705

1 2

68P_0402_50V8J

IMVP_PWRGD <40>

BOOTG

24

PHASEG

23

LGATEG

22

VCCP

21

VDD

20

PWM2

19

LGATE1

18

PHASE1

17

UGATE1

@

PR728

1.91K_0402_1%

499_0402_1%

@

1 2

330P_0402_50V7K

PC741

1 2

0.01U_0402_50V7K

P

C701

12

C702

P

12

150P_0402_50V8F~D

0.22U_0402_16V7K

UGATEG

PHASEG

LGATEG

VDD

LGATE1

PHASE1

UGATE1

12

PC722

PR736

390P_0402_50V7K

12

PR740

12

1.78K_0402_1%

PC737

PC750

2.2_0603_5%

12

VGATE <15,6>

+3VS

12

130K_0402_1%

PR744

1 2

2K_0402_1%

12

PR705

33.2K_0402_1%

1 2 12

PR763

PR720

1_0603_5%

PC714

1U_0603_10V6K

BOOT1

47P_0402_50V8J

PR741

12

@

12

PR749

2.2_0603_5%

PC723

12

PC727

12

150P_0402_50V8F~D

PC729

1 2

330P_0402_50V7K

VCCSENSE <9>

VSSSENSE <9>

4

12

PC755

1000P_0402_50V7K

12

PC715 1U_0603_10V6K

12

PC742

0.22U_0402_16V7K

LGATE1

5

213

+5VS

UGATE1

PHASE1

1 2

PC756

@

1000P_0402_50V7K

PR742

42.2K_0402_1%

1 2

B

JP701

@

P

VCC_GFX_PWR_SRC

+

12

PQ700

SIR472DP-T1-GE3_POWERPAK8-5~D

123

5

PQ702

4

213

SIR818DP-T1_POWERPAK-SO8-5~D

12

PC746

10U_0805_25V6K

0.22UH_FDUE0640J-H-R22M-P3_25A_20%

12

PQ703

PR760

@

4.7_1206_5%

12

SIR818DP-T1_POWERPAK-SO8-5~D

PC751

@

680P_0402_50V7K

PC747

10U_0805_25V6K

12

PC749

PC752

0.1U_0402_25V6 2200P_0402_25V7K

PL700

1

4

3

2

PR758

1 2

3.65K_0603_1%

VSUMG+ VSUMG-

GP1_Vo

12

PR759

1_0402_5%

2

112

JUMP_43X118

VCC_GFXCORE TDC 21.5A Peak Current 33A OCP current 40A Load line -3.9mV/A

+VCC_GFXCORE_AXG

+

B+

PJP700

@

PC731

100U_25V_M~D

2

112

JUMP_43X118

+VCC_CORE

+VCC_PWR_SRC

1

5

PQ701

4

12

SIR472DP-T1-GE3_POWERPAK8-5~D

123

5

PQ704

213

SIR818DP-T1_POWERPAK-SO8-5~D

12

PC733

PC734

10U_0805_25V6K

12

@

PR751

4.7_1206_5%

12

PC745

@

VSUM+

3.65K_0603_1%

680P_0402_50V7K

12

PC754

PC736

0.1U_0402_25V6 2200P_0402_25V7K

0.22UH_FDUE0640J-H-R22M-P3_25A_20%

P1_SW

PR755

1 2

VSUM-

PR757

1_0402_5%

1

+

PC730

2

100U_25V_M~D

PL701

1

4

3

2

P1_Vo

VCC_core TDC 16A Peak Current 33A OCP current 40A Load line -2.9mV/A

12

Local sense put on HW site

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/07/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_VCORE

LA-9101P

1

52 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

+

3VS

D D

VSSSENSE_VGA<28>

VCCSENSE_VGA<28>

C C

P

PR827 10K_0402_5%VGA@

PR804 10K_0402_5%VGA@

PR820 10K_0402_5%@

R824 10K_0402_5%@

R819 10K_0402_5%VGA@

R829 10K_0402_5%@

R811 10K_0402_5%VGA@

R835 10K_0402_5%@

R807 10K_0402_5%VGA@

R837 10K_0402_5%@

12

PR830

1 2

0_0402_5%~D

PR834

1 2

0_0402_5%~D

PC801

VGA@

1000P_0402_50V7K

@

PU_VID1

G

PU_VID2

G

PU_VID3

PU_VID4

G

GPU_VID5

12

PR806

VGA@

100K_0402_1%

1 2

PC810

VGA@

220P_0402_50V7K

1 2

PR812

VGA@

1K_0402_1%

VGA_PWRGD<17>

1 2

PC804

VGA@

470P_0402_50V8J

VGA_COMP-1

Mars Pro

GPU_VID5 (GPIO_10)

B B

(GPIO_14)

(GPIO_15)

0

11

0

1

0 0 1

011

A A

+VGA_CORE TDC 22A Peak Current 30A OCP current 36A FSW=350kHz DCR 1.1mohm +/-5% Loadline = 1.5mohm

11

(GPIO_16)

111 0

0 0

1 0

0

GPU_VID1 (GPIO_20)

11110

00001

11 000

000 11

111 00

000 11

111 00

0

1111

1111 0

01

Core Voltage L evel

1.125V

1.1V

1.075V

1.05V

1.025V

1V

0.975V

0.95V

0.925V

0.9V

0.875V

0.85V

0.825V

0.8V

GPU_VID2

GPU_VID3

GPU_VID4

5

4

PR833

PC800

@

1 2

80.6K_0402_1%

+3VS

12

VGA@

PR815 1K_0402_1%

VGA_FB

12

VGA_COMP

PC809

VGA@

47P_0402_50V8J

1 2

VGA@

20K_0402_1%

VGA_CORE_B+

PR816

PR800

VGA@

2.05K_0402_1%

VGA_VCC

VGA_ILIM

1 2

VGA_CSCOMP

VGA@

1K_0402_1%

Thames XT

GPU_VID3

GPU_VID4

GPU_VID5 (GPIO_10)

+VGA_CORE TDC 20A Peak Current 30A OCP current 36A FSW=350kHz DCR 1.1mohm +/-5%

(GPIO_14)

0

01

0

11

4

(GPIO_15)

PX_MODE

1 2

PR823

PR818 0_0402_5%~D

@

0_0402_5%~D

1 2

0.1U_0402_16V7K

PR836

VGA@

PR814

1 2

@

VGA@

PU800

1

2

3

4

5

6

7

8

VGA_IREF

1 2

80.6K_0402_1%

1000P_0402_50V7K

0 0

VID1

VGA_EN

32

EN

VID031VID130VID229VID328VID427VID526VID6

PWRGD

IMON

CLKEN#

FBRTN

ADP3211AMNR2G_QFN32_5X5

FB

COMP

GPU

ILIM

IREF9RPM10RT11RAMP12LLINE13CSREF14CSFB15CSCOMP

VGA_RT

VGA_RPM

PR808

PR828

1 2

VGA@

301K_0402_1%

237K_0402_1%

12

VGA_RAMP-1

PC807

VGA@

GPU_VID2 (GPIO_16)

11

1

11

1

0

GPU_VID1

<26,40,54>

VID2

VGA_RAMP

12

GPU_VID2

GPU_VID3

VID3

PR825 422K_0402_1% VGA@

@

1 2

VGA_CSCOMP

GPU_VID1 (GPIO_20)

<25>

GPU_VID4

GPU_VID5

VID5

VID4

VGA_CSFB

12

VGA@

1000P_0402_50V7K

1 2

0_0402_5%

PR826

0_0402_5%~D

00

0

00

<25>

1 2

@

25

16

VGA_CSCOMP

@

<25>

5VS

+

VGA@

P

24

23

VGA_BOOST

22

21

20

19

18

17

33

12

VGA@

PC805

1500P_0402_50V7K

PC808

R813

10_0603_1%

1 2

12

VGA_VCC

UG_VGA_CORE

SW_VGA_CORE

LG_VGA_CORE

PR805 0_0402_5%~D

DRVH

PVCC

DRVL

PGND

AGND

PR822

VCC

BST

SW

Core Voltage L evel

1.05V

1V

0.95V

0.9V

3

VGA@

PC802 1U_0603_10V6K

PR817

VGA@

2.2_0603_5%

12

@

PC806 1200P_0402_50V7K

+3VALW

3

2

GA_CORE_B+

V

VGA@

12

5

PQ800

4

VGA@

123

SIR472DP-T1-GE3_POWERPAK8-5~D

PQ802

4

VGA@

213

SIR818DP-T1_POWERPAK-SO8-5~D

2

LX_PCIE

LX

3

LX

6

FB_PCIE

FB

LX

SY8036LDBC_DFN10_3x3

1

PC832

VGA@

0.1U_0402_10V7K

PR831

VGA@

10K_0402_1%

Deciphered Date

2

5

12

4

12

PC853

@

1000P_0402_50V7K

VGA@

PU801

10

PVIN

9

PVIN

8

SVIN

5

EN

11

5

4

PG

TP

SS

7

12

Compal Secret Data

PC839

VGA@

0.1U_0603_25V7K

12

1 2

VGA_BOOST-1

+5VS

PC803

VGA@

2.2U_0603_10V6K

1 2

12

VGA@

PR809 220K_0402_1%

@

PJP807

2

112

JUMP_43X79

VGA@

PXS_PWREN<16,26>

+VGA_PCIEP +1.0VGS

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR810 243K_0402_1%

PR843

1 2

200K_0402_5%

47K_0402_5%

Issued Date

@

12

VGA@

EN_PCIE

PR844

PCIE_B+

VGA@

12

PC833 22U_0805_6.3VAM

VGA@

12

PC842

0.1U_0402_10V7K

@

PJP806

2

112

JUMP_43X79

2012/08/22 2013/07/31

PC846

0.1U_0402_25V6

0.36UH_FDUM0640J-H-R36M-P3_22A_20%

12

PR821

PQ801

4.7_1206_5%

12

VGA@

PC841

1000P_0603_50V7K

213

SIR818DP-T1_POWERPAK-SO8-5~D

PR832

VGA@

5.9K_0402_1%

12

PC840

VGA@

12

22P_0402_50V8J

VGA@

PC847

@

VGA@

12

2200P_0402_50V7K

12

PC848

PC816

4.7U_0805_25V6-K

PL800

VGA@

1

4

3

2

PL803

VGA@

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

1 2

12

PR841

4.7_1206_5%

VGA@

SNUB_PCIE

12

PC834

VGA@

680P_0402_50V7K

+VGA_PCIEP

1

JP800

@

P

2

JUMP_43X118

4.7U_0805_25V6-K

1

+

PC843

2

VGA@

470U_D2_2VM_R4.5M

+VGA_PCIE TDC 3.6A Peak Current 5.2A OCP current 6A

112

1

+

2

B

+

+VGA_CORE

VGA@

12

PC849

PC817

VGA@

470U_D2_2VM_R4.5M

12

PC815

PC850

10U_0805_6.3V6M

+VGA_PCIEP

12

PC835

22U_0805_6.3VAM

VGA@

12

PC852

22U_0805_6.3VAM

VGA@

12

PC837

PC851

22U_0805_6.3VAM

VGA@

Thames XT Mars Pro

1.0VVGA_PCIE

PR832 6.81K

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_VGA_CORE/VGA_PCIE

LA-9101P

0.95V

5.9K

53 57Wednesday, August 29, 2012

1

53 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

D D

PJP1002

@

+3VALW

C C

PX_MODE<26,40,53>

112

JUMP_43X79

2

12

1 2

PR1020 10K_0402_5%

VGA@

PC1009

VGA@

22U_0805_6.3V6M

PR1021

1M_0402_5%

@

4

VGA@

PU1000

4

SY8033BDBC_DFN10_3X3

10

9

8

5

EN_VDDCIP

VGA@

12

PC1008

1 2

0.1U_0402_10V7K

PVIN

SVIN

EN

2

LX_VDDCIP

LX

PG

3

LX

6

FB_VDDCIP

FB

TP

NC

7

1

11

PL1000

1UH_NRS4018T1R0NDGJ_3.2A_30%

1 2

12

VGA@

PR1012

4.7_1206_5%

FB=0.6Volt

12

PC1011

680P_0402_50V7K

VGA@

10K_0402_1%

VGA@

PC1007

22P_0402_50V8J

VGA@

PR1018

12

3

1 2

VGA@

4.99K_0402_1%

12

PR1013

12

13

D

S

PR1011

VGA@

10_0402_5%

1 2

PR1014

1 2

0_0402_5%~D

VGA@

PR1015

29.4K_0402_1%

2

G

PQ1006

VGA@

2N7002W-T/R7_SOT323-3

@

12

PR1017 10K_0402_5%

12

PC1013

@

4700P_0402_25V7K

2

+VDDCI TDC 2.2A Peak Current 2.2A OCP current 4A

+VDDCIP

12

PC1012

PC1010

22U_0805_6.3V6M

VGA@

VDDCI_SEN <28>

+3VGS

12

PR1016

VGA@

10K_0402_5%

VGA@

12

PR1019 100K_0402_5%

@

VDDCI_VID <25>

1

VDDCI_VID (GPIO_6)

B B

PJP1003

@

2

+VDDCIP

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

112

JUMP_43X79

2012/08/22 2013/07/31

+VDDCI

Compal Secret Data

Deciphered Date

2

Low 0.9V

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_+VDDCIP

LA-9101P

1

54 57Wednesday, August 29, 2012

0.4

1VHigh

CyberForum.ru

5

+

VCC_CORE

For BOT side

4

+

VCC_GFXCORE_AXG

3

2

1

12

D D

PC1208

2.2U_0402_6.3V6M

12

+VCC_CORE

PC1216

22U_0805_6.3V6M

1

2

PC1222

22U_0805_6.3V6M

C C

+VCC_CORE

1

2

1

+

PC1228 330U_D2_2V_Y

2

12

PC1209

2.2U_0402_6.3V6M

12

For TOP side

PC1217

22U_0805_6.3V6M

1

2

PC1223

22U_0805_6.3V6M

1

2

1

+

PC1229 330U_D2_2V_Y

2

22U_0805_6.3V6M

PC1201

PC1200

2.2U_0402_6.3V6M

12

PC1203

PC1202

2.2U_0402_6.3V6M

12

PC1210

PC1211

2.2U_0402_6.3V6M

12

PC1218

PC1219

22U_0805_6.3V6M

1

2

PC1225

PC1224

22U_0805_6.3V6M

1

2

1

+

2

1

2

PC1230 330U_D2_2V_Y

22U_0805_6.3V6M

PC1205

PC1204

2.2U_0402_6.3V6M

12

PC1212

PC1213

2.2U_0402_6.3V6M

12

PC1220

PC1221

22U_0805_6.3V6M

1

2

PC1226

PC1227

22U_0805_6.3V6M

1

2

PC1207

PC1206

2.2U_0402_6.3V6M

12

PC1215

PC1214

2.2U_0402_6.3V6M

12

1

+

PC1254

2

330U_D2_2V_Y

12

PC1231

12

PC1242

22U_0805_6.3V6M

1

2

1

+

PC1255

2

330U_D2_2V_Y

12

PC1232

PC1233

1U_0402_6.3V6K

12

PC1243

10U_0603_6.3V6M

PC1248

PC1249

22U_0805_6.3V6M

1

2

PC1234

1U_0402_6.3V6K

12

PC1244

PC1245

10U_0603_6.3V6M

PC1250

22U_0805_6.3V6M

1

2

12

PC1236

PC1235

1U_0402_6.3V6K

12

PC1247

PC1246

10U_0603_6.3V6M

PC1251

PC1252

22U_0805_6.3V6M

1

2

12

PC1237

1U_0402_6.3V6K

10U_0603_6.3V6M

PC1253

12

PC1238

PC1239

1U_0402_6.3V6K

12

PC1241

PC1240

1U_0402_6.3V6K

Vaxg

Can connect to GND if motherboard only

‧‧‧‧

supports external graphics and if GFX VR is not stuffed in a common motherboard design,

VAXG can be left floating in a common

‧‧‧‧

motherboard design (Gfx VR keeps VAXG from floating) if the VR is stuffed

B B

A A

5

+VCCP

12

PC1257

12

PC1270

12

PC1258

PC1259

PC1260

PC1261

PC1262

PC1263

PC1264

1U_0402_6.3V6K

12

1U_0402_6.3V6K

12

PC1271

PC1272

1U_0402_6.3V6K

4

12

PC1273

PC1274

PC1275

1U_0402_6.3V6K

12

1U_0402_6.3V6K

12

PC1283

PC1284

10U_0603_6.3V6M

PC1285

10U_0603_6.3V6M

12

PC1277

PC1276

1U_0402_6.3V6K

12

PC1286

PC1287

10U_0603_6.3V6M

12

PC1265

1U_0402_6.3V6K

12

PC1278

1U_0402_6.3V6K

12

PC1288

10U_0603_6.3V6M

12

PC1266

PC1267

1U_0402_6.3V6K

12

PC1280

PC1279

1U_0402_6.3V6K

12

PC1290

PC1289

10U_0603_6.3V6M

3

12

PC1269

PC1268

1U_0402_6.3V6K

12

1U_0402_6.3V6K

12

10U_0603_6.3V6M

1U_0402_6.3V6K

12

PC1281

PC1282

1U_0402_6.3V6K

12

PC1291

PC1292

10U_0603_6.3V6M

1

+

PC1294

330U_D2_2V_Y

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PC1293

2

330U_D2_2V_Y

Compal Secret Data

2012/08/22 2013/07/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_PROCESSOR DECOUPLING

LA-9101P

1

55 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

4

3

2

1

D D

ower block

P

CPU OTP

Page 44

Turn Off

B+

+3VALWP: TDC:5.4A +5VALWP: TDC:5.6A RT8205LZQW(2) WQFN

Always

Page 46

DC IN

Input Switch

Page 45

CHARGER CC:0A~1A(4cell) or 2.1A(6cell) CV:17.7V(4cell) / 13.3V(6cell)

C C

ISL88731CHRTZ-T

Page 45

Battery

B B

PX_MODE

VR_ON

+VGA_CORE TDC: 22A ADP3211AMNR2G_QFN32

+VCC_CORE TDC: 16A ISL95833HRTZ-T_TQFN32

Page 52

Page 51

+3VALW

+1.8VSP: TDC:2.6A SY8033BDBC

Page 47

+VCCSAP: TDC:4.2A SY8037DDCC

Page 50

+VGA_PCIEP: TDC:3.6A SY8036LDBC

Page 52

+VDDCIP: TDC:2.2A SY8033BDBC

Page 53

+VCCP: TDC:11A TPS51212DSCR

Page 48

+1.5VP/+0.75VSP: TDC:6A/0.7A RT8207MZQW

Page 49

SUSP#

+V1.05S_VCCP_PWRGOOD

PXS_PWREN

PX_MODE

SUSP#

SYSON

VR_ON

A A

5

+VCC_GFXCORE_AXG TDC: 12A ISL95833HRTZ-T_TQFN32

4

Page 51

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.5VGPUP: TDC:4.2A TPS51212DSCR

Compal Secret Data

2012/08/22 2013/07/31

Compal Secret Data

Deciphered Date

2

Page 49

SUSP#

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_POWER BLOCK DIAGRAM

LA-9101P

1

56 57Wednesday, August 29, 2012

0.4

CyberForum.ru

5

D D

C C

Page# Title

Item

Item Issue Description

Page#Page#

ItemItem

1 M

2 44

45

46

3 49 +1.5VP/1.5VDGPU/0.75VSP 12/0 5/15 design change change PR302 fr om 12k to 8.66k X00Morris

504 12/05/ 23+VCCSAP Morris for P entium and Cele ron special BOM add PR607 an d reserve X00

5 49 +1.5VP/1.5VDGPU/0.75VSP 12/0 7/06 Morris de sign change to reduce low-side mosfet induce X01add PC316 1000p f

6 12/07/17 Morr is X01

45

7

45

8

44 DCIN/BA TT CONN/OTP revise OTP sett ing to 96C from thermal reques t change PR 927 from 12.1k to 11k

Title

TitleTitle

DCIN/BATT CONN/ OTP

CHARGER

3.3VALWP/5VALWP

CHARGER

CHARGER 12/07/17 Morris

Date

DateDate

12/05/11 Morris follow SSI memo for part short age issue X00change PQ112,PQ 114,PQ1111,PQ20 6,PQ904 from SB 00000CQ00 to SB 00000PV00

12/07/17 Morris

4

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

RequestRequest

Owner

OwnerOwner

orris51 VCORE 12/05/11 change PL700 an d PL701 from 0. 36u to 0.22u

adjust VR param eter X00

from EMI reques t change PR114 from 0 to 2.2

design change t o solve Battery LED is still on aft er unplug AC wh en SUT in S3S4S 5 issue

Issue DescriptionDate

Issue DescriptionIssue Description

3

Page 1

Page 1Page 1

Solution Description

Solution DescriptionSolution Description

change PC707 an d PC740 from 0. 047u to 0.033u change PR750 fr om 649 to 365 change PR711 fr om 649 to 392 change PR740 fr om 1.91k to 1.7 8k change PR705 fr om 150k to 33.2 k

add PR141 and P C121

change PR142 fr om 210k to 232k for ISL88731C (X76) change PR142 fr om 309k to 324k for BQ24747 (X 76)

2

Rev.

Rev.Page#

Rev.Rev.

X01

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/08/22 2013/07/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

PWR-PIR

LA-9101P

1

of

57 57Wednesday, August 29, 2012

0.4

Compal LA-9101P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual