Compal LA-9063P VIWZ1 DIS, IdeaPad Z400, IdeaPad Z500, LA-9063P VIWZ2 DIS Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

VIWZ1/VIWZ2 DIS M/B Schematics Document

Intel Ivy Bridge Processor with DDRIII + Panther Point PCH

nVIDIA N14P-GV2

2012-12-26

3 3

LA-9063P

REV:1.0

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

LA-9603P

LA-9603P

LA-9603P

E

1 62Wednesday, January 09, 2013

1 62Wednesday, January 09, 2013

1 62Wednesday, January 09, 2013

1.0

1.0

1.0

A

Compal confidential

File Name : VIWZ1/VIWZ2

Page23-32

1 1

nVIDIA N14P-GV2

VRAM 128Mb*16

DDR3*4 1GB

VRAM 256Mb*16

DDR3*4 2GB

HDMI

Page35

Connector
CRT

2 2

Connector
LVDS

Connector

Page34

Page33

Page45

LVDS

eDP

USB 3.0
USB2.0

USB3.0 *1(Left)
include USB2.0*1

B

PCI-E x8

PCI-E x1 *6

100MHz

2.7GT/s

Intel

Ivy Bridge

Socket-rPGA988B

37.5mm*37.5mm

Page5-11

FDI *8

Intel

Panther Point

HM70 / HM76

FCBGA 989

25mm*25mm

Page14-22

C

Dual Channel
DDR3 1066MHz(1.5V)
DDR3 1333MHz(1.5V)
DDR3 1600MHz(1.5V)

DMI *4

AZALIA

USB2.0 *14

SATA *6

HM76@

D

U4

PCH-HM70

SA00005MQ80

U4

PCH-HM76

SA00005FH70

DDR3 SO-DIMM *2

BANK 0, 1, 2, 3

Up to 8GB

Page12-13

Audio Codec
Realtek

ALC259-VC2

Page41

Camera Conn.
BlueTooth Conn.

HM70@ ZZZ

LA9063

DA_PCB

DA8000XJ000

ZZZ6

LA9063

DA_PCB

DA8000XJ100

14@

LS9061P PWR/B
LS9062P USB/B

15@

LS9065P PWR/B
LS9062P USB/B
LS9063P ODD/B
LS9064P LED/B

2 channel speaker
Int. Digital MIC array

Page41

Page41

(Combine with webcam)
Combo Jack*1

Page33

Page40

Page43

E

VIWZ1

VIWZ2

SPIROM

3 3

BIOS

Realtek

RTL8111F(GLAN)
RTL8105E-VD(10/100)

Page37

Page14

LPC BUS

EC

ENE KB9012

Page42

Card Reader
Reltek

RTS5178 for SDR50
SDXC/MMC

Page44

RJ-45
Connector

Mini PCIE Half size Slot *1
WLAN

4 4

A

Page38

Page36

PCI-E(WLAN)

Touch Pad Int. KBD

Page43

Thermal Sensor

EMC1403

B

Page39

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Issued Date

Issued Date

C

Page43

Compal Secret Data

Compal Secret Data

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

USB2.0 *2(Right)

Page 43

Mini PCIE Full size Slot *1

SSD

SATA HDD
SATA ODD

D

Page36

Page40

Page40

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

LA-9603P

LA-9603P

LA-9603P

E

2 62Wednesday, January 09, 2013

2 62Wednesday, January 09, 2013

2 62Wednesday, January 09, 2013

1.0

1.0

1.0

A

Voltage Rails

power
plane

1 1

State

S0

S3

S5 S4/AC

2 2

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

EC SM Bus1 address

Device

Smart Battery
USB Charger

0001 011X b
1010 111X b

+B

O

O
O
O

X

Address

+5VALW

+3VALW

O

O
O

X
X X X

EC SM Bus2 address

Device

Thermal Sensor EMC1403

PCH SM Bus address

Device Address

DDR DIMM0
DDR DIMM2

1001 000Xb
1001 010Xb

NV-GPU SM Bus address

3 3

Device Address

Internal thermal sensor

1001 111Xb (0x9E)

SMBUS Control Table

SOURCE

SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK

4 4

SML1DATA

KB9012

+3VALW

KB9012

+3VALW

PCH

+3VALW

PCH

+3VALW

PCH

+3VALW

VGA BATT KB9012 SODIMM

X V

X

X

X

V

+3VS

+3VALW

X

X

X

X

X

+3VS

X

V

X

+3VS

X

X

V

B

+1.5V

+VCC_GFXCORE_AXG

O

X X
X

Address

1001_101xb

Thermal

WLAN

Sensor

WWAN

X

XX

V

+3VS

X

+5VS
+3VS
+1.5VS
+V1.05S_VCCP
+VCC_CORE
+VGA_CORE

+1.8VS

+0.75VS
+1.05VS

OO

X

X

X

X

X

XX

V

+3VS

PCH

X

V

+3VS

X

X

XX X

Board ID

0
1
2
3
4
5
6

PCB Revision

LA-9061P
LA-9061P
LA-9061P
LA-9061P
LA-9063P 0.2
LA-9063P

7

USB Port Table

EHCI1

USB3.0

EHCI1

EHCI2

GPU BOM Structure Table

TP

X

BOM Structure

OPT@
OPTNOGCLK@
GV2@
GC6@ Select

X

V

+3VS

X

X

C

USB 2.0

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

1.0

0.3

0.2

0.1

0.2 15_TS

Port

0
1
2
3
4
5
6
7
8

9
10
11
12
13

N14P-GV2

V
V
V

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

Board ID / SKU ID Table for AD channelBOARD ID Table

Vcc 3.3V +/- 5%

Ra/Rc/Re

Board ID

USB Port (Left Side)
Touch Screen

Blue Tooth
Camera

USB Port (Right Side USB-BD)
USB Port (Right Side USB-BD)

Mini Card(WLAN)
Card Reader

100K +/- 5%

Rb / Rd / Rf V min

0
1

8.2K +/- 5%

2

18K +/- 5%

3

33K +/- 5%

4

56K +/- 5%

5

100K +/- 5%

6

200K +/- 5%

7

3 External
USB Port

D

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGHHIGHHIGH

HIGH

HIGH

V typ

AD_BID

ON

ON

ON

ON

ON

0 V 0 V

HIGH HIGH HIGH HIGH

LOW

LOW

LOW

HIGH

LOWLOWLOW

LOW LOW LOW LOW

0

AD_BID

0 V

E

ONONON ON

ON

ON

OFF

OFF

OFF

OFF

OFF

V

max

AD_BID

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

1.453 V 1.650 V 1.759 V

NC

2.500 V

1.935 V

2.200 V

3.300 V

2.341 V

3.300 V

BOM Structure Table

BTO Item BOM Structure

USB3.0

OPTIMUS part

integrate Graphic part UMA@
GPU:N14P-GV2 Strap
GPU:N14P-GV2 GC6 function

Support Green CLK GCLK@

not Support Green CLK NOGCLK@

Support Green CLK 244

Support Green CLK 304

Cardreader CR@

Support HP Woofer woofer@

EC RESET function RESET@

HDMI HDMI@

BlueTooth BT@

Connector ME@

45 LEVEL 45@

10/100 LAN 8105@

GIGA LAN

Deep Sleep S3 DS3@

Not Support Deep Sleep S3 NODS3@

ISCT AOAC@

ISCT not support NOAOAC@

Camera CMOS@

For Z490 (14") 14@

For Z590 (15") 15@

Unpop

USB Charger CHG@

not USBCharger NOCHG@

Keyboard Back Light KBL@

Touch Screen TS@

HM76 by PCH HM76@

HM70 by PCH HM70@

LOW

OFF

OFF

OFF

Porject Phase

Z-series

Z-series

Z-series

Z-series

Re-flash

Reserved

Reserved

Reserved

GV2@ GPU:N14P-GV2
OPT@

GV2@
GC6@
OPTNOGCLK@OPTIMUS no support GCLK
OPTGCLK@OPTIMUS support GCLK

GCLK244@
GCLK304@

Gastube@Gastube

GIGA@

@

RTS5178@Cardreader RTS5178
RTS5170@Cardreader RTS5170

MP
PVT
DVT
EVT
EVT
DVT
PVT
MP

TS_14@for 14" Touch Screen

for 15" Touch Screen

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

LA-9603P

LA-9603P

LA-9603P

Notes List

Notes List

Notes List

TS_15@

1.0

1.0

3 62Wednesday, January 09, 2013

3 62Wednesday, January 09, 2013

3 62Wednesday, January 09, 2013

E

1.0

5

4

3

2

1

Hot plug detect for IFP link C

VGA and GDDR3 Voltage Rails (N13x GPIO)

GPIO I/O ACTIVE Function Description
GPIO0

D D

GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10

C C

GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19

I GC6_FB_CLAMPH

OUT
OUT
OUT
OUT
OUT
OUT
I/O
OUT
OUT

IN
OUT
OUT
IN
OUT
IN
IN
IN

-

MEM_VDD_CTLOUT
Panel Back-Light brightness(PWM capable)

H

Panel Power Enable

H

Panel Back-Light On/Off (PWM)

H

RESERVED

­GC6_FB_REQ

L

-

3DVision
Thermal Catastrophic Over Temperature

L

Thermal Alert

L

Memory VREF Control

­PWM_VID-OUT
AC Power Detect Input
PSI-

N/A

N/A
N/A

N/A

(10K pull low)

Performance Mode P0 TDP at Tj = 102 C* (GDDR3)

GPU Mem NVCLK

Products

N13P-GL
64bit
1GB
GDDR3

Physical
Strapping pin

ROM_SCLK

(4) (1,5) (6)
(W) (W) (MHz)

TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD

ROM_SI
ROM_SO FB[0]
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

/MCLK NVVDD

TBD TBD

Power Rail

+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA

(V) (A) (W) (A) (W)

Logical
Strapping Bit3

PCI_DEVID[4]

FB[1]

PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
SOR3_EXPOSED

RESERVED PCIE_SPEED_

FBVDD

Logical
Strapping Bit2

SUB_VENDOR

USER[2] USER[1] USER[0]USER[3]

3GIO_PAD_CFG_ADR[2] 3GIO_PAD_CFG_ADR[1]3GIO_PAD_CFG_ADR[3]

SOR2_EXPOSED SOR1_EXPOSED

CHANGE_GEN3

FBVDDQ PCI Express I/O and
(GPU+Mem)
(1.35V)(1.35V)

(A) (W) (W)(mA) (W) (W) (W)(mA) (mA) (mA)

(1.05V)

Logical
Strapping Bit1

SLOT_CLK_CFG/PCI_DEVID[5]

PLLVDD

RAM_CFG[1]RAM_CFG[3] RAM_CFG[2]

I/O and
PLLVDD

Other
(3.3V)(1.05V)(1.8V)

Logical
Strapping Bit0

PEX_PLL_EN_TERM
RAM_CFG[0]

VGA_DEVICESMB_ALT_ADDR

3GIO_PAD_CFG_ADR[0]

SOR0_EXPOSED

PCIE_MAX_SPEED DP_PLL_VDD33V

B B

+3VS_VGA

+VGA_CORE

+1.5VS_VGA

+1.05VS_VGA

A A

tNVVDD >0

tFBVDDQ >0

tPEX_VDD >0

1. all power rail ramp up time should be larger than 40us

2. Optimus system VDD33 avoids drop down earlier than NVDD and FBVDDQ

Tpower-off <10ms

1.all GPU power rails should be turned off within 10ms

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Compal Electronics, Inc.

VGA Notes List

VGA Notes List

VGA Notes List
LA-9603P

LA-9603P

LA-9603P

4 62Wednesday, January 09, 2013

4 62Wednesday, January 09, 2013

4 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

D D

DMI_CRX_PTX_N0<16>
DMI_CRX_PTX_N1<16>
DMI_CRX_PTX_N2<16>
DMI_CRX_PTX_N3<16>

DMI_CRX_PTX_P0<16>
DMI_CRX_PTX_P1<16>
DMI_CRX_PTX_P2<16>
DMI_CRX_PTX_P3<16>

DMI_CTX_PRX_N0<16>
DMI_CTX_PRX_N1<16>
DMI_CTX_PRX_N2<16>
DMI_CTX_PRX_N3<16>

DMI_CTX_PRX_P0<16>
DMI_CTX_PRX_P1<16>
DMI_CTX_PRX_P2<16>
DMI_CTX_PRX_P3<16>

C C

eDP_COMPIO and ICOMPO signals
should be shorted near balls
and routed with typical
impedance <25 mohms

+V1.05S_VCCP

12

R7

24.9_0402_1%

B B

FDI_CTX_PRX_N0<16>
FDI_CTX_PRX_N1<16>
FDI_CTX_PRX_N2<16>
FDI_CTX_PRX_N3<16>
FDI_CTX_PRX_N4<16>
FDI_CTX_PRX_N5<16>
FDI_CTX_PRX_N6<16>
FDI_CTX_PRX_N7<16>

FDI_CTX_PRX_P0<16>
FDI_CTX_PRX_P1<16>
FDI_CTX_PRX_P2<16>
FDI_CTX_PRX_P3<16>
FDI_CTX_PRX_P4<16>
FDI_CTX_PRX_P5<16>
FDI_CTX_PRX_P6<16>
FDI_CTX_PRX_P7<16>

FDI_FSYNC0<16>
FDI_FSYNC1<16>

FDI_LSYNC0<16>
FDI_LSYNC1<16>

4

JCPU1A

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

FDI_INT<16>

EDP_COMP

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD#

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

TYCO_2013620-2_IVY BRIDGE

DMI

Intel(R) FDI

eDP

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]

PCI EXPRESS* - GRAPHICS

PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

3

+V1.05S_VCCP

R1

24.9_0402_1%

J22
J21
H22

K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32

J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32

M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25

M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25

PEG_COMP

PCIE_CRX_GTX_N15
PCIE_CRX_GTX_N14
PCIE_CRX_GTX_N13
PCIE_CRX_GTX_N12
PCIE_CRX_GTX_N11
PCIE_CRX_GTX_N10

PCIE_CRX_GTX_N9
PCIE_CRX_GTX_N8
PCIE_CRX_GTX_N7
PCIE_CRX_GTX_N6
PCIE_CRX_GTX_N5
PCIE_CRX_GTX_N4
PCIE_CRX_GTX_N3
PCIE_CRX_GTX_N2
PCIE_CRX_GTX_N1
PCIE_CRX_GTX_N0

PCIE_CRX_GTX_P15
PCIE_CRX_GTX_P14
PCIE_CRX_GTX_P13
PCIE_CRX_GTX_P12
PCIE_CRX_GTX_P11
PCIE_CRX_GTX_P10
PCIE_CRX_GTX_P9
PCIE_CRX_GTX_P8
PCIE_CRX_GTX_P7
PCIE_CRX_GTX_P6
PCIE_CRX_GTX_P5
PCIE_CRX_GTX_P4
PCIE_CRX_GTX_P3
PCIE_CRX_GTX_P2
PCIE_CRX_GTX_P1
PCIE_CRX_GTX_P0

PCIE_CTX_GRX_C_N15
PCIE_CTX_GRX_C_N14
PCIE_CTX_GRX_C_N13
PCIE_CTX_GRX_C_N12
PCIE_CTX_GRX_C_N11
PCIE_CTX_GRX_C_N10
PCIE_CTX_GRX_C_N9
PCIE_CTX_GRX_C_N8
PCIE_CTX_GRX_C_N7
PCIE_CTX_GRX_C_N6
PCIE_CTX_GRX_C_N5
PCIE_CTX_GRX_C_N4
PCIE_CTX_GRX_C_N3
PCIE_CTX_GRX_C_N2
PCIE_CTX_GRX_C_N1
PCIE_CTX_GRX_C_N0

PCIE_CTX_GRX_C_P15
PCIE_CTX_GRX_C_P14
PCIE_CTX_GRX_C_P13
PCIE_CTX_GRX_C_P12
PCIE_CTX_GRX_C_P11
PCIE_CTX_GRX_C_P10
PCIE_CTX_GRX_C_P9
PCIE_CTX_GRX_C_P8
PCIE_CTX_GRX_C_P7
PCIE_CTX_GRX_C_P6
PCIE_CTX_GRX_C_P5
PCIE_CTX_GRX_C_P4
PCIE_CTX_GRX_C_P3
PCIE_CTX_GRX_C_P2
PCIE_CTX_GRX_C_P1
PCIE_CTX_GRX_C_P0

PCIE_CRX_GTX_N[0..15] <23>

PCIE_CRX_GTX_P[0..15] <23>

C1 0.22U_0402_6.3V K@
C2 0.22U_0402_6.3V K@
C3 0.22U_0402_6.3V K@
C4 0.22U_0402_6.3V K@
C5 0.22U_0402_6.3V K@
C6 0.22U_0402_6.3V K@
C7 0.22U_0402_6.3V K@
C8 0.22U_0402_6.3V K@
C9 0.22U_0402_6.3V KOPT@
C10 0.22U_0402_6.3V KOPT@
C11 0.22U_0402_6.3V KOPT@
C12 0.22U_0402_6.3V KOPT@
C13 0.22U_0402_6.3V KOPT@
C14 0.22U_0402_6.3V KOPT@
C15 0.22U_0402_6.3V KOPT@
C16 0.22U_0402_6.3V KOPT@

C17 0.22U_0402_6.3V K@
C18 0.22U_0402_6.3V K@
C19 0.22U_0402_6.3V K@
C20 0.22U_0402_6.3V K@
C21 0.22U_0402_6.3V K@
C22 0.22U_0402_6.3V K@
C23 0.22U_0402_6.3V K@
C24 0.22U_0402_6.3V K@
C25 0.22U_0402_6.3V KOPT@
C26 0.22U_0402_6.3V KOPT@
C27 0.22U_0402_6.3V KOPT@
C28 0.22U_0402_6.3V KOPT@
C29 0.22U_0402_6.3V KOPT@
C30 0.22U_0402_6.3V KOPT@
C31 0.22U_0402_6.3V KOPT@
C32 0.22U_0402_6.3V KOPT@

2

PEG_ICOMPI and RCOMPO signals should be
shorted and routed
with - max length = 500 mils - typical
impedance = 43 mohms
PEG_ICOMPO signals should be routed with -

12

max length = 500 mils

- typical impedance = 14.5 mohms

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1: Normal Operation; Lane # definition matches
socket pin map definition

0:Lane Reversed

*

PCIE_CTX_GRX_N15
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N0

PCIE_CTX_GRX_P15
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P0

1

PCIE_CTX_GRX_N[0..15] <23>

PCIE_CTX_GRX_P[0..15] <23>

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

3

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

PROCESSOR(1/7) DMI,FDI,PEG

PROCESSOR(1/7) DMI,FDI,PEG

PROCESSOR(1/7) DMI,FDI,PEG

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-9603P

LA-9603P

LA-9603P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

5 62Wednesday, January 09, 2013

5 62Wednesday, January 09, 2013

5 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

4

3

2

1

D D

H_SNB_IVB#<19>

+V1.05S_VCCP

H_CATERR#

H_PROCHOT#_R

H_PM_SYNC_R

H_CPUPWRGD_R

PM_DRAM_PWRGD_R

BUF_CPU_RST#

BUF_CPU_RST#

H_THRMTRIP#<19>

1 2

R30
200_0402_5%

T48

H_PECI<42>

R15

56_0402_5%

1 2

R29

1 2

130_0402_5%

12

R9

62_0402_5%

H_PROCHOT#<42,48>

C C

H_CPUPWRGD<19>

B B

SYS_PWROK<16>

+3VS

PM_DRAM_PWRGD<16>

H_PROCHOT#

1 2

R26 0_0402_5%@

0.1U_0402_16V7K

1 2

@

R880 0_0402_5%

1 2

R161

10K_0402_5%

R02

H_PM_SYNC<16>

R27
10K_0402_5%

1 2

+3VALW

1

C33

2

U1

5

1

P

B

4

PM_SYS_PWRGD_BUF

O

2

A

G

74AHC1G09GW_TSSOP5

3

R22 0_0402_5%@

+1.5V_CPU_VDDQ

12

JCPU1B

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

TYCO_2013620-2_IVY BRIDGE

75_0402_5%

43_0402_1%

1 2

MISCTHERMALPWR MANAGEMENT

+V1.05S_VCCP

0.1U_0402_16V7K

12

R32

R34

BUFO_CPU_RST#

SN74LVC1G07DCKR_SC70-5

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

DDR3

MISC

JTAG & BPM

Buffered reset to CPU

+3VS

1

C34

2

5

U2

4

1

P

NC

Y

2

A

G

3

A28

BCLK

BCLK#

CLK_CPU_DMI_R

A27

CLK_CPU_DMI#_R

A16

R12 1K_0402_5%

A15

R13 1K_0402_5%

R8

H_DRAMRST#

AK1

SM_RCOMP0

A5

SM_RCOMP1

A4

SM_RCOMP2

DDR3 Compensation Signals

AP29

PRDY#

PREQ#

TRST#

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

XDP_PRDY#

AP27

XDP_PREQ#

AR26

XDP_TCK

TCK

AR27

XDP_TMS XDP_TDO

TMS

AP30

XDP_TRST#

AR28

XDP_TDI

TDI

AP26

XDP_TDO

TDO

AL35

XDP_DBRESET#

AT28

XDP_BPM#0

AR29

XDP_BPM#1

AR30

XDP_BPM#2

AT30

XDP_BPM#3

AP32

XDP_BPM#4

AR31

XDP_BPM#5

AT31

XDP_BPM#6

AR32

XDP_BPM#7

PCH_PLTRST#

3V

PCH_PLTRST# <18>

R10;R11 put on U4 side

R02

1 2

R10 0_0402_5%@

1 2

R11 0_0402_5%@

R02

12
12

H_DRAMRST# <7>

12

R16 140_0402_1%

12

R17 25.5_0402_1%

12

R18 200_0402_1%

T97
T98

R28 1K_0402_5%

T49
T90
T91
T92
T93
T94
T95
T96

12

+V1.05S_VCCP

XDP_TMS
XDP_TDI

XDP_TCK
XDP_TRST#

CLK_CPU_DMI <15>
CLK_CPU_DMI# <15>

R20 51_0402_5%
R21 51_0402_5%
R23 51_0402_5%@

R24 51_0402_5%
R25 51_0402_5%

+3VS

+V1.05S_VCCP

12
12
12

12
12

PU/PD for JTAG signals

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(2/7) PM,XDP,CLK

PROCESSOR(2/7) PM,XDP,CLK

PROCESSOR(2/7) PM,XDP,CLK

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-9603P

LA-9603P

LA-9603P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

6 62Wednesday, January 09, 2013

6 62Wednesday, January 09, 2013

6 62Wednesday, January 09, 2013

1.0

1.0

1.0

5

4

3

2

1

D10

AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9

AJ11

AT8
AT9

AH11

AR8

AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

AA9
AA7

AA10

AB8
AB9

JCPU1D

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

C9

SB_DQ[0]

A7

SB_DQ[1]
SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]

R6

SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

DDR SYSTEM MEMORY B

RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]

RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]

RSVD_TP[17]
RSVD_TP[18]

RSVD_TP[19]
RSVD_TP[20]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

R9

AE1
AD1
R10

AB2
AA2
T9

AA1
AB1
T10

AD3
AE3
AD6
AE6

AE4
AD4
AD5
AE5

D7
F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

M_CLK_DDR2 <13>
M_CLK_DDR#2 <13>
DDR_CKE2_DIMMB <13>

M_CLK_DDR3 <13>
M_CLK_DDR#3 <13>
DDR_CKE3_DIMMB <13>

DDR_CS2_DIMMB# <13>
DDR_CS3_DIMMB# <13>

M_ODT2 <13>
M_ODT3 <13>

DDR_B_DQS#[0..7] <13>

DDR_B_DQS[0..7] <13>

JCPU1C

DDR_A_D[0..63]<12>

D D

C C

B B

DDR_A_BS0<12>
DDR_A_BS1<12>
DDR_A_BS2<12>

DDR_A_CAS#<12>
DDR_A_RAS#<12>
DDR_A_WE#<12>

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

G10

N10

M10

AG6
AG5
AK6
AK5
AH5
AH6

AK8
AK9

AH8
AH9

AP11
AN11

AL12
AM12
AM11

AL11
AP12
AN12

AJ14
AH14

AL15
AK15

AL14
AK14

AJ15
AH15

AE10
AF10

AE8
AD9
AF9

C5

SA_DQ[0]

D5

SA_DQ[1]

D3

SA_DQ[2]

D2

SA_DQ[3]

D6

SA_DQ[4]

C6

SA_DQ[5]

C2

SA_DQ[6]

C3

SA_DQ[7]

F10

SA_DQ[8]

F8

SA_DQ[9]
SA_DQ[10]

G9

SA_DQ[11]

F9

SA_DQ[12]

F7

SA_DQ[13]

G8

SA_DQ[14]

G7

SA_DQ[15]

K4

SA_DQ[16]

K5

SA_DQ[17]

K1

SA_DQ[18]

J1

SA_DQ[19]

J5

SA_DQ[20]

J4

SA_DQ[21]

J2

SA_DQ[22]

K2

SA_DQ[23]

M8

SA_DQ[24]
SA_DQ[25]

N8

SA_DQ[26]

N7

SA_DQ[27]
SA_DQ[28]

M9

SA_DQ[29]

N9

SA_DQ[30]

M7

SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]

AJ5

SA_DQ[38]

AJ6

SA_DQ[39]

AJ8

SA_DQ[40]
SA_DQ[41]

AJ9

SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]

AL9

SA_DQ[46]

AL8

SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]

V6

SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

RSVD_TP[10]

DDR SYSTEM MEMORY A

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]

RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]

SA_CS#[0]

SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]

SA_ODT[0]
SA_ODT[1]

RSVD_TP[9]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AB6
AA6
V9

AA5
AB5
V10

AB4
AA4
W9

AB3
AA3
W10

AK3
AL3
AG1
AH1

AH3
AG3
AG2
AH2

C4
G6
J3
M6
AL6
AM8
AR12
AM15

D4
F6
K3
N6
AL5
AM9
AR11
AM14

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

M_CLK_DDR0 <12>
M_CLK_DDR#0 <12>
DDR_CKE0_DIMMA <12>

M_CLK_DDR1 <12>
M_CLK_DDR#1 <12>
DDR_CKE1_DIMMA <12>

DDR_CS0_DIMMA# <12>
DDR_CS1_DIMMA# <12>

M_ODT0 <12>
M_ODT1 <12>

DDR_A_DQS#[0..7] <12>

DDR_A_DQS[0..7] <12>

DDR_A_MA[0..15] <12> DDR_B_MA[0..15] <13>

DDR_B_D[0..63]<13>

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_BS0<13>
DDR_B_BS1<13>
DDR_B_BS2<13>

DDR_B_CAS#<13>
DDR_B_RAS#<13>
DDR_B_WE#<13>

Deciphered Date

Deciphered Date

Deciphered Date

TYCO_2013620-2_IVY BRIDGE

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(3/7) DDRIII

PROCESSOR(3/7) DDRIII

PROCESSOR(3/7) DDRIII

LA-9603P

LA-9603P

LA-9603P

1

7 62Wednesday, January 09, 2013

7 62Wednesday, January 09, 2013

7 62Wednesday, January 09, 2013

1.0

1.0

1.0

TYCO_2013620-2_IVY BRIDGE

+1.5V

12

R37

1K_0402_5%

D

S

13

H_DRAMRST#<6>

R39

4.99K_0402_1%

A A

DRAMRST_CNTRL_PCH<15>

DRAMRST_CNTRL<10>

DRAMRST_CNTRL_EC<42>

NODS3@

1 2

R40 0_0402_5%

R02

1 2

@

R92 0_0402_5%

1 2

R65 0_0402_5%DS3@

1 2

DRAMRST_CNTRL_R

For Deep S3

5

DDR3_DRAMRST#_RH_DRAMRST#

Q2

G

LBSS138LT1G_SOT-23-3

2

1

C35

0.047U 16V K X7R 0402

2

R38
1K_0402_5%

1 2

Eiffel used 0.01u
Module design used 0.047u

4

DDR3_DRAMRST# <12,13>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

5

4

3

2

1

CFG Straps for Processor

CFG2

12

R41

D D

1K_0402_1%

JCPU1E

RESERVED

VCC_DIE_SENSE
VSS_DIE_SENSE

RSVD_NCTF10

RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13

AK28

CFG[0]

AK29

CFG[1]

CFG2
CFG4

CFG5
CFG6
CFG7

+VCC_GFXCORE_AXG

+VCC_CORE

R252

R253

C C

49.9_0402_1%

49.9_0402_1%

1 2

1 2

1 2

R82 100_0402_1%@

1 2

R88 100_0402_1%@

VCC_AXG_VAL_SENSE

VSS_AXG_VAL_SENSE

VCC_VAL_SENSE

VSS_VAL_SENSE

Need PWR add new circuit on 1.05V(refer CRB)

VSS_AXG_VAL_SENSE

VSS_VAL_SENSE

R255

49.9_0402_1%

INTEL 12/28 recommand
to add RC120, RC121, RC122, RC123

B B

Please place as close as JCPU1

R257

49.9_0402_1%

1 2

1 2

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

TYCO_2013620-2_IVY BRIDGE

CFG

Interl request AH26 short GND
check on EVT phase

AH27

R02

RSVD28
RSVD29
RSVD30
RSVD31

RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5

RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RSVD_NCTF9

RSVD51
RSVD52

BCLK_ITP

BCLK_ITP#

KEY

AH26

L7
AG7
AE7
AK2

W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AN35
AM35

AT2
AT1
AR1

B1

1 2

R93 0_0402_5%@

PEG Static Lane Reversal - CFG2 is for the 16x

T13PAD

CFG2

*

Display Port Presence Strap

CFG4

*

for N14P_GV2 GPU 11/13

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

CFG[6:5]

10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled

01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

1: Normal Operation; Lane # definition matches
socket pin map definition

0:Lane Reversed

CFG4

12

R42

@

1K_0402_1%

1 : Disabled; No Physical Display Port
attached to Embedded Display Port

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

CFG6
CFG5

12

12

GV2@

1K_0402_1%

CFG7

@

R43

R44
1K_0402_1%

12

R45

@

1K_0402_1%

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB

CFG7

de assertion

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0: PEG Wait for BIOS for training

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/7) RSVD,CFG

PROCESSOR(4/7) RSVD,CFG

PROCESSOR(4/7) RSVD,CFG

LA-9603P

LA-9603P

LA-9603P

1

8 62Wednesday, January 09, 2013

8 62Wednesday, January 09, 2013

8 62Wednesday, January 09, 2013

1.0

1.0

1.0

5

4

3

2

1

+VCC_CORE

JCPU1F

QC=94A
DC=53A

D D

C C

B B

A A

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26

AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27

AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

POWER

CORE SUPPLY

PEG AND DDR

VCC_SENSE
VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8

VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK
VIDSOUT

+V1.05S_VCCP

8.5A

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

0.1U_0402_16V7K

+V1.05S_VCCP

1

C99

12

2

R46
75_0402_5%

VR_SVID_CLK

AJ29
AJ30
AJ28

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

1 2

R47 43_0402_5%

R02

1 2

R48 0_0402_5%@

R02

1 2

R49 0_0402_5%@

R50 130_0402_5%

12

+V1.05S_VCCP

VR_SVID_ALRT# <55>
VR_SVID_CLK <55>
VR_SVID_DAT <55>

0.1uF on power side

VCC_SENCE 100ohm +-1% pull-up to VCC near processor

Trace Impedance =27-33 ohm
Trace Length Matc < 25 mils

AJ35

VCCSENSE_R

AJ34

VSSSENSE_R

B10
A10

VSS_SENCE 100ohm +-1% pull-down to GND near processor

R02

1 2

R52 0_0402_5%@

R02

1 2

R53 0_0402_5%@

1 2

VSSIO_SENSEVSSIO_SENSE_L

R74

10_0402_1%

R74 & R79 put together

@

VSSIO_SENSE_L <53>

R79

10_0402_1%

VCCIO_SENSE <53>

+V1.05S_VCCP

12

series-resistors close to VR

+VCC_CORE

12

R51
100_0402_1%

12

R54
100_0402_1%

VCCSENSE <55>
VSSSENSE <55>

Security Classification

Security Classification

TYCO_2013620-2_IVY BRIDGE

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

PROCESSOR(5/7) PWR,BYPASS

PROCESSOR(5/7) PWR,BYPASS

PROCESSOR(5/7) PWR,BYPASS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-9603P

LA-9603P

LA-9603P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

9 62Wednesday, January 09, 2013

9 62Wednesday, January 09, 2013

9 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

4

3

2

1

+1.5V +1.5V_CPU_VDDQ

R02

1 2

R668 0_0402_5%@

SUSP<25,46,51,54>

D D

C C

B B

+VSB

12

R56
82K_0402_5%

13

D

Q4

2

G

2N7002K_SOT23-3

S

+VCC_GFXCORE_AXG

RUN_ON_CPU1.5VS3

J1

@

1 2

PAD-OPEN 4x4m

U3

AP4800BGM-HF_SO-8

8
7

5

JCPU1G

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

VAXG6

AR24

VAXG7

AR23

VAXG8

AR21

VAXG9

AR20

VAXG10

AR18

VAXG11

AR17

VAXG12

AP24

VAXG13

AP23

VAXG14

AP21

VAXG15

AP20

VAXG16

AP18

VAXG17

AP17

VAXG18

AN24

VAXG19

AN23

VAXG20

AN21

VAXG21

AN20

VAXG22

AN18

VAXG23

AN17

VAXG24

AM24

VAXG25

AM23

VAXG26

AM21

VAXG27

AM20

VAXG28

AM18

VAXG29

AM17

VAXG30

AL24

VAXG31

AL23

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36

AK24

VAXG37

AK23

VAXG38

AK21

VAXG39

AK20

VAXG40

AK18

VAXG41

AK17

VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48

AH24

VAXG49

AH23

VAXG50

AH21

VAXG51

AH20

VAXG52

AH18

VAXG53

AH17

VAXG54

4

1

AP4800

2

Id=9.6A

36

R885

1 2

15K_0402_1%

POWER

GRAPHICS

1

C97

0.047U_0603_25V7M

2

VSSAXG_SENSE

SENSE

LINES

SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

VREFMISC

DDR3 -1.5V RAILS

VAXG_SENSE

SM_VREF

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

+VCC_GFXCORE_AXG

AK35
AK34

AL1

+V_SM_VREF_CNT

B4

+V_DDR_REFA_R

D1

+V_DDR_REFB_R

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

M27

+VCCSA

M26
L26
J26
J25
J24
H26
H25

12

12

R616
10_0402_1%

R626
10_0402_1%

VCC_AXG_SENSE <55>

VSS_AXG_SENSE <55>

+V_SM_VREF should
have 20 mil trace width

C117

10U_0603_6.3V6M

C118

10U_0603_6.3V6M

1

1

2

2

C125

10U_0603_6.3V6M

C124

10U_0603_6.3V6M

1

1

2

2

+VREF_DQ_DIMMA

+VREF_DQ_DIMMB

DRAMRST_CNTRL

LBSS138LT1G_SOT-23-3

1 2
1 2

13

D

2

G

S

Q9

M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

+1.5V_CPU_VDDQ

12

R67
1K_0402_1%

12

1

0.1U_0402_16V7K

C119

10U_0603_6.3V6M

1

2

C126

10U_0603_6.3V6M

1

2

C98

C120

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

2

2

+VCCSA

C127

10U_0603_6.3V6M

1

2

2

+1.5V_CPU_VDDQ

1

C122

10U_0603_6.3V6M

C121

1

+

2

2

1

+

C128

@

330U_D2_2.5VY_R9M

2

R78
1K_0402_1%

C123

330U_2.5V_M

Q6

13

D

LBSS138LT1G_SOT-23-3

2

@

@

G

S

0_0402_5%~D
0_0402_5%~D

R353

1K_0402_1%

@

R670

R671

Q5-orignal part
AP2302GN-HF_SOT23-3
SB523020210

+1.5V +1.5V_CPU_VDDQ

DRAMRST_CNTRL

+V_DDR_REFA_R

+V_DDR_REFB_R

12

12

R64
1K_0402_1%

@

C96

0.1U_0402_16V7K

1 2

C95

0.1U_0402_16V7K

1 2

DRAMRST_CNTRL <7>

SA RAIL

10K_0402_5%

+3VS

R75

1 2

+1.8VS

R20

@

112

JUMP_43X79

80mil

J14

VCCIO_SEL

H23

C22
C24

A19

H_VCCSA_VID0 <52>
H_VCCSA_VID1 <52>

H_VCCP_SEL

R02

1 2

R77 0_0402_5%@

VCCSA_SENSE

VCCSA_VID[0]
VCCSA_VID[1]

2

C130

10U_0603_6.3V6M

1

2

1

2

C131

1U_0402_6.3V6K

1.5A

+1.8VS_VCCPLL

1U_0402_6.3V6K

1

2

B6

VCCPLL1

A6

C132

VCCPLL2

A2

VCCPLL3

TYCO_2013620-2_IVY BRIDGE

1.8V RAIL

+VCCSA_SENSE <52>

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

PROCESSOR(6/7) PWR

PROCESSOR(6/7) PWR

PROCESSOR(6/7) PWR

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-9603P

LA-9603P

LA-9603P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

10 62Wednesday, January 09, 2013

10 62Wednesday, January 09, 2013

10 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

JCPU1H

AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13

D D

C C

B B

A A

5

AT10

AT7
AT4

AT3
AR25
AR22
AR19
AR16
AR13
AR10

AR7

AR4

AR2

AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10

AP7

AP4

AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10

AN7

AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10

AM7
AM4
AM3
AM2

AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10

AL7
AL4

AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10

AK7

AK4
AJ25

TYCO_2013620-2_IVY BRIDGE

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

4

AJ22

VSS81

AJ19

VSS82

AJ16

VSS83

AJ13

VSS84

AJ10

VSS85

AJ7

VSS86

AJ4

VSS87

AJ3

VSS88

AJ2

VSS89

AJ1

VSS90

AH35

VSS91

AH34

VSS92

AH32

VSS93

AH30

VSS94

AH29

VSS95

AH28

VSS96

AH25

VSS98

AH22

VSS99

AH19

VSS100

AH16

VSS101

AH7

VSS102

AH4

VSS103

AG9

VSS104

AG8

VSS105

AG4

VSS106

AF6

VSS107

AF5

VSS108

AF3

VSS109

AF2

VSS110

AE35

VSS111

AE34

VSS112

AE33

VSS113

AE32

VSS114

AE31

VSS115

AE30

VSS116

AE29

VSS117

AE28

VSS118

VSS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

3

JCPU1I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

TYCO_2013620-2_IVY BRIDGE

Compal Secret Data

Compal Secret Data

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

3

Deciphered Date

Deciphered Date

Deciphered Date

VSS

2

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

2

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

1

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(7/7) VSS

PROCESSOR(7/7) VSS

PROCESSOR(7/7) VSS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-9603P

LA-9603P

LA-9603P

Date: Sheet of

Date: Sheet of

Date: Sheet of

11 62Wednesday, January 09, 2013

11 62Wednesday, January 09, 2013

11 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

R70
1K_0402_1%

5

+1.5V +1.5V

3A@1.5V

3A@1.5V

3A@1.5V3A@1.5V

DDR3 SO-DIMM A

R83

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2
DQS247VSS17

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4806-0103

ME@

VREF_CA

EVENT#

2.2U_0603_6.3V6K
C134

1

1

2

2

DDR_CKE0_DIMMA<7>

DDR_A_BS2<7>

M_CLK_DDR0<7>
M_CLK_DDR#0<7>

DDR_A_BS0<7>
DDR_A_WE#<7>

DDR_A_CAS#<7>

DDR_CS1_DIMMA#<7>

+3VS

5

DDR_A_D0

C133

DDR_A_D1
DDR_A_DM0
DDR_A_D2

DDR_A_D3
DDR_A_D8

DDR_A_D9
DDR_A_DQS#1

DDR_A_DQS1
DDR_A_D10

DDR_A_D11
DDR_A_D16

DDR_A_D17
DDR_A_DQS#2

DDR_A_DQS2
DDR_A_D18

DDR_A_D19
DDR_A_D24

DDR_A_D25
DDR_A_DM3
DDR_A_D26

DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3

DDR_A_MA1
M_CLK_DDR0

M_CLK_DDR#0
DDR_A_MA10

DDR_A_BS0
DDR_A_WE#

DDR_A_CAS# M_ODT0
DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5
DDR_A_D42

DDR_A_D43
DDR_A_D48

DDR_A_D49
DDR_A_DQS#6

DDR_A_DQS6
DDR_A_D50

DDR_A_D51
DDR_A_D56

DDR_A_D57
DDR_A_DM7
DDR_A_D58

DDR_A_D59

1 2

R81

10K_0402_5%

0.1U_0402_16V7K

2.2U_0603_6.3V6K
C156

C155

1

1

2

2

10K_0402_5%

12

+VREF_DQ_DIMMA

0.1U_0402_16V7K

1K_0402_1%

+1.5V

12

12

R71

+VREF_DQ_DIMMA

D D

C C

B B

A A

VSS3

DQS#0

DQS0
VSS6

VSS8
DQ12
DQ13

VSS10

DM1

DQ14
DQ15

DQ20
DQ21

DM2

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3
DQ30

DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1
VDD18
VSS28

DQ36

DQ37
VSS30

DM4

VSS31

DQ38

DQ39
VSS33

DQ44

DQ45
VSS35
DQS#5

DQS5
VSS38

DQ46

DQ47
VSS40

DQ52

DQ53
VSS42

DM6

VSS43

DQ54

DQ55
VSS45

DQ60

DQ61
VSS47
DQS#7

DQS7
VSS50

DQ62

DQ63
VSS52

SDA

VTT2

4

DDR_A_D[0..63]<7>
DDR_A_DQS[0..7]<7>

1

2

+VREF_CA

2.2U_0603_6.3V6K
C136

DDR_A_DQS#[0..7]<7>
DDR_A_MA[0..15]<7>

R72

1K_0402_1%

1K_0402_1%

4*0402 1uf

1*0402 2.2uf

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

DDR_A_D4
DDR_A_D5

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D6
DDR_A_D7

DDR_A_D12
DDR_A_D13

DDR_A_DM1
DDR3_DRAMRST#

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2
DDR_A_D22

DDR_A_D23
DDR_A_D28

DDR_A_D29
DDR_A_DQS#3

DDR_A_DQS3
DDR_A_D30

DDR_A_D31

DDR_CKE1_DIMMA
DDR_A_MA15

DDR_A_MA14
DDR_A_MA11

DDR_A_MA7
DDR_A_MA6

DDR_A_MA4
DDR_A_MA2

DDR_A_MA0
M_CLK_DDR1

M_CLK_DDR#1
DDR_A_BS1

DDR_A_RAS#
DDR_CS0_DIMMA#

M_ODT1

DDR_A_D36
DDR_A_D37

DDR_A_DM4
DDR_A_D38

DDR_A_D39
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D46

DDR_A_D47
DDR_A_D52

DDR_A_D53
DDR_A_DM6
DDR_A_D54

DDR_A_D55
DDR_A_D60

DDR_A_D61
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63

SMB_DATA_S3
SMB_CLK_S3

4

+0.75VS

0.65A@0.75V

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

DDR3_DRAMRST# <7,13>

DDR_CKE1_DIMMA <7>

M_CLK_DDR1 <7>
M_CLK_DDR#1 <7>

DDR_A_BS1 <7>
DDR_A_RAS# <7>

DDR_CS0_DIMMA# <7>
M_ODT0 <7>

M_ODT1 <7>

0.1U_0402_16V7K
C135

1

2

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)
6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

VREF =

1*0402 0.1uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

SMB_DATA_S3 <13,15,36,43>
SMB_CLK_S3 <13,15,36,43>

DQ4
DQ5

DQ6
DQ7

A15
A14

A11

A7
A6

A4
A2

A0

CK1

BA1

S0#

NC2

SCL

G2

3

2

1

(220uF_6.3V_4.2L_ESR17m)*1=(SF000002Y00)OSCAN

+1.5V

12

12

R73

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Layout Note:
Place near DIMM

+1.5V

C139

10U_0603_6.3V6M

1

1

2

2

Layout Note:
Place near DIMM

+0.75VS

C152

1U_0402_6.3V6K

1

2

Compal Secret Data

Compal Secret Data

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

(10uF_0603_6.3V)*8
(0.1uF_402_10V)*4

C140

10U_0603_6.3V6M

C141

10U_0603_6.3V6M

1

1

2

2

7/28 Update connect GND directly

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

Deciphered Date

Deciphered Date

Deciphered Date

2

C143

10U_0603_6.3V6M

C142

10U_0603_6.3V6M

1

2

Layout Note:
Place near DIMM

C146

0.1U_0402_16V7K

C147

C144

10U_0603_6.3V6M

C145

0.1U_0402_16V7K

1

1

2

2

0.1U_0402_16V7K

1

1

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

EVT Check

C148

0.1U_0402_16V7K

1

1

+

C149

@

220U_6.3V_M

2

2

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

LA-9603P

LA-9603P

LA-9603P

1

12 62Wednesday, January 09, 2013

12 62Wednesday, January 09, 2013

12 62Wednesday, January 09, 2013

1.0

1.0

1.0

R84

1K_0402_1%

1K_0402_1%

5

3A@1.5V

3A@1.5V

3A@1.5V3A@1.5V

JDIMM2

+VREF_DQ_DIMMB
DDR_B_D0

2.2U_0603_6.3V6K

0.1U_0402_16V7K

C158

R85

1

2

DDR_CKE2_DIMMB<7>

DDR_B_BS2<7>

M_CLK_DDR2<7>
M_CLK_DDR#2<7>

DDR_B_BS0<7>
DDR_B_WE#<7>

DDR_B_CAS#<7>

DDR_CS3_DIMMB#<7>

2.2U_0603_6.3V6K

+3VS

1

2

5

DDR_B_D1
DDR_B_DM0

1

C157

DDR_B_D2
DDR_B_D3

2

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3
DDR_B_D26

DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3

DDR_B_MA1
M_CLK_DDR2

M_CLK_DDR#2
DDR_B_MA10

DDR_B_BS0
DDR_B_WE#

DDR_B_CAS#
DDR_B_MA13

DDR_CS3_DIMMB#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D48

DDR_B_D49
DDR_B_DQS#6

DDR_B_DQS6
DDR_B_D50

DDR_B_D51
DDR_B_D56

DDR_B_D57
DDR_B_DM7
DDR_B_D58

DDR_B_D59

1 2

R95

10K_0402_5%

1 2

0.1U_0402_16V7K
R97 10K_0402_5%

C178

C177

1

2

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

LCN_DAN06-K4406-0103

ME@

+VREF_DQ_DIMMB

D D

For Arranale only +VREF_DQ_DIMMB
supply from a external 1.5V voltage divide
circuit.

C C

B B

A A

+1.5V

12

12

DQS0#

DQS0

DQ12
DQ13

RESET#

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3

DQ30
DQ31

CKE1

CK1#

RAS#

ODT0
ODT1

VREF_CA

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5

DQ46
DQ47

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7

DQ62
DQ63

EVENT#

GND2

BOSS2

4

+1.5V+1.5V

2

VSS

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206
208

DDR_B_D4
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D6
DDR_B_D7

DDR_B_D12
DDR_B_D13

DDR_B_DM1
DDR3_DRAMRST#

DDR_B_D14
DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2
DDR_B_D22

DDR_B_D23
DDR_B_D28

DDR_B_D29
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D30

DDR_B_D31

DDR_CKE3_DIMMB
DDR_B_MA15

DDR_B_MA14
DDR_B_MA11

DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2

DDR_B_MA0
M_CLK_DDR3

M_CLK_DDR#3
DDR_B_BS1

DDR_B_RAS#
DDR_CS2_DIMMB#

M_ODT2
M_ODT3

DDR_B_D36
DDR_B_D37

DDR_B_DM4
DDR_B_D38

DDR_B_D39
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D46

DDR_B_D47
DDR_B_D52

DDR_B_D53
DDR_B_DM6
DDR_B_D54

DDR_B_D55
DDR_B_D60

DDR_B_D61
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D62

DDR_B_D63

SMB_DATA_S3
SMB_CLK_S3

0.65A@0.75V

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

DDR3_DRAMRST# <7,12>

DDR_CKE3_DIMMB <7>

M_CLK_DDR3 <7>
M_CLK_DDR#3 <7>

DDR_B_BS1 <7>
DDR_B_RAS# <7>

DDR_CS2_DIMMB# <7>
M_ODT2 <7>

M_ODT3 <7>

+VREF_CB

0.1U_0402_16V7K

2.2U_0603_6.3V6K
C160

C159

1

1

2

2

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)
6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

1*0402 0.1uf

VDDSPD (3.3V)=

1*0402 0.1uf

SMB_DATA_S3 <12,15,36,43>
SMB_CLK_S3 <12,15,36,43>
+0.75VS

DQ4
DQ5
VSS

VSS
DQ6
DQ7
VSS

VSS
DM1

VSS

VSS

VSS
DM2
VSS

VSS

VSS

VSS

VSS

VDD

A15
A14

VDD

A11

A7

VDD

A6
A4

VDD

A2

A0
VDD
CK1

VDD
BA1

VDD

S0#

VDD

NC

VDD
VSS

VSS
DM4
VSS

VSS

VSS

VSS

VSS

VSS
DM6
VSS

VSS

VSS

VSS

VSS
SDA

SCL
VTT

4

3

DDR_B_D[0..63]<7>
DDR_B_DQS[0..7]<7>
DDR_B_DQS#[0..7]<7>
DDR_B_MA[0..15]<7>

+1.5V

12

R86

1K_0402_1%

12

R87

1K_0402_1%

4*0402 1uf

1*0402 2.2uf

1*0402 2.2uf

3

2

Layout Note:
Place near DIMM

C163

1

2

Layout Note:
Place near DIMM

+0.75VS

1U_0402_6.3V6K

C174

1U_0402_6.3V6K

1

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

(10uF_0603_6.3V)*8
(0.1uF_402_10V)*4

+1.5V

10U_0603_6.3V6M

10U_0603_6.3V6M

C164

C165

1

1

2

2

C176

1

2

Deciphered Date

Deciphered Date

Deciphered Date

2

10U_0603_6.3V6M

C166

1

2

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

Layout Note:
Place near DIMM

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C168

C167

1

1

2

2

1

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
C170

C169

1

1

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

0.1U_0402_16V7K

C171

C172

1

1

2

2

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

LA-9603P

LA-9603P

LA-9603P

1

13 62Wednesday, January 09, 2013

13 62Wednesday, January 09, 2013

13 62Wednesday, January 09, 2013

1.0

1.0

1.0

5

W=20milsW=20mils

+RTCBATT+RTCVCC

R99

1K_0402_5%

1 2

1

C179
1U_0402_6.3V6K

2

D D

+RTCVCC

1 2

R101 1M_0402_5%

1 2

R102 330K_0402_5%

INTVRMEN

H󶁪󶁪󶁪󶁪Integrated VRM enable

*

L󶁪󶁪󶁪󶁪Integrated VRM disable

12

SHORT PADS

SM_INTRUDER#
PCH_INTVRMEN

CLRP1

C180
18P_0402_50V8J

NOGCLK@

+RTCVCC

(INTVRMEN should always be pull high.)

+3VS

1 2

R105 1K_0402_5%@

HIGH= Enable ( No Reboot )
LOW= Disable (Default)

*

C C

+3V_PCH

R106 1K_0402_5%@

Low = Disabled (Default)

*

High = Enabled [Flash Descriptor Security Overide]

+3V_PCH

R108 1K_0402_5%

This signal has a weak internal pull-down
On Die PLL VR is supplied by

1.5V when smapled high

1.8V when sampled low

*

Needs to be pulled High for Chief River platfrom

HDA_BITCLK_AUDIO

HDA_SYNC_AUDIO<41>

B B

HDA_RST_AUDIO#<41>

HDA_SDOUT_AUDIO

A A

12

12

R112

33_0402_5%

1 2

R114

33_0402_5%

1 2

R116

33_0402_5%

1 2

R118

33_0402_5%

1 2

HDA_SPKR

HDA_SDOUT

HDA_SYNC

HDA_BIT_CLK

HDA_SYNC_R

HDA_RST#

HDA_SDOUT

ME_FLASH<42>

R878

1M_0402_5%

1 2

check with vender

Del Q10 check with codec
VDDIO using 3VALW

1 2

R98 10M_0402_5%

NOGCLK@

1 2

1

2

C183

1U_0402_6.3V6K

1 2

R103 20K_0402_5%

1 2

R100 20K_0402_5%

C182

1U_0402_6.3V6K

ME_FLASH

1 2

R107 1K_0402_1%@

+3V_PCH

+5VS

G

2

S

22P_0402_50V8J

Y1

NOGCLK@

HDA_SPKR<41>

HDA_SDIN0<41>

Q10
LBSS138LT1G_SOT-23-3

13

D

33_0402_5%

4

PCH_RTCX1
PCH_RTCX2

32.768KHZ_12.5PF_CM31532768DZFT

R03R03

1

C181
18P_0402_50V8J

NOGCLK@

2

CMOS

CLRP2

SHORT PADS

1

2

1

2

51_0402_5%

HDA_SYNC

R124

@

@

PCH_RTCX1

12

PCH_RTCX2
PCH_RTCRST#
PCH_SRTCRST#

CLRP3

SHORT PADS

12

SM_INTRUDER#
PCH_INTVRMEN

HDA_BIT_CLK
HDA_SYNC
HDA_SPKR
HDA_RST#

HDA_SDIN0

R02

R109
0_0402_5%

1 2

HDA_SDOUT

@

12

R26410K_0402_5% @

12

PCH_JTAG_TCK

R110

SPI_CLK_PCH_R
SPI_SB_CS0#
SPI_SB_CS1#

SPI_SI
SPI_SO_R

SPI_CLK_PCH_R

12

R124;c190 close to U4.T3 pin

C190

R02

Remove R176

close to Y1

R182

GCLK@

PCH_GPIO33

PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO

1 2

0_0402_5%

U4A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHER-POINT_FCBGA989

GCLK_32K

RTCIHDA

JTAG

SPI

3

GCLK_32K <44>

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP

SATA 6G

SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA4TXP
SATA5RXN

SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19

C38

LPC_AD0

A38

LPC_AD1

B37

LPC_AD2

C37

LPC_AD3

D36

LPC_FRAME#

E36
K36

V5

AM3
AM1
AP7
AP5

AM10
AM8
AP11
AP10

AD7
AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11
Y10

AB12
AB13

AH1

P3
V14
P1

R104 10K_0402_5%

SERIRQ

SERIRQ

SATA_ITX_C_DRX_N0
SATA_ITX_C_DRX_P0

SATA_DTX_R_IRX_P1
SATA_ITX_R_DRX_N1
SATA_ITX_R_DRX_P1

SATA_DTX_C_IRX_N2
SATA_DTX_C_IRX_P2
SATA_ITX_C_DRX_N2
SATA_ITX_C_DRX_P2

HM70 Disable SATA Port 1,3

SATA_DTX_R_IRX_N4
SATA_DTX_R_IRX_P4
SATA_ITX_R_DRX_N4
SATA_ITX_R_DRX_P4

SATA_COMP

SATA3_COMP

RBIAS_SATA3

SATALED#
PCH_GPIO21
BBS_BIT0_R

LPC_AD0 <36,42>
LPC_AD1 <36,42>
LPC_AD2 <36,42>
LPC_AD3 <36,42>

LPC_FRAME# <36,42>

12

R111

37.4_0402_1%

1 2

R113

49.9_0402_1%

1 2

1 2

R115

750_0402_1%

12

R117 10K_0402_5%

12

R119 10K_0402_5%

12

R187 10K_0402_5%

+3VS

1 2

R266

1 2

R221

1 2

R127

1 2

R129

EC and Mini card debug port

SERIRQ <42>

12
12

1 2
1 2

12
12

1 2
1 2

12
12

+1.05VS_VCC_SATA

+1.05VS_SATA3

+3VS
+3VS
+3VS

SPI_WP#1

3.3K_0402_5%

SPI_HOLD#1

3.3K_0402_5%

SPI_WP#

3.3K_0402_5%

SPI_HOLD#

3.3K_0402_5%

2

+3VS

SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0

SATA_ITX_DRX_N0

C1840.01U_0402_16V7K@

SATA_ITX_DRX_P0

C1850.01U_0402_16V7K@

CAP on Conn, side

R3110_0402_5% HM76@
R3120_0402_5% HM76@

SATA_ITX_C_DRX_N1

C1980.01U_0402_16V7K

SATA_ITX_C_DRX_P1

C1990.01U_0402_16V7K

R3180_0402_5% HM70@
R3150_0402_5% HM70@

C2290.01U_0402_16V7K
C2370.01U_0402_16V7K

SATA_DTX_C_IRX_N1
SATA_DTX_C_IRX_P1

SATA_ITX_C_DRX_N1
SATA_ITX_C_DRX_P1

SPI_SB_CS1#
SPI_SO_R

SPI_SB_CS0#
SPI_SO_R SPI_SO_L

R02

R291
0_0402_5%

1 2

@

1 2

R188

33_0402_5%

R02

R130
0_0402_5%

1 2

@

1 2

33_0402_5%

R131

SATA_DTX_C_IRX_N0 <36>

SATA_DTX_C_IRX_P0 <36>
SATA_ITX_DRX_N0 <36>
SATA_ITX_DRX_P0 <36>

12
12

SATA_DTX_C_IRX_N2 <40>

SATA_DTX_C_IRX_P2 <40>
SATA_ITX_C_DRX_N2 <40>
SATA_ITX_C_DRX_P2 <40>

CAP on Conn, side

SATA_DTX_C_IRX_N1SATA_DTX_R_IRX_N1

SATA_DTX_C_IRX_P1

SATA_ITX_DRX_N1

R55930_0402_5% @

SATA_ITX_DRX_P1

R55940_0402_5% @

SSD

ODD

HDD

8MB SPI ROM FOR ME
& Non-share ROM.

+3VS

U6

1

CS1#
SPI_SO1

SPI_WP#1

CS#

2

SO

3

WP#

4

GND

16M W25Q16BVSSIG SOIC 8P

U6 Rersver 4M+2M Solution

U5

1

CS#

SPI_WP#

CS#

2

SO

3

WP#

4

GND

W25Q32BVSSIG_SO8

VCC

HOLD#

SCLK

HOLD#

8
7

SPI_HOLD#1

6

SPI_CLK1

5

SPI_SI1

SI

+3VS

8

VCC

7

SPI_HOLD#

6

SPI_CLK_PCH SPI_CLK_PCH_R

SCLK

5

SPI_SI_R

SI

1

SATA_DTX_C_IRX_N1 <40>
SATA_DTX_C_IRX_P1 <40>
SATA_ITX_DRX_N1 <40>
SATA_ITX_DRX_P1 <40>

R02

R199
0_0402_5%

1 2

SPI_CLK_PCH_R

@

1 2

SPI_SI

R196
33_0402_5%

C191 0.1U_0402_16V7K

1 2

R02

R132
0_0402_5%

1 2

@

1 2

R133
33_0402_5%

HDD

SPI_SI

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PCH (1/9) SATA,HDA,SPI, LPC, XDP

PCH (1/9) SATA,HDA,SPI, LPC, XDP

PCH (1/9) SATA,HDA,SPI, LPC, XDP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-9603P

LA-9603P

LA-9603P

Date: Sheet of

Date: Sheet of

2

Date: Sheet

14 62Wednesday, January 09, 2013

14 62Wednesday, January 09, 2013

14 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

of

5

LAN

WLAN

D D

C C

LAN

WLAN

B B

A A

PCIE_PRX_DTX_N1<37>

PCIE_PRX_DTX_P1<37>
PCIE_PTX_C_DRX_N1<37>
PCIE_PTX_C_DRX_P1<37>

PCIE_PRX_DTX_N2<36>

PCIE_PRX_DTX_P2<36>
PCIE_PTX_C_DRX_N2<36>
PCIE_PTX_C_DRX_P2<36>

CLK_PCIE_LAN#<37>
CLK_PCIE_LAN<37>

CLKREQ_LAN#<37>

CLK_PCIE_WLAN1#<36>
CLK_PCIE_WLAN1<36>

CLKREQ_WLAN#<36>

+3V_PCH

+3VS

+3VS

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

1 2

C192 0.1U_0402_16V7K

1 2

C193 0.1U_0402_16V7K

1 2

C194 0.1U_0402_16V7K

1 2

C195 0.1U_0402_16V7K

HM70 not support
PCIE port 5-8

R02

1 2

R153 0_0402_5%@

1 2

R154 0_0402_5%@

R02

1 2

R151 0_0402_5%@
R152 10K_0402_5%

R02

R149 0_0402_5%@
R150 0_0402_5%@

R02

R156 0_0402_5%@
R158 10K_0402_5%

R147 10K_0402_5%

R301 10K_0402_5%

R165 10K_0402_5%

R168 10K_0402_5%

R170 10K_0402_5%

R172 10K_0402_5%

R174 10K_0402_5%

1 2
1 2

1 2

12

12

12

12

12

12

12

12

12

T52
T53

4

PCIE_PRX_DTX_N1
PCIE_PRX_DTX_P1
PCIE_PTX_DRX_N1
PCIE_PTX_DRX_P1

PCIE_PRX_DTX_N2
PCIE_PRX_DTX_P2
PCIE_PTX_DRX_N2
PCIE_PTX_DRX_P2

CLK_PCIE_LAN#_R
CLK_PCIE_LAN_R

CLKREQ_LAN#_R

CLK_PCIE_WLAN1#_R
CLK_PCIE_WLAN1_R

CLKREQ_WLAN#_R

PCH_GPIO20

PCH_GPIO25

PCH_GPIO26

PCH_GPIO44

PCH_GPIO56

PCH_GPIO45

PCH_GPIO46

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

U4B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-POINT_FCBGA989

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

CLOCKS

3

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_DATA1

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKOUT_DP_N

CLKOUT_DP_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_GND1_N
CLKIN_GND1_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_SATA_N
CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

E12
H14

SMBCLK

C9

SMBDATA

A12
C8

SML0CLK

G12

C13
E14
M16

M7

CL_CLK1

T11

P10

CL_RST1#

M10

AB37
AB38

AV22
AU22

AM12
AM13

BF18
BE18

BJ30
BG30

G24
E24

AK7
AK5

K45

H45

V47
V49

Y47

K43
F47
H47
K49

BIOS Request SKU ID

2

PCH_GPI011
PCH_SMBCLK
PCH_SMBDATA

DRAMRST_CNTRL_PCH

PCH_SML0CLK
PCH_SML0DATA

SML1CLK
SML1DATA

+3V_PCH

PEG_CLKREQ#_R

CLK_PCIE_VGA#_R CLK_PCIE_VGA#

CLK_CPU_DMI#
CLK_CPU_DMI

CLK_BUF_CPU_DMI#
CLK_BUF_CPU_DMI

CLKIN_DMI2#
CLKIN_DMI2

CLK_BUF_DREF_96M#
CLK_BUF_DREF_96M

CLK_BUF_PCIE_SATA#
CLK_BUF_PCIE_SATA

CLK_BUF_ICH_14M

CLK_PCI_LPBACK

XTAL25_OUT

XCLK_RCOMP

27M_SSC

PCH_GPIO67

12

R134

10K_0402_5%

R140 10K_0402_5%

R143
10K_0402_5%

1 2

R02

R146 0_0402_5%@
R148 0_0402_5%@

R02

R155 10K_0402_5%
R157 10K_0402_5%

R159 10K_0402_5%
R160 10K_0402_5%

R162 10K_0402_5%
R163 10K_0402_5%

R164 10K_0402_5%
R166 10K_0402_5%

R167 10K_0402_5%

R171

90.9_0402_1%

1 2

12

R02

R144 0_0402_5%

1 2

@

1 2
1 2

CLK_CPU_DMI# <6>
CLK_CPU_DMI <6>

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

CLK_PCI_LPBACK <18>

PCH_GPIO67 <19>

+3V_PCH

+1.05VS_VCCDIFFCLKN

+3V_PCH

DRAMRST_CNTRL_PCH <7>

12

R139

1K_0402_5%

+3V_PCH

+3V_PCH

+3V_PCH +3VS

CLK_PCIE_VGACLK_PCIE_VGA_R

2.2K_0402_5%

1 2

R136

1 2

R135

2.2K_0402_5%

2.2K_0402_5%

1 2

R141

1 2

R142

2.2K_0402_5%

CLK_REQ_VGA# <23>

CLK_PCIE_VGA# <23>

R02

Remove R1381

close to Y2

GCLK@

XTAL25_IN
XTAL25_OUT

12P_0402_50V8J

Q60A
2N7002KDWH_SOT363-6

6 1

2
5

3

2N7002KDWH_SOT363-6
Q60B

Q61A
2N7002KDWH_SOT363-6

6 1

2
5

3

2N7002KDWH_SOT363-6
Q61B

CLK_PCIE_VGA <23>

12

GCLK_PCH_25MHZXTAL25_IN

R13820_0402_5%

25MHZ_10PF_7V25000014

1

C196

NOGCLK@

2

SMB_CLK_S3

2.2K_0402_5%

1 2

+3VS

1 2

2.2K_0402_5%

4

SMB_DATA_S3

EC_SMB_CK2

4

EC_SMB_DA2

1 2

NOGCLK@

R169 1M_0402_5%

3

OSC

2

NC

Y2

NOGCLK@

1

SMB_CLK_S3 <12,13,36,43>

DIMM1

R137

DIMM2

R138

MINI CARD

SMB_DATA_S3 <12,13,36,43>

EC_SMB_CK2 <23,39,42>

VGA
EC
thermal sensor

EC_SMB_DA2 <23,39,42>

2.2K_0402_5%

PCH_SML0CLK
PCH_SML0DATA

GCLK_PCH_25MHZ <44>

4

NC

1

OSC

1

12P_0402_50V8J

NOGCLK@

2

R544

C197

+3V_PCH

1 2

R545

2.2K_0402_5%

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

PCH (2/9) PCIE, SMBUS, CLK

PCH (2/9) PCIE, SMBUS, CLK

PCH (2/9) PCIE, SMBUS, CLK

LA-9603P

LA-9603P

LA-9603P

1

15 62Wednesday, January 09, 2013

15 62Wednesday, January 09, 2013

15 62Wednesday, January 09, 2013

1.0

1.0

1.0

of

5

D D

U15
MC74VHC1G08DFT2G_SC70-5

3

1

VGATE<55>

PCH_PWROK

C C

G

A

4

SYS_PWROK

Y

2

B

P

5

+3VS

12

R180

@

100K_0402_1%

SYS_PWROK <6>

For Deep S3

AEPWROK can be connect to
PWROK if iAMT disable

R02

PCH_POK

+3V_PCH

B B

1 2

@

R191 0_0402_5%

R192 300_0402_5%

R194 10K_0402_5%
R5574 200K_0402_5%NODS3@
R197 10K_0402_5%

12

12
12
12

APWROK

PM_DRAM_PWRGD

SUSWARN#_R
AC_PRESENT_R
PCH_RSMRST#_R

PCH_PWROK<42>

PCH_APWROK<42>

PM_DRAM_PWRGD<6>

EC_RSMRST#<42>

SUSWARN#<42>

For Deep S3

PBTN_OUT#<42>

ACIN<42,49>

+V1.05S_VCCP

SUSACK#<42>

+3VS

PCH_PWROK

D29

CH751H-40PT_SOD323-2

+3V_PCH

4

DMI_CTX_PRX_N0<5>
DMI_CTX_PRX_N1<5>
DMI_CTX_PRX_N2<5>
DMI_CTX_PRX_N3<5>

DMI_CTX_PRX_P0<5>
DMI_CTX_PRX_P1<5>
DMI_CTX_PRX_P2<5>
DMI_CTX_PRX_P3<5>

DMI_CRX_PTX_N0<5>
DMI_CRX_PTX_N1<5>
DMI_CRX_PTX_N2<5>
DMI_CRX_PTX_N3<5>

DMI_CRX_PTX_P0<5>
DMI_CRX_PTX_P1<5>
DMI_CRX_PTX_P2<5>
DMI_CRX_PTX_P3<5>

1 2

R177 49.9_0402_1%

1 2

R178 750_0402_1%

4mil width and place
within 500mil of the PCH

R20

1 2

R304 0_0402_5%@

12

R18410K_0402_5%

R02

1 2

@

R190 0_0402_5%

1 2

@

R302 0_0402_5%

R02

1 2

@

R193 0_0402_5%

R20

R1455 0_0402_5%@

12

R02

1 2

@

R198 0_0402_5%

21

12

R200
10K_0402_5%

12

R201

10K_0402_5%

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

DMI_IRCOMP
RBIAS_CPY

SUSACK#_R

SYS_RST#

SYS_PWROK

PCH_POK

APWROK

PM_DRAM_PWRGD

PCH_RSMRST#_R

SUSWARN#_R

PBTN_OUT#_R

AC_PRESENT_R

PCH_GPIO72

RI#

U4C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPW RDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

PANTHER-POINT_FCBGA989

3

DMI

System Power Management

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6

FDI

FDI_RXP7

FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

2

BJ14

FDI_CTX_PRX_N0

AY14

FDI_CTX_PRX_N1

BE14

FDI_CTX_PRX_N2

BH13

FDI_CTX_PRX_N3

BC12

FDI_CTX_PRX_N4

BJ12

FDI_CTX_PRX_N5

BG10

FDI_CTX_PRX_N6

BG9

FDI_CTX_PRX_N7

BG14

FDI_CTX_PRX_P0

BB14

FDI_CTX_PRX_P1

BF14

FDI_CTX_PRX_P2

BG13

FDI_CTX_PRX_P3

BE12

FDI_CTX_PRX_P4

BG12

FDI_CTX_PRX_P5

BJ10

FDI_CTX_PRX_P6

BH9

FDI_CTX_PRX_P7

AW16

FDI_INT

AV12

FDI_FSYNC0

BC10

FDI_FSYNC1

AV14

FDI_LSYNC0

BB10

FDI_LSYNC1

A18

DSWODVREN

E22

PCH_DPWROK DPWROK_EC

R02

WAKE#

R185 0_0402_5%@

PM_CLKRUN#

SUS_STAT#

SLP_A#

SLP_SUS#_R

H_PM_SYNC

PCH_GPIO29

1 2

1 2

R186

R20

R1447 0_0402_5%

1 2

R261

10K_0402_5%

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

FDI_CTX_PRX_N0 <5>
FDI_CTX_PRX_N1 <5>
FDI_CTX_PRX_N2 <5>
FDI_CTX_PRX_N3 <5>
FDI_CTX_PRX_N4 <5>
FDI_CTX_PRX_N5 <5>
FDI_CTX_PRX_N6 <5>
FDI_CTX_PRX_N7 <5>

FDI_CTX_PRX_P0 <5>
FDI_CTX_PRX_P1 <5>
FDI_CTX_PRX_P2 <5>
FDI_CTX_PRX_P3 <5>
FDI_CTX_PRX_P4 <5>
FDI_CTX_PRX_P5 <5>
FDI_CTX_PRX_P6 <5>
FDI_CTX_PRX_P7 <5>

FDI_INT <5>
FDI_FSYNC0 <5>
FDI_FSYNC1 <5>
FDI_LSYNC0 <5>
FDI_LSYNC1 <5>

1 2

R181 0_0402_5%NODS3@

1 2

R267 0_0402_5%

DS3@

10K_0402_5%

T74

T99

12

@

H_PM_SYNC <6>

+3V_PCH

@

PCIE_WAKE# <36,37>

+3V_PCH

SUSCLK <42>

PM_SLP_S5# <42>

PM_SLP_S4# <42>

PM_SLP_S3# <42>

SLP_SUS# <42,46>

*

DSWODVREN - On Die DSW VR Enable
H󶁪Enable
L󶁪Disable

PCH_RSMRST#_R

For Deep S3

DPWROK_EC <42>

For Deep S3

R189 8.2K_0402_5%@

1 2

R299 10K_0402_5%

Can be left NC
when IAMT is not
support on the
platfrom

12

1

+RTCVCC

12

R179
330K_0402_5%

12

R183

+3VS

330K_0402_5%

@

Can be left NC if no use
integrated LAN.

For Deep S3

+3VALW

1 2

R195 200K_0402_5%DS3@

AC_PRESENT_R

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (3/9) DMI,FDI,PM,

PCH (3/9) DMI,FDI,PM,

PCH (3/9) DMI,FDI,PM,

LA-9603P

LA-9603P

LA-9603P

1

1.0

1.0

16 62Wednesday, January 09, 2013

16 62Wednesday, January 09, 2013

16 62Wednesday, January 09, 2013

1.0

5

+3VS

4

3

2

1

12

D D

C C

B B

2.2K_0402_5%

R559

2.2K_0402_5%

+3VS

12

12

12

R523

R524

2.2K_0402_5%

CRT_DDC_CLK
CRT_DDC_DATA

R234

2.2K_0402_5%

EDID_CLK
EDID_DATA

DAC_BLU<34>
DAC_GRN<34>
DAC_RED<34>

+3VS

PCH_ENBKL<33>

PCH_ENVDD<33>

PCH_PWM<33>

EDID_CLK<33>

EDID_DATA<33>

1 2

R2042.2K_0402_5%

1 2

R2052.2K_0402_5%

12

R2062.37K_0402_1%

LVDS_ACLK#<33>
LVDS_ACLK<33>

LVDS_A0#<33>
LVDS_A1#<33>
LVDS_A2#<33>

LVDS_A0<33>
LVDS_A1<33>
LVDS_A2<33>

LVDS_BCLK#<33>
LVDS_BCLK<33>

LVDS_B0#<33>
LVDS_B1#<33>
LVDS_B2#<33>

LVDS_B0<33>
LVDS_B1<33>
LVDS_B2<33>

R208 150_0402_1%
R209 150_0402_1%
R210 150_0402_1%

CRT_DDC_CLK<34>
CRT_DDC_DATA<34>

CRT_HSYNC<34>
CRT_VSYNC<34>

12
12
12

DAC_BLU
DAC_GRN
DAC_RED

1K_0402_1%

EDID_CLK
EDID_DATA

CTRL_CLK
CTRL_DATA

LVDS_IBG

LVD_VREF

CRT_DDC_CLK
CRT_DDC_DATA

CRT_IREF

12

R211

U4D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

PANTHER-POINT_FCBGA989

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_0P
DDPC_1P
DDPC_2P
DDPC_3P

DDPD_0P
DDPD_1P
DDPD_2P
DDPD_3P

AP43
AP45

AM42
AM40

AP39

HDMI@

AP40

2.2K_0402_5%

P38

HDMICLK_NB

M39

HDMIDAT_NB

AT49
AT47
AT40

AV42

TMDS_B_DATA2#_PCH

AV40

TMDS_B_DATA2_PCH

AV45

TMDS_B_DATA1#_PCH

AV46

TMDS_B_DATA1_PCH

AU48

TMDS_B_DATA0#_PCH

AU47

TMDS_B_DATA0_PCH

AV47

TMDS_B_CLK#_PCH

AV49

TMDS_B_CLK_PCH

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

+3VS

12

R202

TMDS_B_HPD# <35>

12

R203

HDMI@

2.2K_0402_5%

HDMICLK_NB <35>
HDMIDAT_NB <35>

1 2

C200 0.1U_0402_16V7KHDMI@

1 2

C201 0.1U_0402_16V7KHDMI@

1 2

C202 0.1U_0402_16V7KHDMI@

1 2

C203 0.1U_0402_16V7KHDMI@

1 2

C204 0.1U_0402_16V7KHDMI@

1 2

C205 0.1U_0402_16V7KHDMI@

1 2

C206 0.1U_0402_16V7KHDMI@

1 2

C207 0.1U_0402_16V7KHDMI@

CAP move on Conn, side

HDMI_TX2-_CK <35>
HDMI_TX2+_CK <35>
HDMI_TX1-_CK <35>
HDMI_TX1+_CK <35>
HDMI_TX0-_CK <35>
HDMI_TX0+_CK <35>
HDMI_CLK-_CK <35>
HDMI_CLK+_CK <35>

HDMI

HDMI D2
HDMI D1
HDMI D0
HDMI CLK

SDVO_TVCLKINN

SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_INTN
SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_1N
DDPC_2N
DDPC_3N

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

CRT

DDPD_HPD

DDPD_0N
DDPD_1N
DDPD_2N
DDPD_3N

A A

Security Classification

Security Classification

Security Classification

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

PCH (4/9) LVDS,CRT,DP,HDMI

PCH (4/9) LVDS,CRT,DP,HDMI

PCH (4/9) LVDS,CRT,DP,HDMI

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

LA-9603P

LA-9603P

LA-9603P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

17 62Wednesday, January 09, 2013

17 62Wednesday, January 09, 2013

17 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

+3VS

RP2

18

PCI_PIRQA#

27

PCI_PIRQD#

36

PCI_PIRQC#

45

PCI_PIRQB#

8.2K_8P4R_5%

D D

C C

GNT1#/
GPIO51

B B

PCH_WL_OFF#

A16 swap overide Strap/Top-Block
Swap Override jumper

PCI_GNT3#

RP1

18

PCH_GPIO2

27

DGPU_PWR_EN_R

36

PCH_GPIO4

45

ODD_DA#_R

8.2K_8P4R_5%

1 2

R213 8.2K_0402_5%

1 2

R225 8.2K_0402_5%

1 2

R292 8.2K_0402_5%@

1 2

R557 8.2K_0402_5%@

1 2

R259 8.2K_0402_5%

1 2

R212 8.2K_0402_5%

1 2

R214 8.2K_0402_5%@

PCH_GPIO5
PCH_WL_OFF#
PCH_GPIO51
PCH_GPIO53
DGPU_PWR_EN1
DGPU_HOLD_RST#_R
DGPU_HOLD_RST#_R

Boot BIOS Strap bit1 BBS1

Boot BIOS

Bit10

0
1
0

@

Destination

Reserved
Reserved
SPI

*

LPC

NVDD_PWR_ENDGPU_PWR_EN_R

*

Bit11

0 1
1
1
0

1 2

R319 0_0402_5%

1 2

R215 1K_0402_5%@

Low=A16 swap
override/Top-Block
Swap Override enabled
High=Default

NVDD_PWR_EN<54>

(Default)

GPIO55

1 2

R692 0_0402_5%@

PPT EDS DOC#474146

DGPU_HOLD_RST#<23>

CLK_PCI_LPBACK<15>

1 2

@

R222 0_0402_5%

4

HM70 not support USB3 port 3,4

DGPU_PWR_EN<23,25,42>

PCH_WL_OFF#<36>

CLK_PCI_EC<42>

CLK_PCI_DB<36>

USB30_RX_N1<45>

USB30_RX_P1<45>

USB30_TX_N1<45>

USB30_TX_P1<45>

ODD_DA#<40>

DGPU_PWR_EN1

T1833
T1829
T1825

T1834
T1832
T1826

T1835
T1831
T1827

T1836
T1830
T1828

R02

1 2

@

R553 0_0402_5%

R02

1 2

@

R691 0_0402_5%

1 2

R715 0_0402_5%@

PCH_PLTRST#<6>

1 2
1 2

3

U4E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

USB30_RX_N1
USB30_RX_N2
USB30_RX_N3
USB30_RX_N4
USB30_RX_P1
USB30_RX_P2
USB30_RX_P3
USB30_RX_P4
USB30_TX_N1
USB30_TX_N2
USB30_TX_N3
USB30_TX_N4
USB30_TX_P1
USB30_TX_P2
USB30_TX_P3
USB30_TX_P4

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

DGPU_HOLD_RST#_R
DGPU_PWR_EN1
DGPU_PWR_EN_R

PCH_GPIO51
PCH_GPIO53
PCH_WL_OFF#

PCH_GPIO2
ODD_DA#_R
PCH_GPIO4
PCH_GPIO5

PCI_PME#<42>

R21922_0402_5%
R22022_0402_5%

12

R17322_0402_5% @

PCH_PLTRST#

CLK_PCI_LPBACK_R
CLK_PCI_EC_R
CLK_PCI_DB_R

BE28

USB3Rn1

BC30

USB3Rn2

BE32

USB3Rn3

BJ32

USB3Rn4

BC28

USB3Rp1

BE30

USB3Rp2

BF32

USB3Rp3

BG32

USB3Rp4

AV26

USB3Tn1

BB26

USB3Tn2

AU28

USB3Tn3

AY30

USB3Tn4

AU26

USB3Tp1

AY26

USB3Tp2

AV28

USB3Tp3

AW30

USB3Tp4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

PANTHER-POINT_FCBGA989

RSVD

PCI

USB

RSVD1
RSVD2
RSVD3
RSVD4

RSVD5
RSVD6

RSVD7
RSVD8

RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

RSVD23
RSVD24

RSVD25
RSVD26

RSVD27
RSVD28

RSVD29

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

2

AY7
AV7
AU3
BG4

AT10
BC8

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5
AV10

AT8
AY5

BA2
AT12

BF3

USB DEBUG=PORT1 AND PORT9

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

C33

B33

A14
K20
B17
C16
L16
A16
D14
C14

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3

HM70 not support USB port 4,5,6,7,12,13

USB20_N8
USB20_P8
USB20_N9
USB20_P9
USB20_N10
USB20_P10
USB20_N11
USB20_P11

USBRBIAS

USBRBIAS

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

USB20_N0 <45>
USB20_P0 <45>
USB20_N1 <43>
USB20_P1 <43>
USB20_N2 <40>
USB20_P2 <40>
USB20_N3 <33>
USB20_P3 <33>

USB20_N8 <43>
USB20_P8 <43>
USB20_N9 <43>
USB20_P9 <43>
USB20_N10 <36>
USB20_P10 <36>
USB20_N11 <44>
USB20_P11 <44>

1 2

R218

22.6_0402_1%

Within 500 mils

LEFT USB

(USB 3.0)
Touch Screen
Bluetooth
USB Camera

(CR-B/D USB)
(CR-B/D USB)
WLAN
CARD READER

USB_OC0# Share with USB_OC4#
due to same power switch

USB_OC0# <45>

USB_OC4# <43>

USB_OC5#
USB_OC2#
USB_OC7#
USB_OC0#

USB_OC6#
USB_OC1#
USB_OC4#
USB_OC3#

1

RP310K_1206_8P4R_5%

4 5
3 6
2 7
1 8

4 5
3 6
2 7
1 8

RP410K_1206_8P4R_5%

+3V_PCH

A A

PLT_RST#<23,36,37,42>

12

1

C208

0.1U_0402_16V7K

5

@

2

R223
100K_0402_5%

3

G

A

4

Y

B

P

5

MC74VHC1G08DFT2G_SC70-5

+3VS

1

PCH_PLTRST#

2

U7

@

4

Security Classification

Security Classification

Security Classification

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

PCH (5/9) PCI, USB

PCH (5/9) PCI, USB

PCH (5/9) PCI, USB

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-9603P

LA-9603P

LA-9603P

Date: Sheet of

Date: Sheet of

Date: Sheet of

18 62Wednesday, January 09, 2013

18 62Wednesday, January 09, 2013

18 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

D D

+3V_PCH

GPIO28

On-Die PLL Voltage Regulator

This signal has a weak internal pull up

*

Deep S4,S5 wake event signal

*

RTC alarm,Power BTN,GPIO27
PCH_GPIO27 (Have internal Pull-High)

C C

Deep S4,S5 wake event signal

+3VALW

B B

Weak internal pull-high

1 2

R235 10K_0402_5%

H󶁪On-Die voltage regulator enable
L󶁪On-Die PLL Voltage Regulator disable

+3VS

12

12

1 2

R240 1K_0402_5%@

For DS3

DS3@

R5530 10K_0402_5%

R245 10K_0402_5%@

R244
10K_0402_5%

R881
10K_0402_5%

12

1 2

@

PCH_GPIO37

R250

@

10K_0402_5%

R547
10K_0402_5%

EC_SMI#

PCH_GPIO27

+3VS

12

12

INTEL_BT_OFF#

+3VS

+3VS

+3V_PCH

EC_LID_OUT#<42>

R231 10K_0402_5%

+3VS

DGPU_PWROK<46,54>

PU on power side

BT_DISABLE<36>

PCH_BT_ON#<36,40>

+3VS

+3VS

+3VS

+3V_PCH

1 2

+3V_PCH

1 2

BIOS Request SKU ID

+3VS

12

R246

R711

UMA@

1 2

R708

OPT@

A A

1 2

UMA@

10K_0402_5%

10K_0402_5%

PCH_GPIO38
PCH_GPIO67

12

R298

OPT@

PCH_GPIO38 PCH_GPIO67

10K_0402_5%

10K_0402_5%

PCH_GPIO67 <15>

Function

4

1 2

R233 10K_0402_5%

1 2

R227 10K_0402_5%

1 2

R228 10K_0402_5%

1 2

R229 10K_0402_5%@

1 2

R230 1K_0402_5%

R02

1 2

R297 0_0402_5%@

1 2

R232 10K_0402_1%@

+3VS

1 2

R238 10K_0402_5%

+3VS

1 2

R241 10K_0402_5%

1 2

R243 10K_0402_5%

R242 10K_0402_5%

R03

1 2

R247 10K_0402_5%

1 2

R248 10K_0402_5%

1 2

R249 10K_0402_5%

1 2

R251 10K_0402_5%

3

PCH_GPIO69

0
1

U4F

PCH_GPIO0
PCH_GPIO1
PCH_GPIO6

EC_SCI#<42>
EC_SMI#<42>

mSATA_DET#<36>

ODD_EN<40>

INTEL_BT_OFF#<36>

EC_SCI#
EC_SMI#
PCH_GPIO12PCH_GPIO28
EC_LID_OUT#
mSATA_DET#

DGPU_PWROK_R
BT_DISABLE
ODD_EN
PCH_GPIO27
PCH_GPIO28
PCH_BT_ON#
PCH_GPIO35
INTEL_BT_OFF#
PCH_GPIO37
PCH_GPIO38
PCH_GPIO39
PCH_GPIO48
PCH_GPIO49
PCH_GPIO57

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHER-POINT_FCBGA989

GPIO

Function

HM76 by PCH
HM70 by PCH

TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71

A20GATE

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4

NC_1

VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23

NCTF

VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32

PECI

C40

PCH_GPIO68

B41

PCH_GPIO69

C41

PCH_GPIO70

A40

PCH_GPIO71

P4
AU16
P5

KBRST#

AY11
AY10

PCH_THRMTRIP#_R

T14
AY1

AH8
AK11
AH10
AK10

P37

BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49

NV_CLE

2

+3VS +3VS

1 2

1 2

+3VS

+3VS

10K_0402_5%

+3VS

PCH_GPIO70

0
1

R236
10K_0402_5%

1 2

GATEA20 <42>

H_THRMTRIP# <6>

PCH_THRMTRIP#_R <23>

HM70@

R702

1 2

R707

HM76@

1 2

1 2

R239 390_0402_5%

INIT3_3V

This signal has weak internal PU,can't pull low

10K_0402_5%

10K_0402_5%

1 2

GV2@

R703

PCH_GPIO70PCH_GPIO69

R705

200K_0402_5%

UMA@

R22410K_0402_5%

12

R70410K_0402_5%

KBRST# <42>
H_CPUPWRGD <6>

H_THRMTRIP#

DMI Termination Voltage

NV_CLE

Set to Vcc when HIGH
Set to Vss when LOW

Weak internal
PU,Do not pull low

R217 1K_0402_5%

1

Function

UMA
N14P-GV2

KBRST#

12

CLOSE TO THE BRANCHING POINT

1 2

R226 10K_0402_5%

+1.8VS

12

R216

2.2K_0402_5%

H_SNB_IVB# <6>

+3VS

0 0 Optimus

Security Classification

Security Classification

5

1 1

UMA

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PCH (6/9) GPIO, CPU, MISC

PCH (6/9) GPIO, CPU, MISC

PCH (6/9) GPIO, CPU, MISC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-9603P

LA-9603P

LA-9603P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

19 62Wednesday, January 09, 2013

19 62Wednesday, January 09, 2013

19 62Wednesday, January 09, 2013

1.0

1.0

1.0

5

+V1.05S_VCCP

J2

@

12

+1.05VS_VCCCORE

C210

1U_0402_6.3V6K

C211

1U_0402_6.3V6K

C212

C209

10U_0603_6.3V6M

1

PAD-OPEN 4x4m

D D

+V1.05S_VCCP

C C

This pin can be left as no connect in
On-Die VR enabled mode (default).

B B

+V1.05S_VCCP

+3VS

R02

R260 0_0603_5%@

1

2

2

R02

R254 0_0603_5%@

This pin can be left as no connect in
On-Die VR enabled mode (default).

10U

+V1.05S_VCCP

12

T47

C222

1U_0402_6.3V6K

C223

C221

10U_0603_6.3V6M

1

2

12

1U_0402_6.3V6K

1

1

2

2

1

C227

0.1U_0402_16V7K

2

R02

R263 0_0603_5%

@

1

1

2

2

+1.05VS_VCCDPLLEXP

+VCCAPLLEXP

C224

1U_0402_6.3V6K

1

2

+3VS_VCCA3GBG

+1.05VS_VCCAPLL_FDI

T50

12

+1.05VS_VCCDPLL_FDI

+VCCP_VCCDMI

1U_0402_6.3V6K

C225

1U_0402_6.3V6K

1

2

+VCCAFDI_VRM

4

U4G

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

PANTHER-POINT_FCBGA989

3711mA

POWER

VCC CORE

VCCIO

FDI

CRTLVDS

60mA

DMI

190mA

DFT / SPI HVCMOS

20mA

1mA

VCCADAC

VSSADAC

1mA

VCCALVDS
VSSALVDS

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

20mA

VCCSPI

U48

+VCCADAC

U47

AK36

+VCCA_LVDS

AK37

AM37
AM38
AP36
AP37

V33

+3VS_VCC3_3_6

V34

AT16

+VCCAFDI_VRM

AT20

+VCCP_VCCDMI

AB36

+1.05VS_VCC_DMI_CCI

AG16

AG17

AJ16

AJ17

V1

+3V_VCCPSPI

3

1

C213

0.01U_0402_16V7K

2

+VCCTX_LVDS

1

C216

0.01U_0402_16V7K

2

1

C219

0.1U_0402_16V7K

2

C226

1U_0402_6.3V6K

1

C228

0.1U_0402_16V7K

2

1

C230
1U_0402_6.3V6K

2

R02

R256
0_0603_5%

@

1

2

R02

R399 0_0402_5%@

1

2

1

C217

0.01U_0402_16V7K

2

+3VS

12

+VCCP_VCCDMI

R02

R293 0_0603_5%@

1 2

C214

0.1U_0402_16V7K

R02

R295 0_0603_5%@

1

2

R02

R294 0_0603_5%@

12

L1 Change to 1 ohm P/N
S RES 1/10W 1 +-1% 0603

L1 1_0603_1%

1

C215
10U_0603_6.3V6M

2

0.1UH_MLF1608DR10KT_10%_1608

+3VS

12

L2

0.1uH inductor, 200mA

C218
22U_0805_6.3V6M

+V1.05S_VCCP

12

+1.8VS+VCCPNAND

+3VS

12

2

12

+3VS

+1.8VS

1

0_0603_5%
C220
1U_0402_6.3V6K

2

R02

R258

@

+V1.05S_VCCP

12

1

PCH Power Rail Table
Refer to CPU EDS R1.5

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

3.3

1.05

1.05

1.05

1.05

S0 Iccmax
Current (A)

0.001

5

5

0.001

0.001

0.228

0.001

0.075

0.075

1.3

0.042

1.05VccIO 3.709

1.05VccASW 0.903

3.3VccSPI 0.01

3.3VccDSW 0.001

1.8 0.002VccDFTERM

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccSusHDA

0.065

0.01

VccVRM 1.8 / 1.5 0.167

1.05VccCLKDMI

0.075

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.055

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.04

+1.5VS

R02

R265 0_0603_5%@

Intel recommand
stuff R265 and unstuff R266

12

+VCCAFDI_VRM

+VCCAFDI_VRM

VCCVRM==>1.5V FOR MOBILE
VCCVRM==>1.8V FOR DESKTOP

VCCVRM = 160mA detal waiting for newest spec

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

PCH (7/9) PWR

PCH (7/9) PWR

PCH (7/9) PWR

LA-9603P

LA-9603P

LA-9603P

1

1.0

1.0

1.0

of

20 62Wednesday, January 09, 2013

20 62Wednesday, January 09, 2013

20 62Wednesday, January 09, 2013

5

+3VS

12

10U

1

2

1

C256
1U_0402_6.3V6K

2

1

C259
1U_0402_6.3V6K

2

1

C262
1U_0402_6.3V6K

2

+1.05VM_VCCSUS

1

C264

@

1U_0402_6.3V6K

2

C231

10U_0603_6.3V6M

C250

220U_B2_2.5VM_R35

1

+

2

R02

R303

12

+3VS_VCC_CLKF33+3VS_VCC_CLKF33

@

0_0603_5%

D D

On-Die PLL Voltage Regulator

H󶁪On-Die PLL voltage regulator enable

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2
,VCCAPLLSATA

C C

+V1.05S_VCCP

L6

1 2

10UH_LB2012T100MR_20%

B B

+V1.05S_VCCP

+V1.05S_VCCP

+V1.05S_VCCP

+V1.05S_VCCP

A A

R02

R274 0_0603_5%@

R02

R280 0_0603_5%@

R02

R284 0_0603_5%@

0_0603_5%

12

12

12

R290

@

For Deep S3

C232

1U_0402_6.3V6K

1

2

+V1.05S_VCCP

+V1.05S_VCCP

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

C251

1U_0402_6.3V6K

1

2

+1.05VS_VCCDIFFCLKN

+V1.05S_VCCP

+V1.05S_VCCP

+3VALW

R02

R269 0_0603_5%@

R02

R271 0_0603_5%@

R20

80mil

J16

@

112

JUMP_43X79

C187

22U_0805_6.3V6M

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

R02

R286

@

0_0603_5%

4

Have internal VRM

R268

@

0_0603_5%

12

12

12

2

C244

1U_0402_6.3V6K

1

2

12

R300
0_0603_5%

@

C253

1U_0402_6.3V6K

1

2

1

C258

2

1

C263

2

12

C265

4.7U_0603_6.3V6K

1

1

2

2

+VCCACLK

+VCCDSW3_3

1

C234

0.1U_0402_16V7K

2

+3VS_VCC_CLKF33

T101

+VCCAPLL_CPY_PCH

+VCCDPLL_CPY

+VCCSUS1

1

C239

@

1U_0402_6.3V6K

2

+1.05VM_VCCASW

C241

22U_0805_6.3V6M

1

1

2

2

C245

1U_0402_6.3V6K

1

1

2

2

+VCCRTCEXT

+VCCAFDI_VRM

+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+1.05VS_SSCVCC

+VCCSST

+1.05VM_VCCSUS

C266

0.1U_0402_16V7K

+RTCVCC

C242

22U_0805_6.3V6M

C246

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

+V_CPU_IO

C268

0.1U_0402_16V7K

1

2

AD49

T16

V12

T38

BH23

AL29

AL24

AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31

W21
W23
W24
W26
W29
W31
W33

N16

Y49

BD47
BF47

AF17
AF33
AF34
AG34

AG33

V16

T17
V19

BJ8

A22

C269

3mA

1010mA

80mA
80mA

95mA

1mA

POWER

Clock and Miscellaneous

55mA

CPURTC

U4J

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2
VCCIO[14]

DCPSUS[3]

VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA
VCCADPLLB

VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]

VCCSSC

DCPSST

DCPSUS[1]
DCPSUS[2]

V_PROC_IO

VCCRTC

PANTHER-POINT_FCBGA989

119mA

PCI/GPIO/LPCMISC

SATA USB

HDA

3

VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

1mA

VCCSUS3_3[1]

1mA

VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]

VCCAPLLSATA

10mA

VCCSUSHDA

VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

V5REF

VCC3_3[1]
VCC3_3[8]
VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]
VCCIO[13]

VCCIO[6]

VCCVRM[1]

VCCIO[2]
VCCIO[3]
VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

N26
P26
P28
T27
T29

T23
T24
V23
V24
P24

T26

M26

AN23
AN24

P34

N20
N22
P20
P22

AA16
W16
T34

AJ2

AF13

AH13
AH14

AF14
AK1

AF11

AC16
AC17
AD17

+V1.05S_VCCP

T21

V21

T19

P32

+1.05VS_VCCUSBCORE

1

2

+3V_VCCPUSB

1

2

+1.05VS_VCCAUPLL

+PCH_V5REF_SUS

+VCCA_USBSUS
+3V_VCCPSUS

+PCH_V5REF_RUN

+3V_VCCPSUS

+3VS_VCCPCORE

+3VS_VCCPPCI

+VCC3_3_2

+VCCSATAPLL

+VCCAFDI_VRM

+VCCAFDI_VRM

+1.05VS_VCC_SATA

+VCCSUSHDA

1

C271

0.1U_0402_16V7K

2

C233
1U_0402_6.3V6K

C236

0.1U_0402_16V7K

+3V_VCCAUBG

R02

R283

1

0_0603_5%

C255

2

0.1U_0402_16V7K

+1.05VS_SATA3

+1.05VS_VCC_SATA

R20

R270 0_0603_5%@

R02

R272

@

0_0603_5%

1

C238

0.1U_0402_16V7K

2

1 2

C243 1U_0402_6.3V6K@

1 2

C316 0.1U_0402_16V7K@

+3VS

12

@

T100

1

2

R02

R287

12

@

0_0603_5%

2

12

+3V_PCH

12

+3V_PCH

R02

R273

@

0_0603_5%

+V1.05S_VCCP

R02

R276

12

@

0_0603_5%

1

2

1

2

1

2

+1.05VS_SATA3

1

2

R20

R288 0_0603_5%@

C261
1U_0402_6.3V6K

+3V_PCH

+V1.05S_VCCP

12

R02

R278

0_0603_5%
C247
1U_0402_6.3V

R02

R281

0_0603_5%

C249

0.1U_0402_16V7K

R02

R282

0_0603_5%
C254

0.1U_0402_16V7K

R20

R285 0_0603_5%@

C257
1U_0402_6.3V6K

12

@

@

@

12

12

12

+V1.05S_VCCP

12

+V1.05S_VCCP

+3V_PCH

+3VS

+3VS

1

+3V_PCH+5V_PCH

21

12

+3VS+5VS

12

D1
CH751H-40PT_SOD323-2

+PCH_V5REF_SUS

1

C240

0.1U_0402_16V7K

2

21

D2
CH751H-40PT_SOD323-2

+PCH_V5REF_RUN

1

C248
1U_0402_6.3V6K

2

R275
10_0402_5%

R279
10_0402_5%

On-Die PLL Voltage Regulator

H󶁪On-Die PLL voltage regulator enable

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2
,VCCAPLLSATA

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (8/9) PWR

PCH (8/9) PWR

PCH (8/9) PWR

LA-9603P

LA-9603P

LA-9603P

1

1.0

1.0

21 62Wednesday, January 09, 2013

21 62Wednesday, January 09, 2013

21 62Wednesday, January 09, 2013

1.0

5

D D

C C

B B

A A

U4H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

PANTHER-POINT_FCBGA989

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

3

U4I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

PANTHER-POINT_FCBGA989

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

2

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (9/9) VSS

PCH (9/9) VSS

PCH (9/9) VSS

LA-9603P

LA-9603P

LA-9603P

1

1.0

1.0

22 62Wednesday, January 09, 2013

22 62Wednesday, January 09, 2013

22 62Wednesday, January 09, 2013

1.0

5

PCIE_CTX_GRX_N[0..15]<5>
PCIE_CTX_GRX_P[0..15]<5>
PCIE_CRX_GTX_N[0..15]<5>

QV1B

3

PCIE_CRX_GTX_P[0..15]<5>

EC_SMB_CK2 <15,39,42>

EC_SMB_DA2 <15,39,42>

D D

+VDD33MISC

C C

2.2K_0402_5%

VGA_SMB_CK2

VGA_SMB_DA2

RV24

OPT@

1 2

RV25

2.2K_0402_5%

OPT@

1 2

RV126 0_0402_5%@

2

OPT@

QV1A

2N7002KDWH_SOT363-6

+VDD33MISC

5

OPT@

4

2N7002KDWH_SOT363-6

1 2

61

PU AT EC SIDE, +3VS AND 4.7K

+3VS_VGA

B B

5

2

12

1

2

1 3

D

2

OPT@

P

B

4

Y

1

A

G

12

+3VS_VGA

RV30
10K_0402_5%

OPT@

1 2

RV32

@

10K_0402_5%

1 2

OPT@

RV18
100K_0402_5%

CLK_REQ_GPU#

3

UV2

G

S

PLT_RST#<18,36,37,42>

DGPU_HOLD_RST#<18,23>

DGPU_PWR_EN<18,23,25,42>

A A

CLK_REQ_VGA#<15>

MC74VHC1G08DFT2G_SC70-5

OPT@

RV29 10K_0402_5%

CV42

0.1U_0402_16V7K

OPT@

QV2
2N7002K_SOT23-3

RV110 0_0402_5%@

5

OPT@

1 2

PCIE_CTX_GRX_N[0..15]
PCIE_CTX_GRX_P[0..15]

PCIE_CRX_GTX_N[0..15]
PCIE_CRX_GTX_P[0..15]

PCIE_CRX_GTX_P0
PCIE_CRX_GTX_N0
PCIE_CRX_GTX_P1
PCIE_CRX_GTX_N1
PCIE_CRX_GTX_P2
PCIE_CRX_GTX_N2
PCIE_CRX_GTX_P3
PCIE_CRX_GTX_N3
PCIE_CRX_GTX_P4
PCIE_CRX_GTX_N4 PCIE_CRX_C_GTX_N4
PCIE_CRX_GTX_P5
PCIE_CRX_GTX_N5
PCIE_CRX_GTX_P6
PCIE_CRX_GTX_N6
PCIE_CRX_GTX_P7
PCIE_CRX_GTX_N7
PCIE_CRX_GTX_P8
PCIE_CRX_GTX_N8
PCIE_CRX_GTX_P9
PCIE_CRX_GTX_N9
PCIE_CRX_GTX_P10
PCIE_CRX_GTX_N10
PCIE_CRX_GTX_P11
PCIE_CRX_GTX_N11
PCIE_CRX_GTX_P12
PCIE_CRX_GTX_N12
PCIE_CRX_GTX_P13
PCIE_CRX_GTX_N13
PCIE_CRX_GTX_P14
PCIE_CRX_GTX_N14
PCIE_CRX_GTX_P15
PCIE_CRX_GTX_N15

Differential signal

4

1 2

CV6 0.22U_0402_6.3V K OPT@

1 2

CV7 0.22U_0402_6.3V K OPT@

1 2

CV8 0.22U_0402_6.3V K OPT@

1 2

CV9 0.22U_0402_6.3V K OPT@

1 2

CV10 0.22U_0402_6.3V K OPT@

1 2

CV11 0.22U_0402_6.3V K OPT@

1 2

CV12 0.22U_0402_6.3V K OPT@

1 2

CV13 0.22U_0402_6.3V K OPT@

1 2

CV15 0.22U_0402_6.3V K OPT@

1 2

CV17 0.22U_0402_6.3V K OPT@

1 2

CV19 0.22U_0402_6.3V K OPT@

1 2

CV14 0.22U_0402_6.3V K OPT@

1 2

CV16 0.22U_0402_6.3V K OPT@

1 2

CV18 0.22U_0402_6.3V K OPT@

1 2

CV20 0.22U_0402_6.3V K OPT@

1 2

CV22 0.22U_0402_6.3V K OPT@

1 2

CV24 0.22U_0402_6.3V K @

1 2

CV26 0.22U_0402_6.3V K @

1 2

CV21 0.22U_0402_6.3V K @

1 2

CV23 0.22U_0402_6.3V K @

1 2

CV25 0.22U_0402_6.3V K @

1 2

CV27 0.22U_0402_6.3V K @

1 2

CV29 0.22U_0402_6.3V K @

1 2

CV31 0.22U_0402_6.3V K @

1 2

CV33 0.22U_0402_6.3V K @

1 2

CV28 0.22U_0402_6.3V K @

1 2

CV30 0.22U_0402_6.3V K @

1 2

CV32 0.22U_0402_6.3V K @

1 2

CV36 0.22U_0402_6.3V K @

1 2

CV41 0.22U_0402_6.3V K @

1 2

CV34 0.22U_0402_6.3V K @

1 2

CV35 0.22U_0402_6.3V K @

CLK_PCIE_VGA<15>

CLK_PCIE_VGA#<15>

1 2

@

RV20 200_0402_1%

4

PCIE_CTX_GRX_P0
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_P15
PCIE_CTX_GRX_N15

PCIE_CRX_C_GTX_P0
PCIE_CRX_C_GTX_N0
PCIE_CRX_C_GTX_P1
PCIE_CRX_C_GTX_N1
PCIE_CRX_C_GTX_P2
PCIE_CRX_C_GTX_N2
PCIE_CRX_C_GTX_P3
PCIE_CRX_C_GTX_N3
PCIE_CRX_C_GTX_P4

PCIE_CRX_C_GTX_P5
PCIE_CRX_C_GTX_N5
PCIE_CRX_C_GTX_P6
PCIE_CRX_C_GTX_N6
PCIE_CRX_C_GTX_P7
PCIE_CRX_C_GTX_N7
PCIE_CRX_C_GTX_P8
PCIE_CRX_C_GTX_N8
PCIE_CRX_C_GTX_P9
PCIE_CRX_C_GTX_N9
PCIE_CRX_C_GTX_P10
PCIE_CRX_C_GTX_N10
PCIE_CRX_C_GTX_P11
PCIE_CRX_C_GTX_N11
PCIE_CRX_C_GTX_P12
PCIE_CRX_C_GTX_N12
PCIE_CRX_C_GTX_P13
PCIE_CRX_C_GTX_N13
PCIE_CRX_C_GTX_P14
PCIE_CRX_C_GTX_N14
PCIE_CRX_C_GTX_P15
PCIE_CRX_C_GTX_N15

CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_REQ_GPU#

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

PLT_RST_VGA#
PEX_TERMP

RV22

2.49K_0402_1%

OPT@

1 2

OPTNOGCLK@

10P_0402_50V8J

U65A

AN12

PEX_RX0

AM12

PEX_RX0_N

AN14

PEX_RX1

AM14

PEX_RX1_N

AP14

PEX_RX2

AP15

PEX_RX2_N

AN15

PEX_RX3

AM15

PEX_RX3_N

AN17

PEX_RX4

AM17

PEX_RX4_N

AP17

PEX_RX5

AP18

PEX_RX5_N

AN18

PEX_RX6

AM18

PEX_RX6_N

AN20

PEX_RX7

AM20

PEX_RX7_N

AP20

PEX_RX8

AP21

PEX_RX8_N

AN21

PEX_RX9

AM21

PEX_RX9_N

AN23

PEX_RX10

AM23

PEX_RX10_N

AP23

PEX_RX11

AP24

PEX_RX11_N

AN24

PEX_RX12

AM24

PEX_RX12_N

AN26

PEX_RX13

AM26

PEX_RX13_N

AP26

PEX_RX14

AP27

PEX_RX14_N

AN27

PEX_RX15

AM27

PEX_RX15_N

AK14

PEX_TX0

AJ14

PEX_TX0_N

AH14

PEX_TX1

AG14

PEX_TX1_N

AK15

PEX_TX2

AJ15

PEX_TX2_N

AL16

PEX_TX3

AK16

PEX_TX3_N

AK17

PEX_TX4

AJ17

PEX_TX4_N

AH17

PEX_TX5

AG17

PEX_TX5_N

AK18

PEX_TX6

AJ18

PEX_TX6_N

AL19

PEX_TX7

AK19

PEX_TX7_N

AK20

PEX_TX8

AJ20

PEX_TX8_N

AH20

PEX_TX9

AG20

PEX_TX9_N

AK21

PEX_TX10

AJ21

PEX_TX10_N

AL22

PEX_TX11

AK22

PEX_TX11_N

AK23

PEX_TX12

AJ23

PEX_TX12_N

AH23

PEX_TX13

AG23

PEX_TX13_N

AK24

PEX_TX14

AJ24

PEX_TX14_N

AL25

PEX_TX15

AK25

PEX_TX15_N

AJ11

PEX_WAKE_N

AL13

PEX_REFCLK

AK13

PEX_REFCLK_N

AK12

PEX_CLKREQ_N

AJ26

PEX_TSTCLK_OUT

AK26

PEX_TSTCLK_OUT_N

AJ12

PEX_RST_N

AP29

PEX_TERMP

N13P-GL-A1 MP
U65

GV2@

N14P-GV2-B-A2

SA00006B510

XTALIN

27MHZ_16PF_X3G027000FG1H-HX

1

CV37

2

@

4
1

R02

OVERT#

Part 1 of 7

PCI EXPRESS

OPTNOGCLK@

1 2

RV23 10M_0402_5%

YV1

NC

OSC

OSC

NC

OPTNOGCLK@

3

GPIO

DACA_GREEN

DACA_HSYNC
DACA_VSYNC

DACs

I2C

CLK

XTAL_OUTBUFF

3
2

3

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

DACA_RED

DACA_BLUE

DACA_VDD
DACA_VREF
DACA_RSET

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA
I2CC_SCL

I2CC_SDA

I2CS_SCL

I2CS_SDA

PLLVDD

SP_PLLVDD

VID_PLLVDD

XTAL_IN

XTAL_OUT

XTAL_SSIN

XTAL_OUT

GC6@

1 2

OVERT# <42>

P6

GC6_FB_CLAMP_R

M3
L6
P5
P7
L7

GPU_STDBY_EN

M7

GC6_FB_REQ_R GC6_FB_REQ

N8
M1

OVERT#

M2

GPU_HOT#

L1
M5

NVVDD_PWM_VID

N3

VGA_AC_DET_R

M4

GPU_VID5

N4
P2

VGA_GPIO15

R8
M6
R1
P3
P4
P1

S

DGPU_PWR_EN <18,23,25,42>

G

2

QV11

GC6@

2N7002KW_SOT323-3

13

D

GPU_STDBY_EN <54>

OPT@

1 2

RV1310_0402_5%

1 2

RV17100K_0402_5% @

RV54 100K_0402_5%

S

NVVDD_PSI

For N13P-GS

AK9
AL10
AL9

AM9
AN9

AG10
AP9
AP8

R4
R5

R7
R6

R2
R3

T4
T3

60mA

AD8

45mA

AE8

45mA

AD7

H3
H2

J4
H1

1

CV38

OPTNOGCLK@

10P_0402_50V8J

2

10K_0402_5%

1 2

0_0402_5%

RV26

OPT@

@

RV107

@

12

12

12

RV27

10K_0402_5%

OPT@

+1.05VS_VGA

+SP_PLLVDD

+DACA_VDD

VGA_CRT_CLK
VGA_CRT_DATA

I2CB_SCL

I2CB_SDA

VGA_EDID_CLK
VGA_EDID_DATA

VGA_SMB_CK2
VGA_SMB_DA2

+PLLVDD

RV112

XTALIN

XTAL_OUT

XTALOUT

XTALSSIN

10K_0402_5%

180ohms (ESR=0.2) Bead

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

RV14

10K_0402_5%

@

1 2

VGA_AC_DET_R

R02

Remove RV232

close to YV1

1 2

RV231 0_0402_5%

OPTGCLK@

Under GPU

OPT@

1 2

LV1

BLM18PG330SN1D_0603

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2

+VDD33MISC

+3VS

@

1 2

RV53 10K_0402_5%

G

2

GC6_FB_CLAMP <27,42,46>

QV10

GC6@

2N7002KW_SOT323-3

13

D

GPU_HOT# <54>
NVVDD_PWM_VID <54>

NVVDD_PSI <54>

GC6_FB_REQ_R

GC6_FB_REQ

Reserve for GTGE leakage issue

+VDD33MISC +VDD33MISC+3VS

RV15
10K_0402_5%

OPT@

1 2

2 1

VGA_AC_DET

DV3

SDMK0340L-7-F_SOD323-2

OPT@

30 ohms @100MHz (ESR=0.05)

1

1

CV40

CV131

2

2

OPT@

OPT@

0.1U_0402_16V7K

22U_0805_6.3V6M

GCLK_27MHZ

GCLK_27MHZ <44>

Under GPU(below 150mils)

1

1

CV113

CV112

2

2

OPT@

OPT@

22U_0805_6.3V6M

4.7U_0603_6.3V6K

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

DGPU_HOLD_RST# <18,23>

GC6@

1 2

RV51 10K_0402_5%

GC6@

1 2

RV52 10K_0402_5%

VGA_AC_DET <42>

+1.05VS_VGA

150mA

+SP_PLLVDD

1

CV5

2

OPT@

0.1U_0402_16V7K

2N7002KDWH_SOT363-6

GC6_FB_REQ <42>

R10

1 2

LV7 0_0402_5%OPT@

S SUPPRE_CHILISIN PBY100505T-300Y-N 0402
SM01000F100

Near GPU

1

CV4

2

OPT@

0.1U_0402_16V7K

1

+3VS_VGA

12

@

RV208

10K_0402_5%

61

QV7A

@

2

+VDD33MISC

+3VS

PLT_RST_VGA#

if GC6 is supported, stuff the BOM option to
pull high to 3.3vs system power, if not, stuff
the BOM option to pull high to NV3V3;

GPU_HOT#
VGA_EDID_CLK
VGA_EDID_DATA
VGA_CRT_DATA
VGA_CRT_CLK
I2CB_SCL
I2CB_SDA
OVERT#

NVVDD_PSI

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

3

QV7B
2N7002KDWH_SOT363-6

5

@

1

4

CV305

@

2

R02

0.1U_0402_16V7K

13

D

2

QV9

G

2N7002K_SOT23-3

S

@

1 2

@

RV49 100K_0402_5%

1 2

OPT@

RV3 2.2K_0402_5%

1 2

OPT@

RV4 2.2K_0402_5%

1 2

OPT@

RV10 2.2K_0402_5%

1 2

OPT@

RV11 2.2K_0402_5%

1 2

OPT@

RV12 2.2K_0402_5%

1 2

OPT@

RV13 2.2K_0402_5%

1 2

OPT@

RV1 10K_0402_5%

1 2

OPT@

RV201 100K_0402_5%

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

N13X-PCIE/DAC/GPIO

N13X-PCIE/DAC/GPIO

N13X-PCIE/DAC/GPIO

LA-9603P

LA-9603P

LA-9603P

1

PCH_THRMTRIP#_R <19>

23 62W ednesday, January 09, 2013

23 62W ednesday, January 09, 2013

23 62W ednesday, January 09, 2013

1.0

1.0

1.0

5

D D

C C

B B

4

U65D

@

AM6

IFPA_TXC

AN6

IFPA_TXC_N

AP3

IFPA_TXD0

AN3

IFPA_TXD0_N

AN5

IFPA_TXD1

AM5

IFPA_TXD1_N

AL6

IFPA_TXD2

AK6

IFPA_TXD2_N

AJ6

IFPA_TXD3

AH6

IFPA_TXD3_N

AJ9

IFPB_TXC

AH9

IFPB_TXC_N

AP6

IFPB_TXD4

AP5

IFPB_TXD4_N

AM7

IFPB_TXD5

AL7

IFPB_TXD5_N

AN8

IFPB_TXD6

AM8

IFPB_TXD6_N

AK8

IFPB_TXD7

AL8

IFPB_TXD7_N

AK1

IFPC_L0

AJ1

IFPC_L0_N

AJ3

IFPC_L1

AJ2

IFPC_L1_N

AH3

IFPC_L2

AH4

IFPC_L2_N

AG5

IFPC_L3

AG4

IFPC_L3_N

AM1

IFPD_L0

AM2

IFPD_L0_N

AM3

IFPD_L1

AM4

IFPD_L1_N

AL3

IFPD_L2

AL4

IFPD_L2_N

AK4

IFPD_L3

AK5

IFPD_L3_N

AD2

IFPE_L0

AD3

IFPE_L0_N

AD1

IFPE_L1

AC1

IFPE_L1_N

AC2

IFPE_L2

AC3

IFPE_L2_N

AC4

IFPE_L3

AC5

IFPE_L3_N

AE3

IFPF_L0

AE4

IFPF_L0_N

AF4

IFPF_L1

AF5

IFPF_L1_N

AD4

IFPF_L2

AD5

IFPF_L2_N

AG1

IFPF_L3

AF1

IFPF_L3_N

AG3

IFPC_AUX_I2CW_SCL

AG2

IFPC_AUX_I2CW_SDA_N

AK3

IFPD_AUX_I2CX_SCL

AK2

IFPD_AUX_I2CX_SDA_N

AB3

IFPE_AUX_I2CY_SCL

AB4

IFPE_AUX_I2CY_SDA_N

AF3

IFPF_AUX_I2CZ_SCL

AF2

IFPF_AUX_I2CZ_SDA_N

Part 4 of 7

LVDS/TMDS

MULTI_STRAP_REF0_GND

3

NC

VDD_SENSE

GND_SENSE

TEST

TESTMODE

JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS

JTAG_TRST_N

SERIAL

ROM_CS_N
ROM_SCLK

ROM_SI

ROM_SO

GENERAL

BUFRST_N

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

THERMDP
THERMDN

CEC

P8

NC

AC6

NC

AJ28

NC

AJ4

NC

AJ5

NC

AL11

NC

C15

NC

D19

NC

D20

NC

D23

NC

D26

NC

H31

NC

T8

NC

V32

NC

L4

VCCSENSE_VGA

L5

VSSSENSE_VGA

AK11
AM10

AM11
AP12
AP11
AN11

H6
H4
H5
H7

RV35 10K_0402_5%

L2
L3
J1

J2
J7
J6
J5
J3

K3
K4

TESTMODE

1 2

RV34 10K_0402_5%OPT@

ROM_CS
ROM_SCLK
ROM_SI
ROM_SO

OPT@

1 2

RV230 10K_0402_5%@

1 2

RV38 40.2K_0402_1%OPT@

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

2

VCCSENSE_VGA <54>

VSSSENSE_VGA <54>

trace width: 16mils
differential voltage sensing.
differential signal routing.

+3VS_VGA

STRAP0 <32>
STRAP1 <32>
STRAP2 <32>
STRAP3 <32>
STRAP4 <32>

12

10K_0402_5%
RV33

OPT@

TV2
TV3
TV4
TV5

12

ROM_SCLK <32>
ROM_SI <32>
ROM_SO <32>

1

Reserve 1MB SPI ROM FOR VBIOS ROM

RV229

10K_0402_5%

ROM_CS_R

+3VS_VGA

12

@

20mils

UV15

1
2
3
4

VCC

CS#

HOLD#

DO

CLK

WP#

DIO

GND

MX25L1005AMC-12G_SO8

@

8
7
6
5

ROM_HOLD#ROM_SO_R

ROM_SCLK_R
ROM_SI_R

12

RV225

@

10K_0402_5%

RV228 0_0402_5%@

1 2
1 2

RV227 0_0402_5%@

ROM_SCLK
ROM_SI

N13P-GL-A1 MP

ROM_CS
ROM_SO

A A

CV295

0.1U_0402_16V7K

RV224 0_0402_5%@

1 2
1 2

RV226 0_0402_5%@

12

@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N13X-LVDS/HDMI/DP/THM

N13X-LVDS/HDMI/DP/THM

N13X-LVDS/HDMI/DP/THM

LA-9603P

LA-9603P

LA-9603P

24 62Wednesday, January 09, 2013

24 62Wednesday, January 09, 2013

24 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

4

3

2

1

+1.5VS_VGA

D D

+1.5VS_VGA

1

2

4.7U_0603_6.3V6K

CV267

OPT@

4.7U_0603_6.3V6K

4.7uF X7R 0402 * 2

1uF X7R 0402 * 2

1

1

CV277

CV268

2

2

OPT@

OPT@

1U_0402_6.3V6K

0.1uF X7R 0402 * 8

Under GPU(below 150mils)

1

CV278

2

OPT@

1U_0402_6.3V6K

1

1

CV280

CV279

2

2

OPT@

OPT@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

CV292

2

OPT@

0.1U_0402_16V7K

0.1U_0402_16V7K

Near GPU

1

CV273

2

OPT@

22U_0805_6.3V6M

1

1

CV287

2

2

OPT@

0.1U_0402_16V7K

2

2

CV269

1

1

OPT@

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CV294

CV284

2

OPT@

OPT@

0.1U_0402_16V7K

0.1U_0402_16V7K

2

2

CV270

OPT@

1

2

CV272

CV271

1

1

OPT@

OPT@

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CV285

CV286

2

OPT@

OPT@

0.1U_0402_16V7K

rise 1.5v system source voltage to 1.55-1.57V

C C

+1.5VS_VGA

RV14110_0402_5% @

12

FB_VDDQ_SENSE

RV14210_0402_5% @

12

FB_VSS_SENSE

+1.5VS_VGA

1 2

OPT@

GV2@

4

RV6 40.2_0402_1%

1 2

OPT@

RV8 42.2_0402_1%

OPT@

1 2

RV9 51.1_0402_1%

Place near balls

DGPU_PWR_EN

12

R5596
150_0603_5%

GV2@

13

D

2

G

Q157

S

2N7002K_SOT23-3

CALIBRATION PIN
FB_CAL_x_PD_VDDQ
FB_CAL_x_PU_GND
FB_CAL_xTERM_GND

B B

A A

DDR3

40.2Ohm

42.2Ohm

51.1Ohm

for DGPU_PWR_EN discharge 11/13

5

3.5A

U65E

AA27

FBVDDQ_0

AA30

FBVDDQ_1

AB27

FBVDDQ_2

AB33

FBVDDQ_3

AC27

FBVDDQ_4

AD27

FBVDDQ_5

AE27

FBVDDQ_6

AF27

FBVDDQ_7

AG27

FBVDDQ_8

B13

FBVDDQ_9

B16

FBVDDQ_10

B19

FBVDDQ_11

E13

FBVDDQ_12

E16

FBVDDQ_13

E19

FBVDDQ_14

H10

FBVDDQ_15

H11

FBVDDQ_16

H12

FBVDDQ_17

H13

FBVDDQ_18

H14

FBVDDQ_19

H15

FBVDDQ_20

H16

FBVDDQ_21

H18

FBVDDQ_22

H19

FBVDDQ_23

H20

FBVDDQ_24

H21

FBVDDQ_25

H22

FBVDDQ_26

H23

FBVDDQ_27

H24

FBVDDQ_28

H8

FBVDDQ_29

H9

FBVDDQ_30

L27

FBVDDQ_31

M27

FBVDDQ_32

N27

FBVDDQ_33

P27

FBVDDQ_34

R27

FBVDDQ_35

T27

FBVDDQ_36

T30

FBVDDQ_37

T33

FBVDDQ_38

V27

FBVDDQ_39

W27

FBVDDQ_40

W30

FBVDDQ_41

W33

FBVDDQ_42

Y27

FBVDDQ_43

F1

FB_VDDQ_SENSE

F2

FB_GND_SENSE

J27

FB_CAL_PD_VDDQ

H27

FB_CAL_PU_GND

H25

FB_CAL_TERM_GND

N13P-GL-A1 MP

SUSP <10,46,51,54>

Part 5 of 7

PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5

PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8

PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13

PEX_PLL_HVDD

PEX_SVDD_3V3

POWER

PEX_PLLVDD

IFPAB_PLLVDD

IFPAB_RSET

IFPA_IOVDD
IFPB_IOVDD

IFPC_PLLVDD

IFPC_IOVDD

IFPD_PLLVDD

IFPD_IOVDD

IFPEF_PLVDD

IFPEF_RSET

IFPE_IOVDD
IFPF_IOVDD

VDD33_0
VDD33_1
VDD33_2
VDD33_3

IFPC_RSET

IFPD_RSET

@

2000mA

AG19
AG21
AG22
AG24
AH21
AH25

AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28

AH12

AG12

AG26

J8
K8
L8
M8

AH8

+IFPAB_PLLVDD

AJ8
AG8

+IFPAB_IOVDD

AG9

AF7

+IFPC_PLLVDD

AF8
AF6

+IFPC_IOVDD

AG7

+IFPD_PLLVDD

AN2
AG6

+IFPD_IOVDD

AB8

+IFPEF_PLLVDD

AD6
AC7

AC8

1

CV43

2

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

Under GPU(below 150mils)

1

CV54

2

OPT@

22U_0805_6.3V6M

22U_0805_6.3V6M

+PEX_PLLHVDD

+VDD33MISC

RV40 1K_0402_1%@

RV43 1K_0402_1%@

RV46 1K_0402_1%@

RV50 1K_0402_1%@

+IFPE_IOVDD

1 2

RV138 0_0402_5%OPT@

+PEX_SVDD3V3

+PEX_PLLVDD

+VDD33

@

RV48 10K_0402_5%

1 2
1 2

@

1 2

RV65 10K_0402_5%

@

RV42 10K_0402_5%

1 2

12

@

RV44 10K_0402_5%

1 2

@

1 2

RV45 10K_0402_5%

1 2

@

1 2

RV47 10K_0402_5%

@

1 2

RV72 10K_0402_5%

1 2

@

1 2

RV73 10K_0402_5%

1

1

CV44

2

2

OPT@

1U_0402_6.3V6K

1

1

CV53

2

2

OPT@

22U_0805_6.3V6M

Place near balls Place near GPU

Near GPU

1

CV47

2

OPT@

4.7U_0603_6.3V6K

+1.05VS_VGA

1

1

CV70

2

2

OPT@

4.7U_0603_6.3V6K

1

CV111

2

OPT@

1U_0402_6.3V6K

+VDD33

Inc 2pcs 0.1u
following DG

1

CV48

2

OPT@

4.7U_0603_6.3V6K

CV74

OPT@

4.7U_0603_6.3V6K

1

CV293

2

OPT@

4.7U_0603_6.3V6K

Reserve for NV DG

CV303

OPT@

0.1U_0402_16V7K

1

CV45

CV46

2

OPT@

OPT@

1U_0402_6.3V6K

1

CV56

CV55

2

OPT@

OPT@

22U_0805_6.3V6M

Under GPU(below 150mils)

0.1U_0402_16V7K

1

CV109

2

OPT@

0.1U_0402_16V7K

0.1U_0402_16V7K

10U_0603_6.3V6M

+3VS_VGA

1

2

1

2

1

2

+3VS to +3VS_VGA

+5VALW

12

R1103
1K_0402_5%

R02

R1452
0_0402_5%

@

DGPU_PWR_EN<18,23,42>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

12

12

Compal Secret Data

Compal Secret Data

Compal Secret Data

13

D

2

G

S

R1105
100K_0402_5%

OPT@

Deciphered Date

Deciphered Date

Deciphered Date

OPT@

DGPU_PWR_EN#

Q128
2N7002K_SOT23-3

OPT@

2

RV205

1 2

10K_0402_5%

OPT@

2

CV49

1

OPT@

CV73

OPT@

CV75

OPT@

R20

RV5 0_0603_5%@

2

2

CV50

1

1

OPT@

10U_0603_6.3V6M

10U_0603_6.3V6M

12

CV5 Place Under GPU

+PEX_PLLVDD

1

CV304

2

OPT@

0.1U_0402_16V7K

+3VS +3VS_VGA

J10

112

JUMP_43X79

QV5

LP2301ALT1G_SOT23

D

S

OPT@

G

2

CV241

1

0.1U_0402_16V7K

OPT@

2

2N7002K_SOT23-3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+1.05VS_VGA

2

CV51

CV52

1

OPT@

OPT@

10U_0603_6.3V6M

For N13P-GS

+VDD33MISC

1

2

0.1U_0402_16V7K

+3VS_VGA

DGPU_PWR_EN#

1

CV72

CV105

2

OPT@

OPT@

0.1U_0402_16V7K

+VDD33MISC

120mA

1

1

CV3

CV65

2

2

OPT@

OPT@

1U_0402_6.3V6K

0.1U_0402_16V7K

CV3 ,CV66 Place near balls

@

2

CV57
10U_0603_6.3V6M

13

QV6

GV2@

D

S

12

12

OPT@

RV206
150_0603_5%

GV2@

13

2

G

1

CV242

@

2

0.1U_0402_16V7K

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

N13X-POWER

N13X-POWER

N13X-POWER

G

2

S

OPT@

1

CV66

120ohms @100MHz (ESR=0.18)

2

OPT@

4.7U_0603_6.3V6K

RV207

0_0402_5%

LA-9603P

LA-9603P

LA-9603P

1

+3VS_VGA

QV8DMG2301U-7_SOT23-3

13

D

OPT@

LV2

0_0603_5%

LV2

@

BLM18PG121SN1D_0603

GV2@

12

DGPU_PWR_EN#

25 62W ednesday, January 09, 2013

25 62W ednesday, January 09, 2013

25 62W ednesday, January 09, 2013

+1.05VS_VGA

12

1.0

1.0

1.0

5

D D

C C

B B

A A

AA17
AA18
AA20
AA22
AB12
AB14
AB16
AB19

AB2

AB21

A33
AB23
AB28
AB30
AB32

AB5

AB7
AC13
AC15
AC17
AC18
AA13
AC20
AC22

AE2
AE28
AE30
AE32
AE33

AE5

AE7
AH10
AA15
AH13
AH16
AH19

AH2
AH22
AH24
AH28
AH29
AH30
AH32
AH33

AH5

AH7

AJ7

AK10

AK7

AL12
AL14
AL15
AL17
AL18

AL2
AL20
AL21
AL23
AL24
AL26
AL28
AL30
AL32
AL33

AL5

AM13
AM16
AM19
AM22
AM25

AN1
AN10
AN13
AN16
AN19
AN22
AN25
AN30
AN34

AN4

AN7

AP2
AP33

B10
B22
B25
B28
B31
B34

C10

C13

C19

C22

C25

C28

U65F

A2

GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83

B1

GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90

B4

GND_91

B7

GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98

C7

GND_99

Part 6 of 7

GND

4

@

GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198

GND_199
GND_OPT
GND_OPT

D2
D31
D33
E10
E22
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16
N19
N2
N21
N23
N28
N30
N32
N33
N5
N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18
T2
T20
T22
AG11
T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23
AH11
C16
W32

3

2

+VGA_CORE

AA12
AA14
AA16
AA19
AA21
AA23
AB13
AB15
AB17
AB18
AB20
AB22
AC12
AC14
AC16
AC19
AC21
AC23

M12
M14
M16
M19
M21
M23
N13
N15
N17
N18
N20
N22
P12
P14
P16
P19
P21
P23
R13
R15
R17
R18
R20
R22

U13
U15
U17
U18
U20
U22
V13
V15

T12
T14
T16
T19
T21
T23

U65G

VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55

N13P-GL-A1 MP

Part 7 of 7

POWER

VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67
VDD_68
VDD_69
VDD_70
VDD_71

XVDD_1
XVDD_2
XVDD_3
XVDD_4
XVDD_5
XVDD_6
XVDD_7
XVDD_8

XVDD_9
XVDD_10
XVDD_11
XVDD_12
XVDD_13
XVDD_14
XVDD_15
XVDD_16

XVDD_17
XVDD_18
XVDD_19
XVDD_20
XVDD_21
XVDD_22

XVDD_23
XVDD_24
XVDD_25
XVDD_26
XVDD_27
XVDD_28
XVDD_29
XVDD_30

XVDD_31
XVDD_32
XVDD_33
XVDD_34
XVDD_35
XVDD_36
XVDD_37
XVDD_38

1

V17
V18
V20
V22
W12
W14
W16
W19
W21
W23
Y13
Y15
Y17
Y18
Y20
Y22

U1
U2
U3
U4
U5
U6
U7
U8

V1
V2
V3
V4
V5
V6
V7
V8

W2
W3
W4
W5
W7
W8

Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8

AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8

+VGA_CORE

@

Security Classification

Security Classification

N13P-GL-A1 MP

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N13-VGA CORE, GND

N13-VGA CORE, GND

N13-VGA CORE, GND

LA-9603P

LA-9603P

LA-9603P

26 62Wednesday, January 09, 2013

26 62Wednesday, January 09, 2013

26 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

FBA_D[0..63]

U65B

L28

FBA_D0

M29

FBA_D1

L29

FBA_D2

M28

FBA_D3

N31

D D

C C

B B

FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8

FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS0

FBA_DQS1

FBA_DQS2

FBA_DQS3

FBA_DQS4

FBA_DQS5

FBA_DQS6

FBA_DQS7

FBA_DQS#0

FBA_DQS#1

FBA_DQS#2

FBA_DQS#3

FBA_DQS#4

FBA_DQS#5

FBA_DQS#6

FBA_DQS#7

AG28
AF29
AG29
AF28
AD30
AD29
AC29
AD28

AK29

AK28
AM29
AM31

AN29
AM30

AN31

AN32

AP30

AP32
AM33

AL31

AK33

AK32

AD34

AD32

AC30

AD33

AF31

AG34

AG32

AG33

AD31

AL29
AM32

AF34

AE31

AK30

AN33

AF33

AF30

AK31
AM34

AF32

P29
R29
P28

H29
H28

G29
E31
E32

C34
D32
B33
C33

H33
H32
P34
P32
P31
P33

AJ29
AJ30

P30

M32

M31
G31
E33
M33

M30
H30
E34
M34

J28
J29

F30

F33
F32

L31
L34
L32
L33

F31
F34

N13P-GL-A1 MP

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

Part 2 of 7

MEMORY INTERFACE

A

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_CMD_RFU0
FBA_CMD_RFU1

FBA_DEBUG0
FBA_DEBUG1

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_WCK01

FBA_WCK01_N

FBA_WCK23

FBA_WCK23_N

FBA_WCK45

FBA_WCK45_N

FBA_WCK67

FBA_WCK67_N

FBA_WCKB01

FBA_WCKB01_N

FBA_WCKB23

FBA_WCKB23_N

FBA_WCKB45

FBA_WCKB45_N

FBA_WCKB67

FBA_WCKB67_N

FB_CLAMP

FB_DLL_AVDD

FBA_PLL_AVDD

FB_VREF

@

U30

FBA_CS0#_L

T31
U29

FBA_ODT_L

R34

FBA_CKE_L

R33

FBA_MA14

U32

FBA_RST#

U33

FBA_MA9

U28

FBA_MA7

V28

FBA_MA2

V29

FBA_MA0

V30

FBA_MA4

U34

FBA_MA1

U31

FBA_BA0

V34

FBA_WE#

V33

FBA_MA15

Y32

FBA_CAS#

AA31

FBA_CS0#_H

AA29
AA28

FBA_ODT_H

AC34

FBA_CKE_H

AC33

FBA_MA13

AA32

FBA_MA8

AA33

FBA_MA6

Y28

FBA_MA11

Y29

FBA_MA5

W31

FBA_MA3

Y30

FBA_BA2

AA34

FBA_BA1

Y31

FBA_MA12

Y34

FBA_MA10

Y33

FBA_RAS#

V31

R32
AC32

R28
AC28

R30
R31
AB31
AC31

K31
L30
H34
J34
AG30
AG31
AJ34
AK34

J30
J31
J32
J33
AH31
AJ31
AJ32
AJ33

E1

K27

1 2

RV58 60.4_0402_1%@
RV59 60.4_0402_1%@

1 2

can be unstuff by default

FBA_CLK0
FBA_CLK0# FBC_CLK1
FBA_CLK1
FBA_CLK1#

GC6_EN

RV7 0_0402_5%
RV66 10K_0402_5%

CV106 0.1U_0402_16V7KOPT@

1 2

Place close to ball

U27

H26

Place close to ball Place close to BGA

FBA_MA[15..0] <28,29>
FBA_BA[2..0] <28,29>

FBA_CS0#_L <28>
FBA_ODT_L <28>

FBA_CKE_L <28>
FBA_RST# <28,29>

FBA_WE# <28,29>
FBA_CAS# <28,29>

FBA_CS0#_H <29>
FBA_ODT_H <29>

FBA_CKE_H <29>

FBA_RAS# <28,29>

FBA_CLK0 <28>
FBA_CLK0# <28>
FBA_CLK1 <29>
FBA_CLK1# <29>

1 2

GC6@

OPT@

12

+FB_PLLAVDD

1

CV107

2

OPT@

0.1U_0402_16V7K
1U_0402_6.3V6K

4

+1.05VS_VGA +FB_PLLAVDD

1

CV110

2

OPT@

Place close to BGA

FBMA-L11-160808300LMA25T_2P

1 2

from EC

GC6_FB_CLAMP <23,42,46>

+FB_PLLAVDD

1

CV39

2

OPT@

22U_0805_6.3V6M

+FB_PLLAVDD

LV3

OPT@

200mA

3

G9

E9

G8

F9

F11

G11

F12

G12

G6

F5
E6
F6
F4

G4

E2

F3
C2
D4
D3
C1

B3
C4

B5
C5

A11
C11
D11
B11

D8

A8
C8

B8

F24
G23
E24
G24
D21
E21
G21

F21
G27
D27
G26
E27
E29

F29
E30
D30
A32
C31
C32
B32
D29
A29
C29
B29
B21
C23
A21
C21
B24
C24
B26
C26

E11

E3
A3

C9
F23
F27

C30
A24

D10

D5

C3

B9
E23
E28
B30
A23

D9

E4

B2

A9
D22
D28
A30
B23

FBC_D[0..63]

U65C

FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63

FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7

FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7

FBB_DQS_RN0
FBB_DQS_RN1
FBB_DQS_RN2
FBB_DQS_RN3
FBB_DQS_RN4
FBB_DQS_RN5
FBB_DQS_RN6
FBB_DQS_RN7

N13P-GL-A1 MP

Part 3 of 7

FBB_CMD_RFU0
FBB_CMD_RFU1

FBB_DEBUG0

FBB_DEBUG1

MEMORY INTERFACE B

FBB_CLK0_N
FBB_CLK1_N

FBB_WCK01_N
FBB_WCK23_N
FBB_WCK45_N
FBB_WCK67_N

FBB_WCKB01

FBB_WCKB01_N

FBB_WCKB23

FBB_WCKB23_N

FBB_WCKB45

FBB_WCKB45_N

FBB_WCKB67

FBB_WCKB67_N

FBB_PLL_AVDD

FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8

FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31

FBB_CLK0
FBB_CLK1

FBB_WCK01
FBB_WCK23
FBB_WCK45
FBB_WCK67

FBC_D[0..63]<30,31>FBA_D[0..63]<28,29>

FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8

FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63

FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7

FBC_DQS0
FBC_DQS1
FBC_DQS2
FBC_DQS3
FBC_DQS4
FBC_DQS5
FBC_DQS6
FBC_DQS7

FBC_DQS#0
FBC_DQS#1
FBC_DQS#2
FBC_DQS#3
FBC_DQS#4
FBC_DQS#5
FBC_DQS#6
FBC_DQS#7

2

@

D13

FBC_CS0#_L

E14
F14

FBC_ODT_L

A12

FBC_CKE_L

B12

FBC_MA14

C14

FBC_RST#

B14

FBC_MA9

G15

FBC_MA7

F15

FBC_MA2

E15

FBC_MA0

D15

FBC_MA4

A14

FBC_MA1

D14

FBC_BA0

A15

FBC_WE#

B15

FBC_MA15

C17

FBC_CAS#

D18

FBC_CS0#_H

E18
F18

FBC_ODT_H

A20

FBC_CKE_H

B20

FBC_MA13

C18

FBC_MA8

B18

FBC_MA6

G18

FBC_MA11

G17

FBC_MA5

F17

FBC_MA3

D16

FBC_BA2

A18

FBC_BA1

D17

FBC_MA12

A17

FBC_MA10

B17

FBC_RAS#

E17

C12
C20

RV60 60.4_0402_1%@

1 2

G14
G20

1 2

RV61 60.4_0402_1%@

can be unstuff by default

D12

FBC_CLK0

E12

FBC_CLK0#

E20
F20

FBC_CLK1#

F8
E8
A5
A6
D24
D25
B27
C27

D6
D7
C6
B6
F26
E26
A26
A27

H17

1

CV108

2

OPT@

0.1U_0402_16V7K

Place close to ball

1

FBC_MA[15..0] <30,31>
FBC_BA[2..0] <30,31>

FBC_CS0#_L <30>
FBC_ODT_L <30>

FBC_CKE_L <30>
FBC_RST# <30,31>

FBC_WE# <30,31>
FBC_CAS# <30,31>

FBC_CS0#_H <31>
FBC_ODT_H <31>

FBC_CKE_H <31>

Mode D - Mirror Mode Mapping

FBC_RAS# <30,31>

+1.5VS_VGA+1.5VS_VGA

FBC_CLK0 <30>
FBC_CLK0# <30>
FBC_CLK1 <31>
FBC_CLK1# <31>

+FB_PLLAVDD

Address

FBx_CMD0
FBx_CMD1
FBx_CMD2
FBx_CMD3
FBx_CMD4
FBx_CMD5
FBx_CMD6
FBx_CMD7
FBx_CMD8
FBx_CMD9
FBx_CMD10
FBx_CMD11
FBx_CMD12
FBx_CMD13
FBx_CMD14
FBx_CMD15
FBx_CMD16
FBx_CMD17
FBx_CMD18
FBx_CMD19
FBx_CMD20
FBx_CMD21
FBx_CMD22
FBx_CMD23
FBx_CMD24
FBx_CMD25
FBx_CMD26
FBx_CMD27
FBx_CMD28
FBx_CMD29
FBx_CMD30

DATA Bus

0..31
CS0#_L

ODT_L
CKE_L
A14
RST

A9
A7
A2
A0
A4
A1
BA0
WE#
A15

CAS#

A13
A8
A6
A11
A5
A3
BA2
BA1
A12
A10
RAS#

32..63

A14
RST
A9
A7
A2
A0
A4
A1
BA0
WE#
A15
CAS#
CS0#_H

ODT_H
CKE_H
A13
A8
A6
A11
A5
A3
BA2
BA1
A12
A10
RAS#

FBA_DQM[7..0]<28,29>

A A

FBA_DQS[7..0]<28,29>

FBA_DQS#[7..0]<28,29>

5

30ohms (ESR=0.01) Bead
P/N;SM010007W00

4

FBC_DQM[7..0]<30,31>

FBC_DQS[7..0]<30,31>

FBC_DQS#[7..0]<30,31>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

N13X-MEM Interface

N13X-MEM Interface

N13X-MEM Interface

LA-9603P

LA-9603P

LA-9603P

1

27 62Wednesday, January 09, 2013

27 62Wednesday, January 09, 2013

27 62Wednesday, January 09, 2013

1.0

1.0

1.0

5

4

3

2

1

Memory Partition A - Lower 32 bits

D D

C C

B B

A A

+1.5VS_VGA

12

RV79

1.1K_0402_1%

OPT@

+FBA_VREF0

12

1

FBA_CLK0

UV3 SIDE

CV119

OPT@

0.1U_0402_16V7K

CV118

0.01U_0402_16V7K

OPT@

2

FBA_RST#<27,29>

1

CV120

2

OPT@

FBA_CLK0<27>
FBA_CLK0#<27>
FBA_CKE_L<27>

FBA_ODT_L<27>
FBA_CS0#_L<27>
FBA_RAS#<27,29>
FBA_CAS#<27,29>
FBA_WE#<27,29>

RV78

10K_0402_5%

OPT@

1

1

CV121

2

2

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

RV68

1.1K_0402_1%

OPT@

RV80
160_0402_1%

OPT@

1 2

FBA_CLK0#

+1.5VS_VGA +1.5VS_VGA

1

2

0.1U_0402_16V7K

CV123

OPT@

12

243_0402_1%

1

2

1U_0402_6.3V6K

+FBA_VREF0

FBA_MA0
FBA_MA1
FBA_MA2
FBA_MA3
FBA_MA4
FBA_MA5
FBA_MA6
FBA_MA7
FBA_MA8
FBA_MA9
FBA_MA10
FBA_MA11
FBA_MA12
FBA_MA13
FBA_MA14
FBA_MA15

FBA_BA0
FBA_BA1
FBA_BA2

FBA_CLK0
FBA_CLK0#
FBA_CKE_L

FBA_ODT_L
FBA_CS0#_L
FBA_RAS#
FBA_CAS#
FBA_WE#

FBA_DQS0
FBA_DQS3

FBA_DQM0
FBA_DQM3

FBA_DQS#0
FBA_DQS#3

FBA_RST#

RV77

OPT@

CV162

OPT@

12

UV3

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4W1G1646E-HC12_FBGA96

1

2

0.1U_0402_16V7K

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

@

E3

FBA_D4

F7

FBA_D1

F2

FBA_D7

F8

FBA_D0

H3

FBA_D6
FBA_D5

FBA_D2

FBA_D29
FBA_D25
FBA_D28
FBA_D26
FBA_D31
FBA_D24
FBA_D30
FBA_D27

Group0 (IN3)

Group3 (BOT)

H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

+1.5VS_VGA +1.5VS_VGA

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+FBA_VREF0

FBA_MA0
FBA_MA1
FBA_MA2
FBA_MA3
FBA_MA4 FBA_D22
FBA_MA5
FBA_MA6
FBA_MA7
FBA_MA8
FBA_MA9
FBA_MA10
FBA_MA11
FBA_MA12
FBA_MA13
FBA_MA14
FBA_MA15

FBA_BA0
FBA_BA1
FBA_BA2

FBA_CLK0
FBA_CLK0#
FBA_CKE_L

FBA_ODT_L
FBA_CS0#_L
FBA_RAS#
FBA_CAS# FBA_ODT_L
FBA_WE#

FBA_DQS2
FBA_DQS1

FBA_DQM2
FBA_DQM1

FBA_DQS#2
FBA_DQS#1

FBA_RST#

RV69

243_0402_1%

OPT@

M8

H1
N3

P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7

M7

M2

N8

M3

K7
K9

K1
L2

K3
L3

F3
C7

E7
D3

G3

B7

T2
L8

12

L1
L9

UV4

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

J7

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0

J3

RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

J1

NC/ODT1
NC/CS1

J9

NC/CE1
NCZQ1

96-BALL
SDRAM DDR3

K4W1G1646E-HC12_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

@

E3

FBA_D19

F7

FBA_D20

F2

FBA_D17

F8

FBA_D21

H3

FBA_D16

H8

FBA_D23FBA_D3

G2

FBA_D18

H7

D7

FBA_D10

C3

FBA_D15

C8

FBA_D8

C2

FBA_D13

A7

FBA_D9

A2

FBA_D12

B8

FBA_D11

A3

FBA_D14

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

UV3

Samsung

S2@

SA000068R00

UV4

Samsung

S2@

SA000068R00

Group2 (IN1)

Group1 (TOP)

FBA_CKE_L

10K_0402_5%

UV3

Micron

M2@

SA000065D00

UV4

Micron

M2@

SA000065D00

RV67

OPT@

1 2

UV3

Samsung

S1@

SA000068U00

UV4

Samsung

S1@

SA000068U00

RV76

10K_0402_5%

OPT@

1 2

UV3

SA000067500

UV4

SA000067500

Micron

M1@

Micron

M1@

UV4 SIDE

1

1

CV134

CV159

2

OPT@

OPT@

0.1U_0402_16V7K

1

CV129

CV160

2

2

OPT@

1U_0402_6.3V6K

OPT@

1U_0402_6.3V6K

1

1

CV132

CV133

2

2

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CV164

2

OPT@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

2

CV163

CV136

@

2

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

2

CV135

CV137

2

OPT@

OPT@

1U_0402_6.3V6K

1

CV155

@

2

0.1U_0402_16V7K

1

1

CV142

CV138

@

2

2

0.1U_0402_16V7K

OPT@

1U_0402_6.3V6K

1

CV158

2

OPT@

1U_0402_6.3V6K

FBA_MA[15..0] <27,29>
FBA_BA[2..0] <27,29>

CMD mapping mod Mode D

UV3

Hynix

H1@

SA00003YOI0

UV4

Hynix

H1@

SA00003YOI0

Address

FBx_CMD0
FBx_CMD1
FBx_CMD2
FBx_CMD3
FBx_CMD4
FBx_CMD5
FBx_CMD6
FBx_CMD7
FBx_CMD8
FBx_CMD9
FBx_CMD10
FBx_CMD11
FBx_CMD12
FBx_CMD13
FBx_CMD14
FBx_CMD15
FBx_CMD16
FBx_CMD17
FBx_CMD18
FBx_CMD19
FBx_CMD20
FBx_CMD21
FBx_CMD22
FBx_CMD23
FBx_CMD24
FBx_CMD25
FBx_CMD26
FBx_CMD27
FBx_CMD28
FBx_CMD29
FBx_CMD30

FBA_D[0..63] <27,29>

FBA_DQM[7..0] <27,29>
FBA_DQS[7..0] <27,29>

FBA_DQS#[7..0] <27,29>

DATA Bus

32..63

0..31
CS0#_L

ODT_L
CKE_L
A14
RST

A9
A7
A2
A0
A4
A1
BA0
WE#
A15

CAS#

A13
A8
A6
A11
A5
A3
BA2
BA1
A12
A10
RAS#

A14
RST
A9
A7
A2
A0
A4
A1
BA0
WE#
A15
CAS#
CS0#_H

ODT_H
CKE_H
A13
A8
A6
A11
A5
A3
BA2
BA1
A12
A10
RAS#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N13X-VRAM A Lower

N13X-VRAM A Lower

N13X-VRAM A Lower

LA-9603P

LA-9603P

LA-9603P

28 62Wednesday, January 09, 2013

28 62Wednesday, January 09, 2013

28 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

Memory Partition A - Upper 32
bits

+1.5VS_VGA

12

RV70

1.1K_0402_1%

D D

C C

B B

+1.5VS_VGA +1.5VS_VGA

A A

1.1K_0402_1%

FBA_CKE_H

FBA_ODT_H

10K_0402_5%

1

2

0.1U_0402_16V7K

RV84

OPT@

CV145

OPT@

OPT@

RV82

OPT@

RV83
160_0402_1%

OPT@

1 2

12

UV5 SIDE

1

2

0.1U_0402_16V7K

12

FBA_CLK1

FBA_CLK1#

CV174

OPT@

1U_0402_6.3V6K

+FBA_VREF1

1

CV178

0.01U_0402_16V7K

OPT@

2

12

RV87

10K_0402_5%

OPT@

1

CV296

2

OPT@

1U_0402_6.3V6K

FBA_CLK1<27>
FBA_CLK1#<27>
FBA_CKE_H<27>

FBA_ODT_H<27>
FBA_CS0#_H<27>
FBA_RAS#<27,28>
FBA_CAS#<27,28>
FBA_WE#<27,28>

FBA_RST#<27,28>

1

CV301

2

OPT@

+FBA_VREF1 +FBA_VREF1

FBA_MA0
FBA_MA1
FBA_MA2
FBA_MA3
FBA_MA4
FBA_MA5
FBA_MA6
FBA_MA7
FBA_MA8
FBA_MA9
FBA_MA10
FBA_MA11
FBA_MA12
FBA_MA13
FBA_MA14
FBA_MA15

FBA_BA0
FBA_BA1
FBA_BA2

FBA_CLK1
FBA_CLK1#
FBA_CKE_H

FBA_ODT_H
FBA_CS0#_H
FBA_RAS#
FBA_CAS#
FBA_WE#

FBA_DQS4
FBA_DQS5

FBA_DQM4
FBA_DQM5

FBA_DQS#4
FBA_DQS#5 FBA_DQS#6

FBA_RST#

12

RV86

243_0402_1%

OPT@

1

1

CV291

2

1U_0402_6.3V6K

CV302

2

OPT@

OPT@

1U_0402_6.3V6K

UV5

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4W1G1646E-HC12_FBGA96

1

1

CV299

2

2

OPT@

0.1U_0402_16V7K

0.1U_0402_16V7K

4

@

E3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

FBA_D36

F7

FBA_D34

F2

FBA_D37

F8

FBA_D35

H3

FBA_D39

H8

FBA_D32

G2

FBA_D38

H7

FBA_D33

D7

FBA_D45

C3

FBA_D42

C8

FBA_D46

C2

FBA_D41

A7

FBA_D47

A2

FBA_D43

B8

FBA_D44

A3

FBA_D40

+1.5VS_VGA +1.5VS_VGA

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

UV5

Samsung

S2@

SA000068R00

UV6

Samsung

S2@

SA000068R00

Group4 (IN1)

Group5 (TOP)

UV5

Micron

M2@

SA000065D00

UV6

Micron

M2@

SA000065D00

UV5

Samsung

S1@

SA000068U00

UV6

Samsung

S1@

SA000068U00

UV6 SIDE

1

1

CV290

CV300

2

OPT@

OPT@

1U_0402_6.3V6K

1

CV297

2

OPT@

1U_0402_6.3V6K

1

CV298

CV165

2

2

OPT@

1U_0402_6.3V6K

OPT@

1U_0402_6.3V6K

1

1

CV177

CV170

2

0.1U_0402_16V7K

@

2

OPT@

0.1U_0402_16V7K

1

2

1U_0402_6.3V6K

3

UV5

Micron

M1@

SA000067500

UV6

Micron

M1@

SA000067500

CV166

OPT@

1U_0402_6.3V6K

2

UV5

Hynix

H1@

SA00003YOI0

UV6

Hynix

H1@

SA00003YOI0

FBA_RST#

RV85

243_0402_1%

OPT@

FBA_MA0
FBA_MA1
FBA_MA2
FBA_MA3
FBA_MA4
FBA_MA5
FBA_MA6
FBA_MA7
FBA_MA8
FBA_MA9
FBA_MA10
FBA_MA11
FBA_MA12
FBA_MA13
FBA_MA14
FBA_MA15

FBA_BA0
FBA_BA1
FBA_BA2

FBA_CLK1
FBA_CLK1#
FBA_CKE_H

FBA_ODT_H
FBA_CS0#_H
FBA_RAS#
FBA_CAS#
FBA_WE#

FBA_DQS7
FBA_DQS6

FBA_DQM7
FBA_DQM6

FBA_DQS#7

12

UV6

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4W1G1646E-HC12_FBGA96

@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3

FBA_D63

F7

FBA_D58

F2

FBA_D60

F8

FBA_D59

H3

FBA_D61

H8

FBA_D56

G2

FBA_D62

H7

FBA_D57

D7

FBA_D55

C3

FBA_D51

C8

FBA_D54

C2

FBA_D49

A7

FBA_D52

A2

FBA_D50

B8

FBA_D53

A3

FBA_D48

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

Group7 (IN3)

Group6 (BOT)

CMD mapping mod Mode D

Address

FBx_CMD0
FBx_CMD1
FBx_CMD2
FBx_CMD3
FBx_CMD4
FBx_CMD5
FBx_CMD6
FBx_CMD7
FBx_CMD8
FBx_CMD9
FBx_CMD10
FBx_CMD11
FBx_CMD12
FBx_CMD13
FBx_CMD14
FBx_CMD15
FBx_CMD16
FBx_CMD17
FBx_CMD18
FBx_CMD19
FBx_CMD20
FBx_CMD21
FBx_CMD22
FBx_CMD23
FBx_CMD24
FBx_CMD25
FBx_CMD26
FBx_CMD27
FBx_CMD28
FBx_CMD29

1

CV172

2

OPT@

1

1

1

CV180

CV169

@

@

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

1

CV167

CV171

2

2

OPT@

1U_0402_6.3V6K

OPT@

1U_0402_6.3V6K

FBx_CMD30

1

FBA_D[0..63] <27,28>

FBA_MA[15..0] <27,28>
FBA_BA[2..0] <27,28>

FBA_DQM[7..0] <27,28>
FBA_DQS[7..0] <27,28>

FBA_DQS#[7..0] <27,28>

DATA Bus

32..63

0..31
CS0#_L

ODT_L
CKE_L
A14
RST

A9
A7
A2
A0
A4
A1
BA0
WE#
A15

CAS#

A13
A8
A6
A11
A5
A3
BA2
BA1
A12
A10
RAS#

A14
RST
A9
A7
A2
A0
A4
A1
BA0
WE#
A15
CAS#
CS0#_H

ODT_H
CKE_H
A13
A8
A6
A11
A5
A3
BA2
BA1
A12
A10
RAS#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N13X-VRAM A Upper

N13X-VRAM A Upper

N13X-VRAM A Upper

LA-9603P

LA-9603P

LA-9603P

29 62Wednesday, January 09, 2013

29 62Wednesday, January 09, 2013

29 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

4

3

2

1

Memory Partition C - Lower 32 bits

+1.5VS_VGA

12

243_0402_1%

+FBB_VREF0

FBC_MA0
FBC_MA1
FBC_MA2
FBC_MA3
FBC_MA4
FBC_MA5
FBC_MA6
FBC_MA7
FBC_MA8
FBC_MA9
FBC_MA10
FBC_MA11
FBC_MA12
FBC_MA13
FBC_MA14
FBC_MA15

FBC_BA0
FBC_BA1
FBC_BA2

FBC_CLK0
FBC_CLK0#
FBC_CKE_L

FBC_ODT_L
FBC_CS0#_L
FBC_RAS#
FBC_CAS#
FBC_WE#

FBC_DQS0
FBC_DQS3

FBC_DQM0
FBC_DQM3

FBC_DQS#0
FBC_DQS#3

FBC_RST#

RV90

@

12

D D

1.1K_0402_1%

1.1K_0402_1%

C C

B B

+1.5VS_VGA +1.5VS_VGA

12

RV111

@

12

RV115

@

FBC_CLK0

RV89
160_0402_1%

@

1 2

FBC_CLK0#

UV7 SIDE

+FBB_VREF0

1

CV202

0.01U_0402_16V7K

@

2

FBC_RST#<27,31>

10K_0402_5%

FBC_CLK0<27>
FBC_CLK0#<27>
FBC_CKE_L<27>

FBC_ODT_L<27>
FBC_CS0#_L<27>
FBC_RAS#<27,31>
FBC_CAS#<27,31>
FBC_WE#<27,31>

RV91

@

UV7

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

310mA

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4W1G1646E-HC12_FBGA96

@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3

FBC_D4

F7

FBC_D3

F2

FBC_D7

F8

FBC_D0
FBC_D5
FBC_D1
FBC_D6
FBC_D2

Group0 (IN3)

Group3 (BOT)

H3
H8
G2
H7

D7

FBC_D28

C3

FBC_D27

C8

FBC_D31

C2

FBC_D25

A7

FBC_D29

A2

FBC_D24 FBC_D13

B8

FBC_D30

A3

FBC_D26

+1.5VS_VGA +1.5VS_VGA

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+FBB_VREF0

FBC_RST#

RV88

243_0402_1%

@

FBC_MA0
FBC_MA1
FBC_MA2
FBC_MA3
FBC_MA4
FBC_MA5
FBC_MA6
FBC_MA7
FBC_MA8
FBC_MA9
FBC_MA10
FBC_MA11
FBC_MA12
FBC_MA13
FBC_MA14
FBC_MA15

FBC_BA0
FBC_BA1
FBC_BA2

FBC_CLK0
FBC_CLK0#
FBC_CKE_L

FBC_ODT_L
FBC_CS0#_L
FBC_RAS#
FBC_CAS#
FBC_WE#

FBC_DQS2
FBC_DQS1

FBC_DQM2
FBC_DQM1

FBC_DQS#2
FBC_DQS#1

12

UV8 SIDE

M8

H1
N3

P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7

M7

M2

N8

M3

K7
K9

K1
L2

K3
L3

F3
C7

E7
D3

G3

B7

T2
L8

L1
L9

UV8

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

J7

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0

J3

RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

J1

NC/ODT1
NC/CS1

J9

NC/CE1
NCZQ1

96-BALL
SDRAM DDR3

K4W1G1646E-HC12_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

@

E3

FBC_D16

F7

FBC_D21

F2

FBC_D18

F8

FBC_D17

H3

FBC_D20

H8

FBC_D23

G2

FBC_D19

H7

FBC_D22

D7

FBC_D8

C3

FBC_D15

C8

FBC_D11

C2

FBC_D12

A7

FBC_D9

A2
B8

FBC_D10

A3

FBC_D14

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

FBC_ODT_L

FBC_CKE_L

Group2 (IN1)

Group1 (TOP)

12

RV117

10K_0402_5%

@

12

RV116
10K_0402_5%

@

CMD mapping mod Mode D

Address

FBx_CMD0
FBx_CMD1
FBx_CMD2
FBx_CMD3
FBx_CMD4
FBx_CMD5
FBx_CMD6
FBx_CMD7
FBx_CMD8
FBx_CMD9
FBx_CMD10
FBx_CMD11
FBx_CMD12
FBx_CMD13
FBx_CMD14
FBx_CMD15
FBx_CMD16
FBx_CMD17
FBx_CMD18
FBx_CMD19
FBx_CMD20
FBx_CMD21
FBx_CMD22
FBx_CMD23
FBx_CMD24
FBx_CMD25
FBx_CMD26
FBx_CMD27
FBx_CMD28
FBx_CMD29
FBx_CMD30

FBC_D[0..63] <27,31>

FBC_MA[15..0] <27,31>

FBC_BA[2..0] <27,31>
FBC_DQM[7..0] <27,31>
FBC_DQS[7..0] <27,31>

FBC_DQS#[7..0] <27,31>

DATA Bus

32..63

0..31
CS0#_L

ODT_L
CKE_L
A14
RST

A9
A7
A2
A0
A4
A1
BA0
WE#
A15

CAS#

A13
A8
A6
A11
A5
A3
BA2
BA1
A12
A10
RAS#

A14
RST
A9
A7
A2
A0
A4
A1
BA0
WE#
A15
CAS#
CS0#_H

ODT_H
CKE_H
A13
A8
A6
A11
A5
A3
BA2
BA1
A12
A10
RAS#

1

CV191

@

2

2

A A

0.1U_0402_16V7K

0.1U_0402_16V7K

CV199

CV183

@

@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

5

1

1

1

1

CV189

@

2

1U_0402_6.3V6K

1

CV205

CV188

@

2

@

2

1U_0402_6.3V6K

1

1

CV206

CV190

@

@

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

CV182

CV181

@

@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

4

1

1

CV194

CV185

@

@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

1

1

CV192

@

2

0.1U_0402_16V7K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

CV203

@

2

1U_0402_6.3V6K

1

CV195

CV184

@

2

@

2

1U_0402_6.3V6K

Compal Secret Data

Compal Secret Data

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

1

CV198

CV187

@

@

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

CV201

CV200

@

@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

1

CV193

CV204

@

@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

N13X-VRAM C Lower

N13X-VRAM C Lower

N13X-VRAM C Lower

LA-9603P

LA-9603P

LA-9603P

30 62Wednesday, January 09, 2013

30 62Wednesday, January 09, 2013

30 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

4

3

2

1

Memory Partition C - Upper 32 bits

FBC_D[0..63] <27,30>

FBC_MA[15..0] <27,30>

D D

C C

B B

A A

+1.5VS_VGA

12

RV120

1.1K_0402_1%

@

RV127

1.1K_0402_1%

@

FBC_ODT_H

FBC_CKE_H

RV118

10K_0402_5%

@

+1.5VS_VGA +1.5VS_VGA

1

CV209

@

2

0.1U_0402_16V7K

12

FBC_CLK1

RV129
160_0402_1%

@

1 2

FBC_CLK1#

12

UV9 SIDE

1

CV227

@

2

0.1U_0402_16V7K

+FBB_VREF1

1

CV229

0.01U_0402_16V7K

@

2

1

CV213

@

2

1U_0402_6.3V6K

12

RV119

10K_0402_5%

@

1

2

1U_0402_6.3V6K

FBC_CLK1<27>
FBC_CLK1#<27>
FBC_CKE_H<27>

FBC_ODT_H<27>
FBC_CS0#_H<27>
FBC_RAS#<27,30>
FBC_CAS#<27,30>
FBC_WE#<27,30>

FBC_RST#<27,30>

CV233

@

1U_0402_6.3V6K

+FBB_VREF1

FBC_MA0
FBC_MA1
FBC_MA2
FBC_MA3
FBC_MA4
FBC_MA5
FBC_MA6
FBC_MA7
FBC_MA8
FBC_MA9
FBC_MA10
FBC_MA11
FBC_MA12
FBC_MA13
FBC_MA14
FBC_MA15

FBC_BA0
FBC_BA1
FBC_BA2

FBC_CLK1
FBC_CLK1#
FBC_CKE_H

FBC_ODT_H
FBC_CS0#_H
FBC_RAS#
FBC_CAS#
FBC_WE#

FBC_DQS4
FBC_DQS5

FBC_DQM4
FBC_DQM5

FBC_DQS#4
FBC_DQS#5

FBC_RST#

12

RV123

243_0402_1%

@

1

1

CV226

CV207

@

2

@

2

1U_0402_6.3V6K

UV9

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4W1G1646E-HC12_FBGA96

1

1

CV230

@

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

@

E3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

CV220

@

1U_0402_6.3V6K

FBC_D39

F7

FBC_D33

F2

FBC_D38

F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

FBC_D32
FBC_D36
FBC_D35
FBC_D37
FBC_D34

FBC_D47
FBC_D43
FBC_D46
FBC_D42
FBC_D40
FBC_D45
FBC_D44
FBC_D41

+1.5VS_VGA

Group4 (IN1)

Group5 (TOP)

+FBB_VREF1

FBC_RST#

RV128

243_0402_1%

@

FBC_MA0
FBC_MA1
FBC_MA2
FBC_MA3
FBC_MA4
FBC_MA5
FBC_MA6
FBC_MA7
FBC_MA8
FBC_MA9
FBC_MA10
FBC_MA11
FBC_MA12
FBC_MA13
FBC_MA14
FBC_MA15

FBC_BA0
FBC_BA1
FBC_BA2

FBC_CLK1
FBC_CLK1#
FBC_CKE_H

FBC_ODT_H
FBC_CS0#_H
FBC_RAS#
FBC_CAS#
FBC_WE#

FBC_DQS7
FBC_DQS6

FBC_DQM7
FBC_DQM6

FBC_DQS#7
FBC_DQS#6

12

UV10 SIDE

1

CV228

@

2

1U_0402_6.3V6K

CV210

CV225

@

@

2

2

1U_0402_6.3V6K

0.1U_0402_16V7K

1

1

1

1

CV208

@

2

0.1U_0402_16V7K

1

CV223

@

2

1U_0402_6.3V6K

1

CV211

CV222

@

2

@

2

1U_0402_6.3V6K

UV10

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4W1G1646E-HC12_FBGA96

1

1

CV224

@

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

@

E3

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

FBC_D60
FBC_D57
FBC_D63
FBC_D58
FBC_D61
FBC_D56
FBC_D62
FBC_D59

FBC_D54
FBC_D51
FBC_D55
FBC_D49
FBC_D52
FBC_D50
FBC_D53
FBC_D48

+1.5VS_VGA

Group7 (IN3)

Group6 (BOT)

CMD mapping mod Mode D

Address

FBx_CMD0
FBx_CMD1
FBx_CMD2
FBx_CMD3
FBx_CMD4
FBx_CMD5
FBx_CMD6
FBx_CMD7
FBx_CMD8
FBx_CMD9
FBx_CMD10
FBx_CMD11
FBx_CMD12
FBx_CMD13
FBx_CMD14
FBx_CMD15
FBx_CMD16
FBx_CMD17
FBx_CMD18
FBx_CMD19
FBx_CMD20
FBx_CMD21
FBx_CMD22
FBx_CMD23
FBx_CMD24
FBx_CMD25
FBx_CMD26
FBx_CMD27

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

FBx_CMD28
FBx_CMD29
FBx_CMD30

1

CV214

@

1

CV215

CV217

@

@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

FBC_BA[2..0] <27,30>
FBC_DQM[7..0] <27,30>
FBC_DQS[7..0] <27,30>

FBC_DQS#[7..0] <27,30>

DATA Bus

32..63

0..31
CS0#_L

ODT_L
CKE_L

A9
A7
A2
A0
A4
A1
BA0
WE#
A15

A14
RST
A9
A7
A2
A0
A4
A1
BA0
WE#
A15
CAS#

A14
RST

CAS#

CS0#_H

ODT_H
CKE_H
A13

A13
A8

A8
A6

A6
A11

A11
A5

A5
A3

A3
BA2

BA2
BA1

BA1

A12

A12

A10

A10
RAS#

RAS#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N13X-VRAM C Upper

N13X-VRAM C Upper

N13X-VRAM C Upper

LA-9603P

LA-9603P

LA-9603P

31 62Wednesday, January 09, 2013

31 62Wednesday, January 09, 2013

31 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

RV93

RV92

GV2@

45.3K_0402_1%

1 2

D D

C C

B B

A A

STRAP0<24>
STRAP1<24>
STRAP2<24>
STRAP3<24>
STRAP4<24>

ROM_SI<24>

ROM_SO<24>

ROM_SCLK<24>

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

ROM_SI
ROM_SO
ROM_SCLK

X76

1 2

+3VS_VGA

1 2

1 2

RV95

@

45.3K_0402_1%

RV98

4.99K_0402_1%

@

RV101
20K_0402_1%

S2@

45.3K_0402_1%

1 2

RV96

45.3K_0402_1%

1 2

RV99

4.99K_0402_1%

1 2

RV102
10K_0402_1%

1 2

@

GV2@

GV2@

@

RV94

30.1K_0402_1%

1 2

RV97
15K_0402_1%

1 2

RV100

4.99K_0402_1%

1 2

RV103
15K_0402_1%

1 2

@

GV2@

GV2@

@

4

RV121
20K_0402_1%

1 2

RV124

4.99K_0402_1%

1 2

@

GV2@

+3VS_VGA

RV122
20K_0402_1%

1 2

RV125

45.3K_0402_1%

1 2

@

GV2@

3

Physical
Strapping pin

ROM_SCLK
ROM_SI
ROM_SO FB[0]
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

Resistor Values

Power Rail

+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA

Pull-up to
+3VS_VGA

5K
10K
15K
20K
25K
30K
35K
45K

S1@

M1@

ZZZ1

Samsung

S1_GV2@
X7643238L09

ZZZ2

Micron

M1_GV2@
X7643238L10

ZZZ5

RV101

45.3K_0402_1%

SD034453280

RV101

30.1K_0402_1%

SD034301280

RV101

H1@

Logical
Strapping Bit3

PCI_DEVID[4]

FB[1]

PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
SOR3_EXPOSED

RESERVED PCIE_SPEED_

Pull-down to Gnd
1000
1001
1010
1011
1100
1101
1110
1111

0000
0001
0010
0011
0100
0101
0110
0111

SUB_VENDOR

0

No VBIOS ROM

1

BIOS ROM is present (Default)

FB_0_BAR_SIZE

0

Reserved

1

Reserved

2

256MB (Default)

3

Reserved

2

Logical
Strapping Bit2

SUB_VENDOR

USER[2] USER[1] USER[0]USER[3]

3GIO_PAD_CFG_ADR[2] 3GIO_PAD_CFG_ADR[1]3GIO_PAD_CFG_ADR[3]

SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED

CHANGE_GEN3

USER Straps

34.8K_0402_1%

SD034348280

Hynix

H1_GV2@
X7643238L08

ZZZ3

User[3:0]

1000-1100

Customer defined

PEX_PLL_EN_TERM

0

RV101

M2@

Samsung

S2_GV2@
X7643238L11

ZZZ4

1

Disable (Default)

Enable

PCIE_MAX_SPEED

0

Limit to PCIE Gen1

10K_0402_1%

SD034100280

Micron

M2_GV2@
X7643238L12

1

PCIE Gen 2/3 Capable

1

Logical
Strapping Bit1

SLOT_CLK_CFG/PCI_DEVID[5]
RAM_CFG[1]RAM_CFG[3] RAM_CFG[2]

PCIE_MAX_SPEED DP_PLL_VDD33V

Vendor

Samsung 2G
Micron 2G
Samsung 1G
Micron 1G

VRAM Sturcture

S2@
M2@
S1@
M1@

3GIO_PADCFG

3GIO_PADCFG[3:0]

0110

Notebook Default

SLOT_CLK_CFG

0

GPU and MCH don't share a common reference clock

1

GPU and MCH share a common reference clock (Default)

SMBUS_ALT_ADDR

0

0x9E (Default)

1

0x9C (Multi-GPU usage)

XCLK_417

0

277MHz (Default)

1

Reserved

VGA_DEVICE

0

3D Device (Class Code 302h)

1

VGA Device (Default)

Logical
Strapping Bit0

PEX_PLL_EN_TERM
RAM_CFG[0]

VGA_DEVICESMB_ALT_ADDR

3GIO_PAD_CFG_ADR[0]

Security Classification

Security Classification

Security Classification

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N13X_MISC

N13X_MISC

N13X_MISC

LA-9603P

LA-9603P

LA-9603P

32 62Wednesday, January 09, 2013

32 62Wednesday, January 09, 2013

32 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

LCD POWER CIRCUIT

+5VALW

2

IN

1 2

R438

12

R401
100K_0402_5%

220K_0402_5%

1 2

1

0.1U_0402_16V7K

OUT

GND

DTC124EK

Q81

DTC124EKAT146_SC59-3

3

R02

R717
0_0402_5%

@

1 2

R403

C515

+3VS

12

R433

4.7K_0402_5%

R400

13

D

Q79

S

@

100K_0402_5%

12

1 2

150_0603_1%

2

G

12

R408

R716
10K_0402_5%

100K_0402_1%

D D

2N7002K_SOT23-3

PCH_ENVDD<17>

C C

BKOFF#<42>

R02

PCH_ENBKL<17>

B B

R538 0_0402_5%@

4

+3VS+LCDVDD

W=60mils

1

C513

4.7U_0603_6.3V6K

2

S

G

2

Q80
PMV65XP_SOT23-3~D

1

2

@

DISPOFF#BKOFF#

ENBKL <42>

D

1 3

+LCDVDD

FBMA-L11-201209-221LMA30T_0805

4.7U_0603_6.3V6K

+LCDVDD_CONN

L29

1 2

W=60mils

C516

1

1

C517

0.1U_0402_16V7K

2

2

3

2

1

CMOS Camera

+3VS

(20 MIL)

CMOS@

Q83
PMV65XP_SOT23-3~D

D

S

13

G

R435

CMOS@

CMOS_ON#<42>

150K_0402_5%

4.7V

1

C520

CMOS@

0.1U_0402_16V7K

2

2

1

2

R02

R296

@

0_0603_5%

CMOS@

C518

0.1U_0402_16V7K

R296 for CMOS shake issue reserve

(20 MIL)

12

+3VS_CMOS

10U

VGA LCD/PANEL BD. Conn.

R02

R813 0_0805_5%

1 2

1

C541

4.7U_0805_25V6-K

R02

R03

1 2

+3VS

R447 0_0402_5%@

LVDS_BCLK#<17>

LVDS_ACLK<17>
LVDS_ACLK#<17>

EDID_DATA<17>
EDID_CLK<17>

CMOS

LVDS_BCLK<17>

LVDS_B2<17>

LVDS_B2#<17>

LVDS_B1<17>

LVDS_B1#<17>

LVDS_B0<17>

LVDS_B0#<17>

LVDS_A2<17>
LVDS_A2#<17>
LVDS_A1<17>
LVDS_A1#<17>
LVDS_A0<17>
LVDS_A0#<17>

+LCDVDD_CONN

+3VS
DMIC_DATA<41>
DMIC_CLK<41>

USB20_P3<18>
USB20_N3<18>

+3VS_CMOS

@

1 2

PCH_PWM<17>

EC_INVT_PWM<42>

R430 0_0402_5%

R30

1 2

R431 0_0402_5%

DISPOFF#
INVT_PWM

(60 MIL)

DMIC_DATA
DMIC_CLK

USB20_P3
USB20_N3

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

2

JLVDS1 ME@

1

1

2

2

G1

3

3

G2

4

4

G3

5

5

G4

6

6

G5

7

7

G6

8

8

9

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

ACES_50203-04001-001

41
42
43
44
45
46

B++LEDVDD

A A

Security Classification

Security Classification

Security Classification

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LVDS/CAMERA

LVDS/CAMERA

LVDS/CAMERA

LA-9603P

LA-9603P

LA-9603P

33 62Wednesday, January 09, 2013

33 62Wednesday, January 09, 2013

33 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

A

B

C

D

E

1 1

+5VS

FCM1608CF-121T03 0603

DAC_RED<17>

DAC_GRN<17>

DAC_BLU<17>

2 2

3 3

12

CRT_HSYNC<17>

CRT_VSYNC<17>

12

R445
150_0402_1%

R443
150_0402_1%

CLOSE TO CONN

C529

0.1U_0402_16V7K

C531

0.1U_0402_16V7K

12

R446
150_0402_1%

+CRT_VCC

1

2

+CRT_VCC

1

2

1

C522

2

10P_0402_50V8J

R448

1 2

1K_0402_5%

1

5

P

4

OE#

A2Y

G

U23
SN74AHCT1G125DCKR_SC70-5

3

R451

1 2

1K_0402_5%

5

1

P

4

OE#

A2Y

G

U24
SN74AHCT1G125DCKR_SC70-5

3

C523

10P_0402_50V8J

1 2

L30

FCM1608CF-121T03 0603

1 2

L31

FCM1608CF-121T03 0603

1 2

L32

1

1

C524

2

2

10P_0402_50V8J

CRT_VSYNC_1 JVGA_VS

1

1

C525

C526

2

2

10P_0402_50V8J

10P_0402_50V8J

FCM1608CF-121T03 0603

1 2

L33

FCM1608CF-121T03 0603

1 2

L34

RED

GREEN

BLUE

1

C527

2

10P_0402_50V8J

T66PAD

JVGA_HSCRT_HSYNC_1

RB491D_SC59-3

NC11
RED

CRT_DDC_DAT_CONN
GREEN

JVGA_HS
BLUE

JVGA_VS

CRT_DDC_CLK_CONN

D10

2 1

100P_0402_50V8J

+CRT_VCC

CRT Connector

F1

1.1A_6V_SMD1812P110TF

W=40mils

1

C528

2

21

+CRT_VCC_F

1

C521

0.1U_0402_16V7K

2

JCRT1

6

11

1
7

12

2
8

13

3
9

14

4

10

G

15

G

5

ME@

C-H_13-12201557CP

16
17

12

@

R437

R436

0_0402_5%

0_0402_5%

12

12

@

@

R434

@

R432

0_0402_5%

0_0402_5%

1 2

EMI Request

R456

2.2K_0402_5%

3

+CRT_VCC

12

12

R457

2.2K_0402_5%

CRT_DDC_DAT_CONN

CRT_DDC_CLK_CONN

Compal Secret Data

Compal Secret Data

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

C

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT Connector

CRT Connector

CRT Connector

Custom

Custom

Custom

LA-9603P

LA-9603P

LA-9603P

1.0

1.0

1.0

34 62Wednesday, January 09, 2013

34 62Wednesday, January 09, 2013

34 62Wednesday, January 09, 2013

E

+3VS

Pull high at chipset/VGA side

CRT_DDC_DATA<17>

CRT_DDC_CLK<17>

4 4

A

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

B

5

4

2

Q62B

61

Q62A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

1

+5VS

+3VS

D D

TMDS_B_HPD#<17>

C C

+3VS

R02

R783
0_0402_5%

Pull up R for PCH OR VGA SIDE

HDMICLK_NB<17>

B B

HDMIDAT_R

HDMICLK_R

2

3

D11
YSLC05CH_SOT23-3

1

A A

HDMIDAT_NB<17>

@

5

@

1 2

5

4

3

Q63B

HDMI@

2N7002KDWH_SOT363-6

Q63A

HDMI@

2

2N7002KDWH_SOT363-6

61

HDMICLK_R

HDMIDAT_R

4

R485

1M_0402_5%

HDMI@

TMDS_B_HPD#

HDMI_CLK-_CK

HDMI_CLK+_CK

HDMI_TX0-_CK

HDMI_TX0+_CK

HDMI_TX1-_CK

HDMI_TX1+_CK

HDMI_TX2-_CK

HDMI_TX2+_CK

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

Q93

HDMI@

G

2

2N7002K_SOT23-3

D

S

1

4

1

4

1

4

1

4

13

HDMI_CLK-_CK<17>
HDMI_CLK+_CK<17>

HDMI_TX0-_CK<17>

HDMI_TX0+_CK<17>
HDMI_TX1-_CK<17>

HDMI_TX1+_CK<17>
HDMI_TX2-_CK<17>

HDMI_TX2+_CK<17>

L35

HDMI@

2

1

4

WCM-2012HS-900T_4P
L36

HDMI@

1

4

WCM-2012HS-900T_4P
L37

HDMI@

1

4

WCM-2012HS-900T_4P
L38

HDMI@

1

4

WCM-2012HS-900T_4P

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

HDMI_CLK-_CONN

2

3

2

3

2

3

2

3

3

1 2

C982 0.1U_0402_16V7K @

3

HDMI_CLK+_CONN

1 2

C983 0.1U_0402_16V7K @

2

HDMI_TX0-_CONN

1 2

C984 0.1U_0402_16V7K @

3

HDMI_TX0+_CONN

1 2

C985 0.1U_0402_16V7K @

2

HDMI_TX1-_CONN

1 2

C986 0.1U_0402_16V7K @

3

HDMI_TX1+_CONN

1 2

C987 0.1U_0402_16V7K @

2

HDMI_TX2-_CONN

1 2

C988 0.1U_0402_16V7K @

3

HDMI_TX2+_CONN

1 2

C989 0.1U_0402_16V7K @

Compal Secret Data

Compal Secret Data

Compal Secret Data

+5VS

3

R488
20K_0402_5%

HDMI@

1 2

Deciphered Date

Deciphered Date

Deciphered Date

2

D14

@

BAT54S-7-F_SOT23-3

1

HDMI_CLK-_CK
HDMI_CLK+_CK

HDMI_TX0-_CK
HDMI_TX0+_CK

HDMI_TX1-_CK
HDMI_TX1+_CK

HDMI_TX2-_CK

HDMI_TX2+_CK

HDMI_CLK-_CONN
HDMI_CLK+_CONN
HDMI_TX1-_CONN
HDMI_TX1+_CONN

HDMI_TX0-_CONN
HDMI_TX0+_CONN
HDMI_TX2-_CONN
HDMI_TX2+_CONN

R464 0_0402_5%@
R465 0_0402_5%@

R466 0_0402_5%@
R467 0_0402_5%@

R468 0_0402_5%@
R469 0_0402_5%@

R470 0_0402_5%@
R471 0_0402_5%@

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

2

PMEG2010ET_SOT23-3
D13

HDMI@

2 1

+HDMI_5V

R483

HDMI@

2.2K_0402_5%

1 2

680 +-5% 8P4R

45
36
27
18

RP5

HDMI@

680 +-5% 8P4R

45
36
27
18

RP6

HDMI@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

W=40mils

F2

HDMI@

1.1A_8V_SMD1812P110TF

0.1U_0402_16V7K

R484

HDMI@

2.2K_0402_5%

1 2

HDMI_DET

+5VS_HDMI

HDMIDAT_R
HDMICLK_R

HDMI_CLK-_CONN
HDMI_CLK+_CONN

HDMI_TX0-_CONN
HDMI_TX0+_CONN

HDMI_TX1-_CONN
HDMI_TX1+_CONN

HDMI_TX2-_CONN
HDMI_TX2+_CONN

SD309680080
S ROW RES 1/16W 680 +-5% 8P4R

13

D

2

G

Q95

S

HDMI@

2N7002K_SOT23-3

Compal Electronics,Ltd.

Compal Electronics,Ltd.

Compal Electronics,Ltd.

HDMI CONN

HDMI CONN

HDMI CONN

+5VS_HDMI

21

+5VS_HDMI

C543

HDMI@

19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

+3VS

LA-9603P

LA-9603P

LA-9603P

1

2

JHDMI1

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CK-

GND

CK_shield

GND
CK+
D0­D0_shield
D0+
D1­D1_shield
D1+
D2­D2_shield
D2+

ACON_HMR2H-AK120C

ME@

35 62Wednesday, January 09, 2013

35 62Wednesday, January 09, 2013

35 62Wednesday, January 09, 2013

1

20
21

1.0

1.0

1.0

A

B

C

D

E

Mini-Express Card for WLAN/WiMAX(Half)

R439
150K_0402_5%

AOAC@

R5550
0_0402_5%

1 2

@

1 2

@

0_0402_5%
R5551

+3VALW

1

AOAC@

C537

0.1U_0402_16V7K

2

USB20_N10

USB20_P10

80mil

R308 0_0805_5%

12

NOAOAC@

Q105 AO3413_SOT23-3

D

S

13

AOAC@

G

2

USB20_N10 <18>

USB20_P10 <18>

+3VS_WLAN+3VS

1

AOAC@

C536

0.1U_0402_16V7K

2

+3VS_WLAN

1

1

C548

C547

@

0.1U_0402_16V7K

2

2

PCH_WL_OFF# <18>

PLT_RST# <18,23,37,42>
+3VALW
+3VS_WLAN

SMB_CLK_S3 <12,13,15,43>
SMB_DATA_S3 <12,13,15,43>

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

+3VS_WLAN

R02

R498 0_0402_5%@
R499 0_0402_5%@

R500 0_0402_5%@

R02

USB20_N10_WLAN
USB20_P10_WLAN

LPC_FRAME# <14,42>
LPC_AD3 <14,42>
LPC_AD2 <14,42>
LPC_AD1 <14,42>
LPC_AD0 <14,42>

CLK_PCI_DB <18>

+1.5VS

1 2
1 2

1 2
1 2

R501 0_0402_5%@

1 2

R502 0_0402_5%@

PLT_RST#

4.7U_0603_6.3V6K

LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R

1 1

EC_WL_WAKE#<42,44>

PCIE_WAKE#<16,37>

1 2

PCH_BT_ON#<19,40>
BT_DISABLE<19>

Low - Disable

INTEL_BT_OFF#<19>

2 2

@

R892 0_0402_5%

1 2

@

R897 0_0402_5%

R02

1 2

@

R893 1K_0402_1%

1 2

R894 1K_0402_1%

R03

INTEL_BT_OFF#_R

Mini-Express Card(WLAN/WiMAX)

@

PCIE_WAKE#

1 2

R1505 0_0402_5%

1 2

R514 0_0402_5%@

BT_ACTIVE<40>

1 2

R5580 0_0402_5%@

CLKREQ_WLAN#<15>

CLK_PCIE_WLAN1#<15>

CLK_PCIE_WLAN1<15>

PCIE_PRX_DTX_N2<15>
PCIE_PRX_DTX_P2<15>

PCIE_PTX_C_DRX_N2<15>
PCIE_PTX_C_DRX_P2<15>

EC_TX<42>
EC_RX<42>

R03

For EC to detect
debug card insert.

EC_WL_WAKE#_R

1 2

BT_ACTIVE

R497 0_0402_5%@

PCI_RST#_R
CLK_PCI_DB

+3VS_WLAN

100_0402_1%

R505

1 2
1 2

R506

100_0402_1%

INTEL_BT_OFF#_R

R02

Reserve for SW mini-pcie debug card.
Series resistors closed to KBC side.

LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R
PCI_RST#_R
CLK_PCI_DB

BT_DISABLE_RBT_DISABLE_F_R

1 2

R508 0_0402_5%@
R509 0_0402_5%@
R510 0_0402_5%@
R511 0_0402_5%@
R512 0_0402_5%@
R513 0_0402_5%@

R507
100K_0402_5%

1 2
1 2
1 2
1 2
1 2
1 2

JWLN1

112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152

GND153GND2

BELLW_80003-3041

ME@

USB20_N10_WLAN

USB20_P10_WLAN

for Intel AOAC function Reserved

for Intel AOAC function

AOAC_ON#<42>

3 3

0.1U_0402_16V7K

1

C566

@

2

0.01U_0402_16V7K

SATA_DTX_C_IRX_P0<14>
SATA_DTX_C_IRX_N0<14>

SATA_ITX_DRX_N0<14>
SATA_ITX_DRX_P0<14>

4 4

A

mSATA_DET#<19>

For SSD use:

Mini-Express Card(SSD)

+3VS_SSD +3VS_SSD

1

C567

2

SATA_DTX_C_IRX_P0 SATA_DTX_IRX_P0
SATA_DTX_C_IRX_N0 SATA_DTX_IRX_N0

R558 0_0402_5%@

1

C568

@

2

10U_0603_6.3V6M

11/07 Change type to 0603

0.01U_0402_16V7K

12
12

0.01U_0402_16V7K @

SATA_ITX_DRX_N0
SATA_ITX_DRX_P0

1 2

R5554

220_0402_5% @

B

C572
C573

@

+3VS_SSD

@

mSATA_DET#_R

12

SSD Active:4.5W(1.5A)

+3VS

J5

2

112

JUMP_43X79

@

JSSD1

BELLW_80003-3041

ME@

112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152

GND153GND2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

C

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Mini-Card/NEW Card/SIM

Mini-Card/NEW Card/SIM

Mini-Card/NEW Card/SIM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet of

LA-9603P

LA-9603P

LA-9603P

E

36 62Wednesday, January 09, 2013

of

36 62Wednesday, January 09, 2013

of

36 62Wednesday, January 09, 2013

1.0

1.0

1.0

5

D D

The C1183, C1186 close to U47 Pin 22, 23

1 2

PCIE_PRX_DTX_P1<15>
PCIE_PRX_DTX_N1<15>

PCIE_PTX_C_DRX_P1<15>

PCIE_PTX_C_DRX_N1<15>

CLKREQ_LAN#<15>

PLT_RST#<18,23,36,42>

CLK_PCIE_LAN<15>

C C

B B

CLK_PCIE_LAN#<15>

GCLK_LAN_25MHZ

+3V_LAN

LAN_WAKE#<42>

R1512 10K_0402_5%@

R1518 10K_0402_5%@

C1183 0.1U_0402_16V7K

1 2

C1186 0.1U_0402_16V7K

LAN_XTALI

GCLK_LAN_25MHZ

1 2

1 2

R02

R1508 0_0402_5%@

+3V_LAN

NOGCLK@

1 2

R1373 0_0402_5%

R03

GCLK@

1 2

R5585 0_0402_5%

1 2

CLKREQ_LAN#

PCIE_WAKE#_R

R1510 10K_0402_5%@

1 2

R1511 1K_0402_5%@

+LAN_VDDREG

PCIE_PRX_C_DTX_P1
PCIE_PRX_C_DTX_N1

LAN_XTALI_R
LAN_XTALO

PCIE_WAKE#_R

12

ENSWREG

1 2

R1513 2.49K_0402_1%

ISOLATEB

22
23
17

18

16
25
19

20

43
44

28
26

14
15
38

33
34

35

46
24

49

4

U47

8105@

RTL8105E-VL-CGT

SA00003PO40

U47

HSOP
HSON
HSIP

HSIN

CLKREQB
PERSTB
REFCLK_P

REFCLK_N

CKXTAL1
CKXTAL2

LANWAKEB
ISOLATEB

NC/SMBCLK
NC/SMBDATA
GPO/SMBALERT

ENSWREG
VDDREG

VDDREG

RSET
GND

PGND

RTL8111F-CGT_QFN48_6x6

GIGA@

LED3/EEDO
LED1/EESK

LED0

EECS

EEDI

MDIP0
MDIN0
MDIP1

MDIN1
NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3

DVDD10
DVDD10
DVDD10

DVDD33
DVDD33

AVDD33
AVDD33
AVDD33
AVDD33

EVDD10
AVDD10

AVDD10
AVDD10
AVDD10

REGOUT

31
37
40

30
32

1
2
4
5
7
8
10
11

13
29
41

27
39

12
42
47
48

21
3

6
9
45

36

@

R1506 10K_0402_5%
R1507 10K_0402_5%

@

MDI0+
MDI0­MDI1+
MDI1­MDI2+
MDI2­MDI3+
MDI3-

+LAN_VDD10

+3V_LAN

+3V_LAN

+LAN_EVDD10
+LAN_VDD10

+LAN_REGOUT

12
12

MDI0+ <38>
MDI0- <38>
MDI1+ <38>
MDI1- <38>
MDI2+ <38>
MDI2- <38>
MDI3+ <38>
MDI3- <38>

3

+3VALW

W=60mils

+LAN_REGOUT

These components close to U47 : Pin 36

( Should be place within 200 mils )

+LAN_VDD10

L74

1 2

2.2UH_NLC252018T-2R2J-N_5%

R02

L75

12

@

0_0603_5%

1U_0402_6.3V4Z

+3V_LAN

J15

2

112

JUMP_43X79

@

C1184

4.7U_0603_6.3V6K

12

C1187

+LAN_EVDD10

+3V_LAN Rising time (10%~90%)󴣊>1mS and <100mS

C1195

+LAN_VDDREG+3V_LAN

12

ENSWREGISOLATEB

1K_0402_5%

15K_0402_5%

R1514

R1516

+3VS

12

R02

L76

12

@

0_0603_5%

4.7U_0603_6.3V6K

12

0.1U_0402_16V7K

1 2

0.1U_0402_16V7K

1 2

+LAN_VDD10

W=60mils

C1182

0.1U_0402_16V7K

1 2

C1188

C1196

+3V_LAN

1 2

2

R1515
0_0402_5%

@

1

+3V_LAN

1.5A

1 2

C11890.1U_0402_16V7K

1 2

C11900.1U_0402_16V7K

1 2

C11910.1U_0402_16V7K

1 2

C11920.1U_0402_16V7KGIGA@

1 2

C11930.1U_0402_16V7KGIGA@

1 2

C11940.1U_0402_16V7KGIGA@

These caps close to U47 : Pin 12,27,39,42,47,48

+LAN_VDD10

1 2

C11970.1U_0402_16V7K

1 2

C11980.1U_0402_16V7K

1 2

C11990.1U_0402_16V7K

1 2

C12000.1U_0402_16V7KGIGA@

1 2

C12010.1U_0402_16V7KGIGA@

1 2

C12020.1U_0402_16V7KGIGA@

1 2

C12030.1U_0402_16V7KGIGA@

These caps close to U47 : Pin 3,6,9,13,29,41,45

LAN_XTALI

Y4

4

NC

OSC

1

OSC

25MHZ_10PF_7V25000014
C1204
12P_0402_50V8J

NOGCLK@

A A

5

1

2

NC

NOGCLK@

4

LAN_XTALO

3
2

R03R03

1

C1205
12P_0402_50V8J

NOGCLK@

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LAN-RTL8111F/8105E

LAN-RTL8111F/8105E

LAN-RTL8111F/8105E

LA-9603P

LA-9603P

Wednesday, January 09, 2013

Wednesday, January 09, 2013

Wednesday, January 09, 2013

LA-9603P

1

37 62

37 62

37 62

1.0

1.0

1.0

5

4

3

2

1

Reserve gas tube for EMI go rural solution

T71

MDI0+
MDI0-

MDI1+
MDI1-

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+
RD-8RX-

MHPC_NS681610H

GIGA@

T72

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+
RD-8RX-

MHPC_NS681610H

MDI3+<37>

D D

MDI2+ MDI3+

MDI3- MDI2-

@

D34

AZC099-04S.R7G_SOT23-6

1

I/O1

2

GND

3

I/O2

I/O3

VDD

I/O4

4

5

6

+3V_LAN

MDI3-<37>

MDI2+<37>
MDI2-<37>

Place Close to T71

@

D35

C C

MDI1+ MDI0+

MDI0- MDI1-

AZC099-04S.R7G_SOT23-6

1

I/O1

2

GND

3

I/O2

I/O3

VDD

I/O4

4

5

6

+3V_LAN

1

C1207

2

0.01U_0402_16V7K

MDI3+
MDI3-

MDI2+
MDI2-

MDI0+<37>
MDI0-<37>

MDI1+<37>
MDI1-<37>

Place Close to T72

JRJ45

ME@

D34/D35

1

1'S PN:SC300001G00

B B

2'S PN:SC300002E00

MDO0+

MDO0­MDO1+
MDO2+

MDO2-

MDO1­MDO3+

MDO3-

PR1+

2

PR1-

3

PR2+

4

PR3+

5

PR3-

6

PR2-

7

PR4+

8

PR4-

SANTA_130460-3

DC231112261

TX+

RX+

TX+

RX+

16

MDO3+

15

MDO3-

TX-

14

MCT3

CT

13

NC

12

NC

11

MCT2

CT

10

MDO2+

9

MDO2-

DL3

DL2

@

12

GT1812-420CSMD_1812-2

12

GT1812-420CSMD_1812-2

@

CHASSIS1_GND

CHASSIS1_GND

Place Close to T1,T2

16

MDO0+

15
14
13
12
11
10
9

12
11
10
9

MDO0-

MCT0

MCT1

MDO1+

MDO1-

CHASSIS1_GND

MCT3
MCT2

MCT0
MCT1

CHASSIS1_GND

TX-

CT
NC
NC
CT

GND
GND
GND
GND

@

DL5

12

DL4

12

@

1 2

R60 75_0603_5%GIGA@

1 2

R289 75_0603_5%GIGA@

1 2

R305 75_0603_5%

1 2

R306 75_0603_5%

DL6

Gastube@

BS4200N-C-LV_SMB-F2

R03

1 2

C1325 .1U_0603_25V7K

1 2

C1326 .1U_0603_25V7K

1 2

C1327 .1U_0603_25V7K

GT1812-420CSMD_1812-2

GT1812-420CSMD_1812-2

R03

12

12

R307
0_0603_5%

1

C906
10P_0603_50V8-J

2

CHASSIS1_GND

CHASSIS1_GND

CHASSIS1_GND

R03

CHASSIS1_GND

A A

Security Classification

Security Classification

Security Classification

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Reserve for EMI go rural solution

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

LAN_Transformer

LAN_Transformer

LAN_Transformer

LA-9603P

LA-9603P

LA-9603P

38 62Wednesday, January 09, 2013

38 62Wednesday, January 09, 2013

38 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

5

4

3

2

1

SMSC thermal sensor
placed near by VRAM

D D

C C

Close U27

C587

2200P_0402_50V7K

C588

2200P_0402_50V7K

@

1

2

1

2

REMOTE1+

REMOTE1-

REMOTE2+

REMOTE2-

C590

0.1U_0402_16V7K

+3VS

U27

1

VDD

REMOTE1+

2

REMOTE1­REMOTE2+

1

REMOTE2-

2

DP1

3

DN1

4

DP2

5

DN2

EMC1403-2-AIZL-TR_MSOP10

SMCLK

SMDATA

ALERT#

THERM#

GND

Address 1001_101xb

+3VS

12

R540
10K_0402_5%

@

10
9
8
7
6

EC_SMB_CK2
EC_SMB_DA2

EC_SMB_CK2 <15,23,42>
EC_SMB_DA2 <15,23,42>

REMOTE1+

C586

@

100P_0402_50V8J

REMOTE1-

REMOTE2+

C589

@

100P_0402_50V8J

REMOTE2-

REMOTE1,2+/-:
Trace width/space:10/10 mil
Trace length:<8"

Close to DDR

1

C

2

B

2

E

3 1

1

C

2

B

2

E

3 1

Q97
MMST3904-7-F_SOT323-3

Under WWAN

Q98
MMST3904-7-F_SOT323-3

R02

new new

H20
HOLEA

1

H_3P3

H21
HOLEA

1

H_4P6

new

H19

H14

HOLEA

HOLEA

1

1

H_2P8

H_2P8

2

M/B

L

H15
HOLEA

1

H_3P0X4P0N

new

H22
HOLEA

1

H_3P3

󲦫󱙜󱪝

FD1

1

FD2

1

new

H23
HOLEA

1

H_3P0X4P0N

FD3

1

M/B

H17
HOLEA

1

H_3P0N

FD4

1

󱙜󱪝

E

Compal Electronics,Ltd.

Compal Electronics,Ltd.

Compal Electronics,Ltd.

Title

Title

Title

Fintek-Thermal IC/FAN/screw

Fintek-Thermal IC/FAN/screw

Fintek-Thermal IC/FAN/screw

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

LA-9603P

LA-9603P

LA-9603P

39 62Wednesday, January 09, 2013

39 62Wednesday, January 09, 2013

39 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

H1
HOLEA

1

H_3P8

H2
HOLEA

1

H_3P8

H3
HOLEA

1

H_3P8

VGA_L VGA_RCPU

H4
HOLEA

1

H_3P3

H5
HOLEA

1

H_3P3

R02

new

H18
HOLEA

1

H_3P9N

CHASSIS1_GND CHASSIS1_GND

BA

B B

+5VS

R02

R581

12

@

0_0603_5%

2

C591
10U_0603_6.3V6M

1

10U

A A

5

EC_TACH<42>

EC_FAN_PWM<42>

FAN1 Conn

JFAN1

1

1

2

2

3

3

4

4

5

G5

6

G6

ACES_85205-04001

ME@

4

H6
HOLEA

1

H_2P8

R02

H7
HOLEA

1

H_3P0

H8
HOLEA

1

H_2P3

H9
HOLEA

1

H_2P8

H10
HOLEA

1

H_2P8

H11
HOLEA

1

H_2P8

H12
HOLEA

1

H_2P8

H13
HOLEA

1

H_2P3

D

2P8 * 7 pcd

Security Classification

Security Classification

Security Classification

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

A

1 1

PCH_BT_ON#<19,36>

B

BT MODULE CONN

C709

R632
100K_0402_5%

1 2

BT@

BT@

0.1U_0402_16V7K

1 2

+3VS

S

USB20_P2<18>
USB20_N2<18>

BT_ACTIVE<36>

R02

R583

D

13

0_0603_5%

G

Q104

2

PMV65XP_SOT23-3~D

BT@

USB20_P2
USB20_N2

BT_ACTIVE

C

12

@

BTON_LED:NC

+3VS_BT

30mils

JBT1

1

1

2

2

3

3

4

4

5

5

G1

6

6

G2

ACES_87213-0600G

ME@

D

SATA_DTX_C_IRX_N1<14>
SATA_DTX_C_IRX_P1<14>

+5V_HDD

7
8

1

C598
1000P_0402_50V7K

2

E

1

2

SATA_DTX_C_IRX_P1

C599

0.1U_0402_16V7K

F

SATA_ITX_DRX_P1<14>
SATA_ITX_DRX_N1<14>

1 2

C596 0.01U_0402_16V7K

1 2

C597 0.01U_0402_16V7K

R550 0_0805_5%

+5VS

1

C602
10U_0603_6.3V6M

2

G

SATA_ITX_DRX_P1
SATA_ITX_DRX_N1

SATA_DTX_IRX_N1SATA_DTX_C_IRX_N1
SATA_DTX_IRX_P1

+3VS

+5V_HDD

H

SATA HDD Conn.

JHDD1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

DAS/DSS

19

GND

20

V12

21

V12

GND

V1222GND

SUYIN_127043HR022M25KZR

ME@
DC010007P00

24
23

ODD Power Control

J9

@

2

112

+5VS

+5VALW

12

2 2

10K_0402_5%

ODD_EN<19>

3 3

R568

12

@

2

1

IN

3

R552

@

10K_0402_5%

R675
100K_0402_5%

1 2

OUT

GND

Q100

@

DTC124EKAT146_SC59-3

JUMP_43X79

D

S

13

Q99

@

G

PMV65XP_SOT23-3~D

2

@

1

C607

@

0.01U_0402_16V7K

2

+5V_ODD

1

C608
10U_0603_6.3V6M

2

1

C604

0.1U_0402_16V7K

2

SATA_ITX_C_DRX_P2<14>
SATA_ITX_C_DRX_N2<14>

SATA_DTX_C_IRX_N2<14>

SATA_DTX_C_IRX_P2<14>

SATA_ITX_C_DRX_P2
SATA_ITX_C_DRX_N2

SATA_DTX_C_IRX_N2
SATA_DTX_C_IRX_P2 SATA_DTX_IRX_P2_15

1 2

C605 0.01U_0402_16V7K15@

1 2

C606 0.01U_0402_16V7K15@

1 2

C618 0.01U_0402_16V7K15@

1 2

C617 0.01U_0402_16V7K15@

ODD_DA#<18>

+3VS

R710 0_0402_5%@

ODD_DA#

1 2

10K_0402_5%

R555

1 2

R02

SATA_ITX_DRX_P2_15
SATA_ITX_DRX_N2_15

SATA_DTX_IRX_N2_15

R554 0_0402_5%

1 2

@

LED_KB_PWM_R<42,43>

FOR 15"

SATA ODD FFC Conn.

ODD_DETECT#

+5V_ODD
R_ODD_DA#

SATA_ITX_DRX_P2_15
SATA_ITX_DRX_N2_15

SATA_DTX_IRX_N2_15
SATA_DTX_IRX_P2_15

ODD_DETECT#
+5V_ODD

R_ODD_DA#

+5VS

+5VALW

JODD2

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND

12

GND

ACES_51524-01001-003

ME@

JODD3

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

GND

18

GND

ACES_51524-0160N-001

ME@

Co-lay

FOR 14"

SATA ODD Conn.

JODD1

ME@

1

GND

1 2

C616 0.01U_0402_16V7K14@

SATA_ITX_C_DRX_N2
SATA_DTX_C_IRX_N2

SATA_DTX_C_IRX_P2 SATA_DTX_IRX_P2_14

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

D

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

E

1 2

C615 0.01U_0402_16V7K14@

1 2

C614 0.01U_0402_16V7K14@

1 2

C613 0.01U_0402_16V7K14@

F

SATA_ITX_DRX_P2_14SATA_ITX_C_DRX_P2
SATA_ITX_DRX_N2_14

SATA_DTX_IRX_N2_14

ODD_DETECT#
+5V_ODD

R_ODD_DA#

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

HDD/ODD/BT Connector

HDD/ODD/BT Connector

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

HDD/ODD/BT Connector

Custom

Custom

Custom

G

2
3
4
5
6
7

8

9
10
11
12
13

LA-9603P

LA-9603P

LA-9603P

RX+
RX­GND
TX­TX+
GND

DP
+5V
+5V
MD
GND
GND

SUYIN_127382FB013M266ZR

14

GND1

15

GND2

40 62Wednesday, January 09, 2013

40 62Wednesday, January 09, 2013

40 62Wednesday, January 09, 2013

H

1.0

1.0

1.0

5

600ohms @100MHz 2A

D D

Power down (PD#) power stage for save power
0V: Power down power stage

3.3V: Power up power stage

+3VS

R1535

4.7K_0402_5%

@

HDA_RST_AUDIO#<14>

C C

B B

1 2

HDA_SDOUT_AUDIO<14>
HDA_BITCLK_AUDIO<14>

HDA_SYNC_AUDIO<14>

MIC Sense
R939 place near pin13

Capless HP Sense
R940 place near pin34

P/N: SM01000EE00

+5VS

EC_MUTE#<42>

HDA_SDIN0<14>

+MIC1_VREFO_L

600ohms @100MHz 1A
P/N: SM01000BU00

FBMA-L11160808601LMA10T_2P

R02

R1531 0_0805_5%

1 2

EC_MUTE#

HDA_SDOUT_AUDIO

HDA_BITCLK_AUDIO

HDA_SDIN0 SDATA_IN

HDA_RST_AUDIO#

PC_BEEP

+5VS_PVDD

C1234

1 2

@

R1533 0_0402_5%

1 2

@

R1538 0_0402_5%

12

R1536 22_0402_5%

12

R154120K_0402_1%

12

C1239 2.2U_0402_6.3V6M

12

C1240 2.2U_0402_6.3V6M

12

C1241 4.7U_0603_6.3V6K

2

1

wide 25MIL

SPK L+L-R+R- trace width
Speaker 4 ohm ==>40 mils

R02

SPK_L2+
SPK_L1­SPK_R1­SPK_R2+

A A

1 2

R1556 0_0603_5%@
R1554 0_0603_5%@

1 2
1 2

R1555 0_0603_5%@
R1553 0_0603_5%@

1 2

5

Speaker 8 ohm ==>20 mils

SPK_L2+_CONN
SPK_L1-_CONN
SPK_R1-_CONN
SPK_R2+_CONN

2

3

PACDN042Y3R_SOT23-3

1

1

C1248

2

SPK_R2+_CONN
SPK_R1-_CONN

@

D38

1

1

C1250

220P_0402_50V7K

C1251

2

220P_0402_50V7K

SPK_L1-_CONN
SPK_L2+_CONN

2

3

@

D39

PACDN042Y3R_SOT23-3

1

1

2

C1249

2

220P_0402_50V7K

Reserve for ESD request.

220P_0402_50V7K

4

+5VDDA_CODEC+5VS

L77

1 2

1

1

C1231

2

2

C1230

0.1U_0402_16V7K

4.7U_0603_6.3V6K

Place near Pin25

C1235

4.7U_0603_6.3V6K

1

2

MIC_JD_RMIC_JD
EC_MUTE#_R

JDREF

SENSEA
SENSEB

CBN
CBP

1

C1236

2

0.1U_0402_16V7K

+5VS_PVDD

0.1U_0402_16V7K
U50

47

DAPD/COMB_JACK

4

PD#

5

SDATA-OUT

6

BIT-CLK

8

SDATA-IN

10

SYNC

11

RESET#

12

PCBEEP

19

JDREF

20

MONO-OUT(PORT-H)

13

Sense A

18

Sense-B

35

CBN

36

CBP

34

CPVEE

28

LDO-CAP

29

MIC2-VREFO

30

MIC1-VREFO-R

31

MIC1-VREFO-L

42

PVSS1

43

PVSS2

7

DVSS

ALC259Q-VC2-GR_QFN48_6X6

25

39

PVDD1

38

46

PVDD2

1

AVDD1

AVDD2

DVDD1

LINE1-R(PORT-C-R)

LINE1-L(PORT-C-L)
MIC1-R(PORT-B-R)

MIC1-L(PORT-B-L)

MIC2-R(PORT-F-R)

MIC2-L(PORT-F-L)
LINE2-R(PORT-E-R)
LINE2-L(PORT-E-L)

HPOUT-R(PORT-A-R)

HPOUT-L(PORT-A-L)

GPIO1/DMIC-CLK

GPIO0/DMIC-DATA

Pin Assignment Location Function

SPK-OUT (Pin40/41/44/45)

Capless HP-OUT (Pin32/33)

Internal

External

MIC1(Pin21/22) External Mic in

JSPK1

1

1

2

2

3

3

4

4

5

GND1

6

GND2

ACES_88231-04001

ME@

4

Combo Jack detect (normal open)

R1123,C1134
Close to U50.47

R1123 47K_0402_5%

2

1

C1134

4.7U_0603_6.3V6K

1 2

3

+5VDDA_CODEC

2

1

C1232

1

2

C1233

0.1U_0402_16V7K

4.7U_0603_6.3V6K

Place near Pin38

+3VDD_CODEC

+IOVDD_CODEC

9

DVDD-IO

SPK-OUT-L+

SPK-OUT-L-

SPK-OUT-R-

SPK-OUT-R+

SPDIF-OUT

AVSS1
AVSS2

Thermal PAD

24
23
22

MIC_EXTR_C EXT_MIC

21

MIC_EXTL_C

17
16
15
14

40
41
44
45

33

HPOUT_R

32

HPOUT_L

48

3

DMIC_CLK_R

2

DMIC_DATA_R

27

VREF

26
37
49

Vendor recommend. 2.2u

1 2

C1237 2.2U_0402_6.3V6M

1 2

C1238 2.2U_0402_6.3V6M

R20

R937 0_0402_5%@
R1548 0_0402_5%@

Int Speaker

Headphone out

R1559 and C1135
R5582
Close to U73.1

R02 R02

EXT_MIC

R1559

1 2

0_0402_5%

woofer@

woofer@

EXT_MIC_RCMIC_JD

2

1

C1135

4.7U_0603_6.3V6K

3

R20

R1529 0_0805_5%

1 2

@

Place near Pin1

SPK_L2+
SPK_L1­SPK_R1­SPK_R2+

12

R154475_0402_5%

12

R154575_0402_5%

12
12

12

C1242

1

12

C1226

C1227

2

1U_0402_6.3V6K

0.1U_0402_16V7K

Vendor recommend. 2.2K

2.2K_0402_5%

12

R1534 1K_0402_5%

22K_0402_5%

Reference Schematic 22Kohm

Internal Speaker

HP_OUTR <43>

HP_OUTL <43>

DMIC_CLK <33>
DMIC_DATA <33>

Place close to pin 27

1

C1243

2

1U_0402_6.3V6K

0.1U_0402_16V7K

R1549

1 2

0_0402_5%

R1550

1 2

0_0402_5%

R1551

1 2

@

0_0402_5%

PC Beep

EC Beep

PCH Beep

HDA_SPKR<14>

2

external MIC

Placement near Audio Codec

R5567

SENSEB

woofer@

39.2K_0402_1%

woofer@

2N7002K_SOT23-3
R4946

SENSEA

39.2K_0402_1%

2N7002K_SOT23-3

12

SENSEA_R

12

R02

Q11

R02

Q12

Head Phone Woofer

13

D

2

Woofer_JD

G

S

13

D

2

G

S

+MIC1_VREFO_L

R1537

R5571

Headphone

1 2

1 2

12

+3VDD_CODEC+3VS +3VDD_CODEC +IOVDD_CODEC

R1530

SUPPRE_ KC FBMA-10-100505-101T 0402

EXT_MIC <43>

EMI

1 2

HDA_BITCLK_AUDIO

R1552 27_0402_5%

1

C1247
33P_0402_50V8J

@

2

GNDAGND

BEEP#<42>

1 2

C1252 0.1U_0402_16V7K

1 2

PC_BEEP1 PC_BEEP

C1253 0.1U_0402_16V7K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

R1557

1 2

33_0402_5%

2012/12/26 2012/12/31

2012/12/26 2012/12/31

2012/12/26 2012/12/31

2

C1254

1 2

0.1U_0402_16V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PLUG_IN <43>

1

200K_0402_5%

woofer@

300K_0402_5%

woofer@

R4947

R4950

U73 woofer@

1

EXT_MIC_RC

IN+

5

VCC+

2

1 2

GND

4

OUT

3

IN-

12

LMV331IDCKRG4_SC70-5

Compal Electronics,Ltd.

Compal Electronics,Ltd.

Compal Electronics,Ltd.

Title

Title

Title

HD Audio Codec_ALC259Q-VC

HD Audio Codec_ALC259Q-VC

HD Audio Codec_ALC259Q-VC

Size Document Nu mber Rev

Size Document Nu mber Rev

Size Document Nu mber Rev

Custom

Custom

Custom
Date: Sheet

Date: Sheet

Date: Sheet

1

LA-9603P

LA-9603P

LA-9603P

+5VS_PVDD

12

R4948
100K_0402_5%

woofer@

Woofer_JD

1.0

1.0

1.0

of

of

of

41 62Wednesday, January 09, 2013

41 62Wednesday, January 09, 2013

41 62Wednesday, January 09, 2013

L44

FBMA-L11-160808-601LMT_2P

1 2

R590 47K_0402_5%

KSO[0..17]<43>

KSI[0..7]<43>

+3VS

1 2

R605 10K_0402_5%

1 2

R120
10M_0402_5%

1 2

C656

0.1U_0402_16V7K

1 2

L45

FBMA-L11-160808-601LMT_2P

12

C660 22P_0402_50V8J@

R03

0.1U_0402_16V7K

R602

2.2K_0402_5%

@

1

2

check

C661

KSO[0..17]
KSI[0..7]

EC_SMB_CK2
EC_SMB_DA2

EC_TACH

PCH_PWROK<16>

Y5

OSC4OSC

@

NC3NC

32.768KHZ_12.5PF_9H03200413

R612 0_0402_5%

2

1

+3VALW

1

2

ECAGND

R589 10_0402_5%@

@

R600

1 2

R604

1 2

For DS3

GC6_FB_REQ<23>

12

R608 10K_0402_5%@

EC_RTCX1
SUSCLK_R

1

C659
1000P_0402_50V7K

2

12

12

2.2K_0402_5%

2.2K_0402_5%

SUSCLK<16>

+3VALW +EC_VCCA

KBC_HANGUP_RESET#

+3VALW

+3VS

R601

2.2K_0402_5%

PWRSHARE_EN_R<45>

R02

EC_SMB_CK1

EC_SMB_DA1

DRAMRST_CNTRL_EC<7>

C653

0.1U_0402_16V7K

LPC_FRAME#<14,36>

CLK_PCI_EC<18>

PLT_RST#<18,23,36,37>

EC_SCI#<19>

EC_SMB_CK1<48,49>
EC_SMB_DA1<48,49>
EC_SMB_CK2<15,23,39>
EC_SMB_DA2<15,23,39>

PM_SLP_S3#<16>
PM_SLP_S5#<16>
EC_SMI#<19>
CMOS_ON#<33>

SLP_SUS#<16,46>

EC_INVT_PWM<33>

EC_TACH<39>

EC_TX<36>
EC_RX<36>

EC_FAN_PWM<39>

NUM_LED#<43>

R611 0_0402_5%

@

1

2

GATEA20<19>
KBRST#<19>

SERIRQ<14>

LPC_AD3<14,36>
LPC_AD2<14,36>
LPC_AD1<14,36>
LPC_AD0<14,36>

12

C654

0.1U_0402_16V7K

100K_0402_5%

+3VLP

1

+3VALW

C662

0.1U_0402_16V7K

C655

0.1U_0402_16V7K

1

1

2

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

EC_SMI#

EC_INVT_PWM
EC_TACH
EC_PME#
EC_TX
EC_RX
PCH_PWROK
EC_FAN_PWM

SUSCLK_R SUSCLK_R

R740

1

2

2

LPC_AD3
LPC_AD2
LPC_AD1 BATT_TEMP
LPC_AD0

EC_RST#
EC_SCI#

EC_RTCX1

12

12

C93
20P_0402_50V8

10
12

13
37
20
38

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

77
78
79
80

14
15
16
17
18
19
25
28
29
30
31
32
34
36

122
123

C658

1000P_0402_50V7K

C657

1000P_0402_50V7K

1

2

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

LPC & MISC

LPC_AD0
CLK_PCI_EC

PCIRST#/GPIO05
EC_RST#
EC_SCII#/GPIO0E
GPIO1D

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25
KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

EC_SMB_CK1/GPIO44
EC_SMB_DA1/GPIO45
EC_SMB_CK2/GPIO46
EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
GPIO0A
GPIO0B
GPIO0C
GPIO0D
EC_INVT_PWM/GPIO11
FAN_SPEED1/GPIO14
EC_PME#/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PCH_PWROK/GPIO18
SUSP_LED#/GPIO19
NUM_LED#/GPIO1A

XCLKI/GPIO5D
XCLKO/GPIO5E

1

2

Int. K/B
Matrix

SM Bus

C535
100P_0402_50V8J

2

+3VALW

+EC_VCCA

9

22

33

96

125

111

EC_VDD0

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

PWM Output

AD Input

DA Output

PS2 Interface

CPU1.5V_S3_GATE/GPXIOA00

SPI Device Interface

SPI Flash ROM

GPIO

H_PROCHOT#_EC/GPXIOA06

GPO

GPIO

GPI

GND/GND

GND/GND

GND/GND

GND/GND

GND0

11

24

35

94

113

67

GPIO0F

BEEP#/GPIO10

EC_VDD/AVCC

BATT_CHG_LED#/GPIO52

BATT_LOW_LED#/GPIO55

EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04
PROCHOT_IN/GPXIOA05

VCOUT0_PH/GPXIOA07
PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

PECI_KB9012/GPXIOD07

AGND/AGND

69

ECAGND

GPIO12

ACOFF/GPIO13

BATT_TEMP/GPIO38

GPIO39

ADP_I/GPIO3A

GPIO3B

GPIO42

IMON/GPIO43

DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01

HDA_SDO/GPXIOA02

VCIN0_PH/GPXIOD00

SPIDI/GPIO5B

SPIDO/GPIO5C

SPICLK/GPIO58

SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

SYSON/GPIO56

VR_ON/GPIO57

PM_SLP_S4#/GPIO59

BKOFF#/GPXIOA08

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

GPXIOD06

V18R

KB9012QF-A3_LQFP128_14X14

ECAGND

EC_WAKE#

AOAC_ON#

U31

PN : SA00004OB20 S IC KB9012QF A3 LQFP 128P KB CONTROLLER

3.3V +/- 5%

Vcc

100K +/- 5%

R694

GC6@

0_0402_5%

R613

R614

21

LED_KB_PWM

23

BEEP#

26

NOVO#

27

ACOFF

63
64

VGA_IMVP_IMON

65
66

EC_TS_ON#

75

BRDID BRDID

76

68

EC_WL_WAKE#

70

WLAN_USB_ON#_R

71
72

83
84

USB_ON#

85
86
87

TP_CLK

88

TP_DATA

97

CPU1.5V_S3_GATE

98

VGA_AC_DET

99
109

NTC_V_R

119

PCH_PWR_EN

120

GPU_PWR_EN

126

AOAC_ON#

128

73
74
89

DGPU_PWR_EN

90

BATT_CHG_LED#

91

CAPS_LED#

92
93

BATT_LOW_LED#

95

SYSON

121
127

100
101

EC_LID_OUT#

102

Turbo_V

103

H_PROCHOT#_EC

104

MAINPWON_R

105

BKOFF#

106

PBTN_OUT#

107
108

110

ACIN

112

EC_ON

114
115

LID_SW#

116

SUSP#

117

PCH_HOT#_R

118

PECI_KB9012

124

+V18R

1

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

0_0402_5%

12

GC6@

R1443 0_0402_5%

@

BEEP# <41>
NOVO# <43>
ACOFF <49>

R758 0_0402_5%@

ADP_I <48,49>
EC_TS_ON# <43>

IMVP_IMON <55>

EC_MUTE#

EC_WAKE#

R750 0_0402_5%@

CAPS_LED# <43>
PWR_LED# <43>

BATT_LOW_LED# <43>

EC_LID_OUT# <19>

R793 0_0402_5%@

R20

R669 43_0402_1%

1 2

C694

4.7U_0603_6.3V6K

GC6_1.5V_EN# <46>

GC6_FB_CLAMP <23,27,46>

12

LED_KB_PWM_R <40,43>

12

R02

EC_WL_WAKE# <36,44>

DPWROK_EC <16>
SUSWARN# <16>

R593 10K_0402_5%

1 2

EC_MUTE# <41>
USB_ON# <43,45>

CHG_ON# <45>
TP_CLK <43>

TP_DATA <43>

12

SYSON <46,51>
VR_ON <55>

PM_SLP_S4# <16>

EC_RSMRST# <16>

R02

1 2

R757 0_0402_5%@

R02

R738 0_0402_5%@

BKOFF# <33>

PBTN_OUT# <16>

PCH_APWROK <16>
SA_PGOOD <52>

12

1 2

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Board ID

0
1
2
3

5

BATT_TEMP <48>

GPU_IMON

WLAN_USB_ON#_R PCH_PWR_EN2

+3VALW

CPU1.5V_S3_GATE <46>

VGA_AC_DET <23>

ME_FLASH <14>

NTC_V <48>

PCH_PWR_EN <46,48>
GPU_PWR_EN <46,54>

AOAC_ON# <36>

SUSACK# <16>

ENBKL <33>

EC_PWRSHARE_EN# <45>

DGPU_PWR_EN <18,23,25>

BATT_CHG_LED# <43>

+3VLP

12

ACIN <16,49>
EC_ON <50>
ON/OFF <43>
LID_SW# <43>

SUSP# <46,51,53>
OVERT# <23>

H_PECI <6>

EMC Request

SYSON

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%

R03

R5586 0_0402_5%

@

R594

1 2

USB_ON#

10K_0402_5%

PCH_PWR_EN

For DS3

R02

@

KB9012A2 work around

R4945
47K_0402_5%

Turbo_V <48>

PROCHOT <48>
MAINPWON <48,50>

C492

1

2

0.1U_0402_16V7K

12

+5VALW

EC_PME#

VR695

AD_BID

min

0 V

V

AD_BID

typ

V

AD_BID

0 V0 V

0.289 V0.250 V0.216 V

0.436 V

0.712 V

0.503 V

0.819 V

0.538 V

0.875 V

1.453 V 1.650V 1.759 V PVT LA-9063P TS_15

R695

15@

100K_0402_5%

SD028100380

PCH_PWR_EN2 <46>

R603 4.7K_0402_5%

TP_CLK

R598 4.7K_0402_5%

TP_DATA

BATT_TEMP
ACIN

R737

1 2

@

0_0402_5%

13

D

2

G

Q37

2N7002K_SOT23-3

1 2

1 3

D

@

G

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

S

S

+3VALW

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

BIOS & EC I/O Port

BIOS & EC I/O Port

BIOS & EC I/O Port

VR_HOT#<55>

12

R5537
100K_0402_5%

+3VALW

2N7002K_SOT23-3

VR_HOT#

H_PROCHOT#_EC

R606

10K_0402_5%

1 2

R02

R609 0_0402_5%@

Q102

max

MP
PVT
DVT
EVT
PVT4 1.185 V 1.264 V1.036 V

+3VALW

R01

1 2
1 2

1 2

C663 100P_0402_50V8J

1 2

C664 100P_0402_50V8J

1

C493
47P_0402_50V8J

2

LAN_WAKE# <37>

PCI_PME# <18>

LA-9603P

LA-9603P

LA-9603P

PCB

LA-9061P
LA-9061P
LA-9061P
LA-9061P
LA-9063P

R694
100K_0402_1%

1 2

R695
56K_0402_1%

14@

1 2

+3VS

H_PROCHOT# <6,48>

42 62Wednesday, January 09, 2013

42 62Wednesday, January 09, 2013

42 62Wednesday, January 09, 2013

1.0

1.0

1.0

ON/OFF switch K/B Connector

<12,13,15,36>

<12,13,15,36>

NOVO#

NOVO#<42>

ON/OFF<42>

ON/OFF

ON/OFFBTN#

J11

1 2

SHORT PADS

J13

1 2

SHORT PADS

R02

R725 0_0402_ 5%@

1 2

R02

+3VALW

R720 0_0402_ 5%@

1 2

R642
100K_0402_5%

1 2

D26

2
3

DAN202UT106_SC70-3

+3VLP

1

NOVO_BTN#

R701
100K_0402_5%

1 2

ON/OFF

KSI[0..7]
KSO[0..17]

KSI[0..7] <42>
KSO[0..17] <42>

R207

300_0402_5%

15"

JKB1

ME@

30

30

29

29

28

28

27

27

26

26

25

25

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

TYCO_3-2041084-0

32

GND

31

GND

R5563 0_0402_5%15@

1 2

KSO16

R5564 0_0402_5%14@

1 2

KB_LED_PWR

R5565 0_0402_5%15@

1 2

KSO17

R5566 0_0402_5%14@

1 2

CAPS_LED#

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8

R96
300_0402_5%

1 2

KSO6

KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
KB1
KB2

KB_LED_PWR
CAPS_LED#

+3VS

1 2

CAPS_LED#<42>

NUM_LED#<4 2>

KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3

KB1
KB2

14"

JKB2

ME@

GND1
GND2

26

26

25

25

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

ACES_88514-02601-07 1

28
27

TP/B Connector

+3VS

C760

0.1U_0402_16V7K

SMB_CLK_S3
SMB_DATA_S3

LED (For 14")

PWR_LED#<42>

BATT_LOW_LED#<42>

BATT_CHG_LED#<42>

JTP1

ME@

1

1

+5VALW

+3VALW

+5VALW

2

2

3

3

4

4

5

5

6

6

7

GND

8

GND

ACES_88514-00601-07 1

R723

1 2

R724

1 2

PWR_LED#

BATT_LOW_LED#

BATT_CHG_LED#

TP_CLK
TP_DATA

@
@

0_0402_5%

SMB_CLK_S3_R
SMB_DATA_S3_R

0_0402_5%

SMB_CLK_S3_R
SMB_DATA_S3_R

R10

14@

LED1

R623

21

560_0402_5%
19-213A-T1D-CP2Q2HY-3T_WHITE
LED2

HT-191UD5_AMBER
LED5

19-213A-T1D-CP2Q2HY-3T_WHITE

14@

14@

R764

21

470_0402_5%

14@

R10

14@

R765

21

130_0402_5%

14@

12

12

12

TP_CLK<42>
TP_DATA<4 2>

PWR/B Connector

LED (For 15")

+5VALW
+3VALW

PWR_LED#
BATT_LOW_LED#
BATT_CHG_LED#

+3VALW

NOVO_BTN#
ON/OFFBTN#

PWR_LED#
LID_SW#

JLED1 ME@

1

1

2

2

3

3

4

4

5

5

6

6

7

GND

8

GND

ACES_88514-00601-07 1

+5VALW

1
2
3
4
5
6
7
8
9

10

LID_SW# <42>

JPWRB1 ME@

1
2
3
4
5
6
7
8
GND
GND

ACES_51524-00801-00 1

USB I/O Connector

R03 R03

3

USB20_N8

2

USB20_P8

3

USB20_N9

2

USB20_P9

3

2

WCM-2012-900T_4P

3

2

WCM-2012-900T_4P

4

L78

USB20_N8_R

4

1

USB20_P8_R

1

L79

4

USB20_N9_R

4

1

USB20_P9_R

1

Right Side USB2.0 Port X 2 (USB/B)

C768 0.1U_0402_16V7K

12

USB_ON#<42,45>

EXT_MIC<41>
HP_OUTR<41>
HP_OUTL<41>

PLUG_IN<41>

USB_ON# USB_OC4#

EC RESEST function KB Lighting CONN.4pin

+5VALW

2

IN

Deciphered Date

Deciphered Date

Deciphered Date

ACES_88514-0401

ME@

6

GND

5

GND

4

4

3

3

2

2

1

1

JKBL1

12

R5548
10K_0402_5%

KBL@

R5549

1 2

100K_0402_5%

1

OUT

GND

Q154

DTC124EKAT146_SC59-3

3

KBL@

Touch Screen

R02

EC_TS_ON#

C554 0 .1U_0402_16V7K

1 2

RESET@

R20

R5579 0_0402_5%@

1 2

ON/OFFBTN#

U74 RESET@

MRDLY1VCC

2

GND

3

CD

S IC G601A31U ADFN 6P RESET

SA00005VZ00 S IC G601A31U ADFN 6P RESET

R5581

TS_14@

C1331

10K_0402_5%

1 2

TS_14@

0.1U_0402_16V7K

1 2

+3VS_TS_R +3VS_TS

D

S

13

G

Q156

2

PMV65XP_SOT23-3~D

TS_14@

2

TS@

1

0.1U_0402_16V7K

RESET

C1322

R03

R20

R4961 0_0402_5%@

1 2

R4960 0_0402_5%@

1 2

R4958 0_0402_5%@

6
5
4

MR

R03

1

C1311

0.1U_0402_16V7K

2

1 2

RESET@

+3VALW
+3VLP
+3VS

KBC_HANGUP_RESET# <42,50>

+VCC_KB_LED

11/07 change to +5VALW

JTS1

+3VS_TS

R20

R718 0_0402_ 5%@

USB20_N1<18>
USB20_P1<18>

R10

1 2

R719 0_0402_ 5%@

1 2

R721 0_0402_ 5%TS_15@

1 2

+5VS +3VS_TS_R

R10

1 2

TS_15@

R03

R5592 0_0402_5%

+3VS +3VS_TS

R02

1 2

TS_14@

R5572 0_0402_5%

+3VALW

1 2

R5584 0_0402_5%@

USB20_N1_R
USB20_P1_R

TS_RST#EC_TS_ON#

1

1

2

2

3

3

4

4

5

5

6

6

ACES_87213-0600G

ME@

Touch Screen

1 2

TS_15@

R5583 0_0402_5%

7

G1

8

G2

LED_KB_PWM_R<40,42>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

USB20_P8<18>
USB20_N8<18>

USB20_P9<18>
USB20_N9<18>

U42

1

GND

2

VIN3VOUT

4

EN

SY6288DCAC_MSOP8

Low Active 2A

+5VS

Q153

S

KBL@

EXT_MIC
HP_OUTR
HP_OUTL
PLUG_IN

VOUT
VOUT7VIN

FLG

D

13

AO3413_SOT23-3

G

KBL@

2

1

C1317

2

USB20_P8
USB20_N8

USB20_P9
USB20_N9

+USB_VCCB+5VALW
8
6

5

KBL@

0.01U_0402_16V7K

+USB_VCCB

R5587 0_0402_5%@

R02

R20

R5568 0_0603_5%@
R5569 0_0603_5%@
R5570 0_0603_5%@

1 2

R5588 0_0402_5%@

1 2

R5589 0_0402_5%@

1 2

R5590 0_0402_5%@

1 2

1 2
1 2
1 2

1

2

+3VS

C1315

KBL@

+VCC_KB_LED

10U_0603_6.3V6M

USB_OC4# <18>

KBL@

2

C1316

0.1U_0402_16V7K

1

USB20_P8_R
USB20_N8_R

USB20_P9_R
USB20_N9_R

EXT_MIC_R
HP_OUTR_R
HP_OUTL_R

11/07 Change type to 0603

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

ROM/KBD/PWR/CR/LED/TP Conn.

ROM/KBD/PWR/CR/LED/TP Conn.

ROM/KBD/PWR/CR/LED/TP Conn.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

LA-9603P

LA-9603P

LA-9603P

JUSB3

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

19

17

G1

18

20

18

G2

ACES_50505-0184N-001

ME@

43 62Wednesday, January 09, 2013

43 62Wednesday, January 09, 2013

43 62Wednesday, January 09, 2013

of

of

of

1.0

1.0

1.0

A

RTS5178 CardReader

R20

+3VS_CARD

1 1

+VCC_3IN1

C36

C40

1

CR@

0.1U_0402_16V7K

2

C37

1

1

CR@

CR@

4.7U_0603_6.3V6K

0.1U_0402_16V7K

2

2

C37 R6 close to JCR1 Pin4

R76 0_0603_5%@

USB20_N11<18>
USB20_P11<18>

12

+3VS_CARD+3VS

R31 6.19K_0402_1%CR@

R20

R688 0_0402_5%@
R684 0_0402_5%@

Trace width:40milTrace width:40mil

CR@

De-coupling and Bulk
capacitor should place

B

U9 RTS5170@

S IC RTS5170-GR QFN 24P CARD READERSA00005T300

U9

12

12
12

C42

2

1

1U_0402_6.3V6K

+3VS_CARD

+VCC_3IN1

C43

2

CR@

1

1U_0402_6.3V6K

USB20_N11_C
USB20_P11_C

1

RREF

RREF

2
3

4
5

7
23
17

6
24

V18

25

RTS5178-GR_QFN24_4X4

RTS5178@

update PN to RTS5178 (SA000050K00)

DM
DP

3V3_IN
CARD_3V3

XD_CD#
XD_D7
GPIO0

SDREG
V18

Thermal pad

MS_D1/SD_D3/SP12

MS_D2/SD_CLK/SP8

MS_CLK/SD_WP/SP1

MS_BS/SP14

SD_D2/SP13

SP11

SD_CMD/SP10

MS_D0/SP9

SD_CD#/SP6

MS_D3/SP5
SD_D0/SP4
SD_D1/SP3

MS_INS#/SP2

22
21
20
19
18
16
15
14

SP7

13
12
11
10
9
8

SD_D2_R
SD_D3_R

SD_CMD_R
SD_CLK_R
SD_CD#
SD_D0_R

SD_D1_R
SD_WP/XD_D7

C

1 2

R3 0_0402_5%@

1 2

R4 0_0402_5%@

1 2

R5 0_0402_5%@

1 2

R8 0_0402_5%CR@

1 2

R14 0_0402_5%@

1 2

R19 0_0402_5%@

SD_D2
SD_D3

SD_CMD
SD_CLK

SD_D0
SD_D1

+VCC_3IN1

CR@

D

JCR1

4

VDD

SD_D0

C50 4.7U_0603_6.3V6K

1

SD_D1
SD_D2
SD_D3

2

SD_CD#
SD_WP/XD_D7

SD_CMD
SD_CLK

R80

@

0_0402_5%

1 2

1

C45

@

68P_0402_50V8K

2

0907 Vendor not agree mount C45

7

DAT0

8

DAT1

9

DAT2

1

DAT3

11

CD

10

WP

2

CMD

5

CLK

3

VSS1

6

VSS2

TAITW_PSDBTC-09GLBS1N14N0

ME@

SD/MMC

E

12

GND

13

GND

near to RTS5179 chip and
Combo Socket

2 2

Green Clock

+3VLP +3VS_VGA

3 3

4 4

GCLK@

CG2

EC_WL_WAKE#<36,42>

A

+V1.05S_VCCP

CG6

GCLK304@

0.1U_0402_16V7K

Y8

NC

OSC

OSC

NC

D

13

G

QG1

2

PMV65XP_SOT23-3~D

GCLK@

12

1

2

0.1U_0402_16V7K

3
2

RG9

GCLK304@

1

2

0.1U_0402_16V7K

GCLK@

CG7

0.1U_0402_16V7K

GCLK@

15P_0402_50V8J

RG13

GCLK@

10K_0402_5%

1 2

12

R02

RG11
0_0402_5%@

GCLK@

1

1

2

CG5

1

CG8

2

CG10

0.1U_0402_16V7K

1 2

+3VALW +3V_GCLK

2

0.1U_0402_16V7K

4
1

GCLK@

25MHZ_10PF_7V25000014

GCLK@

S

+3V_GCLK+3V_GCLK

R02

0_0402_5%

CG1

GCLK@

GreenCLK_XTALI
GreenCLK_XTALO

1

15P_0402_50V8J

2

B

GCLK@

12

@

RG8 0_0402_5%

12

+3VS_GCLK

VGA_GCLK

+3VLP

CG9

Every power trace need:
W=20mils

SLG3NB244VTR_TQFN16_2X3

+CHGRTC_R

1

CG3

GCLK@

22U_0805_6.3V6M

2

U69

10

VBAT

15

+V3.3A

2

VDD

VDDIO_27M1127MHz

8

VDDIO_25M_A

3

VDDIO_25M_B

1

XTAL_IN

16

XTAL_OUT

SLG3NB274VTR_TQFN16_2X3

GCLK274@

U69

VDD_RTC_OUT

GCLK244@

25MHz_A
25MHz_B

GND1

GND2

4

7

13

SLG3NB300VTR_TQFN16_2X3

+RTCBATT

R10

1 2

14

9

32kHz

12
6

GCLK_LAN_25MHZ_R

5

GCLK_PCH_25MHZ_R

GND3

GND4

17

U69

RG10
0_0402_5%

1

CG4

2.2U_0402_6.3V6M

2

GCLK@

GCLK304@

@

For GreenCLK generate CLK:
Mount: All parts in this page except
Swing Level RES (Marked "*")
NA: PD108,
Y1,R98,C180,C181,
Y2,R169,C196,C197,
Y6,C968,C969

1 2

RG1 0_0402_5%

GCLK@

1 2

RG2 22_0402_5%

GCLK304@

1 2

RG3 33_0402_5%

GCLK@

1 2

RG4 0_0402_5%

GCLK@

Close to GCLK

GCLK_32KGCLK_32K_R

GCLK_27MHZGCLK_27MHZ_R
GCLK_LAN_25MHZ
GCLK_PCH_25MHZPCH_GCLK

GCLK_32K <14>

GCLK_27MHZ <23>

GCLK_LAN_25MHZ <37>
GCLK_PCH_25MHZ <15>

PCH_32.768K
NV_GPU
LAN
PCH_25M

Reserved for Swing Level adjustment
( Close GCLK side )

@

*

GCLK_27MHZ

GCLK_LAN_25MHZ

GCLK_PCH_25MHZ

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

C

1 2

RG5 0_0402_5%

@

*

1 2

RG6 0_0402_5%

@

*

1 2

RG7 0_0402_5%

Compal Secret Data

Compal Secret Data

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

RTS5178/Green Clock

RTS5178/Green Clock

RTS5178/Green Clock

LA-9603P

LA-9603P

LA-9603P

E

44 62Wednesday, January 09, 2013

44 62Wednesday, January 09, 2013

44 62Wednesday, January 09, 2013

of

of

1.0

1.0

1.0

5

4

3

2

1

LEFT SIDE USB3.0 PORT X1

+5VALW

C767 0.1U_0402_16V7K

D D

USB30_RX_N1

USB30_RX_P1

USB30_TX_C_N1

USB30_TX_C_P1

USB20_N0_C

C C

USB20_P0_C

For EMI request
USB2.0 choke --> SM070000K00
USB3.0 Choke --> SM070001S00

R20

L68

R20

L72

1

4

L70

1

4

4

1

1

USB30_RX_R_N1

4

USB30_RX_R_P1

1

USB30_TX_R_N1

4

USB30_TX_R_P1

4

USB20_N0_R

1

USB20_P0_R

2

2

3

3

WCM-2012HS-900T_4P

2

2

3

3

WCM-2012HS-900T_4P

3

3

2

2

WCM-2012-900T_4P

EC_PWRSHARE_EN#<42>

R02

USB_ON#<42,43>

12

USB30_TX_P1<18>
USB30_TX_N1<18>

USB30_RX_P1<18>
USB30_RX_N1<18>

For ESD request

USB30_RX_R_N1
USB30_RX_R_P1
USB30_TX_R_N1
USB30_TX_R_P1

1 2

R1169 0_0402_5%NOCHG@

1 2

R5577 0_0402_5%CHG@

USB30_TX_N1

USB30_RX_P1

D27

@

9

10

8

9

7

7

6

6 5

YSCLAMP0524P_SLP2510P8-10-9

1

2

4

3

8

1

USB30_RX_R_N1

2

USB30_RX_R_P1

4

USB30_TX_R_N1

5

USB30_TX_R_P1

3

U41

1

GND

VOUT

2

VOUT

VIN
VIN3VOUT

4

EN

SY6288DCAC_MSOP8

Low Active 2A

1 2

C299 0.1U_0402_16V7K

1 2

C300 0.1U_0402_16V7K

8
7
6
5

FLG

USB20_P0_R

+5V_CHGUSB

USB_OC0#

USB30_TX_C_P1 USB30_TX_R_P1USB30_TX_P1
USB30_TX_C_N1 USB30_TX_R_N1

D28

@

3

I/O2

2

GND

1

I/O1

AZC099-04S.R7G_SOT23-6

I/O4

VDD

I/O3

USB_OC0# <18>

R20

1 2

R1156 0_0402_5%@

R20

1 2

R1157 0_0402_5%@

1 2

R1162 0_0402_5%@

1 2

R1163 0_0402_5%@

1 2

R1154 0_0402_5%@

R20

1 2

R1155 0_0402_5%@

6

5

+5VALW

4

USB20_N0_R

USB20_P0_RUSB20_P0_C
USB20_N0_RUSB20_N0_C

USB30_RX_R_P1
USB30_RX_R_N1USB30_RX_N1

+5V_CHGUSB

C814 220U_6.3V_M

+

1 2

1 2

C816 470P_0402_50V7K

JUSB1

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

TAITW_PUBAU1-09FNLSCNN4H0

ME@

GND
GND
GND
GND

10
11
12
13

Left Side Charger USB3.0 Port

R20

R20

PWRSHARE_EN_R<42>

B B

1 2

R5578 0_0402_5%@

PWRSHARE_EN
USB20_N0_C
USB20_P0_C

SELCDP

U76

1

CEN

2

DM

3

DP

4

SELCDP

9

Thermal Pad

SLG55584AVTR_TDFN8_2X2

CHG@

TDM

TDP

VDD

CB

8
7
6
5

1 2

+5VALW

C991

0.1U_0402_16V7K

CHG@

USB20_N0 <18>
USB20_P0 <18>

100K_0402_5%

R5556

R5555 0_0402_5%@

12

CHG@

1 2

CHG_ON# <42>

R03

NOCHG@

1 2

R1171 0_0402_5%

1 2

R1170 0_0402_5%

NOCHG@

USB20_P0_CUSB20_P0_C_R
USB20_N0_C

R5557

10K_0402_5%

CHG@

R5559

10K_0402_5%

@

+5VALW

12

12

NOCHG@

USB20_P0
USB20_N0

CB Function

0
1 0
1 1

1 2

R1167 0_0402_5%

1 2

R1166 0_0402_5%

NOCHG@

SELCDP

DCP autodetect with mouse /keyboard wakeup

X

S0 charging with SDP only
S0 charging with CDP or SDP only (depending on external device )

USB20_N0_C_R

+5VALW

12

R5560

10K_0402_5%

CHG@

SELCDP

R5561

10K_0402_5%

A A

@

PWRSHARE_EN

12

USB2.0/3.0 choke and ESD diode at sub-B.

Security Classification

Security Classification

Security Classification

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

3

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

USB3.0/Left USB Ports

USB3.0/Left USB Ports

USB3.0/Left USB Ports

45 62Wednesday, January 09, 2013

45 62Wednesday, January 09, 2013

45 62Wednesday, January 09, 2013

1

1.0

1.0

1.0

A

+5VALW

AP4800BGM-HF_SO-8

8
7

1

5

C720

10U_0603_6.3V6M

2

10U

+VSB

SUSP

12

13

D

S

R655
470_0603_5%

@

12

13

D

2

G

S

2

G

Q113
2N7002K_SOT23-3

@

SUSP#<10,42,51,53>

R646
150K_0402_5%

5VS_GATE

R649

82K_0402_5%

Q110
2N7002K_SOT23-3

+1.5V+1.8VS +0.75VS+V1.05S_VCCP

12

R656
470_0603_5%

@

13

D

2

G

Q114

S

2N7002K_SOT23-3

@

+RTCVCC +5VALW

R652

220K_0402_5%

SUSP SYSON#

SUSP<10,25,51,54>

DTC124EKAT146_SC59-3

12

1 1

2 2

3 3

4 4

U38

4

12

5VS_GATE_R

SYSON# SUSPSUSP

1 2

Q117

2

IN

R1110

@

100K_0402_5%

+5VS

1
2
36

1

2

1

OUT

GND

3

1

C721
10U_0603_6.3V6M

2

10U

C726

0.01U_0402_25V7K

12

R659
470_0603_5%

@

13

D

2

SUSP

G

Q116

S

2N7002K_SOT23-3

@

1

2

C722
1U_0402_6.3V6K

12

13

D

S

12

R644

@

470_0603_5%

13

D

@

S

R658
22_0603_5%

2

G

Q115
2N7002K_SOT23-3

For Intel S3 Power Reduction.

100K_0402_5%

Q119

DTC124EKAT146_SC59-3

SYSON<42,51>

SYSON

2

2

G

Q107
2N7002K_SOT23-3

R654

@

IN

B

+3VALW TO +3VS+5VALW TO +5VS

+3VALW

AP4800BGM-HF_SO-8

2

G

1

2

+VSB

12

R647
470K_0402_1%

13

D

S

8
7

5

Q111
2N7002K_SOT23-3

SUSP

10U

C723

10U_0603_6.3V6M

SUSP

12

R91 0_0402_5%@

CPU1.5V_S3_GATE <42>

add D60 for GPU sequence issue 11/13

GC6_1.5V_EN#<42>

R1111

R1106

0.1U_0402_16V7K

CH751H-40PT_SOD323-2

R1116 40.2K_0402_1%

@

DAN202UT106_SC70-3

2
3

0.1U_0402_16V7K

GPU_PWR_EN<42,46,54>

12

@

1

OUT

add D61 for GPU sequence issue 11/13

GND

3

DGPU_PWROK<19,46,54>

GPU_PWR_EN<42,46,54>

GC6_FB_CLAMP<23,27,42>
DGPU_PWROK<19,46,54>

EC L - 1.5_VGA ON

+3VS

U39

1
2
36

4

1

2

+1.5V

Q112

2

SUSP#

G

2N7002K_SOT23-3

21

D60

GV2@

CH751H-40PT_SOD323-2

OPT@

12

40.2K_0402_1%

@

12

0_0402_5%

C1108

OPT@

21

D61

@

12

@

DV2

1

C1112

@

1

C724
10U_0603_6.3V6M

2

C727

0.01U_0402_25V7K

+1.5V to +1.5VS

PMV65XP_SOT23-3~D

1

C717
10U_0603_6.3V6M

2

+3VALW

12

100K_0402_5%
R648

R651

13

D

0_0402_5%

S

2

G

1

2

R5597
0_0402_5%

1 2

2

G

1

2

C

S

+5VALW

12

R1107
100K_0402_5%

OPT@

DGPU_PWROK#

13

D

S

+5VALW

12

R1113
100K_0402_5%

OPT@

GC6_1.5V_EN#

13

D

S

1

C725
1U_0402_6.3V6K

2

Q8

D

13

G

2

12

1.5VS_GATE

Q129
2N7002K_SOT23-3

OPT@

Q130
2N7002K_SOT23-3

OPT@

12

R645
470_0603_5%

@

13

D

2

SUSP

G

Q108

S

2N7002K_SOT23-3

@

+1.5VS

1

C718
10U_0603_6.3V6M

2

1

C729

0.1U_0402_16V7K

2

DGPU_PWROK# <54>

10U_0603_6.3V6M

+VSB

R20

@

12

R782 0_0402_5%

D

1

2

C719
1U_0402_6.3V6K

12

R643
470_0603_5%

@

13

D

G

Q109

S

2N7002K_SOT23-3

@

2

SUSP

+1.5V to +1.5VS_VGA Transfer

+1.5V +1.5VS_VGA

300mil(7.2A)

1

OPT@

C856
10U_0603_6.3V6M

2

1

C852

OPT@

2

R1102 10K_0402_5%

12

OPT@

Q126

OPT@

2N7002K_SOT23-3

13

2

G

Del J12

AO4430: Rdson: 5.5mohm @ VGS=10V

OPT@

U49 AO4304L_SO8

8
7
6
5

4

1

C855

0.1U_0402_25V7K

D

S

2

OPT@

1
2
3

for Deep Sleep S3

R03

PCH_PWR_EN2<42>

PCH_PWR_EN<42,48>

SLP_SUS#<16,42>

for Deep Sleep S3

PCH_PWR_EN#

for Deep Sleep S3

+5VALW

PCH_PWR_EN#

DS3@

1

C853
10U_0603_6.3V6M

OPT@

2

1 2

0_0402_5%

1 2

0_0402_5%

1 2

0_0402_5%

+3VALW

R5534 47K_0402_5%DS3@

+5VALW TO +5V_PCH

1 2

0_0402_5%

R5573

@

C1323

1

C854

0.1U_0402_16V7K

OPT@

2

2N7002K_SOT23-3

DS3@

PCH_PWR_EN#

R5591

@

R5532

@

R5533

+3VALW TO +3V_PCH

12

1

DS3@

2

C1313

0.1U_0402_16V7K

@

2 1

J212MM

QH1AO3413_SOT23DS3@

D

S

13

G

2

DS3@

1

2

0.1U_0402_16V7K

300mil(7.2A)

R1101
75_0603_5%

GV2@

1 2

13

D

GV2@

Q127

S

2

G

E

+5VALW

R5531
100K_0402_5%

DS3@

1 2

13

D

2

G

S

S 2N7002-7-F 1N SOT23

@

2 1

J202MM

Q152 AO3413_SOT23DS3@

D

S

13

G

2

DS3@

1

CH1

2

0.1U_0402_16V7K

GV2@

R790

0_0402_5%

R791

0_0402_5%

Q151

DS3@

+5V_PCH

1

2

C1312

12

12

@

+3V_PCH

0.1U_0402_16V7K

GC6_1.5V_EN#

SUSP

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

C

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Custom

Custom

Custom

DC Interface

DC Interface

DC Interface

LA-9603P

LA-9603P

LA-9603P

E

46 62Wednesday, January 09, 2013

46 62Wednesday, January 09, 2013

46 62Wednesday, January 09, 2013

1.0

1.0

1.0

5

D D

4

3

2

1

VIN

GND
GND

@

ACES_50305-00441-001

JDCIN

1
2
3
4

PF101

1
2
3
4
5
6

7A_24VDC_429007.WRML

21

APDIN1APDIN

12

PC101

SMB3025500YA_2P

12

1000P_0402_50V7K

PL101

1 2

100P_0402_50V8J

PC102

12

12

100P_0402_50V8J

PC103

PC104

1000P_0402_50V7K

C C

20120723
For all sku

1. Change PR108 to 150_0603_5% SD013150080 from 560_0603_5% SD013560080
Change PR109 to 1K_0603_5% SD013100180 from 560_0603_5% SD013560080

+CHGRTC_R

+CHGRTC

JRTC1

- +

MAXEL_ML1220T10@

12

PR108

150_0603_5%

1 2

PR109

1K_0603_5%

1 2

PD103

RB751V-40_SOD323-2

12

1 2

PD104

RB751V-40_SOD323-2

+RTCBATT

20120731

+3VLP

1. Change PR106 footprint to R0402_0ohm-NEW

12

PR106
0_0402_5%

@

RTCVREF

RTC Battery

20120731

B B

1. Add PR110 SD013000080 0_0603_5%
Add PR111 SD013150080 150_0603_5%

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/25 2012/07/11

2010/01/25 2012/07/11

2010/01/25 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PWR DCIN / RTC Battery

PWR DCIN / RTC Battery

PWR DCIN / RTC Battery

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Xz90

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

47 62Wednesday, January 09, 2013

47 62Wednesday, January 09, 2013

47 62Wednesday, January 09, 2013

0.1

0.1

0.1

5

4

3

2

1

JBATT1

1
2
3
4
5
6

D D

7
8
9

10

ACES_50299-01001-001

ME@

C C

B B

A A

VMB2

1
2
3
4
5
6
7
8
9
10

EC_SMCA
EC_SMDA

12

12

PR202

100_0402_1%

PR201

100_0402_1%

PF201
12A_65V_451012MRL

1 2

PR203

6.49K_0402_1%

<BOM Structure>

1 2

PR204
10K_0402_5%

<BOM Structure>

21

VMB

SMB3025500YA_2P

12

PC201
1000P_0402_50V7K

EC_SMB_CK1 [42,49]

EC_SMB_DA1 [42,49]

+3VALW

BATT_TEMP [42]

PL201

1 2

A/D

BATT+

12

PC202

0.01U_0402_25V7K

PH201 under CPU botten side :
CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C

VL

12

PC203

PQ201

13

D

2N7002KW_SOT323-3

S

PR222
1K_0402_5%@

PR223
1K_0402_5%

+3VS

PR208

1 2

2

ADP_OCP_1

G

1 2

PR214
0_0402_5%@

0.1U_0603_16V7K@

H_PROCHOT#[42,6]

PROCHOT[42]

VL

PR221

100K_0402_1%@

1 2

SPOK[50]

PCH_PWR_EN[42,46]

1 2

1 2

ADP_I need to write Charge Options Register (0x12H)=> bit6=1
0: IOUT is the 20x current amplifier output <default @ POR>

1: IOUT is the 40x current amplifier output

90W(DIS) : 6.65K 100W active 90W recovery
65W(UMA): 1.65K 70W active 65W recovery

ADP_I[42,49]

PR205

Turbo_V_1

PR211
0_0402_5%

@

PR217

1 2

0_0402_5%@

13

6.65K_0402_1%

1 2

12

Turbo_V

12

0.1U_0603_25V7K

+VSBP

[42]

+VSBP

PC205

PU201

1

VCC

2

GND

3

OT1

4

OTP_N_003

G

OT2

G718TM1U_SOT23-8@

PR215 0_0402_5%@

B+

PR220

22K_0402_1%

1 2

13

D

PQ203

2N7002KW_SOT323-3

S

100K_0402_1%

2

12

PC206

1U_0402_6.3V6K

8

TMSNS1

7

RHYST1

6

TMSNS2

5

RHYST2

90W(DIS) : 27.4K
65W(UMA) : 5.11K

12

MAINPWON [42,50]

12

PR219

100K_0402_1%

OTP_N_002

PR210

1 2

ADP_OCP_2

27.4K_0402_1%

@

20120731

1. Change PR214,PR211,PR213 and PR235 footprint to R0402_0ohm-NEW

PQ202

TP0610K-T1-GE3_SOT23-3

12

PC204

2

0.22U_0603_25V7K

20120314
Change to +EC_VCCA from +3VLP

NTC_V_1

12

PR213
0_0402_5%

PR212

1 2

@

PR216

10K_0402_1%

47K_0402_1%@

<BOM Structure>

1 2

+3VALW

[42]

NTC_V

PJ201
JUMP_43X39@

2

112

+EC_VCCA

12

PR206

12.7K_0402_1%

PH201

100K_0402_1%_TSM0B104F4251RZ

+VSB

10K_0402_1%@

12

12

PR209

PR235
0_0402_5%@

1 2

PR218

0_0402_5%

@

12

PR207

21.5K_0402_1%

@

12

ECAGND

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/25 2012/07/11

2010/01/25 2012/07/11

2010/01/25 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PWR-BATTERY CONN/OTP

PWR-BATTERY CONN/OTP

PWR-BATTERY CONN/OTP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Zx90

Date: Sheet of

Date: Sheet of

2

Date: Sheet

1

48 62Wednesday, January 09, 2013

48 62Wednesday, January 09, 2013

48 62Wednesday, January 09, 2013

0.1

0.1

0.1

of

5

PQ301
AO4407AL_SO8

DTA144EUA_SC70-3

47K_0402_5%

13

2

PQ307A

PACIN

PQ310

DTC115EUA_SC70-3

ACOFF

8
7

5

PQ304

2

1 3

PQ305

DTC115EUA_SC70-3

PR312

47K_0402_1%

1 2

2

4

VIN

D D

C C

B B

2

PACIN

ACON

ACOFF[42]

12

PR301

61

2N7002KDW-2N_SOT363-6

P2

1
2
36

12

12

PC301

PR303

200K_0402_1%

0.1U_0603_25V7K

P2-1

12

PR307

P2-2

34

PQ307B

5

13

2N7002KDW-2N_SOT363-6

20120615

Change PR313 to 60.4K_0603_1% SD014604280

from 64.9K_0603_1% SD014649280

20120723

Change PR313 to 59K_0603_1% SD014590280

from 60.4K_0603_1% SD014604280

PQ302

AO4423L_SO8

1
2
3 6

4

150K_0402_1%

PR313

1 2

59K_0603_1%

PC313

1 2

0.1U_0603_25V7K

5600P_0402_25V7K

PR308

EC_SMB_DA1[42,48]

EC_SMB_CK1[42,48]

1 2

PC302

VIN

12

390K_0603_1%

4

P3

8
7

5

+3VALW

@

@

PR309

PR310

10K_0402_5%

10K_0402_5%

1 2

1 2

ADP_I[42,48]

PC314

1 2

100P_0603_50V8

PR316

316K_0402_1%

1 2

+3VALW

PR319

100K_0402_1%

0.01_1206_1%

1
2

ACPRN[49]

6

ACDET

7

IOUT

8

SDA

9

SCL

10

12

ILIM

B+

PR302

4
3

ACP

PC309

1 2

5

3

4

ACOK

CMPIN

CMPOUT

PU301

BQ24727RGRR_QFN20_3P5X3P5

SA000051W00

SRN12BM

SRP

12

11

13

12

PR321

PR320

6.8_0603_5%
PC321

0.1U_0603_25V7K

12

12

PC322

0.1U_0603_25V7K

ACN

0.1U_0603_25V7K

PC311

0.1U_0603_25V7K

12

2

1

ACP

ACN

PHASE

LODRV

GND

15

14

10_0603_5%

3

SH00000AA00

1 2

PL301

1UH_PCMB061H-1R0MS_7A_20%

1 2

PC303

10U_0805_25V6K@

PC310

12

0.1U_0603_25V7K

<BOM Structure>
21

TP

20

19

18

17

BST_CHG

PD303

16

RB751V-40_SOD323-2

12

PC320
1U_0603_25V6K

@

PC323

0.1U_0603_25V7K

BQ24727VCC

VCC

HIDRV

BTST

REGN

12

1 2

P2

PR311

10_1206_5%

DH_CHG

12

DL_CHG

PC304

10U_0805_25V6K@

1 2

PC315

1 2

1U_0603_25V6K

2.2_0603_5%

1 2

PR317

2

Need EC write ChargeOption() bit[8]=1
Setting (ACP to PHASE Rising Threshold)=1350mV(min)

CHG_B+

DISCHG_G

PC308

1 2

1 2

LX_CHG

0.047U_0603_16V7K

BQ24727VDD

PC305

1 2

4.7U_0805_25V6-K

PC316

1 2

PC307

PC306

2200P_0402_50V7K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

6

578

4

6

578

12

4

PR304

200K_0402_1%

1 2

PR305
47K_0402_1%

1 2

DISCHG_G-1

PQ306

13

DTC115EUA_SC70-3

2

PQ309

AO4466L_SO8

123

10UH_PCMB063T-100MS_4A_20%

1 2

12

PQ311

123

PR318

@

AO4466L_SO8

6251_SN

12

PC319

@

PD301

PL302

4.7_1206_5%

680P_0603_50V7K

PQ303

AO4407AL_SO8

1
2
3 6

4

ACOFF

1SS355_SOD323-2

1 2

1 2

PD302

1SS355_SOD323-2

PC312

0.1U_0603_25V7K

PR314

0.01_1206_1%

1

CHG

2

SRP

1

8
7

5

PR306
200K_0402_1%

1 2

2N7002KW_SOT323-3

13

D

12

S

4
3

SRN

PQ308

VIN

2

PACIN

G

BATT+

12

12

PC317

PC318

10U_0805_25V6K

10U_0805_25V6K

BQ24727VDD

PR322

12

PR323

47K_0402_1%

ACPRN [49]

PQ312

A A

DTC115EUA_SC70-3

12

PR324
10K_0402_1%

13

2

10K_0402_1%

1 2

PACIN

12

PR325

12K_0402_1%

ACIN [16,42]

For disable pre-charge circuit.

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

2012/07/112010/01/13

2012/07/112010/01/13

2012/07/112010/01/13

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CHARGER

Zx90

0.1

0.1

49 62W ednesday, January 09, 2013

49 62W ednesday, January 09, 2013

49 62W ednesday, January 09, 2013

1

0.1

5

4

3

2

1

2VREF_8205

+3VALW P +3VALW

D D

PR401

20120321
Change netname to CPU_B+ from B+

RT8205_B+

CPU_B+

PC401

C C

+3VALWP
OCP min 6.8A

B B

OVP min 3.56V

PJ401

2

112

JUMP_43X118@

12

12

12

0.1U_0603_25V7K

PC403

12

PC405

PC404

0.1U_0603_25V7K

4.7U_0805_25V6-K

+3VALWP

150U_B2_6.3VM_R35M

12

PC406

4.7U_0805_25V6-K

2200P_0402_50V7K

4.7UH_PCMB063T-4R7MS_5.5A_20%

1

PC414

+

2

2N7002KDW-2N_SOT363-6

AO4466L_SO8

PL401

1 2

PQ405A

6

578

PQ401

4

123

12

PR409

@

4.7_1206_5%

12

PC417

@

680P_0603_50V7K

61

2

578

PQ403
AO4712L_SO8

3 6

241

20120402
Change netname to CPU_B+ from B+

Typ: 175mA

34

5

+3VLP

12

PC410

4.7U_0805_10V6K

PR407

1 2

1 2

2.2_0603_5%

PC412

0.1U_0603_25V7K

KBC_HANGUP_RESET#

[43]

PR411

499K_0402_1%

1 2

0_0402_5%

@

CPU_B+

ENTRIP2ENTRIP1

PR412

100K_0402_1%

PQ405B
2N7002KDW-2N_SOT363-6

PR420

12

13K_0402_1%

1 2

PR403

20K_0402_1%

1 2

PR405

130K_0402_1%

1 2

25

7
8
9

BST_3V

10

UG_3V

11

LX_3V

12

LG_3V

12

12

PC419

1U_0603_10V6K

2VREF_8205

P PAD

VO2
VREG3
BOOT2
UGATE2
PHASE2
LGATE2

KBC_HANGUP_RESET#[43]

20120606
PR419 and PR420 unmount

EC_ON[42]

MAINPWON[42,48]

A A

20120731

1. Change PR414 footprint to R0402_0ohm-NEW

5

@

0_0402_5%

PR413

2.2K_0402_5%

PR414

@

0_0402_5%

1 2

PR419

12

VL

1 2

PR415

100K_0402_1%

12

PQ407

2N7002KW_SOT323-3

12

PC422

4.7U_0603_6.3V6M

13

D

2

G

S

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

PC402

1U_0603_10V6K

PR402

30K_0402_1%

1 2

PR404

19.6K_0402_1%

1 2

PR406

66.5K_0402_1%

ENTRIP2

6

4

5

3

FB2

TONSEL

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

15

13

RT8205_B+

2010/01/25 2012/07/11

2010/01/25 2012/07/11

2010/01/25 2012/07/11

12

1 2

ENTRIP1

1

2

FB1

REF

ENTRIP1

24

VO1

23

PGOOD

22

BOOT1

21

UGATE1

20

PHASE1

19

LGATE1

PU401
RT8205LZQW(2)_WQFN24_4X4

NC18VREG5

VIN16GND

17

12

PC421

0.1U_0603_25V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

VL

Typ: 175mA

PC420

4.7U_0805_10V6K

Deciphered Date

Deciphered Date

Deciphered Date

BST_5V
UG_5V
LX_5V
LG_5V

PC407

4.7U_0805_25V6-K

PR408

2.2_0603_5%

1 2

RT8205_B+

12

PC408

4.7U_0805_25V6-K

SPOK [48]

PC413

0.1U_0603_25V7K

1 2

2

12

12

PC409

PC411

0.1U_0603_25V7K

2200P_0402_50V7K

+5VALWP
OCP min 8.5A
OVP min 5.4V

+5VALW P +5VALW

12

678

35241

5

4

PQ404

MDS1521URH 1N SO8

Compal Electronics, Inc.

Title

Title

Title

3VALWP/5VALWP

3VALWP/5VALWP

3VALWP/5VALWP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Zx90

Date: Sheet of

Date: Sheet of

Date: Sheet of

PJ402

2

112

JUMP_43X118@

PJ403

2

112

@

JUMP_43X118

PQ402

MDS1525URH_SO8

PR410

@

4.7_1206_5%

PC418

@

680P_0603_50V7K

PL402

1 2

4.7UH_PCMB063T-4R7MS_5.5A_20%

12

786

12

123

+5VALWP

1

+

PC416

2

150U_B2_6.3VM_R35M

0.1

0.1

0.1

50 62Wednesday, January 09, 2013

50 62Wednesday, January 09, 2013

50 62Wednesday, January 09, 2013

1

A

STATE S3 S5 1.5VP VTT_REFP 0.75VSP

S0

Hi Hi

S3

S4/S5

1 1

HiLo

Lo Lo

On
On

Off

On
On

On

Off
(Hi-Z)

Off Off

Note: S3 - sleep ; S5 - power off

+0.75VSP

12

12

PC504

PC505

10U_0805_25V6K

10U_0805_25V6K

+VTT_REFP

+1.5VP

12

PQ503

@

2

G

PC508

0.033U_0402_16V7K

0_0402_5%

1 2

0.1U_0402_16V7K

13

D

S

2 2

PR506

49.9K_0402_5%

SUSP#

1 2

SYSON[42,46]

12

PC511

0.1U_0402_16V6K

2N7002KW_SOT323-3

SUSP[10,46,54]

3 3

20120723
Change PU502 to SA00004CY10 S IC RT8061AZQW WDFN 10P PWM from SA00003RU00 S IC SY8033BDBC DFN 10P SINGLE BUCK

PR507

21

1

2

3

4

5

PC512

@

5.6K_0402_1%

PU501

PAD
VTTGND

VTTSNS

GND

VTTREF

VDDQ

12

PR510

B

+1.5VP

PJ502

@

1

JUMP_43X39

1

2

2

BST_1.5V BST_1.5V-1

19

VLDOIN

S3

7

S3_1.5V

17

18

BOOT

UGATE

S5

TON

8

9

S5_1.5V

PR509

6.2K_0402_1%

20

VTT

RT8207MZQW_WQFN20_3X3

FB

6

FB=0.75V

12

To GND = 1.5V
To VDD = 1.8V

C

5

PQ501

TPCA8065-H_PPAK56-8-5

PR504

5.1_0603_5%

PC510

1U_0603_10V6K

4

123

5

4

123

12

+5VALW

12

PR502

PQ502

4.7_1206_5%

12

TPCA8057-H_PPAK56-8-5

PC507

680P_0603_50V7K

@

UG_1.5VUG_1.5V

LX_1.5V

12

PC509

1U_0603_10V6K

PGOOD_1.5V

10K_0402_5%

PC503

0.1U_0603_25V7K

1 2

<BOM Structure>

LG_1.5V

12

12

PR501

2.2_0603_5%

1 2

<BOM Structure>

16

PHASE

15

LGATE

14

PGND

VDDP

VDD

PGOOD

10

PR508

887K_0402_1%

12

20120626
Change PR509 to 6.34K_0402_1% SD034634180 from 5.9K_0402_1% SD034590180
20121204
Change PR509 to 6.2K_0402_1% SD00000GM80 from 6.34K

13

CS

12

11

+3VALW

12

PR503

6.65K_0402_1%

12

PR505

@

1.5V_B+

12

PC501

20120405
Change PL501 to H = 3 SH00000AB00

1UH_PCMB103T-1R0MS_13A_20%

@

4.7U_0805_25V6-K

1.5V_B+

12

PL501

PJ501

@

2

112

JUMP_43X118

20120321

PC502

4.7U_0805_25V6-K

12

+1.5VP +1.5V

Change netname to CPU_B+ from B+

1

+

2

20120321
Add PJ507

2

2

@

2

D

CPU_B+

201201002
Change PC506 to 15mohm SGA00002280

PC506
330U_D2_2.5VY_R9M

+1.5VP
OCP min 20A
OVP min 1.65V

PJ507

112

JUMP_43X118@
PJ503

112

JUMP_43X118

PJ504

112

JUMP_43X79

@

+1.5VP

+0.75VS+0.75VSP

PU502

PJ505

+3VALW

2

112

JUMP_43X79@

SUSP#[10,25,42,46,51,53,54]

4 4

A

1.8VSP_VIN

12

PC513
22U_0805_6.3VAM

PR513

1 2

0_0402_5%

EN_1.8VSP

PR514
1M_0402_5%

@

12

PC521

1 2

4

10

PVIN

9

PVIN

8

SVIN

5

EN

0.1U_0402_10V7K

2

LX

PG

3

LX

6

FB

TP

NC

NC

7

1

11

SY8033BDBC_DFN10_3X3

1.8VSP_LX

FB=0.6Volt

B

PL502

1UH_PH041H-1R0MS_3.8A_20%

1 2

12

20K_0402_1%

PR511

4.7_1206_5%

@

12

PC519

@

680P_0603_50V7K

1.8VSP_FB

10K_0402_1%

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR512

PR515

Issued Date

Issued Date

Issued Date

12

12

PC514

12

68P_0402_50V8J

PC515

22U_0805_6.3VAM

12

2010/01/25 2012/07/11

2010/01/25 2012/07/11

2010/01/25 2012/07/11

12

12

PC520

PC516

2200P_0402_50V7K

22U_0805_6.3VAM

@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

12

PC517

68P_0402_50V8J

@

+1.8VSP

12

PC518

0.1U_0402_25V6

@

+1.8VP
current limit min 4A

PJ506

2

112

JUMP_43X79@

+1.8VS+1.8VSP

1.8VSP max current=4A

Compal Electronics, Inc.

Title

Title

Title

+1.5VP/+1.8VSP

+1.5VP/+1.8VSP

+1.5VP/+1.8VSP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Zx90

Date: Sheet of

Date: Sheet of

Date: Sheet of

D

51 62Thursday, January 10, 2013

51 62Thursday, January 10, 2013

51 62Thursday, January 10, 2013

0.1

0.1

0.1

5

4

3

2

1

D D

VID [0] VID[1] VCCSA Vout
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V

PC601

1 2

PC617

0.22U_0402_10V6K

SA_PGOOD[42]

+5VALW

12

3300P_0402_50V7K

10_0402_1%

19

20

21

22

23

24

PC618

PR604

PU601

PGND

PGND

PGND

VIN

VIN

VIN

12

output voltage adjustable network

2.2U_0603_10V7K

C C

2

1

PC613

PC612

1 2

2

2200P_0402_50V7K

PJ601

+3VALW

B B

2

112

JUMP_43X118@

+VCCSA_PWR_SRC

0.1U_0603_25V7K

2

PC614

PC615

1

1

10U_0805_6.3V6M

10U_0805_6.3V6M

+VCCSA_PWR_SRC

+3VS

PR601

1 2

12

17

18

V5FILT

V5DRV

TPS51461RGER_QFN24_4X4

GND

VREF

1

2

12

PR610

5.1K_0402_1%

PR602

1K_0402_5%

12

12

100K_0402_5%

+VCCSA_PWRGD

PR603

1K_0402_5%

+VCCSA_PWRGD

PC602

1U_0603_10V6K

16

PGOOD

COMP

3

PC619

20120731

1. Change PR605 footprint to R0402_0ohm-NEW

+VCCSA_VID0

+VCCSA_VID1

15

VID1

SLEW

4

1 2

0.01U_0402_25V7K

+VCCSA_EN

20120731

1. Change PR606 footprint to R0603_0ohm-NEW

14

13

EN

VID0

12

BST

11

SW

10

SW

9

SW

8

SW

7

SW

25

TP

VOUT

MODE

5

6

12

+VCCSA_BT

+VCCSA_PHASE

@

33K_0402_5%

H_VCCSA_VID1 [10]

H_VCCSA_VID0 [10]

PR606
0_0603_5%@

PR608

12

PR605

@

0_0402_5%

1 2

12

+VCCSA_BT_1

12

12

0.22U_0603_16V7K

PR607

@

4.7_1206_5%

PC616

@

1000P_0603_50V7K

+V1.05S_VCCP_PWRGOOD [53]

PC603

1 2

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

+VCC_SAP
TDC 4.2A
Peak Current 6A
OCP current 7.2A
OVP 1.06V

The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.

20120411
Change PL601 footprint to PL302 footprint

PL601

1 2

PC604

1 2

22U_0805_6.3V6M

20120731

1. Change PR611 footprint to R0402_0ohm-NEW

12

PC605

1 2

PC606

0.1U_0402_10V7K

22U_0805_6.3V6M

PR609

100_0402_5%

PR611
0_0402_5%@

1 2

+VCCSAP

PC607

PC608

1 2

22U_0805_6.3V6M

12

1 2

22U_0805_6.3V6M

12

PC609

2200P_0402_50V7K

+VCCSA_SENSE [10]

PJ602

2

112

JUMP_43X118@

+VCCSA

+VCCSAP

PC611

PC610

1 2

1 2

22U_0805_6.3V6M

22U_0805_6.3V6M

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

3

2010/01/25 2012/07/11

2010/01/25 2012/07/11

2010/01/25 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

+VCCSAP

+VCCSAP

+VCCSAP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Zx90

Date: Sheet

Date: Sheet

Date: Sheet

1

52 62Wednesday, January 09, 2013

52 62Wednesday, January 09, 2013

52 62Wednesday, January 09, 2013

of

of

of

0.1

0.1

0.1

5

D D

PR705

+V1.05S_VCCP_PW RGOOD[52]

PC713

0.1U_0402_25V6

60.4K_0402_1%

1 2

10.7K_0402_1%~N

12

PR717

1 2

10_0402_1%

PR706

PR712

1 2

PR713

12K_0402_1%

1 2

1 2

1 2

SUSP#[10,25,42,46,51,54]

C C

PR715

@

0_0402_5%

1 2

B B

VSSIO_SENSE_L[9]

VCCIO_SENSE[9]

20120731

1. Change PR715 footprint to R0402_0ohm-NEW

4

12

10K_0402_1%@

1 2

PC714

0.01UF_0402_25V7K

PR716

1 2

10_0402_5%@

PC719
1000P_0402_50V7K

<BOM Structure>

PC707

<bom structure>

.1U_0402_16V7K

PR709

0_0402_5%

1 2

0.01UF_0402_25V7K

PC720
1000P_0402_50V7K

1 2

17

PU702

1

VREF

2

REFIN

TPS51219RTER_QFN16_3X3

3

<BOM Structure>

GSNS

4

VSNS

PC717

1 2

PR719

1 2

10_0402_1%

+3VS

PR707

100K_0402_1%

1 2

PR708

1 2
15

16

PAD

COMP5TRIP6GND

MODE

PGOOD

12

75K_0402_1%

PR718

100K_0402_1%

14

EN

7

2.2_0603_5%

1 2

BST_1.05VS_VCCP

13

BST

12

SW

11

DH

10

DL

9

V5

PGND

8

3

PR710

0.1U_0603_25V7K

LX_1.05VS_VCCP

DH_1.05VS_VCCP

DL_1.05VS_VCCP

PC710

1 2

12

+5VALW

PC718

1U_0603_10V6K

PQ701

TPCA8065-H_PPAK56-8-5

4

4

PQ703

TPCA8057-H_PPAK56-8-5

2

20120330
Change net name to +V1.05S_VCCP from +1.05S_VCCP

PJ703

2

JUMP_43X118@
PJ704

2

JUMP_43X118

@

PJ707

1.05VS_B+

12

5

123

5

123

12

PC711

PC709

0.1U_0402_25V6

2200P_0402_50V7K

<BOM Structure>

1UH_PCMB104T-1R0MH_18A_20%

12

PR714

@

12

PC716

@

PL701

4.7_1206_5%

1000P_0603_50V7K

PC708

4.7U_0805_25V6-K

12

2

JUMP_43X118

@

12

12

PC712

4.7U_0805_25V6-K

1

+

2

PC715

330U_D2_2.5VY_R9M

1

112

112

112

+V1.05S_VCCP+1.05VS_VCCPP

B+

+1.05VS_VCCPP

+1.05VP
OCP min 20A
OVP min 1.24V

A A

Security Classification

Security Classification

Security Classification

2010/01/25 2012/07/11

2010/01/25 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/25 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

+1.05VS_VCCP

+1.05VS_VCCP

+1.05VS_VCCP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Zx90

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

53 62Wednesday, January 09, 2013

53 62Wednesday, January 09, 2013

53 62Wednesday, January 09, 2013

1

0.1

0.1

0.1

A

10 S CER CAP 22UF 6.3V M X5R 0805 H1.25

20121015

1.Change PR816 from SD028100380 S RES 1/16W 100K +-5% 0402 to
SD028100180 S RES 1/16W 1K +-5% 0402

2.Change PQ803 from NA to SB000009Q80 S TR 2N7002KW 1N SOT323-3

3.Change PR813 from NA to SD000001R80 S RES 1/10W 22 +-5% 0603

+5VALW

10U_0805_10V6K

4.Change PR815 from NA to SD028000080 S RES 1/16W 0 +-5% 0402

PR818

SUSP

PR811
18K_0402_1%

1 2

PR829

0_0402_5%

1 2

12

33P_0402_50V8J

1 2

0_0402_5%

1 2

PR824

1 2

PC841

@

47P_0402_50V8J

1 2

0_0402_5%

1 2
1 2

PC871

@

2700P_0402_50V7K

12

PC856

2700P_0402_50V7K

GPU_FBRTN

GPU_VREF

PC853

@

PC842

@

1 2

.01U_0402_16V7K

PR833

9.09K_0402_1%

12

PR820

470K_0402_1%

PR819

@

0_0402_5%

PR827

2K_0402_1%

1 2

GPU_VREF

12

12

PC814

GPU_HOT#<23>

2

G

GPU_REFIN

GPU_TON
GPU_FBRTN
GPU_FB

GPU_COMP

1U_0402_6.3V6K

+3VS_VGA

12

12

.01U_0402_16V7K

1 1

20120919

1. Change PQ810 gnd net name to gnd from GPU_FBRTN

2 2

<24>

3 3

20121023

1.Change PR807 to 0ohm SD028000080 from 100ohm SD034100080

4 4

+VGA_CORE

DGPU_PWROK#[46,54]

GPU_STDBY_EN<23>

12

PR802
0_0402_5%@

12

12

PR803
10K_0402_1%@

@

PC864

.01U_0402_16V7K

GPU_B+

1 2

VSSSENSE_VGA

1 2

0_0402_5%

<24>

1 2

VCCSENSE_VGA

1 2

100_0402_1%

A

2

G

1 2

PR806
0_0402_5%

PR807
PR808

0_0402_5%

PR809

GPU_REFIN

12

@

13

D

S

PR804
0_0402_5%

SUSP[10,46,51,54]

20120926

1. Add PC871 for reserve

12

PC846

1U_0402_6.3V6K

GPU_FBRTN

PR805
3K_0402_1%@

PQ810

DMN65D8LW-7_SOT323-3

PR822

499K_0402_1%

12

PC840

@

.01U_0402_16V7K

12

@

PC867

0.1U_0402_25V6

@

1 2

PR812

0_0402_5%

PR810

@

1 2

15.8K_0402_1%

PH801

470K_0402_5%_TSM0B474J4702RE

+V1.05S_VCCP +1.05VS_VGA

12

PC801

PR814
20K_0402_1%

PR816

PQ804

2N7002KW_SOT323-3

+3VS_VGA

12

PR801
0_0402_5%

@

12

PR826
0_0402_5%

@

PR839

20K_0402_1%

1 2

@

PU801

7

REFIN

8

VREF

9

TON

10

RGND

11

VSNS

12

SS

100K_0402_1%

1 2

1K_0402_5%

1 2

GND

25

PR825

PR835
0_0402_5%

GPU_REFADJ

6

REFADJ

TSNS/ISEN3

13

GPU_TSNS/ISEN3

12

1 2

13

D

S

12

PR834
20K_0402_1%

PC827

B

8
7
6
5

MDS1521URH 1N SO8

GPU_PSI

GPU_VID

4

5

VID

TALERT/ISEN2

14

15

GPU_DSBL/ISEN1

GPU_TALERT/ISEN2

1
2
3

12

10U_0805_10V6K

4

PQ802

12

PC804

0.1U_0603_25V7K

PR823
0_0402_5%

1 2

2phase --> PSI > 2.4V
1phase --> PSI < 0.8V
HW pull high

@

GPU_ENGPU_PGOOD1

3

PSI

VCC/ISNE1

16

12

PC854

47P_0402_50V8J

U2_BOOT1

U2_UGATE1

2

1

EN

BOOT1

UGATE1

GND/PWM3

BOOT218UGATE2

PGOOD

17

U2_UGATE2

U2_BOOT2

PR840

B

PR832
0_0402_5%

1 2

PR836
0_0402_5%

@

1 2

PC810

@

0.1U_0402_25V6

24

PHASE1

23

LGATE1

22
21

PVCC

20

LAGTE2

19

PHASE2

RT8813AGQW_WQFN24_4X4

+3VS_VGA

12

10K_0402_1%

PR831
0_0402_5%

1 2

12

PC803

PC802

1U_0603_10V6K

<BOM Structure>

NVVDD_PWM_VID <23>

NVVDD_PSI <23>

+3VS
12

PR850

@

10K_0402_1%

PR838
0_0402_5%

1 2

1 2

PR837

@

0_0402_5%

PD801

@

12

RB751V-40_SOD323-2

U2_PHASE1
U2_LGATE1

U2_PWM3 U2_PWM3

U2_LGATE2
U2_PHASE2

DGPU_PWROK
<19,27,46>

+V1.05S_VCCP

PR813
22_0603_5%

1 2

PQ803

2N7002KW_SOT323-3

13

D

2

G

S

GPU_PWR_EN <18,27,46>

12

PR830

2.2_0603_5%

1 2

12

PC852

.1U_0603_25V7K

20120405
Change PQ802 and PJ802 netname to +V1.05S_VCCP from +1.05VS

PJ802

2

JUMP_43X118

@

1 2
1 2

U2_BOOT1

U2_UGATE1

U2_PHASE1

112

PR815
0_0402_5%

PR817
0_0402_5%

2.2_0603_5%

1 2

PR821

@

SUSP

+1.05VS_VGA

1 2

PC809

0.22U_0603_10V7K

Change PR842 to 12K from 8.6K

U2_LGATE1

NVDD_PWR_EN <18,27,46>

PR860

2.2_0603_5%

1 2

U2_BOOT2

U2_UGATE2

U2_PHASE2

1 2

U2_LGATE2

+VGA_CORE

12

PC815

+5VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

12

PC829

C

DGPU_PWROK# [46,54]

SUSP [10,46,51,54]

PR842

1 2

12K_0402_1%

PC861

0.22U_0603_10V7K

TPCA8057-H_PPAK56-8-5

GPU_B+

5

4

4

5

4

PQ809

4

Under VGA Core

12

12

4.7U_0603_6.3V6M

12

4.7U_0603_6.3V6M

12

12

12

PC817

PC816

PC830

PC848

2008/09/15 2012/07/11

2008/09/15 2012/07/11

2008/09/15 2012/07/11

PC818

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

0.1U_0402_10V7K

4.7U_0603_6.3V6M

12

12

12

PC831

4.7U_0603_6.3V6M

12

PC843

0.1U_0402_10V7K

C

12

PC832

4.7U_0603_6.3V6M

12

PC845

0.1U_0402_10V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

12

PC819

4.7U_0603_6.3V6M

12

PC833

4.7U_0603_6.3V6M

PC849

0.1U_0402_10V7K

Deciphered Date

Deciphered Date

Deciphered Date

12

12

PC821

PC820

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

PC834

PC835

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

TPCA8065-H_PPAK56-8-5

123

<BOM Structure>

PQ806

5

123

PQ807

123

5

123

PC822

4.7U_0603_6.3V6M

D

B+

PJ801

2

112

JUMP_43X118@

12

12

12

PC806

PC805

0.1U_0402_25V6
2200P_0402_50V7K

PQ801

PL801

0.36UH_PDME064T-R36MS1R405_24A_20%

1 2

12

PR828

@

4.7_1206_5%

12

PC813

@

680P_0603_50V7K

TPCA8057-H_PPAK56-8-5

12

PC858

PC857

0.1U_0402_25V6
2200P_0402_50V7K

TPCA8065-H_PPAK56-8-5

12

PR862

4.7_1206_5%

12

PC870
680P_0603_50V7K

20120919

1. Del PC847,PC844,PC850,PC851 0.1u_0402_10V7K

2.Add PC828,PC855,PC862,PC863,PC868,PC869 22u_0805_6.3V6M
20121026
Del PC823,PC825,PC828,PC855,PC862,PC869 SE000000I

12

PC807

PC808

10U_0805_25V6K

10U_0805_25V6K

12

12

PC859

PC860

10U_0805_25V6K

@

@

+VGA_CORE

12

PC836

1

PC828

2

22U_0805_6.3V6M

@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+VGA_COREP
OCP min 60A
OVP min 1.525V

1

1

1

+

PC811

2

12

10U_0805_25V6K

PL802

0.36UH_PDME064T-R36MS1R405_24A_20%

1 2

330U_D2_2V_Y

GPU_B+

+

+

PC812

2

2

330U_D2_2V_Y

Near VGA Core

12

12

4.7U_0805_6.3V6K

1

PC855

2

@

12

PC824

PC837

22U_0805_6.3V6M

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PC826

47U_0805_4V

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K

12

12

PC839

PC838

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K

1

PC863

2

22U_0805_6.3V6M

VGA_COREP

VGA_COREP

VGA_COREP

LA-9601P

LA-9601P

LA-9601P

D

1

2

PC868

PC866

330U_D2_2V_Y

22U_0805_6.3V6M

1

+

PC865

2

@

+VGA_CORE

54 62Wednesday, January 09, 2013

54 62Wednesday, January 09, 2013

54 62Wednesday, January 09, 2013

330U_D2_2V_Y

+VGA_CORE

0.1

0.1

0.1

5

4

3

2

1

20120514
Change PH901,PH904 to SL200000L00 220K_0402_5%_TSM0B224J4702RE
from SL200000500 220K_0402_5%_ERTJ0EV224J

12

1 2

PC904

1200P_0402_50V7K

20120514
Change PR921 to 71.5K_0603_1% SD014715280
from 63.4K_0603_1% SD014634280

1 2

PR912

71.5K_0603_1%

PC911
1000P_0402_50V7K

1 2

CSP1A

TSENSEA

48

47

49

46

CSP2A

CSP1A

TSNSA

CSREFA

CSSUMA

CSP1

DRVEN

CSP2

TSNS

PWM

27

29

28

30

TSENSETSENSE CSP2A

CSP1
CSP2
CSP3

3P: 21K
2P: 12.4K

CSSUM

PC934

1 2

1000P_0402_50V7K

1 2

NTC_PH201

12

220K_0402_5%_TSM0B224J4702RE

PR905

75K_0402_1%

<BOM Structure>

1 2

12

NTC_PH203

PR907

1000P_0402_50V7K

165K_0402_1%

SWN1A

CSREFA [56]

PC914

1 2

.1U_0402_16V7K

1 2

26.1K_0402_1%

45

PWMA

44
43
42
41
40

BST2

39
38
37
36

6132P_VCCP

35
34
33
32
31

BST1

PR934

1 2

41.2K_0402_1%

1 2

PR953

165K_0402_1%

BSTA1

3P: 73.2K
2P: 41.2K

6132_PWM

CSREF [56]

3P: 1500p
2P: 1200p

20120514
Change PR949,PR951 to 143K_0603_1% SD014143380 from 130K_0603_1% SD014130380

BSTA

HGA
SWA

LGA

BST2

HG2

SW2

LG2

PVCC

PGND

LG1

SW1

HG1

BST1

PC924

1 2

.1U_0402_16V7K

PC936
1000P_0402_50V7K

20120514
Change PC936 to 1000P_0402_50V7K SE074102K80 from 680P_0402_50V7K SE074681K80

PUT COLSE
TO GT
Inductor

PH901
220K_0402_5%_TSM0B224J4702RE

CSREFA

PC910

0.047U_0402_16V7K
PR913 6.98K_0402_1%

1 2

2P: 36K
1P: 26.1K

PR921

1 2

2.2_0603_5%

1 2

PR924

2.2_0603_5%

PR930

1 2

PR931

2.2_0603_5%

PC927

CSREF

CSP1

PC931

CSREF

PR949

1 2

143K_0603_1%

1 2

PR951

143K_0603_1%

1 2

6132_PWMA

BSTA1_1

BST2_1

BST1_1

CSP2

12

12

CSP1A

PR918

HG1A [56]
LG1A [56]
HG2 [56]
LG2 [56]

1 2

0_0402_5%

LG1 [56]
HG1 [56]

0.047U_0402_16V7K

0.047U_0402_16V7K

PC918

1 2

0.22U_0603_25V7K

PC919

1 2

0.22U_0603_25V7K

PC920

1 2

2.2U_0603_10V7K

PC922

1 2

0.22U_0603_25V7K

1 2

6.98K_0402_1%

PR960

6.98K_0402_1%

1 2

1 2

6.98K_0402_1%

PR961

6.98K_0402_1%

1 2

SWN1

SWN2

PR941

PR945

@

@

SWN1A [56]

+5VS

1K_0402_1%

SW1A [56]

SW2 [56]

SW1 [56]

SWN2 [56]

SWN1 [56]

1 2

2P: 1.65K
1P: 1K

FBA3

680P_0402_50V7K

PR902

4700P_0402_25V7K

1 2

PC905

PR903

1 2

FBA1

12

10.7K_0402_1%~N
PR908

1 2

10_0402_1%

1 2

1K_0402_1%

PR909

FBA2

PR937
0_0402_5%@

1 2

PR954
0_0402_5%@

1 2

PC907

1 2

680P_0402_50V7K

2P: 24K
1P: 24.9K

PR910

10P_0402_50V8J

1 2

6.04K_0402_1%

2P: 21.5K
1P: 15.8K

PC912

1000P_0402_50V7K

PC908

1 2

PR901

D D

TRBSTA#

20120731

1. Change PR937,PR954,PR926,PR936,PR938
footprint to R0402_0ohm-NEW

1 2

10_0402_1%

1 2

1.21K_0402_1%

VCC_AXG_SENSE[10]

VSS_AXG_SENSE[10]

PC901

+V1.05S_VCCP

PR919

1 2

VR_ON[42]

95.3K_0402_1%

1 2

PR929 1K_0402_1%

PR942

1 2

49.9_0402_1%

FB_CPU2

12

PC933

1000P_0402_50V7K

PR927

12

1 2

0.033U_0402_16V7K

PC937

+5VS

1 2

1 2

2_0603_5%

PC915

1 2

2.2U_0603_10V7K
PR920

1 2

0_0402_5%

PR925

1 2

10K_0402_1%

12

PC921

VSN

PC923
1000P_0402_50V7K

VSP

PR940

1 2

1K_0402_1%

PC928

1 2

FB_CPU1

560P_0402_50V7K

PR948

806_0402_1%

3P: 3.65K
2P: 9.53K

CSREFCSCOMP

IMVP_IMON[42]

0.01U_0402_25V7K

6132_VCC

VR_ON_CPU

VR_SVID_DAT1
VR_SVID_ALRT#
VR_SVID_CLK

VBOOT

VRMP
VR_HOT#
VGATE

DIFF_CPU

PR943

3P: 6.04K
2P: 4.32K

ROSC_CPU

3P: 22p
2P: 10p

22P_0402_50V8J

12

COMP_CPU1

6.04K_0402_1%

3P: 2200p
2P: 3300p

3P: 23.7K
2P: 24.9K

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15

PC926

C C

12

PC916

PR922

.1U_0402_16V7K

130_0402_1%

VR_SVID_DAT[9]

VR_SVID_ALRT#[9]

VR_SVID_CLK[9]

1 2

+V1.05S_VCCP

12

PR932

@

75_0402_1%

VR_HOT#[42]

VSSSENSE[9]

VCCSENSE[9]

B B

20120514
Change PC928 to 560P_0402_50V7K SE074561K80
from 680P_0402_50V7K SE074681K80

A A

VGATE[16]

TRBST#

PR923

1 2

12

PC917

54.9_0402_1%

1 2

PR944

1 2

10_0402_1%

.1U_0402_16V7K

PR926 0_0402_5%@

VR_SVID_DAT1

+3VS

12

3P: 330p
2P: 1000p

FB_CPU3

PR947

1 2

8.06K_0402_1%

3P: 348
2P: 1.21K

PR955

1 2

1K_0402_1%

3P: 806
2P: 1K

CPU_B+

PR933
10K_0402_5%

PR936
0_0402_5%@

1 2

PR938
0_0402_5%@

1 2

PC930

1 2

0.033U_0402_16V7K

DROOP

.1U_0402_16V7K

24.9K_0402_1%

COMPA1

2200P_0402_50V7K

<BOM Structure>

1 2

61

PU901

VCC
VDDBP
VRDYA
EN
SDIO
ALERT#
SCLK
VBOOT
ROSC
VRMP
VRHOT#
VRDY
VSN
VSP
DIFF

12

PC929

1500P_0402_50V7K

PR950

1 2

PUT COLSE
TO VCORE
Phase 1
Inductor

1 2

1 2

1 2

60

PAD

16

TRBST#

24.9K_0402_1%

PC902

PR904

1 2

PC903

PC909

CSCOMPA

PR914

1 2

15.8K_0402_1%

FBA

CSSUMA

DROOPA

ILIMA

DIFFA

COMPA

TRBSTA#

IMONAIMONA

57

58

55

52

56

54

59

VSPA

VSNA

DIFFA

NCP6132AMNR2G_QFN60_7X7

COMP

18

17

FB_CPU

COMP_CPU

12

PC935

50

53

51

FBA

ILIMA

IOUTA

COMPA

DROOPA

TRBSTA#

CSCOMPA

CSCOMP22CSP325CSREF24CSSUM

DROOP21FB

IOUT

ILIM20TRBST#

23

19

26

DROOP

ILIM_CPU

IMON

1 2

IMVP_IMON IMON

PR939 12.4K_0402_1%

PC932
1000P_0402_50V7K

1 2

CSCOMPCSCOMPCSCOMPCSCOMPCSCOMPCSCOMP

1 2

1 2

PR952

75K_0402_1%

.1U_0402_16V7K

PH903

PR915,PR946=200K(setting 113 degreeC)
PR915,PR946=8.25K(setting 93 degreeC)

PR906

PC906

1 2

1000P_0402_50V7K

TSENSEA

12

PR915

200K_0402_1%

@

PUT COLSE
TO V_GT
HOT SPOT

CSREFACSCOMPA DROOPA

PH904
100K_0402_1%_TSM0B104F4251RZ

1 2

+5VS

CSP2A

12

PR928
0_0402_5%

Option for
1 phase GFX

+5VS

CSP3

TSENSE

12

PR946

200K_0402_1%

@

PUT COLSE
TO VCORE
HOT SPOT

12

1 2

PR935
0_0402_5%

20120723
unmount PR915 and PR946

PH902
100K_0402_1%_TSM0B104F4251RZ

Option for
2 phase CPU

2Phase: @
1Phase: install

3Phase: @
2Phase: install

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2012/07/11

2009/12/01 2012/07/11

2009/12/01 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

PWR-CPU_CORE

PWR-CPU_CORE

PWR-CPU_CORE

C38-G series Chief River Schematic

1

0.1

0.1

55 62W ednesday, January 09, 2013

55 62W ednesday, January 09, 2013

55 62W ednesday, January 09, 2013

0.1

5

4

3

2

1

CPU_B+ CPU_B+

5

PQ901

HG1[55]

D D

SW1[55]

LG1[55]

4

4

TPCA8065-H_PPAK56-8-5

123

<BOM Structure>

5

PQ903

123

TPCA8057-H_PPAK56-8-5

12

SNUB_CPU1

12

12

12

PC939

PC938

10U_0805_25V6K

10U_0805_25V6K

0.36UH_PCMB104T-R36MH1R105_30A_20%

1

PR956

@

4.7_1206_5%

PC948

@

680P_0603_50V7K

2

12

12

PC941

PC940

0.1U_0402_25V6
2200P_0402_25V7K

PL902

4
3

V1N_CPU

B+

+VCC_CORE +VCC_CORE

PR958

12

10_0402_1%

PC953

SWN1 [55]

PL901

FBMA-L11-453215800LMA90T_2P

1 2

1

+

2

100U_25V_M

CPU_B+

1

+

PC954

2

HG2[55]

100U_25V_M

SW2[55]

LG2[55]CSREF [55]

PQ902

4

4

5

TPCA8065-H_PPAK56-8-5

123

5

PQ904

TPCA8057-H_PPAK56-8-5

123

12

PC943

PC942

10U_0805_25V6K

10U_0805_25V6K

PL903

0.36UH_PCMB104T-R36MH1R105_30A_20%

PR957

@

4.7_1206_5%

PC949

@

680P_0603_50V7K

1
2

12

SNUB_CPU2

12

12

12

12

PC944

PC946

0.1U_0402_25V6
2200P_0402_25V7K

4
3

12

PR959

10_0402_1%

CSREF

SWN2 [55]

V2N_CPU

C C

DC 35W CPU
VID1=1.05V
IccMax=53A
Icc_Dyn=43A
Icc_TDC=36A
R_LL=1.9m ohm
OCP~65A

CPU_B+

B B

5

PQ907

HG1A[55]

SW1A[55]

LG1A[55]

A A

4

PQ909

4

TPCA8065-H_PPAK56-8-5

123

5

TPCA8057-H_PPAK56-8-5

123

<BOM Structure>

12

12

PC958

PC957

10U_0805_25V6K

10U_0805_25V6K

12

PC959

0.1U_0402_25V6

12

PR967

@

4.7_1206_5%

SNUB_GFX1

12

PC968

@

680P_0603_50V7K

12

PC960

2200P_0402_25V7K

PL905

0.36UH_PCMB104T-R36MH1R105_30A_20%

1
2

+VCC_GFXCORE_AXG

4
3

V1N_GFX

12

PR971

10_0402_1%

CSREFA [55]

SWN1A [55]

DC 35W GT2
VID1=1.23V
IccMax=33A
Icc_Dyn=20.2A
Icc_TDC=21.5A
R_LL=3.9m ohm
OCP~40A

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

3

2009/12/01 2012/07/11

2009/12/01 2012/07/11

2009/12/01 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PWR-CPU_CORE

PWR-CPU_CORE

PWR-CPU_CORE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

C38-G series Chief River Schematic

1

56 62Wednesday, January 09, 2013

56 62Wednesday, January 09, 2013

56 62Wednesday, January 09, 2013

of

of

of

0.1

0.1

0.1

5

4

3

2

1

+VCC_CORE

1

PC1
10U_0805_6.3VAM

2

D D

1

PC6
10U_0805_6.3VAM

2

1

PC2
10U_0805_6.3VAM

2

1

PC7
10U_0805_6.3VAM

2

1

PC3
10U_0805_6.3VAM

2

1

PC8
10U_0805_6.3VAM

2

1

PC4
10U_0805_6.3VAM

2

1

PC9
10U_0805_6.3VAM

2

+VCC_CORE

1

PC20
22U_0805_6.3V6M

2

1

PC44
22U_0805_6.3V6M

2

C C

1

PC60
22U_0805_6.3V6M

2

1

@

PC68
22U_0805_6.3V6M

2

1

PC21
22U_0805_6.3V6M

2

1

PC45
22U_0805_6.3V6M

2

1

PC61
22U_0805_6.3V6M

2

1

@

PC69
22U_0805_6.3V6M

2

1

PC22
22U_0805_6.3V6M

2

1

PC46
22U_0805_6.3V6M

2

1

PC62
22U_0805_6.3V6M

2

1

PC70
22U_0805_6.3V6M

2

1

PC23
22U_0805_6.3V6M

2

1

PC47
22U_0805_6.3V6M

2

1

PC63
22U_0805_6.3V6M

2

1

PC71
22U_0805_6.3V6M

2

+VCC_CORE +VCC_GFXCORE_AXG

1

PC5
10U_0805_6.3VAM

2

1

PC10
10U_0805_6.3VAM

2

1

PC24
22U_0805_6.3V6M

2

1

PC48
22U_0805_6.3V6M

2

1

@

PC64
22U_0805_6.3V6M

2

1

PC11
10U_0805_6.3V6M

2

@

+VCC_GFXCORE_AXG

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

PC13

1

2

22U_0805_6.3V6M

@

PC37

1

2

1

+

2

@

@

22U_0805_6.3V6M

PC14

1

2

22U_0805_6.3V6M

PC38

1

2

PC58
330U_D2_2.5VY_R9M

@

22U_0805_6.3V6M

PC12

1

2

22U_0805_6.3V6M

PC36

1

2

1

+

PC57
330U_D2_2.5VY_R9M

2

20120514
Unpop PC58

PC15

PC39

@

22U_0805_6.3V6M

PC16

1

2

22U_0805_6.3V6M

PC40

1

2

1

+

2

22U_0805_6.3V6M

PC17

1

2

22U_0805_6.3V6M

PC41

1

2

PC59
330U_D2_2.5VY_R9M

22U_0805_6.3V6M

22U_0805_6.3V6M

PC19

PC18

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

PC43

PC42

1

1

2

2

Below is 458544_CRV_PDDG_0.5 Table 5-8.

5 x 22 µF (0805)

Socket Bottom

5 x (0805) no-stuff
sites

7 x 22 µF (0805)

Socket Top

2 x (0805) no-stuff
sites

+V1.05S_VCCP

+V1.05S_VCCP

22U_0805_6.3V6M

22U_0805_6.3V6M

1

PC27

2

22U_0805_6.3V6M

1

PC28

2

22U_0805_6.3V6M

1

@

PC49

2

PC65
330U_D2_2.5VY_R9M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

@

@

PC26

PC25

2

2

22U_0805_6.3V6M

1

1

PC29

PC30

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

2

PC51

PC50

2

22U_0805_6.3V6M

1

PC31

2

22U_0805_6.3V6M

1

PC52

2

1

+

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

PC32

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

PC53

2

2

1

+

2

@

20120514
Unpop PC66

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

@

PC34

PC33

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

@

PC54

PC55

2

PC67
330U_D2_2.5VY_R9M

1

2

1

+

2

@

PC66
330U_D2_2.5VY_R9M

@

PC35

PC56

+VCC_CORE

PC72

1

330U_D2_2.5VY_R9M

+

B B

A A

2

1

+

PC74
330U_D2_2.5VY_R9M

2

20120318
Change PC72,PC73,PC74,PC75 to 2 pin footprint

1

+

2

@

5

PC73
330U_D2_2.5VY_R9M

1

+

PC75
330U_D2_2.5VY_R9M

2

20120514
Unpop PC75
Change PC72,PC73,PC74,PC76 to SGA00006100 from 330U_D2_2.5VY_R9M SGA00002680

1

+

PC76
330U_D2_2.5VY_R9M

2

Security Classification

Security Classification

Security Classification

2008/09/15 2012/07/11

2008/09/15 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/15 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR - PROCESSOR DECOUPLING

PWR - PROCESSOR DECOUPLING

PWR - PROCESSOR DECOUPLING

LA-9601P

LA-9601P

LA-9601P

57 62Wednesday, January 09, 2013

57 62Wednesday, January 09, 2013

57 62Wednesday, January 09, 2013

1

0.1

0.1

0.1

5

4

3

2

Version change list (P.I.R. List) Page 1 of 2

for PWR

Reason for change PG# Modify List Date PhaseItem

1

1

For EC net name PR206 change pull high voltage to +EC_VCCA from +3VLP

D D

2

Intersil advise

VGA IMON setting Change PR853 to 11K SD034110280 from 11.3K 201203163

P48

1.Change PR848 to 1.47K SD000009480 from 1.15K

P54

2.Unmount PC864

P54

20120316

20120316

set OCP is 56A Change PR869 to 1.58K (SD00000SJ80) from 1K 201203164 P54

Add PJ507 for 1.5VP51For 1.5V current 5 20120321

P55

For B+ layout

6

C C

7 For HW net name 20120330

8 For HW power sequence P54

1.Change PC954 pull high to CPU_B+ from B+

P50

2.Change 3/5VALWP B+ input netname to CPU_B+

P51

3.Change 1.5VALWP B+ input netname to CPU_B+

4.Change PR411 netname to CPU_B+ from B+

P50

P53

1.Change +1.05S_VCCP netname to +V1.05S_VCCP

P54

2.Change PQ802.5 netname to +V1.05S_VCCP from +1.05VS

1.Add control PU801 pin GPU_PWR_EN and reserve PR956 0_0402_5%

2.Change PR820 to SD034150380 150K_0402_1% from 100K

3.Change PC810 to SE071101J80 100P_0402_50V8J from 0.1u

20120321

20120330

9 For Intersil advise Change PR853 pull down netname to gndP54 20120409

10 For IMON design P55 Change PU901 to NCP6132A from ISL95836 20120412

11 1.Del PJ803 PJ804

P54For layout design 20120511 DVT

2.Change net name to VGACORE from VGACOREP

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

B B

13 For CPU_CORE design fine tune and ON advise P57 Change PC72,PC73,PC74,PC76 to S POLY C 330U 2V M D2 ESR9M SGA00006100

14 For CPU_CORE design fine tune and ON advise P55 1.Change PC928 to 560P_0402_50V7K SE074561K80

12 P57For 1.05V, GFX_CORE,CPU_CORE design fine tune 20120514 DVT

15 DVT

A A

16 For HW VGA power sequence Add PR972 SD028000080 0_0402_5%

For material EOL P55 Change PH901,PH904 to SL200000L00 220K_0402_5%_TSM0B224J4702RE

5

4

Unpop PC58, PC66,PC75 330U_D2_2.5VY_R9M SGA00002680

from 330U_D2_2.5VY_R9M SGA00002680

from 680P_0402_50V7K SE074681K80

2.Change PR949,PR951 to 140K from 130K

3.Change PR912 to 71.5K_0603_1% SD014715280 from 63.4K_0603_1% SD014634280

4.Change PH901,PH904 to SL200000L00 220K_0402_5%_TSM0B224J4702RE
from SL200000500 220K_0402_5%_ERTJ0EV224J

from SL200000500 220K_0402_5%_ERTJ0EV224J

P54

Unmount PD801
Change PR820 to 0_0402_5% SD028000080 from 150K_0402_1% SD034150380
Unmount PC810

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/06 2012/07/11

2009/01/06 2012/07/11

2009/01/06 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

20120514 DVT

20120514 DVT

20120514

20120516 DVT

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PIR (PWR)

PIR (PWR)

PIR (PWR)

Zx90

1

58 62Wednesday, January 09, 2013

58 62Wednesday, January 09, 2013

58 62Wednesday, January 09, 2013

0.1

0.1

0.1

5

4

3

2

Version change list (P.I.R. List) Page 2 of 2

for PWR

Reason for change PG# Modify List Date PhaseItem

1

17 For HW reset function P50 1.Add PR420 SD028000080 0_0402_5% for reserve

D D

2 reserve.PR419 and PR420

20120606 PVT

For ACDET function18 P49 1.Change PR313 to 60.4K_0603_1% SD014604280 from 64.9K_0603_1% SD014649280 PVT20120615

19 For HW Grenn clock UMA sku trial tun P47 1. unmount PD103

2. Change PR108 to 150_0603_5% SD013150080 from 560_0603_5% SD013560080
Change PR109 to 1K_0603_5% SD013100180 from 560_0603_5% SD013560080

20120625 PVT

20 For ACDET function P49 1.Change PR313 to 59K_0603_1% SD014590280 from 60.4K_0603_1% SD014604280 20120705 PVT

21 For VR_HOT P55 1.unmount PR915 and PR946 20120705 PVT

22 For HW Grenn clock P47 1. mount PD103

C C

23 For material issue P51 1.Change PU502 to SA00004CY10 S IC RT8061AZQW WDFN 10P PWM

2. Change PR108 to 150_0603_5% SD013150080 from 560_0603_5% SD013560080
Change PR109 to 1K_0603_5% SD013100180 from 560_0603_5% SD013560080

from SA00003RU00 S IC SY8033BDBC DFN 10P SINGLE BUCK

20120723 SVT

20120723 SVT

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/06 2012/07/11

2009/01/06 2012/07/11

2009/01/06 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PIR (PWR)

PIR (PWR)

PIR (PWR)

Zx90

1

0.1

0.1

58 62Wednesday, January 09, 2013

58 62Wednesday, January 09, 2013

58 62Wednesday, January 09, 2013

0.1

5

4

COMPAL CONFIDENTIAL

3

2

1

MODEL NAME:
PCB NAME:

D D

REVISION:
DATE:

AC
MODE

BATT
MODE

C C

A1

VIN

BATT

B1

V

PU301

V

Power Sequence Block Diagram
LA-7981P

2011/07/13

A3

B4

B5

+3VALW
+5VALW

A5

V

B7 3

A2

PU401

V

B+

V

B2

B+

V

PQ2

EC

VV

A5

A4

ON/OFF

B7

B6

V

B3

51ON#

EC_ON

10

PCH_PWROK

+3V_PCH

3

V

V

PCH_RSMRST#_R

PBTN_OUT#

PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#
PM_SLP_SUS#

V

SYSON

SUSP#,SUSP

+5V_PCH

4

5

6

7 SYSON#

8

V V

+1.5V

V

PU501

3

V

PCH

10

PCH_PWROK

V

PM_DRAM_PWRGD

H_CPUPWRGD

PLT_RST#

SYS_PWROK

15

11

VGATE

14

V

12

CPU

V

16

SVID

13

V

DGPU_PWROK

DGPU_PWR_EN

PU601

B B

V

+VCC_SA

PU702

V

+V1.05S

PU602

V

+V1.05S_VCCP

U38

V

+5VS

U39

V

+3VS

Q8

VV

+1.5VS

(DIS)

8a

(DIS)

8b

V

DGPU

PU701
+0.75VS

SVID

13

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Power sequence

Power sequence

Power sequence

LA-9603P

LA-9603P

LA-9603P

1.0

1.0

60 62Wednesday, January 09, 2013

60 62Wednesday, January 09, 2013

1

60 62Wednesday, January 09, 2013

1.0

PU901
+VCC_CORE

V

3

8a

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

SA_PGOOD

VR_ON

A A

5

4

9

14

VGATE

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2 for HW PIR

Reason for change PG# Modify List Date PhaseItem

Initial

D D

1

For LVDS blacklight PWM

2

For Change Audio Woofer MOSFET from Dual to single channel Changer Part from SB00000EO10 to SB00000EN00

3

P33

P15

R431 change from 0ohm_short to 0ohm mount 5/7

5/7

EVT

EVT

EVT

For OVERT# Glitch issue at Power on status P23 Add QV9 5/7

4

For BT&WLAN Combo Card

5

For Factory request and cost down LVDS PIN Define P33 To Modify LVDS PIN Define 5/8

6

For USB Charger mode control request P45

7

C C

B B

8

To change Reset IC G601

Reserved Touch Screen Power Control

9

To change Speaker PIN define for ME routing request

10

for Realtek Vendor recommand

11

for ME request P39

12

for LAN Clock be better P37 change C990 value from 5PF to 0 ohm. 5/9

13

14

for Crystal finetune Capacitor P43 5/16

15

P36

P42

P42

P42
P43

P43for Audio Vendor recommand

16

17

for Surge request

18

for Reset IC function P42,

19

A A

P38 C1325,C1326,C1327 change package from

P50,P43

to modify R897 value from 0 ohm to 1K ohm
add BT_DISABLE_F_R on JWLN1.51
add R5580

To Add PWRSHARE_EN_R on U31.38
To Add EC_PWRSHARE_EN# on U31.74
add R5577 and R5578, delete CHG_ON#

to change R4959 value from 200K ohm to
0 ohm add R5579 0 ohm

add R5581,C1331,R5572,R5583,R5584 and Q156
add EC_TS_ON on U31.66
add +3VS_TS,+3VS_TS_R

SPK_L2+ R1556 net in JSPK1.1
SPK_L1- R1554 net in JSPK1.2
SPK_R1- R1555 net in JSPK1.3
SPK_R2+ R1553 net in JSPK1.4

R1123,C1134 close to U50.47
R5582,R1559 and C1135 Close to U73.1
EXT_MIC_R

To Modify H21,H7,H18 PCB Footprint as below
H21 from H_3P3 to H_4P6
H7 from H_2P8 to H_3P0
H18 from H_3P3 to H_3P9N

change JUSB3.11 from GND to +3VS
change JUSB3.12 from +3VS to AGND

C180,C181 from 18PF to 12PF

0402 to 0603

add R612,PR420,R4960,R4961
Delete R4959

5/8

5/8

5/8

5/8

5/8P41

5/8P41

5/8

5/10

5/17R695 from 33K to 18KP42for DVT Board ID request

5/23Change Reference from C990 to R5585P37for PVT request

5/23

5/24

EVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

PVT

PVT

PVT

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW-PIR1

HW-PIR1

HW-PIR1

LA-9603P

LA-9603P

LA-9603P

1

61 62Wednesday, January 09, 2013

61 62Wednesday, January 09, 2013

61 62Wednesday, January 09, 2013

1.0

1.0

1.0

5

4

3

2

1

Version change list (P.I.R. List) Page 2 of 2 for HW PIR

Reason for change PG# Modify List Date PhaseItem

D D

P18 Remove R5575,connect DGPU_PWR_EN to U31.pin89

modify N14P_GV2 GPU power sequence

20

P46
P46

11/13Add diode D60;D61

add discharge(Q157) for DGPU_PWR_EN

PVT

for GC6 function

21

for GC6 function

22

due to they are cap not resistor.

C C

B B

23

P46 Add a 0 ohm R5597 between Q129 pin 2 and Q130 pin 12/26

Change RV54 from 10K to 100kP23 11/29

R1108,R1112 location change to C1108,C1112P46 12/26

PVT

Pre-MP

Pre-MP

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2012/12/26 2012/07/11

2012/12/26 2012/07/11

2012/12/26 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW-PIR1

HW-PIR1

HW-PIR1

LA-9603P

LA-9603P

LA-9603P

62 62Wednesday, January 09, 2013

62 62Wednesday, January 09, 2013

62 62Wednesday, January 09, 2013

1

1.0

1.0

1.0