Compal LA-8971P VITU5, IdeaPad U510 Schematic

A

B

C

D

E

Compal Confidential

Model Name : VITU5

1 1

File Name : LA-8971P

Compal Confidential

2 2

VITU5 M/B Schematics Document

Intel Ivy Bridge ULV Processor + Panther Point PCH(HM77)

Nvidia chip:N13M-GS(23x23)

3 3

2012-02-16

REV:0.1

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

LA-8971P

E

0.1

1 58Thursday, February 16, 2012

0.1

A

Compal confidential

File Name :LA-8971P

B

C

D

E

Chief River

NV N13M-GS

1 1

23mm *23mm

PCI-E X16

VRAM 128*16

Gen 2

DDR3*4

Intel IVY Bridge ULV (Sandy Bridge)

Processor

BGA1023

DDR3-1333/1600

Dual Channel

DDR3-SO-DIMM X2

SATA3.0 HDD CONN

PCI Express (Full)

FDI *8

Std HDMI

Connector

2 2

LVDS Connector

6*PCI-E x1

Mini VGA Connector

100MHz

2.7GT/s

Intel Panther Point

HM77

FCBGA 989 Balls

25mm*25mm

PCI Express (Half) Mini card Slot 1

3 3

WLAN/WiMAX

PCI-E(WLAN)

SPI ROM

BIOS

4MB*1 2MB*1

ENE KB9012

LPC BUS

EC

DMI2 *4

100MHz 5GT/s

6*SATA

(port0,1 Support SATA3)

4*USB3.0

14*USB2.0

HD Audio

Mini card Slot 2

SSD(SATA3.0)

ODD (SATA2.0)

USB PORT 3.0 x1 (Left)

USB PORT 2.0 x2 (Right)

IO Board

Card Reader RTS 5178 (2in1)

IO Board

CMOS Camera

BlueTooth CONN

LAN(10/100/Giga)

Realtek 8105E-VD (10/100) 8111F-CGT (Giga)

Sub-borad

RJ45 CONN

ODD Board

4 4

POWER BOARD

LED BOARD

IO Board

USB2.0*2,card reader

A

B

Touch Pad

Thermal Sensor

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Int.KBD

Compal Secret Data

2011/07/21 2012/12/31

Compal Secret Data

Deciphered Date

Audio Codec

D

RealTek ALC259-VC2-CG

Title

Size Document Number Rev

Custom

Date: Sheet of

2Channel Speaker

Single Digital MIC

Audio Combo Jack (APPLE type)

HeadPhone Output Microphone Input

Compal Electronics, Inc.

MB Block Diagram

LA-8971P

2 58Wednesday, February 15, 2012

E

0.2

A

Voltage Rails

power

State

S0

S3

S5 S4/AC

Device

Smart Battery

plane

Address

0001 011X b

+B

O

X

+5VALW

+3VALW

O

X

X X X

+1.5V

EC SM Bus2 address

Device

Thermal Sensor F75303M

1 1

2 2

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

EC SM Bus1 address

PCH SM Bus address

Device Address

DDR DIMM0

3 3

DDR DIMM2

1001 000Xb

1001 010Xb

AMD-GPU SM Bus address

Device Address

Internal thermal sensor

1001 111Xb (0x9E)

SMBUS Control Table

SOURCE

SMB_EC_CK1

SMB_EC_DA1

SMB_EC_CK2

SMB_EC_DA2

4 4

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

KB9012

+3VALW

KB9012

+3VALW

PCH

+3VALW

PCH

+3VALW

PCH

+3VALW

VGA BATT KB9012 SODIMM

X V

+3VALW

X

V

+3VS

A

X

+3VS

X

V

+3VS

X

V

B

+5VS

+3VS

+1.5VS

+V1.05S_VCCP

+VCC_CORE

+VGA_CORE

+VCC_GFXCORE_AXG

+1.8VS

+0.75VS

+1.05VS

O

X X

X

Address

1001_101xb

X

XX

V

+3VS

Thermal Sensor

X

WLAN WWAN

XX

X

V

+3VS

B

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

D

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

HIGH

LOWLOWLOW

HIGHHIGHHIGH

HIGH

ON

E

ONONON ON

ON

OFF

ON

OFF

LOW

OFF

Board ID / SKU ID Table for AD channelBOARD ID Table

Board ID

0

PCB Revision

0.1

1 2 3 4

OO

5 6 7

X

USB Port Table

X

USB 3.0

xHCI1 xHCI2 xHCI3 xHCI4

HM70 Disable xHCI3,xHCI4

USB 2.0 Port

UHCI0

UHCI1

EHCI1

UHCI2

UHCI3

UHCI4

EHCI2

UHCI5

UHCI6

SATA Port Table

SATA P0

PCH

X

V

+3VS

SATA P1 SATA P2 SATA P3 SATA P4 SATA P5

HM70 Disable P1,P3

X

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

3 External USB Port

0

USB 3.0 Port (Left Side)

1 2 3 4 5 6 7 8

9 10 11 12 13

USB/B (Right Side USB-BD)

X (USB PORT disabled on HM70 )

Camera Blue Tooth Mini Card(WLAN)

USB Port (Right Side CR-BD)

X (USB PORT disabled on HM70 )

HM77

GEN3/2/1

GEN2/1

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V

1.935 V

2.500 V

HM70

GEN3/2/1

DisableGEN3/2/1

GEN2/1

Disable

GEN2/1

SSD

HDD (HM77)

HDD (HM70)

V typ

AD_BID

0.503 V

0.819 V

0 V

V

AD_BID

0.538 V

0.875 V

max

0 V

1.185 V 1.264 V

1.650 V 1.759 V

2.200 V

3.300 V

2.341 V

3.300 V

BOM Structure Table

BTO Item BOM Structure

INTEL UMA only UMA@

XTX@ GPU:Seymour XTX

HDMI HDMI@ HDD1 (HM77 SATA 3.0) HDD1@ HDD2 (HM70 SATA 2.0) HDD2@ Interna-Intel-USB3.0 IU3@ Interna-Intel-USB2.0 IU2@ Blue Tooth BT@ 10/100 LAN 8105E@ GIGA LAN 8111F@ Connector ME@ 45 LEVEL 45@ Unpop

@

PCIe Port Table

HM77

PCIe P1 PCIe P2 PCIe P3 PCIe P4 PCIe P5 PCIe P6 PCIe P7 PCIe P8

Enable

HM70 Disable P5,P6,P7,P8

HM70

Enable

Disable

LAN

WLAN

Porject Phase

G-series

MP

G-series

PVT

G-series

DVT

G-series

EVT

Y-series

EVT

Y-series

DVT

Y-series

PVT

Y-series

MP

X

Security Classification

XX X

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

LA-7981P

3 58Wednesday, February 15, 2012

E

0.2

5

4

3

2

1

Hot plug detect for IFP link C

VGA and GDDR3 Voltage Rails (N13x GPIO)

GPIO I/O ACTIVE Function Description

+3VS_VGA

+VGA_CORE

+1.5VS_VGA

OUT GPU VID4-

OUT

I/O

OUT

IN

OUT

IN

OUT

IN

-

GPU VID3OUT

Panel Back-Light brightness(PWM capable)

H

Panel Power Enable

H

Panel Back-Light On/Off (PWM)

H

GPU VID1

-

GPU VID2

-

N/A

Thermal Catastrophic Over Temperature

-

Thermal Alert

-

Memory VREF Control

-

GPU VID0-OUT

AC Power Detect Input

GPU VID5-

N/A

Hot plug detect for IFP link C

N/A

Hot Plug Detect for IFPE

N/A

tNVVDD >0

tFBVDDQ >0

tPEX_VDD >0

(10K pull low)

GPIO0

D D

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

C C

GPIO11

GPIO12

GPIO13

GPIO14

GPIO15

GPIO16

GPIO17

GPIO18

GPIO19

B B

+1.05VS_VGA

Performance Mode P0 TDP at Tj = 102 C* (GDDR3)

GPU Mem NVCLK

Products

N13P-GL 64bit 1GB GDDR3

Physical Strapping pin

ROM_SCLK

(4) (1,5) (6)

(W) (W) (MHz)

TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD

ROM_SI

ROM_SO FB[0]

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

/MCLK NVVDD

TBD TBD

Power Rail

+3VS_VGA

(V) (A) (W) (A) (W)

Logical Strapping Bit3

PCI_DEVID[4]

FB[1]

PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]

SOR3_EXPOSED

RESERVED PCIE_SPEED_

FBVDD

Logical Strapping Bit2

SUB_VENDOR

USER[2] USER[1] USER[0]USER[3]

3GIO_PAD_CFG_ADR[2] 3GIO_PAD_CFG_ADR[1]3GIO_PAD_CFG_ADR[3]

SOR2_EXPOSED SOR1_EXPOSED

CHANGE_GEN3

Device ID

N13P-GL (28nm)

N13M-GE (28nm)

GPU STRAP2 STRAP1 STRAP0

N13P-GL N13M-GE

???

FB Memory (GDDR3)

Samsung 2500MHz

Hynix 2500MHz

Samsung 2500MHz

2500MHz

K4G10325FG-HC04

H5GQ1H24BFR-T2C

K4G20325FG-HC04

H5GQ2H24MFR-T2CHynix

ROM_SO

32Mx32

32Mx32 PD 15K

PD 10K

64Mx32

FBVDDQ PCI Express I/O and (GPU+Mem) (1.35V)(1.35V)

(A) (W) (W)(mA) (W) (W) (W)(mA) (mA) (mA)

(1.05V)

Logical Strapping Bit1

SLOT_CLK_CFG

RAM_CFG[1]RAM_CFG[3] RAM_CFG[2]

PLLVDD

Logical Strapping Bit0

PEX_PLL_EN_TERM

RAM_CFG[0]

VGA_DEVICESMB_ALT_ADDR

3GIO_PAD_CFG_ADR[0]

PCIE_MAX_SPEED DP_PLL_VDD33V

SOR0_EXPOSED

ROM_SCLK ROM_SI

PD 15K

PD 20KPD 10K PU 45K

PU 20K

PD 15K PD 35KPU 20KPD 10K PD 20K PU 45K

PD 15K PD 35KPU 20KPD 10K PD 20K PU 45K64Mx32

X76

I/O and PLLVDD

PD 35K

Other

(3.3V)(1.05V)(1.8V)

PU 45K

1. all power rail ramp up time should be larger than 40us

2. Optimus system VDD33 avoids drop down earlier than NVDD and FBVDDQ

A A

1.all GPU power rails should be turned off within 10ms

5

Tpower-off <10ms

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA Notes List

LA-7981P

4 58Wednesday, February 15, 2012

1

0.2

A

1 1

DMI_CRX_PTX_N0<16> DMI_CRX_PTX_N1<16> DMI_CRX_PTX_N2<16> DMI_CRX_PTX_N3<16>

DMI_CRX_PTX_P0<16> DMI_CRX_PTX_P1<16> DMI_CRX_PTX_P2<16> DMI_CRX_PTX_P3<16>

DMI_CTX_PRX_N0<16> DMI_CTX_PRX_N1<16> DMI_CTX_PRX_N2<16> DMI_CTX_PRX_N3<16>

DMI_CTX_PRX_P0<16> DMI_CTX_PRX_P1<16> DMI_CTX_PRX_P2<16> DMI_CTX_PRX_P3<16>

FDI_CTX_PRX_N0<16> FDI_CTX_PRX_N1<16> FDI_CTX_PRX_N2<16>

2 2

+1.05VS_VTT

12

R247

24.9_0402_1%

3 3

eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms can't be left floating ,even if disable eDP function...

W=12mil L=500mil S=15mil

FDI_CTX_PRX_N3<16> FDI_CTX_PRX_N4<16> FDI_CTX_PRX_N5<16> FDI_CTX_PRX_N6<16> FDI_CTX_PRX_N7<16>

FDI_CTX_PRX_P0<16> FDI_CTX_PRX_P1<16> FDI_CTX_PRX_P2<16> FDI_CTX_PRX_P3<16> FDI_CTX_PRX_P4<16> FDI_CTX_PRX_P5<16> FDI_CTX_PRX_P6<16> FDI_CTX_PRX_P7<16>

FDI_FSYNC0<16> FDI_FSYNC1<16>

FDI_INT<16>

FDI_LSYNC0<16> FDI_LSYNC1<16>

EDP_COMP

B

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

UCPU1A

M2

DMI_RX#[0]

P6

DMI_RX#[1]

P1

DMI_RX#[2]

P10

DMI_RX#[3]

N3

DMI_RX[0]

P7

DMI_RX[1]

P3

DMI_RX[2]

P11

DMI_RX[3]

K1

DMI_TX#[0]

M8

DMI_TX#[1]

N4

DMI_TX#[2]

R2

DMI_TX#[3]

K3

DMI_TX[0]

M7

DMI_TX[1]

P4

DMI_TX[2]

T3

DMI_TX[3]

U7

FDI0_TX#[0]

W11

FDI0_TX#[1]

W1

FDI0_TX#[2]

AA6

FDI0_TX#[3]

W6

FDI1_TX#[0]

V4

FDI1_TX#[1]

Y2

FDI1_TX#[2]

AC9

FDI1_TX#[3]

U6

FDI0_TX[0]

W10

FDI0_TX[1]

W3

FDI0_TX[2]

AA7

FDI0_TX[3]

W7

FDI1_TX[0]

T4

FDI1_TX[1]

AA3

FDI1_TX[2]

AC8

FDI1_TX[3]

AA11

FDI0_FSYNC

AC12

FDI1_FSYNC

U11

FDI_INT

AA10

FDI0_LSYNC

AG8

FDI1_LSYNC

AF3

eDP_COMPIO

AD2

eDP_ICOMPO

AG11

eDP_HPD#

AG4

eDP_AUX#

AF4

eDP_AUX

AC3

eDP_TX#[0]

AC4

eDP_TX#[1]

AE11

eDP_TX#[2]

AE7

eDP_TX#[3]

AC1

eDP_TX[0]

AA4

eDP_TX[1]

AE10

eDP_TX[2]

AE6

eDP_TX[3]

IVY-BRIDGE_BGA1023

C

W=12mil L=500mil S=15mil

PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]

G3 G1 G4

H22 J21 B22 D21 A19 D17 B14 D13

PEG_GTX_C_HRX_N8

A11

PEG_GTX_C_HRX_N9

B10

PEG_GTX_C_HRX_N10

G8

PEG_GTX_C_HRX_N11

A8

PEG_GTX_C_HRX_N12

B6

PEG_GTX_C_HRX_N13

H8

PEG_GTX_C_HRX_N14

E5 K7

K22 K19 C21 D19 C19 D16 C13 D12

PEG_GTX_C_HRX_P8

C11

PEG_GTX_C_HRX_P9

C9

PEG_GTX_C_HRX_P10

F8

PEG_GTX_C_HRX_P11

C8

PEG_GTX_C_HRX_P12

C5

PEG_GTX_C_HRX_P13

H6

PEG_GTX_C_HRX_P14

F6 K6

G22 C23 D23 F21 H19 C17 K15 F17

PEG_HTX_GRX_N8

F14

PEG_HTX_GRX_N9

A15

PEG_HTX_GRX_N10

J14

PEG_HTX_GRX_N11

H13

PEG_HTX_GRX_N12

M10

PEG_HTX_GRX_N13

F10

PEG_HTX_GRX_N14

D9 J4

F22 A23 D24 E21 G19 B18 K17 G17

PEG_HTX_GRX_P8

E14

PEG_HTX_GRX_P9

C15

PEG_HTX_GRX_P10

K13

PEG_HTX_GRX_P11

G13

PEG_HTX_GRX_P12

K10

PEG_HTX_GRX_P13

G10

PEG_HTX_GRX_P14

D8 K4

Typ- suggest 220nF. The change in AC capacitor value from 100nF to 220nF is to enable compatibility with future platforms having PCIE Gen3 (8GT/s)

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1]

DMI Intel(R) FDI

eDP

PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8]

PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PCI EXPRESS -- GRAPHICS

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

PEG_COMP

+1.05VS_VTT

12

R249

24.9_0402_1%

C259 0.22U_0402_6.3V6KOPT@C259 0.22U_0402_6.3V6KOPT@

1 2

C276 0.22U_0402_6.3V6KOPT@C276 0.22U_0402_6.3V6KOPT@

1 2

C257 0.22U_0402_6.3V6KOPT@C257 0.22U_0402_6.3V6KOPT@

1 2

C274 0.22U_0402_6.3V6KOPT@C274 0.22U_0402_6.3V6KOPT@

1 2

C254 0.22U_0402_6.3V6KOPT@C254 0.22U_0402_6.3V6KOPT@

1 2

C272 0.22U_0402_6.3V6KOPT@C272 0.22U_0402_6.3V6KOPT@

1 2

C252 0.22U_0402_6.3V6KOPT@C252 0.22U_0402_6.3V6KOPT@

1 2

C270 0.22U_0402_6.3V6KOPT@C270 0.22U_0402_6.3V6KOPT@

1 2

C258 0.22U_0402_6.3V6KOPT@C258 0.22U_0402_6.3V6KOPT@

1 2

C277 0.22U_0402_6.3V6KOPT@C277 0.22U_0402_6.3V6KOPT@

1 2

C256 0.22U_0402_6.3V6KOPT@C256 0.22U_0402_6.3V6KOPT@

1 2

C275 0.22U_0402_6.3V6KOPT@C275 0.22U_0402_6.3V6KOPT@

1 2

C255 0.22U_0402_6.3V6KOPT@C255 0.22U_0402_6.3V6KOPT@

1 2

C273 0.22U_0402_6.3V6KOPT@C273 0.22U_0402_6.3V6KOPT@

1 2

C253 0.22U_0402_6.3V6KOPT@C253 0.22U_0402_6.3V6KOPT@

1 2

C271 0.22U_0402_6.3V6KOPT@C271 0.22U_0402_6.3V6KOPT@

1 2

C562 0.22U_0402_6.3V6KOPT@C562 0.22U_0402_6.3V6KOPT@

1 2

C582 0.22U_0402_6.3V6KOPT@C582 0.22U_0402_6.3V6KOPT@

1 2

C564 0.22U_0402_6.3V6KOPT@C564 0.22U_0402_6.3V6KOPT@

1 2

C584 0.22U_0402_6.3V6KOPT@C584 0.22U_0402_6.3V6KOPT@

1 2

C566 0.22U_0402_6.3V6KOPT@C566 0.22U_0402_6.3V6KOPT@

1 2

C587 0.22U_0402_6.3V6KOPT@C587 0.22U_0402_6.3V6KOPT@

1 2

C568 0.22U_0402_6.3V6KOPT@C568 0.22U_0402_6.3V6KOPT@

1 2

C589 0.22U_0402_6.3V6KOPT@C589 0.22U_0402_6.3V6KOPT@

1 2

C561 0.22U_0402_6.3V6KOPT@C561 0.22U_0402_6.3V6KOPT@

1 2

C583 0.22U_0402_6.3V6KOPT@C583 0.22U_0402_6.3V6KOPT@

1 2

C563 0.22U_0402_6.3V6KOPT@C563 0.22U_0402_6.3V6KOPT@

1 2

C585 0.22U_0402_6.3V6KOPT@C585 0.22U_0402_6.3V6KOPT@

1 2

C565 0.22U_0402_6.3V6KOPT@C565 0.22U_0402_6.3V6KOPT@

1 2

C586 0.22U_0402_6.3V6KOPT@C586 0.22U_0402_6.3V6KOPT@

1 2

C567 0.22U_0402_6.3V6KOPT@C567 0.22U_0402_6.3V6KOPT@

1 2

C588 0.22U_0402_6.3V6KOPT@C588 0.22U_0402_6.3V6KOPT@

1 2

D

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with max length = 500 mils

- typical impedance = 14.5 mohms

PEG_GTX_HRX_N8 PEG_GTX_HRX_N9 PEG_GTX_HRX_N10 PEG_GTX_HRX_N11 PEG_GTX_HRX_N12 PEG_GTX_HRX_N13 PEG_GTX_HRX_N14 PEG_GTX_HRX_N15PEG_GTX_C_HRX_N15

PEG_GTX_HRX_P8 PEG_GTX_HRX_P9 PEG_GTX_HRX_P10 PEG_GTX_HRX_P11 PEG_GTX_HRX_P12 PEG_GTX_HRX_P13 PEG_GTX_HRX_P14 PEG_GTX_HRX_P15PEG_GTX_C_HRX_P15

PEG_HTX_C_GRX_N8 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_N15PEG_HTX_GRX_N15

PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_P9 PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_P11 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_P15PEG_HTX_GRX_P15

E

PEG_GTX_HRX_N[8..15] <23> PEG_GTX_HRX_P[8..15] <23>

PEG_HTX_C_GRX_N[8..15] <23> PEG_HTX_C_GRX_P[8..15] <23>

4 4

Security Classification

2011/06/24 2012/07/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/24 2012/07/12

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(1/7) DMI,FDI,PEG

LA-8971P

5 58Wednesday, February 15, 2012

E

0.1

A

B

C

D

E

1 1

PCH->CPU UNCOREPWRGOOD:CORE󰇞󰇞󰇞󰇞OK SM_DRAMPWROK:DRAM power ok RESET#:ok󰒏󰒏󰒏󰒏CPUreset

Follow DG 1.5& Tacoma_Fall2 1.0

reserve

@

C614 0.1U_0402_16V4Z

12

R292

12

10K_0402_5%

2 2

H_CPUPWRGD_R

UNCOREPWRGOOD:CORE󰇞󰇞󰇞󰇞OK

3 3

SYS_PWROK<16>

PM_DRAM_PWRGD<16>

RUN_ON_CPU1.5VS3#<10>

+3VS

SYS_PWROK

SUSP<10,47,52>

R31 10K_0402_5%R31 10K_0402_5%

1 2

R60 10K_0402_5%@R60 10K_0402_5%@

1 2

0.1U_0402_16V4Z

PM_DRAM_PWRGD

RUN_ON_CPU1.5VS3#

C228

PROC_SELECT# PH VCPLL and connect to PCH DF_TVS

R534

4

H_CPUPWRGD<19>

1 2

62_0402_5%

+1.5V_CPU_VDDQ

2

G

12

1

2

+1.05VS_VTT

H_PROCHOT#<42,49>

+3VALW

B

A

R13

R14

5

P

O

G

U22

3

74AHC1G09GW_TSSOP5

@R13

@

1 2

0_0402_5%

@R14

@

1 2

0_0402_5%

XBOX 

12

R238

R238 200_0402_5%

200_0402_5%

PM_SYS_PWRGD_BUF

12

@

R38

R38 39_0402_5%

39_0402_5%

13

D

@

Q4

Q4 2N7002K_SOT23-3

2N7002K_SOT23-3

S

H_SNB_IVB#<18>

R35

@R35

@

12

10K_0402_5%

@

H_CATERR#

T33

T33 PAD

PAD

H_PECI<19,42>

R533

1 2

56_0402_5%

H_THERMTRIP#<19>

H_PM_SYNC<16>

R305

1 2

0_0402_5%

R237

1 2

130_0402_1%

H_PECI

H_PROCHOT#_RH_PROCHOT#

H_THERMTRIP#

H_PM_SYNC

H_CPUPWRGD_RH_CPUPWRGD

VDDPWRGOOD_R

BUF_CPU_RST#

F49

C57

C49

A48

C45

D45

C48

B46

BE45

D44

0.1U_0402_16V4Z

UCPU1B

PROC_SELECT#

PROC_DETECT#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPWRGOOD

SM_DRAMPWROK

RESET#

IVY-BRIDGE_BGA1023

1 2

43_0402_5%

12

@

C43

R544

MISC THERMAL PWR MANAGEMENT

CLOCKS

DDR3

JTAG & BPM

Buffered reset to CPU

+1.05VS_VTT

12

R546

R546 75_0402_5%

75_0402_5%

BUFO_CPU_RST#

MISC

4

Y

R9

+3VS

0_0402_5%

BCLK

BCLK#

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PRDY# PREQ#

TCK

TMS

TRST#

TDI

TDO

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

12

C617

0.1U_0402_16V4Z

U45

5

SN74LVC1G07DCKR_SC70-5

1

P

NC

PCH_PLTRST#

2

A

G

3

@R9

@

12

CLK_CPU_DMI

J3

CLK_CPU_DMI#

H2

CLK_CPU_DPLL

AG3

CLK_CPU_DPLL#

AG1

SM_RCOMP0,SM_RCOMP1 W=20mil L=500mil S=13mil

SM_RCOMP2 W=15mil L=500mil S=13mil

H_DRAMRST#

AT30

SM_RCOMP0

BF44

SM_RCOMP1

BE43

SM_RCOMP2

BG43

R516 1K_0402_5%R516 1K_0402_5% R517 1K_0402_5%R517 1K_0402_5%

R272 140_0402_1%R272 140_0402_1%

1 2

R273 25.5_0402_1%R273 25.5_0402_1%

1 2

R267 200_0402_1%R267 200_0402_1%

1 2

DDR3 Compensation Signals

N53 N55

XDP_TCK

L56

XDP_TMS

L55

XDP_TRST#

J58

XDP_TDI

M60

XDP_TDO

L59

XDP_DBRESET#

K58

G58 E55 E59 G55 G59 H60 J59 J61

PCH_PLTRST# <18>

CLK_CPU_DMI <15> CLK_CPU_DMI# <15>

1 2

12

+1.05VS_VTT

100P_0402_50V8J

1

@

C82

2

H_DRAMRST# <7>

ESD C Reserve

XDP_TMS

R20 51_0402_5%R20 51_0402_5%

XDP_TDI

R39 51_0402_5%R39 51_0402_5%

XDP_TDO

R37 51_0402_5%R37 51_0402_5%

XDP_TCK

R40 51_0402_5%R40 51_0402_5%

XDP_TRST#

R28 51_0402_5%R28 51_0402_5%

PU/PD for JTAG signals

XDP_DBRESET#

Tacoma_Fall2 1.0 PH 1K +3VS Check list 1.5 PH 1K +3VS Debug port DG1.1-1.3 50~5K ohm

R312 1K_0402_5%@R312 1K_0402_5%@

+1.05VS_VTT

12 12 12

12 12

+3VS

12

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(2/7) DDRIII

LA-8971P

E

6 58Wednesday, February 15, 2012

0.1

A

UCPU1C

AP11

AJ10

AR11

AT13 AU13

BA13 BB11

AY13 AV14 AR14 AY17 AR19 BA14 AU14 BB14 BB17 BA45 AR43

AW48

BC48 BC45 AR45 AT48 AY48 BA49 AV49 BB51 AY53 BB49 AU49 BA53 BB55 BA55 AV56 AP50 AP53 AV54 AT54 AP56 AP52 AN57 AN53 AG56 AG53 AN55 AN52 AG55 AK56

BD37 BF36 BA28

BE39 BD39 AT41

UCPU1C

AG6

SA_DQ[0]

AJ6

SA_DQ[1] SA_DQ[2]

AL6

SA_DQ[3] SA_DQ[4]

AJ8

SA_DQ[5]

AL8

SA_DQ[6]

AL7

SA_DQ[7] SA_DQ[8]

AP6

SA_DQ[9]

AU6

SA_DQ[10]

AV9

SA_DQ[11]

AR6

SA_DQ[12]

AP8

SA_DQ[13] SA_DQ[14] SA_DQ[15]

BC7

SA_DQ[16]

BB7

SA_DQ[17] SA_DQ[18] SA_DQ[19]

BA7

SA_DQ[20]

BA9

SA_DQ[21]

BB9

SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

DDR_A_D[0..63]<12>

1 1

2 2

DDR_A_BS0<12> DDR_A_BS1<12>

3 3

DDR_A_BS2<12>

DDR_A_CAS#<12> DDR_A_RAS#<12> DDR_A_WE#<12>

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_CAS# DDR_A_RAS# DDR_A_WE# DDR_A_MA15

B

M_CLK_DDR0

AU36

SA_CK[0]

SA_CK#[0]

SA_CKE[0]

SA_CK[1]

SA_CK#[1]

SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

DDR SYSTEM MEMORY A

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AV36 AY26

AT40 AU40 BB26

BB40 BC41

AY40 BA41

AL11 AR8 AV11 AT17 AV45 AY51 AT55 AK55

AJ11 AR10 AY11 AU17 AW45 AV51 AT56 AK54

BG35 BB34 BE35 BD35 AT34 AU34 BB32 AT32 AY32 AV32 BE37 BA30 BC30 AW41 AY28 AU26

M_CLK_DDR#0 DDR_CKE0_DIMMA

M_CLK_DDR1 M_CLK_DDR#1 DDR_CKE1_DIMMA

DDR_CS0_DIMMA# DDR_CS1_DIMMA#

M_ODT0 M_ODT1

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14

M_CLK_DDR0 <12> M_CLK_DDR#0 <12> DDR_CKE0_DIMMA <12>

M_CLK_DDR1 <12> M_CLK_DDR#1 <12> DDR_CKE1_DIMMA <12>

DDR_CS0_DIMMA# <12> DDR_CS1_DIMMA# <12>

M_ODT0 <12> M_ODT1 <12>

DDR_A_DQS#[0..7] <12>

DDR_A_DQS[0..7] <12>

DDR_A_MA[0..15] <12>

C

UCPU1D

BD13 BF12

BD10 BD14 BE13 BF16 BE17 BE18 BE21 BE14 BG14 BG18 BF19 BD50 BF48 BD53 BF52 BD49 BE49 BD54 BE53 BF56 BE57 BC59 AY60 BE54 BG54

BA58 AW59 AW58

AU58

AN61

AN59

AU59

AU61

AN58

AR58

AK58

AL58 AG58 AG59 AM60

AL59 AF61 AH60

BG39 BD42 AT22

AV43 BF40 BD45

UCPU1D

AL4

SB_DQ[0]

AL1

SB_DQ[1]

AN3

SB_DQ[2]

AR4

SB_DQ[3]

AK4

SB_DQ[4]

AK3

SB_DQ[5]

AN4

SB_DQ[6]

AR1

SB_DQ[7]

AU4

SB_DQ[8]

AT2

SB_DQ[9]

AV4

SB_DQ[10]

BA4

SB_DQ[11]

AU3

SB_DQ[12]

AR3

SB_DQ[13]

AY2

SB_DQ[14]

BA3

SB_DQ[15]

BE9

SB_DQ[16]

BD9

SB_DQ[17] SB_DQ[18] SB_DQ[19]

BF8

SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

DDR_B_D[0..63]<13>

DDR_B_BS0<13> DDR_B_BS1<13> DDR_B_BS2<13>

DDR_B_CAS#<13> DDR_B_RAS#<13> DDR_B_WE#<13>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_CAS# DDR_B_RAS# DDR_B_WE#

D

SB_CK[0] SB_CK#[0] SB_CKE[0]

SB_CK[1] SB_CK#[1] SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY B

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

BA34 AY34 AR22

BA36 BB36 BF27

BE41 BE47

AT43 BG47

AL3 AV3 BG11 BD17 BG51 BA59 AT60 AK59

AM2 AV1 BE11 BD18 BE51 BA61 AR59 AK61

BF32 BE33 BD33 AU30 BD30 AV30 BG30 BD29 BE30 BE28 BD43 AT28 AV28 BD46 AT26 AU22

M_CLK_DDR2 M_CLK_DDR#2 DDR_CKE2_DIMMB

M_CLK_DDR3 M_CLK_DDR#3 DDR_CKE3_DIMMB

DDR_CS2_DIMMB# DDR_CS3_DIMMB#

M_ODT2 M_ODT3

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

E

M_CLK_DDR2 <13> M_CLK_DDR#2 <13> DDR_CKE2_DIMMB <13>

M_CLK_DDR3 <13> M_CLK_DDR#3 <13> DDR_CKE3_DIMMB <13>

DDR_CS2_DIMMB# <13> DDR_CS3_DIMMB# <13>

M_ODT2 <13> M_ODT3 <13>

DDR_B_DQS#[0..7] <13>

DDR_B_DQS[0..7] <13>

DDR_B_MA[0..15] <13>

IVY-BRIDGE_BGA1023

+1.5V

R216

@R216

@

1 2

0_0402_5%

R217

0_0402_5%

D

S

D

S

12

13

Q16

Q16 BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

G

2

1

C190

0.047U_0402_16V7K

2

SM_DRAMRST#_R

CPUDIMMreset

H_DRAMRST#<6>

4 4

DRAMRST_CNTRL_PCH<10,15>

H_DRAMRST#

DRAMRST_CNTRL_PCH

A

4.99K_0402_1%

12

R212

1K_0402_5%

R219

1 2

1K_0402_5%

S0 DRAMRST_CNTRL_PCH hgih ,MOS ON SM_DRAMRST# HIGH,DDR3 DRAMRST# HIGH Dimm not reset S3 DRAMRST_CNTRL_PCH Low ,MOS OFF SM_DRAMRST# lo,DDR3 DRAMRST# HIGH Dimm not reset S4,5 DRAMRST_CNTRL_PCH Low ,MOS OFF SM_DRAMRST# lo,DDR3 DRAMRST# low Dimm reset

B

SM_DRAMRST# <12,13>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/07/12

IVY-BRIDGE_BGA1023

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(3/7) DDRIII

LA-8971P

E

7 58Wednesday, February 15, 2012

0.1

A

B

C

D

E

CFG Straps for Processor

UCPU1E

@

T32

T32 PAD

PAD

1 1

2 2

3 3

+CPU_CORE

12

+VGFX_CORE

12

R302

49.9_0402_1%

@

R91

R91 100_0402_1%

100_0402_1%

R306

49.9_0402_1%

R310

49.9_0402_1%

@

R95

R95 100_0402_1%

100_0402_1%

R311

49.9_0402_1%

VCC_VAL_SENSE

VSS_VAL_SENSE

VAXG_VAL_SENSE

VSSAXG_VAL_SENSE

VCC_VAL_SENSE VSS_VAL_SENSE

VAXG_VAL_SENSE VSSAXG_VAL_SENSE

@

T18

T18 PAD

PAD

CFG0

CFG2

CFG4 CFG5 CFG6 CFG7

B50

CFG[0]

C51

CFG[1]

B54

CFG[2]

D53

CFG[3]

A51

CFG[4]

C53

CFG[5]

C55

CFG[6]

H49

CFG[7]

A55

CFG[8]

H51

CFG[9]

K49

CFG[10]

K53

CFG[11]

F53

CFG[12]

G53

CFG[13]

L51

CFG[14]

F51

CFG[15]

D52

CFG[16]

L53

CFG[17]

H43

VCC_VAL_SENSE

K43

VSS_VAL_SENSE

H45

VAXG_VAL_SENSE

K45

VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48

RSVD6

K48

RSVD7

BA19

RSVD8

AV19

RSVD9

AT21

RSVD10

BB21

RSVD11

BB19

RSVD12

AY21

RSVD13

BA22

RSVD14

AY22

RSVD15

AU19

RSVD16

AU21

RSVD17

BD21

RSVD18

BD22

RSVD19

BD25

RSVD20

BD26

RSVD21

BG22

RSVD22

BE22

RSVD23

BG26

RSVD24

BE26

RSVD25

BF23

RSVD26

BE24

RSVD27

IVY-BRIDGE_BGA1023

BCLK_ITP

BCLK_ITP#

RSVD30 RSVD31 RSVD32 RSVD33

RSVD34 RSVD35 RSVD36 RSVD37 RSVD38

RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44

RESERVED

RSVD45

DC_TEST_A4 DC_TEST_C4 DC_TEST_D3

DC_TEST_D1 DC_TEST_A58 DC_TEST_A59

DC_TEST_C59

DC_TEST_A61

DC_TEST_C61 DC_TEST_D61

DC_TEST_BD61

DC_TEST_BE61

DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58

DC_TEST_BG4 DC_TEST_BG3 DC_TEST_BE3 DC_TEST_BG1 DC_TEST_BE1 DC_TEST_BD1

N59 N58

N42 L42 L45 L47

M13 M14 U14 W14 P13

AT49 K24

AH2 AG13 AM14 AM15

N50

A4 C4 D3 D1 A58 A59 C59 A61 C61 D61 BD61 BE61 BE59 BG61 BG59 BG58 BG4 BG3

These pins are for solder joint

BE3

reliability and non-critical to

BG1 BE1

function. For BGA only.

BD1

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

eDP enable

CFG4

PCIE Port Bifurcation Straps

CFG[6:5]

CFG2

*

CFG5

CFG6

R543

1K_0402_1%

11: (Default) 1x16 PCI Express

*

10: 2x8 PCI Express

12

R296

R296 1K_0402_1%

1K_0402_1%

1: Normal Operation; Lane # definition matches socket pin map definition

0:Lane Reversed

CFG4

12

UMA,Optimus eDP DISO eDP󰡣󰡣󰡣󰡣

@

R293

R293 1K_0402_1%

1K_0402_1%

1:Disable

0:Enable

12

@

R541

R541 1K_0402_1%

1K_0402_1%

01: Reserved

00: 1x8,2x4 PCI Express

CFG7

12

@

R297

R297 1K_0402_1%

1K_0402_1%

PEG DEFER TRAINING

CFG7

1: (Default) PEG Train immediately following xxRESETB de assertion

Tacoma_Fall2 1.0 P.12

0: PEG Wait for BIOS for training

4 4

Security Classification

2011/06/24 2012/07/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/24 2012/07/12

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/7) RSVD,CFG

LA-8971P

8 58Wednesday, February 15, 2012

E

0.1

A

1 1

INTEL Recommend VCC 4*470UF,12*22uF(0805) and 35*2.2uF(0402) PD0.8 CAP at Power side

2 2

3 3

4 4

B

UCPU1F

ULV type

UCPU1F

DC 33A

+CPU_CORE

A26

VCC[1]

A29

VCC[2]

A31

VCC[3]

A34

VCC[4]

A35

VCC[5]

A38

VCC[6]

A39

VCC[7]

A42

VCC[8]

C26

VCC[9]

C27

VCC[10]

C32

VCC[11]

C34

VCC[12]

C37

VCC[13]

C39

VCC[14]

C42

VCC[15]

D27

VCC[16]

D32

VCC[17]

D34

VCC[18]

D37

VCC[19]

D39

VCC[20]

D42

VCC[21]

E26

VCC[22]

E28

VCC[23]

E32

VCC[24]

E34

VCC[25]

E37

VCC[26]

E38

VCC[27]

F25

VCC[28]

F26

VCC[29]

F28

VCC[30]

F32

VCC[31]

F34

VCC[32]

F37

VCC[33]

F38

VCC[34]

F42

VCC[35]

G42

VCC[36]

H25

VCC[37]

H26

VCC[38]

H28

VCC[39]

H29

VCC[40]

H32

VCC[41]

H34

VCC[42]

H35

VCC[43]

H37

VCC[44]

H38

VCC[45]

H40

VCC[46]

J25

VCC[47]

J26

VCC[48]

J28

VCC[49]

J29

VCC[50]

J32

VCC[51]

J34

VCC[52]

J35

VCC[53]

J37

VCC[54]

J38

VCC[55]

J40

VCC[56]

J42

VCC[57]

K26

VCC[58]

K27

VCC[59]

K29

VCC[60]

K32

VCC[61]

K34

VCC[62]

K35

VCC[63]

K37

VCC[64]

K39

VCC[66]

K42

VCC[67]

L25

VCC[68]

L28

VCC[69]

L33

VCC[70]

L36

VCC[71]

L40

VCC[72]

N26

VCC[73]

N30

VCC[74]

N34

VCC[75]

N38

VCC[76]

IVY-BRIDGE_BGA1023

C

POWER

CORE SUPPLY

8.5A

AF46

VCCIO[1]

AG48

VCCIO[3]

AG50

VCCIO[4]

AG51

VCCIO[5]

AJ17

VCCIO[6]

AJ21

VCCIO[7]

AJ25

VCCIO[8]

AJ43

VCCIO[9]

AJ47

VCCIO[10]

AK50

VCCIO[11]

AK51

VCCIO[12]

AL14

VCCIO[13]

AL15

VCCIO[14]

AL16

VCCIO[15]

AL20

VCCIO[16]

AL22

VCCIO[17]

AL26

VCCIO[18]

AL45

VCCIO[19]

AL48

VCCIO[20]

AM16

VCCIO[21]

AM17

VCCIO[22]

AM21

VCCIO[23]

AM43

VCCIO[24]

AM47

VCCIO[25]

AN20

VCCIO[26]

AN42

VCCIO[27]

AN45

VCCIO[28]

AN48

VCCIO[29]

AA14

VCCIO[30]

AA15

VCCIO[31]

AB17

VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49]

VCCIO50 VCCIO51

VCCIO_SEL

VCCPQE[1] VCCPQE[2]

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE VSS_SENSE

AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15

W16 W17

BC22

AM25 AN22

A44 B43 C44

F43 G43

AN16 AN17

VCCSENSE_R VSSSENSE_R

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

PEG IO AND DDR IO

RAILS

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID QUIET

D

+1.05VS_VTT

For DDR

INTEL Recommend VCCIO 2*330UF,10*10uF(0603) and 26*1uF(0402) PD0.8 CAP at Power side

For PEG

+3VS

12

R521

10K_0402_5%

+1.05VS_VTT

VCCIO_SEL

+1.05VS_VTT

12

C553

C553 1U_0402_6.3V6K

1U_0402_6.3V6K

VCCIO_SENSE VSSIO_SENSE_L

10K_0402_5%

VCCIO_SEL

10K_0402_5%

Place the PU resistors close to VR

R282 0_0402_5%R282 0_0402_5%

1 2

R289 0_0402_5%R289 0_0402_5%

1 2

R513 10_0402_5%R513 10_0402_5%

12

R512

R512 10_0402_5%

10_0402_5%

12

@

R522

12

R531

R531 130_0402_5%

130_0402_5%

12

VCCIO_SEL after Ivy bridge ES2 Voltage support

1/NC : (Default) +1.05VS_VTT

BC22

*

0: +1.0VS_VTT

R528 43_0402_1%

1 2

R527 0_0402_5%

1 2

R530 0_0402_5%

1 2

R79

@R79

@

1 2

100_0402_1%

+1.05VS_VTT

VCCIO_SENSE <54> VSSIO_SENSE_L <54>

Check list 1.5

+CPU_CORE

12

+1.05VS_VTT+1.05VS_VTT

Place the PU resistors close to CPU

R529

R529 75_0402_5%

75_0402_5%

VCCSENSE <56> VSSSENSE <56>

Should change to connect form power cirucit & layout differential with VCCIO_SENSE.

R281

R281 100_0402_1%

100_0402_1%

R288

R288 100_0402_1%

100_0402_1%

12

E

VR_SVID_ALRT# <56> VR_SVID_CLK <56> VR_SVID_DAT <56>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(5/7) PWR,BYPASS

LA-8971P

E

9 58Wednesday, February 15, 2012

0.1

A

R65 0_0402_5%R65 0_0402_5%

R78

100K_0402_5%

@

Q6

2

G

1 2

+3VALW

12

@

RUN_ON_CPU1.5VS3#

13

D

S

SUSP<6,47,52>

1 1

2N7002K_SOT23-3

R81 0_0402_5%@R81 0_0402_5%@

CPU1.5V_S3_GATE<42,47>

SUSP#<42,47,52,54>

1 2

R82 @ 0_0402_5%R82 @ 0_0402_5%

1 2

2N7002K_SOT23-3

INTEL Recommend VAXG 2*470uF,6*22uF(0805) and 6*10uF(0603) 11*1U(0402) PD0.8

2 2

CR CheckList Rev1.5

1

@

+

C287

2

1U_0402_6.3V6K

10U_0603_6.3V6M

+VGFX_CORE

22U_0805_6.3V6M

12

Place TOP IN BGA

C309

12

Place BOT OUT BGA

C577

12

INTEL Recommend VCCPLL

3 3

4 4

1*330uF,2*1uF(0402) PD0.8

SGA20331E10 S POLY C 330U 2V Y D2 LESR9M EEFSX H1.9

B phase Cost down proposal

VCC_AXG_SENSE<56>

VSS_AXG_SENSE<56>

+1.8VS

Place BOT OUT Conn

+VCCSA

330U_2.5V_M

SF000002Z00

1

+

C242

C242 330U_D2_2V_Y

330U_D2_2V_Y

2

INTEL Recommend VCCSA 1*330uF,5*10uF(0603) ,5*1uF(0402) PD0.8

A

C633

1U_0402_6.3V6K

10U_0603_6.3V6M

+VGFX_CORE

12

R308

100_0402_5%

12

R309

100_0402_5%

10U_0603_6.3V6M

+VCCSA

1U_0402_6.3V6K

C302

12

10U_0603_6.3V6M

C560

12

C153

12

C300

12

C555

12

B

+VSB

2

G

RUN_ON_CPU1.5VS3# <6>

@

R87

1 2

100_0402_5%

1U_0402_6.3V6K

C280

C281

1

2

1U_0402_6.3V6K

C301

12

10U_0603_6.3V6M

C579

12

B

+1.5V

12

R85

R85 82K_0402_5%

82K_0402_5%

13

D

Q8

Q8 2N7002K_SOT23-3

2N7002K_SOT23-3

S

DC 29A

1U_0402_6.3V6K

C308

C559

1 2

U11

U11 AO4430L_SO8

AO4430L_SO8

8 7 6 5

RUN_ON_CPU1.5VS3

AA46 AB47 AB50 AB51 AB52 AB53 AB55 AB56 AB58 AB59 AC61 AD47 AD48 AD50 AD51 AD52 AD53 AD55 AD56 AD58 AD59 AE46

N45 P47 P48 P50 P51 P52 P53 P55 P56 P61 T48 T58 T59 T61 U46 V47 V48 V50 V51 V52 V53 V55 V56 V58 V59

W50 W51 W52 W53 W55 W56 W61

Y48 Y61

F45 G45

1.2A

BB3

BC1 BC4

6A

L17 L21 N16 N20 N22 P17 P20 R16 R18 R21 U15 V16 V17 V18 V21

W20

+1.5V_CPU_VDDQ

J1 @

PAD-OPEN 4x4m

4

R175

1 2

15K_0402_1%

12

@

R77

R77 330K_0402_5%

330K_0402_5%

UCPU1G

VAXG[1] VAXG[2] VAXG[3] VAXG[4] VAXG[5] VAXG[6] VAXG[7] VAXG[8] VAXG[9] VAXG[10] VAXG[11] VAXG[12] VAXG[13] VAXG[14] VAXG[15] VAXG[16] VAXG[17] VAXG[18] VAXG[19] VAXG[20] VAXG[21] VAXG[22] VAXG[23] VAXG[24] VAXG[25] VAXG[26] VAXG[27] VAXG[28] VAXG[29] VAXG[30] VAXG[31] VAXG[32] VAXG[33] VAXG[34] VAXG[35] VAXG[36] VAXG[37] VAXG[38] VAXG[39] VAXG[40] VAXG[41] VAXG[42] VAXG[43] VAXG[44] VAXG[45] VAXG[46] VAXG[47] VAXG[48] VAXG[49] VAXG[50] VAXG[51] VAXG[52] VAXG[53] VAXG[54] VAXG[55] VAXG[56]

VAXG_SENSE VSSAXG_SENSE

VCCPLL[1] VCCPLL[2] VCCPLL[3]

VCCSA[1] VCCSA[2] VCCSA[3] VCCSA[4] VCCSA[5] VCCSA[6] VCCSA[7] VCCSA[8] VCCSA[9] VCCSA[10] VCCSA[11] VCCSA[12] VCCSA[13] VCCSA[14] VCCSA[15] VCCSA[16]

IVY-BRIDGE_BGA1023

1 2 3

12

POWER

GRAPHICS

SENSE

LINES

SENSE

LINES

1.8V RAIL

SA RAIL

12

R80

220_0402_5%

13

D

S

C115

0.047U_0603_25V7K

SM_VREF

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

VREF

VDDQ[1] VDDQ[2] VDDQ[3] VDDQ[4] VDDQ[5] VDDQ[6] VDDQ[7] VDDQ[8]

VDDQ[9] VDDQ[10] VDDQ[11] VDDQ[12] VDDQ[13] VDDQ[14] VDDQ[15] VDDQ[16] VDDQ[17] VDDQ[18]

DDR3 - 1.5V RAILS

VDDQ[19] VDDQ[20] VDDQ[21] VDDQ[22] VDDQ[23] VDDQ[24] VDDQ[25] VDDQ[26]

VCCDQ[1] VCCDQ[2]

QUIET RAILS

VDDQ_SENSE

VSS_SENSE_VDDQ

VCCSA_SENSE

SENSE LINES

VCCSA_VID[0] VCCSA_VID[1]

VCCSA VID

lines

VCCSA VID

lines

C

12

@

C116

0.1U_0402_10V6K

RUN_ON_CPU1.5VS3#

2

G

Q7

Q7 2N7002K_SOT23-3

2N7002K_SOT23-3

+V_SM_VREF_CNT +V_SM_VREF

AY43

SA_DIMM_VREFDQ

BE7

SB_DIMM_VREFDQ

BG7

1K_0402_1%

12

@

R519

+1.5V_CPU_VDDQ +1.5V

C150 0.1U_0402_10V7KC150 0.1U_0402_10V7K

C151 0.1U_0402_10V7KC151 0.1U_0402_10V7K

C152 0.1U_0402_10V7KC152 0.1U_0402_10V7K

C157 0.1U_0402_10V7KC157 0.1U_0402_10V7K

+V_SM_VREF_CNT should have 20 mil trace width

C117

0.1U_0402_16V4Z

12

@

R518

1K_0402_1%

12

D

12

+1.5V_CPU_VDDQ +1.5V

12

R113

R113 1K_0402_1%~D

1K_0402_1%~D

12

R124

R124 1K_0402_1%~D

1K_0402_1%~D

R117 0_0402_5%@R117 0_0402_5%@

S

G

12

D

123

@

Q11

Q11 AO3414_SOT23-3

AO3414_SOT23-3

RUN_ON_CPU1.5VS3

5A

AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33

+1.5V_CPU_VDDQ

AM28 AN26

BC43 BA43

R248

U10

CPU EDS1.3 P.93 VCCSA_VID0 Must PD

H_VCCSA_VID0

D48

H_VCCSA_VID1

D49

C

Place TOP IN BGA

1U_0402_6.3V6K

C351

12

10U_0603_6.3V6M

12

C340

1U_0402_6.3V6K

C348

C328

12

Place BOT OUT BGA

10U_0603_6.3V6M

12

C338

C337

VCCSA_SENSE <53>

H_VCCSA_VID0 <53> H_VCCSA_VID1 <53>

1U_0402_6.3V6K

C321

C329

12

C317

C317 1U_0402_6.3V6K

1U_0402_6.3V6K

@R248

@

1 2

0_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1U_0402_6.3V6K

C312

12

10U_0603_6.3V6M

12

C296

2011/06/24 2012/07/12

C318

12

10U_0603_6.3V6M

12

C295

1U_0402_6.3V6K

C320

12

10U_0603_6.3V6M

12

C299

Compal Secret Data

1U_0402_6.3V6K

C349

12

10U_0603_6.3V6M

12

C339

VID0

0

1 1

Deciphered Date

D

VID1

12

0

1

0 X1

+1.5V_CPU_VDDQ

C316

1

+

C286

C286 330U_2.5V_M

330U_2.5V_M

SF000002Z00

2

SGA20331E10 S POLY C 330U 2V Y D2 LESR9M EEFSX H1.9

C298

VCCSA

Vout

0.9V

0.85V

0.725V

0.675V

HR CR

V V

V

M3 Support

SA_DIMM_VREFDQ

SB_DIMM_VREFDQ

R86

@R86

@

1 2

0_0402_5%

D

S

D

S

13

Q9

G

BSS138_NL_SOT23-3

G

2

DRAMRST_CNTRL_PCH

R148

@R148

@

1 2

0_0402_5%

D

S

D

S

13

Q10

G

2

DRAMRST_CNTRL_PCH

12

@

R76

R76 1K_0402_1%~D

1K_0402_1%~D

12

@

R116

R116 1K_0402_1%~D

1K_0402_1%~D

SA_DIMM_VREFDQ SB_DIMM_VREFDQ Check list1.5 P18 M1 default M3 no stuff

INTEL Recommend VDDQ 1*330uF,8*10uF(0603) ,10*1uF(0402) PD0.8

V

VX

Compal Electronics, Inc.

Title

PROCESSOR(6/7) PWR

Size Document Number Rev

Custom

Date: Sheet of

LA-8971P

E

+V_DDR_REFA

DRAMRST_CNTRL_PCH <7,15>

+V_DDR_REFB

E

0.1

10 58Wednesday, February 15, 2012

0.1

A

UCPU1H

A13

VSS[1]

A17

VSS[2]

A21

VSS[3]

A25

VSS[4]

A28

VSS[5]

A33

1 1

2 2

3 3

4 4

VSS[6]

A37

VSS[7]

A40

VSS[8]

A45

VSS[9]

A49

VSS[10]

A53

VSS[11]

A9

VSS[12]

AA1

VSS[13]

AA13

VSS[14]

AA50

VSS[15]

AA51

VSS[16]

AA52

VSS[17]

AA53

VSS[18]

AA55

VSS[19]

AA56

VSS[20]

AA8

VSS[21]

AB16

VSS[22]

AB18

VSS[23]

AB21

VSS[24]

AB48

VSS[25]

AB61

VSS[26]

AC10

VSS[27]

AC14

VSS[28]

AC46

VSS[29]

AC6

VSS[30]

AD17

VSS[31]

AD20

VSS[32]

AD4

VSS[33]

AD61

VSS[34]

AE13

VSS[35]

AE8

VSS[36]

AF1

VSS[37]

AF17

VSS[38]

AF21

VSS[39]

AF47

VSS[40]

AF48

VSS[41]

AF50

VSS[42]

AF51

VSS[43]

AF52

VSS[44]

AF53

VSS[45]

AF55

VSS[46]

AF56

VSS[47]

AF58

VSS[48]

AF59

VSS[49]

AG10

VSS[50]

AG14

VSS[51]

AG18

VSS[52]

AG47

VSS[53]

AG52

VSS[54]

AG61

VSS[55]

AG7

VSS[56]

AH4

VSS[57]

AH58

VSS[58]

AJ13

VSS[59]

AJ16

VSS[60]

AJ20

VSS[61]

AJ22

VSS[62]

AJ26

VSS[63]

AJ30

VSS[64]

AJ34

VSS[65]

AJ38

VSS[66]

AJ42

VSS[67]

AJ45

VSS[68]

AJ48

VSS[69]

AJ7

VSS[70]

AK1

VSS[71]

AK52

VSS[72]

AL10

VSS[73]

AL13

VSS[74]

AL17

VSS[75]

AL21

VSS[76]

AL25

VSS[77]

AL28

VSS[78]

AL33

VSS[79]

AL36

VSS[80]

AL40

VSS[81]

AL43

VSS[82]

AL47

VSS[83]

AL61

VSS[84]

AM13

VSS[85]

AM20

VSS[86]

AM22

VSS[87]

AM26

VSS[88]

AM30

VSS[89]

AM34

VSS[90]

IVY-BRIDGE_BGA1023

VSS

A

VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180]

AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13

B

UCPU1I

BG17

VSS[181]

BG21

VSS[182]

BG24

VSS[183]

BG28

VSS[184]

BG37

VSS[185]

BG41

VSS[186]

BG45

VSS[187]

BG49

VSS[188]

BG53

VSS[189]

BG9

VSS[190]

C29

VSS[191]

C35

VSS[192]

C40

VSS[193]

D10

VSS[194]

D14

VSS[195]

D18

VSS[196]

D22

VSS[197]

D26

VSS[198]

D29

VSS[199]

D35

VSS[200]

D4

VSS[201]

D40

VSS[202]

D43

VSS[203]

D46

VSS[204]

D50

VSS[205]

D54

VSS[206]

D58

VSS[207]

D6

VSS[208]

E25

VSS[209]

E29

VSS[210]

E3

VSS[211]

E35

VSS[212]

E40

VSS[213]

F13

VSS[214]

F15

VSS[215]

F19

VSS[216]

F29

VSS[217]

F35

VSS[218]

F40

VSS[219]

F55

VSS[220]

G51

VSS[221]

G6

VSS[222]

G61

VSS[223]

H10

VSS[224]

H14

VSS[225]

H17

VSS[226]

H21

VSS[227]

H4

VSS[228]

H53

VSS[229]

H58

VSS[230]

J1

VSS[231]

J49

VSS[232]

J55

VSS[233]

K11

VSS[234]

K21

VSS[235]

K51

VSS[236]

K8

VSS[237]

L16

VSS[238]

L20

VSS[239]

L22

VSS[240]

L26

VSS[241]

L30

VSS[242]

L34

VSS[243]

L38

VSS[244]

L43

VSS[245]

L48

VSS[246]

L61

VSS[247]

M11

VSS[248]

M15

VSS[249]

IVY-BRIDGE_BGA1023

Security Classification

B

VSS

NCTF

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

M4

VSS[250]

M58

VSS[251]

M6

VSS[252]

N1

VSS[253]

N17

VSS[254]

N21

VSS[255]

N25

VSS[256]

N28

VSS[257]

N33

VSS[258]

N36

VSS[259]

N40

VSS[260]

N43

VSS[261]

N47

VSS[262]

N48

VSS[263]

N51

VSS[264]

N52

VSS[265]

N56

VSS[266]

N61

VSS[267]

P14

VSS[268]

P16

VSS[269]

P18

VSS[270]

P21

VSS[271]

P58

VSS[272]

P59

VSS[273]

P9

VSS[274]

R17

VSS[275]

R20

VSS[276]

R4

VSS[277]

R46

VSS[278]

T1

VSS[279]

T47

VSS[280]

T50

VSS[281]

T51

VSS[282]

T52

VSS[283]

T53

VSS[284]

T55

VSS[285]

T56

VSS[286]

U13

VSS[287]

U8

VSS[288]

V20

VSS[289]

V61

VSS[290]

W13

VSS[291]

W15

VSS[292]

W18

VSS[293]

W21

VSS[294]

W46

VSS[295]

W8

VSS[296]

Y4

VSS[297]

Y47

VSS[298]

Y58

VSS[299]

Y59

VSS[300]

G48

VSS[301]

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14

A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61

Compal Secret Data

2011/06/24 2012/07/12

C

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(7/7) VSS

LA-8971P

E

0.1

11 58Wednesday, February 15, 2012

E

A

B

C

D

E

+1.5V



12

RD1

RD1 1K_0402_1%

1K_0402_1%

+V_DDR_REFA

1 1

2 2

3 3

4 4

1K_0402_1%

12

1

RD2

2

CD2

DDR_CKE0_DIMMA<7>

DDR_A_BS2<7>

M_CLK_DDR0<7> M_CLK_DDR#0<7>

DDR_A_BS0<7>

DDR_A_WE#<7> DDR_A_CAS#<7>

DDR_CS1_DIMMA#<7>

+3VS

A

1

2

CD1

CD3

0.1U_0402_10V6K

1

2

CD23

2.2U_0603_6.3V4Z

1

2

CD24

0.1U_0402_10V6K

DDR_A_D0 DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE#

DDR_A_MA13 DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

12

RD7

10K_0402_5%



DDR3 SO-DIMM A

JDIMM1

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

12

RD8

10K_0402_5%

VTT

205

GND1

207

BOSS1

TYCO_2-2013022-1

CONN@

B

DQS0#

DQS0

RESET#

DQS3#

DQS3

VREF_CA

DQS5#

DQS5

DQS7#

DQS7

EVENT#

GND2

BOSS2

VSS DQ4 DQ5 VSS

VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS DQ14 DQ15

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

VSS DQ30 DQ31

VSS

CKE1

VDD

CK1 CK1#

VDD

RAS#

VDD

ODT0

VDD ODT1

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

VSS DQ62 DQ63

VSS

SDA

SCL

VTT

+1.5V+1.5V

2

DDR_A_D4

4

DDR_A_D5

6 8

DDR_A_DQS#0

10

DDR_A_DQS0

12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26

DDR_A_DM1

28

SM_DRAMRST#

30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44

DDR_A_DM2

46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60

DDR_A_DQS#3

62

DDR_A_DQS3

64 66

DDR_A_D30

68

DDR_A_D31

70 72

DDR_CKE1_DIMMA

74 76

DDR_A_MA15

78

A15 A14

A11

A7

A6 A4

A2 A0

BA1

S0#

NC

80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206 208

DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA# M_ODT0DDR_A_CAS#

M_ODT1

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47DDR_A_D43

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

PCH_SMBDATA PCH_SMBCLK

+0.75VS





SM_DRAMRST# <7,13>

DDR_CKE1_DIMMA <7>

M_CLK_DDR1 <7> M_CLK_DDR#1 <7>

DDR_A_BS1 <7> DDR_A_RAS# <7>

DDR_CS0_DIMMA# <7> M_ODT0 <7>

M_ODT1 <7>

1

2

CD5

CD6

0.1U_0402_10V6K

PCH_SMBDATA <13,15,40,43> PCH_SMBCLK <13,15,40,43>

DDR_A_D[0..63]<7>

DDR_A_DQS[0..7]<7>

DDR_A_DQS#[0..7]<7>

DDR_A_MA[0..15]<7>

+1.5V

1

+

2

CD4

330U_B2_2.5VM_R15M

+1.5V

12

RD5

RD5 1K_0402_1%

1K_0402_1%

+VREF_CA

12

RD6

RD6 1K_0402_1%

1K_0402_1%

2.2U_0603_6.3V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

D

Layout Note: Place near JDIMM1

1

2

CD7

10U_0603_6.3V6M

Custom

1

2

CD8

CD9

10U_0603_6.3V6M

Layout Note: Place these 4 Caps near Command and Control signals of JDIMM1

+1.5V

CD20

CD19

Layout Note: Place near JDDRL.203,204

+0.75VS

Title

Size Document Number Rev

Date: Sheet of

0.1U_0402_10V6K

1

2

CD15

CD16

1U_0402_6.3V6K

Compal Electronics, Inc.

DDRIII DIMMB

LA-8971P

1

2

CD10

10U_0603_6.3V6M

CD21

0.1U_0402_10V6K

1

2

CD17

1U_0402_6.3V6K

1

@

2

CD11

CD12

10U_0603_6.3V6M

CD22

0.1U_0402_10V6K

1

2

CD18

1U_0402_6.3V6K

12 58Wednesday, February 15, 2012

E

12 58Wednesday, February 15, 2012

1

@

2

CD13

CD14

10U_0603_6.3V6M

0.1

5

4

3

2

1

+1.5V

12

RD9

1K_0402_1%

D D

C C

B B

A A

RD10

1K_0402_1%

12

+V_DDR_REFB

DDR_B_D0

1

2

CD35

+3VS

1

2

CD27

CD36

0.1U_0402_10V6K

DDR_CKE2_DIMMB<7>

DDR_B_BS2<7>

M_CLK_DDR2<7> M_CLK_DDR#2<7>

DDR_B_BS0<7>

DDR_B_WE#<7> DDR_B_CAS#<7>

DDR_CS3_DIMMB#<7>

1

2

CD47

2.2U_0603_6.3V4Z

5

DDR_B_D1

DDR_B_DM0

DDR_B_D2 DDR_B_D3

2.2U_0603_6.3V4Z

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS# M_ODT2

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

RD13

1 2

10K_0402_5%

1

2

CD48

0.1U_0402_10V6K

+1.5V +1.5V





JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

RD14

1 2

10K_0402_5%

SA1

203

VTT1

205

G1

TYCO_2-2013287-1

CONN@

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6 DQ7

VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL

VTT2

DDR_B_D[0..63]<7>

DDR_B_DQS[0..7]<7>

2

DDR_B_D4

4

DDR_B_D5

6 8

DDR_B_DQS#0

10

DDR_B_DQS0

12 14

DDR_B_D6

16

DDR_B_D7

18 20

DDR_B_D12

22

DDR_B_D13

24 26

DDR_B_DM1

28

SM_DRAMRST#

30 32

DDR_B_D14

34

DDR_B_D15

36 38

DDR_B_D20

40

DDR_B_D21

42 44

DDR_B_DM2

46 48

DDR_B_D22

50

DDR_B_D23

52 54

DDR_B_D28

56

DDR_B_D29

58 60

DDR_B_DQS#3

62

DDR_B_DQS3

64 66

DDR_B_D30

68

DDR_B_D31

70 72

DDR_CKE3_DIMMB

74 76

DDR_B_MA15

78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

4

DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB#

M_ODT3

+VREF_CB

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_DM6

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PCH_SMBDATA PCH_SMBCLK





SM_DRAMRST# <7,12>

DDR_CKE3_DIMMB <7>

M_CLK_DDR3 <7> M_CLK_DDR#3 <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>

DDR_CS2_DIMMB# <7> M_ODT2 <7>

M_ODT3 <7>

1

2

CD45

CD46

0.1U_0402_10V6K

PCH_SMBDATA <12,15,40,43> PCH_SMBCLK <12,15,40,43>

+0.75VS

DDR_B_DQS#[0..7]<7>

DDR_B_MA[0..15]<7>

Layout Note: Place near JDIMM2

+1.5V

1

+

@

2

CD28

CD29

10U_0603_6.3V6M

330U_B2_2.5VM_R15M

Layout Note: Place these 4 Caps near Command and Control signals of JDIMM2

+1.5V

CD37

CD38

+1.5V

12

RD11

RD11 1K_0402_1%

1K_0402_1%

12

RD12

RD12 1K_0402_1%

1K_0402_1%

2.2U_0603_6.3V4Z

+VREF_CB

Layout Note: Place near JDIMM2.203 and 204

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

2

0.1U_0402_10V6K

+0.75VS

1

2

CD41

CD38

1

2

CD42

1U_0402_6.3V6K

1

@

2

CD30

CD25

0.1U_0402_10V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

CD40

CD39

0.1U_0402_10V6K

1

2

CD43

CD44

1U_0402_6.3V6K

Title

Size Document Number Rev

Custom

Date: Sheet of

1

2

CD31

10U_0603_6.3V6M

0.1U_0402_10V6K

Compal Electronics, Inc.

DDRIII DIMMB

LA-8971P

1

2

CD32

CD33

10U_0603_6.3V6M

1

2

CD34

CD26

10U_0603_6.3V6M

1

10U_0603_6.3V6M

0.1

13 58Wednesday, February 15, 2012

0.1

CLRP1/2 close RAM door JDIMM1/2

A

B

+RTCBATT+RTCVCC

C

D

E

W=20mils W=20mils

R59

2

CLRP1

CLRP1 SHORT PADS

C439

1U_0603_10V6K

+RTCVCC

R356

1 2

20K_0402_5%

R357

1 2

20K_0402_5%

C440

1 1

+RTCVCC

R358 1M_0402_5%

R363 330K_0402_5%

*

C440

1U_0603_10V6K

1 2

INTVRMEN

HIntegrated VRM enable

Integrated VRM disable

L



SHORT PADS

1 2

1

PCH_RTCRST#

PCH_SRTCRST#

1

12

CLRP2

CLRP2 SHORT PADS

SHORT PADS

2

SM_INTRUDER# PCH_SPKR

PCH_INTVRMEN

1M_0402_5%

1

C441

C441 1U_0603_10V4Z

1U_0603_10V4Z

2

Prevent back drive issue.

1 2

0_0402_5%

12

R29

(INTVRMEN should always be pull high.)

+3VS

R109 1K_0402_5%@

1 2

HIGH= Enable ( No Reboot)Disable TCO timer system reboot feature

LOW= Disable (Default internal PD)

*

+3V_PCH

2 2

HDA_SDO

ME debug mode,this signal has a weak internal PD

Low = Disabled (Default)

*

High = Enabled [Flash Descriptor Security Overide]

+3V_PCH

This signal has a weak internal pull-down

On Die PLL VR Select is supplied by

1.5V when sampled high

*

1.8V when sampled low Needs to be pulled High for Huron River platfrom

3 3

1 2

1K_0402_5%

ME_FLASH<42>

R47 1K_0402_5%

HDA_BITCLK_AUDIO<31>

HDA_SYNC_AUDIO<31>

HDA_RST_AUDIO#<31>

HDA_SDOUT_AUDIO<31>

12

R134

R134 200_0402_5%

200_0402_5%

12

R141

R141 100_0402_1%

100_0402_1%

1 2

0_0402_5%

12

+3V_PCH+3V_PCH +3V_PCH

R46

@ R46

@

R73

12

R143

R143 200_0402_5%

200_0402_5%

12

R140

R140 100_0402_1%

100_0402_1%

R75

1 2

33_0402_5%

R30

1 2

33_0402_5%

R74

1 2

33_0402_5%

R72

1 2

33_0402_5%

PCH_SPKR

HDA_SDOUT_PCH

HDA_SYNC_PCH

HDA_BITCLK_PCH

HDA_SYNC_PCH_R

HDA_RST_PCH#

HDA_SDOUT_PCH

12

R137

R137 200_0402_5%

200_0402_5%

PCH_JTAG_TDIPCH_JTAG_TDO PCH_JTAG_TMS

12

R142

R142 100_0402_1%

100_0402_1%

PCH_SPI_CLK_2

PCH_SPI_CLK_1

PCH_SPI_CS0#_1

PCH_SPI_CS1#_2 PCH_SPI_CS1#

PCH_SPI_MOSI_2

PCH_SPI_MOSI_1

PCH_SPI_MISO_1

PCH_SPI_MISO_2

R433 33_0402_5%WIN8@R433 33_0402_5%WIN8@

R432 33_0402_5%

R127 33_0402_5%

R446 33_0402_5%WIN8@R446 33_0402_5%WIN8@

R123 33_0402_5%WIN8@R123 33_0402_5%WIN8@

R122 33_0402_5%

R437 33_0402_5%

R438 33_0402_5%WIN8@R438 33_0402_5%WIN8@

12

1K_0402_5%

+5VS

G

2

Q3

Q3 BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

13

D

S

D

S

R48

@R48

@

12

+3VS

SPI ROM FOR ME (4MB) Footprint 200mil

+3VS

SPI ROM FOR ME (2MB) Footprint 200mil

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BITCLK_PCH

HDA_SYNC_PCHHDA_SYNC_PCH_R

PCH_SPKR<31>

HDA_SDIN0<31>

51_0402_5%

R22 3.3K_0402_5%

1 2

R89 3.3K_0402_5%

1 2

R21 3.3K_0402_5%WIN8@R21 3.3K_0402_5%WIN8@

1 2

R88 3.3K_0402_5%WIN8@R88 3.3K_0402_5%WIN8@

1 2

R100

HDA_RST_PCH#

HDA_SDIN0

HDA_SDOUT_PCH

PCH_JTAG_TCK

12

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_MOSI

PCH_SPI_MISO

A20

C20

D20

G22

K22

C17

N34

L34

T10

K34

E34

G34

C34

A34

A36

C36

N32

J3

H7

K5

H1

T3

Y14

T1

V4

U3

PCH_SPI_CS0#_1 SPI_WP1# SPI_HOLD1#

PCH_SPI_CS1#_2 SPI_WP2# SPI_HOLD2#

U13A

RTCX1

RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33

HDA_DOCK_RST# / GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

COUGARPOINT_FCBGA989

U44

1

CS#

3

WP#

7

HOLD#

4

GND

MX25L3206EM2I-12G_SO8

SA000041P00

U46

WIN8@U46

WIN8@

1

CS#

3

WP#

7

HOLD#

4

GND

MX25L1606EM2I-12G_SO8

SA000041N00

RTCIHDA

JTAG

SPI

VCC

SCLK

SO

VCC

SCLK

SO

LPC

SATA

SATA0GP / GPIO21

SATA1GP / GPIO19

8 6 5

SI

2

8 6 5

SI

2

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN

SATA 6G

SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

+3VS

PCH_SPI_CLK_1 PCH_SPI_MOSI_1 PCH_SPI_MISO_1

+3VS

PCH_SPI_CLK_2 PCH_SPI_MOSI_2 PCH_SPI_MISO_2

LPC_AD0

C38

LPC_AD1

A38

LPC_AD2

B37

LPC_AD3

C37

LPC_FRAME#

D36

E36 K36

SERIRQ

V5

SATA_PRX_DTX_N0

AM3

SATA_PRX_DTX_P0

AM1 AP7 AP5

SATA_PRX_C_DTX_N1_R

AM10

SATA_PRX_C_DTX_P1_R

AM8

SATA_PTX_DRX_N1_R

AP11

SATA_PTX_DRX_P1_R

AP10

SATA_PRX_C_DTX_N2

AD7

SATA_PRX_C_DTX_P2

AD5

SATA_PTX_DRX_N2

AH5

SATA_PTX_DRX_P2

AH4

AB8 AB10 AF3 AF1

SATA_PRX_C_DTX_N4

Y7

SATA_PRX_C_DTX_P4

Y5

SATA_PTX_DRX_N4

AD3

SATA_PTX_DRX_P4

AD1

Y3 Y1 AB3 AB1

Y11

L=500mil S=15mil

SATA_COMP

Y10

AB12

L=500mil S=15mil

SATA3_COMP

AB13

RBIAS_SATA3

AH1

PCH_SATALED#

P3

PCH_GPIO21

V14

BBS_BIT0_R

P1

LPC_AD0 <40,42> LPC_AD1 <40,42> LPC_AD2 <40,42> LPC_AD3 <40,42>

LPC_FRAME# <40,42>

R118

12

10K_0402_5%

+3VS

SERIRQ <42>

C127 0.01U_0402_16V7KC127 0.01U_0402_16V7K C131 0.01U_0402_16V7KC131 0.01U_0402_16V7K

Disable w/ HM70

R121

1 2

37.4_0402_1%

R126

1 2

49.9_0402_1%

R440

1 2

750_0402_1%

R429 10K_0402_5%R429 10K_0402_5%

R136 10K_0402_5%R136 10K_0402_5%

R466 10K_0402_5%R466 10K_0402_5%

@

1 2

C459

10P_0402_50V8J

12 12

SATA_PRX_C_DTX_N1_R <38> SATA_PRX_C_DTX_P1_R <38> SATA_PTX_DRX_N1_R <38> SATA_PTX_DRX_P1_R <38>

SATA_PRX_C_DTX_N2 <38> SATA_PRX_C_DTX_P2 <38> SATA_PTX_DRX_N2 <38> SATA_PTX_DRX_P2 <38>

SATA_PRX_C_DTX_N4 <39> SATA_PRX_C_DTX_P4 <39> SATA_PTX_DRX_N4 <39> SATA_PTX_DRX_P4 <39>

+1.05VS_VTT

12

Reserve for EMI

PCH_SPI_CLK

@

12

R434 33_0402_5%

+3VS

SATA_PRX_DTX_N0 <40>

SATA_PTX_DRX_N0SATA_PTX_C_DRX_N0 SATA_PTX_DRX_P0SATA_PTX_C_DRX_P0

SATA_PRX_DTX_P0 <40> SATA_PTX_DRX_N0 <40> SATA_PTX_DRX_P0 <40>

mSATA

HDD for HM77

HDD for HM70

ODD

Boot BIOS Strap

Boot BIOS

LPC

Reserved

SPI

*

-

GPIO51

0 0 0 1 1 1

GPIO19

1 0

PCH_RTCX1

R406

1 2

10M_0402_5%

4 4

Y2

1 2

32.768KHZ_12.5PF_9H03200019

1

C452

C452 18P_0402_50V8J

18P_0402_50V8J

2

PCH_RTCX2

1

C451

C451 18P_0402_50V8J

18P_0402_50V8J

2

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (1/9) SATA,HDA,SPI, LPC, XDP

LA-8971P

E

14 58Wednesday, February 15, 2012

0.1

A

PCIE_DTX_C_PRX_N1<33>

PCIE LAN

WLAN

1 1

2 2

WLAN

PCIE_DTX_C_PRX_P1<33> PCIE_PTX_C_DRX_N1<33> PCIE_PTX_C_DRX_P1<33>

PCIE_PRX_DTX_N2<40>

PCIE_PRX_DTX_P2<40> PCIE_PTX_C_DRX_N2<40> PCIE_PTX_C_DRX_P2<40>

CLK_PCIE_WLAN1#<40> CLK_PCIE_WLAN1<40>

PCIE LAN

3 3

4 4

C480 0.1U_0402_16V7KC480 0.1U_0402_16V7K C478 0.1U_0402_16V7KC478 0.1U_0402_16V7K

C482 0.1U_0402_16V7KC482 0.1U_0402_16V7K C481 0.1U_0402_16V7KC481 0.1U_0402_16V7K

+3V_PCH

1 2 1 2

WLAN_CLKREQ#<40>

+3VS

CLK_PCIE_LAN#<33> CLK_PCIE_LAN<33>

LAN_CLKREQ#<33>

+3V_PCH

1 2 1 2

1 2

10K_0402_5%

R287 0_0402_5%R287 0_0402_5% R291 0_0402_5%R291 0_0402_5%

10K_0402_5%

WLAN_CLKREQ#

R215 10K_0402_5%R215 10K_0402_5%

1 2

R110

1 2

10K_0402_5%

CLK_PCIE_LAN#

LAN_CLKREQ#

1 2

10K_0402_5%

1 2

10K_0402_5%

1 2

10K_0402_5%

1 2

10K_0402_5%

1 2

10K_0402_5%

1 2

10K_0402_5%

HM70 not support PCIE port 4-7

R213

CLK_PCIE_WLAN1#_R CLK_PCIE_WLAN1_R

R214

R53

R50

R54

R32

R51

B

PCIE_DTX_C_PRX_N1 PCIE_DTX_C_PRX_P1 PCIE_PTX_DRX_N1 PCIE_PTX_DRX_P1

PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_DRX_N2 PCIE_PTX_DRX_P2

PCH_GPIO73

PCH_GPIO20

PCH_GPIO26

PCH_GPIO44

PCH_GPIO56

PCH_GPIO45

PCH_GPIO46

U13B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

AK13

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

COUGARPOINT_FCBGA989

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

CLOCKS

CLKOUT_DP_N / CLKOUT_BCLK1_N

CLKOUT_DP_P / CLKOUT_BCLK1_P

C

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

Link

PEG_A_CLKRQ# / GPIO47

CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P

FLEX CLOCKS

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_DMI2_N CLKIN_DMI2_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

PCH_GPIO11

E12

PCH_SMBCLK_R

H14

PCH_SMBDATA_R

C9

DRAMRST_CNTRL_PCH

A12

PCH_SML0CLK

C8

PCH_SML0DATA

G12

PCH_HOT#

C13

PCH_SML1CLK

E14

PCH_SML1DATA

M16

M7

T11

P10

PEG_CLKREQ#_R

M10

CLK_PCIE_VGA#

AB37

CLK_PCIE_VGA

AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

AM12 AM13

CLK_BUF_CPU_DMI#

BF18

CLK_BUF_CPU_DMI

BE18

CLKIN_GND1#

BJ30

CLKIN_GND1CLK_PCIE_LAN

BG30

CLK_BUF_DREF_96M#

G24

CLK_BUF_DREF_96M

E24

CLK_BUF_PCIE_SATA#

AK7

CLK_BUF_PCIE_SATA

AK5

CLK_BUF_ICH_14M

K45

CLK_PCI_LPBACK

H45

XTAL25_IN

V47

XTAL25_OUT

V49

W=12mil S=15mil

XCLK_RCOMP

Y47

K43

F47

CLK_FLEX2

H47

DGPU_PRSNT#

K49

R33 10K_0402_5%R33 10K_0402_5%

12

DRAMRST_CNTRL_PCH <7,10>

PCH_HOT# <42>

CLK_PCIE_VGA# <23> CLK_PCIE_VGA <23>

CLK_CPU_DMI# <6> CLK_CPU_DMI <6>

R152 10K_0402_5%

1 2

R147 10K_0402_5%

1 2

R453 10K_0402_5%

1 2

R452 10K_0402_5%

1 2

R99 10K_0402_5%

1 2

R93 10K_0402_5%

1 2

R139 10K_0402_5%

1 2

R138 10K_0402_5%

1 2

R101 10K_0402_5%

1 2

R96

@ R96

@

1 2

33_0402_5%

Reserve for EMI please close to PCH

R120

12

90.9_0402_1%

T26 PAD@ T26 PAD@

R4082.2K_0402_5% R4082.2K_0402_5%

12

R3732.2K_0402_5% R3732.2K_0402_5%

12

CLK_PCI_LPBACK <18>

22P_0402_50V8J

+1.05VS_VTT

+3V_PCH

@

1 2

C29

DGPU_PRSNT#

DIS,Optimus

D

+3V_PCH

UMA

PCH_SMBDATA_R

PCH_SMBCLK_R

PCH_SML1DATA

PCH_SML1CLK

PEG_CLKREQ#_R

+3VS

12

UMA@

R421

R421 10K_0402_5%

10K_0402_5%

12

OPT@

R420

R420 10K_0402_5%

10K_0402_5%

GPIO67

DGPU_PRSNT#

0 1

6 1

DMN66D0LDW-7_SOT363-6

6 1

DMN66D0LDW-7_SOT363-6

+3V_PCH

12

R27

10K_0402_5%

12

@

R23

2.2K_0402_5%

XTAL25_IN

XTAL25_OUT

PCH_SMBCLK_R

PCH_SMBDATA_R

DRAMRST_CNTRL_PCH

PCH_HOT#

PCH_SML1CLK

PCH_SML1DATA

+3VS

2

Q34A

5

3 4

Q34B

+3VS

2

Q33A

10P_0402_50V8J

3 4

2

1 3

D

5

Q33B

OPT@ R8

OPT@

10K_0402_5%

1 2

0.1U_0402_16V4Z

OPT@

G

Q2

Q2 2N7002K_SOT23-3

2N7002K_SOT23-3

S

1

C457

2

E

R405 2.2K_0402_5%R405 2.2K_0402_5%

1 2

R370 2.2K_0402_5%R370 2.2K_0402_5%

1 2

R391 1K_0402_5%R391 1K_0402_5%

1 2

R392 10K_0402_5%R392 10K_0402_5%

1 2

R403 2.2K_0402_5%R403 2.2K_0402_5%

1 2

R369 2.2K_0402_5%R369 2.2K_0402_5%

1 2

For DDR

R404

12

4.7K_0402_5%

R371

4.7K_0402_5%

Pull up at EC side. For VGA,EC,Thermal sensor

EC_SMB_DA2

EC_SMB_CK2

R8

12

C123

OPT@C123

OPT@

12

@

R12

2.2K_0402_5%

1 2

1M_0402_5%

Y6

Y6 25MHZ_10PF_7V25000014

25MHZ_10PF_7V25000014

3

GND

+3VS

PCH_SMBDATA <12,13,40,43>

12

+3VS

PCH_SMBCLK <12,13,40,43>

EC_SMB_DA2 <23,42,44>

EC_SMB_CK2 <23,42,44>

DGPU_PWR_EN <18,30,55>

PEG_CLKREQ# <23>

Pull high @ VGA side

R443

1

GND

2

4

+3V_PCH

1

C468

C468 10P_0402_50V8J

10P_0402_50V8J

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH (2/9) PCIE, SMBUS, CLK

LA-8971P

E

15 58Wednesday, February 15, 2012

0.1

A

DMI_CTX_PRX_N0<5> DMI_CTX_PRX_N1<5> DMI_CTX_PRX_N2<5>

+1.05VS_VTT

DMI_CTX_PRX_N3<5>

DMI_CTX_PRX_P0<5> DMI_CTX_PRX_P1<5> DMI_CTX_PRX_P2<5> DMI_CTX_PRX_P3<5>

DMI_CRX_PTX_N0<5> DMI_CRX_PTX_N1<5> DMI_CRX_PTX_N2<5> DMI_CRX_PTX_N3<5>

DMI_CRX_PTX_P0<5> DMI_CRX_PTX_P1<5> DMI_CRX_PTX_P2<5> DMI_CRX_PTX_P3<5>

+3VS

PCH_PWROK

PM_DRAM_PWRGD<6>

EC_RSMRST#

SUSWARN#

PBTN_OUT#

ACIN

1 1

+3V_PCH

R34 10K_0402_5%R34 10K_0402_5%

1 2

R49 10K_0402_5%R49 10K_0402_5%

1 2

R390 10K_0402_5%

1 2

R393 300_0402_5%R393 300_0402_5%

R394 10K_0402_5%R394 10K_0402_5%

2 2

+3V_PCH

200K_0402_5%

AC_PRESENT<42>

3 3

1 2

Follow G

12

not support AMT APWROK can mux with PWROK (check list1.5 P.47)

R26

1 2

R263

PCH_ACIN

@R263

@

1 2

0_0402_5%

SUSWARN#_R

PCH_GPIO72

RI#

PM_DRAM_PWRGD

PCH_RSMRST#

SUSACK#<42>

EC_RSMRST#<42>

SUSWARN#<42>

PBTN_OUT#<42>

ACIN<23,42,50>

No use ,PH 10K +3VALW

Ring Indicator CRB1.0 PH 10K +3VALW

B

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

L=500mil S=15mil

1 2

4mil width and place within 500mil of the PCH

R270 0_0402_5%

R271 0_0402_5%

DMI_IRCOMP

R15649.9_0402_1% R15649.9_0402_1%

DMI2RBIAS

R155750_0402_1% R155750_0402_1%

SUSACK#_R

DSP3@

1 2

SYS_RST#

R415

1 2

10K_0402_5%

PCH_PWROK_R

R107

1 2

0_0402_5%

PM_DRAM_PWRGD

PCH_RSMRST#

R125

1 2

0_0402_5%

SUSWARN#_R

DSP3@

1 2

PBTN_OUT#_R

R129

1 2

0_0402_5%

1 2

D3 RB751V-40_SOD323-2D3 RB751V-40_SOD323-2

PCH_ACIN

PCH_GPIO72

RI#

U13C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN# / SUS_PWR_DN_ACK / GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

COUGARPOINT_FCBGA989

C

FDI_CTX_PRX_N0

BJ14

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5

DMI

System Power Management

FDI_RXP6

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

AY14 BE14 BH13 BC12 BJ12 BG10 BG9

BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWODVREN

PCH_DPWROKSUSACK#

PCH_PCIE_WAKE#

CLKRUN#SYS_PWROK

SUS_STAT#

SUSCLK

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

SLP_A#

SLP_SUS#

H_PM_SYNC

PCH_GPIO29

FDI_CTX_PRX_N0 <5> FDI_CTX_PRX_N1 <5> FDI_CTX_PRX_N2 <5> FDI_CTX_PRX_N3 <5> FDI_CTX_PRX_N4 <5> FDI_CTX_PRX_N5 <5> FDI_CTX_PRX_N6 <5> FDI_CTX_PRX_N7 <5>

FDI_CTX_PRX_P0 <5> FDI_CTX_PRX_P1 <5> FDI_CTX_PRX_P2 <5> FDI_CTX_PRX_P3 <5> FDI_CTX_PRX_P4 <5> FDI_CTX_PRX_P5 <5> FDI_CTX_PRX_P6 <5> FDI_CTX_PRX_P7 <5>

FDI_INT <5>

FDI_FSYNC0 <5>

FDI_FSYNC1 <5>

FDI_LSYNC0 <5>

FDI_LSYNC1 <5>

@

R153 100K_0402_5%

1 2

0_0402_5%

R423

8.2K_0402_5%

PCH_RSMRST#

R133

PCH_PCIE_WAKE# <33,40>

12

+3VS

@

T1

T1 PAD

PAD

SUSCLK <42>

PM_SLP_S5# <42>

PM_SLP_S4# <42>

PM_SLP_S3# <42>

@

T4

T4 PAD

PAD

SLP_SUS# <42>

H_PM_SYNC <6>

No use ,PH 10K +3VALW

D

Can be left NC when IAMT is not support on the platfrom

E

DSWODVREN

DSWODVREN - On Die DSW VR Enable

HEnable internal DSW +1.05VS

*

LDisable

R359 330K_0402_5%

R368 330K_0402_5%@R368 330K_0402_5%@

1 2

12

Must always PH at +RTCVCC

PCH_PCIE_WAKE#

PCH_GPIO29

10K_0402_5%

@ R36

@

10K_0402_5%

+RTCVCC

+3V_PCH

R374

12

R36

12

tell PCH all power ok but cpu core

PCH_PWROK<42>

10K_0402_5%

4 4

VGATE<56>

PCH_PWROK

12

R104

VGATE

A

+3VS

U36

5

MC74VHC1G08DFT2G_SC70-5

2

P

B

Y

1

A

G

3

ALL power OK

SYS_PWROK

4

12

R119

R119 100K_0402_5%

100K_0402_5%

B

1

@

C52

0.047U_0402_16V7K

2

SYS_PWROK <6>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (3/9) DMI,FDI,PM

LA-8971P

E

16 58Wednesday, February 15, 2012

0.1

A

+3VS

R108 2.2K_0402_5%R108 2.2K_0402_5%

1 2

R105 2.2K_0402_5%R105 2.2K_0402_5%

1 2

1 1

2 2

+3VS

3 3

R195 2.2K_0402_5%R195 2.2K_0402_5%

1 2

R196 2.2K_0402_5%R196 2.2K_0402_5%

1 2

12

PCH_CRT_B

PCH_CRT_G

PCH_CRT_R

R192

150_0402_1%

R193

150_0402_1%

R194

150_0402_1%

R190 2.2K_0402_5%R190 2.2K_0402_5%

1 2

R191 2.2K_0402_5%R191 2.2K_0402_5%

1 2

EDID_CLK

EDID_DATA

CTRL_CLK

CTRL_DATA PCH_HDMIDAT

PCH_CRT_CLK

PCH_CRT_DATA

B

PCH_ENBKL<35> PCH_ENVDD<35>

PCH_PWM<35>

EDID_CLK<35> EDID_DATA<35>

R132

2.37K_0402_1%

LVDS_ACLK#<35> LVDS_ACLK<35>

LVDS_A0#<35> LVDS_A1#<35> LVDS_A2#<35>

LVDS_A0<35> LVDS_A1<35> LVDS_A2<35>

LVDS_BCLK#<35> LVDS_BCLK<35>

LVDS_B0#<35> LVDS_B1#<35> LVDS_B2#<35>

LVDS_B0<35> LVDS_B1<35> LVDS_B2<35>

PCH_CRT_B<36> PCH_CRT_G<36> PCH_CRT_R<36>

PCH_CRT_CLK<36>

PCH_CRT_DATA<36>

PCH_CRT_HSYNC<36> PCH_CRT_VSYNC<36>

PCH_ENBKL PCH_ENVDD

PCH_PWM

EDID_CLK EDID_DATA

CTRL_CLK CTRL_DATA

LVDS_IBG

12

LVDS_ACLK# LVDS_ACLK

LVDS_A0# LVDS_A1# LVDS_A2#

LVDS_A0 LVDS_A1 LVDS_A2

LVDS_BCLK# LVDS_BCLK

LVDS_B0# LVDS_B1# LVDS_B2#

LVDS_B0 LVDS_B1 LVDS_B2

PCH_CRT_B PCH_CRT_G PCH_CRT_R

PCH_CRT_CLK PCH_CRT_DATA

PCH_CRT_HSYNC PCH_CRT_VSYNC

R114

1K_0402_0.5%

12

CRT_IREF

M45

P45

K47

P39

AF37 AF36

AE48 AE47

AK39 AK40

AN48

AM47

AK47

AJ48

AN47 AM49

AK49

AJ47

AF40 AF39

AH45 AH47

AF49 AF45

AH43 AH49

AF47 AF43

N48 P49

M40

M47 M49

J47

T40

T45

T49

T39

T43 T42

C

U13D

L_BKLTEN L_VDD_EN

L_BKLTCTL

L_DDC_CLK L_DDC_DATA

L_CTRL_CLK L_CTRL_DATA

LVD_IBG LVD_VBG

LVD_VREFH LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

COUGARPOINT_FCBGA989

LVDS

CRT

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

PCH_HDMICLK

P38 M39

AT49 AT47

TMDS_B_HPD#

AT40

TMDS_B_DATA2#_PCH

AV42

TMDS_B_DATA2_PCH

AV40

TMDS_B_DATA1#_PCH

AV45

TMDS_B_DATA1_PCH

AV46

TMDS_B_DATA0#_PCH

AU48

TMDS_B_DATA0_PCH

AU47

TMDS_B_CLK#_PCH

AV47

TMDS_B_CLK_PCH

AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

HDMI@

R144

2.2K_0402_5%

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN

DDPB_AUXP

DDPB_HPD

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

D

+3VS

12

HDMI@

R131

2.2K_0402_5%

PCH_HDMICLK <37> PCH_HDMIDAT <37>

TMDS_B_HPD# <37>

C406 0.1U_0402_10V6KHDMI@ C406 0.1U_0402_10V6KHDMI@

1 2

C352 0.1U_0402_10V6KHDMI@ C352 0.1U_0402_10V6KHDMI@

1 2

C539 0.1U_0402_10V6KHDMI@ C539 0.1U_0402_10V6KHDMI@

1 2

C538 0.1U_0402_10V6KHDMI@ C538 0.1U_0402_10V6KHDMI@

1 2

C535 0.1U_0402_10V6KHDMI@ C535 0.1U_0402_10V6KHDMI@

1 2

C534 0.1U_0402_10V6KHDMI@ C534 0.1U_0402_10V6KHDMI@

1 2

C537 0.1U_0402_10V6KHDMI@ C537 0.1U_0402_10V6KHDMI@

1 2

C536 0.1U_0402_10V6KHDMI@ C536 0.1U_0402_10V6KHDMI@

1 2

HDMI_TX2-_CK <37> HDMI_TX2+_CK <37> HDMI_TX1-_CK <37> HDMI_TX1+_CK <37> HDMI_TX0-_CK <37> HDMI_TX0+_CK <37> HDMI_CLK-_CK <37> HDMI_CLK+_CK <37>

E

HDMI D2

HDMI D1

HDMI

HDMI D0

HDMI CLK

Place close to Connector side(0210)

4 4

Security Classification

2011/06/24 2012/07/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/24 2012/07/12

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH (4/9) LVDS,CRT,DP,HDMI

LA-8971P

17 58Wednesday, February 15, 2012

E

0.1

A

+3VS

1 1

+3VS

2 2

GNT1#/ GPIO51

Internal PH

1K_0402_5%

3 3

PCH_PLTRST#

4 4

DGPU_HOLD_RST#

R90

18 27 36 45

8.2K_1206_8P4R_5%

R409

18 27 36 45

8.2K_1206_8P4R_5%

R395

18 27 36 45

8.2K_1206_8P4R_5%

R401

1 2

8.2K_0402_5%

R410

1 2

8.2K_0402_5%

R66

1 2

8.2K_0402_5%

R41

@ R41

@

12

8.2K_0402_5%

Boot BIOS Strap

GPIO51GPIO19

Bit11

Bit10

0 1

1

0

1 1

00

@

DGPU_PWR_EN2NVDD_PWR_EN

R218

12

0_0402_5%

@

PCH_WL_OFF#

R25

12

OPT@

U29

MC74VHC1G08DFT2G_SC70-5

U29

PCI_PIRQC# PCI_PIRQB# PCI_PIRQA# PCI_PIRQD#

PCH_WL_OFF# PCH_GPIO53 PCH_GPIO4 PCH_GPIO5

PCH_GPIO51 PCH_GPIO2 PCH_ODD_DA#

DGPU_PWR_EN2

DGPU_PWR_EN1

Boot BIOS Destination

Reserved

PCI

SPI

LPC

R10

0_0402_5%

+3VS

5

2

P

B

1

A

G

3

+3VS

5

2

P

B

1

A

G

3

A

DGPU_HOLD_RST#

*

NVDD_PWR_EN<55> DGPU_PWR_EN<15,30,55>

CLK_PCI_LPBACK<15>

CLK_PCI_EC<42>

CLK_PCI_DB<40>

12

4

Y

U25

@U25

@

MC74VHC1G08DFT2G_SC70-5

R6

1 2

4

Y

100_0402_5%

12

OPT@

R3

R3 100K_0402_5%

100K_0402_5%

PCI Interrupt Requests

CLK_PCI_LPBACK CLK_PCI_EC CLK_PCI_DB

10K_0402_5%

0.1U_0402_16V4Z

12

R11

100K_0402_5%

OPT@R6

OPT@

USB3.0

R56 0_0402_5%OPT@R56 0_0402_5%OPT@ R57 0_0402_5%OPT@R57 0_0402_5%OPT@

12

@

R307

@

1

C149

2

PLT_RST# <33,40,42>

DGPU_RST# <23>

PCH_ODD_DA#<39>

B

USB3_RX1_N<45>

USB3_RX1_P<45>

USB3_TX1_N<45>

USB3_TX1_P<45>

DGPU_HOLD_RST#

B

DGPU_PWR_EN1 DGPU_PWR_EN2

12 12

PCH_WL_OFF#<40>

PCI_PME#<42>

PCH_PLTRST#<6>

R417 22_0402_5%

1 2

R84 22_0402_5%

1 2

R162 22_0402_5%@R162 22_0402_5%@

1 2

USB3_RX1_N

USB3_RX1_P

USB3_TX1_N

USB3_TX1_P

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PCH_GPIO51 PCH_GPIO53 PCH_WL_OFF#

PCH_GPIO2 PCH_ODD_DA# PCH_GPIO4 PCH_GPIO5

PCI_PME#

PCH_PLTRST#

CLK_PCI0 CLK_PCI1 CLK_PCI2

U13E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

COUGARPOINT_FCBGA989

C

AY7

NV_CE#0

AV7

NV_CE#1

AU3

NV_CE#2

BG4

NV_CE#3

AT10

NV_DQS0

BC8

NV_DQS1

NV_ALE NV_CLE

NV_RCOMP

NV_RB#

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

C

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5

DF_TVS

AY1

AV10

AT8

AY5 BA2

AT12 BF3

USB20_N0

C24

USB20_P0

A24

USB20_N1

C25

USB20_P1

B25 C26 A26

USB20_N3

K28

USB20_P3

H28 E28 D28 C28 A28 C29

HM70 not support USB port 4,5,6,7,12,13

B29 N28 M28

USB20_N8

L30

USB20_P8

K30

USB20_N9

G30

USB20_P9

E30

USB20_N10

C30

USB20_P10

A30

USB20_N11

L32

USB20_P11

K32 G32 E32 C32 A32

USBRBIAS

C33

B33

USB_OC0#

A14

USB_OC1#

K20

USB_OC2#

B17

USB_OC3#

C16

USB_OC4#

L16

USB_OC5#

A16

USB_OC6#

D14

USB_OC7#

C14

USB20_N0 <45> USB20_P0 <45> USB20_N1 <46> USB20_P1 <46>

USB20_N3 <46> USB20_P3 <46>

USB20_N8 <35> USB20_P8 <35> USB20_N9 <43> USB20_P9 <43> USB20_N10 <40> USB20_P10 <40> USB20_N11 <46> USB20_P11 <46>

R399

1 2

22.6_0402_1%

USB_OC0# <45,46> USB_OC1# <46>

Compal Secret Data

2011/06/24 2012/07/12

Compal Secret Data

USB3 (Left side)

USB2 (Right side)

CMOS Camera (LVDS)

Bluetooth

Mini Card (WLAN)

Card Reader

L=500mil S=15mil

Deciphered Date

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9

NV_DQ10 / NV_IO10

NVRAM

NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

RSVD

NV_RE#_WRB0 NV_RE#_WRB1

NV_WE#_CK0 NV_WE#_CK1

PCI

USB

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

E

DMI,FDI Termination Voltage

DF_TVS

Set to Vcc when HIGH

Set to Vss when LOW

HR CPU NC

CR CPU PD

CR Check list P.89 PH 2.2K series 1K

+1.8VS

12

R145

2.2K_0402_5%

DF_TVS

R146

1K_0402_5%

12

H_SNB_IVB# <6>

CLOSE TO THE BRANCHING POINT

EHCI 1

EHCI 2

+3V_PCH

USB_OC0#

USB_OC7#

USB_OC5#

USB_OC6#

USB_OC1# USB_OC4# USB_OC3# USB_OC2#

Title

PCH (5/9) PCI, USB, NVRAM

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

R24

12

10K_0402_5%

R367

12

10K_0402_5%

R378

12

10K_0402_5%

R377

12

10K_0402_5%

+3V_PCH

RP3

4 5 3 6 2 7 1 8

10K_1206_8P4R_5%

Compal Electronics, Inc.

LA-8971P

E

0.1

18 58Wednesday, February 15, 2012

0.1

A

B

C

D

E

GPIO28

On-Die PLL Voltage Regulator

This signal has a weak internal pull up

HOn-Die PLL voltage regulator enable

*

LOn-Die PLL Voltage Regulator disable

+3V_PCH

1 1

Deep S4,S5 wake event signal RTC alarm,Power BTN,GPIO27 PCH_GPIO27 (Have internal Pull-High) Deep S4,S5 wake event signal

2 2

3 3

+3VS

+3V_PCH

4 4

12

R411

4.7K_0402_5%

PCH_GPIO28

12

@

R413

1K_0402_5%

Debug Port DG 1.2 PH 4.7K +3VALW_PCH

R83

@R83

@

10K_0402_5%

+3VS

R439

1 2

200K_0402_5%

+3V_PCH

SATA2GP/GPIO36 & SATA3GP/GPIO37 Sampled at Rising edge of PWROK. Weak internal pull-down. (weak internal pull-down is disabled after PLTRST# de-asserts) NOTE: This signal should NOT be pulled high when strap is sampled

+3VS

200K_0402_5%

R261

@R261

@

1 2

1K_0402_5%

R115 10K_0402_5%R115 10K_0402_5%

1 2

R71 10K_0402_5%R71 10K_0402_5%

1 2

R416 10K_0402_5%R416 10K_0402_5%

1 2

R220 10K_0402_5%R220 10K_0402_5%

1 2

R412 1K_0402_5%R412 1K_0402_5%

1 2

R427 10K_0402_5%UMA@R427 10K_0402_5%UMA@

1 2

R426 10K_0402_5%OPT@R426 10K_0402_5%OPT@

12

ODD_DETECT#

12

EC_LID_OUT#

EC_SMI#

mSATA_DET#

DGPU_PWROK

PCH_BT_ON#

BT_DISABLE

PCH_GPIO15

PCH_GPIO38

+3VS

12

@

R55

R55 10K_0402_5%

10K_0402_5%

PCH_GPIO37

R94

R94 10K_0402_5%

10K_0402_5%

+3VS

+3V_PCH

BT ON/OFF

+3VS

+3V_PCH

R112 10K_0402_5%R112 10K_0402_5%

1 2

R402 10K_0402_5%R402 10K_0402_5%

1 2

R70 10K_0402_5%R70 10K_0402_5%

1 2

EC_SCI#<42>

EC_SMI#<42>

R376 10K_0402_5%R376 10K_0402_5%

1 2

mSATA_DET#<40>

DGPU_PWROK<30,55>

BT_DISABLE<40>

R92 10K_0402_5%R92 10K_0402_5%

1 2

EC_LID_OUT#<42>

PCH_BT_ON#<40,43>

R97

10K_0402_5%

ODD_DETECT#<39>

R221 10K_0402_5%R221 10K_0402_5%

1 2

R128 10K_0402_5%R128 10K_0402_5%

1 2

R111 10K_0402_5%R111 10K_0402_5%

1 2

R52 10K_0402_5%R52 10K_0402_5%

1 2

U13F

PCH_GPIO0

PCH_GPIO1

PCH_GPIO6

EC_SCI#

EC_SMI#

PCH_GPIO12

PCH_GPIO15

mSATA_DET#

DGPU_PWROK

BT_DISABLE

PCH_GPIO24

EC_LID_OUT#

PCH_GPIO28

PCH_BT_ON#

PCH_GPIO35

12

ODD_DETECT#

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

PCH_GPIO48

PCH_GPIO49

PCH_GPIO57

U13F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

COUGARPOINT_FCBGA989

GPIO

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

PROCPWRGD

CPU/MISC

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

NCTF

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

A20GATE

PECI

RCIN#

THRMTRIP#

INIT3_3V#

NC_1

NC_2

NC_3

NC_4

NC_5

Project ID GPIO70

*

U510

ODD_EN#

C40

PCH_GPIO69

B41

PCH_GPIO70

C41

PCH_GPIO71

A40

R106

12

10K_0402_5%

GATEA20

P4

PCH_PECI_R H_PECI

AU16

KBRST#

P5

H_CPUPWRGD

AY11

PCH_THRMTRIP#_R

AY10

T14

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

@ R158

@

1 2

0_0402_5%

390_0402_5%

INIT3_3V

This signal has weak internal PU, can't pull low,leave NC

1

ODD_EN# <39>

+3VS

R158

KBRST# <42>

H_CPUPWRGD <6>

R159

12

GATEA20 <42>

H_THERMTRIP#

Checklist1.5 P.69

H_PECI <6,42>

H_THERMTRIP# <6>

@

R67

10K_0402_5%

R42

10K_0402_5%

12

R69

10K_0402_5%

12

@

R44

10K_0402_5%

ODD_EN#

KBRST#

CTRL+ALT+DEL

non CPU power ok

130c shut down

12

PCH_GPIO71PCH_GPIO69 PCH_GPIO70

12

R103 10K_0402_5%R103 10K_0402_5%

R400 10K_0402_5%R400 10K_0402_5%

@

R68

10K_0402_5%

R43

10K_0402_5%

12

+3VS+3VS +3VS

12

+3VS

*

OPT UMA

0 1

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (6/9) GPIO, CPU, MISC

LA-8971P

E

19 58Wednesday, February 15, 2012

0.1

PCH_GPIO38

A

+1.05VS_VTT

1 1

10U_0603_6.3V6M

1

C106

2

Place Near AA23

1U_0402_6.3V6K

1

2

T31PAD @T31PAD @

1

C75

2

+1.05VS_VTT

1U_0402_6.3V6K

+VCCAPLLEXP

1

C64

C67

2

On-Die PLL Voltage Regulator

On-Die PLL voltage regulator

H



enable

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA

+1.05VS_VTT

2 2

10U_0603_6.3V6M

1

C87

C80

2

Place Near AN16,AN21,AN33

+3VS

Place Near BH29

1U_0402_6.3V6K

1

C88

C90

2

1

C107

0.1U_0402_16V7K

2

PAD @

T17

1U_0402_6.3V6K

1

C86

2

+1.05VS_VCCAPLL_FDI

+1.05VS_VTT

1U_0402_6.3V6K

+1.5VS

On-Die PLL Voltage Regulator H

On-Die PLL voltage regulator



3 3

enable

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA

1

C98

C98 1U_0402_6.3V6K

1U_0402_6.3V6K

Near

2

AU20

U13G

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

2925mA

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VCCFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

COUGARPOINT_FCBGA989

Trace 20mil

4 4

B

POWER

VCC CORE

60mA

VCCIO

FDI

1mA

CRTLVDS

1mA

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

266mA

20mA

DMI

190mA

NAND / SPI HVCMOS

20mA

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCIO[1]

VCCPNAND[1]

VCCPNAND[2]

VCCPNAND[3]

VCCPNAND[4]

VCCSPI

C

Thermal Senser share with VCCADAC power rail so can't remove this power

Place Near U48

+VCCADAC

U48

U47

AK36

AK37

AM37

AM38

AP36

AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

+VCCA_LVDS

+1.5VS

+1.05VS_VTT

+3VS

1

C60

C60 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C53

0.01U_0402_16V7K

2

0_0805_5%

+3VS

1

C61

0.1U_0402_16V7K

2

Place Near V33

1

C96

C96 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.8VS

1

C81

0.1U_0402_16V7K

place

2

near AG16

R442

Place Near AM37

1

2

place near AT20

1

2

12

+3VS

C91

0.01U_0402_16V7K

C54

0.1U_0402_16V7K

1

C92

0.01U_0402_16V7K

2

+3VS

L16

MBK1608221YZF_2P

1

C40

C40 10U_0603_6.3V6M

10U_0603_6.3V6M

2

12

+VCCTX_LVDS

1

C108

C108 22U_0805_6.3V6M

22U_0805_6.3V6M

2

L27

0.1UH_MLF1608DR10KT_10%_1608

L27

I/O Buffer Voltage

Internal PLL and VRM(+1.5VS)

DMI buffer logic

Core Well I/O Buffer

VccDFTERM should PH +1.8VS or +3VS

For SPI control logi

D

+1.8VS

12

0.1uH inductor, 200mA

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

VccIO 2.925

VccASW 1.01

VccSPI 0.02

VccDSW 0.003

Voltage

1.05

5

3.3

1.05

3.3

1.8 0.19VccpNAND

VccRTC 6 uA

VccSus3_3

3.3

3.3 / 1.5VccSusHDA

VccVRM 1.8 / 1.5 0.16

VccCLKDMI

VccSSC 0.095

VccDIFFCLKN 0.055

VccALVDS

VccTX_LVDS 0.06

1.05

3.3

1.8

S0 Iccmax Current(A)

0.001

0.266

0.001

0.08

1.3

0.042

0.266

0.01

0.02

0.001

E

Processor I/F

PCH Core Well Reference Voltage

Suspend Well Reference Voltag

I/O Buffer Voltage

Display DAC Analog Power. This power is supplied by the core well.

Display PLL A power

Display PLL B power

Internal Logic Voltage

DMI Buffer Voltage

Core Well I/O buffers

1.05 V Supply for Intel R Management Engine and Integrated LAN

3.3 V Supply for SPI Controller Logic

3.3v supply for Deep S4/S5 well

1.8V power supply for DF_TVS

Battery Voltage

Suspend Well I/O Buffer Voltage

High Definition Audio Controller Suspend Voltage

1.8 V Internal PLL and VRMs (1.8 V for Desktop)

DMI Clock Buffer Voltage

Spread Modulators Power Supply

Differential Clock Buffers Power Supply

Analog power supply for LVDS (Mobile Only) Analog power supply for LVDS (Mobile Only)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH (7/9) PWR

LA-8971P

E

0.1

20 58Wednesday, February 15, 2012

0.1

A

+1.05V analog internal clock PLL

+3VS

L23

1 2

10UH_LB2012T100MR_20%

10U_0603_6.3V6M

1 1

C71

+3VS_VCC_CLKF33

1

1U_0402_6.3V6K

2

Near T38

C55

Can NC

1

2

suppied by internal

1.05V VR must NC

GPIO28

On-Die PLL Voltage Regulator

H

On-Die PLL voltage regulator



enable

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA

+1.05VS_VTT

2 2

3 3

4 4

L25

1 2

10UH_LB2012T100MR_20%

L26

1 2

10UH_LB2012T100MR_20%

1

+

C112

C112 220U_6.3V_M

220U_6.3V_M

SF000002Y00

2

SGA20331E10 330U 2V H1.9 9mohm POLY

+1.05VS_VTT

1

C77

C77 1U_0402_6.3V6K

1U_0402_6.3V6K

Place

2

near AF17

isolation between SSC (AG33) and DIFFCLKN(AF33,AF34,AG34) 18mil width(DIFFCLKN) 10mil (SSC)

1

C79

C79 1U_0402_6.3V6K

1U_0402_6.3V6K

Place

2

near AG33

suppied by internal

1.05V VR Must NC

A

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

1

C103

C103 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Near BD47

1

C104

C104 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Near BF47

+1.05VS_VTT

1

C72

C72 1U_0402_6.3V6K

1U_0402_6.3V6K

Place

2

near AF33, AF34,AG34

+1.05VS_VTT

1

C74

C74 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Place near AG33

+1.05VS_VTT

C114

Place near BJ8

4.7U_0603_6.3V6K

1

2

+3VALW

+1.05VS_VTT

1

C56

2

Near AA19

Near M6

C39

0.1U_0402_16V7K

Near V16

0.1U_0402_16V7K

1

C109

2

B

+1.05VS_VTT

T30PAD @T30PAD @

C113

1U_0402_6.3V6K

C73

0.1U_0402_16V7K

1

C111

2

B

R450

@R450

@

1 2

0_0402_5%

R407

1 2

0_0402_5%

0.1U_0402_16V7K

T14

T14 PAD @

PAD @

+VCCAPLL_CPY_PCH

+1.05VS_VTT

@

T15

T15 PAD

PAD

22U_0805_6.3V6M

1

C110

2

1U_0402_6.3V6K

1

C66

2

12

+1.5VS

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

C57

0.1U_0402_16V7K

T13PAD @T13PAD @

+RTCVCC

1

C445

2

Near A22

+VCCACLK

+VCCDSW3_3

1

C47

2

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCSUS1

22U_0805_6.3V6M

1U_0402_6.3V6K

+VCCRTCEXT

+VCCSST

12

+1.05VM_VCCSUS

1U_0402_6.3V6K

0.1U_0402_16V7K

1

C450

2

AD49

T16

V12

T38

BH23

AL29

AL24

AA19

AA21

AA24

AA26

AA27

AA29

AA31

AC26

AC27

AC29

AC31

AD29

AD31

W21

W23

W24

W26

W29

W31

W33

N16

Y49

BD47

BF47

AF17 AF33 AF34 AG34

AG33

V16

T17 V19

BJ8

A22

0.1U_0402_16V7K

1

C453

2

POWER

1010mA

55mA

95mA

1mA

POWER

3mA

Clock and Miscellaneous

80mA 80mA

CPURTC

U13J

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2

VCCIO[14]

DCPSUS[3]

VCCASW[1]

VCCASW[2]

VCCASW[3]

VCCASW[4]

VCCASW[5]

VCCASW[6]

VCCASW[7]

VCCASW[8]

VCCASW[9]

VCCASW[10]

VCCASW[11]

VCCASW[12]

VCCASW[13]

VCCASW[14]

VCCASW[15]

VCCASW[16]

VCCASW[17]

VCCASW[18]

VCCASW[19]

VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA

VCCADPLLB

VCCIO[7] VCCIO[8] VCCIO[9] VCCIO[11]

VCCIO[10]

DCPSST

DCPSUS[1] DCPSUS[2]

V_PROC_IO

VCCRTC

COUGARPOINT_FCBGA989

119mA

1mA

PCI/GPIO/LPCMISC

SATA USB

10mA

HDA

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

1mA

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

C

+1.05VS_VTT

V5REF

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

+1.05VS_VTT

T21

V21

T19

P32

C

1

C51

C51 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Near N26

1

2

+1.05VS_VTT

+PCH_V5REF_SUS

+VCCA_USBSUS

+3V_PCH

+PCH_V5REF_RUN

+1.05VS_VTT

+VCCSATAPLL

+1.05VS_VTT

+3V_PCH

1

C41

0.1U_0402_16V4Z

2

Near P32

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3V_PCH

C46

0.1U_0402_16V7K

Near M26

@

0.1U_0402_16V7K

T16

T16 PAD

PAD

+3V_PCH

1

C38

C38 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Near N20

1

C471

0.1U_0402_16V7K

Place near

2

AJ2

Near AH13,AH14,AF13

1

C76

C76 1U_0402_6.3V6K

1U_0402_6.3V6K

2

T29 PAD@ T29 PAD@

+1.5VS

1

C68

C68 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Near AC16

1

C45

0.1U_0402_16V7K

Near T24Near T23

2

RB751V-40_SOD323-2

1 2

C37

suppied by internal

1.05V VR Must NC

1

C65

0.1U_0402_16V7K

Place near

2

AA16,W16

Compal Secret Data

2011/06/24 2012/07/12

Compal Secret Data

D

+3V_PCH +5V_PCH

D23

1 2

RB751V-40_SOD323-2

1U_0603_10V6K

Near P34

+3VS

1

C49

0.1U_0402_16V7K

Place near

2

T34

GPIO28

On-Die PLL Voltage Regulator

HOn-Die PLL voltage regulator enable

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA

Deciphered Date

D

12

R364

R364 100_0402_5%

100_0402_5%

D29

C42

+3VS +5VS

1 2

1

2

PCH_PWR_EN<42>

12

R130

R130 100_0402_5%

100_0402_5%

E

+5VALW

2 1

Q39

Q39 AO3413_SOT23-3

AO3413_SOT23-3

S

PCH_PWR_EN#

AO3413_SOT23-3

PCH_PWR_EN#

DSP3@ R711

DSP3@

1 2

0_0402_5%

0.1U_0402_10V7K

PCH_PWR_EN#

PCH_PWR_EN

Title

Size Document Number Rev

Custom

Date: Sheet of

R710

DSP3@ R710

DSP3@

1 2

0_0402_5%

+3VALW

2

DSP3@

C5103

0.1U_0402_10V7K

J20

@J20

@

2 1

2MM

D

S

D

S

13

Q29

G

2

R711

1

DSP3@

C5104

2

+5VALW

12

DSP3@

R279

R279 100K_0402_1%

100K_0402_1%

13

D

DSP3@

Q13

2N7002_SOT23

G

S

Compal Electronics, Inc.

PCH (8/9) PWR

LA-8971P

E

J21

2MM

G

2

1

2

DSP3@

C434

@J21

@

D

13

+3V_PCH

12

DSP3@

C435

10U_0603_6.3V6M

+5V_PCH

1U_0402_6.3V6K

10U_0603_6.3V6M

1U_0402_6.3V6K

12

DSP3@

C5245

12

DSP3@

C5242

0.1

21 58Wednesday, February 15, 2012

0.1

A

1 1

2 2

3 3

4 4

U13H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

COUGARPOINT_FCBGA989

B

U13I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98] VSS[99]

VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

COUGARPOINT_FCBGA989

C

H46

VSS[259]

K18

VSS[260]

K26

VSS[261]

K39

VSS[262]

K46

VSS[263]

K7

VSS[264]

L18

VSS[265]

L2

VSS[266]

L20

VSS[267]

L26

VSS[268]

L28

VSS[269]

L36

VSS[270]

L48

VSS[271]

M12

VSS[272]

P16

VSS[273]

M18

VSS[274]

M22

VSS[275]

M24

VSS[276]

M30

VSS[277]

M32

VSS[278]

M34

VSS[279]

M38

VSS[280]

M4

VSS[281]

M42

VSS[282]

M46

VSS[283]

M8

VSS[284]

N18

VSS[285]

P30

VSS[286]

N47

VSS[287]

P11

VSS[288]

P18

VSS[289]

T33

VSS[290]

P40

VSS[291]

P43

VSS[292]

P47

VSS[293]

P7

VSS[294]

R2

VSS[295]

R48

VSS[296]

T12

VSS[297]

T31

VSS[298]

T37

VSS[299]

T4

VSS[300]

W34

VSS[301]

T46

VSS[302]

T47

VSS[303]

T8

VSS[304]

V11

VSS[305]

V17

VSS[306]

V26

VSS[307]

V27

VSS[308]

V29

VSS[309]

V31

VSS[310]

V36

VSS[311]

V39

VSS[312]

V43

VSS[313]

V7

VSS[314]

W17

VSS[315]

W19

VSS[316]

W2

VSS[317]

W27

VSS[318]

W48

VSS[319]

Y12

VSS[320]

Y38

VSS[321]

Y4

VSS[322]

Y42

VSS[323]

Y46

VSS[324]

Y8

VSS[325]

BG29

VSS[328]

N24

VSS[329]

AJ3

VSS[330]

AD47

VSS[331]

B43

VSS[333]

BE10

VSS[334]

BG41

VSS[335]

G14

VSS[337]

H16

VSS[338]

T36

VSS[340]

BG22

VSS[342]

BG24

VSS[343]

C22

VSS[344]

AP13

VSS[345]

M14

VSS[346]

AP3

VSS[347]

AP1

VSS[348]

BE16

VSS[349]

BC16

VSS[350]

BG28

VSS[351]

BJ28

VSS[352]

D

E

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH (9/9) VSS

LA-8971P

E

0.1

22 58Wednesday, February 15, 2012

0.1

A

B

C

D

E

U48A

AG6 AG7

AF7 AE7 AE9 AF9

AG9

AG10

AF10 AE10 AE12

AF12 AG12 AG13

AF13 AE13 AE15

AF15 AG15 AG16

AF16 AE16 AE18

AF18 AG18 AG19

AF19 AE19 AE21

AF21 AG21 AG22

AC9

AB9 AB10 AC10 AD11 AC11 AC12 AB12 AB13 AC13 AD14 AC14 AC15 AB15 AB16 AC16 AD17 AC17 AC18 AB18 AB19 AC19 AD20 AC20 AC21 AB21 AD23 AE23

AF24 AE24 AG24 AG25

AE8

AD8

AF22 AE22

AF25

AC7

AC6

N13P-GV-S_FCBGA595~D

XTALOUT XTALIN

18P_0402_50V8J

R226

OPT@R226

OPT@

2.49K_0402_1%

OPT@ R227

OPT@

0_0402_5%

PEG_HTX_C_GRX_P15 PEG_HTX_C_GRX_N15 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_P11 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_P9 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_N8

PEG_GTX_HRX_P15 PEG_GTX_HRX_N15 PEG_GTX_HRX_P14 PEG_GTX_HRX_N14 PEG_GTX_HRX_P13 PEG_GTX_HRX_N13 PEG_GTX_HRX_P12 PEG_GTX_HRX_N12 PEG_GTX_HRX_P11 PEG_GTX_HRX_N11 PEG_GTX_HRX_P10 PEG_GTX_HRX_N10 PEG_GTX_HRX_P9 PEG_GTX_HRX_N9 PEG_GTX_HRX_P8 PEG_GTX_HRX_N8

CLK_PCIE_VGA CLK_PCIE_VGA#

PEX_TSTCLK_OUT+ PEX_TSTCLK_OUT-

PEX_TREMP

DGPU_RST#

PEG_CLKREQ#_C

R227

R228

OPT@ R228

OPT@

10K_0402_5%

PEG_GTX_HRX_P[8..15]<5>

PEG_GTX_HRX_N[8..15]<5>

PEG_HTX_C_GRX_P[8..15]<5>

1 1

2 2

3 3

PEG_HTX_C_GRX_N[8..15]<5>

PEG_GTX_HRX_P[8..15]

PEG_GTX_HRX_N[8..15]

PEG_HTX_C_GRX_P[8..15]

PEG_HTX_C_GRX_N[8..15]

PEG_CLKREQ#<15>

CLK_PCIE_VGA<15>

CLK_PCIE_VGA#<15>

R225 200_0402_1%@R225 200_0402_1%@

DGPU_RST#<18>

PEG_CLKREQ#

+3VSDGPU

Part 1 of 5

PEX_RX0 PEX_RX0_N PEX_RX1 PEX_RX1_N PEX_RX2 PEX_RX2_N PEX_RX3 PEX_RX3_N PEX_RX4 PEX_RX4_N PEX_RX5 PEX_RX5_N PEX_RX6 PEX_RX6_N PEX_RX7 PEX_RX7_N PEX_RX8 PEX_RX8_N PEX_RX9 PEX_RX9_N PEX_RX10 PEX_RX10_N PEX_RX11 PEX_RX11_N PEX_RX12 PEX_RX12_N PEX_RX13 PEX_RX13_N PEX_RX14 PEX_RX14_N PEX_RX15 PEX_RX15_N

PEX_TX0 PEX_TX0_N PEX_TX1 PEX_TX1_N PEX_TX2 PEX_TX2_N PEX_TX3 PEX_TX3_N PEX_TX4 PEX_TX4_N PEX_TX5 PEX_TX5_N PEX_TX6 PEX_TX6_N PEX_TX7 PEX_TX7_N PEX_TX8 PEX_TX8_N PEX_TX9 PEX_TX9_N PEX_TX10 PEX_TX10_N PEX_TX11 PEX_TX11_N PEX_TX12 PEX_TX12_N PEX_TX13 PEX_TX13_N PEX_TX14 PEX_TX14_N PEX_TX15 PEX_TX15_N

PEX_REFCLK PEX_REFCLK_N

PEX_TSTCLK_OUT PEX_TSTCLK_OUT_N

PEX_TERMP

PEX_RST_N

PEX_CLKREQ_N

3

1

OPT@

C124

2

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9

GPIO10

GPIO

GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21

DACA_HSYNC DACA_VSYNC

DACA_RED

DACA_BLUE

DACA_GREEN

DACA_VREF DACA_RSET

JTAG_TCK

JTAG_TDI

JTAG_TDO

JTAG_TMS

JTAG_TRST_N

PCI EXPRESS

TEST

TESTMODE

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL

I2C DACA

I2CC_SDA

I2CS_SCL

I2CS_SDA

XTAL_SSIN

XTAL_OUTBUFF

XTAL_OUT

CLK

XTAL_IN

PEX_WAKE_N

PGOOD

R229

@ R229

@

1M_0402_5%

Y1000

OPT@Y1000

OPT@

27MHZ 10PF 7V27000050

3

GND

2

4

1

CEC

C6 B2 D6 C7 F9 A3 A4 B6 A6 F8 C5 E7 D7 B4 B3 C3 D5 D4 C2 F7 E6 C4

AE3 AE4

AG3 AF3 AF4

AE2 AF2

AE5 AE6 AF6 AD6 AG4

AD9

B7 A7

C9 C8

A9 B9

D9 D8

A10

C10

B10

C11

AB6

D10

E9

1

JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST

R234 10K_0402_5%OPT@R234 10K_0402_5%OPT@

VGA_LCD_CLK VGA_LCD_DATA

I2CS_SCL I2CS_SDA

XTAL_SSIN

XTAL_OUTBUFF

XTALOUT

XTALIN

R232

1

OPT@

C125

C125 18P_0402_50V8J

18P_0402_50V8J

2

VID_4 VID_3

VID_1 VID_2

R280 2.2K_0402_5%OPT@R280 2.2K_0402_5%OPT@ R283 2.2K_0402_5%OPT@R283 2.2K_0402_5%OPT@

VID_0 ACIN_BUF VID_5

1 2

@R232

@

10K_0402_5%

12 12

10K_0402_5%OPT@

R284

R236 10K_0402_5%@R236 10K_0402_5%@

1 2

R235 10K_0402_5%OPT@R235 10K_0402_5%OPT@

1 2

+3VSDGPU

VID_0

R45 0_0402_5%OPT@R45 0_0402_5%OPT@

VID_1

R98 0_0402_5%OPT@R98 0_0402_5%OPT@

VID_2

R135 0_0402_5%OPT@R135 0_0402_5%OPT@

VID_3

R222 0_0402_5%OPT@R222 0_0402_5%OPT@

VID_4

R223 0_0402_5%OPT@R223 0_0402_5%OPT@

VID_5

R224 0_0402_5%OPT@R224 0_0402_5%OPT@

T19

@T19

@

T10

@T10

@

T12

@T12

@

T5

@T5

@

ACIN_BUF<42>

12

OPT@

R233

R233 10K_0402_1%

10K_0402_1%

N13M-GS VID Default setup is 0.875V

+3VSDGPU

@

OPT@

R243 10K_0402_5%

R241 10K_0402_5%@R241 10K_0402_5%@R240 10K_0402_5%

R240 10K_0402_5%

R24610K_0402_5%@R24610K_0402_5%

R25010K_0402_5%

OPT@

R243 10K_0402_5%

R242 10K_0402_5%@R242 10K_0402_5%

R25110K_0402_5%

R25210K_0402_5%@R25210K_0402_5%

@

OPT@

ACIN <16,42,50>

PAD

PAD PAD

PAD

OPT@

D8

2 1

CH751H-40PT_SOD323-2

R239 10K_0402_5%@R239 10K_0402_5%

R24510K_0402_5%

@

OPT@

ACINACIN_BUF

OPT@

R244 10K_0402_5%

GPU_VID0 <55> GPU_VID1 <55> GPU_VID2 <55> GPU_VID3 <55> GPU_VID4 <55> GPU_VID5 <55>

R25310K_0402_5%@R25310K_0402_5%

I2CS_SCL

GPIO I/O USAGE

GPIO0

O

GPIO1

O

GPIO2

O

GPIO3

O

GPIO4

O

GPIO5

O

GPIO6

O

GPIO7

O

GPIO8

I/O

GPIO9

I/O

GPIO10

O

GPIO11

O

GPIO12

I

GPIO13

O

GPIO14

I

GPIO15

I

GPIO16

O

GPIO17

I

GPIO18

I

GPIO19

I

GPIO20

GPIO21

VGA_LCD_CLK VGA_LCD_DATA

I2CS_SCL I2CS_SDA

DMN66D0LDW-7_SOT363-6

+3VSDGPU

2

R258 2.2K_0402_5%OPT@R258 2.2K_0402_5%OPT@

1 2

R259

1 2

R260 2.2K_0402_5%OPT@R260 2.2K_0402_5%OPT@

1 2

R262

1 2

OPT@

QV6A

61

GPU Core VID4

GPU Core VID3

LCD_BL_PWM

LCD_VCC

LCD_BLEN

GPU Core VID1

GPU Core VID2

3D Vision

OVERT

ALERT

MEM_VREF_CTL

GPU Core VID0

PWR_LEVEL

GPU Core VID5

HPD_AB

HPD_C

MEM_VDD_CTL

HPD_D

HPD_E

HPD_F

Reserved

+3VSDGPU

2.2K_0402_5%OPT@

EC_SMB_CK2 <15,42,44>

4 4

A

B

XTAL_SSIN

10K_0402_5%

OPT@

R230

XTAL_OUTBUFF

12

OPT@

R231

10K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/05/23 2012/12/31

Compal Secret Data

Deciphered Date

D

Title

Size Document Number Rev

Custom

Date: Sheet of

+3VSDGPU

OPT@

5

QV6B

I2CS_SDA

QV6B

Compal Electronics, Inc.

N13M-GS 1/7

LA-8971P

34

E

EC_SMB_DA2 <15,42,44>

23 58Wednesday, February 15, 2012

0.1

A

U48B

Part 2 of 5

MDA[15..0]<28>

MDA[31..16]<28>

MDA[47..32]<29>

MDA[63..48]<29>

1 1

MDA[15..0]

MDA[31..16]

MDA[47..32]

MDA[63..48]

CLKA0<28>

CLKA0#<28>

CLKA1<29>

CLKA1#<29>

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

CLKA0 CLKA0#

CLKA1 CLKA1#

E18

F18

E16

F17 D20 D21

F20 E21 E15 D15

F15

F13 C13 B13 E13 D13 B15 C16 A13 A15 B18 A18 A19 C19 B24 C23 A25 A24 A21 B21 C20 C21 R22 R24

T22 R23 N25 N26 N23 N24 V23 V22

T23 U22

Y24

AA24

Y22

AA23 AD27 AB25 AD26 AC25 AA27 AA26

W26

Y25 R26

T25 N27 R27 V26 V27

W27

T11PAD@ T11PAD@

W25

D23

D24 D25

N22 M22

Part 2 of 5

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FB_VREF_PROBE

FBA_CLK0 FBA_CLK0_N

FBA_CLK1 FBA_CLK1_N

N13P-GV-S_FCBGA595~D

MEMORY INTERFACE

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_WCK01_N

FBA_WCK23_N

FBA_WCK45_N

FBA_WCK67_N

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_WCK01

FBA_WCK23

FBA_WCK45

FBA_WCK67

FBA_DEBUG0 FBA_DEBUG1

C27 C26 E24 F24 D27 D26 F25 F26 F23 G22 G23 G24 F27 G25 G27 G26 M24 M23 K24 K23 M27 M26 M25 K26 K22 J23 J25 J24 K27 K25 J27 J26

D19 D14 C17 C22 P24 W24 AA25 U25

F19 C14 A16 A22 P25 W22 AB27 T27

E19 C15 B16 B22 R25 W23 AB26 T26

D18 C18 D17 D16 T24 U24 V24 V25

F22 J22

CMDA0 CMDA1 CMDA2 CMDA3 CMDA4 CMDA5 CMDA6 CMDA7 CMDA8 CMDA9 CMDA10

CMDA11

CMDA12 CMDA13 CMDA14 CMDA15 CMDA16 CMDA17 CMDA18 CMDA19 CMDA20 CMDA21 CMDA22 CMDA23 CMDA24 CMDA25 CMDA26 CMDA27 CMDA28 CMDA29 CMDA30

FBA_DEBUG0 FBA_DEBUG1

DQSA#0 DQSA#1 DQSA#2 DQSA#3 DQSA#4 DQSA#5 DQSA#6 DQSA#7

DQSA0 DQSA1 DQSA2 DQSA3 DQSA4 DQSA5 DQSA6 DQSA7

RV57 60.4_0402_1%@RV57 60.4_0402_1%@ RV59 60.4_0402_1%@RV59 60.4_0402_1%@

CMDA[30..0] <28,29>

DQMA0 DQMA1 DQMA2DQMA2 DQMA3 DQMA4DQMA4 DQMA5 DQMA6 DQMA7

DQMA[3..0] <28>

DQMA[7..4] <29>

DQSA#[3..0] <28>

DQSA#[7..4] <29>

DQSA[3..0] <28>

DQSA[7..4] <29>

+1.5VSDGPU

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2011/05/23 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N13M-GS 2/7

LA-8971P

24 58Wednesday, February 15, 2012

0.1

5

U48C

D D

C C

B B

U48C

AC3

IFPA_TXC

AC4

IFPA_TXC_N

Y4

IFPA_TXD0

Y3

IFPA_TXD0_N

AA3

IFPA_TXD1

AA2

IFPA_TXD1_N

AB1

IFPA_TXD2

AA1

IFPA_TXD2_N

AA4

IFPA_TXD3

AA5

IFPA_TXD3_N

AB5

IFPB_TXC

AB4

IFPB_TXC_N

AB3

IFPB_TXD4

AB2

IFPB_TXD4_N

AD3

IFPB_TXD5

AD2

IFPB_TXD5_N

AE1

IFPB_TXD6

AD1

IFPB_TXD6_N

AD4

IFPB_TXD7

AD5

IFPB_TXD7_N

N4

IFPC_AUX_I2CW_SCL

N5

IFPC_AUX_I2CW_SDA_N

T2

IFPC_L0

T3

IFPC_L0_N

T1

IFPC_L1

R1

IFPC_L1_N

R2

IFPC_L2

R3

IFPC_L2_N

N2

IFPC_L3

N3

IFPC_L3_N

P3

IFPD_AUX_I2CX_SCL

P4

IFPD_AUX_I2CX_SDA_N

V3

IFPD_L0

V4

IFPD_L0_N

U3

IFPD_L1

U4

IFPD_L1_N

T4

IFPD_L2

T5

IFPD_L2_N

R4

IFPD_L3

R5

IFPD_L3_N

J2

IFPE_AUX_I2CY_SCL

J3

IFPE_AUX_I2CY_SDA_N

N1

IFPE_L0

M1

IFPE_L0_N

M2

IFPE_L1

M3

IFPE_L1_N

K2

IFPE_L2

K3

IFPE_L2_N

K1

IFPE_L3

J1

IFPE_L3_N

H3

IFPF_AUX_I2CZ_SCL

H4

IFPF_AUX_I2CZ_SDA_N

M4

IFPF_L0

M5

IFPF_L0_N

L3

IFPF_L1

L4

IFPF_L1_N

K4

IFPF_L2

K5

IFPF_L2_N

J4

IFPF_L3

J5

IFPF_L3_N

N13P-GV-S_FCBGA595~D

Part 3 of 5

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 STRAP5

BUFRST_N

THERMDN THERMDP

GENERAL STRAPSERIAL

ROM_CS_N

ROM_SCLK

ROM_SI

LVDS / TMDS

ROM_SO

IFPAB_RSET

IFPC_RSET

IFPD_RSET

IFPEF_RSET

NC_G1 NC_G2 NC_G3 NC_G4 NC_G5 NC_G6 NC_G7

NC_V1 NC_V2 NC_V5 NC_V6

NC_W1 NC_W2 NC_W3 NC_W4

VMON_IN0 VMON_IN1

STRAP1

D2

STRAP2

E4

STRAP3

E3

STRAP4

D3 C1

@

R1080

1 2

D11

10K_0402_5%

E12 F12

ROM_CS#

D12

ROM_SCLK

C12

ROM_SI

B12

ROM_SO

A12

R1081 1K_0402_1%@R1081 1K_0402_1%@

AA6

T6

U6

K6

AD10

NC

AD7

NC

B19

NC

G1 G2 G3 G4 G5 G6 G7

V1 V2 V5 V6

W1 W2 W3 W4

E10 F10

1 2

R1082 1K_0402_1%@R1082 1K_0402_1%@

1 2

R1084 1K_0402_1%@R1084 1K_0402_1%@

1 2

R1083 1K_0402_1%@R1083 1K_0402_1%@

1 2

STRAP0

D1

4

OPT@ R1064

OPT@

1 2

10K_0402_5%

R1064

+3VSDGPU

3

2

1

Straps

+3VSDGPU

12

X76@

R1070

10K_0402_1%

STRAP0 STRAP1 STRAP3 STRAP2

12

X76@

R1073

12

X76@

R1071

R1072

10K_0402_1%

12

@

X76@

R1078

R1074

10K_0402_1%

12

@

R1079

R1075

10K_0402_1%

STRAP4

12

R1077

R1076

10K_0402_1%

For N13M-GS strap table

Memory Config

ROM_SI

ROM_SO

ROM_SCLK

+3VSDGPU

12

@

R1114

R1119

R1113

10K_0402_1%

12

R1118

R1116

R1132

10K_0402_1%

ROM_SIstrap2strap1strap0 ROM_SCLKROM_SOMemory SizeFrenq. strap4strap3GPU

10K_0402_1%

R1132 PD 10K

R1116 PD 10K

R1118 PD 10K

N13P-GS

900 MHz

128M* 16* 4 1GB

Hynix SA00003YO00

Samsung SA000047Q00

R1073 PD 10K

R1070 PU 10K

R1071 PU 10K

R1078 PD 10K

R1072 PU 10K

R1076 PD 10K

R1077 PD 10K

SA000047Q00:S IC D3 128M16 K4W2G1646C-HC11 FBGA 96P

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

SA00003YO00:S IC D3 128MX16 H5TQ2G63BFR-11C FBGA 96P

Compal Secret Data

2011/05/23 2012/12/31

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N13M-GS 3/7

LA-8971P

1

0.1

25 58Wednesday, February 15, 2012

0.1

5

4

3

2

1

OPT@C1115

OPT@

2

C1115

10U_0603_6.3V6M

1 OPT@C1036

OPT@

2

C1036

22U_0805_6.3V6M

1 OPT@C1022

OPT@

2

C1022

22U_0805_6.3V6M

0_0805_5%

4.7U_0603_6.3V6K

16 mils

+GPU_PLLVDD

+FBA_PLLVDD

+1.5VSDGPU

10U_0603_6.3V6M

OPT@

R449

1

OPT@C1119

OPT@

2

C1119

12

22U_0805_6.3VAM~D

+1.05VSDGPU

under GPU close to ball : N6,M6

1

OPT@C1002

OPT@

OPT@C1001

OPT@

2

C1002

0.1U_0402_16V4Z

C1001

1

OPT@C1120

OPT@

2

C1120

0.1U_0402_16V4Z

1

OPT@C1121

OPT@

2

C1121

0.1U_0402_16V4Z

1

OPT@C143

OPT@

2

C143

1

OPT@C1122

OPT@

2

C1122

Near GPU

1

OPT@C144

OPT@

2

C144

22U_0805_6.3VAM~D

1

OPT@C141

OPT@

2

C141

0.1U_0402_16V4Z

BLM18PG181SN1D_2P

4.7U_0603_6.3V6K

BLM18PG181SN1D_2P

1 OPT@C142

OPT@

2

C142

1U_0402_6.3V6K

OPT@

+1.05VSDGPU

L1003

12

+1.05VSDGPU

L1004

12

U48D

D D

C C

+3VSDGPU

R1068

1 2

0_0603_5%

B B

A A

Under GPU (one per pin)

OPT@R1068

OPT@

OPT@C1054

OPT@

C1054

+3VSDGPU

OPT@C1061

OPT@

C1061

VGA_VCCSENSE<55>

1

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

OPT@C1055

OPT@

OPT@C1056

OPT@

2

C1055

0.1U_0402_16V4Z

C1056

1

OPT@C1046

OPT@

OPT@C1047

OPT@

2

C1046

C1047

4.7U_0603_6.3V6K

R113010K_0402_5% @ R113010K_0402_5% @

12

R113110K_0402_5% @ R113110K_0402_5% @

12

R108610K_0402_5% @ R108610K_0402_5% @

12

R108810K_0402_5% @ R108810K_0402_5% @

12

R109110K_0402_5% @ R109110K_0402_5% @

12

R109210K_0402_5% @ R109210K_0402_5% @

12

R109410K_0402_5% @ R109410K_0402_5% @

12

R108710K_0402_5% @ R108710K_0402_5% @

12

VGA_VCCSENSE VGA_VCCSENSE_R

Near GPU

1

OPT@C1057

OPT@

OPT@C1059

OPT@

2

C1057

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

C1059

PEX_3V3

Near GPU

+IFPAB_PLLVDD

+IFPAB_IOVDD

+IFPC_PLLVDD

+IFPC_IOVDD

+IFPD_PLLVDD

+IFPD_IOVDD

+IFPEF_PLLVDD

+IFPEF_IOVDD

16mils

1

OPT@C1060

OPT@

2

1U_0402_6.3V6K

C1060

4.7U_0603_6.3V6K

+VGA_CORE

OPT@

12

R1056 0_0402_5%

+VDD33

PEX_3V3

+IFPAB_IOVDD +IFPC_IOVDD +IFPD_IOVDD

+IFPEF_IOVDD

+IFPAB_PLLVDD

+IFPC_PLLVDD

+IFPD_PLLVDD

+IFPEF_PLLVDD

K10 K12 K14 K16 K18

L11 L13 L15

L17 M10 M12 M14 M16 M18 N11 N13 N15 N17 P10 P12 P14 P16 P18 R11 R13 R15 R17

T10

T12

T14

T16

T18 U11 U13 U15 U17 V10 V12 V14 V16 V18

F2

G10 G12

G8 G9

F11

AB8

W6

Y6 P6 R6 H6 J6

V7

W7

M7

N7

R7 T7

J7 K7

N13P-GV-S_FCBGA595~D

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDD_SENSE

VDD33 VDD33 VDD33 VDD33

3V3AUX

PEX_SVDD_3V3

IFPA_IOVDD IFPB_IOVDD IFPC_IOVDD IFPD_IOVDD IFPE_IOVDD IFPF_IOVDD

IFPAB_PLLVDD IFPAB_PLLVDD

IFPC_PLLVDD IFPC_PLLVDD

IFPD_PLLVDD IFPD_PLLVDD

IFPEF_PLLVDD IFPEF_PLLVDD

Part 4 of 5

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

POWER

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_PLL_HVDD PEX_PLL_HVDD

PEX_PLLVDD PEX_PLLVDD

CORE_PLLVDD

FB_DLLAVDD

FB_CAL_PD_VDDQ

16 mils

+CORE_PLLVDD

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

VID_PLLVDD

SP_PLLVDD

FB_PLLAVDD FB_PLLAVDD

DACA_VDD

FB_CLAMP

Under GPU

Near GPU

1

OPT@C1042

OPT@

OPT@C1116

OPT@

2

C1042

C1116

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

+1.05VSDGPU

1

OPT@C1031

OPT@

OPT@C1030

OPT@

2

C1031

C1030

22U_0805_6.3V6M

10U_0603_6.3V6M

+1.05VSDGPU

1

OPT@C1021

OPT@

OPT@C1020

OPT@

2

C1021

C1020

22U_0805_6.3V6M

10U_0603_6.3V6M

Near GPUUnder GPU

1

OPT@C1053

OPT@

OPT@C1052

OPT@

2

C1053

C1052

1U_0402_6.3V6K

PEX_3V3

1 2

12

OPT@

R669

R669 10K_0402_5%

10K_0402_5%

22U_0805_6.3VAM~D

Under GPU

1

OPT@C1067

OPT@

2

C1067

1

OPT@C1065

OPT@

OPT@C1050

OPT@

2

C1065

C1050

1U_0402_6.3V6K

0.1U_0402_16V4Z

Under GPU Near GPU

1

OPT@C1028

OPT@

2

C1028

1

OPT@C1034

OPT@

OPT@C1029

OPT@

2

C1029

C1034

1U_0402_6.3V6K

Under GPU Near GPU

1

OPT@C1017

OPT@

OPT@C1016

OPT@

2

C1017

C1016

1U_0402_6.3V6K

16 mils

+1.5VSDGPU

+1.05VSDGPU

OPT@

L1005

BLM18PG300SN1D_2P

12

1

OPT@C1068

OPT@

OPT@C1043

OPT@

2

C1068

C1043

0.1U_0402_16V4Z

1

OPT@C1035

OPT@

2

C1035

10U_0603_6.3V6M

4.7U_0603_6.3V6K

1

OPT@C1019

OPT@

OPT@C1018

OPT@

2

C1019

C1018

10U_0603_6.3V6M

4.7U_0603_6.3V6K

1

OPT@C1051

OPT@

2

C1051

0.1U_0402_16V4Z

7200mA

B26 C25 E23 E26 F14 F21 G13 G14 G15 G16 G18 G19 G20 G21 H24 H26 J21 K21 L22 L24 L26 M21 N21 R21 T21 V21 W21

AA10 AA12 AA13 AA16 AA18 AA19 AA20 AA21 AB22 AC23 AD24 AE25 AF26 AF27

AA22 AB23 AC24 AD25 AE26 AE27

AA8 AA9

AA14 AA15 N6

+GPU_PLLVDD

M6

+CORE_PLLVDD

L6 F16 P22

+FBA_PLLVDD

H22

R1133 10K_0402_5%OPT@R1133 10K_0402_5%OPT@

W5

R1139 40.2_0402_1%OPT@R1139 40.2_0402_1%OPT@

D22

F3

Near GPU

1

OPT@C1003

OPT@

2

C1003

1

OPT@C158

OPT@

2

C158

0.1U_0402_16V4Z

near the ball

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/05/23 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N13M-GS 4/7

LA-8971P

1

0.1

26 58Wednesday, February 15, 2012

0.1

5

U48E

D D

C C

B B

U48E

AA7

GND

A2

GND

A26

GND

AB11

GND

AB14

GND

AB17

GND

AB20

GND

AB24

GND

AC2

GND

AC22

GND

AC26

GND

AC5

GND

AC8

GND

AD12

GND

AD13

GND

AD15

GND

AD16

GND

AD18

GND

AD19

GND

AD21

GND

AD22

GND

AE11

GND

AE14

GND

AE17

GND

AE20

GND

AF1

GND

AF11

GND

AF14

GND

AF17

GND

AF20

GND

AF23

GND

AF5

GND

AF8

GND

AG2

GND

AG26

GND

B1

GND

B11

GND

B14

GND

B17

GND

B20

GND

B23

GND

B27

GND

B5

GND

B8

GND

E11

GND

E14

GND

E17

GND

E2

GND

E20

GND

E22

GND

E25

GND

E5

GND

E8

GND

H2

GND

H23

GND

H25

GND

H5

GND

K11

GND

K13

GND

K15

GND

K17

GND

N13P-GV-S_FCBGA595~D

Part 5 of 5

FB_CAL_TERM_GND

MULTI_STRAP_REF0_GND MULTI_STRAP_REF1_GND MULTI_STRAP_REF2_GND

GND

FB_CAL_PU_GND

GND_SENSE

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

L10 L12 L14 L16 L18 L2 L23 L25 L5 M11 M13 M15 M17 N10 N12 N14 N16 N18 P11 P13 P15 P17 P2 P23 P26 P5 R10 R12 R14 R16 R18 T11 T13 T15 T17 U10 U12 U14 U16 U18 U2 U23 U26 U5 V11 V13 V15 V17 Y2 Y23 Y26 Y5 AB7

C24

B25

F6 F4 F5

F1

RV98 42.2_0402_1%OPT@RV98 42.2_0402_1%OPT@

RV101 51.1_0402_1%OPT@RV101 51.1_0402_1%OPT@

R5537 40.2K_0402_1%@R5537 40.2K_0402_1%@ R5538 40.2K_0402_1%@R5538 40.2K_0402_1%@ R5539 40.2K_0402_1%@R5539 40.2K_0402_1%@

1 2

1 2 1 2 1 2

4

1 2

R1057 0_0402_5%OPT@R1057 0_0402_5%OPT@

3

VGA_VSSSENSEVGA_VSSSENSE_R

16mils

VGA_VSSSENSE <55>

2

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/05/23 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N13M-GS 5/7

LA-8971P

1

0.1

27 58Wednesday, February 15, 2012

0.1

5

VRAM DDR3 chips (1GB)

128Mx16 DDR3 *4==>1GB

4

3

2

1

12

Near VRAM

12

1

OPT@C1069

OPT@

2

C1069

12

Near VRAM

12

1

OPT@C1070

OPT@

2

C1070

12

OPT@

RV1

RV1 160_0402_1%

160_0402_1%

DQSA[7..0]

DQSA#[7..0]

DQMA[7..0]

MDA[63..0]

CMDA[30..0]

+MEM_VREF0

1

OPT@

C1091

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

+MEM_VREF1

1

OPT@

C1092

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

@ R1099

@

1 2

80.6_0402_1%

@ R1101

@

1 2

80.6_0402_1%

0.01U_0402_16V7K

R1099

R1101

C1071

UV12

+MEM_VREF0

CMDA9 CMDA11 CMDA8 CMDA25 CMDA10 CMDA24 CMDA22 CMDA7 CMDA21 CMDA6 CMDA29 CMDA23 CMDA28 CMDA20 CMDA4 CMDA14

CMDA12 CMDA27 CMDA26

CLKA0 CLKA0# CMDA3

CMDA2 CMDA0 CMDA30 CMDA15 CMDA13

DQSA0 DQSA2

DQMA0 DQMA2

DQSA#0 DQSA#2

CMDA5

ZQ0

12

OPT@

RV1095

243_0402_1%

1

@

2

+1.5VSDGPU +1.5VSDGPU

UV12

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646G-BC11_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS

MDA4

E3

MDA1

F7

MDA5

F2

MDA0

F8

MDA6

H3

MDA3

H8

MDA7

G2

MDA2

H7

MDA19

D7

MDA20

C3

MDA18

C8

MDA23

C2

MDA17

A7

MDA22

A2

MDA16

B8

MDA21

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+1.5VSDGPU

Group0

Group2

243_0402_1%

OPT@

RV1103

12

+MEM_VREF1

CMDA9 CMDA11 CMDA8 CMDA25 CMDA10 CMDA24 CMDA22 CMDA7 CMDA21 CMDA6 CMDA29 CMDA23 CMDA28 CMDA20 CMDA4 CMDA14

CMDA12 CMDA27 CMDA26

CLKA0 CLKA0# CMDA3

CMDA2 CMDA0 CMDA30 CMDA15 CMDA13

DQSA1 DQSA3

DQMA1 DQMA3

DQSA#1 DQSA#3

CMDA5

ZQ1

UV13

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646G-BC11_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

MDA12

E3

MDA8

F7

MDA15

F2

MDA9

F8

MDA13

H3

MDA11

H8

MDA14

G2

MDA10

H7

MDA25

D7

MDA28

C3

MDA24

C8

MDA31

C2

MDA26

A7

MDA30

A2

MDA27

B8

MDA29

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Group1

Group3

+1.5VSDGPU

Mode D Address

CMD0

0..31

CS0_L#

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

ODT_L

CKE

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A8

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

Not Available

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

LOW HIGH

Command Bit Default Pull-down

ODTx 10k

CKEx

DDR3

RST 10k

CS* No Termination

CMDA2 CMDA3 CMDA5 CMDA18 CMDA19

RV112 10K_0402_5%OPT@RV112 10K_0402_5%OPT@

1 2

RV113 10K_0402_5%OPT@RV113 10K_0402_5%OPT@

1 2

RV115 10K_0402_5%OPT@RV115 10K_0402_5%OPT@

1 2

RV116 10K_0402_5%OPT@RV116 10K_0402_5%OPT@

1 2

RV117 10K_0402_5%OPT@RV117 10K_0402_5%OPT@

1 2

32..63

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

CS0_H#

ODT_H

CKE_H

A13

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

10k

DQSA[7..0]<24,29>

DQSA#[7..0]<24,29>

D D

C C

B B

CLKA0<24>

CLKA0#<24>

DQMA[7..0]<24,29>

MDA[63..0]<24,29>

CMDA[30..0]<24,29>

+1.5VSDGPU

OPT@

R1096

1.33K_0402_1%

OPT@

R1097

1.33K_0402_1%

OPT@

R1100

1.33K_0402_1%

OPT@

R1102

1.33K_0402_1%

CLKA0

CLKA0#

+1.5VSDGPU

1

C1073

C1072

2

OPT@ C 1073

OPT@

OPT@ C 1072

OPT@

1U_0402_6.3V6K

A A

5

C1075

C1074

2

OPT@ C 1075

OPT@

OPT@ C 1074

OPT@

1U_0402_6.3V6K

4

1

C1077

C1076

2

OPT@ C 1077

OPT@

OPT@ C 1076

OPT@

1U_0402_6.3V6K

0.1U_0402_16V4Z

1

C1079

C1078

2

OPT@ C 1079

OPT@

OPT@ C 1078

OPT@

0.1U_0402_16V4Z

1

C1080

C1081

2

OPT@ C 1080

OPT@

OPT@ C 1081

OPT@

0.1U_0402_16V4Z

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

1

C1082

C1083

2

OPT@ C 1082

OPT@

OPT@ C 1083

OPT@

1U_0402_6.3V6K

3

1

C1085

C1084

2

OPT@ C 1085

OPT@

OPT@ C 1084

OPT@

1U_0402_6.3V6K

2011/05/23 2012/12/31

1

C1086

2

OPT@ C 1086

OPT@

1U_0402_6.3V6K

0.1U_0402_16V4Z

Compal Secret Data

1

C1087

2

OPT@ C 1087

OPT@

0.1U_0402_16V4Z

Deciphered Date

1

C1088

2

OPT@ C 1088

OPT@

1

C1090

C1089

2

OPT@ C 1090

OPT@

OPT@ C 1089

OPT@

0.1U_0402_16V4Z

2

Samsung :

Hynix :

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N13M-GS 6/7

LA-8971P

1

28 58Wednesday, February 15, 2012

0.1

5

4

3

2

1

VRAM DDR3 chips (1GB)

128Mx16 DDR3 *4==>1GB

Mode D Address

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A8

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

Not Available

12

OPT@

RV119

1.33K_0402_1%

Near VRAM

12

1

OPT@CV131

OPT@

2

CV131

12

OPT@

RV121

1.33K_0402_1%

Near VRAM

12

1

OPT@CV132

OPT@

2

CV132

OPT@

RV16

RV16 160_0402_1%

160_0402_1%

DQMA[7..0]

CMDA[30..0]

DQSA#[7..0]

DQSA[7..0]

MDA[63..0]

+MEM_VREF2

1

OPT@

CV153

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

+MEM_VREF3

1

OPT@

CV154

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

@ RV125

@

80.6_0402_1%

@ RV127

@

80.6_0402_1%

0.01U_0402_16V7K

RV125

RV127

CV133

+MEM_VREF2

CMDA9 CMDA11 CMDA8 CMDA25 CMDA10 CMDA24 CMDA22 CMDA7 CMDA21 CMDA6 CMDA29 CMDA23 CMDA28 CMDA20 CMDA4 CMDA14

CMDA12 CMDA27 CMDA26

CLKA1 CLKA1# CMDA19

CMDA18 CMDA16 CMDA30 CMDA15 CMDA13

DQSA5 DQSA7

DQMA5 DQMA7

DQSA#5 DQSA#7

CMDA5

ZQ2

12

OPT@

RV123

243_0402_1%

1

@

2

+1.5VSDGPU +1.5VSDGPU

DQMA[7..0]<24,28>

CLKA1<24>

CLKA1#<24>

CMDA[30..0]<24,28>

DQSA#[7..0]<24,28>

DQSA[7..0]<24,28>

MDA[63..0]<24,28>

+1.5VSDGPU

OPT@

RV120

1.33K_0402_1%

+1.5VSDGPU

OPT@

RV122

1.33K_0402_1%

CLKA1

CLKA1#

D D

C C

B B

UV10

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA45 MDA40 MDA46 MDA41 MDA47 MDA43 MDA44 MDA42

MDA58 MDA60 MDA56 MDA61 MDA57 MDA63 MDA59 MDA62

+1.5VSDGPU

OPT@

RV124

243_0402_1%

12

+MEM_VREF3

CMDA9 CMDA11 CMDA8 CMDA25 CMDA10 CMDA24 CMDA22 CMDA7 CMDA21 CMDA6 CMDA29 CMDA23 CMDA28 CMDA20 CMDA4 CMDA14

CMDA12 CMDA27 CMDA26

CLKA1 CLKA1# CMDA19

CMDA18 CMDA16 CMDA30 CMDA15 CMDA13

DQSA4 DQSA6

DQMA4 DQMA6

DQSA#4 DQSA#6

CMDA5

ZQ3

UV11

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA39 MDA35 MDA37 MDA33 MDA38 MDA32 MDA36 MDA34

MDA50 MDA53 MDA51 MDA55 MDA49 MDA54 MDA48 MDA52

+1.5VSDGPU

Group4Group5

Group6Group7

0..31

CS0_L#

ODT_L

32..63

CKE

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

CS0_H#

ODT_H

CKE_H

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

LOW HIGH

CV136

CV135

CV134

OPT@ CV136

OPT@

OPT@ CV135

OPT@

OPT@ CV134

OPT@

1U_0402_6.3V6K

A A

5

4

1

CV138

CV137

2

OPT@ CV138

OPT@

OPT@ CV137

OPT@

1U_0402_6.3V6K

1

CV140

CV139

2

OPT@ CV140

OPT@

OPT@ CV139

OPT@

0.1U_0402_16V4Z

1

CV141

2

OPT@ CV141

OPT@

0.1U_0402_16V4Z

1

CV142

CV143

2

OPT@ CV142

OPT@

OPT@ CV143

OPT@

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CV144

OPT@ CV144

OPT@

1U_0402_6.3V6K

2011/05/23 2012/12/31

CV146

CV145

OPT@ CV146

OPT@

OPT@ CV145

OPT@

1U_0402_6.3V6K

Compal Secret Data

CV147

OPT@ CV147

OPT@

1U_0402_6.3V6K

Deciphered Date

CV148

OPT@ CV148

OPT@

0.1U_0402_16V4Z

CV150

CV149

OPT@ CV150

OPT@

OPT@ CV149

OPT@

0.1U_0402_16V4Z

2

CV152

CV151

OPT@ CV152

OPT@

OPT@ CV151

OPT@

0.1U_0402_16V4Z

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N13M-GS 7/7

LA-8971P

1

0.1

29 58Wednesday, February 15, 2012

0.1

5

4

3

2

1

+1.5V to +1.5VSDGPU

+VCCP to +1.05VSDGPU

+1.5V

OPT@

U21

U21 AO4304L_SO8

AO4304L_SO8

8 7

D D

10U_0603_6.3V6M

DGPU_PWROK#

C C

OPT@

C392

+VSB

OPT@

1 2

R441

0_0402_5%

0.1U_0402_16V7K

1

2

OPT@

1 2

R444

100K_0402_5%

@

C397

6 5

1

C393

2

OPT@ C393

OPT@

10U_0603_6.3V6M

1.5VSG_GATE

61

OPT@

Q15A

2N7002DW-T/R7_SOT363-6

2

1

2

+1.5VSDGPU

1 2 3

1

C388

4

C389

2

OPT@ C388

OPT@

OPT@ C389

OPT@

10U_0603_6.3V6M

1

OPT@

C395

0.01U_0603_25V7K

2

12

@

R430

R430 470_0603_5%

470_0603_5%

OPT@

1U_0402_6.3V6K

OPT@

3

Q15B

Q15B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

DGPU_PWROK#

5

4

+1.5VSDGPU

1

+

2

OPT@

C304

C304 150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M

10U_0603_6.3V6M

DGPU_PWROK#

OPT@

C390

+VSB

1 2

R445

0_0402_5%

0.1U_0402_16V7K

OPT@

+3VS to +3VSDGPU

+3VS

1

OPT@

C400

10U_0603_6.3V6M

+VSB

B B

DGPU_PWR_EN

OPT@

1 2

R447

0_0402_5%

C403

0.1U_0402_16V7K

2

OPT@

1 2

R436

100K_0402_5%

1

@

2

C401

OPT@ C401

OPT@

2

3 1

1

2

10U_0603_6.3V6M

3VSG_GATE

61

OPT@

Q18A

Q18A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

Q5

Q5 AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3

2

+3VSDGPU

1

C398

2

OPT@ C398

OPT@

10U_0603_6.3V6M

1

OPT@

C402

0.1U_0603_25V7K

2

1

C399

2

OPT@ C399

OPT@

12

OPT@

R435

R435 470_0603_5%

470_0603_5%

1U_0402_6.3V6K

OPT@

3

Q18B

Q18B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

DGPU_PWR_EN#

5

4

DGPU_PWROK<19,55>

DGPU_PWR_EN<15,18,55>

1

2

OPT@

1 2

R431

100K_0402_5%

@

C396

1

C391

2

OPT@ C391

OPT@

+1.05VS_VTT

10U_0603_6.3V6M

2

1

2

DGPU_PWROK

10K_0402_5%

1.05VSG_GATE

OPT@

U20

U20 AO4304L_SO8

AO4304L_SO8

8 7 6 5

4

61

OPT@

Q14A

2N7002DW-T/R7_SOT363-6

DGPU_PWROK#

12

OPT@

R666

DGPU_PWR_EN#

DGPU_PWR_EN

12

OPT@

R668

10K_0402_5%

+1.05VSDGPU

1 2 3

+3VALW

12

61

2

+3VALW

5

OPT@

R665

R665 100K_0402_5%

100K_0402_5%

12

3

4

1

C387

C386

2

OPT@ C387

OPT@

OPT@ C386

OPT@

1U_0402_6.3V6K

10U_0603_6.3V6M

1

OPT@

C394

0.1U_0603_25V7K

2

OPT@

Q58A

Q58A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

OPT@

R667

R667 100K_0402_5%

100K_0402_5%

OPT@

Q58B

Q58B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

12

@

R448

R448 470_0603_5%

470_0603_5%

OPT@

3

Q14B

Q14B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

DGPU_PWROK#

5

4

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N13M-GE1-S-A1

LA-8971P

1

30 58Wednesday, February 15, 2012

0.3

5

D D

Power down (PD#) power stage for save power 0V: Power down power stage

3.3V: Power up power stage

EC_MUTE#<42>

+3VS

12

@

R1535

4.7K_0402_5%

HDA_RST_AUDIO#<14>

C C

12

@

R1540

4.7K_0402_5%

MIC Sense R1543 place near pin13

Capless HP Sense R940 place near pin34

HDA_SDOUT_AUDIO<14>

HDA_BITCLK_AUDIO<14>

HDA_SDIN0<14>

4

600ohms @100MHz 2A P/N: SM01000EE00

+5VS

PLUG_IN#<32>

600ohms @100MHz 1A P/N: SM01000BU00

R1531

1 2

0_0805_5%

EC_MUTE#

HDA_SDOUT_AUDIO

HDA_BITCLK_AUDIO

HDA_SDIN0 SDATA_IN

1 2

HDA_SYNC_AUDIO<14>

HDA_RST_AUDIO#

R1538

R1536

22_0402_5%

L37

1 2

FBMA-L11160808601LMA10T_2P

Place near Pin25

1

2

C1236

C1235

C1234

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

COMBO_JACKMIC_JD

R15330_0402_5% R15330_0402_5%

1 2

EC_MUTE#_R

0_0402_5%

12

PC_BEEP

JDREF

R1541

12

20K_0402_1%

SENSEA

R1543

12

39.2K_0402_1%

CBN

CBP

C12392.2U_0402_6.3V6M C12392.2U_0402_6.3V6M

12

C12402.2U_0402_6.3V6M C12402.2U_0402_6.3V6M

12

C12414.7U_0603_6.3V6K C12414.7U_0603_6.3V6K

12

+MIC1_VREFO_L

+5VDDA_CODEC+5VS

1

2

C1230

4.7U_0805_10V4Z

+5VS_PVDD

0.1U_0402_16V4Z

0.1U_0402_16V4Z U50

U50

47

DAPD/COMB_JACK

4

PD#

5

SDATA-OUT

6

BIT-CLK

8

SDATA-IN

10

SYNC

11

RESET#

12

PCBEEP

19

JDREF

20

MONO-OUT(PORT-H)

13

Sense A

18

Sense-B

35

CBN

36

CBP

34

CPVEE

28

LDO-CAP

29

MIC2-VREFO

30

MIC1-VREFO-R

31

MIC1-VREFO-L

42

PVSS1

43

PVSS2

7

DVSS

ALC269Q-VC2-GR_QFN48_6X6

3

+5VDDA_CODEC

1

2

C1231

0.1U_0402_16V4Z

1

AVDD2

9

DVDD1

DVDD-IO

LINE1-R(PORT-C-R)

LINE1-L(PORT-C-L)

MIC1-R(PORT-B-R)

MIC1-L(PORT-B-L)

MIC2-R(PORT-F-R)

MIC2-L(PORT-F-L)

LINE2-R(PORT-E-R)

LINE2-L(PORT-E-L)

SPK-OUT-L+

SPK-OUT-L-

SPK-OUT-R-

SPK-OUT-R+

HPOUT-R(PORT-A-R)

HPOUT-L(PORT-A-L)

SPDIF-OUT

GPIO1/DMIC-CLK

GPIO0/DMIC-DATA

VREF

AVSS1

AVSS2

Thermal PAD

25

39

46

PVDD1

38

PVDD2

AVDD1

2

1

C1232

1

2

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

Place near Pin38

+3VDD_CODEC

+IOVDD_CODEC

24

23

MIC_EXTR_C

22

MIC_EXTL_C

21

17

16

15

14

SPK_L+

40

SPK_L-

41

SPK_R-

44

SPK_R+

45

HPOUT_R

33

HPOUT_L

32

48

3

DMIC_DATA_R

2

27

26

37

49

+3VS +3VDD_CODEC

C1233

C1237

12

C1238

Internal Speaker

1

2

C1242

2

+IOVDD_CODEC

R1529

1 2

0_0603_5%

1

2

C1226

0.1U_0402_16V4Z

1

@

2

C1228

C1227

1U_0603_10V4Z

Place near Pin1 Place near Pin9

+MIC1_VREFO_L

12

R1537

2.2K_0402_5%

2.2U_0402_6.3V6M

R154475_0402_5% R154475_0402_5%

R154575_0402_5% R154575_0402_5%

R15470_0402_5% R15470_0402_5%

R15480_0402_5% R15480_0402_5%

1U_0603_10V4Z

R1534 1K_0402_5%R1534 1K_0402_5%

12

HP_OUTL <32>

DMIC_CLKDMIC_CLK_R

12

DMIC_DATA

12

1

Place next to pin 27

2

C1243

0.1U_0402_16V4Z

12

HP_OUTR <32>

1

@

2

C148

Headphone

Internal D-MIC

0.1U_0402_16V4Z

1

+3VDD_CODEC

R1530

1 2

0_0402_5%

1

@

2

C1229

0.1U_0402_16V4Z

10U_0603_6.3V6M

external MIC

EXT_MIC <32>

COMBO JACK detect (Normal OPen)

1

C165

4.7U_0603_6.3V6K

2

+3VS

DMIC_DATA DMIC_CLK

R317

1 2

47K_0402_5%

MIC1

6

VDD

5

LEFT/RIGHT

DATA

4

CLOCK

SPM0423HD4H-WB-2_6P

EXT_MICMIC_JD

1

GND

2 3

GND

B B

HDA_RST_AUDIO#

HDA_SYNC_AUDIO

HDA_SDOUT_AUDIO

HDA_BITCLK_AUDIO

R1552

1 2

27_0402_5%

@

1

@

2

C1244

C1245

22P_0402_50V8J

1

@

C1247

C1247 33P_0402_50V8J

33P_0402_50V8J

2

C1246

22P_0402_50V8J

EMI

PC Beep

A A

EC Beep

PCH Beep

PCH_SPKR<14>

C1252

BEEP#<42>

1 2

0.1U_0402_16V4Z

C1253

1 2

0.1U_0402_16V4Z

5

PC_BEEP1 PC_BEEP

12

@

R1558

R1558 10K_0402_5%

10K_0402_5%

R1557

1 2

33_0402_5%

1 2

0.1U_0402_16V7K

C145

4

Pin Assignment Location Function

SPK-OUT (Pin40/41/44/45)

Capless HP-OUT (Pin32/33)

Internal

External

Int Speaker

Headphone out

MIC1(Pin21/22) External Mic in

R1549

1 2

0_0402_5%

R1550

1 2

0_0402_5%

R1551

@R1551

@

1 2

0_0402_5%

@

C162 0.1U_0402_16V4Z

1 2

@

C163 0.1U_0402_16V4Z

1 2

@

C164 0.1U_0402_16V4Z

1 2

GNDAGND

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

2011/07/21 2012/12/31

Compal Secret Data

Deciphered Date

SPK_L+

R1553 0_0402_5%R1553 0_0402_5%

SPK_LSPK_R+ SPK_R-

1 2

R1555 0_0402_5%R1555 0_0402_5%

1 2

R1554 0_0402_5%R1554 0_0402_5%

1 2

R1556 0_0402_5%R1556 0_0402_5%

1 2

SPK_R-_CONN

SPK_R+_CONN

2

3

@

D38

D38 PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

1

Reserve for ESD request.

2

wide 40 mils

SPK_L+_CONN SPK_L-_CONN SPK_R+_CONN SPK_R-_CONN

3

Title

Size Document Number Rev

C

Date: Sheet

1

@

1000P_0402_50V7K

2

C1250

1000P_0402_50V7K

LA-8971P

1

@

2

C1251

1

@

2

C1249

C1248

1000P_0402_50V7K

SPK_L-_CONN

SPK_L+_CONN

2

@

D39

D39 PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

1

Compal Electronics,Ltd.

HD Audio Codec_ALC269Q-VC

JSPK1

1

2

3

4

5

GND1

6

GND2

ACES_88231-04001

CONN@

1000P_0402_50V7K

31 58Wednesday, February 15, 2012

of

0.1

5

D D

W=20mils

C C

4

2

@

C161

R315

100P_0402_50V8J

470K_0402_5%

EXT_MIC<31>

PLUG_IN#<31>

HP_OUTR<31>

HP_OUTL<31>

100P_0402_50V8J

1

1 2

R2 0_0603_5%R2 0_0603_5%

1 2

R1 0_0603_5%R1 0_0603_5%

1 2

R316 0_0603_5%R316 0_0603_5%

1 2

C159

10P_0402_50V8J

R314

0_0402_5%

@

2

@

C156

C156 100P_0402_50V8J

100P_0402_50V8J

1

EXT_MIC_R

PLUG_IN#

HP_OUTR_R

HP_OUTL_R

1

@

C160

C160 10P_0402_50V8J

10P_0402_50V8J

2

12

@

R313

R313 0_0402_5%

0_0402_5%

3

JHP1

10

9 8 7 5

4

3 1 2

6

SUYIN_010036HR006G511ZL

CONN@

2

1

EXT_MIC_R HP_OUTR_RPLUG_IN#

HP_OUTL_R

2

3

D46

D46 PJSOT24C 3P C/A SOT-23

PJSOT24C 3P C/A SOT-23

1

2

3

D47

D47 PJSOT24C 3P C/A SOT-23

PJSOT24C 3P C/A SOT-23

1

PN: SCA00000T00

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Audio Combo Jack

LA-8971P

32 58Wednesday, February 15, 2012

1

0.1

5

+3V_LAN

D D

12

@

R1512

R1512 10K_0402_5%

10K_0402_5%

LAN_CLKREQ#

R1510 10K_0402_5%@ R1510 10K_0402_5%@

12

R1511 1K_0402_5%@ R1511 1K_0402_5%@

+LAN_VDDREG

PCIE_DTX_PRX_P1

PCIE_DTX_PRX_N1

PCIE_PTX_C_DRX_P1 PCIE_PTX_C_DRX_N1

LAN_CLKREQ#

PLT_RST#

CLK_PCIE_LAN CLK_PCIE_LAN#

LAN_XTALI

LAN_XTALO

PCIE_WAKE#_R

ISOLATEB

ENSWREG

R1513

12

2.49K_0402_1%

22

23

17 18

16

25

19 20

43

44

28

26

14 15 38

33

34 35

46

24 49

C1183 0.1U_0402_16V7KC1183 0.1U_0402_16V7K

PCIE_DTX_C_PRX_P1<15>

PCIE_DTX_C_PRX_N1<15>

C C

LAN_WAKE#<42>

PCH_PCIE_WAKE#<16,40>

B B

1 2

C1186 0.1U_0402_16V7KC1186 0.1U_0402_16V7K

1 2

PCIE_PTX_C_DRX_P1<15> PCIE_PTX_C_DRX_N1<15>

LAN_CLKREQ#<15>

PLT_RST#<18,40,42>

CLK_PCIE_LAN<15> CLK_PCIE_LAN#<15>

Pin 16 and Pin 28 are OD pins

R1508 0_0402_5%R1508 0_0402_5%

1 2

R1509 @ 0_0402_5%R1509 @ 0_0402_5%

1 2

+3V_LAN

1 2

4

U47

8105@

U47

8105@

RTL8105E-VL-CGT

SA00003PO40

U47

HSOP

HSON

HSIP HSIN

CLKREQB

PERSTB

REFCLK_P REFCLK_N

CKXTAL1

CKXTAL2

LANWAKEB

ISOLATEB

NC/SMBCLK NC/SMBDATA GPO/SMBALERT

ENSWREG

VDDREG VDDREG

RSET

GND PGND

RTL8111F-CGT_QFN48_6x6

GIGA@

LED3/EEDO

LED1/EESK

SA00004Y700

LED0

EECS

EEDI

MDIP0 MDIN0 MDIP1

MDIN1 NC/MDIP2 NC/MDIN2 NC/MDIP3 NC/MDIN3

DVDD10 DVDD10 DVDD10

DVDD33 DVDD33

AVDD33 AVDD33 AVDD33 AVDD33

EVDD10

AVDD10 AVDD10 AVDD10 AVDD10

REGOUT

31 37 40

30 32

1 2 4 5 7 8 10 11

13 29 41

27 39

12 42 47 48

21

3 6 9 45

36

LAN_LINK# LAN_ACTIVITY#

R1506 10K_0402_5%@R1506 10K_0402_5%@

1 2

R1507 10K_0402_5%@R1507 10K_0402_5%@

1 2

MDI0+ MDI0MDI1+ MDI1MDI2+ MDI2MDI3+ MDI3-

+LAN_VDD10

+3V_LAN

+LAN_EVDD10

+LAN_VDD10

+LAN_REGOUT

LAN_LINK# <34> LAN_ACTIVITY# <34>

MDI0+ <34> MDI0- <34> MDI1+ <34> MDI1- <34> MDI2+ <34> MDI2- <34> MDI3+ <34> MDI3- <34>

3

L34

+LAN_REGOUT

2.2UH +-5% NLC252018T-2R2J-N

Layout Note: L34 must be within 200mil to Pin36, C1184,C1182 must be within 200mil to LL1 +LAN_REGOUT: Width =60mil

L34

12

4.7U_0603_6.3V6K

X5R

C1184

12

2

+LAN_VDD10

12

C1182

0.1U_0402_16V4Z

Layout Notice : Place as close chip as possible.

+3VALW

1

J15@

112

JUMP_43X79

+3V_LAN

2

Rising time (10%~90%)1mS <Rising time <100mS

C1187

C1195

+LAN_EVDD10

12

+LAN_VDDREG+3V_LAN

12

ENSWREGISOLATEB

12

C1188

0.1U_0402_16V4Z

12

C1196

0.1U_0402_16V4Z

+3V_LAN

12

R1515

R1515 0_0402_5%

0_0402_5%

@

R1517

R1517 0_0402_5%

0_0402_5%

Close to Pin 12,27,39,42,47,48

C1189 0.1U_0402_16V4ZC1189 0.1U_0402_16V4Z

12

C1190 0.1U_0402_16V4ZC1190 0.1U_0402_16V4Z

12

C1191 0.1U_0402_16V4ZC1191 0.1U_0402_16V4Z

12

C1192 0.1U_0402_16V4ZC1192 0.1U_0402_16V4Z

12

C1193 0.1U_0402_16V4ZGIGA@ C1193 0.1U_0402_16V4ZGIGA@

12

C1194 0.1U_0402_16V4ZGIGA@ C1194 0.1U_0402_16V4ZGIGA@

12

Close to Pin 3,6,9,13,29,41,45

C1197 0.1U_0402_16V4ZC1197 0.1U_0402_16V4Z

12

C1198 0.1U_0402_16V4ZC1198 0.1U_0402_16V4Z

12

C1199 0.1U_0402_16V4ZC1199 0.1U_0402_16V4Z

12

C1200 0.1U_0402_16V4ZGIGA@ C1200 0.1U_0402_16V4ZGIGA@

12

C1201 0.1U_0402_16V4ZGIGA@ C1201 0.1U_0402_16V4ZGIGA@

12

C1202 0.1U_0402_16V4ZGIGA@ C1202 0.1U_0402_16V4ZGIGA@

12

C1203 0.1U_0402_16V4ZGIGA@ C1203 0.1U_0402_16V4ZGIGA@

12

+3V_LAN

+LAN_VDD10

1 2

0_0603_5%

Close to Pin 21

+3VS

12

R366

R366 1K_0402_5%

1K_0402_5%

12

R365

R365 15K_0402_5%

15K_0402_5%

L35

1U_0402_6.3V4Z

L36

1 2

0_0603_5%

4.7U_0603_6.3V6K

X5R

LAN_XTALI

Y4

4

NC

OSC

1

OSC

27P_0402_50V8J

A A

2

25MHZ_20PF_FSX3M-25.M20FDO

1

C1204

27P_0402_50V8J

NC

5

LAN_XTALO

3

2

1

C1205

C1205 27P_0402_50V8J

27P_0402_50V8J

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

H: Enable internal Regulator L: Disable

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

LAN-RTL8111F/8105E

LA-8971P

Wednesday, February 15, 2012

LA-8971P

1

33 58

0.1

5

4

3

2

1

TS2

MDI0+ MDI0-

MDI1+ MDI1-

TS2

1

TD+

TX+

2

TD-

TX-

3

CT

4

NC

5

NC

6

CT

7

RD+

RX+

RD-8RX-

BOTHHAND_NS0013LF

GIGA@

TS1

1

TD+

TX+

2

TD-

TX-

3

CT

4

NC

5

NC

6

CT

7

RD+

RX+

RD-8RX-

BOTHHAND_NS0013LF

MDO3+

16

MDO3-

15

MCT3

14 13 12

MCT2

11

MDO2+

10

MDO2-

9

MDO0+

16

MDO0-

15

MCT0

14 13 12

MCT1

11

MDO1+

10

MDO1-

9

R1518 75_0603_5%GIGA@ R1518 75_0603_5%GIGA@

1 2

R1519 75_0603_5%GIGA@ R1519 75_0603_5%GIGA@

1 2

R1520 75_0603_5%R1520 75_0603_5%

1 2

R1521 75_0603_5%R1521 75_0603_5%

1 2

LAN_ACTIVITY#<33>

1

C1206

C1206 47P_0402_50V8J

47P_0402_50V8J

2

JLAN1

@

+3V_LAN

1

2

+3V_LAN

1

@

C147

C147 470P_0402_50V7K

470P_0402_50V7K

2

R298 510_0402_1%R298 510_0402_1%

1 2

C146

470P_0402_50V7K

R299 510_0402_1%R299 510_0402_1%

LAN_LINK#<33>

1 2

MDO3-

MDO3+

MDO1-

MDO2-

MDO2+

MDO1+

MDO0-

MDO0+

12

Yellow LED+

11

Yellow LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED+

9

Green LED-

SANTA_130452-D

CONN@

D D

1

2

C C

D13

@D13

MDI2+

B B

MDI1+

@

1

2

3

I/O3

I/O1

VDD

GND

I/O4

I/O2

AZC099-04S.R7G_SOT23-6

Place Close to TS2

D14

@D14

@

1

2

3

I/O3

I/O1

VDD

GND

I/O4

I/O2

AZC099-04S.R7G_SOT23-6

C1207

0.01U_0402_16V7K

MDI3+

4

5

MDI2-MDI3-

6

4

5

6

MDI3+<33> MDI3-<33>

MDI2+<33> MDI2-<33>

MDI0+

MDI1-MDI0-

MDI3+ MDI3-

MDI2+ MDI2-

MDI0+<33> MDI0-<33>

MDI1+<33> MDI1-<33>

Reserve gas tube for EMI go rural solution

Place Close to TS1,TS2

MCT3

MCT2

MCT1

MCT0

DL2

DL3

DL1

@

1 2

LSE-200NX3216TRLF_1206-2

13

G1

14

G2

DL3

@

1 2

LSE-200NX3216TRLF_1206-2

DL4

@

1 2

LSE-200NX3216TRLF_1206-2

1 2

LSE-200NX3216TRLF_1206-2

D15

@D15

@

1

PJDLC05C_SOT23-3

C154 0.1U_0402_16V7K

@

C155 0.1U_0402_16V7K

@

3

2

12

Place Close to TS1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LAN_Transformer

LA-8971P

1

0.1

34 58Wednesday, February 15, 2012

0.1

5

LCD POWER CIRCUIT

W=60mils

2

1

2

+3VS

12

@

R183

4.7K_0402_5%

ENBKL

12

R184

R184 100K_0402_1%

100K_0402_1%

G

+3VS

1 3

DISPOFF#

1

2

+LCDVDD

12

R102

150_0603_1%

13

D

D D

2N7002_SOT23

PCH_ENVDD<17>

C C

B B

A A

Q71

PCH_ENVDD

100K_0402_5%

BKOFF#<42>

PCH_ENBKL<17>

D

S

R179

100K_0402_5%

2

G

2

12

@

BKOFF#

R182

10K_0402_5%

PCH_ENBKL

+5VALW

R177

IN

12

R178

1 2

220K_0402_5%

1

0.1U_0402_16V7K

OUT

GND

Q73

3

DTC124EKAT146_SC59-3

R180

1 2

0_0402_5%

D30

@D30

@

CH751H-40PT_SOD323-2

R181

1 2

0_0402_5%

C23

21

4

1

C26

4.7U_0805_10V4Z

2

S

Q72

Q72 PMV65XP_SOT23-3~D

PMV65XP_SOT23-3~D

D

+LCDVDD

@

C34

C34 470P_0402_50V7K

470P_0402_50V7K

ENBKL <42>

L29

1 2

FBMA-L11-201209-221LMA30T_0805

4.7U_0805_10V4Z

W=60mils

+LCDVDD_CONN

1

C24

2

1

C25

0.1U_0402_16V4Z

2

CMOS

+3VS_CMOS

+LCDVDD_CONN

3

CMOS_ON#<42>

(60 MIL)

DISPOFF# INVT_PWM

USB20_N8_R USB20_P8_R

EDID_DATA EDID_CLK LVDS_ACLK LVDS_ACLK#

LVDS_A2 LVDS_A2# LVDS_A1 LVDS_A1# LVDS_A0 LVDS_A0#

CMOS Camera

+3VS

CMOS@

Q70

GND1 GND2 GND3 GND4 GND5 GND6

USB20_N8<18>

USB20_P8<18>

Q70 PMV65XP_SOT23-3~D

PMV65XP_SOT23-3~D

D

S

D

S

13

G

2

1

CMOS@

C27

0.1U_0402_16V4Z

2

31 32 33 34 35 36

USB20_N8

USB20_P8

PCH_PWM<17>

EC_INVT_PWM<42>

1 2

1

CMOS@

C28

0.1U_0402_16V4Z

2

1 2

L11

1

4

WCM-2012-900T_4P

1 2

+3VS+3VS

680P_0402_50V7K

CMOS@

R186

0_0603_5%

R303

0_0402_5%

@L11

@

R304

0_0402_5%

PCH_PWM

EC_INVT_PWM

(20 MIL) (20 MIL)

CMOS@

R185

1 2

150K_0402_5%

+LEDVDD

JLVDS2

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

STARC_107K30-000001-G2

CONN@

C33

2

@

CMOS

+3VS_CMOS

2

3

1

2

1 2

1

@

C30

C30 10U_0603_6.3V6M

10U_0603_6.3V6M

2

USB20_N8_R

USB20_P8_R

R188 0_0402_5%R188 0_0402_5%

0_0402_5%@

R189

+3VS_CMOS

+LCDVDD_CONN

EDID_DATA<17> EDID_CLK<17> LVDS_ACLK<17> LVDS_ACLK#<17>

LVDS_A2<17> LVDS_A2#<17> LVDS_A1<17> LVDS_A1#<17> LVDS_A0<17> LVDS_A0#<17>

LVDS_BCLK<17> LVDS_BCLK#<17>

LVDS_B2<17> LVDS_B2#<17> LVDS_B1<17> LVDS_B1#<17> LVDS_B0<17> LVDS_B0#<17>

680P_0402_50V7K

LCD Conn.

+LEDVDD

(60 MIL)

DISPOFF# INVT_PWM

USB20_N8_R USB20_P8_R

EDID_DATA EDID_CLK LVDS_ACLK LVDS_ACLK#

LVDS_A2 LVDS_A2# LVDS_A1 LVDS_A1# LVDS_A0 LVDS_A0#

LVDS_BCLK LVDS_BCLK#

LVDS_B2 LVDS_B2# LVDS_B1 LVDS_B1# LVDS_B0 LVDS_B0#

1

@

C31

2

JLVDS1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

STARC_107K40-000001-G2

CONN@

1

C32

4.7U_0805_25V6-K

2

41

G1

42

G2

43

G3

44

G4

45

G5

46

G6

R187

0_0805_5%

B++LEDVDD

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LVDS/CAMERA

LA-8971P

35 58Wednesday, February 15, 2012

1

0.1

5

D D

12

R198

R197

150_0402_1%

C83

1 2

0.1U_0402_16V4Z

CRT_HSYNC

C84

1 2

0.1U_0402_16V4Z

CRT_VSYNC

1

@

C97

C97 33P_0402_50V8K

33P_0402_50V8K

2

PCH_CRT_R

PCH_CRT_B

1

2

C50

+CRT_VCC

+3VS

4

Q12B

Q12B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

1

2

C58

2.2P_0402_50V8C

5

1

P

OE#

A2Y

G

U12

U12 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

3

2

5

2N7002DW-T/R7_SOT363-6

3

PCH_CRT_R<17>

PCH_CRT_G<17>

PCH_CRT_B<17>

12

R199

150_0402_1%

C C

R286

PCH_CRT_DATA

PCH_CRT_CLK

33P_0402_50V8K

1 2

33_0402_5%

R290

1 2

33_0402_5%

@

C95

1

2

PCH_CRT_HSYNC<17>

PCH_CRT_VSYNC<17>

B B

PCH_CRT_DATA<17>

PCH_CRT_CLK<17>

A A

5

4

1 2

FBMA-10-100505-800T 0402

1 2

FBMA-10-100505-800T 0402

1 2

FBMA-10-100505-800T 0402

1

2

C59

2.2P_0402_50V8C

R200

1 2

10K_0402_5%

CRT_HSYNC_L

4

5

1

P

CRT_VSYNC_L

4

OE#

A2Y

G

U14

U14 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

3

12

R201

4.7K_0402_5%

Q12A

61

12

@

C93

68P_0402_50V8J

4

L1

L2

L3

+CRT_VCC

MBC1608121YZF_0603

12

R202

4.7K_0402_5%

CRT_DDC_DAT

12

@

C94

C94 68P_0402_50V8J

68P_0402_50V8J

1

2

C36

2.2P_0402_50V8C

L7

1 2

L8

1 2

CRT_DDC_CLK

1

2

C44

CRT_R_L

CRT_G_LPCH_CRT_G

CRT_B_L

2.2P_0402_50V8C

3

2

3

2

3

D10

D9

PJDLC05C_SOT23-3

L4

1 2

FBMA-10-100505-800T 0402

L5

1 2

FBMA-10-100505-800T 0402

L6

1 2

FBMA-10-100505-800T 0402

1

2

C48

2.2P_0402_50V8C

1

@

2

C85

C89

10P_0402_50V8J

HSYNC CRT_DDC_CLK

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D9

1

2

C62

HSYNC

VSYNC

D4

@

D4

@

1

CH1

2

Vn

3

CH2

CM1293-04SO_SOT23-6

3

1

2

C63

2.2P_0402_50V8C

4

CH4

5

Vp

6

CH3

2011/06/15 2012/07/11

D10 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

1

2

C69

2.2P_0402_50V8C

+CRT_VCC

CRT_DDC_DATVSYNC

Compal Secret Data

RED

GREEN

BLUE

2.2P_0402_50V8C

Screw Hole

H1

@

H11

@

H21

@

H41

@

Deciphered Date

1

H_2P8

H_4P0

H_3P3

H_2P8N

2

H2

H_2P8

1

@

H12

H_4P0

1

@

H22

H_3P3

1

@

H5

@

2

1

H_2P8N

+5VS +CRT_VCC_R +CRT_VCC

D2

12

RB491D_SC59-3

F2

1 2

1.1A_6V_SMD1812P110TF

Mini-VGA CONNECTOR

CRT_DDC_CLK

+CRT_VCC

H3

H4

H_2P8

1

@

H13

H14

H_4P0

1

@

H23

H_3P3

1

@

H10

H_2P9X3P4N

1

@

VSYNC

BLUE HSYNC

GREEN CRT_DDC_DAT

RED

H6

H7

H_2P8

H_4P0

Title

Size Document Number Rev

Custom

Date: Sheet of

H_2P8

1

@

Compal Electronics, Inc.

Mini-VGA & Screw Hole

LA-8971P

1

40mil

JCRT1

1

DDC_CLK

2

GND

3

JVGA_VS

4

CRT_VCC

5

BLUE

6

JVGA_HS

7

GND

8

GREEN

9

DDC_DAT

10

GND

11

RED

12

GND

13

GND

14

GND

15

GND

16

GND

BELLW_WK2011-0090-2

CONN@

H8

H_2P8

1

@

FD1

1

FIDUCIAL_C40M80

FD3

1

FIDUCIAL_C40M80

1

C70

0.1U_0402_16V7K

2

H_2P8

@

H9

H_2P8

1

@

FD2

FIDUCIAL_C40M80

FD4

FIDUCIAL_C40M80

36 58Wednesday, February 15, 2012

@

1

@

1

0.1

5

4

3

2

1

R203 0_0402_5%@R203 0_0402_5%@

1 2

R204 0_0402_5%@R204 0_0402_5%@

1 2

R205 0_0402_5%@R205 0_0402_5%@

1 2

R206 0_0402_5%@R206 0_0402_5%@

1 2

R207 0_0402_5%@R207 0_0402_5%@

1 2

R208 0_0402_5%@R208 0_0402_5%@

1 2

R209 0_0402_5%@R209 0_0402_5%@

1 2

R210 0_0402_5%@R210 0_0402_5%@

1 2

+5VS

1

HDMI@

C122

0.1U_0402_16V4Z

2

HDMI@

R1470

2.2K_0402_5%

HDMI@

2 1

D6

D6 RB491D_SC59-3

RB491D_SC59-3

+5VS_HDMI

12

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

+3VS

12

HDMI@

R211

R211 0_0402_5%

0_0402_5%

D D

PCH_HDMICLK<17>

PCH_HDMIDAT<17>

C C

B B

PCH_HDMICLK

PCH_HDMIDAT

3

1

4

HDMIDAT_R

HDMICLK_R

2

@

D33

D33 PJDLC05_SOT23-3

PJDLC05_SOT23-3

5

HDMI@

Q75B

Q75B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

HDMI@

Q75A

2

2N7002DW-T/R7_SOT363-6

61

3

HDMICLK_R

HDMIDAT_R

TMDS_B_HPD#<17>

TMDS_B_HPD#

HDMI@

R1469

1M_0402_5%

12

HDMI@

Q74

G

2

2N7002H_SOT23-3

S

13

D

20K_0402_5%

HDMI_CLK+_CK

HDMI_CLK-_CK

HDMI_TX0+_CK

HDMI_TX0-_CK

HDMI_TX1+_CK

HDMI_TX1-_CK

HDMI_TX2+_CK

HDMI_TX2-_CK

HDMI@

R1472

HDMI_CLK-_CK<17>

HDMI_CLK+_CK<17> HDMI_TX0-_CK<17>

HDMI_TX0+_CK<17> HDMI_TX1-_CK<17>

HDMI_TX1+_CK<17> HDMI_TX2-_CK<17>

HDMI_TX2+_CK<17>

+5VS+3VS

12

L30

1

4

WCM-2012HS-900T

L31

1

4

WCM-2012HS-900T

L32

1

4

WCM-2012HS-900T

L33

1

4

WCM-2012HS-900T

2

3

@

D32

1

BAT54S-7-F_SOT23-3

HDMI_CLK-_CK

HDMI_CLK+_CK HDMI_TX0-_CK

HDMI_TX0+_CK HDMI_TX1-_CK

HDMI_TX1+_CK HDMI_TX2-_CK

HDMI_TX2+_CK

HDMI@L30

HDMI@

2

3

HDMI@L31

HDMI@

2

3

HDMI@L32

HDMI@

2

3

HDMI@L33

HDMI@

2

3

HDMI_CLK+_CONNHDMI_CLK+_CONNHDMI_CLK+_CONNHDMI_CLK+_CONN

2

HDMI_CLK-_CONNHDMI_CLK-_CONN

3

HDMI_TX0+_CONNHDMI_TX0+_CONN

2

HDMI_TX0-_CONNHDMI_TX0-_CONN

3

HDMI_TX1+_CONNHDMI_TX1+_CONN

2

HDMI_TX1-_CONNHDMI_TX1-_CONN

3

HDMI_TX2+_CONNHDMI_TX2+_CONN

2

HDMI_TX2-_CONNHDMI_TX2-_CONN

3

+HDMI_5V

12

HDMI@

R1471

2.2K_0402_5%

HDMI_HPD

+5VS_HDMI

HDMIDAT_R HDMICLK_R

HDMI_CLK-_CONN

HDMI_CLK+_CONN HDMI_TX0-_CONN

HDMI_TX0+_CONN HDMI_TX1-_CONN

HDMI_TX1+_CONN HDMI_TX2-_CONN

HDMI_TX2+_CONN

W=40mils

HDMI@

1.1A_6VDC_FUSE

C100 0.1U_0402_16V4Z@ C100 0.1U_0402_16V4Z@

C101 0.1U_0402_16V4Z@ C101 0.1U_0402_16V4Z@

C102 0.1U_0402_16V4Z@ C102 0.1U_0402_16V4Z@

C105 0.1U_0402_16V4Z@ C105 0.1U_0402_16V4Z@

C118 0.1U_0402_16V4Z@ C118 0.1U_0402_16V4Z@

C119 0.1U_0402_16V4Z@ C119 0.1U_0402_16V4Z@

C120 0.1U_0402_16V4Z@ C120 0.1U_0402_16V4Z@

C121 0.1U_0402_16V4Z@ C121 0.1U_0402_16V4Z@

F1

+5VS_HDMI

21

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

SUYIN_100042GR019M26DZL

CONN@

1 2

1

HDMI@

C99

0.1U_0402_16V4Z

2

20

GND

21

GND

22

GND

23

GND

RP1

HDMI@RP1

HDMI_CLK-_CONN HDMI_CLK+_CONN HDMI_TX1-_CONN HDMI_TX1+_CONN

HDMI_TX2-_CONN HDMI_TX2+_CONN HDMI_TX0-_CONN HDMI_TX0+_CONN

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

2

HDMI@

45 36 27 18

680 +-5% 8P4R

RP2

HDMI@RP2

HDMI@

45 36 27 18

680 +-5% 8P4R

Title

Size Document Number Rev

Custom

Date: Sheet of

SD309680080 S ROW RES 1/16W 680 +-5% 8P4R

+3VS

13

D

2

G

HDMI@

S

Q76

Q76 2N7002H_SOT23-3

2N7002H_SOT23-3

Compal Electronics,Ltd.

HDMI CONN

LA-8971P

1

0.1

37 58Wednesday, February 15, 2012

0.1

A

B

C

D

E

F

G

H

SATA HDD Conn.

1 1

JHDD1

1

SATA_PTX_DRX_P1

1 2

1

2

1000P_0402_50V7K

R1527

0_0805_5%

R1526

0_0805_5%

1

2

C1219

SATA_PTX_DRX_N1

SATA_PRX_DTX_N1 SATA_PRX_DTX_P1

+3VS_HDD

+5VS_HDD

1

2

C1220

1U_0603_10V4Z

0.1U_0402_16V4Z

1

2

C1221

10U_0603_6.3V6M

SATA_PRX_C_DTX_N1_R<14> SATA_PRX_C_DTX_P1_R<14>

SATA_PTX_DRX_N1_R<14> SATA_PTX_DRX_P1_R<14>

SATA_PRX_C_DTX_N2<14> SATA_PRX_C_DTX_P2<14>

SATA_PTX_DRX_N2<14> SATA_PTX_DRX_P2<14>

2 2

SATA_PRX_C_DTX_N1_R SATA_PRX_C_DTX_P1_R SATA_PTX_DRX_N1_R SATA_PTX_DRX_P1_R SATA_PTX_DRX_P1

SATA_PRX_C_DTX_N2 SATA_PRX_C_DTX_P2 SATA_PTX_DRX_N2 SATA_PTX_DRX_P2

C134 0.01U_0402_16V7KHM77@ C134 0.01U_0402_16V7KHM77@

12

C135 0.01U_0402_16V7KHM77@ C135 0.01U_0402_16V7KHM77@

12

C139 0.01U_0402_16V7KHM77@ C139 0.01U_0402_16V7KHM77@

12

C140 0.01U_0402_16V7KHM77@ C140 0.01U_0402_16V7KHM77@

12

C132 0.01U_0402_16V7KHM70@ C132 0.01U_0402_16V7KHM70@

12

C133 0.01U_0402_16V7KHM70@ C133 0.01U_0402_16V7KHM70@

12

C138 0.01U_0402_16V7KHM70@ C138 0.01U_0402_16V7KHM70@

12

C137 0.01U_0402_16V7KHM70@ C137 0.01U_0402_16V7KHM70@

12

SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 SATA_PTX_DRX_N1

SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1

C1222

0.1U_0402_16V4Z

+3VS

+5VS

+5VS_HDD+3VS_HDD

1

2

C1218

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

G1

22

G2

23

G3

24

G4

ACES_50406-02071-001

CONN@

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

D

Compal Secret Data

Deciphered Date

E

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

SATA HDD Connector

LA-8971P

G

38 58Wednesday, February 15, 2012

H

0.1

5

4

3

2

1

SATA ODD FFC CONN.

SATA_PTX_DRX_P4<14>

SATA_PTX_DRX_N4<14>

SATA_PRX_C_DTX_N4<14>

ODD_DETECT#<19>

D D

+5VS

+VSB

12

R678

470K_0402_5%

C C

ODD_EN#<19>

13

D

2

G

S

R677 0_0805_5%@R677 0_0805_5%@

1

2

C624

1U_0402_6.3V6K

ODD_EN

Q5509

Q5509 2N7002_SOT23-3

2N7002_SOT23-3

1 2

6

2 1

ODD_DA#<42>

PCH_ODD_DA#<18>

D

S

45

Q30

Q30 SI3456DDV-T1-GE3_TSOP6

SI3456DDV-T1-GE3_TSOP6

G

3

R681

1 2

1.5M_0402_5%

+3VS

+5VS_ODD

1

2

C629

ODD_DETECT# ODD_DETECT#_R

ODD_DA# ODD_DA#_R

R318

1 2

10K_0402_5%

0.1U_0402_16V4Z

SATA_PRX_C_DTX_P4<14>

@

1 2

R536 0_0402_5%

R535

1 2

0_0402_5%

R537

@R537

@

1 2

0_0402_5%

+5VS_ODD

ODD_DA#_R

Place caps. near ODD CONN.

+5VS_ODD

C3601

1000P_0402_50V7K

C3602

C3603

0.1U_0402_16V4Z

JODD1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

ACES_88514-01201-071

CONN@

C3604

1U_0402_6.3V4Z

10U_0805_10V4Z

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/07/12 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SATA ODD Conn

LA-8971P

1

0.3

39 58Wednesday, February 15, 2012

0.3

A

B

C

D

E

Mini-Express Card for WLAN with BT(Half)

1 1

EC_TX<42> EC_RX<42>

EC_WL_WAKE#

PCH_PCIE_WAKE#

BT_ACTIVE

WLAN_CLKREQ#<15>

CLK_PCIE_WLAN1#<15>

CLK_PCIE_WLAN1<15>

PCIE_PRX_DTX_N2<15> PCIE_PRX_DTX_P2<15>

PCIE_PTX_C_DRX_N2<15> PCIE_PTX_C_DRX_P2<15>

EC_WL_WAKE#<42>

PCH_PCIE_WAKE#<16,33>

R1490 0_0402_5%@R1490 0_0402_5%@

PCH_BT_ON#<19,43>

BT_DISABLE<19>

2 2

1 2

R1491 0_0402_5%R1491 0_0402_5%

1 2

BT_ACTIVE<43>

EC_TX EC_RX

1 2 1 2

R1498 100_0402_1%R1498 100_0402_1% R1499 100_0402_1%R1499 100_0402_1%

R294 0_0402_5%R294 0_0402_5%

1 2

R255 0_0402_5%@R255 0_0402_5%@

1 2

R254 0_0402_5%@R254 0_0402_5%@

1 2

BT_DISABLE_R WLAN_CLKREQ#

PCI_RST#_R CLK_PCI_DB

+3VS_WLAN

12

R1501

100K_0402_5%

JWLAN1

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

GND2

PLAST_SSM010-52-B-K

CONN@

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

+1.5VS +1.5VS

12

+1.5VS_WLAN LPC_FRAME#_R LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R

R1492 0_0402_5%R1492 0_0402_5%

1 2

R1494 0_0402_5%@R1494 0_0402_5%@

1 2

R1495 0_0402_5%R1495 0_0402_5%

1 2

R275 0_0402_5%@R275 0_0402_5%@

1 2

R277 0_0402_5%@R277 0_0402_5%@

1 2

USB20_N10_WLAN USB20_P10_WLAN

USB20_N10_WLAN

USB20_P10_WLAN

USB20_N10_WLAN

1

R1488

R1488 0_0603_5%

0_0603_5%

2

C1172

WL_RST#

0.1U_0402_16V4Z

1

2

C1173

+3VALW +3VS_WLAN

For Bluetooth

USB20_N10

R1503

1 2

0_0402_5%

USB20_P10

R1504

1 2

0_0402_5%

U1

@U1

@

7

5

4

TS3USB31RSER_QFN8_1P5X1P5

NC

HSD-6D-

D+3HSD+

GND

8

VCC

2

1

OE#

0.1U_0402_16V4Z

PCH_WL_OFF# <18>

PCH_SMBCLK <12,13,15,43>

PCH_SMBDATA <12,13,15,43>

+3VALW

@

C1273 0.1U_0402_16V4Z

1 2

USB20_N10

USB20_P10USB20_P10_WLAN

12

@

R1522

R1522 0_0402_5%

0_0402_5%

Reserve for SW mini-pcie debug card. Series resistors closed to KBC side.

LPC_FRAME#_R LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R PCI_RST#_R CLK_PCI_DB

PLT_RST#

12

R1493 0_0402_5%R1493 0_0402_5%

USB20_N10 <18>

USB20_P10 <18>

WLAN_USB_ON# <42>

R1482 0_0402_5%@R1482 0_0402_5%@

1 2

R1483 0_0402_5%@R1483 0_0402_5%@

1 2

R1484 0_0402_5%@R1484 0_0402_5%@

1 2

R1485 0_0402_5%@R1485 0_0402_5%@

1 2

R1486 0_0402_5%@R1486 0_0402_5%@

1 2

R1487 0_0402_5%@R1487 0_0402_5%@

1 2

PLT_RST# <18,33,42>

LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 PLT_RST#

LPC_FRAME# <14,42> LPC_AD3 <14,42> LPC_AD2 <14,42> LPC_AD1 <14,42> LPC_AD0 <14,42>

CLK_PCI_DB <18>

noAOAC@

R7

1 2

0_0603_5%

AOAC_ON#<42>

1

@

2

C1171

C1170

0.1U_0402_16V4Z

1 2

150K_0402_5%

JWLAN1 Pin2,24,52 contact to +3VS_WLAN for AOAC function

AOAC@

R1500

R1500 0_0603_5%

0_0603_5%

+3VALW

10U_0603_6.3V6M

AOAC@

R1502

Intel AOAC function

12

AOAC@

Q77

Q77 AO3413_SOT23-3

AO3413_SOT23-3

D

S

D

S

13

G

2

1

AOAC@

C1175

0.1U_0402_16V4Z

2

+3VS_WLAN_AOAC+3VS_WLAN +3VS_WLAN+3VS

1

AOAC@

C1174

0.1U_0402_16V4Z

2

Mini-Express Card for SSD(Full)

3 3

R278

SATA_PTX_DRX_N0 SATA_PTX_DRX_P0

@R278

@

1 2

0_0402_5%

SATA_PRX_DTX_C_P0 SATA_PRX_DTX_C_N0

+3VS_SSD

mSATA_DET#_R

A

SATA_PRX_DTX_P0 SATA_PRX_DTX_N0

SATA_PRX_DTX_P0<14> SATA_PRX_DTX_N0<14>

4 4

C2050 0.01U_0402_16V7KC2050 0.01U_0402_16V7K C2051 0.01U_0402_16V7KC2051 0.01U_0402_16V7K

SATA_PTX_DRX_N0<14>

SATA_PTX_DRX_P0<14>

mSATA_DET#<19>

12 12

SSD Active:4.5W(1.5A)

+3VS

R295

1 2

0_0805_5%

JSSD1

B

JSSD1

MOLEX_67910-5700

CONN@

112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

GND153GND2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

+3VS_SSD

1

2

C1177

C1176

0.01U_0402_25V7K

1

@

C1179

C1179 10U_0603_6.3V6M

10U_0603_6.3V6M

2

C1178

0.1U_0402_16V4Z

10U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/21 2012/12/31

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

W/L & m-SATA Card

Size Document Number Rev

Date: Sheet

LA-8971P

E

of

40 58Wednesday, February 15, 2012

of

40 58Wednesday, February 15, 2012

of

40 58Wednesday, February 15, 2012

0.1

5

D D

C C

4

3

2

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

NULL

LA-8971P

1

0.3

41 58Wednesday, February 15, 2012

0.3

L38

C1263

22P_0402_50V8J

R1568

R1570

1 2

2.2K_0402_5%

1 2

2.2K_0402_5%

12

R1575

2.2K_0402_5%

1

@

C1267

C1267 100P_0402_50V8J

100P_0402_50V8J

2

1 2

10K_0402_5%

1 2

10K_0402_5%

EC_PME#

R1574

R1577

R1581

+3VALW

2N7002_SOT23

1 2

FBM-11-160808-601-T_0603

0.1U_0402_16V4Z

L39

12

@R1568

@

@R1570

@

12

R1585

R1585 10K_0402_5%

10K_0402_5%

12

@

R1560

10_0402_5%

EC_SMB_CK1

EC_SMB_DA1

12

R1576

2.2K_0402_5%

EC_SMB_CK2 EC_SMB_DA2

1

@

C1268

C1268 100P_0402_50V8J

100P_0402_50V8J

2

EC_TACH

EC_FAN_PWM

R4

R1591

0_0402_5%

R1589 0_0402_5%@R1589 0_0402_5%@

D

1 3

@

Q83

G

2

+3VALW

KSO1

KSO2

FBM-11-160808-601-T_0603

@

1 2

47K_0402_5%

1 2

47K_0402_5%

@ R4

@

S

C1262

+3VALW

CLK_PCI_EC

12

1 2

0.1U_0402_16V4Z

LAN_WAKE#

12

PCI_PME#

1

2

R1563

47K_0402_5%

C1260

C1260 1000P_0402_50V7K

1000P_0402_50V7K

ECAGND

1

C1264

2

KSO[0..17]<46>

KSI[0..7]<46>

SUSCLK<16>

LAN_WAKE# <33>

PCI_PME# <18>

+3VALW +EC_VCCA

+3VALW

+3VS

EC_INVT_PWM<35>

PWRSHARE_EN#<45>

CHG_MODE1<45>

PCH_PWROK<16> EC_FAN_PWM<44>

LPC_FRAME#<14,40>

CLK_PCI_EC<18>

KSO[0..17]

KSI[0..7]

EC_SMB_CK1<48,50> EC_SMB_DA1<48,50> EC_SMB_CK2<15,23,44> EC_SMB_DA2<15,23,44>

PM_SLP_S3#<16> PM_SLP_S5#<16>

EC_SMI#<19>

CMOS_ON#<35>

SLP_SUS#<16>

ODD_DA#<39>

EC_TACH<44>

0.1U_0402_16V4Z

1

C1255

2

GATEA20<19> KBRST#<19>

SERIRQ<14>

LPC_AD3<14,40> LPC_AD2<14,40> LPC_AD1<14,40> LPC_AD0<14,40>

PLT_RST#<18,33,40>

EC_SCI#<19>

EC_TX<40> EC_RX<40>

1 2

0_0402_5%

R1586

100K_0402_5%

0.1U_0402_16V4Z

1

C1256

C1257

2

GATEA20 KBRST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST# EC_RST# EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2

PM_SLP_S3# PM_SLP_S5# EC_SMI# CMOS_ON#

CHG_MODE1 ODD_DA# EC_INVT_PWM EC_TACH EC_PME# EC_TX EC_RX PCH_PWROK EC_FAN_PWM

NUM_LED#: NC

SUSCLK_RSUSCLK

12

R1587

+3VLP

0.1U_0402_16V4Z

1

C1258

2

10

12 13 37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

C1271

C1271 20P_0402_50V8

20P_0402_50V8

1000P_0402_50V7K

1

C1261

2

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

LPC & MISC

LPC_AD0

CLK_PCI_EC PCIRST#/GPIO05 EC_RST# EC_SCII#/GPIO0E GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

EC_SMB_CK1/GPIO44 EC_SMB_DA1/GPIO45 EC_SMB_CK2/GPIO46 EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 GPIO0A GPIO0B GPIO0C GPIO0D EC_INVT_PWM/GPIO11 FAN_SPEED1/GPIO14 EC_PME#/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 PCH_PWROK/GPIO18 SUSP_LED#/GPIO19 NUM_LED#/GPIO1A

XCLKI/GPIO5D XCLKO/GPIO5E

1

C1259

2

Int. K/B

Int. K/B Matrix

Matrix

+3VALW

1000P_0402_50V7K

SM Bus

1

2

9

22

33

96

125

111

EC_VDD0

EC_VDD/VCC

PWM Output

AD Input

DA Output

PS2 Interface

CPU1.5V_S3_GATE/GPXIOA00

SPI Device Interface

SPI Flash ROM

GPIO

H_PROCHOT#_EC/GPXIOA06

GPO

GPIO

GPI

GND/GND

GND0

11

24

35

94

113

C1254

C1254 100P_0402_50V8J

100P_0402_50V8J

+3VALW

+EC_VCCA

67

GPIO0F

BEEP#/GPIO10

EC_VDD/AVCC

GPIO12

ACOFF/GPIO13

BATT_TEMP/GPIO38

GPIO39

ADP_I/GPIO3A

GPIO3B GPIO42

IMON/GPIO43

DAC_BRIG/GPIO3C EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01 HDA_SDO/GPXIOA02 VCIN0_PH/GPXIOD00

SPIDI/GPIO5B

SPIDO/GPIO5C

SPICLK/GPIO58

SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

BATT_LOW_LED#/GPIO55

SYSON/GPIO56 VR_ON/GPIO57

PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04 PROCHOT_IN/GPXIOA05

VCOUT0_PH/GPXIOA07

BKOFF#/GPXIOA08

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

GPXIOD06

PECI_KB9012/GPXIOD07

AGND/AGND

KB9012QF A3 LQFP 128P_14X14

69

ECAGND

V18R

U51

LED_KB_PWM

21

BEEP#

23

NOVO#

26

ACOFF

27

BATT_TEMP

63

EC_WL_WAKE#

64

ADP_I

65 66

BRDID

75 76

SUSACK#

68 70 71 72

EC_MUTE#

83

USB_ON#

84 85

USB3_ON#

86

TP_CLK

87

TP_DATA

88

CPU1.5V_S3_GATE

97 98

ME_FLASH

99

NTC_V_R

109

PCH_PWR_EN

119

PWR_GPS_DOWN#_R

120

AOAC_ON#

126 128

ENBKL

73

AC_PRESENT

74

WLAN_USB_ON#_R

89

BATT_CHG_LED#

90

ACIN_BUF#

91

PWR_LED

92

BATT_LOW_LED#

93

SYSON

95

VR_ONEC_SMB_DA2

121

PM_SLP_S4#

127

EC_RSMRST#

100

EC_LID_OUT#

101

Turbo_V

102

H_PROCHOT#_EC

103

MAINPWON_R

104

BKOFF#

105

PBTN_OUT#

106

SUSWARN#

107

SA_PGOOD

108

ACIN

110

EC_ON

112

ON/OFF

114

LID_SW#

115

SUSP#

116

PCH_HOT#_R

117

PECI_KB9012

118

+V18R

124

PN : SA00004OB20 S IC KB9012QF A3 LQFP 128P KB CONTROLLER

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

KBL@

R266 0_0402_5%

1 2

BEEP# <31> NOVO# <43> ACOFF <50>

BATT_TEMP <48> EC_WL_WAKE# <40>

ADP_I <49,50>

SUSACK# <16>

R156510K_0402_5% R156510K_0402_5%

12

CPU1.5V_S3_GATE <10,47>

R324 0_0402_5%@R324 0_0402_5%@

ME_FLASH <14>

R1571 0_0402_5%R1571 0_0402_5%

12

R256 0_0402_5%@R256 0_0402_5%@

AOAC_ON# <40>

ENBKL <35> AC_PRESENT <16>

BATT_CHG_LED# <43>

PWR_LED <43>

BATT_LOW_LED# <43>

VR_ON <56>

EC_LID_OUT# <19>

PBTN_OUT# <16>

ACIN <16,23,50> EC_ON <48,51>

ON/OFF <43>

LID_SW# <43>

R1583 0_0402_5%@R1583 0_0402_5%@ R1584 43_0402_1%R1584 43_0402_1%

1 2

1

C1270

4.7U_0805_10V4Z

2

LED_KB_PWM_R <46>

+3VALW

EC_MUTE# <31> USB_ON# <46> CHG_MODE0 <45> USB3_ON# <45> TP_CLK <43>

TP_DATA <43>

VSBP_ENVSBP_EN_R

12

NTC_V <49>

12

SYSON <47,52>

PM_SLP_S4# <16>

EC_RSMRST# <16>

R1580 0_0402_5%R1580 0_0402_5%

1 2

R276 0_0402_5%@R276 0_0402_5%@

1 2

BKOFF# <35>

SUSWARN# <16> SA_PGOOD <53>

12

2011/06/15 2012/07/11

VSBP_EN <49>

PCH_PWR_EN <21> PWR_GPS_DOWN# <55>

R300 0_0402_5%@ R300 0_0402_5%@

1 2

R257 0_0402_5%@ R257 0_0402_5%@

12

+3VLP

12

@

R1578

R1578 47K_0402_5%

47K_0402_5%

SUSP# <10,47,52,54> PCH_HOT# <15>

H_PECI <6,19>

Compal Secret Data

Deciphered Date

R325

0_0402_5%

WLAN_USB_ON# <40>

ACIN_BUF <23>

Turbo_V <49> PROCHOT <49> MAINPWON <49,51>

Vcc R1562

Board ID

0 1 2 3

PCH_PWR_ENVSBP_EN

12

3.3V +/- 5%

100K +/- 5%

0

8.2K +/- 5%

18K +/- 5%

33K +/- 5%

100K_0402_1%

PCH_PWR_EN

100K_0402_1%

VR_HOT#<56>

VR1564

AD_BID

min

0 V

V

AD_BID

typ

V

AD_BID

0 V0 V

max

0.289 V0.250 V0.216 V

0.436 V

0.712 V

+3VALW

12

@

R1572

12

R15

VR_HOT#

H_PROCHOT#_EC

Title

Size Document Number Rev

Custom

Date: Sheet of

0.503 V

0.819 V

TP_CLK

TP_DATA

NTC_V_R

BATT_TEMP

ACIN

WLAN_USB_ON#_R

R1579

1 2

0_0402_5%

2N7002H_SOT23-3

13

D

2

G

Q82

S

Compal Electronics, Inc.

ENE_KB9012

LA-8971P

0.538 V

0.875 V

+3VALW

12

R1562

R1562 100K_0402_1%

BRDID

USB_ON#

USB3_ON#

EC_WL_WAKE#

CHG_MODE0

R1567 4.7K_0402_5%R1567 4.7K_0402_5%

R1569 4.7K_0402_5%R1569 4.7K_0402_5%

R1573 4.7K_0402_5%@R1573 4.7K_0402_5%@

100K_0402_1%

12

R1564

R1564 33K_0402_5%

33K_0402_5%

R1566

12

10K_0402_5%

R1582

12

10K_0402_5%

R16

12

10K_0402_5%

R58

12

10K_0402_5%

1 2

C136 100P_0402_50V8J@ C136 100P_0402_50V8J@

1 2

C1265 100P_0402_50V8JC1265 100P_0402_50V8J

1 2

C1266 100P_0402_50V8JC1266 100P_0402_50V8J

1 2

SYSON

C1272

0.1U_0402_10V6K

EMC Request

@

R301

12

100K_0402_1%

H_PROCHOT# <6,49>

1

C1269

C1269 47P_0402_50V8J

47P_0402_50V8J

2

42 58Wednesday, February 15, 2012

@

MP PVT DVT EVT

+5VALW

1

2

+3VALW

+3VS

0.1

SW1

SW1 SMT1-05_4P

SMT1-05_4P

1

2

1 2

SHORT PADS

NOVO#<42>

ON/OFF<42>

TP_CLK<42> TP_DATA<42>

3

4

5

6

J2

@J2

@

100K_0402_5%

1 2

0_0402_5%

ON/OFFBTN#

R17

100K_0402_5%

NOVO#

ON/OFF

1

@

2

C1302

100P_0402_50V8J

+3VALW

12

@

R61

R19

100K_0402_5%

+3VALW+3VLP

100P_0402_50V8J

12

R5

R5 100K_0402_5%

100K_0402_5%

2

3

D40

D40 DAN202UT106_SC70-3

DAN202UT106_SC70-3

2

3

@

D42

D42 PSOT24C_SOT23-3

PSOT24C_SOT23-3

1

ON/OFF

1

NOVO_BTN#

TP_CLK TP_DATA

ON/OFFBTN#<48>

PCH_SMBCLK<12,13,15,40>

PCH_SMBDATA<12,13,15,40>

R18

12

@

1

@

2

C1303

+5VALW

NOVO_BTN# ON/OFFBTN# PWR_LED#

C1301

0.1U_0402_16V4Z

PCH_SMBCLK PCH_SMBDATA

0.1U_0402_10V6K

JPWR1

8

GND

7

GND

6

5

4

3

2

1

ACES_88514-00601-071

CONN@

NOVO_BTN# ON/OFFBTN#

2

3

@

D43

D43 PJSOT24C 3P C/A SOT-23

PJSOT24C 3P C/A SOT-23

1

+3VS

@

1

C1304

2

8 7

6 5 4 3 2 1

@

1

C1305

0.1U_0402_10V6K

2

JTP1

GND GND

6 5 4 3 2 1

ACES_88514-00601-071

CONN@

LID_SW#<42>

BATT_LOW_LED#<42> BATT_CHG_LED#<42>

PWR_LED<42>

LED Board Conn.

+5VALW

+3VALW

LID_SW# PWR_LED# BATT_LOW_LED# BATT_CHG_LED#

JLED1

8

7

6

5

4

3

2

1

E-T_6916K-Q08N-00L

CONN@

PWR_LED#

13

D

Q19

2

G

2N7002_SOT23-3

S

10

G2

9

G1

+3VLP

Power Board Conn.

+3VALW

1

@

C358

0.1U_0402_16V4Z

BT@

R274

PCH_BT_ON#<19,40>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

Compal Secret Data

1 2

100K_0402_5%

Deciphered Date

0.1U_0402_16V4Z

BT@

C356

2

1

2

+3VS

G

1 3

Blue Tooth Moudle

1

@

C612

4.7U_0805_10V4Z

2

S

BT@

Q17

Q17 PMV65XP_SOT23-3~D

PMV65XP_SOT23-3~D

D

+3VS_BT_R

USB20_P9<18> USB20_N9<18>

BT_ACTIVE<40>

Title

Size Document Number Rev

C

Date: Sheet

W=40mils

+3VS_BT

BT@

R321

1 2

0_0603_5%

USB20_P9 USB20_N9

BT_ACTIVE

PWR/LED/TP/BT Conn.

1

2

1 2 3 4 5 6

Compal Electronics, Inc.

LA-8971P

BT@

C357

0.1U_0402_16V4Z

JBT1

1 2 3 4

7

5

G1

8

6

G2

ACES_87213-0600G

CONN@

0.1

43 58Wednesday, February 15, 2012

0.1

of

5

4

3

2

1

REMOTE1+

SMSC thermal sensor placed near by VRAM

D D

Close U49

REMOTE1+

1

C1211

C1211 2200P_0402_50V7K

2200P_0402_50V7K

2

REMOTE1-

REMOTE2+

1

C1213

C1213 2200P_0402_50V7K

2200P_0402_50V7K

2

REMOTE2-

C1212

0.1U_0402_16V4Z

+3VS

U49

1

REMOTE1+

1

REMOTE1-

2

REMOTE2+

REMOTE2-

VDD

2

DP1

3

DN1

4

DP2

5

DN2

EMC1403-2-AIZL-TR_MSOP10

SMCLK

SMDATA

ALERT#

THERM#

GND

10

9

8

7

6

EC_SMB_CK2

EC_SMB_DA2

@

R1524

10K_0402_5%

EC_SMB_CK2 <15,23,42>

EC_SMB_DA2 <15,23,42>

12

+3VS

100P_0402_50V8J

REMOTE1-

REMOTE2+

100P_0402_50V8J

REMOTE2-

REMOTE1,2+/-: Trace width/space:10/10 mil Trace length:<8"

C1210

C1214

1

@

2

1

@

2

Close to DDR

C

Q79

2

B

MMST3904-7-F_SOT323-3

E

3 1

Under mSSD

C

Q80

2

B

MMST3904-7-F_SOT323-3

E

3 1

Address 1001_101xb

C C

FAN Conn

JFAN1

1

12

1

2

3

G1

4

G2

ACES_88266-04001

CONN@

1

2

C35

C78

10U_0805_10V6K

44 58Wednesday, February 15, 2012

1

5 6

1000P_0402_50V7K

0.1

@

D5

1

221

BAS16_SOT23-3

EC_FAN_PWM EC_TACH +FAN1

@

D7

B B

+5VS

+FAN1

R1525

1 2

0_0603_5%

1

@

C1215

C1215 10U_0603_6.3V6M

10U_0603_6.3V6M

2

EC_FAN_PWM<42>

EC_TACH<42>

+5VS

1SS355TE-17_SOD323-2

Close to Connector

A A

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics,Ltd.

Title

Size Document Number Rev

B

Date: Sheet of

2

Date: Sheet of

EMC-Thermal IC/FAN

LA-8971P

5

R285

10K_0402_5%

U2

+5VALW

USB3_RX1_N<18>

USB3_RX1_P<18>

USB3_TX1_N<18>

USB3_TX1_P<18>

CHG_MODE0

USB20_N0

USB20_P0

.1U_0402_16V7K

C12

CHG_MODE0<42>

USB20_N0<18>

USB20_P0<18>

D D

1

2

USB3_RX1_N

USB3_RX1_P

USB3_TX1_N

USB3_TX1_P

8

7

6

5

U2

CEN#

CB

SLG55566

DM

TDM

DP

TDP

GND

VDD

Thermal Pad

SLG55566VTR_TDFN8_2X2

C1

1 2

0.1U_0402_16V7K

C2

1 2

0.1U_0402_16V7K

C3

1 2

0.1U_0402_16V7K

C4

1 2

0.1U_0402_16V7K

1

2

3

4

9

U3RXDN1_R

U3RXDP1_R

U3TXDN1_R

U3TXDP1_R

U2DN0_L

U2DP0_L

20 mil

10K_0402_5%

R264

55584@

0_0402_5%

55566@

R64

R64 0_0402_5%

0_0402_5%

+5VALW

0_0402_5%@

CHG_MODE1

R63

Place TX AC coupling Cap (C843~C850). Close to connector

C C

+3VS +3VS +3VS +3VS

12

@

R151

4.99K_0402_1%~D

A_EQ0 A_EQ1

4.99K_0402_1%~D

B B

4.99K_0402_1%~D

@

R154

4.99K_0402_1%~D

1 2

+3VS +3VS

12

@

R166

4.99K_0402_1%~D

12

@

R167

4.99K_0402_1%~D

12

@

R157

R160

R168

A_DE1A_DE0

R169

4.99K_0402_1%~D

12

@

4.99K_0402_1%~D

12

@

4.99K_0402_1%~D

12

@

4.99K_0402_1%~D

12

@

R161

B_EQ0 B_EQ1

R163

R170

R171

4.99K_0402_1%~D

12

@

4.99K_0402_1%~D

12

@

4.99K_0402_1%~D

12

@

4.99K_0402_1%~D

A_EQ1/B_EQ1

(Internal

reserved

A A

program EQ for channel loss up to 7dB program EQ for channel loss up to 14.5dB program EQ for channel loss up to 11.5dB

pull Low)

Low Low

Low

High Low

High High

5

12

@

R164

12

@

R165

+3VS+3VS

12

@

R172

B_DE1B_DE0

12

@

R173

A_EQ0/B_EQ0

(Internal pull Low)

High

4

PWRSHARE_EN# <42>

CHG_MODE1 <42>

+3VS

3.5dB de-emphasis

No de-emphasis

7dB de-emphasis

5dB with boost output swing

4

U3TXDN1

U3TXDP1

+3VS

0.01U_0402_16V7K

0.1U_0402_16V7K

1

C10

C11

2

A_EQ1 A_DE0 A_EQ0 A_DE1

U3RXDP1 U3RXDN1

U3TXDP1_R U3TXDN1_R

R623.3K_0402_1% R623.3K_0402_1%

12

R150

1 2

@

4.99K_0402_1%~D

A_DE1/B_DE1

(Internal pull Low)

Low Low

High Low

High High

U3RXDN1

U3RXDP1

U3TXDN1_M

C5

1 2

0.1U_0402_16V7K

U3TXDP1_M

C6

1 2

0.1U_0402_16V7K

UR1

1

VDD

13

VDD

15

A_EQ1/SDA_CTL

16

A_DE0/SCL_CTL

17

A_EQ0/NC

18

A_DE1/NC

19

A_INp

20

A_INn

9

B_INp

8

B_INn

5

PD#

7

REXT

14

TEST

24

I2C_EN

PS8710BTQFN24GTR-A1_TQFN24_4X4

Low

U2DP0_L

A_DE0/B_DE0

(Internal pull Low)

R1605

1 2

0_0402_5%

L43

@L43

@

1

4

WCM-2012-900T_4P

R1608

1 2

0_0402_5%

R1609

1 2

0_0402_5%

L44

@L44

@

1

4

WCM-2012-900T_4P

R1612

1 2

0_0402_5%

R1613

1 2

0_0402_5%

L45

@L45

@

1

4

WCM-2012-900T_4P

R1616

1 2

0_0402_5%

B_EQ1/I2C_ADDR1 B_DE0/I2C_ADDR0

High

B_EQ0/NC B_DE1/NC

A_OUTp A_OUTn

B_OUTp B_OUTn

GPAD

3

U2DN0_UU2DN0_L

2

U2DP0_U

3

U3RXDN1_L

2

U3RXDP1_L

3

U3TXDN1_L

2

U3TXDP1_L

3

B_EQ1

4

B_DE0

3

B_EQ0

2

B_DE1

6

U3RXDP1_R

12

U3RXDN1_R

11

U3TXDP1

22

U3TXDN1

23

10

GND

21

GND

25

TEST

(Internal

Normal operation (default)

Test mode enable

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

pull Low)

Low

High

2011/06/15 2012/07/11

2

Compal Secret Data

Deciphered Date

2

USB3_ON#<42>

0.1U_0402_16V7K

150U_B2_6.3VM_R35M

1

C7

2

R149

1 2

0_0402_5%

+5VALW

W=80mils

U52

1

GND

VOUT

2

VOUT7VIN

VIN3VOUT

4

FLG

EN

G547I2P81U_MSOP8

2A/Active Low

+USB3_VCCA

12

+

C13

W=80mils

U3TXDP1_L

U3TXDN1_L U2DP0_U

U2DN0_U U3RXDP1_L

U3RXDN1_L

U2DP0_U

U3RXDN1_L U3RXDN1_L

U3TXDN1_L

U3TXDP1_L

Title

Size Document Number Rev

Custom

Date: Sheet of

1

+USB3_VCCA

1

C8

C14

2

USB_OC0#

GND GND GND

I/O4

VDD

I/O3

4.7U_0805_10V4ZC84.7U_0805_10V4Z

10 11 12 13

6

5

4

1

2

4

5

3

8

2

USB_OC0# <18,46>

U2DN0_U

U3RXDP1_LU3RXDP1_L

U3TXDN1_L

U3TXDP1_L

8

6 5

JUSB1

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND D-2GND

6

SSRX+

4

GND

5

SSRX-

SANTA_373280-1

CONN@

D45

@D45

@

3

I/O2

2

GND

1

I/O1

AZC099-04S.R7G_SOT23-6

D44

@

D44

@

10

9

8

7

6 5

6

YSCLAMP0524P_SLP2510P8-10-9

For EMI request

Compal Electronics, Inc.

USB3.0 Left Side

LA-8971P

1

C9

2

0.1U_0402_16V7K

+USB3_VCCA

470P_0402_50V7KC9470P_0402_50V7K

0.1

45 58Wednesday, February 15, 2012

0.1

5

4

3

2

1

+USB2_VCCC

USB20_P1 USB20_N1

USB20_P3 USB20_N3

USB20_P11 USB20_N11

C1306

IO Board

+USB2_VCCB

1

2

JCR1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

GND

18

GND

ACES_51524-0160N-001

CONN@

+USB2_VCCB

+5VALW

1

C17

0.1U_0402_16V7K

D D

USB_ON#<42>

C17

2

R174

1 2

0_0402_5%

+5VALW

U55

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

FLG

EN

G547I2P81U_MSOP8

2A/Active Low

W=80mils

1

C21

W=80mils

0.1U_0402_16V7K

C C

USB_ON#<42>

C21

2

R176

1 2

0_0402_5%

U56

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

FLG

EN

G547I2P81U_MSOP8

2A/Active Low

8 7 6 5

+USB2_VCCC

8 7 6 5

C18

USB_OC0#

C22

USB_OC1#

1

2

1

2

C16

4.7U_0805_10V4Z

C20

4.7U_0805_10V4Z

1

C15

2

0.1U_0402_16V7K

470P_0402_50V7K

USB_OC0# <18,45>

1

C19

2

470P_0402_50V7K

.1U_0402_16V7K

USB_OC1# <18>

USB20_P1<18> USB20_N1<18>

USB20_P3<18> USB20_N3<18>

USB20_P11<18> USB20_N11<18>

+3VS

0.1U_0402_10V6K

KB BackLight Connector

JKB2

+VCC_KB_LED

B B

+5VALW +VCC_KB_LED

KBL@

R268

10K_0402_5%

LED_KB_PWM_R<42>

A A

LED_KB_PWM_R

100K_0402_5%

5

R269

2

IN

12

@

0.1U_0402_16V4Z

+5VS

12

KBL@

R265

1 2

100K_0402_5%

1

OUT

GND

KBL@

Q87

3

DTC124EKAT146_SC59-3

1

@

C129

2

KBL@

Q81

Q81 PMV65XP_SOT23-3~D

PMV65XP_SOT23-3~D

D

S

D

S

13

G

2

1

KBL@

C130

0.01U_0402_16V7K

2

10U_0603_6.3V6M

1

2

3

4

5

GND

6

GND

JOINT_F1017WR-S-04P

CONN@

12

KBL@

C128

4

1

KBL@

C126

0.1U_0402_16V4Z

2

KSI[0..7]

KSO[0..17]

KSO2 KSO1

C1275 100P_0402_50V8J@C1275 100P_0402_50V8J@

KSO15

C1280 100P_0402_50V8J@C1280 100P_0402_50V8J@

KSO6

C1281 100P_0402_50V8J@C1281 100P_0402_50V8J@

KSO8

C1283 100P_0402_50V8J@C1283 100P_0402_50V8J@

KSO13

C1285 100P_0402_50V8J@C1285 100P_0402_50V8J@

KSO12

C1287 100P_0402_50V8J@C1287 100P_0402_50V8J@

KSO11

C1289 100P_0402_50V8J@C1289 100P_0402_50V8J@

KSO10

C1291 100P_0402_50V8J@C1291 100P_0402_50V8J@

KSO3

C1293 100P_0402_50V8J@C1293 100P_0402_50V8J@

KSO4

C1295 100P_0402_50V8J@C1295 100P_0402_50V8J@

KSI0

C1297 100P_0402_50V8J@C1297 100P_0402_50V8J@

KSO0

C1299 100P_0402_50V8J@C1299 100P_0402_50V8J@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

KSI[0..7] <42>

KSO[0..17] <42>

1 2

Compal Secret Data

2011/06/15 2012/07/11

Compal Secret Data

KSO16

KSO17

KSO7

KSI2

KSO5

KSI3

KSO14

KSI7

KSI6

KSI5

KSI4

KSO9

KSI1

Deciphered Date

C1277 100P_0402_50V8J@C1277 100P_0402_50V8J@

1 2

C1278 100P_0402_50V8J@C1278 100P_0402_50V8J@

1 2

C1279 100P_0402_50V8J@C1279 100P_0402_50V8J@

1 2

C1276 100P_0402_50V8J@C1276 100P_0402_50V8J@

1 2

C1282 100P_0402_50V8J@C1282 100P_0402_50V8J@

1 2

C1284 100P_0402_50V8J@C1284 100P_0402_50V8J@

1 2

C1286 100P_0402_50V8J@C1286 100P_0402_50V8J@

1 2

C1288 100P_0402_50V8J@C1288 100P_0402_50V8J@

1 2

C1290 100P_0402_50V8J@C1290 100P_0402_50V8J@

1 2

C1292 100P_0402_50V8J@C1292 100P_0402_50V8J@

1 2

C1294 100P_0402_50V8J@C1294 100P_0402_50V8J@

1 2

C1296 100P_0402_50V8J@C1296 100P_0402_50V8J@

1 2

C1298 100P_0402_50V8J@C1298 100P_0402_50V8J@

1 2

C1300 100P_0402_50V8J@C1300 100P_0402_50V8J@

1 2

2

JKB1

KSI1

1

KSI7

2

KSI6

3

KSO9

4

KSI4

5

KSI5

6

KSO0

7

KSI2

8

KSI3

9

KSO5

10

KSO1

11

KSI0

12

KSO2

13

KSO4

14

KSO7

15

KSO8

16

KSO6

17

KSO3

18

KSO12

19

KSO13

20

KSO14

21

KSO11

22

KSO10

23

KSO15

24

KSO16

25

KSO17

26

27

28

29 30

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

KB & IO Board Conn

LA-8971P

1

31

29

GND

32

30

GND

TYCO_3-2041084-0

CONN@

46 58Thursday, February 16, 2012

0.1

A

B

C

D

E

+5VALW TO +5VS

+5VALW

U53

U53 DMN3030LSS-13_SOP8L-8

10U_0603_6.3V6M

12

SYSON# SUSPSUSP

12

Q99

2

IN

DMN3030LSS-13_SOP8L-8

8 7

5

5VS_GATE_R

+5VALW+RTCVCC

12

@

R1637

R1637 100K_0402_5%

100K_0402_5%

1

OUT

GND

3

1 1

1

C1313

+VSB

12

R1620

R1620 150K_0402_5%

150K_0402_5%

5VS_GATE

13

D

Q88

2

G

2

G

@

SUSP<6,10,52>

SUSP#<10,42,52,54>

Q88 2N7002_SOT23

2N7002_SOT23

S

DTC124EKAT146_SC59-3

100K_0402_5%

SUSP

2 2

12

@

R1626

R1626 470_0603_5%

470_0603_5%

13

D

S

Q92

Q92 2N7002_SOT23

2N7002_SOT23

3 3

4 4

C1313

2

R1622

82K_0402_5%

+1.5V+1.8VS +0.75VS+1.05VS_VTT

12

@

R1627

R1627 470_0603_5%

470_0603_5%

13

D

2

G

@

S

Q93

Q93 2N7002_SOT23

2N7002_SOT23

R1636

220K_0402_5%

SUSP

SUSP#

12

@

R1639

4

1

C1322

0.01U_0603_50V7K

2

12

@

R1628

R1628 470_0603_5%

470_0603_5%

13

D

2

G

@

S

Q94

Q94 2N7002_SOT23

2N7002_SOT23

1 2 36

SUSP

+5VS

12

@

1

2

C1314

10U_0603_6.3V6M

@

1

R1617

R1617 470_0603_5%

470_0603_5%

2

C1315

1U_0603_10V4Z

13

D

SUSP

2

G

@

S

Q85

Q85 2N7002_SOT23

2N7002_SOT23

12

R1629

R1629 22_0603_5%

22_0603_5%

13

D

2

G

Q95

S

2N7002_SOT23

For Intel S3 Power Reduction.

DTC124EKAT146_SC59-3

SYSON<42,52>

SYSON

@

R1630

0_0402_5%

100K_0402_5%

SYSON#

Q100

+VSB

12

+3VALW

13

2

G

12

SUSP

CPU1.5V_S3_GATE <10,42>

12

+5VALW

12

@

R1638

SUSP#

1

@

OUT

2

IN

GND

3

2

G

R1633

R1633 100K_0402_5%

100K_0402_5%

13

D

Q98

Q98 2N7002_SOT23

2N7002_SOT23

S

R1621

R1621 470K_0402_1%

470K_0402_1%

D

Q89

Q89 2N7002_SOT23

2N7002_SOT23

S

R1635

0_0402_5%

1

C1316

2

+3VALW TO +3VS

+3VALW

U54

U54 DMN3030LSS-13_SOP8L-8

DMN3030LSS-13_SOP8L-8

8 7

5

10U_0603_6.3V6M

12

@

R1623

R1623 0_0402_5%

0_0402_5%

+1.5V to +1.5VS

+1.5V

12

1

2

C1325

1.5VS_GATE

PMV65XP_SOT23-3~D

10U_0603_6.3V6M

1

2

C1328

0.1U_0603_25V7K

Q91

S

G

C1329

4

1

C1323

0.01U_0603_50V7K

2

D

13

2

1

2

0.1U_0603_25V7K

1 2 36

+1.5VS

+3VS

1

2

C1326

12

@

1U_0603_10V4Z

12

R1631

R1631 470_0603_5%

470_0603_5%

@

13

@

Q96

Q96 2N7002_SOT23

2N7002_SOT23

D

S

2

G

@

R1618

R1618 470_0603_5%

470_0603_5%

13

SUSP

2

G

@

Q86

Q86 2N7002_SOT23

2N7002_SOT23

J3 @

1 2

PAD-OPEN 4x4m

SUSP

+1.5V_CPU_VDDQ

1

2

C1318

C1317

10U_0603_6.3V6M

1

2

D

C1327

10U_0603_6.3V6M

1U_0603_10V4Z

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DC Interface

LA-8971P

E

47 58Wednesday, February 15, 2012

0.1

5

4

3

2

1

VIN

PL1

PF1

PAJ1

4

-

3

-

2

D D

+

1

+

ACES_50305-00441-001

PF1

7A_24VDC_429007.WRML

21

APDIN1

12

PC1

SMB3025500YA_2P

12

1000P_0402_50V7K

PL1

1 2

PC2

100P_0402_50V8J

12

PC3

PC4

100P_0402_50V8J

1000P_0402_50V7K

+3VLP

+CHGRTC

PR3

PR2

JRTC1

- +

MAXEL_ML1220T10@

C C

PR2

560_0603_5%

1 2

12

PR3

560_0603_5%

1 2

PD1

RB751V-40_SOD323-2

12

1 2

PD2

RB751V-40_SOD323-2

+RTCBATT

RTC Battery

change PBJ1 2012/01/19 Wenwen

PBJ1

10

9

8

7

6

5

4

3

2

1

ACES_50299-01001-001

B B

VMB2

12

PR5

100_0402_1%

PR4

100_0402_1%

1 2

PR10

6.49K_0402_1%

1 2

PR14

PR14 10K_0402_5%

10K_0402_5%

PF2

PF2 12A_65V_451012MRL

12A_65V_451012MRL

21

+3VALW

BATT_TEMP <42>

VMB

PL2

SMB3025500YA_2P

1 2

12

PC5

PC5 1000P_0402_50V7K

1000P_0402_50V7K

EC_SMB_CK1 <42,50>

EC_SMB_DA1 <42,50>

A/D

PR1

PR1 0_0402_5%

0_0402_5%

1 2

BA

12

0.01U_0402_25V7K

0.01U_0402_25V7K PC6

PC6

RTCVREF

Add battery reset circuit 2012/01/15 Wenwen

PJ401

JUMP_43X118

2

112

PQ39

AO4423_SO8

EC_ON <42,51>

BATT_RST

PR606

1 2

PR214

1 2

10K_0402_5%

47K_0402_1%

AO4423_SO8

1 2 3 6

12

PC601

0.022U_0402_25V7K

PR213

2

G

PQ40

4

10K_0402_1%

1 2

13

D

S

8 7

5

PD303

RB751V-40_SOD323-2

2N7002KW_SOT323-3

1 2

12

PC609

PC609 1500P_0402_50V7K

1500P_0402_50V7K

ON/OFFBTN# <43>

BATT+

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/25 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR DCIN

Size Document Number Rev

Custom

C38-G series Chief River Schematic

Date: Sheet of

2

Date: Sheet

1

48 58Wednesday, February 15, 2012

0.1

of

5

4

3

2

1

ADP_I need to write Charge Options Register (0x12H)=> bit6=1

0: IOUT is the 20x current amplifier output <default @ POR> 1: IOUT is the 40x current amplifier output

PH1 under CPU botten side : CPU thermal protection at 93 +-3 degree C

D D

Recovery at 56 +-3 degree C

VL

12

PC7

0.1U_0603_16V7K

H_PROCHOT#<6,42>

PROCHOT<42>

C C

+3VS

PR11

1 2

PQ1

13

D

ADP_OCP_1

2

G

SSM3K7002FU_SC70-3

S

PR19

PR19 0_0402_5%

0_0402_5%

1 2

@

100K_0402_1%

1

2

3

4

OTP_N_003

PR20 0_0402_5%PR20 0_0402_5%

PU1

VCC

TMSNS1

GND

RHYST1

OT1

TMSNS2

RHYST2

OT2

G718TM1U_SOT23-8

12

8

7

6

5

MAINPWON <42,51>

90W(DIS) : PR205=4.42K PR210=27.4K 65W(UMA) : PR205=402(SD034020080)

For KB930 --> Keep PU201 circuit (Vth = 1.25V)

For KB9012 (Red square) --> Remove PU201 circuit, but keep PR206 PH201, PR205, PR211,PQ201,PR208,PR212

PR13

NTC_V_2

1 2

47K_0402_1%@

47K_0402_1%

+3VLP

PR18

PR21

12 @

@

PR7

12.7K_0402_1%

12

OTP_N_002

ADP_OCP_2

ADP_I<42,50>

PR12

1 2

27.4K_0402_1%

PR6

4.42K_0402_1%

Turbo_V_2

0_0402_5%

PR17

0_0402_5%

PR15

@PR15

@

12

1 2

@PR13

@

0_0402_5%

PR16

1 2

Turbo_V

10K_0402_1%

<42>

PR9

10K_0402_1%

12

PH1

+3VALW

12

PR8

21.5K_0402_1%

12

100K_0402_1%_NCP15WF104F03RC

PR210=5.11K

<42>

NTC_V

PQ2

TP0610K-T1-E3_SOT23-3

B+

B B

SPOK<51>

VSBP_EN<42>

A A

5

@

PR30

100K_0402_1%

@

PR34

0_0402_5%

PR36

0_0402_5%

VL

PR35

1 2

1K_0402_5%

12

1 2

12

4

2

G

PC11

1U_0402_6.3V6K

22K_0402_1%

13

D

2N7002W-T/R7_SOT323-3

S

PR29

1 2

PQ5

12

PC9

PR27

100K_0402_1%

0.22U_0603_25V7K

+VSBP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

13

2

PJ1

PJ1 JUMP_43X39@

JUMP_43X39@

112

3

+VSBP

12

PC10

0.1U_0603_25V7K

2

2010/01/25 2012/07/11

+VSB

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PWR VSBP/OTP

Size Document Number Rev

Custom

C38-G series Chief River Schematic

Date: Sheet of

1

49 58Wednesday, February 15, 2012

0.1

5

PQ6

PQ6 AO4407A_SO8

AO4407A_SO8

VIN

D D

C C

B B

2

PACIN

ACON

ACOFF<42>

12

PR38

61

2N7002KDW-2N_SOT363-6

8 7

5

DTA144EUA_SC70-3

47K_0402_5%

2

13

2

PQ12A

PACIN

PQ16

DTC115EUA_SC70-3

PR56

1 2

10K_0402_5%

4

PQ9

1 3

PQ10

DTC115EUA_SC70-3

PR52

47K_0402_1%

1 2

ACOFF-1

2

P2

1 2 36

12

PC18

PR39

200K_0402_1%

0.1U_0603_25V7K

P2-1

12

PR44

P2-2

34

PQ12B

5

13

2N7002KDW-2N_SOT363-6

PQ7

AO4423_SO8

1 2 3 6

4

150K_0402_1%

PR54

64.9K_0603_1%

1 2

PR49

EC_SMB_DA1<42,48>

EC_SMB_CK1<42,48>

CHGVADJ=(Vcell-4)/0.10627

Vcell

4V

4.2V

4.35V

CC=0.25A~3A

IREF=1.016*Icharge

IREF=0.254V~3.048V

VCHLIM need over 95mV

A A

CHGVADJ

0V

1.882V

3.2935V

ACPRN

PR64

47K_0402_1%

BQ24727VDD

12

PQ19

2

G

8 7

5

VIN

12

390K_0603_1%

12

PC24

0.1U_0603_25V7K

12

PR66

PR66 10K_0402_1%

10K_0402_1%

13

D

S

2N7002KW_SOT323-3

4

P3

@PR50

@

PR50

+3VALW

12

10K_0402_5%

PC12

PC12 5600P_0402_25V7K

5600P_0402_25V7K

+3VALW

@PR51

@

PR51

10K_0402_5%

1 2

ADP_I<42,49>

100P_0603_50V8

PR59

1 2

316K_0402_1%

PR65

10K_0402_1%

1 2

PACIN

12

PR67

12K_0402_1%

ACPRN

PC25

1 2

PR37

0.01_1206_1%

1

2

PR47

@PR47

@

12

39.2K_0402_1%

6

ACDET

7

IOUT

8

SDA

BQ24727RGRR_VQFN20_3P5X3P5

9

SCL

10

12

ILIM

PR61

PR61 100K_0402_1%

100K_0402_1%

ACIN <16,23,42>

B+

4

3

ACP

+3VALW

1 2

12

PR45

PR46

100K_0402_1%

@

PR48

@

1 2

4.7M_0603_1%

5

3

4

ACOK

CMPIN

CMPOUT

PU3

SA000051W00

SRN12BM

SRP

12

11

13

12

PR62

6.8_0603_5%

PC32

12

0.1U_0603_25V7K

12

PC34

0.1U_0603_25V7K

1UH_PCMB061H-1R0MS_7A_20%

ACN

PC20

0.1U_0603_25V7K

PC22

0.1U_0603_25V7K

10K_0603_1%

12

1

2

ACP

GND

15

14

PR63

10_0603_5%

3

SH00000AA00

1 2

PC13

PC21

12

0.1U_0603_25V7K

ACN

21

TP

20

VCC

19

PHASE

18

HIDRV

17

BTST

16

REGN

LODRV

12

@

PC33

0.1U_0603_25V7K

1 2

PL3

10U_0805_25V6K@

BST_CHG

12

PC29

PC29 1U_0603_25V6K

1U_0603_25V6K

1 2

PC14

10U_0805_25V6K@

P2

PR53

10_1206_5%

1 2

BQ24727VCC

1 2

DH_CHG

2.2_0603_5%

PD5

12

RB751V-40_SOD323-2

DL_CHG

PC26

1U_0603_25V6K

LX_CHG

PR60

1 2

BQ24727VDD

1 2

PC15

PC19

4.7U_0805_25V6-K

PC27

0.047U_0603_16V7M

12

2

CHG_B+

PQ8

AO4407A_SO8

1 2 3 6

PL4

PD3

ACOFF-1

1 2

1SS355_SOD323-2

1 2

CHGCHG

4

PD4

PD4 1SS355_SOD323-2

1SS355_SOD323-2

0.01_1206_1%

1

2

SRP

PC16

4.7U_0805_25V6-K

2200P_0402_50V7K

6

578

4

123

6

578

4

123

PR40

47K_0402_1%

1 2

PR41

PR41 10K_0402_1%

10K_0402_1%

1 2

DISCHG_G-1

PQ11

13

DTC115EUA_SC70-3

2

PQ15

AO4466L_SO8

10UH_PCMB063T-100MS_4A_20%

1 2

12

PQ17

PR57

4.7_1206_5%

AO4466L_SO8

4.7_1206_5%

6251_SN

12

PC30

680P_0603_50V7K

DISCHG_G

PC17

1 2

PC16

PR55

1 2

12

PC23

0.1U_0603_25V7K

SRN

1

8 7

5

VIN

PR42

PR42 200K_0402_1%

200K_0402_1%

PQ14

2N7002W-T/R7_SOT323-3

13

D

PACIN

2

G

S

4

3

PC31

BATT+

12

PC28

10U_0805_25V6K

For disable pre-charge circuit.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/25 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR CHARGER

Size Document Number Rev

Custom

C38-G series Chief River Schematic

Date: Sheet of

2

Date: Sheet of

50 58Wednesday, February 15, 2012

1

0.1

5

Note: Use TPS51125 IC can remove RTC refernece LDO Use TPS51427 IC must keep RTC refernece LDO

4

3

2

1

2VREF_8205

D D

PR68

13K_0402_1%

Change PJ2 to PL16 2012/02/14 Wenwen

12

PC38

0.1U_0603_25V7K

+3VALWP

PR81

2.2K_0402_5%

PR82

PR82 0_0402_5%

0_0402_5%

5

RT8205_B+

12

PC39

4.7U_0805_25V6-K

12

PC40

4.7U_0805_25V6-K

4.7U_0805_25V6-K 2200P_0402_50V7K

2200P_0402_50V7K

4.7UH +-20% PCMC063T-4R7MN 5.5A

1

+

PC48

PC48 150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

2

2N7002KDW-2N_SOT363-6

VL

AO4466L_SO8

PL5

1 2

PQ24A

12

@

PQ20

PR76

4.7_1206_5%

PC49

680P_0603_50V7K

61

100K_0402_1%

PR83

40.2K_0402_1%

Typ: 175mA

+3VLP

6

578

12

PC44

4.7U_0805_10V6K

4

123

578

12

2

12

PR80

PC55

PQ22

PQ22 AO4712_SO8

AO4712_SO8

3 6

241

5

12

13

PQ25

4

PQ25 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

4.7U_0603_6.3V6M

4.7U_0805_10V6K

1 2

PC46

0.1U_0603_25V7K

B+

ENTRIP2ENTRIP1

34

PQ24B

PQ24B 2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

PR74

1 2

2.2_0603_5%

PR78

499K_0402_1%

1 2

12

PR79

100K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PL16

HCB2012KF-121T50_0805

B+

1 2

12

PC36

PC37

0.1U_0603_25V7K

C C

B B

+3VALWP +3VALW

PC37

PJ3

2

112

JUMP_43X118@

EC_ON<42,48>

A A

MAINPWON<42,49>

13K_0402_1%

1 2

PR70

20K_0402_1%

1 2

PR72

130K_0402_1%

1 2

25

7

8

BST_3V

9

UG_3V

10

LX_3V

11

LG_3V

12

PC52

1U_0603_10V6K

2VREF_8205

PU4

P PAD

VO2

VREG3

BOOT2

UGATE2

PHASE2

LGATE2

2010/01/25 2012/07/11

3

12

PC35

1U_0603_10V6K

ENTRIP2

6

5

FB2

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

13

RT8205_B+

1

2

3

4

FB1

REF

TONSEL

ENTRIP1

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

VIN16GND

17

15

12

PC53

12

PC54

0.1U_0603_25V7K

Compal Secret Data

PR69

30K_0402_1%

1 2

PR71

19.6K_0402_1%

1 2

PR73

66.5K_0402_1%

ENTRIP1

1 2

24

VO1

23

22

21

20

19

RT8205EGQW_WQFN24_4X4

VL

Typ: 175mA

4.7U_0805_10V6K

Deciphered Date

BST_5V

UG_5V

LX_5V

LG_5V

RT8205_B+

12

PC42

PC41

PC45

4.7U_0805_25V6-K

SPOK <49>

PR75

2.2_0603_5%

1 2

+3.3VALWP OCP(min)=5.81A +5VALWP OCP(min)=8.44A

2200P_0402_50V7K

PC47

0.1U_0603_25V7K

1 2

2

12

PC43

0.1U_0603_25V7K

Title

Size Document Number Rev

Custom

Date: Sheet of

678

PQ21

TPC8065-H_SO8

35241

PL6

12

PR77

12

PC50

PL6

1 2

4.7_1206_5%

680P_0603_50V7K

2

1

+

PC51

PC51 150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

2

PJ4

112

JUMP_43X118@

4.7UH +-20% PCMC063T-4R7MN 5.5A

786

5

PQ23TPC8A03-H_SO8 PQ23TPC8A03-H_SO8

4

123

+5VALWP +5VALW

Compal Electronics, Inc.

PWR 3VALW/5VALW

C38-G series Chief River Schematic

51 58Wednesday, February 15, 2012

1

+5VALWP

0.1

A

STATE S3 S5 1.5VP VTT_REFP 0.75VSP

S0

Hi Hi

S3

S4/S5

1 1

HiLo

Lo Lo

On

Off

On

Off (Hi-Z)

Off Off

Note: S3 - sleep ; S5 - power off

+0.75VSP

12

PR89

0_0402_5%

1 2

+VTT_REFP

2 2

SUSP#<10,42,47,54>

SYSON<42,47>

12

PC66

1U_0402_16V6K

2N7002KW_SOT323-3

SUSP<6,10,47>

3 3

Change PJ10 to PL17 2012/02/14 Wenwen

PC59

10U_0805_25V6K

PQ28

2

@

G

+1.5VP

12

PC60

10U_0805_25V6K

PC63

0.033U_0402_16V7K

PR90

0_0402_5%

1 2

0.1U_0402_16V7K

13

D

S

21

1

2

3

4

5

PC67

@PC67

@

5.76K_0402_1%

B

+1.5VP

20

PU5

VTT

PAD

VTTGND

VTTSNS

GND

RT8207MZQW_WQFN20_3X3

VTTREF

VDDQ

FB

6

12

FB=0.75V

12

To GND = 1.5V To VDD = 1.8V

PR93

PJ6

@PJ6

@ 1

JUMP_43X39

1

2

BST_1.5V BST_1.5V-1

16

17

18

19

BOOT

PHASE

UGATE

VLDOIN

S3

7

S3_1.5V

S5_1.5V

5.9K_0402_1%

8

S5

PR92

TON

9

887K_0402_1%

12

LGATE

PGOOD

10

LX_1.5V

PR84

2.2_0603_5%

1 2

PGND

CS

VDDP

VDD

PR91

UG_1.5V

15

14

PR86

11K_0402_1%

13

12

11

+3VALW

12

PR88

@

1.5V_B+

12

PC64

1U_0603_10V6K

PGOOD_1.5V

10K_0402_5%

PC58

0.1U_0603_25V7K

1 2

LG_1.5V

12

1U_0603_10V6K

PR87

5.1_0603_5%

PC65

5

4

5

4

12

C

PQ26

TPCA8065-H_PPAK56-8-5

123

PQ27

123

TPCA8057-H_PPAK56-8-5

+5VALW

1UH_PCMC063T-1R0MN_11A_20%

12

PR85

@PR85

@

4.7_1206_5%

12

PC62

@PC62

@

680P_0402_50V7K

1.5V_B+

12

PC56

1 2

D

PL18

HCB1608KF-121T30_0603

1 2

PC57

4.7U_0805_25V6-K

Change PJ5 to PL18 2012/02/14 Wenwen

12

4.7U_0805_25V6-K

PL7

B+

+1.5VP

1

+

PC61

PC61 330U_D2_2.5VY_R15M

330U_D2_2.5VY_R15M

2

PJ7

2

112

JUMP_43X118@

+1.5VP

JUMP_43X118@

PJ8

2

112

JUMP_43X118@

PJ9

2

112

JUMP_43X118@

+1.5V

+0.75VS+0.75VSP

PL17

HCB1608KF-121T30_0603

+3VALW

1 2

SUSP#<10,42,47,54>

4 4

A

1.8VSP_VIN

12

PC68

PC68 22U_0805_6.3VAM

22U_0805_6.3VAM

PR96

1 2

0_0402_5%

EN_1.8VSP

PR97

PR97 1M_0402_5%

1M_0402_5%

1 2

PU6

4

10

PVIN

PG

9

PVIN

8

SVIN

5

EN

TP

NC

7

11

SY8033BDBC_DFN10_3X3

@PC73

@

12

PC73

0.1U_0402_10V7K

SY8033BDBC_DFN10_3X3

1.8VSP_LX

2

LX

3

LX

6

FB

NC

1

FB=0.6Volt

B

PL8

1UH_PH041H-1R0MS_3.8A_20%

1 2

PR95

PR98

12

PC69

12

68P_0402_50V8J

12

2010/01/25 2012/07/11

12

PC70

22U_0805_6.3VAM

Compal Secret Data

12

20K_0402_1%

PR94

4.7_1206_5%

12

PC72

680P_0603_50V7K

1.8VSP_FB

10K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.8VSP

PC71

22U_0805_6.3VAM

Deciphered Date

C

PJ11

2

112

JUMP_43X118@

+1.8VS+1.8VSP

1.8VSP max current=4A

Compal Electronics, Inc.

Title

PWR 1.5VP/1.8VSP

Size Document Number Rev

Custom

C38-G series Chief River Schematic

Date: Sheet of

D

52 58Wednesday, February 15, 2012

0.1

5

4

3

2

1

VID [0] VID[1] VCCSA Vout

+3VS

D D

C C

Change PJ12 to PL20 2012/02/14 Wenwen

PL20

+3VALW

B B

PL20

1 2

HCB1608KF-121T30_0603

+VCCSA_PWR_SRC

Add PC610 PC611 for VID issue on ULV 2012/01/15 Wenwen

1

PC85

2

2200P_0402_50V7K

2

PC86

1 2

0.1U_0603_25V7K

2

PC87

PC88

1

10U_0805_6.3V6M

+VCCSA_PWR_SRC

PC75

2.2U_0603_10V7K

1 2

0.22U_0402_10V6K

SA_PGOOD<42>

PC90

12

3300P_0402_50V7K

+5VALW

PC91

PR102

10_0402_1%

PU7

19

PGND

20

PGND

21

PGND

22

VIN

23

VIN

24

VIN

12

PR100

100K_0402_5%

PC74

1 2

12

18

17

V5FILT

V5DRV

TPS51463RGER_QFN24_4X4

GND

VREF

1

2

12

PR108

5.1K_0402_1%

12

+VCCSA_PWRGD

+VCCSA_VID1

1U_0603_10V6K

16

15

VID1

PGOOD

COMP

SLEW

3

4

1 2

PC92

0.01U_0402_25V7K

+VCCSA_VID0

14

VID0

VOUT

5

PR99

1K_0402_5%

PC610

0.033U_0402_16V7K

1 2

PR101

1K_0402_5%

@

PC611

0.033U_0402_16V7K

1 2

+VCCSA_EN

13

EN

12

BST

11

SW

10

SW

9

SW

8

SW

7

SW

25

TP

MODE

6

12

+VCCSA_BT

+VCCSA_PHASE

PR106

@ PR106

@

33K_0402_5%

H_VCCSA_VID1 <10>

H_VCCSA_VID0 <10>

PR103

0_0402_5%

1 2

PR104

PR104 0_0603_5%

0_0603_5%

+VCCSA_BT_1

1 2

12

PR105

4.7_1206_5%

12

PC89

1000P_0603_50V7K

12

+V1.05S_VCCP_PWRGOOD <54>

PC76

0.22U_0603_16V7K

1 2

12

PR109

0_0402_5%@

0 0 0.9V 0 1 0.85V 1 0 0.775V 1 1 0.75V

output voltage adjustable network

The 1k PD on the VCCSA VIDs are empty. These should be stuffed to ensure that VCCSA VID is 00 prior to VCCIO stability.

PL9

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

1 2

@

PC77

1 2

22U_0805_6.3V6M

12

PC80

1 2

PC79

0.1U_0402_10V7K

PR107

100_0402_5%

PR110

0_0402_5%

PC80

1 2

22U_0805_6.3V6M

12

PC78

22U_0805_6.3V6M

PC81

22U_0805_6.3V6M

1 2

@

@ 12

PC83

PC82

22U_0805_6.3V6M

2200P_0402_50V7K

VCCSA_SENSE <10>

+VCCSAP

@

PC84

1 2

22U_0805_6.3V6M

PJ13

+VCC_SAP TDC 4.2A Peak Current 6A OCP current 7.2A

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/25 2012/07/11

Compal Secret Data

Deciphered Date

2

+VCCSAP

Title

Size Document Number Rev

C

Date: Sheet

PJ13

2

112

JUMP_43X118@

+VCCSA

Compal Electronics, Inc.

PWR VCCSAP

C38-G series Chief River Schematic

1

53 58Wednesday, February 15, 2012

of

0.1

5

D D

PR111

60.4K_0402_1%

+V1.05S_VCCP_PWRGOOD<53>

PC99

0.1U_0402_25V6

60.4K_0402_1%

1 2

10.7K_0402_1%

12

PR122

1 2

10_0402_1%

12

PR112

10K_0402_1%@

1 2

PR117

1 2

PC100

1 2

12K_0402_1%

1 2

PC100

0.01UF_0402_25V7K

PR121

1 2

10_0402_5%

@

PC105

PC105 1000P_0402_50V7K

1000P_0402_50V7K

PR118

SUSP#<10,42,47,52>

C C

PR120

VSSIO_SENSE_L<9>

B B

1 2

0_0402_5%

VCCIO_SENSE<9>

PC93

.1U_0402_16V7K

PR115

0_0402_5%

1 2

0.01UF_0402_25V7K

1 2

4

17

PU8

1

VREF

2

REFIN

TPS51219RTER_QFN16_3X3

3

GSNS

4

VSNS

PC103

1 2

PR124

1 2

10_0402_1%

PC106

PC106 1000P_0402_50V7K

1000P_0402_50V7K

+3VS

PR113

100K_0402_1%

PR114

1 2

16

15EN14

PAD

COMP5TRIP6GND

MODE

PGOOD

12

75K_0402_1%

PR123

100K_0402_1%

7

2.2_0603_5%

BST_1.05VS_VCCP

1 2

13

BST

12

SW

11

DH

10

DL

9

V5

PGND

8

PR116

3

0.1U_0603_25V7K

LX_1.05VS_VCCP

DH_1.05VS_VCCP

PC96

1 2

DL_1.05VS_VCCP

+5VALW

12

PC104

1U_0603_10V6K

PQ29

PQ30

2

1

+1.05VS_VTT OCP(min)=20.75A

PL19

HCB1608KF-121T30_0603

12

PC98

4.7U_0805_25V6-K

HCB1608KF-121T30_0603

12

Change PJ14 to PL19

4.7U_0805_25V6-K

2012/02/14 Wenwen

1

+

2

PC101

330U_X_2VM_R9M

2

12

+1.05VS_VTTP

PJ15

112

JUMP_43X118@

JUMP_43X118@ PJ16

PJ16

112

JUMP_43X118@

B+

+1.05VS_VTT+1.05VS_VTTP

1.05VS_B+

12

PC97

PC94

0.1U_0402_25V6

4.7_1206_5%

1000P_0603_50V7K

PC97

2200P_0402_50V7K

PL10

1 2

PC95

5

TPCA8065-H_PPAK56-8-5

4

123

S COIL 1UH +-20% PCMB063T-1R0MS

5

4

TPCA8057-H_PPAK56-8-5

12

PR119

12

123

PC102

A A

Security Classification

2010/01/25 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/25 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR 1.05VS_VTT

Size Document Number Rev

Custom

C38-G series Chief River Schematic

Date: Sheet of

2

Date: Sheet of

54 58Wednesday, February 15, 2012

1

0.1

A

PR125

@

0_0402_5%

NVDD_PWR_EN<18>

DGPU_PWR_EN<15,18,30>

1 1

OPT@

3211_PWRGD

PR131

DGPU_PWROK<19,30>

PR132

@PR132

@

1 2

32.4K_0402_1%

PC115

32.4K_0402_1%

PC116

1 2

220P_0402_50V7K

1 2

PR136

OPT@ PR136

OPT@

1K_0402_1%

OPT@PC116

OPT@

PC120

1 2

470P_0402_50V8J

OPT@

1 2

1000P_0402_50V7K

2 2

0_0402_5%

OPT@PC120

OPT@

3211_COMP-1

12

PC118

OPT@ PC118

OPT@

47P_0402_50V8J

PR137

20K_0402_1%

PR138

3.4K_0402_1%

Avoid high dV/dt

PR144

PR142

0_0402_5%

3 3

+VGA_CORE

12

OPT@

12

OPT@

4 4

OPT@

12

PR144 0_0402_5%

0_0402_5%

1 2

OPT@

<27>

VGA_VSSSENSE

VGA_VCCSENSE

Under VGA Chip

12

PC130

4.7U_0603_6.3V6M

OPT@

12

PC145

4.7U_0603_6.3V6M

OPT@

12

PC155

0.1U_0402_10V7K

OPT@

12

PC133

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

0.1U_0402_10V7K

OPT@

PC133

PC132

4.7U_0603_6.3V6M

OPT@

12

PC150

PC151

@

4.7U_0603_6.3V6M

12

PC157

PC158

0.1U_0402_10V7K

OPT@

A

PC131

PC148

PC156

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

0.1U_0402_10V7K

<26>

12

PC134

4.7U_0603_6.3V6M

OPT@

12

PC153

@

4.7U_0603_6.3V6M

12

PC159

@

0.1U_0402_10V7K

12

PC135

PC152

@

PC160

@

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

0.1U_0402_10V7K

PC137

PC136

4.7U_0603_6.3V6M

OPT@

12

PC154

@

4.7U_0603_6.3V6M

12

PC161

PC162

@

0.1U_0402_10V7K

12

PR126

0_0402_5%OPT@

12

PC107

100P_0402_50V8J

+3VS

OPT@

12

OPT@PR130

OPT@

PR130

10K_0402_1%

1

PWRGD

2

IMON

3

CLKEN#

4

FBRTN

3211_FB

5

FB

3211_COMP

6

COMP

3211_VCC

7

3211_ILIM

12

3211_CSCOMP

OPT@ PR147

OPT@

8

3211_IREF

PR139

80.6K_0402_1%

1 2

OPT@ PR139

OPT@

PR147

1K_0402_1%

1000P_0402_50V7K

GPU

ILIM

237K_0402_1%~N

12

OPT@ PC124

OPT@

12

OPT@PR137

OPT@

OPT@PR138

OPT@

+VGA_B+

Connect to input caps

4.7U_0603_6.3V6M

0.1U_0402_10V7K

GPU_VID1

GPU_VID0

PR127 0_0402_5%OPT@ PR127 0_0402_5%OPT@

1 2

VID0

VID1

3211_EN

32

EN

VID031VID130VID229VID328VID427VID526VID6

ADP3211AMNR2G_QFN32_5X5

OPT@ PU9

OPT@

IREF9RPM10RT11RAMP12LLINE13CSREF14CSFB15CSCOMP

3211_RT

3211_RPM

12

OPT@PR141

OPT@

OPT@PR140

OPT@

PR141

300K_0402_1%

PR140

3211_RAMP-1

PC124

VID2

PU9

3211_RAMP

12

GPU_VID2

OPT@PR143

OPT@

PR143

<23>

GPU_VID3

VID3

422K_0402_1%

12

3211_CSCOMP

PR150 0_0402_5%

0_0402_5%

B

<23>

GPU_VID4

GPU_VID5

1 2

VID4

VID6

VID5

25

16

3211_CSFB

12

PC125 1000P_0402_50V7K

1000P_0402_50V7K

PR149 0_0402_5%

0_0402_5%

OPT@PR150

OPT@

B

<23>

+5VS

PR129

OPT@PR129

PR128 0_0402_5%OPT@ PR128 0_0402_5%OPT@

VCC

BST

DRVH

SW

PVCC

DRVL

PGND

AGND

3211_CSCOMP

1

@PC122

@

2

PC122

OPT@PC125

OPT@

@PR149

@

12

OPT@

10_0603_1%

1 2

1

PC113

OPT@PC113

OPT@

1U_0603_16V6K

2

3211_VCC

PR133

OPT@ PR133

OPT@

24

23

22

21

20

19

18

17

33

560P_0402_50V7K

Shortest the net trace

0_0603_5%

GPU_BOOST

3211_DRVH

3211_SW

3211_DRVL

Add PC502 for NV GPU Spec request 2012/02/03 Wenwen

1

2

1 2

OPT@PC123

OPT@

PC123

1000P_0402_50V7K

GPU_BOOST-1

OPT@ PC117

OPT@

Change PQ31 from TPCA8065 TO MDU1516 Change PQ32 from TPCA8057-H to MDU1511 2012/02/06 Wenwen

12

5

PQ31

OPT@

PC114

OPT@ PC114

OPT@

0.22U_0603_25V7K

1 2

PR134

0_0603_5%

12

PC117

2.2U_0603_10V6K

12

220K_0402_1%

220K_0402_1% PR145

OPT@PR145

OPT@

PR146 143K_0603_1%

143K_0603_1%

OPT@

4

+5VS

OPT@PR146

OPT@

5

PQ32

OPT@

4

12

+VGA_CORE

1

PC138

2

OPT@ PC138

OPT@

1

PC502

2

OPT@ PC502

OPT@

47U_0805_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

OPT@

123

MDU1516URH_POWERDFN56-8-5

123

MDU1511RH_POWERDFN56-8-5

Near VGA Core

1

+

PC126

PC127

2

330U_D2_2V_Y

OPT@

1

PC139

PC140

2

OPT@ PC139

OPT@

OPT@ PC140

OPT@

22U_0805_6.3V6M

12

PC143

PC144

OPT@ PC143

OPT@

OPT@ PC144

OPT@

4.7U_0603_6.3V6M

C

+VGA_B+

12

PC109

PC108

OPT@ PC108

OPT@

PQ41

PQ42

OPT@

1

+

2

22U_0805_6.3V6M

4.7U_0603_6.3V6M

4700P_0402_25V7K

4

PC128

OPT@

1

2

@

12

PC110

4.7U_0805_25V6M

OPT@ PC109

OPT@

OPT@ PC110

OPT@

5

123

MDU1516URH_POWERDFN56-8-5

5

123

MDU1511RH_POWERDFN56-8-5

330U_D2_2V_Y

1

PC141

PC142

2

@

22U_0805_6.3V6M

12

PC147

PC146

@

OPT@ PC146

OPT@

4.7U_0603_6.3V6M

2010/01/25 2012/07/11

C

12

PC111

4.7U_0805_25V6M

4.7U_0805_25V6M 2200P_0402_50V7K

2200P_0402_50V7K

OPT@

12

@

PR135

4.7_1206_5%

12

@

PC121

680P_0603_50V7K

PC149

@

4.7U_0603_6.3V6M

Compal Secret Data

12

Deciphered Date

HCB2012KF-121T50_0805

PC112

0.1U_0402_25V6

OPT@

Add PQ41,PQ42 for heavy load (EDP Continuous current) 2012/02/10 Wenwen

Change PL12 from SH00000IK00 TO SH00000IN00 2012/02/07 Wenwen

PL12

0.36UH_FDU1040J-H-R36M=P3_33A_20%

1

2

PL11

OPT@ PL11

OPT@

1 2

4

3

VL

@ PC129

@

0.1U_0603_25V7K

PWR_GPS_DOWN#<42>

PC129

1

+

PC119

2

OPT@

12

D

B+

+VGA_CORE

@330U_D2_2V_Y

1 2

@

PR148

19.6K_0402_1%

@

PU10

1

VCC

TMSNS1

2

GND

RHYST1

3

OT1

TMSNS2

4

RHYST2

OT2

G718TM1U_SOT23-8

Compal Electronics, Inc.

Title

PWR VGA_CORE

Size Document Number Rev

C

C38-G series Chief River Schematic

Date: Sheet of

8

7

6

5

D

1 2

@PR153

@

15.8K_0402_1%

100K_0402_1%_NCP15WF104F03RC

PR151

@

1 2

PR153

8.66K_0402_1%

1 2

PH2

@PH2

@

VL

12

PR152

@

3.48K_0402_1%

PH3

@

1 2

100K_0402_1%_NCP15WF104F03RC

0.1

55 58Wednesday, February 15, 2012

0.1

5

D D

PH4

10K_0402_1%_ERTJ0EG103FA

VSUMG-

12

1 2

PC172

PR163

0.1U_0402_16V7K

2.61K_0402_1%

VSUMG+

C C

PR170

27.4K_0402_1%

PR172

3.83K_0402_1%

1 2

VR_SVID_CLK<9>

VR_SVID_ALRT#<9>

VR_SVID_DAT<9>

VR_HOT#<42>

VR_ON<42>

PC184

@PC184

@

47P_0402_50V8J

+1.05VS_VTT

B B

A A

470P_0402_50V7K

12

PH5

12

470K_0402_5%_ TSM0B474J4702RE

1 2

PR175 0_0402_5%

1 2

PR176 0_0402_5%

470P_0402_50V7K

1 2

PR178 0_0402_5%

12

PC191

12

PC197

12

1.91K_0402_1%

1 2

PR177 0_0402_5%

2K_0402_1%

499_0402_1%

PR196

+CPU_CORE

VCCSENSE<9>

VSSSENSE<9>

PR187

PR192

12

+5VS

12

@

1 2

12

137K_0402_1%

PR179

PR180

0_0402_5%

1 2

PC186

@PC186

@

0.1U_0402_16V7K

PR197

PR199

@PR199

@

10_0402_1%

PR200

@PR200

@

10_0402_1%

PR161

1 2

11K_0402_1%

1 2

PR173

0_0402_5%

1 2

PR181

@

1 2

75_0402_5%

130_0402_1%

PR188

42.2K_0402_1%

PC195

68P_0402_50V8J

12

PC199

150P_0402_50V8J

12

PC178

PC179

1 2

@

0.1U_0603_25V7K

0.022U_0402_16V7K

\

PR182

12

54.9_0402_1%

PH6

12

4

+VGFX_CORE

1 2

470K_0402_5%_ TSM0B474J4702 RE

330P_0402_50V7K

0.01UF_0402_25V7K

PC175

1000P_0402_25V8J

ISEN2G

NTCG SCLK

ALERT#

SDA

12

PR183

27.4K_0402_1%

12

PR184

3.83K_0402_1%

10P_0402_50V8J

PC201

PC202

@

10_0402_1%

422_0402_1%

1 2

1 2 3 4 5 6 7 8 9

10

41

+5VS

1 2

PC192

@PC192

@

12

VCC_AXG_SENSE<10> VSS_AXG_SENSE<10>

PR155

PR157

PU11

ISUMPG ISEN1G ISEN2G NTCG SCLK ALERT# SDA VR_HOT# VR_ON NTC

TP

PR185

PR185 0_0402_5%

0_0402_5%

12

3

12

PR164 1.91K_0402_1% PR164 1.91K_0402_1%

PWMG2

37

36

35

COMPG

PGOODG

ISUMN

15

12

68P_0402_50V8J

137K_0402_1%

PR158

12

PR162

154K_0402_1%

330P_0402_50V7K

PR165

@PR165

@

0_0402_5%

1 2

34

31

33

32

PWM2G

BOOT1G

LGATE1G

PHASE1G

UGATE1G

BOOT2

UGATE2

PHASE2 LGATE2

VCCP

VDD

PWM3 LGATE1 PHASE1

UGATE1

COMP

PGOOD

RTN16ISEN1

BOOT1

ISL95836HRTZ-T_TQFN40_5X5~D

18

19

20

PR186 1.91K_0402_1%

150P_0402_50V8J

12

1 2

PR154 10_0402_1%@ PR154 10_0402_1%@

12

+3VS

39

38

40

FBG

RTNG

ISUMNG

ISEN212FB17ISUMP14ISEN3/FB2

11

13

PC169

12

PC171

PR160

2K_0402_1%

PC180

+5VS

LGATE1G

PHASE1G

UGATE1G

BOOT1G

30 29 28 27 26 25 24 23 22 21

12

PR193

422_0402_1%

1000P_0402_50V7K

0.01UF_0402_25V7K

PC170

470P_0402_50V7K

12

2.61K_0402_1%

12

+3VS

12

PC194

0.1U_0603_16V7K

PC163

PC168

12

499_0402_1%

12

PR159

PR174

0_0603_5%

LGATE1

PHASE1

UGATE1

BOOT1

VGATE <16>

PC196

1 2

1000P_0402_25V8J

PR156

+5VS

12

1 2

12

PHASE1G

BOOT1G

12

PR171

1_0603_5%

12

PC185

1U_0603_10V6K

VSUM+

12

PR189

12

2.61K_0402_1%

PH7

PR194 11K_0402_1% PR194 11K_0402_1%

10K_0402_1%_ERTJ0EG103FA

VSUM-

Close Phase 1 choke

12

PC200

0.1U_0402_16V7K

UGATE1G

12

PC183

1U_0603_10V6K

PC181

0.22U_0603_16V7K

1 2 12

PR169

2.2_0603_5%

UGATE1

PHASE1

BOOT1

PQ33

LGATE1G

PR190

2.2_0603_5%

4

PQ34

4

12

1 2

PC193

0.22U_0603_16V7K

Rds(on) typ=2.7m Ω max=3.3m Ω

5

PQ35

123

4

2

CPU_B+

MDU1516URH_POWERDFN56-8-5

Rds(on) typ=2.7m Ω max=3.3m Ω

MDU1511RH_POWERDFN56-8-5

CPU_B+

5

123

PQ38

4

LGATE1

1

PL13

HCB4532KF-800T90_1812

B+

1

+

2

12

PC176

PC174

PC176

PC173

@

10U_0805_25V6K

1

+

PC164

PC165

2

33U_D2_25VM_R60

15U_D2_25VM_R90

12

Change PL14 PL15 from SH00000HK00 to SH00000KK00 2012/02/07 Wenwen

PC177

@

10U_0805_25V6K

12

PR166

4.7_1206_5%

12

PC182

1 2

680P_0402_50V7K

VSUMG+

1 2

1

+

PC167

PC166

2

15U_D2_25VM_R90

33U_D2_25VM_R60

@

PL14

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

1

4

3

2

12

PR168

PR167

3.65K_0603_1%

PR168

1_0402_5%

VSUMG-

CPU_B+

+VGFX_CORE

For ULV 17W 1+1 CPU_CORE LL= -2.9mΩ, GFX_CORE LL= -3.9mΩ, OVP=0.9*115%=1.035V Iocp=40A

5

PQ36

4

MDU1516URH_POWERDFN56-8-5

123

5

PQ37

4

123

MDU1511RH_POWERDFN56-8-5

LGATE1

12

PC187

PC188

10U_0805_25V6K

MDU1516URH_POWERDFN56-8-5

5

12

PR191

12

PC198

123

680P_0402_50V7K

MDU1511RH_POWERDFN56-8-5UMA@

12

PC190

PC189

10U_0805_25V6K

PL15

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

1

4

3

2

4.7_1206_5%

12

PR198

3.65K_0603_1%

1 2

VSUM+

VSUM-

+CPU_CORE

PR195

PR195 1_0402_5%

1_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/25 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR CPU_CORE

Size Document Number Rev

Custom

C38-G series Chief River Schematic

Date: Sheet of

Date: Sheet

2

Date: Sheet

56 58Wednesday, February 15, 2012

1

0.1

of

5

+VGFX_CORE

12

D D

PC211

PC212

1U_0402_6.3V6K

12

PC230

PC231

10U_0603_6.3V6M

12

PC213

PC214

1U_0402_6.3V6K

12

PC232

PC233

10U_0603_6.3V6M

4

12

PC215

1U_0402_6.3V6K

12

PC234

10U_0603_6.3V6M

12

PC216

1U_0402_6.3V6K

12

PC217

PC218

1U_0402_6.3V6K

12

PC220

PC219

PC220

1U_0402_6.3V6K

12

PC235

10U_0603_6.3V6M

3

+CPU_CORE

PC203

2.2U_0402_6.3V6M

PC203

2.2U_0402_6.3V6M

12

2

PC204

2.2U_0402_6.3V6M

PC204

2.2U_0402_6.3V6M

PC205

2.2U_0402_6.3V6M

PC205

12

2.2U_0402_6.3V6M

12

2.2U_0402_6.3V6M

PC206

2.2U_0402_6.3V6M

PC206

2.2U_0402_6.3V6M

12

PC208

2.2U_0402_6.3V6M

PC208

2.2U_0402_6.3V6M

PC207

12

2.2U_0402_6.3V6M

12

1

PC209

PC210

2.2U_0402_6.3V6M

PC210

2.2U_0402_6.3V6M

12

PC229

For BOT side

PC221

1U_0402_6.3V6K

+CPU_CORE

PC222

2.2U_0402_6.3V6M

PC222

2.2U_0402_6.3V6M

12

PC223

2.2U_0402_6.3V6M

PC223

2.2U_0402_6.3V6M

12

PC224

2.2U_0402_6.3V6M

PC224

2.2U_0402_6.3V6M

12

2.2U_0402_6.3V6M

PC225

2.2U_0402_6.3V6M

PC225

2.2U_0402_6.3V6M

12

PC227

2.2U_0402_6.3V6M

PC227

2.2U_0402_6.3V6M

PC228

2.2U_0402_6.3V6M

PC228

PC226

12

2.2U_0402_6.3V6M

12

2.2U_0402_6.3V6M

12

22U_0805_6.3V6M

1

2

1

+

PC271

PC271 330U_D2_2V_Y

330U_D2_2V_Y

2

PC251

22U_0805_6.3V6M

PC251

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

1

2

1

+

PC272

PC272 330U_D2_2V_Y

330U_D2_2V_Y

2

1

+

PC243

PC244

C C

12

PC258

1U_0402_6.3V6K

B B

12

PC274

1U_0402_6.3V6K

2

12

PC259

1U_0402_6.3V6K

12

PC275

1U_0402_6.3V6K

PC244

2

330U_D2_2V_Y

12

PC260

PC261

1U_0402_6.3V6K

12

PC276

PC277

1U_0402_6.3V6K

12

PC263

PC262

1U_0402_6.3V6K

12

PC278

PC279

1U_0402_6.3V6K

1

PC246

PC245

2

22U_0805_6.3V6M

12

PC265

PC264

1U_0402_6.3V6K

12

1U_0402_6.3V6K

12

PC292

1U_0402_6.3V6K

12

PC281

PC280

1U_0402_6.3V6K

12

PC293

10U_0603_6.3V6M

1

PC248

PC247

2

22U_0805_6.3V6M

12

PC266

PC267

1U_0402_6.3V6K

12

PC283

PC282

1U_0402_6.3V6K

12

PC288

PC287

10U_0603_6.3V6M

12

PC295

PC294

10U_0603_6.3V6M

1

PC250

PC249

2

22U_0805_6.3V6M

+1.05VS_VTT

12

PC268

1U_0402_6.3V6K

12

PC284

1U_0402_6.3V6K

12

PC289

10U_0603_6.3V6M

12

PC296

10U_0603_6.3V6M

12

PC269

PC270

1U_0402_6.3V6K

12

PC285

PC286

1U_0402_6.3V6K

12

PC291

PC290

10U_0603_6.3V6M

1

+

PC297

2

330U_D2_2V_Y

+CPU_CORE

PC238

22U_0805_6.3V6M

PC238

22U_0805_6.3V6M

1

2

PC252

22U_0805_6.3V6M

1

2

PC253

1

+

PC239

22U_0805_6.3V6M

PC239

22U_0805_6.3V6M

1

2

PC254

22U_0805_6.3V6M

PC254

22U_0805_6.3V6M

1

2

PC273

PC273 330U_D2_2V_Y

330U_D2_2V_Y

PC240

22U_0805_6.3V6M

PC240

22U_0805_6.3V6M

1

2

PC255

22U_0805_6.3V6M

PC255

22U_0805_6.3V6M

1

2

PC237

22U_0805_6.3V6M

PC237

22U_0805_6.3V6M

PC236

22U_0805_6.3V6M

PC236

@

PC242

22U_0805_6.3V6M@PC242

22U_0805_6.3V6M

PC241

22U_0805_6.3V6M

PC241

22U_0805_6.3V6M

1

2

For TOP side

@

PC256

22U_0805_6.3V6M

PC256

22U_0805_6.3V6M

PC257

22U_0805_6.3V6M@PC257

22U_0805_6.3V6M

1

2

Security Classification

A A

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/25 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR CPU_CORE CAP

Size Document Number Rev

Custom

C38-G series Chief River Schematic

Date: Sheet of

2

57 58Wednesday, February 15, 2012

1

0.1

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

for PWR

Reason for change PG# Modify List Date PhaseItem

1

D D

Add battery reset circuit P47 add PJ401 PQ39 PR606 PC601 PC609 PR213 PR214 PQ40 PD303 2012/01/15

2

Delete battery detector circuit

3

4

5

6

7

8

delete PR24,PR28,PR26,PC8,PU2,PR31,PR33,PR25,PR22,PR32,PR23,PQ3,PQ4;

P48

delete PR43,PQ13; PR58,PQ18

2012/01/15For VCCSA VID issue on Intel ULV P52 add PC601 PC611

2012/01/31

C C

9

10

11

12

13

14

B B

15

16

17

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2010/01/25 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR PIR

Size Document Number Rev

Custom

C38-G series Chief River Schematic

Date: Sheet of

2

Date: Sheet of

58 58Wednesday, February 15, 2012

1

0.1

Compal LA-8971P VITU5, IdeaPad U510 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual