Compal LA-8711P PAGANI, ENVY M6 Schematic

A

1 1

B

C

D

E

2 2

Compal Confidential

PAGANI M/B Schematics Document

Intel Ivy Bridge Processor with DDRIII + Panther Point

Date : 2011/11/22

3 3

Version 0.1

4 4

Security Classification

Security Classification

Security Classification

Issued Date

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Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/29 2011/06/29

2011/06/29 2011/06/29

2011/06/29 2011/06/29

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

LA-8711

LA-8711

LA-8711

E

0.1

0.1

1 57Sunday, November 27, 2011

1 57Sunday, November 27, 2011

1 57Sunday, November 27, 2011

0.1

A

Compal Confidential

Model Name : Zonda

B

C

D

E

1 1

File Name : LA8711P

2011/11/22

64Mx16
128Mx16

VRAMx8pcs

DDRIII

page27 ~ 29

128Bit

AMD

Chelsea Pro

25W

page21 ~ 26

PEG 2.0 x16

Intel

IVY Bridge

SV Processor

rPGA 988B

31mm*24mm

page4 ~ 10

DMI x4FDI x8

Accelerometer

page42

HP3DC2

HDMI Conn.

page29 page32

FAN conn.

2 2

page37

X1

X1

LVDS Conn.

PCI-Express x 2 (PCIE2.0 5GT/s)

SATAx3

X1

GEN1 1.5Gb/S GEN3 6Gb/S

LVDS(1Ch)

HDMI

X1

GEN3 6Gb/S

100MHz

100MHz

X1

100MHz

2.7GT/s

Intel

Panther Point

PCH

989pin BGA

25mm*25mm

100MHz

5GT/s

page13 ~ 20

DDR3 1333/1600MHz 1.5V
DDR3L 1333MHz 1.35V

Dual Channel

USB3.0 x2

3.0 port1,2

X2

USB 3.0 x3

USB 2.0 x4

HD Audio

SPI

page35

HD webcam

DDR3-SO-DIMM X 2

BANK 0, 1, 2, 3

page11 ~ 12

HDD LED & PWR LED

USB3.0 x1

3.0 port3

X1

X1

port8

D-MIC(daul)

ModuleModule

Daughter board

USB2.0 x1
USB charger

X1

X1

port3

Finger print

port9

HDA Codec

port2

Card Reader
/LAN controller
RTL8411

3 3

RJ45

page34 page34

SD socket

WLAN&BT
(mini card)

port 10

JMINI1

page31

X1

port2

SATA ODD

page33 page33 page33page34

port1

m-SATA
(mini card)

JMINI2

port0port1

SATA HDD

USB 2.0 x1

LPC BUS

33MHz

BIOS SPI ROM,
8MB

page33

SPK conn HP Amp

IDT 92HD91

page41

page38

Sub Woofer Amp
HPA2011

page40

Sub Woofer
conn

page35

page39

HPA00929

HP&MIC
Combo jack

page41

ENE KB932

page36

CRT

page30

SM bus

PS2 SPI

LED

RTC CKT.

DC/DC interface CKT.

4 4

ODD connector board

A

page37

page14

page43

Daughter board

Lid switch FAN/LED

Power On/Off CKT.

& PWR BTN LED

B

Daughter board

Touch Pad

TP BTN on daughter board

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Int.KBD

2011/06/29 2011/06/29

2011/06/29 2011/06/29

2011/06/29 2011/06/29

EC ROM,
256kB

page36 page37page37page37

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

LA-8711

LA-8711

LA-8711

E

2 57Sunday, November 27, 2011

2 57Sunday, November 27, 2011

2 57Sunday, November 27, 2011

0.1

0.1

0.1

A

B

C

D

E

Voltage Rails

V

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

ON

ON

ON

ON

ON

ONONON ON

ON

OFF

OFF

Address

1010 0110b

HIGH HIGH HIGH HIGH

LOW

LOW

LOW LOW LOW LOW

Address

0001 011X b

0101001b

1010 0000b

HP AMP

LOW

HIGHHIGHHIGH

HIGH

HIGH

LOWLOWLOW

HIGH

EC SM Bus2 address

Device

PCH (Reserve)

V

SATA

SATA0

SATA1

SATA2

SATA3

SATA4

SATA5

UMA

DIS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

DESTINATION

HDD,JHDD1

m-SATA,JMINI2

ODD, JODD1

None

None

None

CONN@@Option

X

X

XX

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PX@

X

V

ON

LOW

OFF

OFF

OFF

OFF

OFF

OFF

USB Port Table

USB 2.0 USB 1.1 Port

0
1
2
3
4
5
6
7
8

9
10
11
12
13

EHCI1

EHCI2

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

USB 3.0 Port

0

1

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

1 External
USB Port

USB3.0
USB3.0
USB3.0
USB2.0 FRP
X
m-SATA
X
X
Camera
USB2.0 and sleep charger
minPCIE-WLAN/BT
X
X
X

3 External
USB Port

USB3.0
USB3.0
USB3.0(SB)

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Notes List

Notes List

Notes List

LA-8711

LA-8711

LA-8711

E

3 57Sunday, November 27, 2011

3 57Sunday, November 27, 2011

3 57Sunday, November 27, 2011

0.1

0.1

0.1

S1

Power Plane Description

VIN

BATT+

B+

+CPU_CORE

1 1

+VGFX_CORE Core voltage for UM A graphic

+0.75VS

+1.05VS_VCCP

+VCCP

+1.5V

+1.5VS

+1.8VS

+3VALW

+3VALW_EC

+LAN_VDD_3V3

+3V_PCH

+3VS

+5VALW

+5V_PCH

+5VS

2 2

+VSB

+RTCVCC

Note : ON* means that t his power plane is ON only with AC power av ailable, otherwise it is OFF.

SMBUS Control Table

EC_SMB_CK1
EC_SMB_DA1

EC_SMB_CK2
EC_SMB_DA2

PCH_SMBCLK
PCH_SMBDATA

PCH_SML0CLK

3 3

PCH_SML0DATA

PCH_SML1CLK
PCH_SML1DATA

Adapter power supply (19V)

Battery power supply (12.6V)

AC or battery power rail f or power circuit.

Core voltage for CPU

+0.75VP to +0.75VS switched power rail for DDR terminator

+V1.05SP to +1.05VS_VCCP switched power r ail for CPU

+VCCP (1.05V ) power for PCH

+1.5VP to +1.5V power rail for DDRIII (1.35V OR 1.5V)

+1.5VS switched power rail

(+5VALW ) to 1.8V switched power rail to PCH

+3VALW always on power rail

+3VALW always to KBC

+3VALW to +LAN_VDD_3V3 power rail for LAN

+3VALW to +3V_PCH power rail for PCH (Short Jumper)

+3VALW to +3VS power rail

+5VALWP to +5VALW power rail

+5VALW to +5V_PCH power rail for PCH (Short resister)

+5VALW to +5VS switched power rail OFFONOFF

B+ to +VSB always on power rail f or sequence control

RTC power

BATT

SOURCE

KB930

KB930

PCH

PCH

PCH

WLAN

Charger

MIINI1

V

TP

V

V

DESTINATIONDIFFERENTIAL

S3 S5

N/A N/A N/A

N/A N/A N/A

ON

ON

ON

ON

ON

ON ON

ON

ON

ON

ON ON ON*

ON ON

ON ON

ON

ON

ON ON

ON

ON

SODIMMBATT

N/AN/AN/A

OFF

OFF

OFF OFF

OFF OFF

OFF OFF

OFF OFF

OFF

OFF OFF

OFF

OFF

ON ON*

ON*

ON*

OFF

OFF

ON ON*

ON*

ON ON*

ONON

EC_SMB_CK2

EC_SMB_DA2

PCH_SML1CLK

PCH_SML1DATA

V

V

V

FLEX CLOCKS DESTINATION

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

EC SM Bus1 address

Device

Smart Battery

G-sensor

PCH SM Bus address

Device Address

DDR DIMM0

DDR DIMM1

Mini Card1

Mini Card2

TP module

G-Sensor GPU

V

CLKOUT_PCIE0 CR+ Giga LAN CLKOUTFLEX0 None

CLKOUT_PCIE1

CLKOUT_PCIE2

CLK

CLKOUT_PCIE3

CLKOUT_PCIE4

4 4

CLKOUT_PCIE5

WLAN

None

None

None

None

NoneCLKOUT_PCIE6

CLKOUTFLEX1

CLKOUTFLEX2

CLKOUTFLEX3

Symbol Note :

: means Digital Ground

: means Analog Ground

None

None

None

CLKOUT_PCIE7 None

CLKOUT_PEG_B

A

None

B

5

D D

C C

+1.05VS

12

RC2

RC2

24.9_0402_1%

24.9_0402_1%

eDP_COMPIO and ICOMPO signals
should be shorted near balls

B B

and routed with typical
impedance <25 mohms

NOTE:eDP_COMPIO and eDP_ICOMPO
should not be l eft floating ev en if Internal
Graphic is disa bled since they are shared
with other inte rfaces

4

JCPUA

JCPUA

EDP_COMP

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD#

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

@

@

PEG_RCOMPO

DMI

DMI

Intel(R) FDI

Intel(R) FDI

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

eDP

eDP

DMI_CRX_PTX_N015
DMI_CRX_PTX_N115
DMI_CRX_PTX_N215
DMI_CRX_PTX_N315

DMI_CRX_PTX_P015
DMI_CRX_PTX_P115
DMI_CRX_PTX_P215
DMI_CRX_PTX_P315

DMI_CTX_PRX_N015
DMI_CTX_PRX_N115
DMI_CTX_PRX_N215
DMI_CTX_PRX_N315

DMI_CTX_PRX_P015
DMI_CTX_PRX_P115
DMI_CTX_PRX_P215
DMI_CTX_PRX_P315

FDI_CTX_PRX_N015
FDI_CTX_PRX_N115
FDI_CTX_PRX_N215
FDI_CTX_PRX_N315
FDI_CTX_PRX_N415
FDI_CTX_PRX_N515
FDI_CTX_PRX_N615
FDI_CTX_PRX_N715

FDI_CTX_PRX_P015
FDI_CTX_PRX_P115
FDI_CTX_PRX_P215
FDI_CTX_PRX_P315
FDI_CTX_PRX_P415
FDI_CTX_PRX_P515
FDI_CTX_PRX_P615
FDI_CTX_PRX_P715

FDI_FSYNC015
FDI_FSYNC115

FDI_INT15

FDI_LSYNC015
FDI_LSYNC115

T20 PADT20 PAD

PEG_ICOMPI

PEG_ICOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

3

PEG_ICOMPI and RCOMPO signals should be

+1.05VS

shorted and routed
with - max length = 500 mils - typical

12

RC1

RC1

24.9_0402_1%

24.9_0402_1%

PEG_COMP

J22
J21
H22

PEG_GTX_C_HRX_N15

K33

PEG_GTX_C_HRX_N14

M35

PEG_GTX_C_HRX_N13

L34

PEG_GTX_C_HRX_N12

J35

PEG_GTX_C_HRX_N11

J32

PEG_GTX_C_HRX_N10

H34

PEG_GTX_C_HRX_N9

H31

PEG_GTX_C_HRX_N8

G33

PEG_GTX_C_HRX_N7

G30

PEG_GTX_C_HRX_N6

F35

PEG_GTX_C_HRX_N5

E34

PEG_GTX_C_HRX_N4

E32

PEG_GTX_C_HRX_N3

D33

PEG_GTX_C_HRX_N2

D31

PEG_GTX_C_HRX_N1

B33

PEG_GTX_C_HRX_N0

C32

PEG_GTX_C_HRX_P15

J33

PEG_GTX_C_HRX_P14

L35

PEG_GTX_C_HRX_P13

K34

PEG_GTX_C_HRX_P12

H35

PEG_GTX_C_HRX_P11

H32

PEG_GTX_C_HRX_P10

G34

PEG_GTX_C_HRX_P9

G31

PEG_GTX_C_HRX_P8

F33

PEG_GTX_C_HRX_P7

F30

PEG_GTX_C_HRX_P6

E35

PEG_GTX_C_HRX_P5

E33

PEG_GTX_C_HRX_P4

F32

PEG_GTX_C_HRX_P3

D34

PEG_GTX_C_HRX_P2

E31

PEG_GTX_C_HRX_P1

C33

PEG_GTX_C_HRX_P0

B32

PEG_HTX_GRX_N15 PEG_HTX_C_GRX_N15

M29

PEG_HTX_GRX_N14 PEG_HTX_C_GRX_N14

M32

PEG_HTX_GRX_N13 PEG_HTX_C_GRX_N13

M31

PEG_HTX_GRX_N12 PEG_HTX_C_GRX_N12

L32

PEG_HTX_GRX_N11 PEG_HTX_C_GRX_N11

L29

PEG_HTX_GRX_N10 PEG_HTX_C_GRX_N10

K31

PEG_HTX_GRX_N9 PEG_HTX_C_GRX_N9

K28

PEG_HTX_GRX_N8 PEG_HTX_C_GRX_N8

J30

PEG_HTX_GRX_N7 PEG_HTX_C_GRX_N7

J28

PEG_HTX_GRX_N6 PEG_HTX_C_GRX_N6

H29

PEG_HTX_GRX_N5 PEG_HTX_C_GRX_N5

G27

PEG_HTX_GRX_N4 PEG_HTX_C_GRX_N4

E29

PEG_HTX_GRX_N3 PEG_HTX_C_GRX_N3

F27

PEG_HTX_GRX_N2 PEG_HTX_C_GRX_N2

D28

PEG_HTX_GRX_N1 PEG_HTX_C_GRX_N1

F26

PEG_HTX_GRX_N0 PEG_HTX_C_GRX_N0

E25

PEG_HTX_GRX_P15 PEG_HTX_C_GRX_P15

M28

PEG_HTX_GRX_P14 PEG_HTX_C_GRX_P14

M33

PEG_HTX_GRX_P13 PEG_HTX_C_GRX_P13

M30

PEG_HTX_GRX_P12 PEG_HTX_C_GRX_P12

L31

PEG_HTX_GRX_P11 PEG_HTX_C_GRX_P11

L28

PEG_HTX_GRX_P10 PEG_HTX_C_GRX_P10

K30

PEG_HTX_GRX_P9 PEG_HTX_C_GRX_P9

K27

PEG_HTX_GRX_P8 PEG_HTX_C_GRX_P8

J29

PEG_HTX_GRX_P7 PEG_HTX_C_GRX_P7

J27

PEG_HTX_GRX_P6 PEG_HTX_C_GRX_P6

H28

PEG_HTX_GRX_P5 PEG_HTX_C_GRX_P5

G28

PEG_HTX_GRX_P4 PEG_HTX_C_GRX_P4

E28

PEG_HTX_GRX_P3 PEG_HTX_C_GRX_P3

F28

PEG_HTX_GRX_P2 PEG_HTX_C_GRX_P2

D27

PEG_HTX_GRX_P1 PEG_HTX_C_GRX_P1

E26

PEG_HTX_GRX_P0 PEG_HTX_C_GRX_P0

D25

CU33 0.1U_0402_10V6KPX@CU33 0.1U_0402_10V6KPX@
CU34 0.1U_0402_10V6KPX@CU34 0.1U_0402_10V6KPX@
CU35 0.1U_0402_10V6KPX@CU35 0.1U_0402_10V6KPX@
CU36 0.1U_0402_10V6KPX@CU36 0.1U_0402_10V6KPX@
CU37 0.1U_0402_10V6KPX@CU37 0.1U_0402_10V6KPX@
CU38 0.1U_0402_10V6KPX@CU38 0.1U_0402_10V6KPX@
CU39 0.1U_0402_10V6KPX@CU39 0.1U_0402_10V6KPX@
CU40 0.1U_0402_10V6KPX@CU40 0.1U_0402_10V6KPX@
CU41 0.1U_0402_10V6KPX@CU41 0.1U_0402_10V6KPX@
CU42 0.1U_0402_10V6KPX@CU42 0.1U_0402_10V6KPX@
CU43 0.1U_0402_10V6KPX@CU43 0.1U_0402_10V6KPX@
CU44 0.1U_0402_10V6KPX@CU44 0.1U_0402_10V6KPX@
CU45 0.1U_0402_10V6KPX@CU45 0.1U_0402_10V6KPX@
CU46 0.1U_0402_10V6KPX@CU46 0.1U_0402_10V6KPX@
CU47 0.1U_0402_10V6KPX@CU47 0.1U_0402_10V6KPX@
CU48 0.1U_0402_10V6KPX@CU48 0.1U_0402_10V6KPX@

CU49 0.1U_0402_10V6KPX@CU49 0.1U_0402_10V6KPX@
CU50 0.1U_0402_10V6KPX@CU50 0.1U_0402_10V6KPX@
CU51 0.1U_0402_10V6KPX@CU51 0.1U_0402_10V6KPX@
CU52 0.1U_0402_10V6KPX@CU52 0.1U_0402_10V6KPX@
CU53 0.1U_0402_10V6KPX@CU53 0.1U_0402_10V6KPX@
CU54 0.1U_0402_10V6KPX@CU54 0.1U_0402_10V6KPX@
CU55 0.1U_0402_10V6KPX@CU55 0.1U_0402_10V6KPX@
CU56 0.1U_0402_10V6KPX@CU56 0.1U_0402_10V6KPX@
CU57 0.1U_0402_10V6KPX@CU57 0.1U_0402_10V6KPX@
CU58 0.1U_0402_10V6KPX@CU58 0.1U_0402_10V6KPX@
CU59 0.1U_0402_10V6KPX@CU59 0.1U_0402_10V6KPX@
CU60 0.1U_0402_10V6KPX@CU60 0.1U_0402_10V6KPX@
CU61 0.1U_0402_10V6KPX@CU61 0.1U_0402_10V6KPX@
CU62 0.1U_0402_10V6KPX@CU62 0.1U_0402_10V6KPX@
CU63 0.1U_0402_10V6KPX@CU63 0.1U_0402_10V6KPX@
CU64 0.1U_0402_10V6KPX@CU64 0.1U_0402_10V6KPX@

impedance = 43 mohms
PEG_ICOMPO signals should be routed with ­max length = 500 mils

- typical impedance = 14.5 mohms

12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12

12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12

2

<PEG>

10/05 Change to 0.22uF.

Typ- suggest 220nF. The change in AC capacitor value from
180nF to 265nF is to enable compatibility with future platforms
having PCIE Gen3 (8GT/s)
11/23 AC-coupling capacitor is 0.1u.Chelsea only support GEN2.

PEG_GTX_C_HRX_N[0..15]

PEG_GTX_C_HRX_P[0..15]

PEG_HTX_C_GRX_N[0..15]

PEG_HTX_C_GRX_P[0..15]

<PEG>

1

PEG_GTX_C_HRX_N[0..15] 21

PEG_GTX_C_HRX_P[0..15] 21

PEG_HTX_C_GRX_N[0..15] 21

PEG_HTX_C_GRX_P[0..15] 21

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(1/7) DMI,FDI,PEG

PROCESSOR(1/7) DMI,FDI,PEG

PROCESSOR(1/7) DMI,FDI,PEG

LA-8551P

1

4 57Sunday, November 27, 2011

4 57Sunday, November 27, 2011

4 57Sunday, November 27, 2011

0.1

0.1

0.1

5

D D

PROC_DETECT (Processor Detect): pulled to
ground on the processor package. There is no
connection to the processor silicon for this
signal. System board designers may use this

+1.05VS

C C

Processor Pullups

RC8 62_0402_5%RC8 62_0402_5%

RC11 10K_0402_5%RC11 10K_0402_5%

H_PROCHOT#

12

12

12

C4680

C4680

47P_0402_50V8J

47P_0402_50V8J

H_PROCHOT#

H_CPUPWRGD_R

signal to determine if the processor is present

H_SNB_IVB#17

H_PECI17,36 H_DRAMRST# 6

H_PROCHOT#36,47

H_THEMTRIP#17

H_PM_SYNC15

H_CPUPWRGD17

SI# 10/02 Change to Pull High +3VS

+3VS

B B

RC81

RC81
10K_0402_5%

10K_0402_5%

1 2

SYS_PWROK15

PM_DRAM_PWRGD15

+3V_PCH

@ RC27

@

0_0402_5%

0_0402_5%

1 2

+3VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

RC27

RC28

RC28

@

@

1 2

200_0402_5%

200_0402_5%

RC30

RC30

1 2

200_0402_5%

200_0402_5%

1

CC2

CC2

2

1

2

Part Number = SA00003Y000

Part Number = SA00003Y000

+3VALW

UC2

UC2
74AHC1G09GW_TSSOP5

74AHC1G09GW_TSSOP5

5

P

B

4

O

A

G

3

PM_SYS_PWRGD_BUF

+1.5V_CPU_VDDQ

12

RC25

RC25
200_0402_5%

200_0402_5%

Remove mos for layout

4

+3VS

Check circuit!!!

5

@ UC1

@

1

P

NC

PLT_RST#

PLT_RST#16,21,31,34,36

This pin is for compability with future
platforms. A pull up resistor to VCCIO is
required if connected to the DF_TVS strap
on the PCH.

@

@

1 2

RC7 10K_0402_5%

RC7 10K_0402_5%

1 2

RC9 0_0402_5%RC9 0_0402_5%

H_PROCHOT#

RC10 56_0402_5%RC10 56_0402_5%

H_THEMTRIP# H_THEMTRIP#_R

UNCOREPWRGOOD:

RC18 130_0402_5%RC18 130_0402_5%

SM_DRAMPWROK:DRAM power ok

H_PROCHOT#_R

1 2

1 2

RC12 0_0402_5%RC12 0_0402_5%

1 2

RC13 0_0402_5%RC13 0_0402_5%

RC16

RC16

0_0402_5%

0_0402_5%

H_CPUPWRGD_R

1 2

非非非非

CORE

PM_DRAM_PWRGD_RPM_SYS_PWRGD_BUF

1 2

BUF_CPU_RST#

T5PAD @T5PAD @

H_PM_SYNC_R

外外外外外外外外外外外外

H_PECI_ISO

OK

C26

AN34

AL33

AN33

AL32

AN32

AM34

AP33

V8

AR33

DDR3 Compensation Signals

SM_RCOMP0

RC23 140_0402_1%RC23 140_0402_1%

SM_RCOMP1

RC24 25.5_0402_1%RC24 25.5_0402_1%

SM_RCOMP2

RC26 200_0402_1%RC26 200_0402_1%

12

12

12

PU/PD for JTAG signals

XDP_TMS

XDP_TDI

XDP_TDO

XDP_TCK

XDP_TRST#

2011.10.18 dele te all reserved XDP conponent.
Just reserve te st point for XDP.

T40 PAD@T40 PAD@

T41 PAD@T41 PAD@

T42 PAD@T42 PAD@

T43 PAD@T43 PAD@

T46 PAD@T46 PAD@

2

A

3

R956

R956

0_0402_5%

0_0402_5%

1 2

JCPUB

JCPUB

PROC_SELECT#

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPWRGOOD

SM_DRAMPWROK

RESET#

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

@

@

XDP_TRST#

PLT_RST#

PM_SYS_PWRGD_BUF

BUF_CPU_RST#

G

3

Buffered reset to CPU

1

CC1

@ CC1

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

UC1

BUFO_CPU_RST#

4

Y

SN74LVC1G07DCKR_SC70-5

SN74LVC1G07DCKR_SC70-5

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

CLOCKS

CLOCKS

DDR3

DDR3

JTAG & BPM

JTAG & BPM

C263 0.1U_0402_16V7KC263 0.1U_0402_16V7K

1 2

C264 220P_0402_50V7KC264 220P_0402_50V7K

1 2

C265 100P_0402_50V8J@C265 100P_0402_50V8J@

1 2

C266 220P_0402_50V7KC266 220P_0402_50V7K

1 2

+1.05VS

12

@

@

RC3

RC3
75_0402_5%

75_0402_5%

1.5K_0402_1%

1.5K_0402_1%

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

MISC

MISC

Reset# signal is driven by the PCH to multiple agents on the platform.
PCH Reset# output DC levels are 0-V and 3.3 V,
processor Reset input DC levels are 0V and 1.0 V.
Processor high-voltage level is lower than PCH high v oltage level,
therefore a voltage level shifter is required on the R eset# signal.
In order for Reset# to meet the signal quality requirement at the input to
the processor OD buffer must be plac ed on the motherboard between
the PCH and the processor.

RC4

RC4

BCLK

BCLK#

11/21 follow QAZ60 cost down CPU_RST#

BUF_CPU_RST#

12

12

RC6

RC6

750_0402_1%

750_0402_1%

Requires a series resistor of 43±5% between processor and PC H.
It also a needs an Rtt of 75±5% to VCCP after the OD
buffer and before the series resistor.

A28
A27

A16
A15

CLK_CPU_DMI 14
CLK_CPU_DMI# 14

RC84 1K_0402_5%RC84 1K_0402_5%
RC85 1K_0402_5%RC85 1K_0402_5%

12
12

ITP CLK change to part E.

H_DRAMRST#

R8

SM_RCOMP0

AK1

SM_RCOMP1

A5

SM_RCOMP2

A4

PAD

PAD

T35

T35

PAD

PAD

@

@

T39

T39

@

@

AP29

PRDY#

AP27

PREQ#

XDP_TCK

AR26

TCK

XDP_TMS

AR27

TMS

XDP_TRST#

AP30

TRST#

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

XDP_TDI

AR28

TDI

XDP_TDO

AP26

TDO

AL35

AT28
AR29
AR30
AT30

XDP_BPM#4_R

AP32

XDP_BPM#5_R

AR31

XDP_BPM#6_R

AT31

XDP_BPM#7_R

AR32

SI# 8/16 Reserve RC81~RC85 by ESD request

RC17 0_0402_5%RC17 0_0402_5%

1 2

2011.10.18 dele te all reserved XDP conponent.
Just reserve te st point for XDP.

XDP_DBRESET#_R

H_CPUPWRGD_R

SI# 8/19 BOM
C118 220P
C266 220P
C264 220P
C263 0.1u
CC4 0.1u ok

2

100MHz

+1.05VS

6/27 Add ESD solution

XDP_DBRESET#XDP_DBRESET#_R

T60 PAD@T60 PAD@
T61 PAD@T61 PAD@
T62 PAD@T62 PAD@
T63 PAD@T63 PAD@

CC4 0.1U_0402_16V7K

CC4 0.1U_0402_16V7K

12

<BOM Structure>

<BOM Structure>

C118 220P_0402_50V7KC118 220P_0402_50V7K

1 2

6/27 Add ESD solution

XDP_DBRESET#

XDP_DBRESET# 15

RC5 1K_0402_5%RC5 1K_0402_5%

circuit check 10k

12

1

+3VS

Sharing add for module desige

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(2/7) PM,XDP,CLK

PROCESSOR(2/7) PM,XDP,CLK

PROCESSOR(2/7) PM,XDP,CLK

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-8041P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

5 57Sunday, November 27, 2011

5 57Sunday, November 27, 2011

5 57Sunday, November 27, 2011

0.1

0.1

0.1

5

JCPUC

JCPUC

4

3

JCPUD

JCPUD

2

1

DDR_A_D[0..63]11

D D

C C

DDR_A_BS01 1

B B

DDR_A_BS11 1
DDR_A_BS21 1

DDR_A_CAS#11
DDR_A_RAS#11
DDR_A_WE#11

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AP11
AN11

AL12
AM12
AM11

AL11

AP12
AN12

AJ14

AH14

AL15

AK15

AL14

AK14

AJ15

AH15

AE10

AF10

G10

N10

M10

AG6
AG5
AK6
AK5
AH5
AH6

AK8

AK9
AH8
AH9
AL9
AL8

AE8
AD9
AF9

F10

AJ5
AJ6
AJ8

AJ9

C5
D5
D3
D2
D6
C6
C2
C3

F8

G9

F9

F7
G8
G7

K4

K5

K1

K2
M8

N8

N7

M9

N9
M7

V6

J1
J5
J4
J2

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

RSVD_TP[10]

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]

RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]

SA_CS#[0]

SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]

SA_ODT[0]
SA_ODT[1]

RSVD_TP[9]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AB6
AA6
V9

AA5
AB5
V10

AB4
AA4
W9

AB3
AA3
W10

AK3
AL3
AG1
AH1

AH3
AG3
AG2
AH2

C4
G6
J3
M6
AL6
AM8
AR12
AM15

D4
F6
K3
N6
AL5
AM9
AR11
AM14

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

M_CLK_DDR0 11
M_CLK_DDR#0 11
DDR_CKE0_DIMMA 11

M_CLK_DDR1 11
M_CLK_DDR#1 11
DDR_CKE1_DIMMA 11

DDR_CS0_DIMMA# 11
DDR_CS1_DIMMA# 11

M_ODT0 11
M_ODT1 11

DDR_A_DQS#[0..7] 11

DDR_A_DQS[0..7] 11

DDR_A_MA[0..15] 11

DDR_B_D[0..63]12

DDR_B_BS012
DDR_B_BS112
DDR_B_BS212

DDR_B_CAS#12
DDR_B_RAS#12
DDR_B_WE#12

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

D10

K10

AM5
AM6
AR3

AP3
AN3
AN2
AN1

AP2

AP5
AN9

AT5

AT6

AP6
AN8
AR6
AR5
AR9

AJ11

AT8

AT9

AH11

AR8

AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

AA9
AA7

AA10

AB8
AB9

J10

C9
A7

C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2

J7
J8

K9

J9

K8
K7
M5
N4
N2
N1
M4
N5
M2
M1

R6

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]

RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]

RSVD_TP[17]
RSVD_TP[18]

RSVD_TP[19]
RSVD_TP[20]

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

AE2
AD2
R9

AE1
AD1
R10

AB2
AA2
T9

AA1
AB1
T10

AD3
AE3
AD6
AE6

AE4
AD4
AD5
AE5

D7
F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

M_CLK_DDR2 12
M_CLK_DDR#2 12
DDR_CKE0_DIMMB 12

M_CLK_DDR3 12
M_CLK_DDR#3 12
DDR_CKE1_DIMMB 12

10/05 change net name.

DDR_CS0_DIMMB# 12
DDR_CS1_DIMMB# 12

M_ODT2 12
M_ODT3 12

DDR_B_DQS#[0..7] 12

DDR_B_DQS[0..7] 12

DDR_B_MA[0..15] 12

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

@

@

RC35

@RC35

@

0_0402_5%

RC38

RC38

0_0402_5%

1 2

D

S

D

S

DDR3_DRAMRST#_RH_DRAMRST#

13

QC2

QC2
BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

G

G

2

9/7 Folllow PAJ80 BOM by Light
del: SB501380020

1 2

add: SB00000QO00

1

CC3

CC3

0.047U_0402_16V4Z

0.047U_0402_16V4Z

2

CPU通通DIMM做reset

H_DRAMRST#5

4.99K_0402_1%

4.99K_0402_1%

A A

DRAMRST_CNTRL_PC H9,14

5

RC39

RC39

0_0402_5%

0_0402_5%

1 2

DRAMRST_CNTRL

RC36

RC36

1K_0402_5%

1K_0402_5%

+1.5V

12

1 2

RC37

RC37
1K_0402_5%

1K_0402_5%

S0
DRAMRST_CNTRL_P CH hgih ,MOS O N
H_DRAMRST# HIGH ,DDR3_DRAMRST# HIGH
Dimm not reset
S3
DRAMRST_CNTRL_P CH Low ,MOS OF F
H_DRAMRST# lo,D DR3_DRAMRST# HI GH
Dimm not reset
S4,5
DRAMRST_CNTRL_P CH Low ,MOS OF F
H_DRAMRST# lo,D DR3_DRAMRST# lo w
Dimm reset

4

DDR3_DRAMRST# 11,12

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

@

@

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(3/7) DDRIII

PROCESSOR(3/7) DDRIII

PROCESSOR(3/7) DDRIII

LA-8041P

1

6 57Sunday, November 27, 2011

6 57Sunday, November 27, 2011

6 57Sunday, November 27, 2011

0.1

0.1

0.1

5

4

3

2

1

CFG Straps for Processor

CFG2

D D

change to install

12

RC40

RC40
1K_0402_1%

1K_0402_1%

Change to part G.

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

JCPUE

JCPUE

T3PAD T3PAD

CLK_RES_ITP 14
CLK_RES_ITP# 14

ITP CLK change from part C.

T64PAD T64PAD

RSVD28
RSVD29
RSVD30
RSVD31

RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD51
RSVD52

BCLK_ITP

BCLK_ITP#

KEY

AH27
AH26

L7
AG7
AE7
AK2

W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AN35
AM35

AT2
AT1
AR1

B1

CPU_RSVD6
CPU_RSVD7

RESERVED

RESERVED

VCC_DIE_SENSE
VSS_DIE_SENSE

RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5

RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RSVD_NCTF9

RSVD_NCTF10

RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13

CFG0

T9T9

CFG1

T6T6

CFG2

T10T10

CFG3

T11T11

CFG4
CFG5

1 2

12

T12T12
T13T13
T7T7
T8T8
T14T14
T15T15
T16T16
T47T47
T48T48
T58T58
T59T59
T17T17
T18T18

49.9_0402_1%

49.9_0402_1%

12

VSSAXG_VAL_SENSE

CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

VCC_VAL_SENSE

VSS_VAL_SENSE

VAXG_VAL_SENSE

C C

2011.10.18 delete XDP resistor
just reserve test point for XDP.

+VGFX_CORE

+CPU_CORE

Just modify PWR to correct ,
didn't change net-name to save layout time;must modify on SI phase

B B

A A

RC42 4 9.9_0402_1%RC42 4 9.9_0402_1%

RC44 49.9_0402_1%RC44 49.9_0402_1%

RC43

RC43

1 2

RC45 4 9.9_0402_1%RC45 4 9.9_0402_1%

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

@

@

CFG

CFG

change to install

T21T21
T22T22

Display Port Presence Strap

CFG4

PCIE Port Bifurcation Straps

CFG[6:5]

PEG DEFER TRAINING

CFG7

1: Normal Operation; Lane # definition matches
socket pin map definition

*

0:Lane Reversed

CFG4

*

1K_0402_1%

1K_0402_1%

12

RC41

RC41
1K_0402_1%

1K_0402_1%

1 : Disabled; No Physical Display Port
attached to Embedded Display Port

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

CFG6

CFG5

RC48

RC48

12

12

RC49

UMA@RC49

UMA@

1K_0402_1%

1K_0402_1%

@

@

11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled

01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)

*

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

CFG7

*

12

RC50

@RC50

@

1K_0402_1%

1K_0402_1%

1: (Default) PEG Train immediately following
xxRESETB de assertion

0: PEG Wait for BIOS for training

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/7) RSVD,CFG

PROCESSOR(4/7) RSVD,CFG

PROCESSOR(4/7) RSVD,CFG

LA-8041P

1

7 57Sunday, November 27, 2011

7 57Sunday, November 27, 2011

7 57Sunday, November 27, 2011

0.1

0.1

0.1

5

D D

C C

B B

A A

4

+CPU_CORE

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

3

POWER

JCPUF

JCPUF

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

POWER

CORE SUPPLY

CORE SUPPLY

PEG AND DDR

PEG AND DDR

VCC_SENSE
VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID

SENSE LINES SVID

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8

VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK
VIDSOUT

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

H_CPU_SVIDALRT#

AJ29

H_CPU_SVIDCLK

AJ30

H_CPU_SVIDDAT

AJ28

VCCSENSE_R

AJ35

VSSSENSE_R

AJ34

VCCIO_SENSE_R

B10

VSS_SENSE_VCCIO

A10

+1.05VS

RC61 0_0402_5%RC61 0_0402_5%

1 2

RC62 0_0402_5%RC62 0_0402_5%

1 2

RC63

RC63

1 2

10_0402_1%

10_0402_1%

RC65 0_0402_5%RC65 0_0402_5%

1 2

12

RC66

RC66
10_0402_1%

10_0402_1%

10/05 mount.
(follow check list)

2

+1.05VS

12

RC55

RC55
130_0402_5%

130_0402_5%

RC57 43_0402_1%RC57 43_0402_1%

1 2

RC58 0_0402_5%RC58 0_0402_5%

1 2

RC59 0_0402_5%RC59 0_0402_5%

1 2

+1.05VS

RC121

RC121

1 2

100_0402_1%~D

100_0402_1%~D

@

@

VCCIO_SENSE 50
VSS_SENSE_VCCIO 50

+1.05VS

12

RC56

RC56

75_0402_5%

75_0402_5%

1 2

RC60 1 00_0402_1%RC60 1 00_0402_1%

12

RC64

RC64
100_0402_1%

100_0402_1%

Place the PU
resistors close to VR

VR_SVID_ALRT# 55
VR_SVID_CLK 55
VR_SVID_DAT 55

+CPU_CORE

Place the PU
resistors close to CPU

VCCSENSE 55
VSSSENSE 55

1

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

@

@

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(5/7) PWR,BYPASS

PROCESSOR(5/7) PWR,BYPASS

PROCESSOR(5/7) PWR,BYPASS

LA-8041P

1

8 57Sunday, November 27, 2011

8 57Sunday, November 27, 2011

8 57Sunday, November 27, 2011

0.1

0.1

0.1

5

4

3

2

1

+1.5V_CPU_VDDQ +1.5V

CC74 0.1U_0402_10V7KCC74 0.1U_0402_10V7K

CC75 0.1U_0402_10V7KCC75 0.1U_0402_10V7K

D D

+V_DDR_REFA

+V_DDR_REFB

C C

+VGFX_CORE

RC15

RC15

1 2

0_0402_5%@

0_0402_5%@

RC82

RC82

1 2

0_0402_5%@

0_0402_5%@

QC7

QC7

SB000002X00

SB000002X00

13

D

D

BSS138W-7-F_SOT323-3

BSS138W-7-F_SOT323-3

S

S

QC8

QC8

SB000002X00

SB000002X00

13

D

D

BSS138W-7-F_SOT323-3

BSS138W-7-F_SOT323-3

S

S

12

12

DRAMRST_CNTRL_PC H

2

G

G

+V_DDR_REFA_R

RC14

RC14

1 2

1K_0402_1%@

1K_0402_1%@

DRAMRST_CNTRL_PC H

2

G

G

+V_DDR_REFB_R

RC83

RC83

1 2

1K_0402_1%@

1K_0402_1%@

DRAMRST_CNTRL_PC H 6,14

For Chief River only

M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

10/03 add +V_DDR_REFB

+1.8VS

RC77

B B

SI# 7/29 Add CC 26 10uF and res erve 330U on 1. 8V power Rail

RC77

0_0805_5%

0_0805_5%

1 2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

CC26

CC26

+

+

2

2

330U_D2_2VM_R6M

330U_D2_2VM_R6M

Can connect to GND if motherboard only

‧‧‧‧

supports external graphics and if GFX VR is not
stuffed in a common motherboard design,

VAXG can be left floating in a common

‧‧‧‧

motherboard design (Gfx VR keeps VAXG from
floating) if the VR is stuffed

JCPUG

JCPUG

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

VAXG6

AR24

VAXG7

AR23

VAXG8

AR21

VAXG9

AR20

VAXG10

AR18

VAXG11

AR17

VAXG12

AP24

VAXG13

AP23

VAXG14

AP21

VAXG15

AP20

VAXG16

AP18

VAXG17

AP17

VAXG18

AN24

VAXG19

AN23

VAXG20

AN21

VAXG21

AN20

VAXG22

AN18

VAXG23

AN17

VAXG24

AM24

VAXG25

AM23

VAXG26

AM21

VAXG27

AM20

VAXG28

AM18

VAXG29

AM17

VAXG30

AL24

VAXG31

AL23

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36

AK24

VAXG37

AK23

VAXG38

AK21

VAXG39

AK20

VAXG40

AK18

VAXG41

AK17

VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48

AH24

VAXG49

AH23

VAXG50

AH21

VAXG51

AH20

VAXG52

AH18

VAXG53

AH17

VAXG54

+1.8VS_VCCPLL

CC121

1U_0402_6.3V6K

CC121

1U_0402_6.3V6K

CC122

1U_0402_6.3V6K

CC122

CC120

CC120

@

@

1U_0402_6.3V6K

1

1

2

2

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

@

@

POWER

POWER

SENSE

SENSE

GRAPHICS

GRAPHICS

1.8V RAIL

1.8V RAIL

VAXG_SENSE

VSSAXG_SENSE

LINES

LINES

SM_VREF

SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

VREFMISC

VREFMISC

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

VCCSA_SENSE

VCCSA_VID[0]
VCCSA_VID[1]

VCCIO_SEL

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

RC157 100_0402_1%~D@RC157 100_0402_1%~D@

AK35
AK34

AL1

B4
D1

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

M27
M26
L26
J26
J25
J24
H26
H25

VCCSA_SENSE

H23

0_0402_5%

0_0402_5%

C22
C24

RC80 0_0402_5%RC80 0_0402_5%

A19

100±5% pull-up to VCC;

1 2

+V_SM_VREF_CNT

+V_DDR_REFA_R
+V_DDR_REFB_R

100±5% pull-down to GND.

VCC_AXG_SENSE 55
VSS_AXG_SENSE 55

QC4 Change to SA0000JA00 for small package
1016

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CC22

CC22

2

11/21 follow PBL22 design remove 10u*2, 1U*5

1 2

RC78 0 _0402_5%@RC78 0_0402_5%@

VCCSA_VID0

RC79

RC79

1 2
1 2

VCCP_PWRCTR L_R

VCCSA_VID1

VCCSA_VID0 52
VCCSA_VID1 52

10K_0402_5%

10K_0402_5%

1 2

RC53

RC53

@

@

CPU EDS descript as follow:

+V_SM_VREF should
have 20 mil trace width

1

CC79

CC79

0.1U_0402_16V4Z

0.1U_0402_16V4Z

11/21 follow PBL22 design remove 10u*2, 1U*8;
keep 10U*5

+VCCSA

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CC21

CC21

VCCSA_SENSE 52

+1.05VS

1

CC24

CC24

2

12

RC52
75_0402_5%

75_0402_5%

1

2

@RC52

@

2

+VCCSA

Delete CC25 330U cap 10.19
(after check with power)

+1.5V_CPU_VDDQ

12

RC68

RC68
1K_0402_1%

1K_0402_1%

12

RC69

RC69
1K_0402_1%

1K_0402_1%

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CC95

CC95

2

1

1

1

CC97

CC97

CC96

CC96

2

2

2

+1.5V_CPU_VDDQ Source

+1.5V_CPU_VDDQ

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CC99

CC99

CC98

CC98

2

1

+

+

330U_D2_2V_Y

330U_D2_2V_Y

2

CC100

CC100

For Chief River platforms this pin

+1.5V +1.5V_CPU_VDDQ

QC4

+VSB

+3VALW

12

RC72

RC72
100K_0402_5%

RC74

RC74

0_0402_5%

A A

CPU1.5V_S3_GATE36

SUSP#36,43,50,51,52,53

0_0402_5%

1 2

RC75

@RC75

@

0_0402_5%

0_0402_5%

1 2

100K_0402_5%

RUN_ON_CPU1.5VS3#

61

2

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6
QC5A

QC5A

12

34

5

RC70

RC70
100K_0402_5%

100K_0402_5%

RUN_ON_CPU1.5VS3

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6
QC5B

QC5B

330K_0402_5%

330K_0402_5%

SI# BOM Change CC118 0.1u 25V form 0.1u 16V

Follow DG 0.71 page 6

5

QC4
AON6718L_DFN8-5

AON6718L_DFN8-5

5

RC73

RC73

4

12

1
2
3

4

@

@

1

CC118

CC118

2

0.1U_0402_25V6

0.1U_0402_25V6

12

R78

R78

20K_0402_5%

20K_0402_5%

RC71

RC71
470_0603_5%

470_0603_5%

1 2

61

RUN_ON_CPU1.5VS3#

2

Q10A

Q10A
2N7002DWH_SOT363-6

2N7002DWH_SOT363-6

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

should not be used.

VID[0] VID[1] 2011 2012
0 0 0.90 V Yes Yes
0 1 0.80 V Yes Yes
1 0 0.725 V No Yes
1 1 0.675 V No Yes

Compal Secret Data

Compal Secret Data

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(6/7) PWR

PROCESSOR(6/7) PWR

PROCESSOR(6/7) PWR

LA-8041P

1

9 57Sunday, November 27, 2011

9 57Sunday, November 27, 2011

9 57Sunday, November 27, 2011

0.1

0.1

0.1

5

D D

C C

B B

4

JCPUH

JCPUH

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

VSS9

AT10

VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13

AR25

VSS14

AR22

VSS15

AR19

VSS16

AR16

VSS17

AR13

VSS18

AR10

VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22

AP34

VSS23

AP31

VSS24

AP28

VSS25

AP25

VSS26

AP22

VSS27

AP19

VSS28

AP16

VSS29

AP13

VSS30

AP10

VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34

AN30

VSS35

AN27

VSS36

AN25

VSS37

AN22

VSS38

AN19

VSS39

AN16

VSS40

AN13

VSS41

AN10

VSS42

AN7

VSS43

AN4

VSS44

AM29

VSS45

AM25

VSS46

AM22

VSS47

AM19

VSS48

AM16

VSS49

AM13

VSS50

AM10

VSS51

AM7

VSS52

AM4

VSS53

AM3

VSS54

AM2

VSS55

AM1

VSS56

AL34

VSS57

AL31

VSS58

AL28

VSS59

AL25

VSS60

AL22

VSS61

AL19

VSS62

AL16

VSS63

AL13

VSS64

AL10

VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68

AK33

VSS69

AK30

VSS70

AK27

VSS71

AK25

VSS72

AK22

VSS73

AK19

VSS74

AK16

VSS75

AK13

VSS76

AK10

VSS77

AK7

VSS78

AK4

VSS79

AJ25

VSS80

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

@

@

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

3

JCPUI

JCPUI

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

VSS

2

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

1

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

@

@

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(7/7) VSS

PROCESSOR(7/7) VSS

PROCESSOR(7/7) VSS

LA-8041P

1

0.1

0.1

10 57Sunday, November 27, 2011

10 57Sunday, November 27, 2011

10 57Sunday, November 27, 2011

0.1

5

4

3

2

1

DDR3 SO-DIMM A

+V_DDR_REFA

D D

DDR_A_D[0..63]6

DDR_A_DQS[0..7]6

DDR_A_DQS#[0..7]6

DDR_A_MA[0..15]6

All VREF traces should
have 20 mil trace width

0.1U_0402_16V7K

0.1U_0402_16V7K

CD2

2.2U_0603_6.3V6K

CD2

2.2U_0603_6.3V6K

CD1

CD1

1

1

2

2

Delete DDR_A_DM[0..7]

+1.5V

12

RD1

RD1
1K_0402_1%

1K_0402_1%

RD2

RD2
1K_0402_1%

1K_0402_1%

C C

Layout Note:
Place near JDIMM1.203 & JDIMM1.204

11/18 for layout spacing: remove CD5/CD6/CD9

+0.75VS

11/21 1U*4 only

CD4

1U_0402_6.3V6K

CD4

1U_0402_6.3V6K

CD3

1U_0402_6.3V6K

CD3

1U_0402_6.3V6K

1

1

2

2

B B

Layout Note:
Place near JDIMM1

+1.5V

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CD13

CD13

CD12

CD12

1

1

1

2

2

2

DDR3 SO-DIMM A

A A

5

+V_DDR_REFA

12

CD6

1U_0402_6.3V6K

CD6

1U_0402_6.3V6K

CD5

1U_0402_6.3V6K

CD5

1U_0402_6.3V6K

1

1

2

2

Layout Note: Place these 4 Caps near Command
and Control signals of DIMMA

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CD14

CD14

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CD15

CD15

1

2

+1.5V

@

@

10U_0603_6.3V6M

CD16

CD16

CD17

CD17

1

1

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

CD26

CD26

CD27

CD27

1

2

1

1

@

@

@

@

2

2

SI# 8/16 Reserve 4 pcs 0.1uF for EMI noise issue

DDR_CKE0_DIMMA6

DDR_A_BS26

M_CLK_DDR06
M_CLK_DDR#06

DDR_A_BS06

DDR_A_WE#6
DDR_A_CAS#6

DDR_CS1_DIMMA#6

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
CD18

CD18

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K
CD28

CD28

@

@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
CD19

CD19

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K
CD25

CD25

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

CD20

CD20

CD21

CD21

1

2

1

+

+

CD22

CD22
330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

2

SGA00004400

SGA00004400

4

+3VS

RD5 10K_0402_5%RD5 10K_0402_5%

1 2

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K
CD24

CD24

CD23

CD23

1

1

2

2

1

2

+1.5V +1.5V

3.56A@+1.5V

+V_DDR_REFA

DDR_A_D0
DDR_A_D1

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

M_CLK_DDR0
M_CLK_DDR#0

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13
DDR_CS1_DIMMA#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_D58
DDR_A_D59

3
5
7

11
13
15
17
19
21
23

27

33
35

39
41

45

51

57

63

67
69

73
75
77
79
81

85
87
89
91
93
95
97

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

RD6

10K_0402_5%

RD6

10K_0402_5%

12

205

JDDRL1

JDDRL1

VREF_DQ1VSS1
VSS2
DQ0
DQ1
VSS49DQS#0
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS925VSS10
DQS#1
DQS129RESET#
VSS1131VSS12
DQ10
DQ11
VSS1337VSS14
DQ16
DQ17
VSS1543VSS16
DQS#2
DQS247VSS17
VSS1849DQ22
DQ18
DQ1953VSS19
VSS2055DQ28
DQ24
DQ2559VSS21
VSS2261DQS#3
DM3
VSS2365VSS24
DQ26
DQ27
VSS2571VSS26

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#83A11
A9
VDD5
A8
A5
VDD7
A3
A1
VDD999VDD10
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

G1

LCN_DAN06-K4806-0102

LCN_DAN06-K4806-0102
CONN@

CONN@

Standard
<Address(SA1,SA0):00>

2

DDR_A_D4

4

3

VSS3

DQS0

VSS6

VSS8
DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ23

DQ29

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

VTT2

DQ4
DQ5

DQ6
DQ7

DM1

DM2

A15
A14

CK1

BA1

S0#

NC2

DM4

DM6

SDA
SCL

LA-8711

LA-8711

LA-8711

G2

DDR_A_D5

6
8

DDR_A_DQS#0

10

DDR_A_DQS0

12
14

DDR_A_D6

16

DDR_A_D7

18
20

DDR_A_D12

22

DDR_A_D13

24
26
28

DDR3_DRAMRST#

30
32

DDR_A_D14

34

DDR_A_D15

36
38

DDR_A_D20

40

DDR_A_D21

42
44
46
48

DDR_A_D22

50

DDR_A_D23

52
54

DDR_A_D28

56

DDR_A_D29

58
60

DDR_A_DQS#3

62

DDR_A_DQS3

64
66

DDR_A_D30

68

DDR_A_D31

70
72

DDR_CKE1_DIMMA

74
76

DDR_A_MA15

78

DDR_A_MA14

80
82

DDR_A_MA11

84

DDR_A_MA7

86

A7

88

DDR_A_MA6

90

A6

DDR_A_MA4

92

A4

94

DDR_A_MA2

96

A2

DDR_A_MA0

98

A0

100

M_CLK_DDR1

102

M_CLK_DDR#1

104
106

DDR_A_BS1

108

DDR_A_RAS#

110
112

DDR_CS0_DIMMA#

114

M_ODT0

116
118

M_ODT1

120
122
124

+VREF_CA

126
128

DDR_A_D36

130

DDR_A_D37

132
134
136
138

DDR_A_D38

140

DDR_A_D39

142
144

DDR_A_D44

146

DDR_A_D45

148
150

DDR_A_DQS#5

152

DDR_A_DQS5

154
156

DDR_A_D46

158

DDR_A_D47

160
162

DDR_A_D52

164

DDR_A_D53

166
168
170
172

DDR_A_D54

174

DDR_A_D55

176
178

DDR_A_D60

180

DDR_A_D61

182
184

DDR_A_DQS#7

186

DDR_A_DQS7

188
190

DDR_A_D62

192

DDR_A_D63

194
196
198

PCH_SMBDATA

200

PCH_SMBCLK

202
204

206

0.6A@+0.75VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

DDR3_DRAMRST# 6,12

DDR_CKE1_DIMMA 6

M_CLK_DDR1 6
M_CLK_DDR#1 6

DDR_A_BS1 6
DDR_A_RAS# 6

DDR_CS0_DIMMA# 6
M_ODT0 6

M_ODT1 6

1

2

+0.75VS

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

0.1U_0402_16V7K

0.1U_0402_16V7K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

CD10

CD10

1

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

+VREF_CA

CD11

CD11

Deciphered Date

Deciphered Date

Deciphered Date

2

+1.5V

RD3

RD3
1K_0402_1%

1K_0402_1%

RD4

RD4
1K_0402_1%

1K_0402_1%

PCH_SMBDATA 12,14,37,40
PCH_SMBCLK 12,14,37,40

12

12

Title

Title

Title

DDRIII DIMM

DDRIII DIMM

DDRIII DIMM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

LA-8041P

1

11 61Sunday, November 27, 2011

11 61Sunday, November 27, 2011

11 61Sunday, November 27, 2011

0.1

0.1

0.1

5

All VREF traces should

DDR_B_D[0..63]6

D D

DDR_B_DQS[0..7]6

DDR_B_DQS#[0..7]6

DDR_B_MA[0..15]6

have 20 mil trace width

Delete DDR_B_DM[0..7]

+1.5V

12

RD12

RD12
1K_0402_1%

1K_0402_1%

RD11

RD11
1K_0402_1%

1K_0402_1%

C C

Layout Note:
Place near JDIMM1.203 & JDIMM1.204

11/18 for layout spacing: remove CD51/CD54/CD53

+0.75VS

11/21 keep 1u*4 only -Kenny

CD53

CD53

CD51

1U_0402_6.3V6K

CD51

1U_0402_6.3V6K

CD41

1U_0402_6.3V6K

CD41

1U_0402_6.3V6K

1

1

1

2

2

2

B B

Layout Note:
Place near JDIMM1

+1.5V

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CD37

CD37

1

1

2

2

CD46

CD46

1

2

+V_DDR_REFB

10/03 change to +V_DDR_REFB

12

1U_0402_6.3V6K

1U_0402_6.3V6K

CD48

CD48

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

Layout Note: Place these 4 Caps near Command
and Control signals of DIMMA

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CD45

CD45

CD40

CD40

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CD56

CD56

CD42

CD42

1

1

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

CD44

CD44

CD43

CD43

1

1

2

2

DDR3 SO-DIMM B

+1.5V

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
CD34

CD34

CD33

CD33

1

A A

1

@

@

@

@

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
CD32

CD32

CD35

CD35

1

1

@

@

@

@

2

2

4

10/03 change to +V_DDR_REFB

0.1U_0402_16V7K

0.1U_0402_16V7K
CD47

CD47

1

2

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K
CD39

CD39

+V_DDR_REFB

1

+

+

CD36

CD36
330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

2

SGA00004400

SGA00004400

+3VS

0.1U_0402_16V7K

0.1U_0402_16V7K

CD29

2.2U_0603_6.3V6K

CD29

2.2U_0603_6.3V6K

CD50

CD50

1

1

2

2

DDR_CKE0_DIMMB6

DDR_B_BS26

M_CLK_DDR26
M_CLK_DDR#26

DDR_B_BS06

DDR_B_WE#6
DDR_B_CAS#6

DDR_CS1_DIMMB#6

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

CD31

CD31

1

2

10/05 change to PH.

+1.5V +1.5V

+V_DDR_REFB

DDR_B_D0
DDR_B_D1

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_D26
DDR_B_D27

DDR_CKE0_DIMMB

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

M_CLK_DDR2
M_CLK_DDR#2

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_CS1_DIMMB#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_D58
DDR_B_D59

RD7 10K_0402_5%RD7 10K_0402_5%

1 2

0.1U_0402_16V7K

0.1U_0402_16V7K
CD38

CD38

1

2

+3VS

RD9

10K_0402_5%

RD9

10K_0402_5%

12

3

DDR3 SO-DIMM B

3.56A@+1.5V

JDDRL2

JDDRL2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1
VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9
VSS925VSS10

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2
DQS247VSS17
VSS1849DQ22

51

DQ18
DQ1953VSS19
VSS2055DQ28

57

DQ24
DQ2559VSS21
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3
A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4406-0102

LCN_DAN06-K4406-0102
CONN@

CONN@

Standard
<Address(SA1,SA0):10>

VSS3

DQS0

VSS6

VSS8
DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ23

DQ29

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

VTT2

2
4

DQ4

6

DQ5

8
10
12
14
16

DQ6

18

DQ7

20
22
24
26
28

DM1

30
32
34
36
38
40
42
44
46

DM2

48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78

A15

80

A14

82
84
86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102

CK1

104
106
108

BA1

110
112
114

S0#

116
118
120
122

NC2

124
126
128
130
132
134
136

DM4

138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170

DM6

172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

SDA

202

SCL

204

206

G2

DDR_B_D4
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D6
DDR_B_D7

DDR_B_D12
DDR_B_D13

DDR3_DRAMRST#

DDR_B_D14
DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_D22
DDR_B_D23

DDR_B_D28
DDR_B_D29

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D30
DDR_B_D31

DDR_CKE1_DIMMB

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4

DDR_B_MA2
DDR_B_MA0

M_CLK_DDR3
M_CLK_DDR#3

DDR_B_BS1
DDR_B_RAS#

DDR_CS0_DIMMB#
M_ODT2

M_ODT3

+VREF_CB

DDR_B_D36
DDR_B_D37

DDR_B_D38
DDR_B_D39

DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D52
DDR_B_D53

DDR_B_D54
DDR_B_D55

DDR_B_D60
DDR_B_D61

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

PCH_SMBDATA
PCH_SMBCLK

0.6A@+0.75VS

+0.75VS

DDR3_DRAMRST# 6,11

DDR_CKE1_DIMMB 6

M_CLK_DDR3 6
M_CLK_DDR#3 6

DDR_B_BS1 6
DDR_B_RAS# 6

DDR_CS0_DIMMB# 6
M_ODT2 6

M_ODT3 6

0.1U_0402_16V7K

0.1U_0402_16V7K

CD55

CD55

1

2

2

+1.5V

12

RD8

RD8
1K_0402_1%

+VREF_CB

CD30

2.2U_0603_6.3V6K

CD30

2.2U_0603_6.3V6K

1

2

1K_0402_1%

12

RD10

RD10
1K_0402_1%

1K_0402_1%

PCH_SMBDATA 11,14,37,40
PCH_SMBCLK 11,14,37,40

10/03 change to +VREF_CB

1

Security Classification

Security Classification

SI# 8/16 Reserve 4 pcs 0.1uF for EMI noise issue

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

DDRIII-DDRH

DDRIII-DDRH

DDRIII-DDRH

1

12 61Sunday, November 27, 2011

12 61Sunday, November 27, 2011

12 61Sunday, November 27, 2011

0.1

0.1

0.1

5

PCH_RTCX1

1 2

RH115 10M_0402_5%RH115 10M_0402_5%

Y2

Y2

1 2

32.768KHZ_12.5PF_CM31532768DZFT

32.768KHZ_12.5PF_CM31532768DZFT
18P_0402_50V8J

18P_0402_50V8J

1

CH2

CH2

2

D D

DB# 11/1 Reserv e 10pF by RF re quest

HDA_BIT_CLK

HDA_BITCLK_AUDIO38

HDA_RST_AUDIO#38

HDA_SYNC_AUDIO38

C C

+3V_PCH +3V_PCH+3V_PCH

12

RH127

@RH127

@

200_0402_5%

200_0402_5%

PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS

12

RH133

RH133

100_0402_1%

100_0402_1%

B B

SPI ROM FOR ME (8MByte )

+3V_PCH

RH141

RH141

1 2

RH145

RH145

1 2

RH144

RH144

1 2

+3V_SPI

20mils

1

CH6

CH6

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

PCH_RTCX2

1

CH3

CH3
18P_0402_50V8J

18P_0402_50V8J

2

@

@

CH82

CH82

1 2

10P_0402_50V8J

10P_0402_50V8J

1M_0402_5%

1M_0402_5%

1 2

RH119 33_0402_5%RH119 33_0402_5%

1 2

RH120 33_0402_5%RH120 33_0402_5%

1 2

RH121 33_0402_5%RH121 33_0402_5%

1 2

+RTCBATT

RH117 20K_0402_5%RH117 20K_0402_5%

RH118 20K_0402_5%RH118 20K_0402_5%

HDA_BIT_CLK

HDA_RST#

RH158

RH158

+RTCBATT

RH116

RH116

CH4

CH4

1U_0603_10V4Z

1U_0603_10V4Z

1 2

1 2

CH5

CH5

1U_0603_10V4Z

1U_0603_10V4Z

+5VS

G

G

QH1

QH1

S

S

SB000002X00

SB000002X00

BSS138W-7-F_SOT323-3

BSS138W-7-F_SOT323-3

1 2

RH122 0_0402_5%@RH122 0_0402_5%@

Follow intel ME update requirement

1 2

RH123 0_0402_5%RH123 0_0402_5%

1 2

RH125 33_0402_5%RH 125 33_0402_5%

12

RH128

@RH128

@

200_0402_5%

200_0402_5%

12

RH134

RH134
100_0402_1%

100_0402_1%

HDA_SDO36

HDA_SDOUT_AUDIO38

12

RH129

@RH129

@

200_0402_5%

200_0402_5%

12

RH135

RH135

100_0402_1%

100_0402_1%

PCH_JTAG_TCK

12

RH15051_0402_5% RH15051_0402_5%

8MByte SPI ROM PN SA000039A00

@

@

PCH_SPI_CS0#_R

3.3K_0402_5%

3.3K_0402_5%

PCH_SPI_WP#

3.3K_0402_5%

3.3K_0402_5%

PCH_SPI_HOLD#

3.3K_0402_5%

3.3K_0402_5%

+3V_SPI

1

CH8

CH8
22P_0402_50V8J

22P_0402_50V8J

2

@

@

DB# 11/1 Reserv e for RF please close to UH2

+3V_PCH +3V_SPI

PCH_SPI_CS0#

RH142 0_0402_5%RH142 0_0402_5%

PCH_SPI_CLK

RH146 0_0402_5%RH146 0_0402_5%

PCH_SPI_SI

RH147 0_0402_5%RH147 0_0402_5%

1 2

1M_0402_5%

1M_0402_5%

1

12

CMOS

CLRP1

CLRP1

SHORT PADS

SHORT PADS

2

1

12

CLRP2

CLRP2

SHORT PADS

SHORT PADS

2

ME CMOS

CLP1 & CLP2 place near DIMM

2

HDA_SPKR38

HDA_SYNCHDA_SYNC_R

13

D

D

HDA_SDIN038

HDA_SDOUT

HDA_SDOUT

R213 0_0402_5%R213 0_0402_5%

1 2

PCH_SPI_WP#

PCH_SPI_HOLD#

1 2

1 2

12

SM_INTRUDER#

PCH_SPI_CS0#_R

PCH_SPI_CLK_R

PCH_SPI_SI_R

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_SI

PCH_SPI_SO

4

UH1A

UH1A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST # / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

UH2

CONN@UH2

CONN@

8

3

7

1

6

5

64M MX25L6405DZNI-12G WSON 8P

64M MX25L6405DZNI-12G WSON 8P

VCC

W

HOLD

S

C

D

4

VSS

PCH_SPI_SO_R

2

Q

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LPC

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

RTCIHDA

RTCIHDA

JTAG

JTAG

SPI

SPI

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP

SATA 6G

SATA 6G

SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

&UH2

&UH2

@

@

64M MX25L6405DZNI-12G WSON 8P

64M MX25L6405DZNI-12G WSON 8P

PCH_SPI_SO

12

RH1430_0402_5% RH1430_0402_5%

C38
A38
B37
C37

D36

E36
K36

V5

AM3
AM1
AP7
AP5

AM10
AM8
AP11
AP10

AD7
AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#

SERIRQ

SATA_COMP

SATA3_COMP

RBIAS_SATA3

SATA_LED#

HDDHALT_LED#

BBS_BIT0_R

3

LPC_AD0 31,36
LPC_AD1 31,36
LPC_AD2 31,36
LPC_AD3 31,36

LPC_FRAME# 31,36

SERIRQ 36

1 2

RH130 37.4_0402_1%RH130 37.4_0402_1%

1 2

RH132 49.9_0402_1%RH132 49.9_0402_1%

1 2

RH137 750_0402_1%RH137 750_0402_1%

SATA_LED# 35

HDDHALT_LED# 35

R60 10K_0402_5%R60 10K_0402_5%

1 2

Reserve for EMI please close t o U48

+1.05VS_VCC_SATA

+1.05VS_SATA3

@

@

CH1

CH1

12

22P_0402_50V8J

22P_0402_50V8J

+3VS

RH151

RH151

1 2

33_0402_5%

33_0402_5%

@

@

SATA_PRX_DTX_N0 33
SATA_PRX_DTX_P0 33
SATA_PTX_DRX_N0 33
SATA_PTX_DRX_P0 33

SATA_PRX_DTX_N1 33
SATA_PRX_DTX_P1 33
SATA_PTX_DRX_N1 33
SATA_PTX_DRX_P1 33

SATA_PRX_DTX_N2 33
SATA_PRX_DTX_P2 33
SATA_PTX_DRX_N2 33
SATA_PTX_DRX_P2 33

Place CH95 clos e to PCH.

PCH_SPI_CLK

2

SATA HDD

m-SATA SSD

SATA ODD

HDA_SDO

ME debug mode , this signal has a weak internal PD

L=>security measures defined in the Flash
Descriptor will be in effect (default)

H=>Flash Descriptor Security will be overridden

RTC Battery

+RTCVCC

W=20mils

1

CH7

CH7
1U_0603_10V4Z

1U_0603_10V4Z

2

1

BAV70W 3P C/C_SOT-323

BAV70W 3P C/C_SOT-323

1K_0402_5%

1K_0402_5%

RH148

DH1

DH1

RH148

2

3

+3VLP

W=20mils

Should be ACES_50273-0020N-001_2P,need check

1

HDA_SYNC

This signal has a weak interna l pull-down
On Die PLL VR i s supplied by

1.5V when smapl ed high

1.8V when sampl ed low
Needs to be pul led High for Ch ief River platf rom

HDA_SYNC

RH149 1K_0402_5%RH149 1K_0402_5%

PCH_INTVRMEN

RH124 330K_0402_5%RH124 330K_0402_5%

PCH_INTVRMEN

RH126 330K_0402_5%@RH126 330K_0402_5%@

INTVRMEN

H：Integrated VRM enable

*

L：Integrated VRM disable

SERIRQ

HDDHALT_LED#

RH131 10K_0402_5%RH131 10K_0402_5%

RH136 10K_0402_5%RH136 10K_0402_5%

SATA_LED#

RH138 10K_0402_5%RH138 10K_0402_5%

HDA_SPKR

RH139 1K_0402_5%@RH139 1K_0402_5%@

*

HDA_SDOUT

RH140 1K_0402_5%@RH140 1K_0402_5%@

Low = Disabled

*

High = Enabled

LOW=Default
HIGH=No Reboot

+3V_PCH

12

+RTCVCC

12

12

+3VS

12

12

12

+3VS

12

+3V_PCH

12

11/24 according RTC spec swap RTC to pin1

+RTCBATT

20mils

10mils20mils

12

ACES_50273-0020N-001

ACES_50273-0020N-001

1

1

2

2

3

G1

4

G2

JRTC1

CONN@JRTC1

CONN@

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (1/8) SATA,HDA,SPI, LPC

PCH (1/8) SATA,HDA,SPI, LPC

PCH (1/8) SATA,HDA,SPI, LPC

LA-8711

LA-8711

LA-8711

1

13 57Sunday, November 27, 2011

13 57Sunday, November 27, 2011

13 57Sunday, November 27, 2011

0.1

0.1

0.1

5

PCIE_PRX_DTX_N134

PCIE LAN

MiniWLAN --->

D D

PCIE_PRX_DTX_P134
PCIE_PTX_C_DRX_N134
PCIE_PTX_C_DRX_P134

PCIE_PRX_DTX_N331

PCIE_PRX_DTX_P331
PCIE_PTX_C_DRX_N331
PCIE_PTX_C_DRX_P331

Card Reader+ Giga LAn--->

C C

B B

3

YH2

OSC1OSC

GND2GND

YH2

4

27P_0402_50V8J

27P_0402_50V8J

1

CH12

CH12

2

25MHZ_20PF_FSX3M-25.M20FDO

25MHZ_20PF_FSX3M-25.M20FDO

WLAN--->

XTAL25_IN

XTAL25_OUT

12

RH1871M_0402_5% RH1871M_0402_5%

27P_0402_50V8J

27P_0402_50V8J

1

CH13

CH13

2

CLK_PCIE_MINI1#31
CLK_PCIE_MINI131

CLK_RES_ITP#7

CLK_RES_ITP7

CH10 0.1U_0402_10V7KCH10 0.1U_0402_10V7K
CH11 0.1U_0402_10V7KCH11 0.1U_0402_10V7K

CLK_PCIE_CD#34
CLK_PCIE_CD34

+3V_PCH

LAN_CLKREQ#34

+3VS

MINI1_CLKREQ#31

+3VS

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

CLK_PCH_14M

CH37 0.1U_0402_10V7KCH37 0.1U_0402_10V7K

1 2

CH9 0.1U_0402_10V7KCH9 0.1U_0402_10V7K

1 2

1 2
1 2

RH182 10K_0402_5%RH182 10K_0402_5%

RH180 10K_0402_5%RH180 10K_0402_5%

RH177 10K_0402_5%RH177 10K_0402_5%

RH320 10K_0402_5%RH320 10K_0402_5%

RH183 10K_0402_5%RH183 10K_0402_5%

RH185 10K_0402_5%RH185 10K_0402_5%

RH189 10K_0402_5%RH189 10K_0402_5%

RH190 0_0402_5%@RH190 0_0402_5%@
RH191 0_0402_5%@RH191 0_0402_5%@

4

RH4 0_0402_5%RH4 0_0402_5%
RH5 0_0402_5%RH5 0_0402_5%

RH171

RH171

10K_0402_5%

10K_0402_5%

1 2

RH175 10K_0402_5%RH175 10K_0402_5%

12

MINI1CLK_REQ#

1 2

12

12

1 2

1 2

1 2

1 2

12
12

@

@

RH193

RH193

12

33_0402_5%

33_0402_5%

1 2

22P_0402_50V8J

22P_0402_50V8J

PCIE_PRX_DTX_N1
PCIE_PRX_DTX_P1
PCIE_PTX_DRX_N1
PCIE_PTX_DRX_P1

PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3
PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3

12
12

CLK_PCIE_MINI1#
CLK_PCIE_MINI1

CLK_BCLK_ITP#
CLK_BCLK_ITP

@

@

CH14

CH14

PCIE_CD#
PCIE_CD

UH1B

UH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_ B_N

AB40

CLKOUT_PEG_ B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

SMBUSController

SMBUSController

SML1ALERT# / PCH HOT# / GPIO74

PCI-E*

PCI-E*

CLOCKS

CLOCKS

3

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_ A_N
CLKOUT_PEG_ A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKOUT_DP_ N

CLKOUT_DP_ P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_GND1_N

CLKIN_GND1_P

CLKIN_DOT_96 N
CLKIN_DOT_96 P

CLKIN_SATA_N

CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

FLEX CLOCKS

SMBCLK

SMBDATA

SML0CLK

CL_CLK1

CL_DATA1

CL_RST1#

XTAL25_IN

SMBALERT#

E12

SMBCLK

H14

SMBDATA

C9

DRAMRST_CNTRL_PCH

A12

SML0CLK

C8

SML0DATA

G12

GPIO74

C13

SML1CLK

E14

SML1DATA

M16

M7

T11

P10

PEG_CLKREQ#_R

M10

CLK_VGA#

AB37

CLK_VGA

AB38

AV22

CLK_CPU_DMI_PCH

AU22

AM12
AM13

CLKIN_DMI#

BF18

CLKIN_DMI

BE18

CLKIN_DMI2#

BJ30

CLKIN_DMI2

BG30

CLKIN_DOT96#

G24

CLKIN_DOT96

E24

CLKIN_SATA#

AK7

CLKIN_SATA

AK5

CLK_PCH_14M

K45

CLK_PCI_LPBACK

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

K43

F47

H47

DGPU_PRSNT#

K49

T1616 PAD~D@ T1616 PAD~D@
T1628 PAD~D@ T1628 PAD~D@

T1615 PAD~D@ T1615 PAD~D@

T1627 PAD~D@ T1627 PAD~D@

T1629 PAD~D@ T1629 PAD~D@

RH155 10K_0402_5%RH155 10K_0402_5%

1 2

DRAMRST_CNTRL_PCH 6,9

+3V_PCH

12

RH8

RH8
10K_0402_5%

10K_0402_5%

12

12
12

RH172 0_0402_5%RH172 0_0402_5%

1 2

RH173 0_0402_5%RH173 0_0402_5%

1 2

CLK_PCI_LPBACK 16

1 2

RH184 90.9_0402_1%RH184 90.9_0402_1%

R2860_0402_5% R2860_0402_5%

R2750_0402_5% R2750_0402_5%
R2760_0402_5% R2760_0402_5%

2

+3V_PCH

VGA_CLKREQ# 22

CLK_PCIE_VGA# 21
CLK_PCIE_VGA 21

CLK_CPU_DMI#CLK_CPU_DMI#_PCH
CLK_CPU_DMI

+1.05VS_VCCDIFFCLKN

+3VS

1 2

1 2

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6

SMBCLK

SMBDATA

RH316

RH316
10K_0402_5%UMA@

10K_0402_5%UMA@

RH318

RH318
10K_0402_5%PX@

10K_0402_5%PX@

DB# 10/14 check to intel

CLK_CPU_DMI# 5
CLK_CPU_DMI 5

2

6 1

QH2A

QH2A

RH192

@RH192

@

1 2

0_0402_5%

0_0402_5%

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6

1

SMBDATA

SMBCLK

SML0CLK

SML0DATA

SML1CLK

SML1DATA

GPIO74

DRAMRST_CNTRL_PCH

CLKIN_DMI2#
CLKIN_DMI2
CLKIN_DMI#
CLKIN_DMI
CLKIN_DOT96#
CLKIN_DOT96
CLKIN_SATA#
CLKIN_SATA
CLK_PCH_14M

If use extenal CLK gen, please place close to CLK gen
else, please place close to PCH

+3VS

2.2K_0402_5%

2.2K_0402_5%

5

3 4

QH2B

QH2B

RH194

RH194

1 2

0_0402_5%

0_0402_5%

@

@

+3VS

1 2

RH152 2.2K_0402_5%RH152 2.2K_0402_5%

1 2

RH153 2.2K_0402_5%RH153 2.2K_0402_5%

1 2

RH156 2.2K_0402_5%RH156 2.2K_0402_5%

1 2

RH157 2.2K_0402_5%RH157 2.2K_0402_5%

1 2

RH159 2.2K_0402_5%RH159 2.2K_0402_5%

1 2

RH160 2.2K_0402_5%RH160 2.2K_0402_5%

RH263 10K_0402_5%RH263 10K_0402_5%

1 2

1 2

RH161 1K_0402_5%RH161 1K_0402_5%

RH176

RH176

1 2

1M_0402_5%@

1M_0402_5%@

RH162 10K_0402_5%RH162 10K_0402_5%

1 2

RH163 10K_0402_5%RH163 10K_0402_5%

1 2

RH164 10K_0402_5%RH164 10K_0402_5%

1 2

RH165 10K_0402_5%RH165 10K_0402_5%

1 2

RH166 10K_0402_5%RH166 10K_0402_5%

1 2

RH167 10K_0402_5%RH167 10K_0402_5%

1 2

RH168 10K_0402_5%RH168 10K_0402_5%

1 2

RH169 10K_0402_5%RH169 10K_0402_5%

1 2

RH170 10K_0402_5%RH170 10K_0402_5%

1 2

+3VS

RH186

RH186

+3VS

1 2

RH188

RH188

2.2K_0402_5%

2.2K_0402_5%

1 2

PCH_SMBCLK 11,12,37,40

PCH_SMBDATA 11,12,37,40

+3V_PCH

Reserve for EMI please close t o UH1

RH291

@

@

@

12

1 2

22P_0402_50V8J

22P_0402_50V8J

@

CH15

CH15

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6

SML1CLK

6 1

SML1DATA

2

QH6A

QH6A

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6

RH195

CLK_PCI_LPBACK

Reserve for EMI please close t o
UH1

A A

RH195

33_0402_5%

33_0402_5%

2.2K_0402_5%

2.2K_0402_5%

5

3 4

QH6B

QH6B

RH291

1 2

RH311

RH311

2.2K_0402_5%

2.2K_0402_5%

1 2

EC_SMB_CK2 22,36

EC_SMB_DA2 22,36

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

5

4

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

PCH (2/8) PCIE, SMBUS, CLK

PCH (2/8) PCIE, SMBUS, CLK

LA-8711

LA-8711

LA-8711

1

14 57Sunday, November 27, 2011

14 57Sunday, November 27, 2011

14 57Sunday, November 27, 2011

0.1

0.1

0.1

5

UH1C

DMI_CTX_PRX_N04
DMI_CTX_PRX_N14
DMI_CTX_PRX_N24
DMI_CTX_PRX_N34

DMI_CTX_PRX_P04
DMI_CTX_PRX_P14
DMI_CTX_PRX_P24
DMI_CTX_PRX_P34

D D

XDP_DBRESET#5

SYS_PWROK5

C C

PCH_RSMRST#36

PCH_GPIO29

B B

GPIO72

RI#

WAKE#

ACIN_R

SUSWARN#

PCH_RSMRST#

PCH_PWROK

A A

DMI_CRX_PTX_N04
DMI_CRX_PTX_N14
DMI_CRX_PTX_N24
DMI_CRX_PTX_N34

DMI_CRX_PTX_P04
DMI_CRX_PTX_P14
DMI_CRX_PTX_P24
DMI_CRX_PTX_P34

+1.05VS

RH196 49.9_0402_1%RH196 49.9_0402_1%

RH197 750_0402_1%RH197 750_04 02_1%

4mil width and place
within 500mil of the PCH

SUSWARN# SUSACK#_R

SUSACK#36

SYS_PWROK

PCH_PWROK36

PM_DRAM_PWRGD5

SUSWARN#36

PBTN_OUT#36

C268

PCH_PWROK

PCH_RSMRST# PCH_RSMRST#_R

ACIN22,36,48

RH228 10 K_0402_5%RH228 10 K_0402_5%

1 2

RH210 10 K_0402_5%RH210 10 K_0402_5%

1 2

RH211 10 K_0402_5%RH211 10 K_0402_5%

1 2

RH212 10 K_0402_5%RH212 10 K_0402_5%

1 2

RH214 100K_0402_5%RH214 100K_0402_5%

1 2

RH216 10 K_0402_5%RH216 10 K_0402_5%

1 2

RH217 10 K_0402_5%RH217 10 K_0402_5%

1 2

@C268

@

1 2

100P_0402_50V8J

100P_0402_50V8J

PCH_PWROK

VGATE55

RH223 10K_0402_5%RH223 10K_0402_5%

5

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

1 2

1 2

RH198 0_0402_ 5%

RH198 0_0402_ 5%

RH200 0_0402_ 5%RH200 0_0402_ 5%

RH202 0_0402_5%RH202 0_0402_5%

RH203 0_0402_5%RH203 0_0402_5%

RH206 0_0402_5%RH206 0_0402_5%

RH208 0_0402_5%RH208 0_0402_5%

RH209 0_0402_5%RH209 0_0402_5%

DH2 CH751H-40PT_SOD323-2DH2 CH75 1H-40PT_SOD323-2

GPIO72

1

2

DMI_IRCOMP

RBIAS_CPY

@

@

1 2

SUSACK#_R

1 2

XDP_DBRESET#

1 2

PM_PWROK_R

1 2

1 2

RH204 0_0402_5%RH204 0_0402_5%

PM_DRAM_PWRGD

1 2

SUSWARN#_R

1 2

PBTN_OUT#_R

1 2

ACIN_R

21

RI#

+3V_PCH

+3VS

5

UH3

UH3

IN1

VCC

SYS_PWROK

4

OUT

IN2

GND

MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

3

12

SYS_PWROK

UH1C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

RH213 330K_0402_5%RH213 330K_0402_5%

DSWODVREN

DSWODVREN

RH215 330K_0402_5%

RH215 330K_0402_5%

DSWODVREN - On Die DSW VR Enable

H：Enable

*

L：Disable

4

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5

DMI

DMI

System Power Management

System Power Management

@

@

FDI_RXP6

FDI

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

Check EC for S3 S4 LED

12

12

+3VS

RH218 8.2K_0402_5%RH218 8.2K_0402_5%

1 2

RH219 2.2K_0402_5%RH219 2.2K_0402_5%

1 2

RH221 2.2K_0402_5%RH221 2.2K_0402_5%

1 2

1 2

RH222 2.37K_0402_1 %RH222 2.37K_0402_1%

1 2

RH224 100K_0402_5%RH224 100K_0402_5%

1 2

RH225 100K_0 402_5%RH225 100K_0402_5%

4

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

+RTCVCC

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWODVREN

PCH_DPWROK

WAKE#

SUS_STAT#

SUSCLK

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

PM_SLP_SUS#

H_PM_SYNC

PCH_GPIO29

LVDS_IBG

PCH_ENVDD

ENBKL

RH199 0_0402_5%RH199 0_0402_5%

1 2

1 2

RH201 0_0402_5%RH201 0_0402_5%

PM_CLKRUN#

12

RH205 0_0402_5%RH205 0_0402_5%

SLP_A# 36

SPOK47,49

PM_CLKRUN#

CTRL_CLK

CTRL_DATA

FDI_CTX_PRX_N0 4
FDI_CTX_PRX_N1 4
FDI_CTX_PRX_N2 4
FDI_CTX_PRX_N3 4
FDI_CTX_PRX_N4 4
FDI_CTX_PRX_N5 4
FDI_CTX_PRX_N6 4
FDI_CTX_PRX_N7 4

FDI_CTX_PRX_P0 4
FDI_CTX_PRX_P1 4
FDI_CTX_PRX_P2 4
FDI_CTX_PRX_P3 4
FDI_CTX_PRX_P4 4
FDI_CTX_PRX_P5 4
FDI_CTX_PRX_P6 4
FDI_CTX_PRX_P7 4

FDI_INT 4

FDI_FSYNC0 4

FDI_FSYNC1 4

FDI_LSYNC0 4

FDI_LSYNC1 4

PCH_DPWROK 36

T38 PAD~DT38 PAD~D

PM_SLP_S5# 36

PM_SLP_S4# 36

PM_SLP_S3# 36

PM_SLP_SUS# 36

H_PM_SYNC 5

3

PCH_RSMRST#

PCH_PCIE_WAKE# 34

SUSCLK_R 36

2 1

D30 CH751 H-40PT_SOD323-2D30 CH751H-40PT_SOD323-2

21

D29 CH751 H-40PT_SOD323-2D29 CH751H-40PT_SOD323-2

PCH_CRT_CLK30

PCH_CRT_DATA30

PCH_CRT_HSYNC30
PCH_CRT_VSYNC30

PM_CLKRUN#

EC Request
on 20110309

12

RH308

RH308
10K_0402_5%

10K_0402_5%

@

@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

ENBKL36

PCH_ENVDD32

DPST_PWM32

PCH_LCD_CLK32

PCH_LCD_DATA32

1 2

RH207 0_0402_ 5%RH207 0_0402_ 5%

PCH_TXCLK-32
PCH_TXCLK+32

PCH_TXOUT0-32
PCH_TXOUT1-32
PCH_TXOUT2-32

PCH_TXOUT0+32
PCH_TXOUT1+32
PCH_TXOUT2+32

PCH_RSMRST#PCH_PWROK

PCH_CRT_B30
PCH_CRT_G30
PCH_CRT_R30

1K_0402_0.5%

1K_0402_0.5%

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

ENBKL

PCH_LCD_CLK
PCH_LCD_DATA

T37PAD~D T37PAD~D

LVD_VREF

PCH_TXCLK­PCH_TXCLK+

PCH_TXOUT0­PCH_TXOUT1­PCH_TXOUT2-

PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+

PCH_CRT_B
PCH_CRT_G
PCH_CRT_R

PCH_CRT_CLK
PCH_CRT_DATA

PCH_CRT_HSYNC
PCH_CRT_VSYNC

RH220

RH220

Compal Secret Data

Compal Secret Data

Compal Secret Data

CTRL_CLK

CTRL_DATA

LVDS_IBG

CRT_IREF

12

J47

M45

P45

T40
K47

T45
P39

AF37
AF36

AE48
AE47

AK39
AK40

AN48
AM47
AK47

AJ48

AN47
AM49
AK49

AJ47

AF40
AF39

AH45
AH47
AF49
AF45

AH43
AH49
AF47
AF43

N48
P49
T49

T39

M40

M47
M49

T43
T42

Deciphered Date

Deciphered Date

Deciphered Date

UH1D

UH1D

L_BKLTEN
L_VDD_EN

L_BKLTCTL

L_DDC_CLK
L_DDC_DATA

L_CTRL_CLK
L_CTRL_DATA

LVD_IBG
LVD_VBG

LVD_VREFH
LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

2

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

mDP

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

CRT

DMC

2

AP43
AP45

AM42
AM40

AP39

SDVO_INTN

AP40

SDVO_INTP

P38
M39

AT49

DDPB_AUXN

AT47

DDPB_AUXP

AT40

DDPB_HPD

AV42

DDPB_0N

AV40

DDPB_0P

AV45

DDPB_1N

AV46

DDPB_1P

AU48

DDPB_2N

AU47

DDPB_2P

AV47

DDPB_3N

AV49

DDPB_3P

P46
P42

AP47

DDPC_AUXN

AP49

DDPC_AUXP

AT38

DDPC_HPD

AY47

DDPC_0N

AY49

DDPC_0P

AY43

DDPC_1N

AY45

DDPC_1P

BA47

DDPC_2N

BA48

DDPC_2P

BB47

DDPC_3N

BB49

DDPC_3P

M43
M36

AT45

DDPD_AUXN

AT43

DDPD_AUXP

BH41

DDPD_HPD

BB43

DDPD_0N

BB45

DDPD_0P

BF44

DDPD_1N

BE44

DDPD_1P

BF42

DDPD_2N

BE42

DDPD_2P

BJ42

DDPD_3N

BG42

DDPD_3P

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (3/8) DMI,FDI,PM,GFX,DP

PCH (3/8) DMI,FDI,PM,GFX,DP

PCH (3/8) DMI,FDI,PM,GFX,DP

LA-8711

LA-8711

LA-8711

1

PCH_DDPB_CLK 29
PCH_DDPB_DAT 29

PCH_DDPB_HPD 29

PCH_DPB_N2 29
PCH_DPB_P2 2 9
PCH_DPB_N1 29
PCH_DPB_P1 2 9
PCH_DPB_N0 29
PCH_DPB_P0 2 9
PCH_DPB_N3 29
PCH_DPB_P3 2 9

1

HDMI

0.1

0.1

15 57Sunday, November 27, 2011

15 57Sunday, November 27, 2011

15 57Sunday, November 27, 2011

0.1

5

D D

USB3_RX1_N35
USB3_RX2_N35
USB3_RX3_N35

USB3_RX1_P35
USB3_RX2_P35

USB3.0 x3

C C

WL_OFF#31

DB# 10/20 move ACCEL_INT# to P CH_GPIO_02.
PCH_GPIO_03 is reserved for O DD_DA#

AOAC_PME#36

B B

A A

CLK_PCI_LPBACK14

CLK_PCI_LPC36

CLK_PCI_DEBUG31

CLK_PCI_LPC
CLK_PCI_DEBUG

DP_CBL_DET
PCI_PIRQD#
PCI_PIRQB#
PCI_PIRQC#

PIRQH#
GPIO53
ODD_DA#
GPIO51

PCI_PIRQA#

ACCEL_INT#

DGPU_HOLD_RST#

DGPU_SELECT#

PXS_PWREN

WL_OFF#

5

USB3_RX3_P35

USB3_TX1_N35
USB3_TX2_N35
USB3_TX3_N35

USB3_TX1_P35
USB3_TX2_P35
USB3_TX3_P35

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

DGPU_HOLD_RST#21

PXS_PWREN23,53,54,56

WL_OFF#

ACCEL_INT#42

ODD_DA#33

AOAC_PME# PCH_AOAC_PME#

RPH3

RPH3

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RPH4

RPH4

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RH7

RH7

1 2

1 2

RH235 10K_0402_5%@ RH235 10K_0402_5%@

1 2

RH236 10K_0402_5%RH236 10K_0402_5%

1 2

RH237 10K_0402_5%RH237 10K_0402_5%

1 2

RH302 10K_0402_5%RH302 10K_0402_5%

1 2

1 2

RH274 0_0402_5%RH274 0_0402_5%

PLT_RST#5,21,31,34,36

RH230 22_0402_5%RH230 22_0402_5%
RH231 22_0402_5%RH231 22_0402_5%

1 2

RH242 22_0402_5%RH242 22_0402_5%

1 2

8.2K_0402_5%

8.2K_0402_5%

RH6 8.2K_0402_5%RH6 8.2K_0402_5%

DGPU_HOLD_RST#
DGPU_SELECT#
PXS_PWREN

GPIO51
GPIO53

ACCEL_INT#

ODD_DA#
DP_CBL_DET
PIRQH#

PLT_RST#

+3VS

CLK_PCI0CLK_PCI_LPBACK
CLK_PCI1
CLK_PCI2

12

DB# 11/1 Reserve 10pF by RF re quest

CLK_PCI1

4

UH1E

UH1E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

USB3Rn1

BC30

USB3Rn2

BE32

USB3Rn3

BJ32

USB3Rn4

BC28

USB3Rp1

BE30

USB3Rp2

BF32

USB3Rp3

BG32

USB3Rp4

AV26

USB3Tn1

BB26

USB3Tn2

AU28

USB3Tn3

AY30

USB3Tn4

AU26

USB3Tp1

AY26

USB3Tp2

AV28

USB3Tp3

AW30

USB3Tp4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

@

@

CH83

CH83

1 2

10P_0402_50V8J

10P_0402_50V8J

10K_0402_5%

10K_0402_5%

PLT_RST_BUF#31

4

@

@

RH233

RH233

3

AY7

RSVD1

AV7

RSVD2

AU3

RSVD3

BG4

RSVD4

AT10

RSVD5

BC8

RSVD6

AU2

RSVD7

AT4

RSVD8

AT3

RSVD9

AT1

RSVD10

AY3

RSVD11

AT5

RSVD12

AV3

RSVD13

AV1

RSVD14

BB1

RSVD15

BA3

RSVD16

BB5

RSVD17

BB3

RSVD18

BB7

RSVD19

BE8

RSVD20

BD4

RSVD21

BF6

RSVD22

RSVD

RSVD

PCI

PCI

USB

USB

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC6# / GPIO10
OC7# / GPIO14

+3VS

1 2

12

RH234

@RH234

@

100K_0402_5%

100K_0402_5%

AV5

RSVD23

AV10

RSVD24

AT8

RSVD25

AY5

RSVD26

BA2

RSVD27

AT12

RSVD28

BF3

RSVD29

C24

USBP0N

A24

USBP0P

C25

USBP1N

B25

USBP1P

C26

USBP2N

A26

USBP2P

K28

USBP3N

H28

USBP3P

E28

USBP4N

D28

USBP4P

C28

USBP5N

A28

USBP5P

C29

USBP6N

B29

USBP6P

N28

USBP7N

M28

USBP7P

L30

USBP8N

K30

USBP8P

G30

USBP9N

E30

USBP9P

C30

USBP10N

A30

USBP10P

L32

USBP11N

K32

USBP11P

G32

USBP12N

E32

USBP12P

C32

USBP13N

A32

USBP13P

C33

USBRBIAS#

B33

USBRBIAS

A14
K20
B17
C16
L16
A16

OC5# / GPIO9

D14
C14

1 2

RH232 0_0402_5%RH232 0_0402_5%

+3VS

5

UH4

@UH4

@

P

IN1

4

O

IN2

G

SN74AHC1G08DCKR_SC70-5

SN74AHC1G08DCKR_SC70-5

3

1

2

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3

USB20_N8
USB20_P8
USB20_N9
USB20_P9
USB20_N10
USB20_P10

USBRBIAS

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

Within 500 mils

RH229 22.6_0402_1%RH229 22.6_0402_1%

PLT_RST#

USB20_N0 35
USB20_P0 35
USB20_N1 35
USB20_P1 35
USB20_N2 35
USB20_P2 35
USB20_N3 42
USB20_P3 42

USB20_N8 32
USB20_P8 32
USB20_N9 35
USB20_P9 35
USB20_N10 31
USB20_P10 31

1 2

To USB3.0 connector
(Port 0 & 1 & 2)

USB2.0 Finger Print (Port 3)

Camera

USB2.0 and sleep charger(Port 9)

mPCIE-WLAN/BT

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

Deciphered Date

Deciphered Date

Deciphered Date

2

1

+3V_PCH

RPH1

USB_OC3#
USB_OC2#

USB_OC0#35

USB_OC0#
USB_OC1#

USB_OC4#
USB_OC6#
USB_OC7#
USB_OC5#

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (4/8) PCI, USB, NVRAM

PCH (4/8) PCI, USB, NVRAM

PCH (4/8) PCI, USB, NVRAM

LA-8711

LA-8711

LA-8711

RPH1

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

10K_1206_8P4R_5%

RPH2

RPH2

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

10K_1206_8P4R_5%

1

0.1

0.1

16 57Sunday, November 27, 2011

16 57Sunday, November 27, 2011

16 57Sunday, November 27, 2011

0.1

5

D D

GPIO28

On-Die PLL Voltage Regulator

This signal has a weak internal pull up

H：On-Die voltage regulator enabl e

*

L：On-Die PLL Voltage Regulator d isable

+3V_PCH

RH267 10K_0402_5%RH267 10K_0402_5%

RH241 1K_0402_5%

RH241 1K_0402_5%

PCH_GPIO37

C C

FDI TERMINATION VOLTAGE OVERRIDE

LOW - Tx, Rx terminated

*

to same voltage
(DC Coupling Mode)

+3VS

RH245 1K_0402_5%@RH245 1K_0402_5%@

RH246

RH246

1 2

1 2

@

@

12

12

100K_0402_5%

100K_0402_5%

SLP_ME_CSW_DEV#

SLP_ME_CSW_DEV#

PCH_GPIO37

PCH_GPIO37

DB# 10/20 Common BT_ON is GPIO 34
(Rout to GPIO 38 currently), G PIO 38 pull
high 10K to 3VS only

GPIO27

PCH_GPIO27 (Have internal Pull-High)
High: VCCVRM VR Enable

*

Low: VCCVRM VR Disable

RH250 10K_0402_5%@ RH250 10K_0402_5%@

B B

A A

DB# 10/20 Reserve GPIO 36 pull up resistor
and add pull down resistor

DB# 11/23 pull up +3VS for ODD _detect#

+3VS

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

1 2

@ RH255

@

RH301

RH301

RH255

PCH_GPIO27

12

12

ODD_DETECT#

ODD_DETECT#

EC_LID_OUT#36

SLP_ME_CSW_DEV#36

BT_ON#31

ODD_DETECT#33

HDD_DETECT#33

4

GPIO036

EC_SCI#36

EC_SMI#36

RH154 0_0402_5%RH154 0_0402_5%

VGA_PWRGD56

DDR3L_EN51

12

VGA_PWRGD

BT_ON#

ODD_DETECT#

GPIO49

HDD_DETECT#

GPIO0

GPIO1

GPIO6

EC_SCI#

EC_SMI#

DMC_DET#

EC_LID_OUT#_R

PCH_GPIO16

PCH_GPIO22

DDR3L_EN

PCH_GPIO27

SLP_ME_CSW_DEV#

PCH_GPIO35

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

PCH_GPIO48

UH1F

UH1F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

3

ODD_EN#

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

PCH_PECI_R

EC_KBRST#

H_THERMTRIP#_C

NV_CLE

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

GPIO

GPIO

CPU/MISC

CPU/MISC

NCTF

NCTF

@

1 2

RH2390_0402_5%@RH2390_0402_5%

1 2

ODD_EN# 33

RH240390_0402_5% RH240390_0402_5%

H_PECI 5,36

EC_KBRST# 36

H_CPUPWRGD 5

H_THEMTRIP#

2

+3VS

11/24 Kirk review need pu +3VS; but not in check list.

RH280

RH280
10K_0402_5%

10K_0402_5%

1 2

+3VS

RH238

RH238
10K_0402_5%

10K_0402_5%

1 2

GATEA20 36

+1.8VS

H_THEMTRIP# 5

RH227 1K_0402_5%RH227 1K_0402_5%

12

Layout note: CLOSE TO THE BRANCHING POINT

GPIO0

PCH_GPIO38

PCH_GPIO48

PCH_GPIO22

BT_ON#

PCH_GPIO39

VGA_PWRGD

GPIO49

ODD_EN#

GPIO6

GPIO1

EC_KBRST#

PCH_GPIO35

PCH_GPIO16

DDR3L_EN

HDD_DETECT#

DMC_DET#

EC_LID_OUT#_R

EC_SMI#

12

RH254 10K_0402_5%RH254 10K_0402_5%

RH226

RH226

2.2K_0402_5%

2.2K_0402_5%

RH310 10K_0402_5%RH310 10K_0402_5%

1 2

RH243 10K_0402_5%RH243 10K_0402_5%

1 2

RH244 10K_0402_5%RH244 10K_0402_5%

1 2

RH295 10K_0402_5%RH295 10K_0402_5%

1 2

RH273 10K_0402_5%RH273 10K_0402_5%

1 2

RH247 10K_0402_5%RH247 10K_0402_5%

1 2

1 2

RH248

@RH248

@

1 2

RH249

RH249

1 2

RH251

RH251

1 2

RH252

RH252

1 2

RH253

@RH253

@

1 2

1 2

RH256

RH256

1 2

RH257

RH257

1 2

RH258

RH258

1 2

RH259

RH259

1 2

RH260

RH260

1 2

RH261

RH261

1 2

RH262

RH262

H_SNB_IVB# 5

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

1K_0402_5%

1K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

1

+3VS

+3V_PCH

+3VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (5/8) GPIO, CPU, MISC

PCH (5/8) GPIO, CPU, MISC

PCH (5/8) GPIO, CPU, MISC

LA-8711

LA-8711

LA-8711

1

17 57Sunday, November 27, 2011

17 57Sunday, November 27, 2011

17 57Sunday, November 27, 2011

of

0.1

0.1

0.1

5

4

3

2

1

+1.05VS

1

CH17

CH17

10U_0603_6.3V6M

D D

+1.05VS

+1.05VS

C C

+1.05VS

B B

10U_0603_6.3V6M

12

RH264 0_0603_5%

RH264 0_0603_5%

@

@

RH297

RH297

1 2

0_0805_5%

0_0805_5%

+3VS

12

RH268

RH268
0_0805_5%

0_0805_5%

1

0.1U_0402_10V7K

0.1U_0402_10V7K

2

Place CH53 Near AP13,AP15 pin

RH270 0_0603_5%

RH270 0_0603_5%

Place CH35 Near AP19 pin

1

CH28

CH28

2

10U_0603_6.3V6M

10U_0603_6.3V6M

+3VS_VCCA3GBG

CH35

CH35

12

@

@

1

CH18

2

1

2

CH18

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CH29

CH29

CH30

CH30

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_VCCAPLL_FDI

+1.05VS

1

CH19

CH19

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS

1

CH32

CH32

CH31

CH31

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCAFDI_VRM

RH271

RH271

1 2

0_0805_5%

0_0805_5%

+VCCP_VCCDMI

1

CH16

CH16

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCAPLLEXP

1

CH27

CH27

2

@

@

10U_0805_4VAM

10U_0805_4VAM

+1.05VS_VCCDPLL_FDI

UH1G

UH1G

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

1300mA

POWER

POWER

VCC CORE

VCC CORE

2925mA

VCCIO

VCCIO

FDI

FDI

CRTLVDS

CRTLVDS

DMI

DMI

DFT / SPI HVCMOS

DFT / SPI HVCMOS

60mA

20mA

190mA

1mA

VCCADAC

VSSADAC

1mA

VCCALVDS

VSSALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

VCCSPI

20mA

U48

U47

AK36

AK37

AM37

AM38

AP36

AP37

+3VS_VCC3_3_6

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

+3V_VCCPSPI

V1

CH38

CH38

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCADAC

+VCCP_VCCDMI

+1.05VS_VCC_DMI_CCI

+3VS

+VCCTX_LVDS

0.01U_0402_16V7K

0.01U_0402_16V7K

+VCCAFDI_VRM+1.05VS_VCC_EXP

1

2

1

2

CH23

CH23

1

2

1

2

1

CH21

CH21

CH20

CH20

2

0.01U_0402_16V7K

0.01U_0402_16V7K

Near AP43

1

2

RH265

RH265

1 2

0_0805_5%

0_0805_5%

CH26

CH26

0.1U_0402_10V7K

0.1U_0402_10V7K

1 2

1

CH34

CH34
1U_0402_6.3V6K

1U_0402_6.3V6K

2

+VCCPNAND

CH36

CH36

0.1U_0402_10V7K

0.1U_0402_10V7K

RH272

RH272

1 2

0_0805_5%

0_0805_5%

1

CH22

CH22
10U_0603_6.3V6M

10U_0603_6.3V6M

2

0.1U_0402_10V7K

0.1U_0402_10V7K

1

CH24

CH24

0.01U_0402_16V7K

0.01U_0402_16V7K

2

+VCCP_VCCDMI

RH314

RH314

0_0805_5%

0_0805_5%

1 2

RH269 0_0805_5%RH269 0_0805_5%

+3V_PCH

LH1

LH1

BLM18PG181SN1D_2P

BLM18PG181SN1D_2P

1

CH25

CH25

2

+3VS

+1.05VS

+1.8VS

+3VS

12

0.1UH_MLF1608DR10KT_10%_1608

0.1UH_MLF1608DR10KT_10%_1608
LH2

LH2

0.1uH inductor, 200mA

22U_0805_6.3V6M

22U_0805_6.3V6M

RH266

RH266

1 2

1

0_0805_5%

0_0805_5%

CH33

CH33

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.8VS

12

+1.05VS

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

3.3

1.05

1.05

1.05

1.05

S0 Iccmax
Current (A)

0.001

5

5

0.001

0.001

0.266

0.001

0.08

0.08

1.3

0.042

1.05V ccIO 2.925

1.05V ccASW 1.01

3.3VccSPI 0.02

3.3VccDSW 0.003

1.8 0.19VccpNAND

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccSusHDA

0.119

0.01

VccVRM 1.8 / 1. 5 0 .16

1.05V ccCLKDMI

0.02

VccSSC 1.05 0. 095

VccDIFFCLKN 1.05 0.0 55

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0 .06

11/24 change +1.5VS to 1.5VPCIEV

+VCCAFDI_VRM

RH275

RH275

1.5VPCIEV

A A

5

4

12

0_0603_5%

0_0603_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+VCCAFDI_VRM

Compal Secret Data

Compal Secret Data

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (6/8) PWR

PCH (6/8) PWR

PCH (6/8) PWR

LA-8711

LA-8711

LA-8711

1

18 57Sunday, November 27, 2011

18 57Sunday, November 27, 2011

18 57Sunday, November 27, 2011

0.1

0.1

0.1

5

4

3

2

1

VCC3_3 = 266mA detal waiting for newest spec

+1.05VS

+3V_PCH

1 2

RH277 0_0603_5%RH277 0_0603_5%

D D

+1.05VS

@

@

R407 0_0603_5%

R407 0_0603_5%

C C

B B

A A

12

+1.05VS

RH296 0_0603_5%RH296 0_0603_5%

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VM_VCCSUS

1

C262

@ C262

@

1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VS

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

12

+1.05VS

RH303 0_0603_5%RH303 0_0603_5%

5

LH3

LH3

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

1 2

@

@

10U_0805_10V4Z

10U_0805_10V4Z

+1.05VS

RH313 0_0805_5%RH313 0_0805_5%

12

LH4

LH4

1 2

@

@

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CH65

CH65

1U_0402_6.3V6K

1U_0402_6.3V6K

2

12

RH298 0_0603_5%RH298 0_0603_5%

RH300 0_0603_5%RH300 0_0603_5%

1 2

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

12

LH6

LH6

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

1 2

1 2

LH7

LH7

1

@

@

CH43

CH43

+1.05VS

2

RH307

RH307

0_0805_5%

0_0805_5%

1

CH59

CH59

2

1

CH67

CH67
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CH69

CH69
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CH71

CH71

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

0.1U_0402_10V7K

0.1U_0402_10V7K

1 2

RH283 0_0603_5%RH283 0_0603_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCP_VCCASW

12

+3VS_VCC_CLKF33

1

CH61

CH61

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+1.05VS_VCCDIFFCLKN

+1.05VS_SSCVCC

1

CH70

CH70

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+V_CPU_IO

1

CH72

CH72

2

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

1

1

1

CH78

CH78

CH79

CH79

2

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

@

@

RH276 0_0603_5%

RH276 0_0603_5%

CH42

CH42

@

@

1

CH45

CH45

@

@

2

1

2

1

CH64

CH64

0.1U_0402_10V7K

0.1U_0402_10V7K

2

1

CH73

CH73

2

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

1

CH80

CH80

CH81

CH81

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

12

CH39

CH39

0.1U_0402_10V7K

0.1U_0402_10V7K

1

2

+VCCSUS1

1

CH50

CH50

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

CH53

CH53

CH54

CH54

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCRTCEXT

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+1.05VM_VCCSUS

+RTCVCC

1

CH74

CH74

2

4

+VCCACLK

1

+VCCPDSW

2

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCAPLL_CPY_PCH

+VCCDPLL_CPY

1

CH51

CH51

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

CH55

CH55

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCAFDI_VRM

+VCCSST

1

CH75

CH75

2

0.1U_0402_10V7K

0.1U_0402_10V7K

POWER

UH1J

UH1J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

1

2

0.1U_0402_10V7K

0.1U_0402_10V7K

VCCRTC

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

CH76

CH76

1U_0402_6.3V6K

1U_0402_6.3V6K

POWER

N26

VCCIO[29]

P26

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

HDA

HDA

1mA

10mA

3

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

1mA

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

3mA

119mA

1010mA

Clock and Miscellaneous

Clock and Miscellaneous

80mA

80mA

55mA

95mA

1mA

CPURTC

CPURTC

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.05VS_VCCUSBCORE

1

2

1

2

+1.05VS_VCCAUPLL

+PCH_V5REF_SUS

+VCCA_USBSUS

+3V_VCCPSUS_1

+PCH_V5REF_RUN

+3VS_VCCPPCI

+VCC3_3_2

+VCCAFDI_VRM

+VCCSUSHDA

1

CH77

CH77

2

CH40

CH40
1U_0402_6.3V6K

1U_0402_6.3V6K

+3V_VCCPUSB

+3V_VCCAUBG

0.1U_0402_10V7K

0.1U_0402_10V7K

RH286 0_0603_5%RH286 0_0603_5%

+3VS_VCCPCORE

RH293

RH293

1

0_0603_5%

0_0603_5%

CH62

CH62

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+1.05VS_SATA3

+VCCSATAPLL

+1.05VS_VCC_SATA

@

@

150_0402_1%

150_0402_1%

RH306

RH306

Deciphered Date

Deciphered Date

Deciphered Date

1

2

0.1U_0402_10V7K

0.1U_0402_10V7K

12

12

CH44

CH44

+3V_VCCPSUS

12

CH56

CH56
1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCAFDI_VRM

+1.05VS_VCC_SATA

Compal Secret Data

Compal Secret Data

Compal Secret Data

RH285 0_0603_5%RH285 0_0603_5%

CH47

CH47

12

RH281 0_0603_5%RH281 0_0603_5%

0.1U_0402_10V7K

0.1U_0402_10V7K

1

2

1

2

+3VS

12

RH282 0_0603_5%RH282 0_0603_5%

12

RH287 0_0603_5%RH287 0_0603_5%

CH52

CH52

RH289

RH289
0_0603_5%

0_0603_5%

RH290 0_0805_5%RH290 0_0805_5%

CH58

CH58

0.1U_0402_10V7K

0.1U_0402_10V7K

1

CH60

CH60

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+1.05VS_SATA3

1

2

RH299

RH299

0_0805_5%

0_0805_5%

1

CH68

CH68

2

1U_0402_6.3V6K

1U_0402_6.3V6K

RH305 0_0603_5%RH305 0_0603_5%

2

+1.05VS

+1.05VS

+3V_PCH

12

+1.05VS

12

12

+3V_PCH

12

RH292 0_0603_5%RH292 0_0603_5%

RH294

RH294

0_0805_5%

0_0805_5%

CH63

CH63
1U_0402_6.3V6K

1U_0402_6.3V6K

12

+1.05VS

12

VCCDMI = 42mA detal waiting for newest spec

RH278

@RH278

@

12

0_0603_5%

0_0603_5%

D

S

D

S

13

G

G

2

12

RH284

RH284

12

RH288

RH288

+1.05VS

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

+3V_PCH

+VCCA_USBSUS

+3V_PCH

+3VS

+3VS

12

12

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

1 2

1

CH66

CH66

10U_0805_10V4Z

10U_0805_10V4Z

@

@

2

+3V_PCH

QH3

QH3

AO3413_SOT23

AO3413_SOT23

PCH_PWR_EN#43

100_0402_5%

100_0402_5%

1

@

@

CH48

CH48

2

1U_0402_6.3V6K

1U_0402_6.3V6K

100_0402_5%

100_0402_5%

+1.05VS

LH5

LH5

@

@

Place CH73 Near AK1 pin

Title

Title

Title

PCH (7/8) PWR

PCH (7/8) PWR

PCH (7/8) PWR

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-8711

LA-8711

LA-8711

Date: Sheet of

Date: Sheet of

Date: Sheet of

+5V_PCH+5VALW

12

1

2

+3V_PCH+5V_PCH

+3VS+5VS

1

RH279

RH279
20K_0402_5%

20K_0402_5%

CH41

CH41

0.1U_0402_10V7K

0.1U_0402_10V7K

21

DH3

DH3

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_SUS

1

CH49

CH49

0.1U_0603_25V7K

0.1U_0603_25V7K

2

21

DH4

DH4

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_RUN

1

CH57

CH57
1U_0603_10V6K

1U_0603_10V6K

2

19 57Sunday, November 27, 2011

19 57Sunday, November 27, 2011

19 57Sunday, November 27, 2011

0.1

0.1

0.1

5

D D

C C

B B

A A

UH1H

UH1H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

3

UH1I

UH1I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

2

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (8/8) VSS

PCH (8/8) VSS

PCH (8/8) VSS

LA-8711

LA-8711

LA-8711

1

0.1

0.1

20 57Sunday, November 27, 2011

20 57Sunday, November 27, 2011

20 57Sunday, November 27, 2011

0.1

5

4

3

2

1

LVDS Interface

UVG1G

UVG1G

PART 7 0F 9

PART 7 0F 9

LVDS CONTROL

AM32

AN31

AN32

H7
H8

AM10

AN9

AN10

AF30
AF31

1M_0402_5%

1M_0402_5%

DPLL_PVDD

DPLL_VDDC

DPLL_PVSS

MPLL_PVDD

MPLL_PVDD

SPLL_PVDD

SPLL_VDDC

SPLL_PVSS

NC_XTAL_PVDD

NC_XTAL_PVSS

RV28

RV28

PX@

PX@

YV2

2 1

LVTMDP

LVTMDP

PX@YV2

PX@

LVDS CONTROL

PART 9 0F 9

PART 9 0F 9

XTALINXTALOUT

CV50

18P_0402_50V8J

18P_0402_50V8J

TXOUT_U0P_DPF2P

TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P

TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P

TXOUT_U2N_DPF0N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

2160834000A10CHELSE_FCBGA962

2160834000A10CHELSE_FCBGA962

UVG1I

UVG1I

PLLS/XTAL

PLLS/XTAL

2160834000A10CHELSE_FCBGA962

2160834000A10CHELSE_FCBGA962

PX@CV50

PX@

PEG_HTX_C_GRX_P[15..0]4

PEG_HTX_C_GRX_N[15..0]4

D D

C C

CLK_PCIE_VGA14
CLK_PCIE_VGA#14

B B

PEG_HTX_C_GRX_P[15..0]

PEG_HTX_C_GRX_N[15..0]

PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0

PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_N1

PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2

PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3

PEG_HTX_C_GRX_P4
PEG_HTX_C_GRX_N4

PEG_HTX_C_GRX_P5
PEG_HTX_C_GRX_N5

PEG_HTX_C_GRX_P6
PEG_HTX_C_GRX_N6

PEG_HTX_C_GRX_P7
PEG_HTX_C_GRX_N7

PEG_HTX_C_GRX_P8
PEG_HTX_C_GRX_N8

PEG_HTX_C_GRX_P9
PEG_HTX_C_GRX_N9

PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_N10

PEG_HTX_C_GRX_P11
PEG_HTX_C_GRX_N11

PEG_HTX_C_GRX_P12
PEG_HTX_C_GRX_N12

PEG_HTX_C_GRX_P13
PEG_HTX_C_GRX_N13

PEG_HTX_C_GRX_P14
PEG_HTX_C_GRX_N14

PEG_HTX_C_GRX_P15
PEG_HTX_C_GRX_N15

CLK_PCIE_VGA
CLK_PCIE_VGA#

PX@

PX@

RV4

RV4

1K_0402_5%

1K_0402_5%

GPU_RST#

AA38

Y37

Y35

W36

W38

V37

V35
U36

U38
T37

T35
R36

R38
P37

P35
N36

N38
M37

M35

L36

L38

K37

K35

J36

J38

H37

H35
G36

G38

F37

F35
E37

AB35
AA36

12

AH16

AA30

12

PX@

PX@

RV6

RV6
100K_0402_5%

100K_0402_5%

RV1 0_0402_5%@RV1 0_0402_5%@

PCIE_RX0P

PCIE_RX0N

PCIE_RX1P

PCIE_RX1N

PCIE_RX2P

PCIE_RX2N

PCIE_RX3P

PCIE_RX3N

PCIE_RX4P

PCIE_RX4N

PCIE_RX5P

PCIE_RX5N

PCIE_RX6P

PCIE_RX6N

PCIE_RX7P

PCIE_RX7N

PCIE_RX8P

PCIE_RX8N

PCIE_RX9P

PCIE_RX9N

PCIE_RX10P

PCIE_RX10N

PCIE_RX11P

PCIE_RX11N

PCIE_RX12P

PCIE_RX12N

PCIE_RX13P

PCIE_RX13N

PCIE_RX14P

PCIE_RX14N

PCIE_RX15P

PCIE_RX15N

PCIE_REFCLKP

PCIE_REFCLKN

TEST_PG

PERSTB

12

CLOCK

CLOCK

UVG1A

UVG1A

PART 1 0F 9

PART 1 0F 9

PCI EXPRESS INTERFACE

PCI EXPRESS INTERFACE

CALIBRATION

CALIBRATION

2160834000A10CHELSE_FCBGA962

2160834000A10CHELSE_FCBGA962

PCIE_TX10P

PCIE_TX10N

PCIE_TX11P

PCIE_TX11N

PCIE_TX12P

PCIE_TX12N

PCIE_TX13P

PCIE_TX13N

PCIE_TX14P

PCIE_TX14N

PCIE_TX15P

PCIE_TX15N

PCIE_CALR_TX

PCIE_CALR_RX

+3VGS

5

UV1

UV1

2

PLT_RST#5,16,31,34,36

DGPU_HOLD_RST#16

A A

P

B

Y

1

A

G

PX@

PX@

3

MC74VHC1G08DFT2G SC70 5P

MC74VHC1G08DFT2G SC70 5P

GPU_RST#

4

PCIE_TX0P

PCIE_TX0N

PCIE_TX1P

PCIE_TX1N

PCIE_TX2P

PCIE_TX2N

PCIE_TX3P

PCIE_TX3N

PCIE_TX4P

PCIE_TX4N

PCIE_TX5P

PCIE_TX5N

PCIE_TX6P

PCIE_TX6N

PCIE_TX7P

PCIE_TX7N

PCIE_TX8P

PCIE_TX8N

PCIE_TX9P

PCIE_TX9N

PEG_GTX_C_HRX_P[0..15]

PEG_GTX_C_HRX_N[0..15]

PEG_GTX_HRX_P0

Y33

PEG_GTX_HRX_N0

Y32

PEG_GTX_HRX_P1

W33

PEG_GTX_HRX_N1

W32

PEG_GTX_HRX_P2

U33

PEG_GTX_HRX_N2

U32

PEG_GTX_HRX_P3

U30

PEG_GTX_HRX_N3

U29

PEG_GTX_HRX_P4

T33

PEG_GTX_HRX_N4

T32

PEG_GTX_HRX_P5

T30

PEG_GTX_HRX_N5

T29

PEG_GTX_HRX_P6

P33

PEG_GTX_HRX_N6

P32

PEG_GTX_HRX_P7

P30

PEG_GTX_HRX_N7

P29

PEG_GTX_HRX_P8

N33

PEG_GTX_HRX_N8

N32

PEG_GTX_HRX_P9

N30

PEG_GTX_HRX_N9

N29

PEG_GTX_HRX_P10

L33

PEG_GTX_HRX_N10

L32

PEG_GTX_HRX_P11

L30

PEG_GTX_HRX_N11

L29

PEG_GTX_HRX_P12

K33

PEG_GTX_HRX_N12

K32

PEG_GTX_HRX_P13

J33

PEG_GTX_HRX_N13

J32

PEG_GTX_HRX_P14

K30

PEG_GTX_HRX_N14

K29

PEG_GTX_HRX_P15

H33

PEG_GTX_HRX_N15

H32

1 2

Y30

1 2

Y29

11/20 follwo AMD/ check list

PEG_GTX_C_HRX_P[0..15] 4

PEG_GTX_C_HRX_N[0..15] 4

CV1.1U_0402_16V7K PX@CV1.1U_0402_16V7K PX@

12

CV2.1U_0402_16V7K PX@CV2.1U_0402_16V7K PX@

12

CV3.1U_0402_16V7K PX@CV3.1U_0402_16V7K PX@

12

CV4.1U_0402_16V7K PX@CV4.1U_0402_16V7K PX@

12

CV5.1U_0402_16V7K PX@CV5.1U_0402_16V7K PX@

12

CV6.1U_0402_16V7K PX@CV6.1U_0402_16V7K PX@

12

CV7.1U_0402_16V7K PX@CV7.1U_0402_16V7K PX@

12

CV8.1U_0402_16V7K PX@CV8.1U_0402_16V7K PX@

12

CV9.1U_0402_16V7K PX@CV9.1U_0402_16V7K PX@

12

CV10. 1U_0402_16V7K PX@CV10.1U_0402_16V7K PX@

12

CV11. 1U_0402_16V7K PX@CV11.1U_0402_16V7K PX@

12

CV12. 1U_0402_16V7K PX@CV12.1U_0402_16V7K PX@

12

CV13. 1U_0402_16V7K PX@CV13.1U_0402_16V7K PX@

12

CV14. 1U_0402_16V7K PX@CV14.1U_0402_16V7K PX@

12

CV15. 1U_0402_16V7K PX@CV15.1U_0402_16V7K PX@

12

CV16. 1U_0402_16V7K PX@CV16.1U_0402_16V7K PX@

12

CV17. 1U_0402_16V7K PX@CV17.1U_0402_16V7K PX@

12

CV18. 1U_0402_16V7K PX@CV18.1U_0402_16V7K PX@

12

CV19. 1U_0402_16V7K PX@CV19.1U_0402_16V7K PX@

12

CV20. 1U_0402_16V7K PX@CV20.1U_0402_16V7K PX@

12

CV21. 1U_0402_16V7K PX@CV21.1U_0402_16V7K PX@

12

CV22. 1U_0402_16V7K PX@CV22.1U_0402_16V7K PX@

12

CV23. 1U_0402_16V7K PX@CV23.1U_0402_16V7K PX@

12

CV24. 1U_0402_16V7K PX@CV24.1U_0402_16V7K PX@

12

CV25. 1U_0402_16V7K PX@CV25.1U_0402_16V7K PX@

12

CV26. 1U_0402_16V7K PX@CV26.1U_0402_16V7K PX@

12

CV27. 1U_0402_16V7K PX@CV27.1U_0402_16V7K PX@

12

CV28. 1U_0402_16V7K PX@CV28.1U_0402_16V7K PX@

12

CV29. 1U_0402_16V7K PX@CV29.1U_0402_16V7K PX@

12

CV30. 1U_0402_16V7K PX@CV30.1U_0402_16V7K PX@

12

CV31. 1U_0402_16V7K PX@CV31.1U_0402_16V7K PX@

12

CV32. 1U_0402_16V7K PX@CV32.1U_0402_16V7K PX@

12

0.935V

For Chelsea only

RV291. 69K_0402_1% PX@ RV291.69K_0402_1% PX@

For Chelsea non staff

PX@

PX@

0.935V

RV51K_0402_5%

RV51K_0402_5%

PEG_GTX_C_HRX_P0
PEG_GTX_C_HRX_N0

PEG_GTX_C_HRX_P1
PEG_GTX_C_HRX_N1

PEG_GTX_C_HRX_P2
PEG_GTX_C_HRX_N2

PEG_GTX_C_HRX_P3
PEG_GTX_C_HRX_N3

PEG_GTX_C_HRX_P4
PEG_GTX_C_HRX_N4

PEG_GTX_C_HRX_P5
PEG_GTX_C_HRX_N5

PEG_GTX_C_HRX_P6
PEG_GTX_C_HRX_N6

PEG_GTX_C_HRX_P7
PEG_GTX_C_HRX_N7

PEG_GTX_C_HRX_P8
PEG_GTX_C_HRX_N8

PEG_GTX_C_HRX_P9
PEG_GTX_C_HRX_N9

PEG_GTX_C_HRX_P10
PEG_GTX_C_HRX_N10

PEG_GTX_C_HRX_P11
PEG_GTX_C_HRX_N11

PEG_GTX_C_HRX_P12

PEG_GTX_C_HRX_N12

PEG_GTX_C_HRX_P13
PEG_GTX_C_HRX_N13

PEG_GTX_C_HRX_P14
PEG_GTX_C_HRX_N14

PEG_GTX_C_HRX_P15
PEG_GTX_C_HRX_N15

+1.8VGS

0.935V

+1.8VGS

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

+1.8VGS

0.935V

MCK1608471YZF 0603

MCK1608471YZF 0603

RV143

RV143

1 2

0_0402_5%

0_0402_5%

RV144

RV144

1 2

0_0402_5%

0_0402_5%

(M97, Broadway and Madison:

1.8V@150mA MPV18-MPLL_PVDD)

LV9

PX@ LV9

PX@

1 2

LV10

PX@LV10

PX@

1 2

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

(150mA SPV10-SPLL_VDDC)

LV11

PX@LV11

PX@

1 2

(1.8V @237mA for display use DP_VDDR)

75mA

CV40

PX@ CV40

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

+DPLL_PVDD

1

1

CV41

CV42

2

2

PX@ CV41

PX@

PX@ CV42

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

(0.935V @222mA DP_VDDC)

10U_0603_6.3V6M

10U_0603_6.3V6M

125mA

1

CV43

2

PX@ CV43

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CV149

2

PX@ CV149

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CV152

2

PX@ CV152

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CV166

2

PX@ CV166

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

+DPLL_VDDC

1

1

CV45

CV44

2

2

PX@ CV45

PX@

PX@ CV44

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

CV151

CV150

2

2

PX@ CV151

PX@

PX@ CV150

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

(1.8V@75mA
SPV18-SPLL_PVDD)

1

1

CV153

CV154

2

2

PX@ CV153

PX@

PX@ CV154

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

+SPV10

1

1

CV168

CV169

2

2

PX@ CV168

PX@

PX@ CV169

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

+MPV18

+SPV18

+DPLL_PVDD

RV141 0_0402_5%@ RV141 0_0402_5%@

RV148 0_0402_5%@ RV148 0_0402_5%@

+DPLL_PVDD

+DPLL_VDDC

+MPV18

+SPV18

+SPV10

12
12

27MHZ_16PF_X5H027000FG1H

27MHZ_16PF_X5H027000FG1H

CV49

PX@ CV49

PX@

18P_0402_50V8J

18P_0402_50V8J

AK27

VARY_BL

DIGON

AJ27

TXCLK_UP_DPF3P

AK35
AL36

TXCLK_UN_DPF3N

AJ38
AK37

AH35
AJ36

AG38
AH37

AF35

TXOUT_U3P

TXOUT_U3N

AG36

TXCLK_LP_DPE3P

AP34
AR34

TXCLK_LN_DPE3N

AW37
AU35

AR37
AU39

AP35
AR35

TXOUT_L3P

AN36
AP37

TXOUT_L3N

XTALIN

AV33

XTALIN

XTALOUT

AU34

XTALOUT

RV146 0_0402_5%@RV146 0_0402_5%@

XO_IN

XO_IN2

CLKTESTA

CLKTESTB

route 50ohms single-ended/100o hms diff
and keep short
Debug only, for clock observation, if not needed, DNI
5mil 5mil

AW34

RV147 0_0402_5%@RV147 0_0402_5%@

1 2

AW35

AK10
AL10

0.1U_0402_16V7K

0.1U_0402_16V7K

51.1_0402_1%

51.1_0402_1%

12

CV171

CV171

RV70

RV70

@

@

@

@

12

12

CV170

CV170

0.1U_0402_16V7K

0.1U_0402_16V7K

12

12

RV69

RV69

@

@

@

@

51.1_0402_1%

51.1_0402_1%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/06/30 2013/06/30

2011/06/30 2013/06/30

2011/06/30 2013/06/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ATI_SeymourXT_M2_PCIE/LVDS

ATI_SeymourXT_M2_PCIE/LVDS

ATI_SeymourXT_M2_PCIE/LVDS

LA-8711

LA-8711

LA-8711

1

21 57Sunday, November 27, 2011

21 57Sunday, November 27, 2011

21 57Sunday, November 27, 2011

0.1

0.1

0.1

5

T76T76
T77T77

D D

VRAM_ID024

RB751V_SOD323

RB751V_SOD323
DV1

@DV1

@

RV132

@ RV132

@

10K_0402_5%

10K_0402_5%

GPU_VID156

GPU_VID356
GPU_VID256

GPIO_19_CTF

T51T51

0.60 V level, Please
VREFG Divider ans
cap close to ASIC

+VREFG_GPU+VREFG_GPU

TESTEN

T52T52

@ RV30

@
1 2

10K_0402_5%

10K_0402_5%

VRAM_ID124
VRAM_ID224

VGA_SMB_CK2
VGA_SMB_DA2

11/20 follow AMD/HP

T74T74
T75T75

GPU_GPIO0
GPU_GPIO1
GPU_GPIO2

GPU_GPIO5

21

VDDCI_VID

GPU_GPIO8
GPU_GPIO9

GPU_GPIO11
GPU_VID1
GPU_GPIO13

GPU_VID3
GPU_VID2

VGA_THERALERT#

GPIO21_BBEN
GPIO22_ROMCSB
VGA_CLKREQ#

GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS

GPIO28_TDO

RV30

GPIO_28_FDO+TSVDD

VRAM ID

C C

ACIN15,36,48

VDDCI_VID54

1 2

RV24 10K_0402_5%PX@RV24 10K_0402_5%PX@

1 2

+1.8VGS

PX@

PX@

RV25 499_0402_1%

RV25 499_0402_1%

PX@

PX@

RV26 249_0402_1%

RV26 249_0402_1%

CV39 0.1U_0402_16V7K

CV39 0.1U_0402_16V7K

PX@

PX@

+3VGS

RV66

RV66

1

1

CV47

CV48

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

PX@ CV47

PX@

PX@ CV48

PX@

GPU_VID4

VGA_CLKREQ#14

12

12

12

@

@

1 2

5.11K_0402_1%

5.11K_0402_1%

1 2

RV131 1K_0402_5%

RV131 1K_0402_5%

PX@

PX@

+3VGS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

GPU_VID456

B B

A A

PX@

PX@

(1.8V@20mA TSVDD)

LV5

LV5

1 2

+1.8VGS

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

CV46

2

10U_0603_6.3V6M

10U_0603_6.3V6M

PX@ CV46

PX@

5

N72158384
N72155053

N72158384
N72155053

THERM_D+
THERM_D-

4

4

AW10

AW12

AM16
AM14
AM13

AG30

AM17

AG32
AG33

AM23

AM24

AG29

AD29
AC29

AJ21
AK21

AR10

AU10
AP10
AV11
AT11
AR12

AU12
AP12

AJ23
AH23

AK26
AJ26

AH20
AH18
AN16

AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16

AK14

AN14

AL13
AJ14
AK13
AN13

AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24

AC30

AK24

AH13

AL21

AD28

AN23
AK23
AL24

AF29

AK32

AL31

AJ32
AJ33

AW8

AW3

AW5

AW6

AR8
AU8
AP8

AR3
AR1
AU1
AU3

AP6

AU5
AR6

AU6
AT7
AV7
AN7
AV9
AT9

MUTI GFX

MUTI GFX

GENLK_CLK

GENLK_VSYNC

SWAPLOCKA

SWAPLOCKB

DVPCNTL_MVP_0

DVPCNTL_MVP_1

DVPCNTL_0

DVPCNTL_1

DVPCNTL_2

DVPCLK

DVPDATA_0

DVPDATA_1

DVPDATA_2

DVPDATA_3

DVPDATA_4

DVPDATA_5

DVPDATA_6

DVPDATA_7

DVPDATA_8

DVPDATA_9

DVPDATA_10

DVPDATA_11

DVPDATA_12

DVPDATA_13

DVPDATA_14

DVPDATA_15

DVPDATA_16

DVPDATA_17

DVPDATA_18

DVPDATA_19

DVPDATA_20

DVPDATA_21

DVPDATA_22

DVPDATA_23

SMBCLK

SMBus

SMBus

SMBDATA

SCL

I2C

I2C

SDA

GENERAL PURPOSE I/O

GENERAL PURPOSE I/O

GPIO_0

GPIO_1

GPIO_2

GPIO_5_AC_BATT

GPIO_6

GPIO_7_BLON

GPIO_8_ROMSO

GPIO_9_ROMSI

GPIO_10_ROMSCK

GPIO_11

GPIO_12

GPIO_13

GPIO_14_HPD2

GPIO_15_PWRCNTL_0

GPIO_16

GPIO_17_THERMAL_INT

GPIO_18_HPD3

GPIO_19_CTF

GPIO_20_PWRCNTL_1

GPIO_21

GPIO_22_ROMCSB

CLKREQB

GPIO_29

GPIO_30

GENERICA

GENERICB

GENERICC

GENERICD

GENERICE_HPD4

GENERICF_HPD5

GENERICG_HPD6

CEC_1

HPD1

VREFG

BACO

BACO

PX_EN

DEBUG

DEBUG

TESTEN

JTAG_TRSTB

JTAG_TDI

JTAG_TCK

JTAG_TMS

JTAG_TDO

THERMAL

THERMAL

DPLUS

DMINUS

GPIO_28_FDO

TS_A

TSVDD

TSVSS

UVG1B

UVG1B

PART 2 0F 9

PART 2 0F 9

DPA

DPA

DPB

DPB

DPC

DPC

DPD

DPD

DAC1

DAC1

MLPS

MLPS

DDC/AUX

DDC/AUX

2160834000A10CHELSE_FCBGA962

2160834000A10CHELSE_FCBGA962

TXCAP_DPA3P

TXCAM_DPA3N

TX0P_DPA2P

TX0M_DPA2N

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

TXCDP_DPD3P

TXCDM_DPD3N

TX3P_DPD2P

TX3M_DPD2N

TX4P_DPD1P

TX4M_DPD1N

TX5P_DPD0P

TX5M_DPD0N

AVSSN#1

AVSSN#2

AVSSN#3

HSYNC

VSYNC

AVSSQ

VDD1DI

VSS1DI

NC_TSVSSQ

DDC1CLK

DDC1DATA

AUX1P

AUX1N

DDC2CLK

DDC2DATA

AUX2P

AUX2N

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDCCLK_AUX6P

DDCDATA_AUX6N

DDCVGACLK

DDCVGADATA

AU24
AV23

AT25
AR24

AU26
AV25

AT27
AR26

AR30
AT29

AV31
AU30

AR32
AT31

AT33
AU32

AU14
AV13

AT15
AR14

AU16
AV15

AT17
AR16

AU20
AT19

AT21
AR20

AU22
AV21

AT23
AR22

R

AD39
AD37

AE36

G

AD35

AF37

B

AE38

AC36
AC38

AB34

RSET

AVDD

AD34
AE34

AC33
AC34

NC#1

V13
U13

NC#2

AC31

NC#3

NC#4

AD30
AC32

NC#5

NC#6

AD32
AF32

NC#7

AA29

NC#8

NC#9

AG21

AF33

AM34

PS_0

AD31

PS_1

PS_2

AG31

AD33

PS_3

AM26
AN26

AM27
AL27

AM19
AL19

AN20
AM20

AL30
AM30

AL29
AM29

AN21
AM21

AK30
AK29

AJ30
AJ31

ATI_DP_R

ATI_DP_G

ATI_DP_B

ATI_DP_H
ATI_DP_V

RV14 499_0402_1%PX@RV14 499_0402_1%PX@

1 2

+AVDD

+VDD1DI

RV142

@RV142

@

1 2

0_0402_5%

0_0402_5%

For Chelsea non staff

T53T53
T54T54

3

+3VGS

+3VGS

STRAPS

1 2
1 2
1 2

R1.0

1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2

1 2
1 2
1 2

1 2

RV710K_0402_5% @ RV710K_0402_5% @
RV810K_0402_5% PX@ RV810K_0402_5% PX@
RV910K_0402_5% @ RV910K_0402_5% @

RV10100K_0402_5% @ R V10100K_0402_5% @
RV3110K_0402_5% @ RV3110K_0402_5% @
RV3210K_0402_5% @ RV3210K_0402_5% @
RV1110K_0402_5% @ RV1110K_0402_5% @
RV1210K_0402_5% @ RV1210K_0402_5% @

RV1310K_0402_5% PX@ RV1310K_0402_5% PX@
RV1510K_0402_5% @ RV1510K_0402_5% @
RV1610K_0402_5% @ RV1610K_0402_5% @

RV1810K_0402_5% @ RV1810K_0402_5% @
RV1910K_0402_5% @ RV1910K_0402_5% @
RV2010K_0402_5% @ RV2010K_0402_5% @

RV2110K_0402_5% @ RV2110K_0402_5% @

GPU_GPIO0
GPU_GPIO1
GPU_GPIO2

RV9 SMT-->@

GPU_GPIO5

GPIO21_BBEN

GPIO22_ROMCSB

GPU_GPIO8
GPU_GPIO9

GPU_GPIO11
GPU_VID1
GPU_GPIO13

Update net name

GPIO24_TRSTB

GPIO25_TDI
GPIO27_TMS

GPIO26_TCK

2

CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE
GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

STRAPS

RSVD

RSVD

RSVD

RSVD

BIOS_ROM_EN

VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS

RSVD

AMD RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL

T69T69

T70T70

T71T71

T72T72
T73T73

(1.8V@18mA AVDD)

(1.8V@117mA VDD1DI)

1

1

CV37

CV36

2

2

PX@ CV37

PX@

PX@ CV36

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

1 2

LV2

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

CV38

2

PX@ CV38

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

1

+1.8VGS

PX@LV2

PX@

CV33

2

PX@ CV33

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND
NOT CONFLICT DURING RESET

GPIO21 GPIO2

1 2

LV1

PX@LV1

PX@

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

1

CV34

CV35

2

2

PX@ CV34

PX@

PX@ CV35

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

Use Internal Th ermal Sensor

External VGA Thermal Sensor: No stuff

+3VGS
@

@

12

CV271 0.1U_0402_16V4Z

THERM_D+

THERM_D-

+3VGS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/06/30 2013/06/30

2011/06/30 2013/06/30

2011/06/30 2013/06/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

CV271 0.1U_0402_16V4Z

CV272

@CV272

@

1 2

2200P_0402_50V7K

2200P_0402_50V7K

@

@

RV133 2.2K_0402_5%

RV133 2.2K_0402_5%

Deciphered Date

Deciphered Date

Deciphered Date

2

12

H2SYNC GENERICC

+1.8VGS

2.2K_0402_5%

2.2K_0402_5%

VGA_SMB_CK2

VGA_SMB_DA2

DESCRIPTION OF DEFAULT SETT INGS <all internal PD>PIN

GPIO0TX_PWRS_ENB

PCIE TRANSMITTER Power Saving Enable

GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS

GPIO2

GPIO8

H2SYNC

Advertises PCIE speed when compliance test

Internal use only.This Pad has an internal PD and Must be 0V at reset.
The pad may be left unconnected.

GPIO21

GPIO_22_ROMCSB

GPIO[13:11]ROMIDCFG(2:0)

ENABLE EXTERNAL BIOS ROM

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

GPIO13,12,11(config 2,1,0): internal PD.
a)If BIOS_ROM_EN=1,the config[2:0] defines the ROM type.
b)If BIOS_ROM_EN=0,the config[2:0] defines the primary aperture size.

GPIO9 VGA ENABLEDBIF_VGA DIS

GENERICC

HSYNCAUD[1]

VSYNCAUD[ 0]

AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI

GPIO8

TX_PWRS_ENB

TX_DEEMPH_EN

+3VGS

PX@

PX@

PX@

PX@

RV22

RV22

RV23

RV23

2.2K_0402_5%

2.2K_0402_5%

1 2

1 2

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

UV13

UV13

1

VDD

SCLK

2

D+

SDATA

3

ALERT#

D-

THERM#4GND

ADM1032ARMZ-2REEL_MSOP8

ADM1032ARMZ-2REEL_MSOP8

Transmitter Power Saving Enable

GPIO0

0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)

PCI Express Transmitter De-emphasis Enable

GPIO1

0: Tx de-emphasis diabled for mobile mode
1: Tx de-emphasis enabled (Defailt setting for desktop)

Internal VGA Thermal Sensor

+3VGS

2

61

QV1A

PX@QV1A

PX@

4

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

8

7

6

RV134 2.2K_0402_5%

RV134 2.2K_0402_5%

5

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

RECOMMEN DED SETTINGS
0= DO N OT INSTALL RESISTOR
1 = I NSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE

RECOMMENDED

0: disable
1: enable

0: 2.5GT/s
1: 5GT/s

SETTINGS

X

X

0

0: 50% swing
1: Full swing

0

0

0: disable
1: enable

0

X

XXX

Memory apertures
config[3:0]
128MB 000
256MB 001
64MB 010

0

0

0

11

3

12

VGA_THERALERT#

EC_SMB_CK2 14,36

EC_SMB_DA2 14,36

+3VGS

LA-8711

LA-8711

LA-8711

1

22 57Sunday, November 27, 2011

22 57Sunday, November 27, 2011

22 57Sunday, November 27, 2011

5

QV1B

PX@QV1B

PX@

VGA_SMB_CK2

VGA_SMB_DA2

@

@

R123

R123

1 2

0_0402_5%

0_0402_5%

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ATI_SeymourXT_M2_Main_MSIC

ATI_SeymourXT_M2_Main_MSIC

ATI_SeymourXT_M2_Main_MSIC

0.1

0.1

0.1

5

4

3

2

1

+1.5V TO +1.5VGS

D D

+3.3VS TO +3.3VGS

Chelsea Power U p

+3VGS/+VGA_CORE

0,935V(VDDC)

VDDCI

+1.5VGS(VDDR1/MVDDQ)

+1.8VS

C C

PXS_PWREN

+5VALW

PX@

PX@

RV36

RV36

20K_0402_5%

20K_0402_5%

11/20 PXS_PWREN=PCH GPIO54

PXS_PWREN_R

B B

+3VS +3VGS

PX@

PX@

RV37

RV37

20K_0402_5%

20K_0402_5%

13

D

D

PX@

PX@

QV9

QV9

2

G

2N7002K_SOT23-3

G

2N7002K_SOT23-3

S

S

PXS_PWREN16,53,54,56

RV138 0_0402_5%

RV138 0_0402_5%

1 2

PX@

PX@

3 1

QV16

AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3

2

PXS_PWREN_5V#

PX@

PX@

1

CV58

CV58

0.1U_0603_25V7K

0.1U_0603_25V7K

2

PXS_PWREN

PX@QV16

PX@

100K_0402_5%

100K_0402_5%

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

PXS_PWREN#

+3VALW

12

PX@

PX@

RV35

RV35

PXS_PWREN#

13

D

D

2

G

G

S

S

1U_0603_10V6K

1U_0603_10V6K

1

CV56

CV56

CV57

CV57

PX@

PX@

PX@

PX@

2

QV8

QV8
2N7002K_SOT23-3

2N7002K_SOT23-3

PX@

PX@

12

13

D

D

S

S

1 2

RV38

@RV38

@

RV34

@RV34

@

470_0603_5%

470_0603_5%

2

G

G

QV7

@

QV7

@

2N7002K_SOT23-3

2N7002K_SOT23-3

0_0402_5%

0_0402_5%

PXS_PWREN

PXS_PWREN#

+1.8VS TO +1.8VGS

+5VALW

PX@

PX@

RV137

RV137

20K_0402_5%

20K_0402_5%

1

PX@ CV275

PX@

2

5

1.5VPCIEV

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CV59

CV59

PX@

PX@

2

+VSB

RV40

PX@RV40

PX@

20K_0402_5%

20K_0402_5%

RV41

RV41

PX@

PX@

1 2

200K_0402_1%

200K_0402_1%

6

PX@

PX@

QV2A

QV2A

2

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

1

+1.8VS

AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3

3 1

CV275
1U_0402_6.3V6K

1U_0402_6.3V6K

2

PX@

PX@

RV53

RV53

20K_0402_5%

20K_0402_5%

34

PX@

PX@

QV18B

QV18B
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

UV148
AO4430L_SO8

AO4430L_SO8

8
7
6
5

QV19

PX@QV19

PX@

PXS_PWREN_5V#

PX@

PX@

1

CV63

CV63

0.1U_0603_25V7K

0.1U_0603_25V7K

2

PX@UV148

PX@

1 2

4

RV43

RV43
0_0402_5%

0_0402_5%

@

@

+1.8VGS

1

2

+1.5VGS

1
2

1

3

2

1

CV62

0.1U_0603_25V7K

0.1U_0603_25V7K

2

CV274

CV274

PX@

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

10U_0603_6.3V6M

10U_0603_6.3V6M

CV60

CV60

PX@

PX@

PX@CV62

PX@

1

2

PXS_PWREN#

1

CV61
1U_0603_10V6K

1U_0603_10V6K

2

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

PXS_PWREN#

12

CV273

PX@CV273

PX@

PX@

PX@

QV18A

QV18A

RV135 0_0402_5%@RV135 0_0402_5%@

1 2

RV136
470_0603_5%

470_0603_5%

6

1

1U_0603_10V6K

1U_0603_10V6K

12

PX@CV61

PX@

34

PX@

PX@

QV2B

QV2B

@

@

RV44 0_0402_5%

RV44 0_0402_5%

1 2

@RV136

@

2

RV39

@RV39

@

470_0603_5%

470_0603_5%

5

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/06/30 2013/06/30

2011/06/30 2013/06/30

2011/06/30 2013/06/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ATI_SeymourXT_M2_BACO POWER

ATI_SeymourXT_M2_BACO POWER

ATI_SeymourXT_M2_BACO POWER

LA-8711

LA-8711

LA-8711

1

23 57Sunday, November 27, 2011

23 57Sunday, November 27, 2011

23 57Sunday, November 27, 2011

0.1

0.1

0.1

5

UVG1C

UVG1C

PART 3 0F 9

PART 3 0F 9

GDDR5/DDR3

DQA0_0

DQA0_1

DQA0_2

DQA0_3

DQA0_4

DQA0_5

DQA0_6

DQA0_7

DQA0_8

DQA0_9

DQA0_10

DQA0_11

DQA0_12

DQA0_13

DQA0_14

DQA0_15

DQA0_16

DQA0_17

DQA0_18

DQA0_19

DQA0_20

DQA0_21

DQA0_22

DQA0_23

DQA0_24

DQA0_25

DQA0_26

DQA0_27

DQA0_28

DQA0_29

DQA0_30

DQA0_31

DQA1_0

DQA1_1

DQA1_2

DQA1_3

DQA1_4

DQA1_5

DQA1_6

DQA1_7

DQA1_8

DQA1_9

DQA1_10

DQA1_11

DQA1_12

DQA1_13

DQA1_14

DQA1_15

DQA1_16

DQA1_17

DQA1_18

DQA1_19

DQA1_20

DQA1_21

DQA1_22

DQA1_23

DQA1_24

DQA1_25

DQA1_26

DQA1_27

DQA1_28

DQA1_29

DQA1_30

DQA1_31

MVREFDA

MVREFSA

NC_MEM_CALRN0

NC_MEM_CALRN1

NC_MEM_CALRN2

NC_MEM_CALRP1

MEM_CALRP0

MEM_CALRP2

GDDR5/DDR3

MEMORY INTERFACE A

MEMORY INTERFACE A

2160834000A10CHELSE_FCBGA962

2160834000A10CHELSE_FCBGA962

MAA0_0/MAA_0

MAA0_1/MAA_1

MAA0_2/MAA_2

MAA0_3/MAA_3

MAA0_4/MAA_4

MAA0_5/MAA_5

MAA0_6/MAA_6

MAA0_7/MAA_7

MAA1_0/MAA_8

MAA1_1/MAA_9

MAA1_2/MAA_10

MAA1_3/MAA_11

MAA1_4/MAA_12

MAA1_5/MAA_BA2

MAA1_6/MAA_BA0

MAA1_7/MAA_BA1

WCKA0_0/DQMA_0

WCKA0B_0/DQMA_1

WCKA0_1/DQMA_2

WCKA0B_1/DQMA_3

WCKA1_0/DQMA_4

WCKA1B_0/DQMA_5

WCKA1_1/DQMA_6

WCKA1B_1/DQMA_7

EDCA0_0/QSA_0

EDCA0_1/QSA_1

EDCA0_2/QSA_2

EDCA0_3/QSA_3

EDCA1_0/QSA_4

EDCA1_1/QSA_5

EDCA1_2/QSA_6

EDCA1_3/QSA_7

DDBIA0_0/QSA_0B

DDBIA0_1/QSA_1B

DDBIA0_2/QSA_2B

DDBIA0_3/QSA_3B

DDBIA1_0/QSA_4B

DDBIA1_1/QSA_5B

DDBIA1_2/QSA_6B

DDBIA1_3/QSA_7B

ADBIA0/ODTA0

ADBIA1/ODTA1

CLKA0

CLKA0B

CLKA1

CLKA1B

RASA0B

RASA1B

CASA0B

CASA1B

CSA0B_0

CSA0B_1

CSA1B_0

CSA1B_1

CKEA0

CKEA1

WEA0B

WEA1B

MAA0_8/MAA_13

MAA1_8/MAA_14

MAA0_9/MAA_15

MAA1_9/RSVD

MAA0

G24

MAA1

J23

MAA2

H24

MAA3

J24

MAA4

H26

MAA5

J26

MAA6

H21

MAA7

G21

MAA8

H19

MAA9

H20

MAA10

L13

MAA11

G16

MAA12

J16

A_BA2

H16

A_BA0

J17

A_BA1

H17

DQMA#0

A32

DQMA#1

C32

DQMA#2

D23

DQMA#3

E22

DQMA#4

C14

DQMA#5

A14

DQMA#6

E10

DQMA#7

D9

QSA0

C34

QSA1

D29

QSA2

D25

QSA3

E20

QSA4

E16

QSA5

E12

QSA6

J10

QSA7

D7

QSA#0

A34

QSA#1

E30

QSA#2

E26

QSA#3

C20

QSA#4

C16

QSA#5

C12

QSA#6

J11

QSA#7

F8

ODTA0

J21

ODTA1

G19

CLKA0

H27

CLKA0#

G27

CLKA1

J14

CLKA1#

H14

RASA0#

K23

RASA1#

K19

CASA0#

K20

CASA1#

K17

CSA0#_0

K24
K27

CSA1#_0

M13
K16

CKEA0

K21

CKEA1

J20

WEA0#

K26

WEA1#

L15

MAA13

H23
J19
M21
M20

MDA0

C37

MDA1

C35

MDA2

A35

MDA3

E34

MDA4

G32

MDA5

D33

MDA6

F32

MDA7

E32

MDA8

D31

MDA9

F30

MDA10

C30

MDA11

D D

C C

+1.5VGS

B B

+VDD_MEM15_REFDA
+VDD_MEM15_REFSA

RV62 240_0402_1%@ RV62 240_0402_1%@

1 2

RV63 240_0402_1%@ RV63 240_0402_1%@

1 2

RV64 240_0402_1%@ RV64 240_0402_1%@

1 2

RV65 240_0402_1%@ RV65 240_0402_1%@

1 2

RV67 120_0402_5%RV67 120_0402_5%

1 2

RV68 120_0402_5%RV68 120_0402_5%

1 2

For Chelsea
RV62,RV63,RV64,RV65 non staff
RV67,RV68 from 240ohm
change to 120ohm

A30

MDA12

F28

MDA13

C28

MDA14

A28

MDA15

E28

MDA16

D27

MDA17

F26

MDA18

C26

MDA19

A26

MDA20

F24

MDA21

C24

MDA22

A24

MDA23

E24

MDA24

C22

MDA25

A22

MDA26

F22

MDA27

D21

MDA28

A20

MDA29

F20

MDA30

D19

MDA31

E18

MDA32

C18

MDA33

A18

MDA34

F18

MDA35

D17

MDA36

A16

MDA37

F16

MDA38

D15

MDA39

E14

MDA40

F14

MDA41

D13

MDA42

F12

MDA43

A12

MDA44

D11

MDA45

F10

MDA46

A10

MDA47

C10

MDA48

G13

MDA49

H13

MDA50

J13

MDA51

H11

MDA52

G10

MDA53

G8

MDA54

K9

MDA55

K10

MDA56

G9

MDA57

A8

MDA58

C8

MDA59

E8

MDA60

A6

MDA61

C6

MDA62

E6

MDA63

A5

L18
L20

L27

N12

AG12

M12
M27

AH12

This basic topology should be used for DRAM_RST for DDR3/GDDR5.These
Capacitors and Resistor values are an example only. The Series R and
|| Cap values will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board to pass Reset
Signal Spec.
Place all these components very close to GPU (Within
25mm) and keep all component close to each Other (within
5mm) except Rser2

+1.5VGS +1.5VGS

RV72

RV72

40.2_0402_1%

40.2_0402_1%

PX@

PX@

12

RV73

RV73

40.2_0402_1%

40.2_0402_1%

PX@

PX@

12

+VDD_MEM15_REFSA+VDD_MEM15_REFDA

12

12

CV172

CV172

0.1U_0402_16V7K

RV78

RV78

100_0402_1%

100_0402_1%

PX@

A A

PX@

0.1U_0402_16V7K

PX@

PX@

RV79

RV79

100_0402_1%

100_0402_1%

PX@

PX@

12

12

CV173

CV173

0.1U_0402_16V7K

0.1U_0402_16V7K

PX@

PX@

4

MAA[12..0]

A_BA[2..0]

MDA[0..63]

MAA[12..0] 27

A_BA[2..0] 27

MDA[0..63]27

+1.8VGS

RV56 10K_0402_5%@RV56 10K_0402_5%@

1 2

RV59 10K_0402_5%@RV59 10K_0402_5%@

1 2

RV57 10K_0402_5%@RV57 10K_0402_5%@

1 2

RV58 10K_0402_5%@RV58 10K_0402_5%@

1 2

RV60 10K_0402_5%@RV60 10K_0402_5%@

1 2

RV61 10K_0402_5%@RV61 10K_0402_5%@

1 2

DQMA#[7..0] 27

ODTA0 27
ODTA1 27

CLKA0 27
CLKA0# 27

CLKA1 27
CLKA1# 27

RASA0# 27
RASA1# 27

CASA0# 27
CASA1# 27

CSA0#_0 27

QSA[7..0] 27

128M16 (2G)

QSA#[7..0] 27

Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2

H5TQ2G63BFR-11C

Hynix 2GB
PN:SA00003YO00

CSA1#_0 27

CKEA0 27
CKEA1 27

WEA0# 27
WEA1# 27

MAA13 27

DRAM_RST#27,28

3

MDB[0..63]28

MAB[12..0]

B_BA[2..0]

VRAM_ID0

VRAM_ID1

VRAM_ID2

RV57

RV58

1 0

RV55

RV54

0 0

RV57 RV58

1 1

RV54

RV55 RV59

0

+1.5VGS

12

RV71

RV71

4.7K_0402_5%

4.7K_0402_5%

@

@

RV76

RV76

1 2

51.1_0402_1%

51.1_0402_1%

PX@

PX@

120P_0402_50V9

120P_0402_50V9

MDB[0..63]

1

0

1 1

12

PX@

PX@

CV174

CV174

RV59

RV59

RV59

0

MAB[12..0] 28

B_BA[2..0] 28

VRAM_ID0 22

VRAM_ID1 22

VRAM_ID2 22

RV77

RV77

1 2

10_0402_5%

10_0402_5%

PX@

PX@

PX@

PX@

RV80

RV80

4.99K_0402_1%

4.99K_0402_1%

1 2

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

+VDD_MEM15_REFDB
+VDD_MEM15_REFSB

AA12

2

UVG1D

UVG1D

PART 4 0F 9

PART 4 0F 9

GDDR5/DDR3

GDDR5/DDR3

DQB0_0

C5
C3

DQB0_1

DQB0_2

E3
E1

DQB0_3

F1

DQB0_4

DQB0_5

F3
F5

DQB0_6

DQB0_7

G4
H5

DQB0_8

H6

DQB0_9

DQB0_10

J4
K6

DQB0_11

DQB0_12

K5
L4

DQB0_13

M6

DQB0_14

DQB0_15

M1
M3

DQB0_16

DQB0_17

M5
N4

DQB0_18

P6

DQB0_19

DQB0_20

P5

R4

DQB0_21

DQB0_22

T6
T1

DQB0_23

U4

DQB0_24

DQB0_25

V6
V1

DQB0_26

DQB0_27

V3
Y6

DQB0_28

Y1

DQB0_29

DQB0_30

Y3
Y5

DQB0_31

DQB1_0

AA4
AB6

DQB1_1

AB1

DQB1_2

DQB1_3

AB3
AD6

DQB1_4

DQB1_5

AD1
AD3

DQB1_6

AD5

DQB1_7

DQB1_8

AF1
AF3

DQB1_9

DQB1_10

AF6

AG4

DQB1_11

AH5

DQB1_12

DQB1_13

AH6
AJ4

DQB1_14

DQB1_15

AK3
AF8

DQB1_16

AF9

DQB1_17

DQB1_18

AG8
AG7

DQB1_19

DQB1_20

AK9
AL7

DQB1_21

AM8

DQB1_22

DQB1_23

AM7

AK1

DQB1_24

DQB1_25

AL4

AM6

DQB1_26

AM1

DQB1_27

DQB1_28

AN4
AP3

DQB1_29

DQB1_30

AP1
AP5

DQB1_31

Y12

MVREFDB

MVREFSB

MEMORY INTERFACE B

MEMORY INTERFACE B

MAB0_0/MAB_0

MAB0_1/MAB_1

MAB0_2/MAB_2

MAB0_3/MAB_3

MAB0_4/MAB_4

MAB0_5/MAB_5

MAB0_6/MAB_6

MAB0_7/MAB_7

MAB1_0/MAB_8

MAB1_1/MAB_9

MAB1_2/MAB_10

MAB1_3/MAB_11

MAB1_4/MAB_12

MAB1_5/BA2

MAB1_6/BA0

MAB1_7/BA1

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

WCKB1B_1/DQMB_7

EDCB0_0/QSB_0

EDCB0_1/QSB_1

EDCB0_2/QSB_2

EDCB0_3/QSB_3

EDCB1_0/QSB_4

EDCB1_1/QSB_5

EDCB1_2/QSB_6

EDCB1_3/QSB_7

DDBIB0_0/QSB_0B

DDBIB0_1/QSB_1B

DDBIB0_2/QSB_2B

DDBIB0_3/QSB_3B

DDBIB1_0/QSB_4B

DDBIB1_1/QSB_5B

DDBIB1_2/QSB_6B

DDBIB1_3/QSB_7B

ADBIB0/ODTB0

ADBIB1/ODTB1

MAB0_8/MAB_13

MAB1_8/MAB_14

MAB0_9/MAB_15

MAB1_9/RSVD

DRAM_RST

2160834000A10CHELSE_FCBGA962

2160834000A10CHELSE_FCBGA962

CLKB0

CLKB0B

CLKB1

CLKB1B

RASB0B

RASB1B

CASB0B

CASB1B

CSB0B_0

CSB0B_1

CSB1B_0

CSB1B_1

CKEB0

CKEB1

WEB0B

WEB1B

P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9

H3
H1
T3
T5
AE4
AF5
AK6
AK5

F6
K3
P3
V5
AB5
AH1
AJ9
AM5

G7
K1
P1
W4
AC4
AH3
AJ8
AM3

T7
W7

L9
L8

AD8
AD7

T10
Y10

W10
AA10

P10
L10

AD10
AC10

U10
AA11

N10
AB11

T8
W8
U12
V12

AH11

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
B_BA2
B_BA0
B_BA1

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7

QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7

ODTB0
ODTB1

CLKB0
CLKB0#

CLKB1
CLKB1#

RASB0#
RASB1#

CASB0#
CASB1#

CSB0#_0

CSB1#_0

CKEB0
CKEB1

WEB0#
WEB1#

MAB13

DRAM_RST#_R

ODTB0 28
ODTB1 28

CLKB0 28
CLKB0# 28

CLKB1 28
CLKB1# 28

RASB0# 28
RASB1# 28

CASB0# 28
CASB1# 28

CSB0#_0 28

CSB1#_0 28

CKEB0 28
CKEB1 28

WEB0# 28
WEB1# 28

MAB13 28

1

DQMB#[7..0] 28

QSB[7..0] 28

QSB#[7..0] 28

+1.5VGS +1.5VGS

RV74

RV74

40.2_0402_1%

40.2_0402_1%

PX@

PX@

12

RV75

RV75

40.2_0402_1%

40.2_0402_1%

PX@

PX@

12

+VDD_MEM15_REFSB+VDD_MEM15_REFDBDRAM_RST#_R

12

RV81

RV81

100_0402_1%

100_0402_1%

PX@

PX@

12

CV175

CV175

0.1U_0402_16V7K

0.1U_0402_16V7K

PX@

PX@

RV82

RV82

100_0402_1%

100_0402_1%

PX@

PX@

12

12

CV176

CV176

0.1U_0402_16V7K

0.1U_0402_16V7K

PX@

PX@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/06/30 2013/06/30

2011/06/30 2013/06/30

2011/06/30 2013/06/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ATI_SeymourXT_M2_MEM IF

ATI_SeymourXT_M2_MEM IF

ATI_SeymourXT_M2_MEM IF

LA-8711

LA-8711

LA-8711

1

24 57Sunday, November 27, 2011

24 57Sunday, November 27, 2011

24 57Sunday, November 27, 2011

0.1

0.1

0.1

5

+1.5VGS

D D

VDDR1 CRB Design

0.1u 6 6
1u 10 5
10u 6 5

VDD_CT CRB Design

0.1u 1 1
1u 3 3
10u 1 1

VDDR3 CRB Design

C C

1u 3 3
10u 1 1

VDDR4 CRB Design

0.1u 1 1
1u 1 1

MPV18 CRB Design

0.1u 2 1
1u 2 1
10u 1 1

SPV18 CRB Design

0.1u 1 1
1u 1 1
10u 1 1

SPV10 CRB Design

0.1u 1 1
1u 1 1
10u 1 1

B B

A A

1

CV87

CV87

+

+

@

@

2

220U_B2_2.5VM_R35

220U_B2_2.5VM_R35

1

1

1

1

CV93

CV82

2

2

PX@ CV93

PX@

PX@ CV82

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CV94

CV95

CV83

2

2

2

PX@ CV94

PX@

PX@ CV95

PX@

PX@ CV83

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

+1.8VGS +VDDC_CT

+3VGS

1

1

CV139

CV140

2

2

PX@ CV139

PX@

PX@ CV140

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

For DDR3/GDDR5, MVDDQ = 1.5V

1

1

1

1

CV96

CV85

CV97

CV84

2

2

2

2

PX@ CV96

PX@

PX@ CV85

PX@

PX@ CV97

PX@

PX@ CV84

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

LV7

PX@ LV7

PX@

1 2

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

1

CV142

CV141

2

2

PX@ CV142

PX@

PX@ CV141

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.8VGS

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

(1.8V@250mA VDD_CT)

10U_0603_6.3V6M

10U_0603_6.3V6M

PX@ LV8

PX@

1 2

1

1

CV98

CV86

2

2

PX@ CV98

PX@

PX@ CV86

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

CV122

CV123

2

2

PX@ CV122

PX@

PX@ CV123

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

LV8

(1.8V@300mA VDDR4)

VCC_GPU_SENSE56

VDDCI_SEN54

VSS_GPU_SENSE56

4

Note: RV2 No stuff for Chelsea 10.19

UVG1E

UVG1E

PART 5 0F 9

PART 5 0F 9

MEM I/O

MEM I/O

VDDR1

AC7

AD11

VDDR1

AF7

VDDR1

VDDR1

AG10

1

1

1

1

CV99

CV101

CV102

CV100

2

2

PX@ CV101

PX@

PX@ CV100

PX@

PX@ CV99

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

1

CV124

CV126

CV125

2

2

2

PX@ CV124

PX@

PX@ CV126

PX@

PX@ CV125

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

1

CV144

CV143

2

PX@ CV144

PX@

PX@ CV143

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

AJ7

VDDR1

VDDR1

AK8
AL9

2

0.1U_0402_16V7K

0.1U_0402_16V7K

+VDDR4

1

2

VDDR1

2

G11

VDDR1

VDDR1

G14

PX@ CV102

PX@

G17

VDDR1

VDDR1

AF26
AF27
AG26
AG27

AF23
AF24
AG23
AG24

AD12
AF11
AF12
AF13

AF15
AG11
AG13
AG15

AF28

AG28

AH29

G20
G23
G26
G29
H10

K11
K13

M11
N11

R11
U11

Y11

K8
L12
L16
L21
L23
L26

L7

P7

U7

J7
J9

Y7

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

VDDR1

LEVEL

LEVEL

TRANSLATION

TRANSLATION

VDD_CT

VDD_CT

VDD_CT

VDD_CT

I/O

I/O

VDDR3

VDDR3

VDDR3

VDDR3

DVP

DVP

VDDR4

VDDR4

VDDR4

VDDR4

VDDR4

VDDR4

VDDR4

VDDR4

VOLTAGE

VOLTAGE

SENESE

SENESE

FB_VDDC

FB_VDDCI

FB_GND

PCIE

PCIE

BACO

BACO

CORE

CORE

2160834000A10CHELSE_FCBGA962

2160834000A10CHELSE_FCBGA962

3

( 1.8V @0mA NC_PCIE_VDDR)

NC_PCIE_VDDR

AA31
AA32

NC_PCIE_VDDR

AA33

NC_PCIE_VDDR

NC_PCIE_VDDR

AA34
W30

NC_PCIE_VDDR

NC_PCIE_VDDR

Y31
V28

NC_BIF_VDDC

W29

NC_BIF_VDDC

PCIE_PVDD

AB37

PCIE_VDDC

G30
G31

PCIE_VDDC

H29

PCIE_VDDC

PCIE_VDDC

H30
J29

PCIE_VDDC

PCIE_VDDC

J30
L28

PCIE_VDDC

M28

PCIE_VDDC

PCIE_VDDC

N28
R28

PCIE_VDDC

PCIE_VDDC

T28
U28

PCIE_VDDC

N27

BIF_VDDC

BIF_VDDC

T27

VDDC

AA15
AA17

VDDC

VDDC

AA20
AA22

VDDC

AA24

VDDC

VDDC

AA27
AB16

VDDC

VDDC

AB18
AB21

VDDC

AB23

VDDC

VDDC

AB26
AB28

VDDC

VDDC

AC17
AC20

VDDC

AC22

VDDC

VDDC

AC24
AC27

VDDC

VDDC

AD18
AD21

VDDC

AD23

VDDC

VDDC

AD26
AF17

VDDC

VDDC

AF20
AF22

VDDC

AG16

VDDC

VDDC

AG18

VDDC

AH22
AH27

VDDC

AH28

VDDC

VDDC

M26
N24

VDDC

VDDC

R18
R21

VDDC

R23

VDDC

VDDC

R26
T17

VDDC

VDDC

T20
T22

VDDC

T24

VDDC

VDDC

U16
U18

VDDC

VDDC

U21
U23

VDDC

U26

VDDC

VDDC

V17
V20

VDDC

VDDC

V22
V24

VDDC

V27

VDDC

VDDC

Y16
Y18

VDDC

VDDC

Y21
Y23

VDDC

Y26

VDDC

VDDC

Y28

VDDCI

AA13
AB13

VDDCI

AC12

VDDCI

VDDCI

AC15
AD13

VDDCI

VDDCI

AD16
M15

VDDCI

M16

VDDCI

VDDCI

M18
M23

VDDCI

VDDCI

N13
N15

VDDCI

N17

VDDCI

ISOLATED

ISOLATED

VDDCI

N20

CORE I/O

CORE I/O

N22

VDDCI

VDDCI

R12
R13

VDDCI

R16

VDDCI

VDDCI

T12
T15

VDDCI

VDDCI

V15
Y13

VDDCI

1 2

(1.8V@200mA
PCIE_PVDD)

2

+1.8VGS

LV6

PX@LV6

RV20_0402_5%@ RV20_0402_5%@

+PCIE_VDDR

1

1

CV88

CV89

2

2

PX@ CV88

PX@

PX@ CV89

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

10U_0603_6.3V6M

10U_0603_6.3V6M

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

CV92

2

PX@ CV92

PX@

0.935V

PX@

12

1

(1.0V@1900mA PCIE_VDDC)

1

1

1

CV105

CV104

CV103

2

2

2

PX@ CV105

PX@

PX@ CV104

PX@

PX@ CV103

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

CV108

CV106

CV107

2

2

@ CV107

@

PX@ CV106

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

2

PX@ CV108

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

(0.935V@ 1200mA BIF_VDDC)

(0.8~1.1V@ 22000mA VDDC)

1

1

CV112

CV113

CV111

CV109

CV110

2

2

2

2

2

PX@ CV112

PX@

PX@ CV113

PX@

PX@ CV111

PX@

PX@ CV109

PX@

PX@ CV110

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV127

2

PX@ CV127

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV129

CV130

CV128

2

2

2

PX@ CV129

PX@

PX@ CV130

PX@

PX@ CV128

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

CV116

CV115

CV114

2

2

2

PX@ CV116

PX@

PX@ CV115

PX@

PX@ CV114

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

CV132

CV131

CV133

2

2

2

PX@ CV132

PX@

PX@ CV131

PX@

PX@ CV133

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

(DDR3 0.91V@2.2A VDDCI)

1

1

1

1

CV155

CV157

CV156

2

2

2

PX@ CV155

PX@

PX@ CV157

PX@

PX@ CV156

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

VDDCI and VDDC should have seperate regulators with a merge option on PCB
For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator

VDDCI and VDDC should have seperate regulators with a merge option on PCB
For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator

1

1

CV158

2

PX@ CV158

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CV159

CV160

CV161

2

2

2

PX@ CV159

PX@

PX@ CV160

PX@

PX@ CV161

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

0.935V

1

1

CV147

CV148

2

2

PX@ CV147

PX@

PX@ CV148

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CV117

2

PX@ CV117

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

+VGA_CORE

1

1

CV118

2

PX@ CV118

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV120

CV121

CV119

2

2

2

PX@ CV120

PX@

PX@ CV121

PX@

PX@ CV119

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

+VGA_CORE

1

1

CV134

CV135

2

2

PX@ CV134

PX@

PX@ CV135

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

CV138

CV136

CV137

2

2

2

PX@ CV138

PX@

PX@ CV136

PX@

PX@ CV137

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

+VGA_CORE

1

1

CV145

CV146

2

2

PX@ CV145

PX@

PX@ CV146

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

For Chelsea, Delete 2*1U

PCIE_VDDR CRB Design

0.1u 2 2
1u 1 1
10u 1 1

PCIE_VDDC CRB Design
1u 7 5 (1@)
10u 1 1

VDDC CRB Design
1u 30 25
10u 10 1
22u 0 1

+VDDCI

VDDCI CRB Design

1

1

CV162

CV163

2

2

PX@ CV162

PX@

PX@ CV163

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

CV167

CV164

CV165

2

2

2

PX@ CV167

PX@

PX@ CV164

PX@

PX@ CV165

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

22U_0603_6.3V6M

22U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1u 10 9
10u 3 2
22u 0 1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/06/30 2013/06/30

2011/06/30 2013/06/30

2011/06/30 2013/06/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ATI_SeymourXT_M2_Power

ATI_SeymourXT_M2_Power

ATI_SeymourXT_M2_Power

LA-8711

LA-8711

LA-8711

1

25 57Sunday, November 27, 2011

25 57Sunday, November 27, 2011

25 57Sunday, November 27, 2011

0.1

0.1

0.1

5

D D

+1.8VGS

RV47

RV47

1 2

0_0402_5%

0_0402_5%

PX@

PX@

C C

B B

A A

+DPCD_VDD18

+DPCD_VDD18

RV51150_0402_1% PX@ RV51150_0402_1% PX@

12

RV50150_0402_1% PX@ RV50150_0402_1% PX@

12

RV55150_0402_1% PX@ RV55150_0402_1% PX@

12

4

DP_VDDR DP_VDDC

DP_VDDR DP_VDDC

AN24

DP_VDDR

AP24

DP_VDDR

DP_VDDR

AP25
AP26

DP_VDDR

DP_VDDR

AU28
AV29

DP_VDDR

AP20

DP_VDDR

DP_VDDR

AP21
AP22

DP_VDDR

AP23

DP_VDDR

DP_VDDR

AU18
AV19

DP_VDDR

AH34

DP_VDDR

DP_VDDR

AJ34
AF34

DP_VDDR

DP_VDDR

AG34
AM37

DP_VDDR

AL38

DP_VDDR

CALIBRATION

CALIBRATION

DPAB_CALR

AW28

AW18

DPCD_CALR

AM39

DPEF_CALR

UVG1H

UVG1H

PART 8 0F 9

PART 8 0F 9

DP GND

DP GND

2160834000A10CHELSE_FCBGA962

2160834000A10CHELSE_FCBGA962

DP_VDDC

DP_VDDC

DP_VDDC

DP_VDDC

DP_VDDC

DP_VDDC

DP_VDDC

DP_VDDC

DP_VDDC

DP_VDDC

DP_VDDC

DP_VDDC

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

DP_VSSR

AP31
AP32
AN33
AP33

AP13
AT13
AP14
AP15

AL33
AM33
AK33
AK34

AN27
AP27
AP28
AW24
AW26
AN29
AP29
AP30
AW30
AW32
AN17
AP16
AP17
AW14
AW16
AN19
AP18
AP19
AW20
AW22
AN34
AP39
AR39
AU37
AF39
AH39
AK39
AL34
AV27
AR28
AV17
AR18
AN38
AM35

+DPAB_VDD10

3

+DPAB_VDD10

1 2

0_0603_5%

0_0603_5%

RV48

RV48

PX@

PX@

0.935V

2

AB39

1

UVG1F

UVG1F

PART 6 0F 9

PART 6 0F 9

PCIE_VSS

E39

PCIE_VSS

PCIE_VSS

F34
F39

PCIE_VSS

G33

PCIE_VSS

PCIE_VSS

G34
H31

PCIE_VSS

PCIE_VSS

H34
H39

PCIE_VSS

J31

PCIE_VSS

PCIE_VSS

J34

K31

PCIE_VSS

PCIE_VSS

K34
K39

PCIE_VSS

L31

PCIE_VSS

PCIE_VSS

L34

M34

PCIE_VSS

PCIE_VSS

M39
N31

PCIE_VSS

N34

PCIE_VSS

PCIE_VSS

P31
P34

PCIE_VSS

PCIE_VSS

P39
R34

PCIE_VSS

T31

PCIE_VSS

PCIE_VSS

T34
T39

PCIE_VSS

PCIE_VSS

U31
U34

PCIE_VSS

V34

PCIE_VSS

PCIE_VSS

V39

W31

PCIE_VSS

PCIE_VSS

W34

Y34

PCIE_VSS

Y39

PCIE_VSS

GND

F15
F17
F19
F21
F23
F25
F27
F29
F31
F33

F7

F9
G2
G6
H9

J2

J27

J6

J8

K14

K7

L11
L17

L2

L22
L24

L6

M17
M22
M24
N16
N18

N2

N21
N23
N26

N6

R15
R17

R2

R20
R22
R24
R27

R6

T11
T13
T16
T18
T21
T23
T26
U15
U17

U2

U20
U22
U24
U27

U6

V11
V16
V18
V21
V23
V26

W2

W6
Y15
Y17
Y20
Y22
Y24
Y27

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

A3
A37

GND

GND

AA16
AA18

GND

AA2

GND

GND

AA21
AA23

GND

GND

AA26
AA28

GND

AA6

GND

GND

AB12
AB15

GND

GND

AB17
AB20

GND

AB22

GND

GND

AB24
AB27

GND

GND

AC11
AC13

GND

AC16

GND

GND

AC18
AC2

GND

GND

AC21
AC23

GND

AC26

GND

GND

AC28
AC6

GND

GND

AD15
AD17

GND

AD20

GND

GND

AD22
AD24

GND

GND

AD27
AD9

GND

AE2

GND

GND

AE6
AF10

GND

GND

AF16
AF18

GND

AF21

GND

GND

AG17
AG2

GND

GND

AG20
AG22

GND

AG6

GND

GND

AG9
AH21

GND

GND

AJ10
AJ11

GND

AJ2

GND

GND

AJ28
AJ6

GND

GND

AK11
AK31

GND

AK7

GND

GND

AL11
AL14

GND

GND

AL17
AL2

GND

AL20

GND

AL23

GND

GND

AL26
AL32

GND

AL6

GND

GND

AL8
AM11

GND

GND

AM31
AM9

GND

AN11

GND

GND

AN2
AN30

GND

GND

AN6
AN8

GND

AP11

GND

GND

AP7
AP9

GND

GND

AR5
B11

GND

B13

GND

GND

B15
B17

GND

GND

B19
B21

GND

B23

GND

GND

B25
B27

GND

GND

B29
B31

GND

B33

GND

GND

B7
B9

GND

GND

C1
C39

GND

E35

GND

GND

E5
F11

GND

GND

F13

VSS_MECH

A39
AW1

VSS_MECH

AW39

VSS_MECH

2160834000A10CHELSE_FCBGA962

2160834000A10CHELSE_FCBGA962

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/06/30 2013/06/30

2011/06/30 2013/06/30

2011/06/30 2013/06/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ATI_SetmourXT_M2_PWR_GND

ATI_SetmourXT_M2_PWR_GND

ATI_SetmourXT_M2_PWR_GND

LA-8711

LA-8711

LA-8711

1

26 57Sunday, November 27, 2011

26 57Sunday, November 27, 2011

26 57Sunday, November 27, 2011

0.1

0.1

0.1

5

4

3

2

1

UV5

UV5

VREFC_A1

M8

VREFD_Q1

D D

MDA[0..63]24

MAA[13..0]24

DQMA#[7..0]24

QSA[7..0]24

QSA#[7..0]24

C C

CLKA0

RV87 40.2_0402_1%

RV87 40.2_0402_1%

CLKA0#

RV88 40.2_0402_1%

RV88 40.2_0402_1%

B B

CLKA1

RV97 40.2_0402_1%

RV97 40.2_0402_1%

CLKA1#

RV98 40.2_0402_1%

RV98 40.2_0402_1%

PX@

PX@

1 2

PX@

PX@

1 2

PX@

PX@

1 2

PX@

PX@

1 2

MDA[0..63]

MAA[13..0]

DQMA#[7..0]

QSA[7..0]

QSA#[7..0]

12

CV177

CV177

0.01U_0402_16V7K

0.01U_0402_16V7K

PX@

PX@

12

CV179

CV179

0.01U_0402_16V7K

0.01U_0402_16V7K

PX@

PX@

A_BA024
A_BA124
A_BA224

CLKA024
CLKA0#24
CKEA024

ODTA024
CSA0#_024
RASA0#24
CASA0#24
WEA0#24

QSA1 QSA0

QSA0 QSA1

QSA2 QSA3

QSA3 QSA2

DQMA#1 DQMA#0

DQMA#0 DQMA#1

DQMA#2 DQMA#3

DQMA#3 DQMA#2

QSA#1 QSA#0

QSA#0 QSA#1

QSA#2 QSA#3

DRAM_RST#24,28

RV83

RV83

240_0402_1%

240_0402_1%

PX@

PX@

VREFCA

H1

VREFDQ

MAA0

N3

A0

MAA1

P7

A1

MAA2

P3

A2

MAA3

N2

A3

MAA4

P8

A4

MAA5

P2

A5

MAA6

R8

A6

MAA7

R2

A7

MAA8

T8

A8

MAA9

R3

A9

MAA10

L7

A10/AP

MAA11

R7

A11

MAA12

N7

A12

MAA13

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

12

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

H5TQ2G63BFR-11C_FBGA96

+1.5VGS +1.5VGS

12

RV89

RV89

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

12

RV99

RV99

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

11/25 swap UV5.F8/ UV5.H8 =>MDA3/MDA0

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VREFD_Q1 VREFD_Q2

0.1U_0402_16V7K

0.1U_0402_16V7K

12

CV180

CV180

PX@

PX@

MDA14 MDA0

MDA1

F7

MDA9 MDA6

F2

MDA11 MDA1

MDA3

F8

MDA15 MDA4

MDA4 MDA15

H3

MDA12 MDA2

MDA0

H8

MDA8 MDA7

MDA7 MDA8

G2

MDA13

MDA2

H7

MDA20 MDA25

MDA25 MDA20

D7

MDA19 MDA31

MDA31 MDA19

C3

MDA23 MDA27

MDA27 MDA23

C8

MDA18 MDA28

MDA28 MDA18

C2

MDA22 MDA26

MDA26 MDA22

A7

MDA16 MDA30

A2

MDA21 MDA24

MDA24 MDA21

B8

MDA17 MDA29

MDA29 MDA17

A3

+1.5VGS

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VGS

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS

12

RV90

RV90

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

12

RV100

RV100

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

MDA10

MDA5

E3

VREFC_A2
VREFD_Q2

12

RV84

RV84

240_0402_1%

240_0402_1%

PX@

PX@

VREFC_A1 VREFC_A2

0.1U_0402_16V7K

0.1U_0402_16V7K

12

CV181

CV181

PX@

PX@

UV6

UV6

M8
H1

MAA0 MAA0 MAA0

N3

MAA1 MAA1 MAA1

P7

MAA2 MAA2 MAA2

P3

MAA3 MAA3 MAA3

N2

MAA4 MAA4 MAA4

P8

MAA5 MAA5 MAA5

P2

MAA6 MAA6 MAA6

R8

MAA7 MAA7 MAA7

R2

MAA8 MAA8 MAA8

T8

MAA9 MAA9 MAA9

R3

MAA10 MAA10 MAA10

L7

MAA11 MAA11 MAA11

R7

MAA12 MAA12 MAA12

N7

MAA13 MAA13 MAA13

T3
T7

M7

A_BA0 A_BA0 A_BA0

M2

A_BA1 A_BA1 A_BA1

N8

A_BA2 A_BA2 A_BA2

M3

CLKA0

J7

CLKA0#

K7

CKEA0 CKEA1

K9

ODTA0 ODTA1

K1

CSA0#_0 CSA1#_0

L2

RASA0# RASA1#

J3

CASA0# CASA1#

K3

WEA0# WEA1#

L3

F3

C7

E7

D3

G3

QSA#2QSA#3

B7

DRAM_RST# DRAM_RST# DRAM_RST#

T2

L8

J1
L1
J9
L9

H5TQ2G63BFR-11C_FBGA96

H5TQ2G63BFR-11C_FBGA96

RV91

RV91

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

RV102

RV102

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

12

12

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

0.1U_0402_16V7K

0.1U_0402_16V7K

12

CV182

CV182

PX@

PX@

MDA13

E3

MDA14

F7

MDA9MDA6

F2

MDA11

F8
H3

MDA12

H8
G2

MDA10

H7

D7
C3
C8
C2
A7

MDA16MDA30

A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

RV92

RV92

PX@

PX@

RV103

RV103

MDA5

MDA3

+1.5VGS

+1.5VGS

12

12

240_0402_1%

240_0402_1%

12

CV178

CV178

PX@

PX@

RV85

RV85

PX@

PX@

UV8

UV7

M8
H1

N3

N2

R8
R2

R3

R7
N7

M7

M2
N8
M3

C7

D3

G3

RV93

RV93

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

RV104

RV104

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

UV7

VREFCA
VREFDQ

A0

P7

A1

P3

A2
A3

P8

A4

P2

A5
A6
A7

T8

A8
A9

L7

A10/AP
A11
A12

T3

A13

T7

A14
A15/BA3

BA0
BA1
BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL
DQSU

E7

DML
DMU

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

H5TQ2G63BFR-11C_FBGA96

12

12

CV183

CV183

PX@

PX@

VREFC_A3

0.1U_0402_16V7K

0.1U_0402_16V7K

12

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

+1.5VGS

+1.5VGS

240_0402_1%

240_0402_1%

PX@

PX@

MDA58

MDA57

CV184

CV184

RV86

RV86

PX@

PX@

12

12

VREFD_Q3

0.1U_0402_16V7K

0.1U_0402_16V7K

VREFC_A4
VREFD_Q4

CLKA1
CLKA1#

QSA5
QSA4

DQMA#5
DQMA#4

QSA#5
QSA#4

MDA54

E3

MDA53

F7

MDA55

F2

MDA50

F8

MDA49

H3

MDA48

H8

MDA52

G2

MDA51

H7

MDA63

D7

MDA59

C3

MDA62

C8

MDA56

C2

MDA60

A7

MDA57

A2

MDA61

B8

MDA58

A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

12

RV94

RV94

PX@

PX@

12

RV105

RV105

PX@

PX@

VREFC_A3
VREFD_Q3

CLKA124
CLKA1#24
CKEA124

ODTA124
CSA1#_024
RASA1#24
CASA1#24
WEA1#24

QSA6
QSA7

DQMA#6
DQMA#7

QSA#6
QSA#7

12

0.1U_0402_16V7K

0.1U_0402_16V7K

M8
H1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

M2
N8
M3

J7
K7
K9

K1
L2
J3
K3
L3

F3
C7

E7
D3

G3
B7

T2

L8

J1
L1
J9
L9

RV95

RV95

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

RV106

RV106

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

UV8

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

12

12

PX@

PX@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VREFC_A4

0.1U_0402_16V7K

0.1U_0402_16V7K

12

CV185

CV185

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

H5TQ2G63BFR-11C_FBGA96

H5TQ2G63BFR-11C_FBGA96

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

RV96

RV96

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

RV101

RV101

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

MDA42
MDA44
MDA47
MDA40
MDA46
MDA41
MDA45
MDA43

MDA32
MDA36
MDA33
MDA39
MDA35
MDA38
MDA34
MDA37

+1.5VGS

+1.5VGS

12

12

MDA40

MDA45
MDA42

MDA47

PX@

PX@

CV186

CV186

VREFD_Q4

0.1U_0402_16V7K

0.1U_0402_16V7K

12

+1.5VGS

1

1

CV187

2

PX@ CV187

PX@

0.1U_0402_16V7K

A A

0.1U_0402_16V7K

CV189

CV188

2

2

PX@ CV189

PX@

PX@ CV188

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

5

1

1

1

CV190

CV191

2

2

PX@ CV190

PX@

PX@ CV191

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

CV193

CV192

2

2

PX@ CV193

PX@

PX@ CV192

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

CV194

2

PX@ CV194

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

1

CV195

CV196

CV197

2

2

PX@ CV195

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

2

PX@ CV196

PX@

PX@ CV197

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

1

CV198

CV199

2

2

PX@ CV198

PX@

PX@ CV199

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

4

+1.5VGS

CV200

PX@ CV200

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

+1.5VGS +1.5VGS

1

1

1

2

1

1

CV203

CV202

CV201

2

2

2

PX@ CV203

PX@

PX@ CV202

PX@

PX@ CV201

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

CV204

2

PX@ CV204

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

Issued Date

Issued Date

Issued Date

1

CV205

2

PX@ CV205

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV207

CV206

2

2

PX@ CV207

PX@

PX@ CV206

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

CV208

2

PX@ CV208

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV209

CV210

2

2

PX@ CV209

PX@

PX@ CV210

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

Compal Secret Data

Compal Secret Data

Compal Secret Data

1

1

CV212

CV211

2

2

PX@ CV212

PX@

PX@ CV211

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

Deciphered Date

Deciphered Date

Deciphered Date

2

1

CV213

2

PX@ CV213

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CV214

2

PX@ CV214

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV215

2

PX@ CV215

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CV216

CV217

2

2

PX@ CV216

PX@

PX@ CV217

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

Title

Title

Title

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

C 0.1

C 0.1

C 0.1

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1

CV219

CV218

2

2

PX@ CV219

PX@

PX@ CV218

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ATI_SeymourXT_M2_VRAM_A

ATI_SeymourXT_M2_VRAM_A

ATI_SeymourXT_M2_VRAM_A

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CV220

2

PX@ CV220

PX@

1

CV221

2

PX@ CV221

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

LA-8711

LA-8711

LA-8711

1

1

1

CV223

CV222

2

2

PX@ CV223

PX@

PX@ CV222

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

27 57Sunday, November 27, 2011

27 57Sunday, November 27, 2011

27 57Sunday, November 27, 2011

5

UV9

VREFC_A1_B
VREFD_Q1_B

D D

MDB[0..63]24

MAB[13..0]24

DQMB#[7..0]24

QSB[7..0]24

QSB#[7..0]24

C C

CLKB0

RV107 40.2_0402_1%

RV107 40.2_0402_1%

CLKB0#

RV108 40.2_0402_1%

RV108 40.2_0402_1%

CLKB1

1 2

RV113 40.2_0402_1%

RV113 40.2_0402_1%

CLKB1#

1 2

RV114 40.2_0402_1%

RV114 40.2_0402_1%

PX@

PX@

1 2

PX@

PX@

1 2

PX@

PX@

PX@

PX@

MDB[0..63]

MAB[13..0]

DQMB#[7..0]

QSB[7..0]

QSB#[7..0]

12

12

CV224

CV224

0.01U_0402_16V7K

0.01U_0402_16V7K

PX@

PX@

CV225

CV225

0.01U_0402_16V7K

0.01U_0402_16V7K

PX@

PX@

B_BA024
B_BA124
B_BA224

CLKB024
CLKB0#24
CKEB024

ODTB024
CSB0#_024
RASB0#24
CASB0#24
WEB0#24

QSB2
QSB1

DQMB#2
DQMB#1

QSB#2 QSB#0
QSB#1

DRAM_RST#24,27

12

RV109

RV109

240_0402_1%

240_0402_1%

PX@

PX@

UV9

M8

H1

MAB0 MAB0 MAB0 MAB0

N3

MAB1 MAB1 MAB1 MAB1

P7

MAB2 MAB2 MAB2 MAB2

P3

MAB3 MAB3 MAB3 MAB3

N2

MAB4 MAB4 MAB4 MAB4

P8

MAB5 MAB5 MAB5 MAB5

P2

MAB6 MAB6 MAB6 MAB6

R8

MAB7 MAB7 MAB7 MAB7

R2

MAB8 MAB8 MAB8 MAB8

T8

MAB9 MAB9 MAB9 MAB9

R3

MAB10 MAB10 MAB10 MAB10

L7

MAB11 MAB11 MAB11 MAB11

R7

MAB12 MAB12 MAB12 MAB12

N7

MAB13 MAB13 MAB13 MAB13

T3
T7

M7

M2

N8

M3

J7
K7
K9

K1
L2
J3
K3
L3

F3
C7

E7
D3

G3

B7

T2

L8

J1
L1
J9
L9

H5TQ2G63BFR-11C_FBGA96

H5TQ2G63BFR-11C_FBGA96

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

4

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

3

UV11

UV10

UV10

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

B_BA0 B_BA0 B_BA0
B_BA1 B_BA1 B_BA1
B_BA2 B_BA2 B_BA2

CLKB0
CLKB0#
CKEB0 CKEB1

ODTB0 ODTB1
CSB0#_0 CSB1#_0
RASB0# RASB1#
CASB0# CASB1#
WEB0# WEB1#

QSB0
QSB3

DQMB#0
DQMB#3

QSB#3

DRAM_RST# DRAM_RST# DRAM_RST#

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

H5TQ2G63BFR-11C_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

MDB4

E3

MDB3

F7

MDB5

F2

MDB0

F8

MDB6

H3

MDB1

H8

MDB7

G2

MDB2

H7

MDB26

D7

MDB27

C3

MDB28

MDB24

C8

MDB31

C2

MDB24

MDB28

A7

MDB29

A2

MDB25

B8

MDB30

A3

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+1.5VGS

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VREFC_A3_B
VREFD_Q3_B

CLKB124
CLKB1#24
CKEB124

ODTB124
CSB1#_024
RASB1#24
CASB1#24
WEB1#24

QSB7 QSB5

QSB5 QSB7

DQMB#5 DQMB#6

DQMB#6 DQMB#4

DQMB#7 DQMB#5

DQMB#5 DQMB#7

QSB#4 QSB#6

QSB#6 QSB#4

QSB#7 QSB#5

QSB#5 QSB#7

12

RV111

RV111

240_0402_1%

240_0402_1%

PX@

PX@

240_0402_1%

240_0402_1%

RV110

RV110

PX@

PX@

VREFC_A2_B
VREFD_Q2_B

12

MDB19

E3

MDB21

F7

MDB17

MDB16

F2

MDB18

F8

MDB20

H3

MDB22

H8

MDB16

MDB17

G2

MDB23

H7

MDB15

D7

MDB11

C3

MDB14

C8

MDB10

C2

MDB12

A7

MDB9

A2

MDB13

B8

MDB8

A3

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+1.5VGS

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

UV11

M8
H1

N3

P7
P3

N2

P8

P2
R8
R2

T8
R3

L7
R7
N7

T3

T7
M7

M2
N8
M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

J1

L1

J9

L9

H5TQ2G63BFR-11C_FBGA96

H5TQ2G63BFR-11C_FBGA96

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

UV12

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDB38 MDB50

MDB50 MDB38

MDB39 MDB54

MDB54 MDB39

MDB36
MDB35

MDB53 MDB35

MDB34
MDB37
MDB32

MDB49 MDB32

MDB62 MDB40

MDB40 MDB62

MDB58 MDB47

MDB47 MDB58

MDB63 MDB42

MDB42 MDB63

MDB56 MDB46

MDB46 MDB56

MDB61 MDB43

MDB43 MDB61

MDB57 MDB45

MDB45 MDB57

MDB60 MDB41

MDB41 MDB60

MDB59 MDB44

MDB44 MDB59

+1.5VGS

+1.5VGS

MDB33 MDB55

MDB55 MDB33

QSB6QSB4

RV112

RV112

240_0402_1%

240_0402_1%

PX@

PX@

VREFC_A4_B
VREFD_Q4_B

CLKB1
CLKB1#

QSB4QSB6

12

UV12

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

H5TQ2G63BFR-11C_FBGA96

H5TQ2G63BFR-11C_FBGA96

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

1

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDB51

MDB36MDB51

MDB53
MDB48

MDB34MDB48

MDB52

MDB37MDB52

MDB49

+1.5VGS

+1.5VGS

B B

+1.5VGS

1

1

1

CV234

CV235

2

A A

2

PX@ CV234

PX@

PX@ CV235

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

1

CV236

CV237

2

2

PX@ CV236

PX@

PX@ CV237

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

5

1

1

CV238

2

PX@ CV238

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

CV239

CV240

2

2

PX@ CV239

PX@

PX@ CV240

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

1

CV241

2

PX@ CV241

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

RV115

RV115

PX@

PX@

RV123

RV123

PX@

PX@

12

VREFD_Q1_B VREFD_Q2_B

12

1

CV228

2

PX@ CV228

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

1

CV243

CV242

2

2

PX@ CV243

PX@

PX@ CV242

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

CV244

CV245

2

2

PX@ CV244

PX@

PX@ CV245

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

4

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

1

CV246

2

PX@ CV246

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

RV116

RV116

PX@

PX@

RV124

RV124

PX@

PX@

12

VREFC_A1_B VREFC_A2_B

12

1

CV226

2

PX@ CV226

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

RV117

RV117

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

RV125

RV125

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

+1.5VGS

1

CV247

2

PX@ CV247

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

12

12

1

CV227

2

PX@ CV227

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

CV248

2

PX@ CV248

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

CV250

CV249

2

2

PX@ CV250

PX@

PX@ CV249

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

RV118

RV118

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

RV126

RV126

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

3

12

12

1

CV229

2

PX@ CV229

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

+1.5VGS +1.5VGS

1

1

CV251

CV252

2

2

PX@ CV251

PX@

PX@ CV252

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

RV119

RV119

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

VREFC_A3_B

12

1

RV128

RV128

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

1

CV253

2

PX@ CV253

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

CV230

2

PX@ CV230

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

CV254

2

PX@ CV254

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

1

CV255

2

PX@ CV255

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CV256

2

PX@ CV256

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

Compal Secret Data

Compal Secret Data

Compal Secret Data

RV120

RV120

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

RV127

RV127

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

1

CV257

2

PX@ CV257

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

Deciphered Date

Deciphered Date

Deciphered Date

12

12

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

CV258

CV259

2

2

PX@ CV258

PX@

PX@ CV259

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

2

VREFD_Q3_B

1

CV231

2

PX@ CV231

PX@

CV260

PX@ CV260

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

12

RV121

RV121

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

12

RV129

RV129

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

2

1

CV261

2

PX@ CV261

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV263

CV262

2

2

PX@ CV263

PX@

PX@ CV262

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

12

RV122

RV122

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

VREFC_A4_B

1

CV232

2

PX@ CV232

PX@

Date: Sheet of

Date: Sheet of

Date: Sheet of

RV130

RV130

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

1

1

CV265

CV264

2

2

PX@ CV265

PX@

PX@ CV264

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

Title

Title

Title

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

C 0.1

C 0.1

C 0.1

1U_0402_6.3V6K

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ATI_SeymourXT_M2_VRAM_B

ATI_SeymourXT_M2_VRAM_B

ATI_SeymourXT_M2_VRAM_B

VREFD_Q4_B

12

1

CV233

2

PX@ CV233

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

CV268

2

PX@ CV268

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

LA-8711

LA-8711

LA-8711

1

1

1

CV269

CV270

2

2

PX@ CV269

PX@

PX@ CV270

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

28 57Sunday, November 27, 2011

28 57Sunday, November 27, 2011

28 57Sunday, November 27, 2011

1

1

CV267

CV266

2

2

PX@ CV267

PX@

PX@ CV266

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

5

PCH_DPB_P3_C

PCH_DPB_N3_C

PCH_DPB_P2_C

PCH_DPB_N2_C

PCH_DPB_P1_C

PCH_DPB_N1_C

PCH_DPB_P0_C

PCH_DPB_N0_C

D D

R3 680_04 02_5%R3 680_0402 _5%

C C

R5 680_04 02_5%R5 680_0402 _5%

R4 680_04 02_5%R4 680_0402 _5%

12

12

R7 680_04 02_5%R7 680_0402 _5%

R6 680_04 02_5%R6 680_0402 _5%

12

R8 680_04 02_5%R8 680_0402 _5%

12

12

R10 680_0402_5%R10 680_0402_5%

R9 680_04 02_5%R9 680_0402 _5%

12

12

12

1 2

+3VS

0_0402_5%

0_0402_5%

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

2N7002KDW_SOT 363-6

2N7002KDW_SOT 363-6

Q47B

Q47B

3

R2694

R2694

5

12

SM070001310 400ma 90ohm@100mhz DCR 0.3

@

1

1

4

4

1

1

4

4

1

1

4

4

1

1

4

4

@

1 2

1 2

@

@

@

@

1 2

1 2

@

@

1 2

1 2

@

@

1 2

1 2

@

@

2

2

3

3

2

2

3

3

2

2

3

3

2

2

3

3

R2702 0_0402_5%

R2702 0_0402_5%

L28

L28
WCM-2012-900T_ 0805

WCM-2012-900T_ 0805

PCH_DPB_N3_C HDMI_R_CK-

L29

L29
WCM-2012-900T_ 0805

WCM-2012-900T_ 0805

B B

A A

PCH_DPB_N0_C HDMI_R_D0-

L30

L30
WCM-2012-900T_ 0805

WCM-2012-900T_ 0805

PCH_DPB_N1_C HDMI_R_D1-

L31

L31
WCM-2012-900T_ 0805

WCM-2012-900T_ 0805

PCH_DPB_N2_C HDMI_R_D2-

5

R2703 0_0402_5%

R2703 0_0402_5%

R2707 0_0402_5%

R2707 0_0402_5%

R2708 0_0402_5%

R2708 0_0402_5%

R2709 0_0402_5%@R270 9 0_0402_5%@

R2710 0_0402_5%

R2710 0_0402_5%

R2711 0_0402_5%@R2711 0_0402_5%@

R2712 0_0402_5%

R2712 0_0402_5%

C10.1U_0402_16V7K C10.1U_0402_1 6V7K
C20.1U_0402_16V7K C20.1U_0402_1 6V7K

C30.1U_0402_16V7K C30.1U_0402_1 6V7K
C40.1U_0402_16V7K C40.1U_0402_1 6V7K

C50.1U_0402_16V7K C50.1U_0402_1 6V7K
C60.1U_0402_16V7K C60.1U_0402_1 6V7K

C70.1U_0402_16V7K C70.1U_0402_1 6V7K
C80.1U_0402_16V7K C80.1U_0402_1 6V7K

4

R2695

R2695
100K_0402_5%

100K_0402_5%

HDMI_R_CK+PCH _DPB_P3_C

HDMI_R_D0+PCH_DPB_P0_C

HDMI_R_D1+PCH_DPB_P1_C

HDMI_R_D2+PCH_DPB_P2_C

4

PCH_DPB_P3
PCH_DPB_N3

PCH_DPB_P2
PCH_DPB_N2

PCH_DPB_P1
PCH_DPB_N1

PCH_DPB_P0
PCH_DPB_N0

4

3

PCH_DPB_P3 15
PCH_DPB_N3 15

PCH_DPB_P2 15
PCH_DPB_N2 15

PCH_DPB_P1 15
PCH_DPB_N1 15

PCH_DPB_P0 15
PCH_DPB_N0 15

@

@

1 2

C509 33P_0402_50V8 J

C509 33P_0402_50V8 J

@

@

1 2

C510 33P_0402_50V8 J

C510 33P_0402_50V8 J

@

@

1 2

C511 33P_0402_50V8 J

C511 33P_0402_50V8 J

@

@

1 2

C512 33P_0402_50V8 J

C512 33P_0402_50V8 J

@

@

1 2

C513 33P_0402_50V8 J

C513 33P_0402_50V8 J

@

@

1 2

C514 33P_0402_50V8 J

C514 33P_0402_50V8 J

@

@

1 2

C515 33P_0402_50V8 J

C515 33P_0402_50V8 J

@

@

1 2

C516 33P_0402_50V8 J

C516 33P_0402_50V8 J

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Follow Intel
Feedback putting

2.2K ohm

PCH_DDPB_CLK15

PCH_DDPB_DAT15

PCH_DDPB_HPD15

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

HDMI

1 2

R2700

R2700

2.2K_0402_5%

2.2K_0402_5%

R2697

1M_0402_5%

1M_0402_5%

+HDMI_5V_OUT

R2697

Place closed to JHDMI1

Deciphered Date

Deciphered Date

Deciphered Date

12

2

2.2K_0402_5%

2.2K_0402_5%

R2696

R2696

1 2

HDMI_L_SCLK

+3VS

2

HDMI_DETECT HP_DETECT

61

Q47A

Q47A
2N7002KDW_SOT 363-6

2N7002KDW_SOT 363-6

5V Level

HP_DETECT

HDMI_SDATA
HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+
HDMI_R_D0-

HDMI_R_D0+
HDMI_R_D1-

HDMI_R_D1+
HDMI_R_D2-

HDMI_R_D2+

2

1

+3VS

5V PULL UP IN CONNECTER SIDE

5

Q147B

Q147B

2N7002DWH_SOT 363-6

2N7002DWH_SOT 363-6

SB00000AR10

SB00000AR10

+3VS

2N7002DWH_SOT 363-6

2N7002DWH_SOT 363-6

SB00000AR10 Q147A

SB00000AR10

12

20K_0402_5%

20K_0402_5%

19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

HDMI_SCLK

34

@

@

10P_0402_50V8J

10P_0402_50V8J

1

C4617

C4617

2

2

HDMI_SDATA

61

@

@

10P_0402_50V8J

Q147A

L27

L27

MBK1608221YZF_2P

MBK1608221YZF_2P

1 2

1

D56

R2699

R2699

JHDMI1

TYCO_2041343-1~D

TYCO_2041343-1~D

D56
BAV99-7-F_SOT23-3

BAV99-7-F_SOT23-3

@

@

2

3

+3VS

CONN@JHDMI1

CONN@

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CK­CK_shield
CK+
D0­D0_shield
D0+
D1­D1_shield
D1+

GND

D2-

GND

D2_shield

GND

D2+

GND

Title

Title

Title

HDMI Conn

HDMI Conn

HDMI Conn

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

LA-8711

LA-8711

LA-8711

Date: Sheet of

Date: Sheet of

Date: Sheet of

10P_0402_50V8J

1

C4618

C4618

2

23
22
21
20

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

C4615

C4615

220P_0402_50V7K

220P_0402_50V7K

2

1

HDMI_SCLK 30

HDMI_SDATA 30

29 57Sunday, November 27, 2011

29 57Sunday, November 27, 2011

29 57Sunday, November 27, 2011

0.1

0.1

0.1

A

B

C

D

E

CRT CONNECTOR

@D3

@

3

1

D13

DAN217_ SC59

DAN217_ SC59

2

1

C2551

C2551

2

2.2P_0402_50V8C

2.2P_0402_50V8C

1

C2591

C2591

@

@

2

10P_0402_50V8J

10P_0402_50V8J

@D13

@

3

D15

DAN217_ SC59

DAN217_ SC59

2

1

2

2.2P_0402_50V8C

2.2P_0402_50V8C

HSYNC

VSYNC

1

2

10P_0402_50V8J

10P_0402_50V8J

1

3

C2511

C2511

@D15

@

+3VS

JCRT1

JCRT1

6

CONN@

CONN@

11

1
7

12

2
8

13

3
9

14

4
10
15

5

16

G

G

17

G

G

C-H_13-12 201503CP

C-H_13-12 201503CP

CRT_R_L

CRT_DDC _DAT

CRT_R_L

CRT_G_L

CRT_B_L

1

2

2.2P_0402_50V8C

2.2P_0402_50V8C

+CRT_VC C

USE old footrprint need update

CRT_G_L

HSYNC
CRT_B_L

VSYNC

CRT_DDC _CLK

T65 PADT65 PAD

T66 PADT66 PAD

C-H_13-12201503CP_15P-T

+3VS

12

12

R548

R548

2.2K_040 2_5%

2.2K_040 2_5%

PCH_CRT _CLK15

PCH_CRT _DATA15

PCH_CRT _DATA

33P_040 2_50V8K

33P_040 2_50V8K

C2821

C2821

@

@

1

1

2

2

+3VS

R547

R547

2.2K_040 2_5%

2.2K_040 2_5%

Q206B

Q206B

4

C2851

C2851
33P_040 2_50V8K

33P_040 2_50V8K

@

@

2

Q205A

Q205A

5

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

3

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

470P_04 02_50V8J

470P_04 02_50V8J

61

1

C2841

C2841

2

@

@

CRT_DDC _CLKPCH_CRT _CLK

CRT_DDC _DAT

1

C2831

C2831
470P_04 02_50V8J

470P_04 02_50V8J

2

@

@

1

D3

DAN217_ SC59

DAN217_ SC59

1 2

1 2

1 2

1

2

2.2P_0402_50V8C

2.2P_0402_50V8C

2

C2521

C2521

1 1

PCH_CRT _R15

PCH_CRT _G15

PCH_CRT _B15

PCH_CRT _R

PCH_CRT _G

PCH_CRT _B

R160

R160

R2713

R2713

R157

R157

12

12

12

150_0402_1%

150_0402_1%

150_0402_1%

150_0402_1%

150_0402_1%

150_0402_1%

PCH_CRT _R

PCH_CRT _G

R165

R165

L3 NBQ 100505T-800Y_04 02L3 NBQ 100505T-800Y_04 02

L4 NBQ 100505T-800Y_04 02L4 NBQ 100505T-800Y_04 02

PCH_CRT _B

R2729

R2729

R164

R164

12

12

12

150_0402_1%

150_0402_1%

150_0402_1%

150_0402_1%

1

C2561

C2561

150_0402_1%

150_0402_1%

2

2.2P_0402_50V8C

2.2P_0402_50V8C

L5 NBQ 100505T-800Y_04 02L5 NBQ 100505T-800Y_04 02

1

C2571

C2571

C2471

C2471

2

2.2P_0402_50V8C

2.2P_0402_50V8C

Remove CRT EMI C and R

2 2

PCH_CRT _HSYNC15

PCH_CRT _VSYNC15

PCH_CRT _VSYNC

+CRT_VC C

1 2

C2611 0.1U_ 0402_10V7KC2611 0.1 U_0402_10V7K

SN74AHC T1G125GW_ SOT353-5

SN74AHC T1G125GW_ SOT353-5

5

P

A2Y

G

3

1

4

OE#

U7

U7

R159 10K_04 02_5%R159 10K_04 02_5%

+CRT_VC C

SN74AHC T1G125GW_ SOT353-5

SN74AHC T1G125GW_ SOT353-5

D_CRT_H SYNCPCH_CRT _HSYNC

5

P

A2Y

G

3

1

4

OE#

U8

U8

12

1 2

L6 1 0_0402_5%L6 10_0402_5%

D_CRT_V SYNC

1 2

L12 10_0402 _5%L 12 10_0 402_5%

C2581

C2581

@

@

D8

3 3

4 4

+5VS

F1

F1

1.1A_6V_ SMD1812P110T F

1.1A_6V_ SMD1812P110T F

0.1U_040 2_10V7K

0.1U_040 2_10V7K

W=40mils

21

+CRT_VC C +HD MI_5V_OUT

1

C2601

C2601

2

@

@

4.7K_040 2_5%

4.7K_040 2_5%

D8

2 1

RB751V_ SOD323

RB751V_ SOD323

12

R575

R575

12

R576

R576

4.7K_040 2_5%

4.7K_040 2_5%

CRT_DDC _CLK

CRT_DDC _DAT

C4616

C4616

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

+HDMI_5V_ OUT+CRT_VC C

1

2

2.2K_040 2_5%

2.2K_040 2_5%

R545

R545

12

12

R546

R546

2.2K_040 2_5%

2.2K_040 2_5%

HDMI_SDAT A

HDMI_SCLK

HDMI_SDAT A 29

HDMI_SCLK 2 9

For CRT For HDMI

Security Class ification

Security Class ification

Security Class ification

2011/11/ 02 2011/11/ 02

2011/11/ 02 2011/11/ 02

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/11/ 02 2011/11/ 02

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Date: Sheet o f

Date: Sheet o f

D

Date: Sheet o f

Compal Electronics, Inc.

CRT

CRT

CRT

LA-8711

LA-8711

LA-8711

30 57Sunday, November 27, 2 011

30 57Sunday, November 27, 2 011

30 57Sunday, November 27, 2 011

E

0.1

0.1

0.1

5

4

3

2

1

WLAN&BT Combo module circuits

BT
on module

BT
on module

Enable Disable

BT_CRTL

BT_PWR#

D D

BT_ON#17

C C

HI LO

LO HI

BT_ON#

Q26

Q26

2N7002_ SOT23-3

2N7002_ SOT23-3

SI# 7/25 change BT_ON# to BT_ON

R84

11/25 connect EC_PCIE_WAKE# to KBC

BT_ON BT_ON_L

13

D

D

2

G

G

S

S

For Wireless LAN

EC_PCIE_W AKE#36

MINI1_CLKREQ #14

CLK_PCIE_ MINI1#14

CLK_PCIE_ MINI11 4

+3V_AOA C

PLT_RST #5,16 ,21,34,36

PCIE_PRX_ DTX_N314

PCIE_PRX_ DTX_P314

PCIE_PTX_ C_DRX_N314
PCIE_PTX_ C_DRX_P314

12

R70

R70

100K_04 02_5%

100K_04 02_5%

CLK_PCI_D EBUG16

E51TXD_ P80DATA36
E51RXD_ P80CLK36

60mil

1

C86

C86

4.7U_060 3_6.3V6K

4.7U_060 3_6.3V6K

2

1

C87

C87

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

R84

0_0402_ 5%

0_0402_ 5%

1 2

1 2

0_0402_ 5%

0_0402_ 5%

PLT_RST #

CLK_PCI_D EBUG

1 2

R58

R58
0_0402_ 5%

0_0402_ 5%

1 2
1 2

0_0402_ 5%

0_0402_ 5%

R57

R57

BT_ON

+1.5VS +1.5VS_W LAN

R82 0_0603_ 5%R82 0_06 03_5%

1 2

+3V_AOA C +3V_ AOAC

R93

R93

R91

R91

0_0402_ 5%

0_0402_ 5%

CLK_PCI_D EBUG_L

E51TXD_ P80DATA2_RE51 TXD_P80DATA
E51RXD_ P80CLK_R

E51RXD_ P80CLK_R

12

1K_0402 _5%

1K_0402 _5%

R326

R326

SI# 7/19 PIN 51 need add 1K fo r BT combo card

9/8 SI build BOT limit 0.8, C82,C86
del: SE053475Z80
add: SE107475K80

1

C82

C82

4.7U_060 3_6.3V6K

4.7U_060 3_6.3V6K

2

WLAN

JMINI1

CONN@JMINI1

CONN@

1

1

3

3

5

5

7

7

9

9
111112
131314
151516

171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
G153G2

BELLW _80003-2021

BELLW _80003-2021

1

C83

C83

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

2
4
6
8

10

2
4
6
8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54

1

2

+1.5VS_W LAN

WL_ OFF#
PLT_RST _BUF#

USB20_N 10_R
USB20_P 10_R

C84

C84

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

LPC_FRA ME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

R85 0_ 0603_5%R85 0_0603_5%

1 2

R88 0_ 0402_5%R88 0_0402_5%

1 2

R89 0_ 0402_5%R89 0_0402_5%

1 2

R90 0_ 0402_5%R90 0_0402_5%

1 2

R101 0_0402_5 %R 101 0_0402 _5%

1 2

(9~16mA)

12

+3V_AOA C

LPC_FRA ME# 13,36
LPC_AD3 13,36
LPC_AD2 13,36
LPC_AD1 13,36
LPC_AD0 13,36

WL_ OFF# 16
PLT_RST _BUF# 16

+3V_AOA C

MINI1_LED#

R92

R92

4.7K_040 2_5%

4.7K_040 2_5%

USB20_N 10 16
USB20_P 10 16

MINI1_LED# 36

Remove SM bus 11/23 by Sharing

SI# 7/25 change USB20_N/P4 to USB_N/P9

Mini Card Power Rating

B B

+3V_AOA C

1

C85

C85

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

+3V_AOA C

12

R370

R370
1K_0402 _5%

1K_0402 _5%

123

DGS

DGS

Q11

Q11
AO3413L _SOT23-3

AO3413L _SOT23-3

AOAC_PW _ON# 36

C69

@C 69

@

1 2

0.047U_0 402_16V7K

0.047U_0 402_16V7K

+3VALW

SI# BOM change R370, C69, Q11 no stuff, Stuff R83
For AOAC +3VALW change to +3VS

Power

+3Valw

+3V

+1.5VS

Primary Power (mA)

Peak Normal

1000

330

500

750

250

375

Auxiliary Power (mA)

Normal

250 (wake enable)

5 (Not wake enable)

A A

Security Class ification

Security Class ification

Security Class ification

2011/11/ 02 2011/11/ 02

2011/11/ 02 2011/11/ 02

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2011/11/ 02 2011/11/ 02

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

MiniCard & WLan

MiniCard & WLan

MiniCard & WLan

LA-8711

LA-8711

LA-8711

0.1

0.1

0.1

31 57Sunday, November 27, 2 011

31 57Sunday, November 27, 2 011

31 57Sunday, November 27, 2 011

1

5

SI# 8/15 R62 change to +3VALW, R61change to 10 ohm, R63 change to 200K ohm

+LCDVDD

12

R61

R61
30_0603_5%

30_0603_5%

D D

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

PCH_ENVDD15

61

Q6A

Q6A

PCH_ENVDD

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

LCD POWER CIRCUIT

+3VALW

12

R62

R62
100K_0402_5%

100K_0402_5%

R63

R63
200K_0402_5%

200K_0402_5%

2

34

5

Q6B

Q6B

12

0.01U_0402_25V7K

0.01U_0402_25V7K
C61

C61

+3VS

1

C55

C55

2

0.1U_0402_16V7K

0.1U_0402_16V7K

2

G

G

1

2

9/8 SI build BOT limit 0.8, C62
del: SE053475Z80
add: SE107475K80

W=60mils

3

S

S

Q7

Q7
AO3413L_SOT23-3

AO3413L_SOT23-3

D

D

1

+LCDVDD

1

C62

C62

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4

W=60mils

1

C63

C63

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C66 220P_0402_50V7KC66 220P_0402_50V7K

12

C67 220P_0402_50V7KC67 220P_0402_50V7K

12

3

+3VS

1

C56

C56

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

INVTPWM

DISPOFF#

+LCDVDD

1

C57

C57

10U_0603_6.3V6M

10U_0603_6.3V6M

2

+3VS

R64 2.2K_0402_5%R64 2.2K_0402_5%

1 2

R65 2.2K_0402_5%R65 2.2K_0402_5%

1 2

10P_0402_50V8J

10P_0402_50V8J

Place closed to JLVDS1

1

C58

C58

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

LCD_CLK

LCD_DATA

1

C64

@C64

@

2

1

C65

@C65

@

10P_0402_50V8J

10P_0402_50V8J

2

2

W=60mils

680P_0402_50V7K

680P_0402_50V7K

INVPWR_B+ B+

1

2

1

C60

C60
68P_0402_50V8J

68P_0402_50V8J

2

C59

C59

L7

L7

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

L8

L8

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

SM010014520 3000ma
220ohm@100mhz
DCR 0.04

LCD/LED PANEL Conn.

W=60mils

W=60mils

Check pin definition.

1

12

12

C C

B B

A A

11/23 remove INVT_PWM

DPST_PWM15

BKOFF#36

PCH_LCD_CLK15

PCH_LCD_DATA15

R197 0_0402_5%R197 0_0402_5%

1 2

5

R76 33_0402_5%R76 33_0402_5%

1 2

12

R74

R74
10K_0402_5%

10K_0402_5%

R193

R193

0_0402_5%

0_0402_5%

R194

R194

0_0402_5%

0_0402_5%

BKOFF# DISPOFF#

INVTPWM

12

@

@

R72

R72
10K_0402_5%

10K_0402_5%

12

12

LCD_CLKPCH_LCD_CLK

LCD_DATA

@

@

R156 0_0402_5 %

R156 0_0402_5 %

1 2

L11

L11

USB20_P816

USB20_N816

8/19 change stuff L26 by EMI request

D_MIC_CLK

D_MIC_DATA

D_MIC_CLK_L_C38
D_MIC_DATA_C38

4

D_MIC_DATA_C

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

1

4

4

WCM-2012-900T_4P

WCM-2012-900T_4P

R229 0_0402_5%

R229 0_0402_5%

1 2

@

@

D55

D55

2

2

1

1

3

3

PESD5V0U2BT

PESD5V0U2BT

@

6/27 Add ESD solution

@

RA1310 0_0402_5% RA13100_0402_5%

D_MIC_CLK_LD_MIC_CLK_L_C

12

LA19 FBMA-L10-160808-301LMT_2PLA19 FBMA-L10-160808-301LMT_2P

LA20 FBMA-L10-160808-301LMT_2PLA20 FBMA-L10-160808-301LMT_2P

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2

2

3

3

1 2
1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

USB20_P8_R

USB20_N8_R

D_MIC_CLK
D_MIC_DATA

Deciphered Date

Deciphered Date

Deciphered Date

INVPWR_B+

PCH_TXOUT0+15

PCH_TXOUT0-15

PCH_TXOUT1+15

PCH_TXOUT1-15

PCH_TXOUT2+15

PCH_TXOUT2-15

PCH_TXCLK+15

PCH_TXCLK-15

+3VS

2

+LCDVDD

JLVDS1

JLVDS1

1

1

2

2

3

3

4

LCD_CLK
LCD_DATA

USB20_N8_R

USB20_P8_R
DISPOFF#
INVTPWM

D_MIC_CLK
D_MIC_DATA

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

LVDS Connector

LVDS Connector

LVDS Connector

LA-8711

LA-8711

LA-8711

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

GND

32

GND

33

GND

34

GND

35

GND

STARC_111H30-000000-G4-R

STARC_111H30-000000-G4-R

CONN@

CONN@

1

32 57Sunday, November 27, 2011

32 57Sunday, November 27, 2011

32 57Sunday, November 27, 2011

0.1

0.1

0.1

5

+3VS_MSATA

1

C44

C44

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

D D

SATA_PRX_DTX_P113
SATA_PRX_DTX_N113

SATA_PTX_DRX_N113
SATA_PTX_DRX_P113

C C

Change to 0.01U cap. PN

R133 0_0402_5%R133 0_0402_5%

SATA_PRX_R1_DTX_P1

1 2

SATA_PRX_R1_DTX_N1

1 2

R161 0_0402_5%R161 0_0402_5%
R163 0_0402_5%R163 0_0402_5%

SATA_PTX_R1_DRX_N1

1 2

SATA_PTX_R1_DRX_P1

1 2

R162 0_0402_5%R162 0_0402_5%

SI# 7/19 port80 TX/RX change to WLAN CONN

SATA_PTX_DRX_P013
SATA_PTX_DRX_N013

SATA_PRX_DTX_N013
SATA_PRX_DTX_P013

HDD_DETECT#17

SATA connector

100mils

+5VS +5VS_HDD1

1 2

R2685 0_0805_5%R2685 0_0805_5%

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0805_10V4Z

10U_0805_10V4Z

C616

C616

1

1

2

2

C617

C617

4

1

C45

C45

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

SATA_PRX_R_DTX_P1
SATA_PRX_R_DTX_N1

SATA_PTX_R_DRX_N1
SATA_PTX_R_DRX_P1

HDD_DETECT#

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C618

C618

1

1

2

2

C621 0.01U_0402_16V7KC 621 0.01U_0402_16V7K

SATA_PRX_C_DTX_P1

1 2

SATA_PRX_C_DTX_N1

1 2

C615 0.01U_0402_16V7KC 615 0.01U_0402_16V7K
C622 0.01U_0402_16V7KC 622 0.01U_0402_16V7K

SATA_PTX_C_DRX_N1

1 2

SATA_PTX_C_DRX_P1

1 2

C620 0.01U_0402_16V7KC 620 0.01U_0402_16V7K

+3VS_MSATA

1 2

0_0402_5%

0_0402_5%

R59

R59

C612 0.01U_0402_16V7KC612 0.01U_0402_16V7K

1 2

C613 0.01U_0402_16V7KC613 0.01U_0402_16V7K

1 2

C614 0.01U_0402_16V7KC614 0.01U_0402_16V7K

1 2

C611 0.01U_0402_16V7KC611 0.01U_0402_16V7K

1 2

1000P_0402_50V7K

1000P_0402_50V7K

C619

C619

3

PV# 9/17 JMINI2/JMINI3 change footprint follow ME connector list

mSATA Conn.

JMINI2

CONN@JMINI2

CONN@

112
334
556
778
9910
111112
131314
151516

171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
G153G2

BELLW_80003-2021

BELLW_80003-2021

+5VS_HDD1

SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0

SATA_PRX_C_DTX_N0
SATA_PRX_C_DTX_P0

ACES_50463-0104A-001

ACES_50463-0104A-001

+3VS

12

R52

R52
0_0805_5%

0_0805_5%

+3VS_MSATA

2
4
6
8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54

JHDD1

CONN@JHDD1

CONN@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND

12

GND

PCH side

+3VS_SATA_RE

2

+3VS_SATA_RE+3VS

R103 0_0603_5%@R103 0_0603_5%@

1 2

+3VS_SATA_RE

R136

R136
10K_0402_5%

10K_0402_5%

1 2

U71

U71

7

SATA_PTX_R1_DRX_P1
SATA_PTX_R1_DRX_N1

SATA_PRX_R1_DTX_P1
SATA_PRX_R1_DTX_N1

B_PRE1

R143 10K_0402_5%@ R143 10K_0402_5%@

R145
10K_0402_5%

10K_0402_5%

1 2

B_PRE1 A_PRE1 A_PRE0 B_PRE0

R146
10K_0402_5%

10K_0402_5%

1 2

A_PRE1

12

@R145

@

@R146

@

EN

1

A_INp

2

A_INn

5

B_OUTp

4

B_OUTn

17

B_PRE1

19

A_PRE1

18

TEST

3

GND

13

GND

21

EPAD

PS8520BTQFN20GTR2_TQFN20_4X4

PS8520BTQFN20GTR2_TQFN20_4X4

R147

@R147

@

10K_0402_5%

10K_0402_5%

1 2

R149

@R149

@

10K_0402_5%

10K_0402_5%

1 2

VDD
VDD

NC

REXT

A_PRE0
B_PRE0

A_OUTp
A_OUTn

B_INp
B_INn

+3VS_SATA_RE

R150
10K_0402_5%

10K_0402_5%

1 2

R151
10K_0402_5%

10K_0402_5%

1 2

6
16

10
20

9
8

15
14

11
12

A_PRE0
B_PRE0

SATA_PTX_R_DRX_P1
SATA_PTX_R_DRX_N1

SATA_PRX_R_DTX_P1
SATA_PRX_R_DTX_N1

@R150

@

@R151

@

Need Vendor check value

Reserve SATA Redriver

1 2

4.99K_0402_1%~D

4.99K_0402_1%~D

R152

@R152

@

10K_0402_5%

10K_0402_5%

1 2

R153

@R153

@

10K_0402_5%

10K_0402_5%

1 2

1

+3VS_SATA_RE

1

C46

@C46

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

R4610

R4610

11/25 add R4610 4.99k -> Parade review

Connector side

2

C4619

@C4619

@

0.01U_0402_25V7K

0.01U_0402_25V7K

1

B B

SATA ODD Conn

JODD1

CONN@ JODD1

CONN@

1

1

SATA_PTX_C_DRX_P2

2

2

SATA_PTX_C_DRX_N2

3

3

4

4

SATA_PRX_C_DTX_N2

5

5

SATA_PRX_C_DTX_P2

6

6

7

7

8

8

9

9

10

10

11

13

11

GND

12

14

12

GND

ACES_85201-1205N

ACES_85201-1205N

A A

5

+5VS_ODD

Close to JODD

C1143 0. 01U_0402_25V7KC1143 0.01U_0402_25V7K

1 2

C1138 0. 01U_0402_25V7KC1138 0.01U_0402_25V7K

1 2

C1137 0. 01U_0402_25V7KC1137 0.01U_0402_25V7K

1 2

C1136 0. 01U_0402_25V7KC1136 0.01U_0402_25V7K

1 2

R790_0402_5% R790_0402_5%

12

R810_0402_5% R810_0402_5%

12

4

SATA_PTX_DRX_P2 13
SATA_PTX_DRX_N2 13

SATA_PRX_DTX_N2 13
SATA_PRX_DTX_P2 13

ODD_DETECT# 17

ODD_DA# 16

Place components closely ODD CONN.

11/24 remove 22uF to sub board

+5Valw+3VS

R893

R893
10K_0402_5%

10K_0402_5%

R895

R895
10K_0402_5%

10K_0402_5%

1 2

61

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6

ODD_EN#17

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2

QC9A

QC9A

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1 2

34

5

2

R894

R894

1 2

47K_0402_5%

47K_0402_5%

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6
QC9B

QC9B

2

C1239

C1239

0.1U_0402_16V7K

0.1U_0402_16V7K

1

2

AO3413_SOT23

AO3413_SOT23

C1240

C1240

0.01U_0402_25V7K

0.01U_0402_25V7K

1

+5Valw

Vgs=-4.5V,Id=3A,Rds<97mohm

S

S

Q164

Q164

G

G

2

D

D

1 3

Title

Title

Title

mSATA Connector

mSATA Connector

mSATA Connector

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-8711

LA-8711

LA-8711

Date: Sheet of

Date: Sheet of

Date: Sheet of

+5VS_ODD

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

33 57Sunday, November 27, 2011

33 57Sunday, November 27, 2011

33 57Sunday, November 27, 2011

0.1

0.1

0.1

5

@

@

R2714 0_1206_5%

123

DGS

DGS

AO3413L_SOT23-3

AO3413L_SOT23-3

1 2

1.5M_0402_5%

1.5M_0402_5%

CLK_PCIE_CD14
CLK_PCIE_CD#14

Strapping

+LAN_VDD_3V3

R2731

R2731

1 2

1 2

R2714 0_1206_5%

PLT_RST#5,16,21,31,36

ISOLATEB

R2733

R2733

1 2

2.49K_0402_1%

2.49K_0402_1%

SHI0000AA00

SHI0000AA00

L32

L32

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1 2

1

C4628

C4628

0.1U_0603_25V7K

0.1U_0603_25V7K

2

ISOLATEB
LANWAKEB

LAN_CLKREQ#_R

PCIE_PRX_C_DTX_P1
PCIE_PRX_C_DTX_N1

PCIE_PTX_C_DRX_P1
PCIE_PTX_C_DRX_N1

R2728 1.5K_0402_5%@ R2728 1.5K_0402_5%@

1 2

T19 PADT19 PAD

+LAN_SROUT1.0V

W=60mils

1

C4643

C4643

2

+3VALW

Q207

Q207

1

C4620

C4620

1U_0402_6.3V6K

1U_0402_6.3V6K

2

+VSB

R2715

R2715
470K_0402_5%

D D

WOL_EN36

+LAN_VDD_3V3

EC_PME#36

PCH_PCIE_WAKE#15

PCIE_PRX_DTX_P114

PCIE_PRX_DTX_N114

PCIE_PTX_C_DRX_P114
PCIE_PTX_C_DRX_N114

C C

3

27P_0402_50V8J

27P_0402_50V8J

1

C4634

C4634

+LAN_VDD_3V3

B B

OSC1OSC

2

GND2GND

4

25MHZ_20PF_FSX3M-25.M20FDO

25MHZ_20PF_FSX3M-25.M20FDO

R2734

R2734
0_0402_5%

R2736

R2736

1 2

0_0603_5%

0_0603_5%

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

Close to Pin46,47

0_0402_5%

R2735

R2735
0_0402_5%

0_0402_5%

C4641

C4641

+LAN_VDD_3V3

3.3V : Enable Switching Regulator
(Default,For Power Efficiency)
0V : Enable LDO Regulator

1 2

13

D

D

2

G

G

S

S

C4630 0.1U_0402_16V7KC4630 0.1U_0402_16V7K

C4631 0.1U_0402_16V7KC4631 0.1U_0402_16V7K

12

R52321M_0402_5% R52321M _0402_5%

Y9

Y9

27P_0402_50V8J

27P_0402_50V8J

1

C4635

C4635

2

ENSWREG

12

12

@

@

+LAN_VDDREG

1

C4642

C4642

2

470K_0402_5%

EN_WOL

R2716

R2716

Q208

Q208
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

R2718 10K_0402_5%@R2718 10K_0402_5%@

1 2

R2720 0_0402_5%R2720 0_0402_5%

1 2

R2721 0_0402_5%@ R2721 0_0402_5%@

1 2

1 2

1 2

XTLI

XTLO

1 2

+3VS

R2730 1K_0402_5%R2730 1K_0402_5%

15K_0402_5%

15K_0402_5%

Switching Regulator Circuit

+LAN_SROUT1.0V

2.2UH +-5% NLC252018T-2R2J-N

2.2UH +-5% NLC252018T-2R2J-N

DELTA_1008HC-472EJFS-A_2P

DELTA_1008HC-472EJFS-A_2P

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

CLK_PCIE_CD
CLK_PCIE_CD#

LAN_MDIP0

LAN_MDIN0

LAN_MDIN1

LAN_MDIP2

LAN_MDIN2

LAN_MDIP3

LAN_MDIN3

XTLI
XTLO

ENSWREG

+LAN_VDDREG

LAN_LED0
LAN_LED1

+LAN_VDD_1V0

4

W=60milsW=60mils

C4621

C4621

U70

U70

Power Manahement/Isolation

Power Manahement/Isolation

38

ISOLATEB

40

LANWAK EB

27

REFCLK_P

28

REFCLK_N

37

PERSTB

36

CLKREQB

30

HSOP

31

HSON

25

HSIP

26

HSIN

44

SDA

42

SCL/LED_ CR

Transceiver Interface

Transceiver Interface

1

MDIP0

2

MDIN0

4

MDIP1

5

MDIN1

6

MDIP2

7

MDIN2

9

MDIP3

10

MDIN3

59

CKXTAL1

60

CKXTAL2

Regulator and Reference

Regulator and Reference

48

REGOUT

45

ENSWRE G_H

46

VDDREG

47

VDDREG

62

RSET

51

LED0

49

LED1

43

LED3

2

C4644

C4644

0.1U_0402_16V7K

0.1U_0402_16V7K

1

+LAN_VDD_3V3

1.5A

These caps close to U1: Pin 11,12, 39,58,63,64

1

1

C4622

C4622

C4623

2

PCI-Express

PCI-Express

EEPROM(TWSI)

EEPROM(TWSI)

C4623

2

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

Note:

1. C38: Close to Pin12(DVDD33) for avoiding voltage drop when inserting card.

2. The rise time of +LAN_VDD_3V3 must >1ms and <100ms for the internal LDO.

Card Reader

Card Reader

SD_D0/MS_ D7/xD_D5

SD_D1/MS_ CLK/xD_D6

SD_D3/MS_ D2/xD_D2

SD_D6/MS_ INS#/xD_RE#

SD_CLK/MS _D3/xD_D4

SD_CMD/MS_ D6/xD_D3
SD_WP/ MS_D1/xD_WP #
SD_CD#/MS _D5/xD_ALE

PN : SA00005B400

Clock

Clock

GND9(Exposed P ad)

LEDs

LEDs

RTL8411-CG_QFN64_9X9

RTL8411-CG_QFN64_9X9

+LAN_VDD_1V0

R2737

R2737

1 2

0_0603_5%

0_0603_5%

Close to Pin29

1

C4624

C4624

2

0.1U_0402_16V7K

0.1U_0402_16V7K

SD_D2/xD_D7

SD_D4/xD_W E#

SD_D5/xD_CE #

SD_D7/xD_RDY

MS_BS/xD_CL E

MS_D4/xD_D0
MS_D0/xD_D1

XD_CD#

GPO Pin

GPO Pin

DVDD33
DVDD33

AVDD33
AVDD33
AVDD33
AVDD33

DVDD10
DVDD10

AVDD10
AVDD10
AVDD10

EVDD10

Card_3V3

VDD33/18
VDD33/18

+LAN_EVDD10

1

C4645

C4645

2

1

C4625

C4625

2

0.1U_0402_16V7K

0.1U_0402_16V7K

SD_D0

19

SD_D1

18

SD_D2

23

SD_D3

22
17
16
15
14

SD_CLK

20

SD_CMD

21

SD_WP_Q

35

SD_CD#_Q

54
34
55
56
57

GPO

50

GPO

12
39

11
58
63
64

41
52

3
8
61

+LAN_EVDD10

29

13

+VDD33/18

33
53

24

GND

32

GND

65

1

C4646

C4646

2

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

1

2

3

1

1

C4626

C4626

0.1U_0402_16V7K

0.1U_0402_16V7K

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

Reserved for LAN PHY Disable Application

GPOSDA

+LAN_VDD_3V3

+LAN_VDD_1V0

LAN_CLKREQ#14

+CR_VDD_3V3

C4636

0.1U_0402_10V7K

C4636

0.1U_0402_10V7K

1

2

+LAN_VDD_1V0

1

C4647

C4647

1

C4648

C4648

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

Place each cap. to Pin 3, 8 , 41 , 52 ,61

SD_CMD_R

@

C4627

10U_0603_6.3V6M@C4627

10U_0603_6.3V6M

SD_CLK_R

SD_D0_R
SD_D1_R
SD_D2_R
SD_D3_R

SD_WP
SD_CD#

C4656

C4656

11/20 add 4.7u @ +CR_VDD_3V3

R2717 0_0402_5%R2717 0_0402_5%

SD_D0

SD_D1

SD_D2

SD_D3

SD_CMD

SD_CLK

VDD33/18 for SD UHS Mode Power

+VDD33/18

Close to Pin33 Close to Pin53

C4649

C4649

0.1U_0402_16V7K

0.1U_0402_16V7K

1 2

R2719 0_0402_5%R2719 0_0402_5%

1 2

R2724 0_0402_5%R2724 0_0402_5%

1 2

R2725 0_0402_5%R2725 0_0402_5%

1 2

R2723 0_0402_5%R2723 0_0402_5%

1 2

R2726 0_0402_5%R2726 0_0402_5%

1 2

1

2

T1617 PAD~D@ T1617 PAD~D@

LAN_CLKREQ#

C4637

0.1U_0402_10V7K

C4637

0.1U_0402_10V7K
C4638

C4638

1

1

@

@

2

2

1

1

C4650

C4650

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

SD_D0_R

SD_D1_R

SD_D2_R

SD_D3_R

SD_CMD_R

SD_CLK_R

C4629
5P_0402_50V8C

5P_0402_50V8C

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

C4651

C4651

0.1U_0402_16V7K

0.1U_0402_16V7K

@C4629

@

0_0402_5%

0_0402_5%

0.1U_0402_10V7K

0.1U_0402_10V7K

1

2

1

2

R2727

R2727

C4639

C4639

0.1U_0402_16V7K

0.1U_0402_16V7K

+CR_VDD_3V3

1

2

Pull H on PCH

12

C4640

C4640

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

@

@

2

2

JREAD1

3
4
5
6
7

8
9
1
2

10
11
12
13

T-SOL_156-1000302601_NR

T-SOL_156-1000302601_NR

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

SD_CD#_Q

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

LAN_CLKREQ#_R

CONN@JREAD1

CONN@

CMD
VSS
VDD
CLK
VSS

DAT0
DAT1
DAT2
CD/DAT3

WP SW
CD SW
GND SW
GND SW

+3VS +CR_VDD_3V3

12

61

Q209A

Q209A

RJ45_TX3-

RJ45_TX3+

RJ45_RX1-

RJ45_TX2-

RJ45_TX2+

RJ45_RX1+

RJ45_TX0-

RJ45_TX0+

GND
GND

R12

R12
100K_0402_5%

100K_0402_5%

12

2

14
15

R14

R14
100K_0402_5%

100K_0402_5%

SD_CD#

EMI-ESD

LAN_ACTIVITY#

LINK_100_1000#LAN_MDIP1

LAN_ACTIVITY#

LINK_100_1000#

SD_WP_Q

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

C4632 470P_0402_50V8JC 4632 470P_0402_50V8J

1 2

C4633 470P_0402_50V8JC 4633 470P_0402_50V8J

1 2

D58

D58

2

2

3

3

PESD5V0U2BT

PESD5V0U2BT

JLAN1

JLAN1

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

SINGA_2RJ1569-000111F@

SINGA_2RJ1569-000111F@

@

@

1

SHLD4

SHLD3

SHLD2

SHLD1

1

Q209B

Q209B

1

12

11

10

9

12

R13

R13
100K_0402_5%

100K_0402_5%

34

12

R15

R15
100K_0402_5%

100K_0402_5%

SD_WP

5

TS1

TS1

1

TD1+

2

TD1-

3

TDCT1

4

TDCT2

5

TD2+

6

TD2-

7

TD3+

8

TD3-

9

TDCT3

10

TDCT4

11

TD4+

TD4-12TX4-

350UH_NA0069RLF

350UH_NA0069RLF

SP050006Y00

SP050006Y00

TX1+

TXCT1

TXCT2

TX2+

TX3+

TXCT3

TXCT4

TX4+

RJ45_TX0+

24

RJ45_TX0-

23

TX1-

22

21

RJ45_RX1+

20

RJ45_RX1-

19

TX2-

RJ45_TX2+

18

RJ45_TX2-

17

TX3-

16

15

RJ45_TX3+

14

RJ45_TX3-

13

R2738 75_0402_5%R2738 75_0402_5%

1 2

R2740 75_0402_5%R2740 75_0402_5%

1 2

R2741 75_0402_5%R2741 75_0402_5%

1 2

R2742 75_0402_5%R2742 75_0402_5%

1 2

3

D59

D59

PESD5V0U2BT

PESD5V0U2BT

1

@

@

1

2

C4653

C4653

SE167100J80

SE167100J80

10P_1808_3KV

10P_1808_3KV

1

1

C4654

C4654

12

0.1U_0402_16V4Z

223

0.1U_0402_16V4Z

2

L33

L33

100UH_SSC0301101MCF_0.18A_20%

100UH_SSC0301101MCF_0.18A_20%

1

C4655

C4655

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

+V_DAC

+V_DAC

+V_DAC

+V_DAC

LAN_MDIP0

LAN_MDIN0

LAN_MDIP1

LAN_MDIN1

LAN_MDIP2

LAN_MDIN2

LAN_MDIP3

LAN_MDIN3

LED9

LED9

+3VS

C4652

C4652

1 2

0.01U_0402_16V7K

0.01U_0402_16V7K
C4673

C4673

+5VS

21

1 2

@

@

0.1U_0402_16V7K

0.1U_0402_16V7K

3

Amber

LED10

LAN_LED0 LAN_ACTIVITY#

R2739510_0402_5% R2739510_0402_5%

12

LED10

1 2

HT-110UD_1204

HT-110UD_1204

White

LAN_LED1 LINK_100_1000#

R2743

R2743

510_0402_5%

A A

510_0402_5%

12

LTW-110DC5-C_W HITE

LTW-110DC5-C_W HITE

Add LAN LED White& Amber on M/B
10/12 by Karl

11/25 change p/n from SP05000 6X00 to SP050006Y00

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LAN&CardReader Realtek RTL8411

LAN&CardReader Realtek RTL8411

LAN&CardReader Realtek RTL8411

34 57Sunday, November 27, 2011

34 57Sunday, November 27, 2011

34 57Sunday, November 27, 2011

1

0.1

0.1

0.1

A

USB3.0

12

C4674

C4674

C88

C88

680P_0603_50V7K

680P_0603_50V7K

1 1

2 2

USB_ON#36

USB3TXD P1_C USB3TXDP1_ C_R

USB3TXD N1_C USB3T XDN1_C _R

USB3RXD P1_C USB3 RXDP1 _C_R

USB3RXD N1_C USB3R XDN1_C _R

USB3_TX 1_N16

USB3_TX 1_P16

USB3_RX 1_N16

USB3_RX 1_P16

USB20_N01 6

USB20_P 016

+5VALW

W=80mils

1

2

12

12

12

12

1000P_0402_50V7K

1000P_0402_50V7K

C940 .1U_0402 _10V7 K C940.1U_ 0402_1 0V7K

C930 .1U_0402 _10V7 K C930.1U_ 0402_1 0V7K

R950_0 402_5 % R 950_0 402_5 %

R960_0 402_5 % R 960_0 402_5 %

C89

C89

USB_ON#

USB20_N0 _C

USB20_P 0_C

USB3.0 need support 2.5A
change USB PWR SW SA00003TV00
low active

U3

U3

1

GND

2

VIN3VOUT

4

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

USB3_TX 1_N

USB3_RX 1_N

USB3_RX 1_P

EN

G547I2 P81U_MSO P8

G547I2 P81U_MSO P8

+USB_AS

11/21 change to OCTEK_USB-09EAEB

JUSB1

JUSB1

9

SSTX+

1

VBUS

8

SSTX-

2

D-

7

GND

3

D+

6

SSRX+

4

GND

5

SSRX-

OCTEK_ USB-09EA EB

OCTEK_ USB-09EA EB

CONN@

CONN@

R227 0_040 2_5%@R2 27 0 _0402 _5%@

1 2

L21

1

1

443

WCM-201 2-900T_ 4P

WCM-201 2-900T_ 4P

USB3_TX 1_P

USB20_N0

USB20_P 0

1 2

R228 0_040 2_5%@R2 28 0 _0402 _5%@
R231 0_040 2_5%@R2 31 0 _0402 _5%@

1 2

L22

1

1

443

WCM-201 2-900T_ 4P

WCM-201 2-900T_ 4P

1 2

R232 0_040 2_5%@R232 0_0402 _5%@

R233 0_040 2_5%@R2 33 0 _0402 _5%@

1 2

L23

L23

1

1

443

WCM-201 2-900T_ 4P

WCM-201 2-900T_ 4P

1 2

R234 0_040 2_5%@R234 0_0402 _5%@

+USB_AS

8

VOUT
VOUT7VIN

6

1

5

FLG

SI# 8/8 change USB_OC0# to US B30_OC#

10

GND

11

GND

12

GND

13

GND

USB30@L21

USB30@

2

USB30@L22

USB30@

2

2

1

+

+

C90

C90

C91

C91

2

2

150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

R94

R94

1 2

0_0402 _5%

0_0402 _5%

@

@

USB3TXD N1_C

2

3

USB3TXD P1_C

USB3RXD N1_C

2

3

USB3RXD P1_C

USB20_N0 _C

2

3

USB20_P 0_C

W=80mils

C92

C92

1000P_0402_50V7K

1000P_0402_50V7K

USB_OC0 #

1

2

USB2.0 charger

USB charger footprint need change to TPS2543

+5VALW +USB_B S

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C2507

C2507

1

2

U2415

U2415

1

3 3

ILIM_SE L36

USB_CHAR GE_EN36

4 4

<PCH>

ILIM_SE L

USB_CHAR GE_EN#

USB_CTL 1

USB_CTL 136

USB_CTL 2

USB_CTL 236

USB_CTL 3

USB_CTL 336

+3VS +3VS

R4722

R4722

@

@

10K_04 02_5%

10K_04 02_5%

1 2

USB_CTL 1

12

R4724

R4724
100K_0 402_5%

100K_0 402_5%

USB20_N916

USB20_P 916

@

@

1 2

USB_CTL 2

12

R4723

R4723
10K_04 02_5%

10K_04 02_5%

R4725

R4725
100K_0 402_5%

100K_0 402_5%

USB20_P 9

R2602 0_ 0402_5 %R26 02 0_040 2_5%

1 2

13

2
3

4
5

6
7
8

TPS254 0RTER_ QFN16_ 3X3

TPS254 0RTER_ QFN16_ 3X3

State

Mode

Control pin

IN

FAULT#

DM_OUT
DP_OUT

ILIM_SEL
EN

CTL1
CTL2
CTL3

DM_IN

12

OUT

T68PAD @ T6 8PAD @

9

NC

USB20_D N9USB20_N9

11

USB20_D P9

10

DP_IN

R2498

@R2 498

@

15

ILIM1

16

ILIM0

R2499 19 .1K_040 2_1%R249 9 19.1K_ 0402_1 %

14

GND

17

GPAD

S0 S3, S4, S5

CDP

CTL2CTL1 CTL3

1

1 X

W=80mils

1

+

+

2

ILIM_
SEL

1

150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M

C667

C667

12

19.1K_0 402_1%

19.1K_0 402_1%

12

10U_0805_10V4Z

10U_0805_10V4Z

C2543

C2543

1

2

0

C4675

C4675

0.1U_0402_16V4Z

0.1U_0402_16V4Z

PESD5V 0U2BT

PESD5V 0U2BT

6/27 Add ESD solution

6/27 Add ESD solution

1000P_0402_50V7K

1000P_0402_50V7K

C669

C669

1

2

DCP

CTL2CTL1 CTL3

0

12

USB_OC0 # 16

D10

D10

USB3RXD N1_C_R

USB3RXD P1_C_R

USB3TXD N1_C_R

USB3TXD P1_C_R

USB3RXD N2_C_R

USB3RXD P2_C_R

USB3TXD N2_C_R

USB3TXD P2_C_R

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C927

C927

2

<CONN>

ILIM_
SEL

1

680P_0603_50V7K

680P_0603_50V7K

223

1

1

1

B

USB20_N0 _C

USB20_P 0_C

3

D11

D11

PESD5V 0U2BT

PESD5V 0U2BT

D9

D9

10

10

1

21 9

21 9

2

7

4

7

4

4

65

65

5

3

3

3

8

8

IP4292 CZ10-TB

IP4292 CZ10-TB

Part Number = SC 300001 Y00

Part Number = SC 300001 Y00

D12

D12

10

10

1

21 9

21 9

2

7

4

7

4

4

65

65

5

3

3

3

8

8

IP4292 CZ10-TB

IP4292 CZ10-TB

Part Number = SC 300001 Y00

Part Number = SC 300001 Y00

USB20_N1 _C
USB20_P 1_C

3

223

1

1

USB3RXD N1_C_R

9

USB3RXD P1_C_R

8

USB3TXD N1_C_R

7

USB3TXD P1_C_R

6

USB3RXD N2_C_R

9

USB3RXD P2_C_R

8

USB3TXD N2_C_R

7

USB3TXD P2_C_R

6

0.01U_0402_16V7K

0.01U_0402_16V7K

C4669

C4669

2

1

USB3RXD N3_C
USB3RXD P3_C

R4615

R4615

1 2

4.99K_0 402_1% ~D

4.99K_0 402_1% ~D

11/25 change R4615 to 4.99k -> Parade review

USB3TXD N2_C

USB3RXD P2_C

USB3RXD N2_C

USB3_TX 2_N16

USB3_TX 2_P16

USB3_RX 2_N16

USB3_RX 2_P16

USB20_N11 6

USB20_P 116

USB30 RX path

U4604

U4604

6

VDD

1

INn

2

INp

4

NC

EQ0 EQ1

19

EQ0

18

DE

10

REXT

3

GND

13

GND

21

GND

PS8711 BTQFN20 GTR-A0 _TQFN20 _3X3

PS8711 BTQFN20 GTR-A0 _TQFN20 _3X3

EQ_INC#

I2C_EN

16

VDD

15

OUTn

14

OUTp

12

NC

17

EQ1

11

20

PD#

5
7

NC

8

NC

9

NC

Place near sub board

USB3_TX 2_N

USB3_TX 2_P

USB3_RX 2_N

USB3_RX 2_P

USB20_N1

+3VALW+3 VALW

USB3RXD N3_C_R
USB3RXD P3_C_R

EQ_INCDE

C

+USB_AS

11/21 change to OCTEK_USB-09EAEB

JUSB4

USB3TXD P2_C_RUSB3TXD P2_C

C950.1U_0402 _10V7 K C950 .1U_040 2_10V7 K

12

USB3TXD N2_C_R

C960.1U_0402 _10V7 K C960 .1U_040 2_10V7 K

12

USB20_N1 _C

USB20_P 1_C
USB3RXD P2_C_R

R970_04 02_5% R970_0402_5%

12

USB3RXD N2_C_R

R1480_0 402_5% R1480_0 402_5%

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C4668

C4668

1

2

JUSB4

9

SSTX+

1

VBUS

8

SSTX-

2

D-

7

GND

3

GND

D+

6

GND

SSRX+

4

GND

GND

5

GND

SSRX-

OCTEK_ USB-09EA EB

OCTEK_ USB-09EA EB

CONN@

CONN@

R141 0_040 2_5%@R141 0_0402 _5%@

L24

1

1

443

WCM-201 2-900T_ 4P

WCM-201 2-900T_ 4P

R142 0_0 402_5%@R142 0_0 402_5%@

R223 0_0402_ 5%

R223 0_0402_ 5%

L25

1

1

443

WCM-201 2-900T_ 4P

WCM-201 2-900T_ 4P

R224 0_0402_ 5%@R224 0_0402_5%@

R236 0_040 2_5%@R2 36 0 _0402 _5%@

L26

L26

1

1

443

WCM-201 2-900T_ 4P

WCM-201 2-900T_ 4P

R235 0_040 2_5%@R235 0_0402 _5%@

+3VS +3VS +3VS

EQ0 EQ1 EQ _INC DE

1 2

USB30@L2 4

USB30@

1 2

@

@

1 2

USB30@L2 5

USB30@

1 2

1 2

1 2

R4617

R4617

4.99K_0 402_1% ~D

4.99K_0 402_1% ~D

1 2

USB3TXD N2_C

2

2

3

USB3TXD P2_C

USB3RXD N2_C

2

2

3

USB3RXD P2_C

USB20_N1 _C

2

2

3

USB20_P 1_CUSB20_ P1

C46660.1U_ 0402_ 16V7K C46660.1 U_0402_ 16V7K

12

C46670.1U_ 0402_ 16V7K C46670.1 U_0402_ 16V7K

12

1 2

10
11
12
13

USB3_RX 3_N 16
USB3_RX 3_P 16

R4618

R4618

4.99K_0 402_1% ~D

4.99K_0 402_1% ~D

R4638

R4638

4.99K_0 402_1% ~D

4.99K_0 402_1% ~D

1 2

R4640

R4640

4.99K_0 402_1% ~D

4.99K_0 402_1% ~D

@

@

1 2

D

SUBWOO FER-39

SUBWOO FER+39

HDDHALT_ LED#13

SATA_L ED#13
PWR_L ED#36,37

USB3_TX 3_N16
USB3_TX 3_P16

11/21 follow AMD change to 30 pin

USB20_P 216
USB20_N21 6

SUBWOO FER­SUBWOO FER+

HDDHALT_ LED#

SATA_L ED#

PWR_L ED#

USB20_P 2

USB20_N2
USB20_D P9
USB20_D N9

USB3RXD N3_C

USB3RXD P3_C

2
4
6
8

10109
121211
141413

16
18
20
22
24
26

26

28

28

30

30

32

GND131GND2

34

GND333GND4

PANAS_A XK8L30 124B

PANAS_A XK8L30 124B

DC0111 11151

DC0111 11151

+USB_BS

JIO1CONN@

JIO1CONN@

112
334
556
778

9
11
13

151516
171718
191920
212122
232324

25

25

27

27

29

29

+5VALW
+5VS
+3VS

E

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

Compal Secret Data

Compal Secret Data

Compal Secret Data

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

USB Con & Daughter Con

USB Con & Daughter Con

USB Con & Daughter Con

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

D

D

D

Date: Sheet of

Date: Sheet of

Date: Sheet of

LA-8041P

E

35 5 7Sunday, November 27, 20 11

35 5 7Sunday, November 27, 20 11

35 5 7Sunday, November 27, 20 11

0.1

0.1

0.1

5

+3VALW_EC

R154

R154
100K_0402_5%

100K_0402_5%

1 2

PROJECT_ID

D D

+3VALW_EC

C C

B B

12

R155

50UMA@R155

50UMA@

261K_0402_1%

261K_0402_1%

R106 47K_0402 _5%R106 47K_0402_5%

C107 0.1U_0402_16V4ZC107 0.1U_0402_16V4Z

+3VALW_EC

10/1 ENE Recomm and

R104 47K_0402_5%R104 47K_0402_5%

1 2

R105 47K_0402_5%R105 47K_0402_5%

1 2

R111 2.2K_0402_5%R 111 2.2K_0402_5%

1 2

R113 2.2K_0402_5%R 113 2.2K_0402_5%

1 2

+3VALW

R110 1K_0402_5%R110 1K_0402_5%

1 2

R1101

SUSACK#

CLK_PCI_LPC

+3VS

NMI_DBG# GPIO0

R1101

1 2

33_0402_5%

33_0402_5%

R1100

R1100

1 2

33_0402_5%

33_0402_5%

6/27 add 33 ohm and 22p by EMI request

R120 10K_0402_5%R120 10K_0402_5%

1 2

+3VALW_EC

12

R714

R714

10K_0402_5%

10K_0402_5%

Project: ID
NCL50 UMA: 261K
NCL50 DIS: 330K

R155

R155
330K_0402_1%

330K_0402_1%

12

12

C222

C222

1 2

22P_0402_50V8J

22P_0402_50V8J

C221

C221

1 2

22P_0402_50V8J

22P_0402_50V8J

D14

D14

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

For PCI SERR

21

50DIS@

50DIS@

EC_RST#

KSO1

KSO2

EC_SMB_DA1

EC_SMB_CK1

EC_SMI#

11/25 SLP_ME_CSW_DEV# 換換 Pin21

EC_SCI#

SLP_A# 換換 Pin17

GPIO0 17

11/23 remove INVT_PWM
change to BATT_TEMP

11/25 remove 32.768k crystal

+3VALW

EC_SMB_CK142,47,48
EC_SMB_DA142,47,48

EC_SMB_CK214,22

EC_SMB_DA214,22

EC_SMI#17

PCH_PWR_EN43

USB_CTL135
USB_CTL235

Reserve USB_CTL 11.03

SUSCLK_R15

220P_0402_50V7K

220P_0402_50V7K

0_0805_5%

0_0805_5%

1 2

EC_KBRST#17

LPC_FRAME#13,31

CLK_PCI_LPC16

KSI[0..7]37

KSO[0..17]37

SLP_A#15

FAN_SPEED137

E51TXD_P80DATA31
E51RXD_P80CLK31

C71

C71

4

R98

R98

C100

0.1U_0402_16V4Z

C100

0.1U_0402_16V4Z

1

1

2

2

GATEA2017

SERIRQ13

LPC_AD313,31
LPC_AD213,31
LPC_AD113,31
LPC_AD013,31

PLT_RST#5 ,16,21,31,34

EC_SCI#17

EC_SMB_CK1
EC_SMB_DA1

R121 0_0402_5%R121 0_0402_5%

1 2

R122 0_0402_5%R122 0_0402_5%

1 2

PM_SLP_S3#15
PM_SLP_S5#15

EAPD38

1

2

1 2

R124

R124

1 2

12

R66

R66
100K_0402_5%

100K_0402_5%

AC_LED#46
SUSWARN#15
BATT_TEMP47

C101

0.1U_0402_16V4Z

C101

0.1U_0402_16V4Z

C102

0.1U_0402_16V4Z

C102

0.1U_0402_16V4Z

1

1

2

2

GATEA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_LPC
PLT_RST#
EC_RST#
EC_SCI#
NMI_DBG#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

PM_SLP_S3#
PM_SLP_S5#
EC_SMI#

R199 43_0402_1%R199 43_0402_1%

1 2

R196 0_ 0402_5%R196 0_0402_5%

AC_LED#
SUSWARN#
BATT_TEMP
FAN_SPEED1

E51TXD_P80DATA
E51RXD_P80CLK
EAPD
USB_CTL1
USB_CTL2

0_0402_5%

0_0402_5%

+3VALW_EC

C104

1000P_0402_50V7K

C104

1000P_0402_50V7K

C103

0.1U_0402_16V4Z

C103

0.1U_0402_16V4Z

1000P_0402_50V7K

1000P_0402_50V7K

2

2

1

1

U5

U5

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LPC_FRAME#/LFRAME#

5

LPC_AD3/LAD3

7

LPC_AD2/LAD2

8

LPC_AD1/LAD1

10

LPC_AD0/LAD0

12

CLK_PCI_EC/PCICLK

13

PCIRST#/GPIO05

37

EC_RST#/ECRST#

20

EC_SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/SCL0/GPIO44

78

EC_SMB_DA1/SDA0/GPIO45

79

EC_SMB_CK2/SCL1/GPIO46

80

EC_SMB_DA2/SDA1/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

SUS_PWR_DN_AC K/GPIO0D

25

INVT_PWM/PWM 2/GPIO11

28

FAN_SPEED1/FANFB0/GPIO14

29

FANFB1/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLK1

123

XCLK0

KB930QF-A1_LQFP128_14X14

KB930QF-A1_LQFP128_14X14

+3VALW_EC

C105

C105

Int. K/B

Int. K/B
Matrix

Matrix

3

L9

L9
FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

1 2

R99

R99

1 2

0_0402_5%

0_0402_5%

9

22

33

96

111

125

VCC

VCC

VCC

VCC

VCC

VCC

PWM Output

PWM Output

LPC & MISC

LPC & MISC

DA Output

DA Output

PS2 Interface

PS2 Interface

SPI Device I/F

SPI Device I/F

SPI Flash ROM

SPI Flash ROM

GPIO

GPIO

SM Bus

SM Bus

GPIO

GPIO

GPO

GPO

GPI

GPI

GND

GND

GND

GND

GND

11

24

35

94

113

+EC_VCCA

1

C106

C106

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

ECAGND

Follow EC reque st, DB phase
use 0 ohm resi stor.

10.31

67

AVCC

PWM0/GPIO0F

BEEP#/PWM1/GPIO10

FANPWM0/GPIO12

ACOFF/FANPWM1/GPIO13

BATT_TEMP/AD0/GPI38

BATT_OVP/AD1/GPI39

ADP_I/AD2/GPI3A

AD Input

AD Input

EC_MUTE#/PSCLK1/GPIO4A

USB_EN#/PSDAT1/GPIO4B

CAP_INT#/PSCLK2/GPIO4C

TP_DATA/PSDAT3/GPIO4F

WOL_EN/SDICLK/GPXIOA01

ME_EN/SDIMOSI/GPXIOA02

AD3/GPI3B

AD4/GPI42
AD5/GPI43

DAC_BRIG/DA0/GPO3C

EN_DFAN1/DA1/GPO3D

IREF/DA2/GPO3E

DA3/GPO3F

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

SDICS#/GPXIOA00

LID_SW#/GPXIOD00

SPIDI/MISO

SPIDO/MOSI

SPICLK/GPIO58

SPICS#

GPIO40

H_PECI/GPIO41

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

PWR_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXIOA03

EC_LID_OUT#/GPXIOA04

EC_ON/GPXIOA05

EC_SWI#/GPXIOA06

ICH_PWROK/GPXIOA07

BKOFF#/GPXIOA08

RF_OFF#/GPXIOA09

GPXIOA10
GPXIOA11

PM_SLP_S4#/GPXIOD01

ENBKL/GPXIOD02

EAPD/GPXIOD03

EC_THERM#/GPXIOD04

SUSP#/GPXIOD05

PBTN_OUT#/GPXIOD06

EC_PME#/GPXIOD07

AGND

69

20mil

ECAGND

FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

V18R

L10

L10

2

+3VALW_EC

R125

R125
100K_0402_5%

100K_0402_5%

1 2

BOARD_ID

R137

R137
0_0402_5%

0_0402_5%

1 2

R1950_0 402_5% R1950_0402_5%

21
23

R191 0_0402_5%R191 0_0402_5%

26
27

63
64
65
66
75
76

68
70
71
72

83
84
85
86
87
88

97
98
99
109

119
120
126
128

73
74
89
90
91
92
93
95
121
127

100
101
102
103
104
105
106
107
108

110
112
114
115
116
117
118

124

12

USB_CTL3

C108 100P_0402_50V8JC108 100P_0402_50V8J

12

BOARD_ID
ADP_I
PROJECT_ID
PM_SLP_SUS#
ADP_ID

0_0402_5%

0_0402_5%

R200

R200

EN_DFAN1

ILIM_SEL

Reserve ILIM_SEL 11.03

TP_ON_OFF_LED#
USB_ON#
WLAN_OFF_LED

PCH_PWROK
TP_CLK
TP_DATA

AOAC_PW_ON#
WOL_EN
HDA_SDO
EC_PME#

EC_SI_SPI_SO
EC_SO_SPI_SI
EC_SPICLK_L
EC_SPICS#/FSEL#

Delete PX_MODE bcuz PX5.0 is ready.

10.20

R218 0_0402_5%R218 0_0402_5%

R134 0_0402_5%R134 0_0402_5%

EC_PECI

R119 43_0402_1%R119 43_0402_1%

AOAC_PME#

R217 0_0402_5%R217 0_0402_5%

CAP_LOCK#

PWR_LED#

SYSON
VR_ON
PM_SLP_S4#

12

H_PROCHOT#_ECPCH_PWR_EN

SUSACK#
BKOFF#
CPU1.5V_S3_GATE
USB_CHARGE_EN
SA_PGOOD

EC_ACIN
EC_ON
ON/OFF#
LID_SW#
SUSP#
PBTN_OUT#

+V18REC_XCLK0

1

C113

C113

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

MINI1_LED#

12

EC_PCIE_WAKE#

PCH_VREG_EN#

12

R114 0_0402_5%R114 0_0402_5%

1 2

R115 33_0402_5%R115 33_0402_5%

1 2

R116 33_0402_5%R116 33_0402_5%

1 2

R117 33_0402_5%R117 33_0402_5%

1 2

12

1 2

12

12

PCH_RSMRST#

R2120_0402_5% R2120_0402_5%

PCH_DPWROK

12

KBL_OFF#

ECAGND

ADP_I 47,48

PM_SLP_SUS# 15

ADP_ID 46

TP_ON_OFF_LED# 37
USB_ON# 35

WLAN_OFF_LED# 37
PCH_PWROK 15

TP_CLK 37
TP_DATA 37

AOAC_PW_ON# 31
WOL_EN 34
HDA_SDO 13

EC_PME# 34

H_PECI

AOAC_PME# 16
BAT_CHG_LED 46
CAP_LOCK# 37

PWR_LED# 35,37

WLAN_ON_LED# 37
SYSON 43,51
VR_ON 55

PM_SLP_S4# 15

SUSACK# 15
BKOFF# 32

CPU1.5V_S3_GATE 9

USB_CHARGE_EN 35

SA_PGOOD 52

EC_ON 37,49

SUSP# 9,43,50,51,52,53

PCH_DPWROK 15

ON/OFF# 37

SLP_ME_CSW_DE V# 17

MINI1_LED# 31

KBL_OFF# 37

USB_CTL3 35

EC_PCIE_WAKE# 31

T4PAD T4PA D

EN_DFAN1 37

ILIM_SEL 35

EC_SI_SPI_SO_R
EC_SO_SPI_SI_R
EC_SPICLK_L_R
EC_SPICS#/FSEL#_R

ENBKL

PCH_RSMRST# 15
EC_LID_OUT# 17

LID_SW# 37

PBTN_OUT# 15

BKOFF#

R112

R112

100K_0402_5%

100K_0402_5%

EC_ACIN

H_PROCHOT#_EC47

Pin76 PU follow EC request
(Common code to DM3, DM6)

11.03
11/23 change to ADP_ID

+3VALW_EC

R144 0_0402_5%R144 0_0402_5%

1

C110

C110

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

ENBKL 15

H_PECI 5,17

2 1

D5

D5

VR_HOT#55

Reserve EC_PCIE _WAKE#

11.03

1 2

VR_HOT#

H_PROCHOT#_EC

20mils

SPIPIN3

EC_SPICS#/FSEL#_R

EC_SPICLK_L_R

SA00002C100 (S IC FL 1MB MX25L1005AMC-12G SOP
8P 3.3V)

6/27 add 33 ohm and 22p by EMI request

EC_SPICLK_L_R

EC_SPICLK_L_R

R129 33_0402_5%@ R129 33_0402_5%@

EC_PME#

1 2

1

R109 10K_0402_5%

R109 10K_0402_5%

1 2

@

@

12

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

C109 100P_0402_50V8JC109 100P_0402_50V8J

R118

R118

0_0402_5%

0_0402_5%

5

SPI ROM

U6

U6

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

MX25L2006EM1I-12G SOP 8P

MX25L2006EM1I-12G SOP 8P

C114 22P_0402_50V8JC114 22P_0402_50V8J

C119 22P_0402_50V8J@C119 22P_0402_50V8J@

+3VALW_EC

12

R715

R715

10K_0402_5%

10K_0402_5%

+3VALW_EC

12

12

34

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6
Q10B

Q10B

256KB

4

VSS

2

Q

1 2

1 2

+3VS

ACIN 1 5,22,48

H_PROCHOT# 5,47

EC_SI_SPI_SO_REC_SO_SPI_SI_R

11/25 remove JFW1 , check with EC already

A A

5

R126 10 0K_0402_5%R126 100K_0402_5%

R127 10 K_0402_5%R127 10K_0402_5%

R128 10 K_0402_5%R128 10K_0402_5%

R130 10 K_0402_5%R130 10K_0402_5%

1 2

1 2

1 2

1 2

PLT_RST#

PCH_DPWROK

PCH_PWROK

VR_ON

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/29 2011/06/29

2011/06/29 2011/06/29

2011/06/29 2011/06/29

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

EC ENE-KB930 & 9012

EC ENE-KB930 & 9012

EC ENE-KB930 & 9012

LA-8041P

1

0.1

0.1

36 57Sunday, November 27, 2011

36 57Sunday, November 27, 2011

36 57Sunday, November 27, 2011

0.1

Amber

+VCC_FAN1

+3VS

12

R173

R173
10K_0402_5%

10K_0402_5%

1

C171

C171
1000P_0402_50V7K

1000P_0402_50V7K

2

+5VS_KBL

+5VS

C167 10U_0603_6.3V6MC167 10U_0603_6.3V6M

1 2

U11

U11

1
2

1

C168

C168

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

40mil

+VCC_FAN1

3
4

12

EN

GND

VIN

GND

VOUT

GND

VSET

GND

APL5607KI-TRG_SO8

APL5607KI-TRG_SO8

C169

C169

10U_0603_6.3V6M

10U_0603_6.3V6M

1 2

C170

C170

1000P_0402_50V7K

1000P_0402_50V7K

1 2

JFAN1

1
2
3

4
5

ACES_50273-0030N- 001

ACES_50273-0030N- 001

8
7
6
5

CONN@JFAN1

CONN@

1
2
3

GND
GND

Keyboard backlight Conn

+5VS

3

S

S

G

G

D

D

1

AO3413L_SOT23-3

AO3413L_SOT23-3

SI# 7/25 Add Q49B for K/B back light level shifterSI# 7/25 Change WLAN LED design

Q9

Q9

2

0.047U_0402_16V7K

0.047U_0402_16V7K

1

C68

C68

2

R369

R369

1K_0402_5%

1K_0402_5%

+5VALW

12

Q49B

Q49B

2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

KSO17
KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0

KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0

6/27 add 33 ohm and 22p by EMI request

12

R80

R80
100K_0402_5%

100K_0402_5%

3

5

4

KBL_OFF# 36

C247 100P_0402_50V8JC247 10 0P_0402_50V8J

1 2

C251 100P_0402_50V8JC251 10 0P_0402_50V8J

1 2

C226 100P_0402_50V8JC226 10 0P_0402_50V8J

1 2

C227 100P_0402_50V8JC227 10 0P_0402_50V8J

1 2

C229 100P_0402_50V8JC229 10 0P_0402_50V8J

1 2

C228 100P_0402_50V8JC228 10 0P_0402_50V8J

1 2

C231 100P_0402_50V8JC231 10 0P_0402_50V8J

1 2

C230 100P_0402_50V8JC230 10 0P_0402_50V8J

1 2

C233 100P_0402_50V8JC233 10 0P_0402_50V8J

1 2

C232 100P_0402_50V8JC232 10 0P_0402_50V8J

1 2

C235 100P_0402_50V8JC235 10 0P_0402_50V8J

1 2

C234 100P_0402_50V8JC234 10 0P_0402_50V8J

1 2

C237 100P_0402_50V8JC237 10 0P_0402_50V8J

1 2

C236 100P_0402_50V8JC236 10 0P_0402_50V8J

1 2

C240 100P_0402_50V8JC240 10 0P_0402_50V8J

1 2

C238 100P_0402_50V8JC238 10 0P_0402_50V8J

1 2

C241 100P_0402_50V8JC241 10 0P_0402_50V8J

1 2

C239 100P_0402_50V8JC239 10 0P_0402_50V8J

1 2

C243 100P_0402_50V8JC243 10 0P_0402_50V8J

1 2

C242 100P_0402_50V8JC242 10 0P_0402_50V8J

1 2

C245 100P_0402_50V8JC245 10 0P_0402_50V8J

1 2

C244 100P_0402_50V8JC244 10 0P_0402_50V8J

1 2

C248 100P_0402_50V8JC248 10 0P_0402_50V8J

1 2

C246 100P_0402_50V8JC246 10 0P_0402_50V8J

1 2

C249 100P_0402_50V8JC249 10 0P_0402_50V8J

1 2

C250 100P_0402_50V8JC250 10 0P_0402_50V8J

1 2

TP_ON_OFF_ LED#36

TP/B TO M/B

TP_ON_OFF_ LED#

TP_CLK

TP_DATA

TP_CLK36
TP_DATA36

+3VS

12

R1
2K_0402_5%R12K_0402_5%

21

LTST-C191KF KT-5A 0603 ORANGE

LTST-C191KF KT-5A 0603 ORANGE
LED7

LED7

Amber

If=20mA

SIDE LIGHT

9/27 change K/B symbol

R102 4.7K_0402_5%R102 4.7K_0402_5%

1 2

R107 4.7K_0402_5%R107 4.7K_0402_5%

1 2

6/27 Add ESD solution

TP_CLK
TP_DATA

1

C116

C116

2

100P_0402_50V8J

100P_0402_50V8J

PCH_SMBCLK11,12,14,40

PCH_SMBDAT A11,12,14,40

1

2

C117

C117

100P_0402_50V8J

100P_0402_50V8J

CAP_LOCK#36

KSI[0..7]36

KSO[0..17]36

+3V_TP

D7

D7

PESD5V0U2BT

PESD5V0U2BT

@

@

SI# 7/29 remove the TP colay circuit R214, R215

R190 0 _0402_5%R190 0_0402_5%
R210 0 _0402_5%R210 0_0402_5%

223

KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0

KSO17
KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10

KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0

1

1

3

+3V_TP

PCH_SMBCLK_R
PCH_SMBDAT A_R

12
12

11/18 for layout spacing: remove CD5/CD6/CD9

ACES_51503-03241-00 1

WLAN_AMBE R
WL_WH IT

KSO17
KSO16
KSO15
KSO10
KSO11
KSO14
KSO13
KSO12
KSO3
KSO6
KSO8
KSO7
KSO4
KSO2
KSI0
KSO1
KSO5
KSI3
KSI2
KSO0
KSI5
KSI4
KSO9
KSI6
KSI7
KSI1

12

0_0603_5%

0_0603_5%

JTP1

CONN@JTP1

CONN@

1

1

2

2

3

3

4

4

5

5

G1

6

6

G2

ACES_51524-0060N- 001

ACES_51524-0060N- 001

ACES_51503-03241-00 1

7
8

+5VS

R372 360_0402_5%R372 360_0402 _5%

1 2
+3VS

MUTE_LED38

+3VALW +3V_TP

R1104

R1104

9/23 change conn to SP010012G00

PCH_SMBCLK_R
PCH_SMBDAT A_R

32

32

31

31

29

29

28

28

27

27

26

26

25

25

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

JKB1

JKB1

1

C220

C220

2

0.1U_0402_16V7K

0.1U_0402_16V7K

CONN@

CONN@

34

GND

33

GND

PV# 9/13 change power rail form +3VALW->+3VALW_EC

+3VALW_EC+3VLP

@

@

R170

R170

10K_0402_5%

10K_0402_5%

1 2

C269

C269

0.1U_0402_16V7K

0.1U_0402_16V7K

12

White

R371

R371
360_0402_5%

360_0402_5%

WL_WH ITWLAN_A MBER

3

5

4

ON/OFFBTN #

EC_ON36,49

10K_0402_5%

10K_0402_5%

WLAN_ON _LED# 36WLAN_OF F_LED#36

EC_ON

R132

R132

2

1

+5VALW+3VALW

12

R367

R367
360_0402_5%

360_0402_5%

61

Q48B

Q48B

Q48A

Q48A

2

2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

1

D6

D6
CHN202UPT _SC70-3

CHN202UPT _SC70-3

2

1 2

1 2

2

3

61

R131

R131
100K_0402_5%

100K_0402_5%

51ON#

Q42A

Q42A

2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

ON/OFF# 36

51ON# 46

EN_DFAN136

FAN_SPEED136

JP14

ACES_50504-0040N- 001

ACES_50504-0040N- 001

FAN1 Conn

R172 300_0 402_5%R 172 300_0402_5%

CONN@JP14

CONN@

1

1

2

2

3

3

4

4

5

G1

6

G2

+3VALW

R158

R158
47K_0402_5%

47K_0402_5%

+3VALW +5VALW

1 2

LID_SW#36

LID_SW#

PWR_LED #35,36

+5VALW
+3VALW

PWR_LED #
ON/OFFBTN #

JPWR1

CONN@JPWR 1

CONN@

1

1

2

2

3

3

4

4

5

7

5

G1

6

8

6

G2

ACES_51524-0060N- 001

ACES_51524-0060N- 001

H1

H1

H_2P8

H_2P8

HOLEA

HOLEA

@

@

1

H8

H8

H_2P8

H_2P8

HOLEA

HOLEA

@

@

1

H3

H3

H2

H2

H_2P8

H_2P8

H_2P8

H_2P8

HOLEA

HOLEA

HOLEA

HOLEA

@

@

@

@

1

1

H9

H9

H10

H10

H_2P8

H_2P8

H_2P8

H_2P8

HOLEA

HOLEA

HOLEA

HOLEA

@

@

@

@

1

1

H5

H5

H6

H6

H7

H4

H4

H_2P8

H_2P8

H_2P8

H_2P8

HOLEA

HOLEA

HOLEA

HOLEA

@

@

@

@

1

1

H11

H11

H_2P8

H_2P8

HOLEA

HOLEA

@

@

1

H7

H_2P8

H_2P8

H_2P8

H_2P8

HOLEA

HOLEA

HOLEA

HOLEA

@

@

@

@

1

1

H12

H12

H15

H15

H_4P6

H_4P6

H_4P6

H_4P6

HOLEA

HOLEA

HOLEA

HOLEA

@

@

@

@

1

1

H16

H16

H_4P2

H_4P2

HOLEA

HOLEA

@

@

1

H13

H13

H14

H14

H_4P6

H_4P6

H_4P6

H_4P6

HOLEA

HOLEA

HOLEA

HOLEA

@

@

@

@

1

1

H18

H18

H17

H17

H_4P2

H_4P2

H_4P2

H_4P2

HOLEA

HOLEA

HOLEA

HOLEA

@

@

@

@

1

1

H19

H19

H_2P1X2P6

H_2P1X2P6

H_2P1

H_2P1

@

@

1

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWIN G IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWIN G IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWIN G IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

H20

H20

@

@

1

Issued Date

Issued Date

Issued Date

H22

H22

H21

H21

H_3P3

H_3P3

H_3P3

H_3P3

H_3P3

H_3P3

H_3P3

H_3P3

@

@

@

@

1

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

1

FD4

FD4

@

@

1

FIDUCIAL_C40M80

FIDUCIAL_C40M80

Compal Secret Data

Compal Secret Data

Compal Secret Data

FIDUCIAL_C40M80

FIDUCIAL_C40M80

Deciphered Date

Deciphered Date

Deciphered Date

FD3

FD3

@

@

1

FD1

FD1

@

@

1

FIDUCIAL_C40M80

FIDUCIAL_C40M80

FD2

FD2

@

@

1

FIDUCIAL_C40M80

FIDUCIAL_C40M80

PCB

ZZZ3

ZZZ3

LA-8711

LA-8711

DA80000SG00

DA80000SG00

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

KB/TP/LED/FAN/Screw/Gsensor

KB/TP/LED/FAN/Screw/Gsensor

KB/TP/LED/FAN/Screw/Gsensor

LA-8041P

37 57Sunday, Novem ber 27, 2011

37 57Sunday, Novem ber 27, 2011

37 57Sunday, Novem ber 27, 2011

0.1

0.1

0.1

5

DVDD_IO should match
with HDA Bus level(optional for 3.3V signaling or 1.5V signaling)

Place AVDD ,PVDD,and DVDD capacitor close to Codec

D D

HDA_BITCLK_AUDIO

C C

+3VS_DVDD

12

RA14

RA14

4.7K_0402_5 %

4.7K_0402_5 %

B B

HDA_RST_AUDIO#

1

CA17

CA17

0.01U_0402 _16V7K

0.01U_0402 _16V7K

2

CA93 0.1U _0402_25V6@CA93 0.1U _0402_25V6@

CA92 0.1U _0402_25V6@CA92 0.1U _0402_25V6@

+3VS

BLM18BD601 SN1D_0603

BLM18BD601 SN1D_0603

1 2

1

CA3

CA3

2

1U_0402_6.3V6K

EAPD3 6

EAPD_A39

12

RA17

RA17
10K_0402_5 %

10K_0402_5 %

EAPD#

1

CA18

CA18

0.1U_0402_ 25V6

0.1U_0402_ 25V6

2

1U_0402_6.3V6K

HDA_BITCLK_AUDIO13

HDA_SDOUT_AUD IO13

HDA_SYNC_AUDIO13

HDA_RST_AUDIO#13

D_MIC_CLK_L_ C32

D_MIC_DATA_C32

12

RA140

@RA140

@

10_0402_1 %

10_0402_1 %

1

CA101

@CA10 1

@

10P_0402_5 0V8J

10P_0402_5 0V8J

2

+3VS_DVDD

1 2

1 2

RA53 0_ 0805_5%RA53 0_080 5_5%

1 2

RA3

RA3

1

CA4

CA4

2

HDA_SDIN01 3

CH751H-40 PT_SOD323-2

CH751H-40 PT_SOD323-2

0.1U_0402_25V6

0.1U_0402_25V6

+3VS

+3VS_DVDD

EAPD

RA57 0_0402_5%RA57 0_0402_5 %

1 2

2

CA20 .1U_0402_25V6 CA20.1U_0402_2 5V6

1

HDA_BITCLK_AUDIO

HDA_SDOUT_AUD IO

HDA_SYNC_AUDIO

HDA_SDIN0 S DIN_CODEC

HDA_RST_AUDIO#

21

DH6

DH6

2 1

D_MIC_CLK_L_ C
D_MIC_DATA_C

Place C208 close to Codec

HDA_SPKR13

SB Beep

DVDD_IO

1

2

12

RA1133_0402 _5% R A113 3_0402_5%

EAPD#

CH751H-40 PT_SOD323-2

CH751H-40 PT_SOD323-2

DH7

DH7

MUTE_LED_ L

CA12

CA12

2.2U_0603_ 16V6K

2.2U_0603_ 16V6K

HDA_SPKR

4

Notes:

Keep PVDD sup ply and speaker traces routed on the DGND p lane.
Keep away from AGND and other analog signals

CA5

CA5
10U_0603_ 6.3V

10U_0603_ 6.3V

UA5

UA5

1

DVDD_CORE

3

DVDD_IO

9

DVDD

6

HDA_BITCLK

5

HDA_SDO

10

HDA_SYNC

8

HDA_SDI

11

HDA_RST#

47

EAPD

2

DMIC_CLK/GPIO1

4

DMIC0/GPIO2

48

SPDIFOUT0/GPIO3

46

DMIC1/GPIO0/SPDIFOUT1

36

CAP+

2

1

35

CAP-

7

DVSS

42

PVSS

49

PAD

92HD91B2X5N LGXYAX8_QFN48_7X7

92HD91B2X5N LGXYAX8_QFN48_7X7

+AVDD_CODEC

12

RA55

RA55
10K_0402_5 %

10K_0402_5 %

1 2

0.1U_0402_ 25V6

0.1U_0402_ 25V6

13

D

D

2

G

G

S

S

CA97

CA97

UA1

UA1
2N7002H_S OT23-3

2N7002H_S OT23-3

RA56

RA56

1 2

100K_0402_ 5%

100K_0402_ 5%

10K_0402_5 %

10K_0402_5 %

VREFOUT_C/GPIO4

RA54

RA54

HP0_PORTA_L

HP0_PORTA_R

VREFOUT_A

HP1_PORTB_L

HP1_PORTB_R

PORTC_R

PORTE_R

SPK_PORTD_+L

SPK_PORTD_-L

SPK_PORTD_+R

SPK_PORTD_-R

MONO_OUT

VREFFILT

VREG(+2.5V)

12

1

2

AVDD1
AVDD2

PVDD1
PVDD2

SENSE_A
SENSE_B

PORTC_L

PORTE_L

PORTF_L
PORTF_R

PCBEEP

CAP2

V-

AVSS1
AVSS2
AVSS3

1 2

0.1U_0402_ 25V6

0.1U_0402_ 25V6

CA38

CA38

0.1U_0402_25V6

0.1U_0402_25V6

3

RA1

RA1

FBMA-L11-20120 9-221LMA30T_0805

FBMA-L11-20120 9-221LMA30T_0805

1

1

CA6

CA6

CA7

CA7

2

27
38

45
39

13
14

28
29
23

31
32

19
20
24

15
16

17
18

40
41

44
43

25

12

21
22
34
37

26
30
33

2

0.1U_0402_25V6

0.1U_0402_25V6

C223 1U_0402 _6.3V4ZC223 1U_0402 _6.3V4Z

MIC_EXTR
VREFOUT_EXT_MIC

HP_OUT_L
HP_OUT_R

SPKL+
SPKL-

SPKR+
SPKR-

MONO_IN

CA13

CA13

1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

2

1

CA14

CA14

2.2U_0603_16V6K

2.2U_0603_16V6K

Place C209,C210,CA87,CA89 close to Codec

CA98

CA98

MONO_IN

2

PLACE CLOSE TO U1 P IN 13 If Sense_A total length is greater than

RA9 2.49K_0402_1%RA9 2.49K_040 2_1%

+VDDA_CODEC+AVDD_CODEC

12

RA58 0_0402_5%RA58 0_0402_5 %

PVDD

1 2

1

1

CA8

CA8

2

2

0.1U_0402_25V6

0.1U_0402_25V6

1

2

CA15

CA15

2

1

2.2U_0603_16V6K

2.2U_0603_16V6K

0.1U_0402_25V6

0.1U_0402_25V6

+5VS

1

CA9

CA9

CA10

CA10

2

1U_0402_6.3V6K

1U_0402_6.3V6K

SENSE_A

10U_0603_6.3V6M

10U_0603_6.3V6M

SENSE_B

EXT_MICMIC_EXTL

1

2

CA16

CA16

10U_0603_6.3V6M

10U_0603_6.3V6M

EXT_MIC 41

VREFOUT_EXT_MIC

HP_OUT_L 40
HP_OUT_R 40

SPKL+ 41
SPKL- 41

SPKR+ 41
SPKR- 41

SUB_OUT 39

SENSE_A

SENSE_B

PLACE CLOSE TO U1 P IN 14

HP Jack

Ext MIC

Internal SPKR
(front stereo speaker)

1 2

RA7 20K_0402_1%RA7 20K_0402_1%

1 2

CA1 1000P_04 02_50V7KCA1 1000P_ 0402_50V7K

1 2

RA10 10K_0402 _1%RA10 10K_0402 _1%

1 2

CA11 1 000P_0402_50V7KCA11 100 0P_0402_50V7K

1 2

MUTE_LED_ L

6 inches, chagne C12 to 0.1uF

+AVDD_CODEC

HP_JD

+AVDD_CODEC

If Sense_B is un-used, then pull high
Sense_B to AVDD by 10Kohm resistor

5

10K_0402_5 %

10K_0402_5 %
RA18

RA18

1 2

9/27 LDO TPS793475DBVR for audio power

680P_0603_ 50V7K

680P_0603_ 50V7K

C4679

C4679

+5VS

W=40Mil

1 2

RA16

RA16

10K_0402_5 %

10K_0402_5 %

1

12

CA100

CA100

0.1U_0402_ 25V6

0.1U_0402_ 25V6

2

UA2

UA2

VOUT

1

VIN

BYPASS

3

EN

GND

TPS793475 DBVR_SOT23-5

TPS793475 DBVR_SOT23-5

5

4

2

1

HP_JD 41

11/21 RA10 change to 10K(un-used)

1

2

+VDDA_CODEC

CA20

CA20

0.1U_0402_25V6

0.1U_0402_25V6

MUTE_LED 37

2

CA19

CA19
10U_0805_ 10V6K

10U_0805_ 10V6K

1

12

R368

R368
270_0402_ 1%

270_0402_ 1%

3

QA1B

QA1B

2N7002KDW _SOT363-6

2N7002KDW _SOT363-6

4

C4678

C4678

12

680P_0603_50V7K

680P_0603_50V7K

A A

GNDAGND

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Audio IDT 92HD91

Audio IDT 92HD91

Audio IDT 92HD91

1

38 57Sunday, November 27, 2011

38 57Sunday, November 27, 2011

38 57Sunday, November 27, 2011

0.1

0.1

0.1

5

4

3

2

1

D D

RA15

RA15

SUB_OUT38

1 2

4.7K_0402_1%

4.7K_0402_1%

11/23 add LPF for HP request

C C

SUB_OUT_LPF

1

CA21

CA21
1000P_0402_50V7K

1000P_0402_50V7K

2

+5Valw

CA29

CA29

0.033U_0603_16V7

0.033U_0603_16V7

CA27

CA27

0.033U_0603_16V7

0.033U_0603_16V7

EAPD_A38

RA12

RA12

BLM18BD601SN1D_0603

BLM18BD601SN1D_0603

1 2

1 2

1 2

+5V_SUBAMP

12

RA139 47K_0402_ 5%RA139 47K_0402_5%

12

RA138 47K_0402_ 5%RA138 47K_0402_5%

1

2

CA79

CA79

CA87

CA87

2

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1U_0402_6.3V4Z

1U_0402_6.3V4Z

11/23 add 1u/0.1uF for HP request

UA3

UA3

A1

IN+

C1

IN-

B2

PVDD

B1

VDD

C2

EN

TPA2011D1YFFR_DSBGA9

TPA2011D1YFFR_DSBGA9

OUT+

OUT-

PGND

GND

LA1 FBM-11-160808- 601-T_0603LA1 FBM-11-160808 -601-T_0603

C3

A3

B3

A2

1 2

LA2 FBM-11-160808- 601-T_0603LA2 FBM-11-160808 -601-T_0603

1 2

12

CA30

CA30

680P_0603_50V7K

680P_0603_50V7K

12

CA31

CA31

680P_0603_50V7K

680P_0603_50V7K

SUBWOOFER+ 35

SUBWOOFER- 35

2011.10.28 Change Sub-woofer Amp to TPA2011D1

B B

A A

Security Classification

Security Classification

Security Classification

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2011/11/02 2011/11/02

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Audio Woofer Amplifier

Audio Woofer Amplifier

Audio Woofer Amplifier

1

0.1

0.1

0.1

39 57Sunday, November 27, 2011

39 57Sunday, November 27, 2011

39 57Sunday, November 27, 2011

5

4

3

2

1

D D

C C

Headphone Amp

HP_OUT_R38

HP_OUT_L38

11/23 add LPF for HP request

PCH_SMBDATA11,12,14,37
PCH_SMBCLK11,12,14,37

PCH_SMBDATA
PCH_SMBCLK

RA19

RA19

1 2

4.7K_0402_1%

4.7K_0402_1%

RA20

RA20

1 2

4.7K_0402_1%

4.7K_0402_1%

HP_OUT_R_LPF

HP_OUT_L_LPF

1

CA22

CA22

2

1000P_0402_50V7K

1000P_0402_50V7K

1

CA23

CA23

2

1000P_0402_50V7K

1000P_0402_50V7K

CA67 1U_0402_6.3V4ZCA67 1U_0402_6.3V4Z

12

CA68 1U_0402_6.3V4ZCA68 1U_0402_6.3V4Z

12

CA69

CA69

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+HP_5V

+5VS+HP_5V

LA22

LA22

RA47

RA47

UA4

CA78

CA78

UA4

5

INR-

4

INR+

1

INL-

2

INL+

6

SD#

7

SDA

8

SCL

20

VDD_20

18

CPP

TI HPA00929

TI HPA00929

1 2

CA82 1U_0402_6.3V4ZCA82 1U_0402_6.3V4Z

VDD_12

HPRIGHT

HPLEFT

GND_3

GND_9
GND_10
GND_13
GND_19
GND_21

CPVSS_15
CPVSS_16

12

11
14

3
9
10
13
19
21

15
16

17

CPN

CA83

CA83

1

1

2

2

CA85

CA85

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

10K_0402_1%

RA61 0_0402_5%RA61 0_0402_5%

1 2

RA62 0_0402_5%RA62 0_0402_5%

1 2

1

1

CA77

CA77
1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

2

10K_0402_1%

2

1

CA84

CA84

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1U_0402_6.3V4Z

1U_0402_6.3V4Z

1 2

FBM-11-160808-601-T_0603

FBM-11-160808-601-T_0603

11/21 change RA40/RA44 from 16-> 30ohm(FAE)

RA40 30_0402_1%RA40 30_0402_1%

1 2

RA44 30_0402_1%RA44 30_0402_1%

1 2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

CA81

CA81

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

HP_R 41
HP_L 41

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL
AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

4

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

3

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

Compal Electronics, Inc.

Audio SPK/HP Amplifier

Audio SPK/HP Amplifier

Audio SPK/HP Amplifier

0.1

0.1

40 57Sunday, November 27, 2011

40 57Sunday, November 27, 2011

40 57Sunday, November 27, 2011

1

0.1

A

B

C

D

E

Front Class D internal Speaker Connector

SPKR+38
SPKR-38

1 1

SPKL+38
SPKL-38

SPKR+
SPKR­SPKL+
SPKL-

2200P_0402_50V7K

2200P_0402_50V7K

2200P_0402_50V7K

2200P_0402_50V7K

2200P_0402_50V7K

2200P_0402_50V7K

1

CA44

CA44

2

12

3.3_0402_5%

3.3_0402_5%

3.3_0402_5%

3.3_0402_5%

RA37

RA37

2200P_0402_50V7K

2200P_0402_50V7K

1

1

2

12

1

CA46

CA46

CA45

CA45

3.3_0402_5%

3.3_0402_5%

RA41

RA41

CA47

CA47

2

2

12

12

3.3_0402_5%

3.3_0402_5%

PJDLC05_SOT23-3

PJDLC05_SOT23-3

RA42

RA42

RA43

RA43

DA1

@DA1

@

3

1

2

3

2

DA2

PJDLC05_SOT23-3

PJDLC05_SOT23-3

1

11/25 change SPKR connector follw AMD

@DA2

@

JSPKR1

JSPKR1

1

1

2

2

3

GND1

4

GND2

ACES_50281-0020N-001

ACES_50281-0020N-001

CONN@

CONN@

JSPKL1

JSPKL1

1

1

2

2

3

GND1

4

GND2

ACES_50281-0020N-001

ACES_50281-0020N-001

CONN@

CONN@

HP_JD_Q

+3VALW

1 2

R4726

R4726
10K_0402_5%

10K_0402_5%

2

G

G

HP_JD

13

D

D

Q1

Q1
2N7002E-T1-E3_SOT23-3

2N7002E-T1-E3_SOT23-3

SB570020110

SB570020110

S

S

HP_JD 38

11/23 spacing concern: remove DA4/DA5, keep D60 only

1

D60

D60
PJDLC05C_SOT23-3

R11

R11

3

AGND

PJDLC05C_SOT23-3

EXT_MIC Width = 15mils
HP_L Width = 15mils

2

HP_R Width = 15mils

JA1

JA1

6
1
2

3
4

5

SUYIN_010188HR006G269ZL

SUYIN_010188HR006G269ZL

CONN@

CONN@

Audio Combo Jack

G

G

7
8

G

G

AGND

2 2

Need place rear Audio Codec (UA5)

EXT_MIC#

RA36

CA86

CA86
1U_0402_6.3V4Z

1U_0402_6.3V4Z

RA36

4.7K_0402_5%

4.7K_0402_5%
LA8

LA8

12

BK1608HS601-T_2P

BK1608HS601-T_2P

CA60

CA60

220P_0402_50V7K

220P_0402_50V7K

Need place near JAUD1

EXT_MIC#

1

2

VREFOUT_EXT_MIC

EXT_MIC38

3 3

1

2

11/21 add CA86 (FAE)

HPL

HPR
HP_JD_Q HP_JD_1

1 2

0_0402_5%

0_0402_5%

BLM15AG121SN1D_L0402_2P

BLM15AG121SN1D_L0402_2P

HP_R40

HP_L40

4 4

For Combo Jack

A

1 2

LA7

LA7

1 2

LA6 BLM15AG121SN1D_L0402_2PLA6 BLM15AG121SN1D_L0402_2P

1

CA61

CA61

220P_0402_50V7K

220P_0402_50V7K

220P_0402_50V7K

220P_0402_50V7K

2

Need place near JAUD1

CA62

CA62

1

2

B

HPL

3

1

HPR

2

D61

D61
AZ5125-02S.R7G_SOT23-3

AZ5125-02S.R7G_SOT23-3

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2011/11/022011/11/02

2011/11/022011/11/02

2011/11/022011/11/02

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Audio SPK Conn/Jack/MIC

Audio SPK Conn/Jack/MIC

Audio SPK Conn/Jack/MIC

LA-8711

LA-8711

LA-8711

E

41 57Sunday, November 27, 2011

41 57Sunday, November 27, 2011

41 57Sunday, November 27, 2011

0.1

0.1

0.1

5

4

3

2

1

ACCELEROMETER

D D

EC_SMB_CK136,47,48
EC_SMB_DA136,47,48

+3Valw

C C

C929

C929

D62

D62

+3VS

USB20_N3_R

12

USB20_P3_R

12

1

2

223

1

JFP1

CONN@JFP1

CONN@

1

1

2

2

3

3

4

4

5

3

1

7

5

G1

6

8

6

G2

ACES_51524-0060N-001

ACES_51524-0060N-001

Finger printer

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0_0402_5%

0_0402_5%

R1334

B B

USB20_N316
USB20_P316

R1334
R1335

R1335

0_0402_5%

0_0402_5%

SCA00001L00

SCA00001L00

PESD5V0U2BT

PESD5V0U2BT

+3Valw

EC_SMB_CK1
EC_SMB_DA1

12

12

R167

R167
0_0402_5%

0_0402_5%

R168

R168
0_0402_5%

0_0402_5%

@

@

12

Must be placed in the center of the system.

R166 10K_0402_5%R166 10K_0402_5%

U25

U25

1

Vdd_IO

4

SCL/SPC

6

SDA/SDI/SDO

7

SDO/SA0

8

CS

2

NC

3

NC

HP3DC2

HP3DC2

INT2
INT1
VDD

GND
GND
RES
RES
RES
RES

C218

C218

1

2

+3Valw

1

C219

C219
10U_0603_6.3V6M

10U_0603_6.3V6M

2

9
11
14

5
12
10
13
15
16

ACCEL_INT# 16

0.1U_0402_16V7K

0.1U_0402_16V7K

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

TCG/BIOS ROM/PS2/LED/SW

TCG/BIOS ROM/PS2/LED/SW

TCG/BIOS ROM/PS2/LED/SW

LA-8711

LA-8711

LA-8711

42 57Sunday, November 27, 2011

42 57Sunday, November 27, 2011

42 57Sunday, November 27, 2011

1

0.1

0.1

0.1

A

B

C

C267

@C267

@

SYSON

1 2

100P_0402_50V8J

100P_0402_50V8J

D

SI# 8/16 Reserv e C267 100pF by ESD request

+5VALW

E

+5VALW

+5VALW TO +5VS

7/12 SI Change to PAK type

1 1

20mil

+VSB

2 2

+5VALW

SI7326DN-T1-E3_PAK1212-8

SI7326DN-T1-E3_PAK1212-8

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C175

C175

C174

C174

1

1

2

2

12

R180

R180
20K_0402_5%

20K_0402_5%

SUSP

5

Q14B

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

Q14B

U12

U12

10mil

34

4

5VS_GATE

1
2
35

+5VS

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

1

C179

C179

0.1U_0603_25V7K

0.1U_0603_25V7K

2

C173

1U_0603_25V6

C173

1U_0603_25V6

C172

C172

1

2

R176

R176

470_0603_5%

470_0603_5%

1 2

61

SUSP

2

Q14A

Q14A
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

+3VALW TO +3VALW(PCH AUX Power)

C176

C176

10U_0603_6.3V6M

10U_0603_6.3V6M

20mil

R181 2 00K_0402_5%R 181 200K_0402_5%

+VSB

PCH_PWR_EN#

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

Short J1 for PCH VCCSUS3.3

+3VALW

U15

U15

SI4800BDY-T1-GE3_SO8

SI4800BDY-T1-GE3_SO8

8
7

5

1

2

12

Q43B

Q43B

4

10mil

3V_GATE

34

5

1
2
36

+3V_PCH

1

2

1

C180

C180

0.1U_0603_25V7K

0.1U_0603_25V7K

2

6/24 U16 and U17 to Q16 change to Dule mos package

40mil

10U_0603_6.3V6M

10U_0603_6.3V6M

SYSON36,51

C178

1U_0603_25V6

C178

1U_0603_25V6

C177

C177

1

2

R179

R179

470_0603_5%

470_0603_5%

1 2

61

PCH_PWR_EN#

2

Q43A

Q43A

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

SYSON

R177

R177

100K_0402_5%

100K_0402_5%

+0.75VS

12

R182

R182
22_0603_5%

22_0603_5%

61

2

Q15A

Q15A
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

12

SYSON#

2

G

G

R174

R174
100K_0402_5%

100K_0402_5%

1 2

13

D

D

U13

U13
2N7002H_SOT23-3

2N7002H_SOT23-3

S

S

+1.8VS

R183

R183
470_0603_5%

470_0603_5%

1 2
34

5

Q15B

Q15B

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

SUSP

SUSP#9,36,50,51,52,53

10K_0402_5%

10K_0402_5%

+1.05VS

R184

R184
470_0603_5%

470_0603_5%

1 2
61

2

Q17A

Q17A
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

SUSP

R178

R178

12

R175

R175
100K_0402_5%

100K_0402_5%

1 2

13

D

D

U14

U14

2

2N7002H_SOT23-3

2N7002H_SOT23-3

G

G

S

S

+1.5V

R185

@R185

@

470_0603_5%

470_0603_5%

1 2
61

@

@

SYSON#SUSP SUSP

2

Q18A

Q18A
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

+3VALW TO +3VS

+3VALW

SI7326DN-T1-E3_PAK1212-8

SI7326DN-T1-E3_PAK1212-8

U18

U18

C182

10U_0603_6.3V6M

C182

10U_0603_6.3V6M

C181

10U_0603_6.3V6M

C181

10U_0603_6.3V6M

1

1

Q20B

Q20B

4

10mil

3VS_GATE

12

34

5

2

20mil

+VSB

2

47K_0402_5%

47K_0402_5%

SUSP

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

R188

R188

3 3

6/24 Q20 and Q21 to Q20 change to Dule mos package

1
2
35

+3VS

1

2

1

C191

C191

0.1U_0603_25V7K

0.1U_0603_25V7K

2

1

2

R186

R186
470_0603_5%

470_0603_5%

1 2

61

SUSP

2

Q20A

Q20A
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

20mil

C185

10U_0603_6.3V6M

C185

10U_0603_6.3V6M

1

2

+3VALW

C184

11/24 keep 10u + 0.1u *1 only

1U_0603_25V6

C184

1U_0603_25V6

C183

10U_0603_6.3V6M

C183

10U_0603_6.3V6M

1.5VPCIEV

0.1U_0402_16V7K

0.1U_0402_16V7K
C189

C189

1

2

20mil 10mil

R77

R77
20K_0402_5%

20K_0402_5%

SUSP#

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

+1.5V TO +1.5VS

3 1

QV17

AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3

2

1.5VS_GATE

12

34

5

Q19B

Q19B

PX@QV17

PX@

1

2

1

2

C53

C53

0.1U_0603_25V7K

0.1U_0603_25V7K

+1.5VS

C190

10U_0603_6.3V6M

C190

10U_0603_6.3V6M

C187

1U_0603_25V6

C187

1U_0603_25V6

1

2

R187

R187
470_0603_5%

470_0603_5%

1 2

61

SUSP

2

Q19A

Q19A
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

+5VALW

R189

R189

100K_0402_5%

100K_0402_5%

R192

R192

5

1 2

34

Q17B

Q17B

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

PCH_PWR_EN#19

PCH_PWR_EN36

PCH_PWR_EN#

12

100K_0402_5%

100K_0402_5%

4 4

A

B

6/24 Q19 and Q22 to Q19 change to Dule mos package

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/29 2011/06/29

2011/06/29 2011/06/29

2011/06/29 2011/06/29

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DC Interface

DC Interface

DC Interface

LA-8041P

E

43 57Sunday, November 27, 2011

43 57Sunday, November 27, 2011

43 57Sunday, November 27, 2011

0.1

0.1

0.1

A

B

C

D

E

QC11 (LA-8551P Ver:0.1)

Voltage Rails

S1

Power Plane Description

VIN

BATT+

B+

+CPU_CORE

1 1

+VGFX_CORE Core voltage for UM A graphic

+0.75VS

+1.05VS_VCCP

+VCCP

+1.5V

+1.5VS

+1.8VS

+3VALW

+3VALW_EC

+LAN_IO

+3V_PCH

+3VS

+5VALW

+5V_PCH

+5VS

2 2

+VSB

+RTCVCC

Note : ON* means that t his power plane is ON only with AC power av ailable, otherwise it is OFF.

SMBUS Control Table

EC_SMB_CK1
EC_SMB_DA1

EC_SMB_CK2
EC_SMB_DA2

PCH_SMBCLK
PCH_SMBDATA PCH

3 3

PCH_SMLCLK
PCH_SMLDATA

Adapter power supply (19V)

Battery power supply (12.6V)

AC or battery power rail f or power circuit.

Core voltage for CPU

+0.75VP to +0.75VS switched power rail for DDR terminator

+V1.05SP to +1.05VS_VCCP switched power r ail for CPU

+VCCP (1.05V ) power for PCH

+1.5VP to +1.5V power rail for DDRIII (1.35V OR 1.5V)

+1.5VS switched power rail

(+5VALW ) to 1.8V switched power rail to PCH

+3VALW always on power rail

+3VALW always to KBC

+3VALW to +LAN_IO power rail for LAN

+3VALW to +3V_PCH power rail for PCH (Short Jumper)

+3VALW to +3VS power rail

+5VALWP to +5VALW power rail

+5VALW to +5V_PCH power rail for PCH (Short resister)

+5VALW to +5VS switched power rail OFFONOFF

B+ to +VSB always on power rail f or sequence control

RTC power

mSATA

WLAN

SOURCE

KB930

KB930

PCH

BATT SODIMM

MIINI1

MINI2

V

@

TP

V

DESTINATIONDIFFERENTIAL

S3 S5

N/A N/A N/A

N/A N/A N/A

ON

ON

ON

ON

ON

ON ON

ON

ON

ON

ON ON ON*

ON ON

ON ON

ON

ON

ON ON

ON

ON

N/AN/AN/A

OFF

OFF

OFF OFF

OFF OFF

OFF OFF

OFF OFF

OFF

OFF OFF

OFF

OFF

ON ON*

ON*

ON*

OFF

OFF

ON ON*

ON*

ON ON*

ONON

EC_SMB_CK2

PCH_SMBDATA

PCH_SMBCLK

PCH_SMBDATA

V

V

V

FLEX CLOCKS DESTINATION

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

EC SM Bus1 address

Device

Smart Battery

G-sensor

PCH SM Bus address

Device Address

DDR DIMM0

DDR DIMM1

Mini Card1

Mini Card2

TP module

G-Sensor

V

CLKOUT_PCIE0 None CLKOUTFLEX0 None

CLKOUT_PCIE1

CLKOUT_PCIE2

CLK

CLKOUT_PCIE3

CLKOUT_PCIE4

4 4

CLKOUT_PCIE5

10/100/1G LAN

None

CARD READER

USB3.0 FL1009-2Q0

NoneCLKOUT_PCIE6

CLKOUTFLEX1

CLKOUTFLEX2

CLKOUTFLEX3WLAN

Symbol Note :

: means Digital Ground

: means Analog Ground

None

None

None

CLKOUT_PCIE7 None

CLKOUT_PEG_B

A

None

B

GPU

V

V

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

ON

HIGH HIGH HIGH HIGH

LOW

LOW

LOW LOW LOW LOW

Address

0001 011X b

0101001b

1010 0000b

AMP

LOW

HIGHHIGHHIGH

HIGH

HIGH

LOWLOWLOW

HIGH

EC SM Bus2 address

Device

PCH (Reserve)

CLKOUT

PCI0

PCI1

PCI2

PCI3

PCI4

ONONON ON

ON

ON

ON

ON

OFF

ON

OFF

Address

1010 0110b

DESTINATION

PCH_LPBACK

PCI_LPC

None

None

None

V

SATA

SATA0

SATA1

SATA2

SATA3

SATA4

SATA5

UMA VX

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL
AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C

2011/11/02 2011/11/02

2011/11/02 2011/11/02

2011/11/02 2011/11/02

DESTINATION

m-SATA,JMINI2

m-SATA,JMINI1

CONN@@Option

X

Compal Secret Data

Compal Secret Data

Compal Secret Data

None

None

None

None

USB3.0@

Deciphered Date

Deciphered Date

Deciphered Date

ON

LOW

OFF

OFF

OFF

OFF

OFF

OFF

USB Port Table

USB 2.0 USB 1.1 Port

0
1
2
3
4
5
6
7
8

9
10
11
12
13

EHCI1

EHCI2

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

USB 3.0 Port

0

1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

1 External
USB Port

USB/B (Right Side)

m-SATA

Camera
Mini Card(WLAN)

1 External
USB Port

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Notes List

Notes List

Notes List

LA-8711

LA-8711

LA-8711

E

44 57Sunday, November 27, 2011

44 57Sunday, November 27, 2011

44 57Sunday, November 27, 2011

0.1

0.1

0.1

5

4

3

2

1

BATTERY

12.6V

AC ADAPTOR

D D

19V 90W

C C

BATT+

VIN

PU21
CHARGER
BQ24725RGRR

PU27
ISL6277HRTZ-T

PU26
RT8207MZQW

PU17

B+

RT8209MGQW

PU10
TPS51218DSCR

PU5
RT8209MGQW

PU2
RT8205EGQW

+3VS

+INVPWR_B+

LCD panel

15.6"

B+ 300mA

+3.3 350mA

+CPU_CORE

+CPU_CORE_NB

+1.5V

+0.75VS

+VGA_CORE

+1.1VALW

+3VALW

+5VALW

+VDDCI

U38
SI4800

+5VS

PU15
APL5508

U40
SI4800

+3VS

PU14
G9731G11U

U41
AO4430L

PU7
SY8033BDBC

JUMP

U39
AO4430L

+1.0VSG

+1.5VSG

+1.8VSG

+3VSG

+0.75VS

+CPU_CORE

+CPU_CORE_NB

+1.5V

+0.75VS

+VGA_CORE

+VDDCI

+1.8VSG

+3VSG

RAM DDRIII SODIMMX2

+1.5V

+0.75VS

0.85~1.1V

0.9~1.0V

+1.0VSG

+1.5VSG

+1.8VSG

+3VSG

VDD_MEM 4A

VTT_MEM 0.5A

VGA ATI
Whistler/Seymour/Granville

VDDC 47A

VDDCI 4.6A

DPLL_VDDC: 125 mA
SPV10: 120 mA
PCIE_VDDC: 2000 mA
DP[A:E]_VDD10: 680 mA

VDDR1: 3400 mA

PLL_PVDD: 75 mA
TSVDD: 20 mA
AVDD: 70 mA
VDD1DI: 100 mA
VDD2DI: 50 mA
A2VDDQ: 1.5 mA
VDD_CT: 110 mA
VDDR4: 170 mA
PCIE_PVDD: 40 mA
MPV18: 150 mA
SPV18: 75 mA
PCIE_VDDR: 400 mA
DP[A:F]_VDD18: 920 mA
DP[A:F]_PVDD: 120 mA

A2VDD: 130 mA
VDDR3: 60 mA

VRAM 512/1GB/2GB
64M / 128Mx16 * 4 / 8

+1.5VSG 2.4 A

B B

FAN Control
APL5607

+5VS 500mA

U54

+USB_VCCA

TPA2301DRG4

USB X3

+5V
Dual+1

2.5A

SATA
HDD*1
ODD*1

+5V 3A

+3.3V

A A

5

+5VS

Audio Codec
ALC271X

+5V 45mA

+3.3VS 25mA

Q63

+5VALW

+3VS

+3VALW

EC
ENE KB930

+3.3VALW 30mA
+3.3VS 3mA

4

LAN
BCM57785

+3.3VALW 201mA

SI2301

+1.5VS

Mini Card*2

+1.5VS 500mA
+3.3VS 1A
+3.3VALW 330mA

3

+3VS

+3VALW

RTC
Bettary

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL
AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2011/07/08 2015/07/08

2011/07/08 2015/07/08

2011/07/08 2015/07/08

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

VDDIO_33_PCIGP: 131 mA
VDDPL_33_SYS: 47 mA
VDDPL_33_DAC: 20 mA
VDDPL_33_ML: 20 mA
VDDAN_33_DAC: 200 mA

+3VS

VDDPL_33_PCIE: 43 mA
VDDPL_33_SATA: 93 mA
VDDIO_AZ_S: 26 mA

VDDPL_33_SSUSB_S: 20 mA
VDDPL_33_USB_S: 17 mA
VDDAN_33_USB_S: 658 mA

+3VALW

VDDIO_33_S: 59 mA
VDDXL_33_S: 5 mA
VDDAN_33_HWM_S: 12 mA

VDDIO_33_GBE_S
VDDCR_11_GBE_S

GND

VDDIO_GBE_S

VDDBT_RTC_GRTC BAT

Title

Title

Title

POWER DELIVERY CHART

POWER DELIVERY CHART

POWER DELIVERY CHART

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-8711

LA-8711

LA-8711

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

0.1

0.1

45 57Sunday, November 27, 2011

45 57Sunday, November 27, 2011

45 57Sunday, November 27, 2011

0.1

5

4

3

2

1

D D

8

778

6

ADP_SIGNAL

L30ESD24VC3-2 3P C/A SOT23 ESD

L30ESD24VC3-2 3P C/A SOT23 ESD

C C

B B

BATT+

51ON#37

556

4

334

1

2

1

2

PJP1

@PJP1

@

ACES_59012-0080N-002

ACES_59012-0080N-002

2

3

PD1

PD1

1

PD4

PD4
LL4148_LL34-2

LL4148_LL34-2

12

PR10

PR10
22K_0402_1%

22K_0402_1%

1 2

ACIN_LEDCharge_LED

2

3

1

PD2

PD2
L30ESD24VC3-2 3P C/A SOT23 ESD

L30ESD24VC3-2 3P C/A SOT23 ESD

PQ2

PQ2
TP0610K-T1-GE3 1P SOT23-3

TP0610K-T1-GE3 1P SOT23-3

12

12

PR9

PR9

PC17

PC17

100K_0402_5%

100K_0402_5%

0.22U_0603_25V7K

0.22U_0603_25V7K

ADP_SIGNAL

2

PC7

PC7

13

ADPIN

12

100P_0402_50V8J

100P_0402_50V8J

PR26

PR26
10K_0402_5%

10K_0402_5%

1 2

VIN

12

PC8

PC8

1000P_0402_50V7K

1000P_0402_50V7K

@

@

PD3

PD3
LL4148_LL34-2

LL4148_LL34-2

1 2

12

@

@

PR7

PR7
68_1206_5%

68_1206_5%

12

@

@

PC18

PC18

0.1U_0603_25V7K

0.1U_0603_25V7K

PL1

PL1

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

1 2

PL2

PL2

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

12

12

PD7

PD7

PR25

PR25

10K_0402_5%

10K_0402_5%

RLZ3.6B_LL34

RLZ3.6B_LL34

12

PR8

@PR8

@

68_1206_5%

68_1206_5%

12

VS

VIN

12

PC9

PC9

100P_0402_50V8J

100P_0402_50V8J

12

12

PC10

PC10

@

@

PR1

PR1
1K_0402_5%

1K_0402_5%

1000P_0402_50V7K

1000P_0402_50V7K

ADP_ID 36

PC11

PC11

@100P_0402_50V8J

@100P_0402_50V8J

+3VALW

AC_LED#36

TP0610K-T1-GE3 1P SOT23-3

TP0610K-T1-GE3 1P SOT23-3

PR6

PR6
2K_0402_5%

2K_0402_5%

ACIN_LED

1 2

Charge_LED

2

37.1

37.1

PQ1

PQ1

PU1

PU1

74LVC1G02GW_SOT353-5

74LVC1G02GW_SOT353-5

PU2

PU2

74LVC1G86GW_SOT353-5

74LVC1G86GW_SOT353-5

+3VLP

1 3

5

4

O

3

5

4

Y

3

12

PR2

PR2

10K_0402_5%

10K_0402_5%

1

P

B

2

A

G

2

P

A

1

B

G

+3VALW

12

12

12

PR3

PR3

PR4

PR4

PR5

10K_0402_5%

10K_0402_5%

PR5

10K_0402_5%

10K_0402_5%

@

@

@

@

AC_LED#

AC_LED#

BAT_CHG_LED

10K_0402_5%

10K_0402_5%

BAT_CHG_LED 36

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/03 2014/12/31

2011/10/03 2014/12/31

2011/10/03 2014/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PWR- DCIN / Vin Detector

PWR- DCIN / Vin Detector

PWR- DCIN / Vin Detector

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA8711P

LA8711P

LA8711P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

46 57Sunday, November 27, 2011

46 57Sunday, November 27, 2011

46 57Sunday, November 27, 2011

0.1

0.1

0.1

5

4

3

2

1

D D

PJPB1

@PJPB1

@

BATT BTJ-08FP0B 8P

BATT BTJ-08FP0B 8P

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

GND

10

GND

C C

PJPB1 battery connector

B B

+5VALW

PR22

PR22

100K_0402_1%

100K_0402_1%

SPOK15,49

PR24

PR24

1 2

0_0402_5%

0_0402_5%

1 2

PC24

PC24

.1U_0402_16V7K

.1U_0402_16V7K

BATT++ BATT+

PL3

PL3
SMB3025500YA_2P

BATT++

PR23

PR23

22K_0402_1%

22K_0402_1%

1 2

13

D

D

PQ5

PQ5

2

G

SSM3K7002FU_SC70-3

G

SSM3K7002FU_SC70-3

S

S

12

@

@

SMB3025500YA_2P

12

12

PC19

PC19
1000P_0402_50V7K

1000P_0402_50V7K

PR13

PR13
100_0402_5%

100_0402_5%

1 2

PR12

PR12
100_0402_5%

100_0402_5%

1 2

PD5

PD5
L30ESD24VC3-2 3P C/A SOT23 ESD

L30ESD24VC3-2 3P C/A SOT23 ESD

3

1

2

PD6

PD6
L30ESD24VC3-2 3P C/A SOT23 ESD

L30ESD24VC3-2 3P C/A SOT23 ESD

3

1

2

B+

12

@

@

12

PR21

PR21

PC22

PC22

100K_0402_1%

100K_0402_1%

0.22U_1206_25V7K

0.22U_1206_25V7K

PR11

PR11
1K +-1% 0402

1K +-1% 0402

1 2

TP0610K-T1-GE3 1P SOT23-3

TP0610K-T1-GE3 1P SOT23-3

BATT+

12

PC20

PC20

0.01U_0402_25V7K

0.01U_0402_25V7K

PR27

PR27

6.49K +-1% 0402

6.49K +-1% 0402

1 2

PQ3

PQ3

2

13

12

PC23

PC23

0.1U_0603_25V7K

0.1U_0603_25V7K

+3VLP

BATT_TEMP 36

EC_SMB_DA1 36,42,48

EC_SMB_CK1 36,42,48

+VSB

@

@

MAINPWON49

H_PROCHOT#5, 36

For KB930 --> Keep PU1 circuit
(Vth = 0.825V)

PH1 under CPU botten side :
CPU thermal protection at 90 +-3 degree C
Recovery at 56 +-3 degree C

Rset = 3 * Rtmh
Rhyst = (Rset* Rtml) / (3*Rtml - Rset)

Rtmh at 90C = 7.8K, Rtml at 56C = 26.1K
Rset = 3 * 7.8K = 23.4K ==> 23.7K
Rhyst = (23.4K * 26.1K) / (3 * 26.1K - 23.4K) = 11.12K ==> 11.3K

+3VLP

12

PC21

PC21

.1U_0402_16V7K

.1U_0402_16V7K

PU3

PU3

MAINPWON

+3VS

PR18

PR18

100K_0402_1%

100K_0402_1%

13

D

D

2

G

G

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

PQ4

PQ4

1

VCC

2

GND

3

OT1

4

OT2

G718TM1U_SOT23-8

12

G718TM1U_SOT23-8

1 2

@

@

PR20

PR20
0_0402_5%

0_0402_5%

TMSNS1

RHYST1

TMSNS2

RHYST2

8

7

6

5

26.1K_0402_1%

26.1K_0402_1%

H_PROCHOT#_EC 36

For KB9012 --> Remove PU1 circuit, but keep PR25
PH1, PR15, PQ3, PR17,PR18, PR16
VCIN0_PH-->NTC_V
VCIN1_PH-->Turbo_V

12

PR14

PR14

23.7K_0402_1%

23.7K_0402_1%

PR15

12

PR16

PR16

PR19

PR19

10K_0402_1%

10K_0402_1%

5.9K_0402_1%

5.9K_0402_1%

1 2

PR17

PR17

11.3K_0402_1%

11.3K_0402_1%

12

PR15

1 2

ADP_I 36,48

12

PH1

PH1

100K_0402_1%_NCP15WF104F0 3RC

100K_0402_1%_NCP15WF104F0 3RC

Active point = 71.52W
Recovery point = 62.62W

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/03 2014/12/31

2011/10/03 2014/12/31

2011/10/03 2014/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PWR- BATTERY CONN

PWR- BATTERY CONN

PWR- BATTERY CONN

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA8711P

LA8711P

LA8711P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

47 57Sunday, November 27, 2011

47 57Sunday, November 27, 2011

47 57Sunday, November 27, 2011

0.1

0.1

0.1

A

B

C

D

for reverse input protection

13

D

D

PQ104

PQ104

2

G

G

2N7002KW_S OT323-3

2N7002KW_S OT323-3

S

@

@

12

PR104

PR104

0_0402_5%

0_0402_5%

12

+3VALW

S

PC108

PC108

0.1U_0402_25V6

0.1U_0402_25V6

12

PR107

PR107

4.12K_0603_1%

4.12K_0603_1%

PQ102

PQ102

AON7702L_DFN8-5

AON7702L_DFN8-5

1
2
3

4

PR108

PR108

4.12K_0603_1%

4.12K_0603_1%

ACIN15,22,36

P2

5

PC111

PC111

12

0.1U_0603_25V7K

0.1U_0603_25V7K

10K_0402_1%

10K_0402_1%

1 2

1 2

0_0402_5%

0_0402_5%

PR103

PR103

0.02_1206_1%

0.02_1206_1%

1

2

PC109

PC109

0.1U_0402_25V6

0.1U_0402_25V6

1 2

BQ24725_ACP

PR116

PR116

PR117

PR117

VIN

B+

4

3

12

BQ24725_ACN

BQ24725_CMSRC

BQ24725_ACDRV

PR120

PR120

255K_0402_1%

255K_0402_1%

1 2

PL101

PL101

1.2UH +-30% 1231A S-H-1R2N=P3 2.9A

1.2UH +-30% 1231A S-H-1R2N=P3 2.9A

1 2

@

@

12

12

PC107

PC107

PC106

PC106

0.1U_0402_25V6

0.1U_0402_25V6

PR111

PR111

1 2

0_0402_5%

0_0402_5%

PR115

PR115

6.8_0603_5%

6.8_0603_5%

1 2

PR118

PR118

280K_0402_1%

280K_0402_1%

2200P_0402_50 V7K

2200P_0402_50 V7K

CSOP1

CSON1

12

BQ24725_BATDRV

PQ105

PQ105
AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

10UH_FDSD0630-H-100M-P3_3.8A_20%

10UH_FDSD0630-H-100M-P3_3.8A_20%

BQ24725_LX CHG

PQ106

PQ106

3 5

241

AON7408L_DFN8-5

AON7408L_DFN8-5

12

PC123

PC123

0.1U_0603_25V7K

0.1U_0603_25V7K

+3VALW

1 2

12

PR113

PR113

@

@

4.7_1206_5%

4.7_1206_5%

12

PC120

PC120

@

@

680P_0402_50V7 K

680P_0402_50V7 K

PL102

PL102

1 2

4.12K_0603_1%

4.12K_0603_1%

@

@

VIN

12

PC102

PC102

10U_0805_25V6K

10U_0805_25V6K

2

3

PD101

PD101
BAS40CW_SOT323-3

BAS40CW_SOT323-3

1

PC112

PC112

0.1U_0402_25V6

0.1U_0402_25V6

PR109

PR109

1 2

PC114

PC114

1U_0603_25V6K

1U_0603_25V6K

PU101

PU101

21

PAD

1

ACN

2

ACP

3

CMSRC

4

ACDRV

5

ACOK

12

PR123

PR123

154K_0402_1%

154K_0402_1%

12

12

PC125

PC125

PR125

PR125

66.5K_0402_1%

66.5K_0402_1%

0.1U_0402_25V6

0.1U_0402_25V6

PC126

PC126

.1U_0402_16V7K

.1U_0402_16V7K

PC113 0.047U_0402_25V7KPC113 0.047U_0402_25V7K

1 2

12

PR110

PR110

0_0603_5%

0_0603_5%

10_1206_1%

10_1206_1%

BQ24725_LX

DH_CHG

18

19

20

VCC

HIDRV

PHASE

BQ24738ARGRR QFN 20P CHARGER

BQ24738ARGRR QFN 20P CHARGER

ACDET6IOUT7SDA8SCL9ILIM

0_0402_5%

0_0402_5%

1 2

PR121

PR121

PR124

PR124

1 2

100_0402_1%

100_0402_1%

12

@

@

1 2

BQ24725_BST

17

BTST

0_0402_5%

0_0402_5%

PR122

PR122

1 2

12

PC104

PC104

PC103

PC103

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

12

PD102

PD102
RB751V-40_SOD323-2

RB751V-40_SOD323-2

PC115

PC115

1 2

1U_0603_25V6K

1U_0603_25V6K

16

REGN

15

LODRV

14

GND

13

SRP

12

SRN

11

BATDRV

10

12

12

PR119

PR119

100K_0402_1%

100K_0402_1%

EC_SMB_CK1 36,42,47

EC_SMB_DA1 36,42,47

ADP_I 36,47

PC105

PC105

10U_0805_25V6K

10U_0805_25V6K

DH_CHG

DL_CHG

PR114

PR114

10_0603_5%

10_0603_5%

SRP

1 2

SRN

1 2

BQ24725_BATDRV

PC124

PC124

0.01U_0402_25 V7K

0.01U_0402_25 V7K

12

PR106

PR106

5

1

2

CSOP1

12

PC116

PC116

PQ103

PQ103
AON7702L_DFN8-5

AON7702L_DFN8-5

4

PR112

PR112

0.01_1206_1%

0.01_1206_1%

4

3

0.1U_0402_25V6

0.1U_0402_25V6

1
2
3

12

12

PC110

PC110

PR105

PR105

@

@

0_0402_5%

0_0402_5%

0.01U_0402_50 V7K

0.01U_0402_50 V7K

BATT+

CSON1

12

PC117

PC117

0.1U_0402_25V6

0.1U_0402_25V6

12

12

PC119

PC119

PC118

PC118

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

12

12

PC121

PC121

PC122

PC122

2200P_0402_50 V7K

2200P_0402_50 V7K

0.01U_0402_50 V7K

0.01U_0402_50 V7K

1 1

2 2

PC101

PC101

VIN

2200P_0402_50 V7K

2200P_0402_50 V7K

1 2

PR101

PR101

1M_0402_5%

1M_0402_5%

PQ101

PQ101
AO4474L_SO8

AO4474L_SO8

8
7
6
5

12

1 2

PR102

PR102

3M_0402_5%

3M_0402_5%

P1

1
2
3

4

12

2011/03/18
delete VIN voltage
detecting circuit

3 3

For KB930 --> Keep PR116

Vin Dectector

4 4

Min. Typ Max.
H-->L 17.33V
L-->H 16.98V

ILIM and external DPM

4.36A

A

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/03 2014/12/31

2011/10/03 2014/12/31

2011/10/03 2014/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR- CHARGER

PWR- CHARGER

PWR- CHARGER

LA-8712P

D

48 57S unday, November 27, 2011

48 57S unday, November 27, 2011

48 57S unday, November 27, 2011

0.1

0.1

0.1

A

B

C

D

E

2VREF_8205

1 1

12

PC302

PC302

1U_0603_16V6K

1U_0603_16V6K

VL

PR302

ENTRIP1

FB_5V

2

1

FB1

PGOOD

UGATE1

PHASE1

LGATE1

17

12

0.1U_0603_25V7K

0.1U_0603_25V7K

+3VALW

PR302

30.9K_0402_1%

30.9K_0402_1%

1 2

PR304

PR304

20K_0402_1%

20K_0402_1%

1 2

PR306

PR306

57.6K_0402_1%

57.6K_0402_1%

1 2

ENTRIP1

24

VO1

23

BST_5V

22

BOOT1

UG_5V

21

LX_5V

20

LG_5V

19

RT8205LZQW(2) WQFN 24P PW M

RT8205LZQW(2) WQFN 24P PW M

NC18VREG5

VL

PC317

PC317

4.7U_0805_10V6K

4.7U_0805_10V6K

+5VALW

( 5A,200mils ,Via NO.= 10 )

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PR308

PR308

1 2

0_0402_5%

0_0402_5%

B++

For RF request

12

12

12

PC304

PC304

PC303

PC303

0.1U_0402_25V6

0.1U_0402_25V6
2200P_0402_50V7K

2200P_0402_50V7K

12

PC322

PC305

PC305

10U_0805_25V6K

10U_0805_25V6K

PC322

PC306

PC306

68P_0402_50V8J

68P_0402_50V8J

10U_0805_25V6K

10U_0805_25V6K

SPOK15,47

PC311

PC311

0.22U_0603_16V7K

0.22U_0603_16V7K

BST1_5VBST1_3V

1 2

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

( UMA 10A,400mils ,Via NO.= 20 )

D

12

PQ302

PQ302
AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

PQ304

PQ304

241

1UH_VMPI0703AR-1R0M-Z01_11A_20%

1UH_VMPI0703AR-1R0M-Z01_11A_20%

5

4

123

PL352

PL352

12

PC313

PC313

150U_UD_6.3VM_R15M

150U_UD_6.3VM_R15M

+5VALWP

1

+

+

2

12

PR310

PR310

@

@

4.7_1206_5%

4.7_1206_5%

SNUB_5V

12

PC316

PC316

@

@

680P_0603_50V7K

680P_0603_50V7K

Ipeak=10A
Imax=7.5A
F=400K
Rtrip=57.6K, OCP=18A
Total Capacitor 1050uF,

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR- 3VALWP/5VALWP

PWR- 3VALWP/5VALWP

PWR- 3VALWP/5VALWP

LA8711P

LA8711P

LA8711P

49 57Sunday, November 27, 2011

49 57Sunday, November 27, 2011

49 57Sunday, November 27, 2011

E

0.1

0.1

0.1

PR301

PR301

13.7K_0402_1%

13.7K_0402_1%

1 2

PR303

PR303

20K_0402_1%

20K_0402_1%

B+

PL301

PL301

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

2 2

Ipeak=5A
Imax=3.5A
F=500K
Rtrip=57.6K, OCP=18A

B++

12

12

PC301

PC301

0.1U_0402_25V6

0.1U_0402_25V6

+3VALWP

12

PC307

PC307

PC308

PC308

10U_0805_25V6K

10U_0805_25V6K

2200P_0402_50V7K

2200P_0402_50V7K

For RF request

12

PC321

PC321

68P_0402_50V8J

68P_0402_50V8J

PL302

PL302

4.7UH_TMPC0502H-4R7M-Z01-D_2.8A_20%

4.7UH_TMPC0502H-4R7M-Z01-D_2.8A_20%

1 2

1

+

+

PC312

PC312
150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M

2

+3VLP

12

PQ301

PQ301
AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

12

SNUB_3V

12

5

PQ303

PR309

PR309

@

@

PC314

PC314

@

@

PQ303

4.7_1206_5%

4.7_1206_5%

680P_0603_50V7K

680P_0603_50V7K

4

MDV2658BURH_POW ERDFN33-8-5

MDV2658BURH_POW ERDFN33-8-5

123

B+

PC309

PC309

PC310

PC310

1 2

0.22U_0603_16V7K

0.22U_0603_16V7K

PD302

PD302
RLZ5.1B_LL34

RLZ5.1B_LL34

1 2

MAINPWON

10U_0805_6.3V6M

10U_0805_6.3V6M

1 2

0_0402_5%

0_0402_5%

PR311

PR311
499K_0402_1%

499K_0402_1%

1 2

PR312
0_0402_5%

0_0402_5%

1 2

PR307

PR307

@PR312

@

Total Capacitor 1050uF,

ENTRIP2

34

PQ305B

PQ305B
SSM6N7002FU-2N_SOT363-6

SSM6N7002FU-2N_SOT363-6

5

PQ305A

PQ305A

ENTRIP1ENTRIP1

61

N_3_5V_001

2

3 3

SSM6N7002FU-2N_SOT363-6

SSM6N7002FU-2N_SOT363-6

+5VALWP

1 2

PR314

PR315

PR315

0_0402_5%

0_0402_5%

MAINPWON

PR317

PR317

12

1 2

PR316

PR316

0_0402_5%

0_0402_5%

1 2

12

2

12

PC319

PC319

PR318

PR318

402K_0402_1%

402K_0402_1%

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

EC_ON36,37

MAINPWON47

PD301

PD301

1M_0402_1%

LL4148_LL34-2

LL4148_LL34-2

VIN

4 4

1M_0402_1%

1 2

12

PR319

PR319

316K_0402_1%

316K_0402_1%

VS

PR314

100K_0402_5%

100K_0402_5%

13

PQ306

PQ306
LTC015EUBFS8TL NPN UMT3F

LTC015EUBFS8TL NPN UMT3F

For KB930 --> Keep PD301, PR317, PR319

A

B

VL

+3VALWP

1 2

PR305

PR305

113K_0402_1%

113K_0402_1%

1 2

BST_3V

UG_3V

LX_3V

LG_3V

12

12

PR313

PR313

200K_0402_1%

200K_0402_1%

ENTRIP2

FB_3V

3

4

5

6

PU301

PU301

FB2

25

P PAD

7

VO2

8

VREG3

9

BOOT2

10

UGATE2

11

PHASE2

12

LGATE2

B++

PC315

PC315

1U_0603_10V6K

1U_0603_10V6K

REF

TONSEL

ENTRIP2

SKIPSEL

VIN16GND

EN

14

15

13

12

PC318

PC318

2VREF_8205

PJP303

PJP303

2

112

JUMP_43X118@

JUMP_43X118@

PJP304

PJP304

2

112

JUMP_43X118@

JUMP_43X118@

PJP301

PJP301

2

112

JUMP_43X118@

JUMP_43X118@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/10/03 2014/12/31

2011/10/03 2014/12/31

2011/10/03 2014/12/31

5

D D

+3VS

12

PR401

PR401
10K_040 2_1%

12

10K_040 2_1%

PCHVCCIO_ PGD

PCHVCCIO_ CS

PCHVCCIO_ FB

12

PR408

PR408

10K_040 2_1%

10K_040 2_1%

VTTPWRGOOD 52

12

PR405

PR405

10K_040 2_1%

10K_040 2_1%

PR406

PR406

4.64K_04 02_1%

4.64K_04 02_1%

C C

PR402

PR402

69.8K_04 02_1%

PR403

PR403
20K_040 2_1%

20K_040 2_1%

SUSP#9,36,43,5 1,52,53

B B

1 2

69.8K_04 02_1%

12

PC407

PC407
1U_0402 _16V6K

1U_0402 _16V6K

4

PU401

PU401

1

2

3

4

5

VBST

PGOOD

TRIP

DRVH

EN

SW

V5IN

VFB

DRVL

TST

FB=0.704V

TPS5121 2DSCR_SON10_ 3X3

TPS5121 2DSCR_SON10_ 3X3

TP

12

PCHVCCIO_ BST

10

PCHVCCIO_ DH

9

PCHVCCIO_ LX

8

PCHVCCIO_ VDDP

7

PCHVCCIO_ DL

6

11

PR410

PR410
0_0603_ 5%

0_0603_ 5%

1 2

+5VALW

12

PC409

PC409
1U_0603 _10V6K

1U_0603 _10V6K

PCHVCCIO_ BST-1

PR411

PR411

12

0_0603_ 5%

0_0603_ 5%

3

4

PC405

PC405

0.1U_060 3_25V7K

0.1U_060 3_25V7K

1 2

4

PQ402

TPCA805 9-H_SOP-ADVANC E8-5

TPCA805 9-H_SOP-ADVANC E8-5

PQ402

PCHVCCIO_ B+

5

PQ401

PQ401
TPCA806 5-H_PPAK56-8-5

TPCA806 5-H_PPAK56-8-5

123

5

213

2

12

12

12

PC403

PC403

PC402

PC402

PC401

PC401

10U_0805_25V6K

10U_0805_25V6K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

0.1U_0603_25V7K

0.1U_0603_25V7K

PL401

1 2

12

PR404

PR404

4.7_1206 _5%

4.7_1206 _5%

PCHVCCIO_SNB

12

PC410

PC410
680P_04 02_50V7K

680P_04 02_50V7K

PL401

0.47UH_F DVE0630-H-R47M =P3_17.7A_20%

0.47UH_F DVE0630-H-R47M =P3_17.7A_20%

12

PC404

PC404
2200P_0 402_50V7K

2200P_0 402_50V7K

12

PC408

PC408

0.1U_0402_16V7K

0.1U_0402_16V7K

100_040 2_1%

100_040 2_1%

0_0402_ 5%

0_0402_ 5%

Close to PU501.7

PJP401

PJP401

2

JUMP_43 X118

JUMP_43 X118

1

+

+

PC406

PC406

2

PR407

PR407

PR409

PR409

112

220U_B2_2.5VM_R15M

220U_B2_2.5VM_R15M

12

12

B+

+1.05VS
Peak Current
HR=17.5A
CR=9A

OCP current
HR= TBD A
CR= TBD A

VCCIO_SENSE 8

VSS_SENSE_VCCIO 8

1

+1.05VS

A A

Security Class ification

Security Class ification

Security Class ification

2009/08/ 23 2011/12/ 31

2009/08/ 23 2011/12/ 31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/ 23 2011/12/ 31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PWR-1.05VS

PWR-1.05VS

PWR-1.05VS

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Custom

Custom

Custom

LA8711P

LA8711P

LA8711P

Date: Sheet o f

Date: Sheet o f

2

Date: Sheet o f

50 57Sunday, November 27, 2 011

50 57Sunday, November 27, 2 011

50 57Sunday, November 27, 2 011

1

0.1

0.1

0.1

5

High

4

3

2

1

0.75Volt +/- 5%
TDC 0.525A

PL501

PL501

HCB1608 KF-121T30_060 3

12

PC501

PC501

@

@

680P_0603_50V7K

680P_0603_50V7K

HCB1608 KF-121T30_060 3

1 2

PL502

1UH_VMP I0703AR-1R0M-Z01_ 11A_20%

1UH_VMP I0703AR-1R0M-Z01_ 11A_20%

PL502

12

D D

B+

+1.5VP

C C

Ipeak=7.5A
Imax=5.25A
F=300K

Mode Level +0.75VSP VTTREF_1.5V
S5 L off off
S3 L off on
S0 H on on

Note: S3 - sleep ; S5 - power off

B B

1

+

+

PC511

PC511

2

330U_D2_2.5VY_R15M

330U_D2_2.5VY_R15M

1.5V_B+

BST_1.5V

12

PC503

PC503

PC502

PC502

0.1U_0402_25V6

0.1U_0402_25V6
2200P_0402_50V7K

2200P_0402_50V7K

12

12

@P R504

@

4.7_1206 _5%

4.7_1206 _5%

SNUB_+1.5VP

12

@P C514

@

680P_04 02_50V7K

680P_04 02_50V7K

12

PC504

PC504

10U_0805_25V6K

10U_0805_25V6K

PR504

FDMC769 2S_MLP8-5

FDMC769 2S_MLP8-5

PC514

12

PC505

PC505

@

@

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PQ502

PQ502

5

4

PQ501

PQ501
SIS412DN-T 1-GE3_POWE RPAK8-5

SIS412DN-T 1-GE3_POWE RPAK8-5

123

5

4

123

SYSON36,43

1 2

PR508

PR508

0_0402_ 5%

0_0402_ 5%

1 2

PC506

PC506

0.22U_0402_10V6K

0.22U_0402_10V6K

+5VALW

DH_1.5V_ 1

PR505

PR505

5.1_0603 _5%

5.1_0603 _5%

1 2

1U_0603 _10V6K

1U_0603 _10V6K

12

PC517

@P C517

@

0.1U_040 2_10V7K

0.1U_040 2_10V7K

PC513

PC513

PR501

PR501

1 2

2.2_0402 _5%

2.2_0402 _5%

PR502

PR502

1 2

0_0402_ 5%

0_0402_ 5%

SW_ 1.5V

DL_1.5V

9.53K_04 02_1%

9.53K_04 02_1%

1U_0603 _10V6K

1U_0603 _10V6K

12

EN_1.5V

PR503

PR503

1 2

PC510

PC510

1 2

VDD_1.5V

BOOT_1.5 V

DH_1.5V

CS_1.5V

+5VALW

1.5V_B+

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR507

PR507

887K_04 02_1%

887K_04 02_1%

1 2

16

RT8207M ZQW_W QFN20_3X3

RT8207M ZQW_W QFN20_3X3

10

18

17

19

PHASE

PGOOD

BOOT

UGATE

TON

9

TON_1.5V

VLDOIN

S5

S3

8

7

EN_0.75VSP

20

PU501

PU501

VTT

PAD

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

6

FB_1.5V

+1.5V

21

1

2

3

VTTREF_ 1.5V

4

PR506

PR506

PC515

PC515

@

@

1 2

1 2

+1.5VP

12

PR510

PR510

41.2K_0402_5%

41.2K_0402_5%

12

5

10K_040 2_1%

10K_040 2_1%

.1U_0402 _16V7K

.1U_0402 _16V7K

PR509

PR509

10K_0402_1%

10K_0402_1%

1 2

Peak Current 0.75A
OCP Current 0.9A

12

12

PC508

PC508

PC507

PC507

10U_0805_6.3V6K

10U_0805_6.3V6K

10U_0805_6.3V6K

10U_0805_6.3V6K

+1.5VP

PC516

PC516
.1U_0402 _16V7K

.1U_0402 _16V7K

+3VS

12

PC509

PC509

@

@

10U_0805_6.3V6K

10U_0805_6.3V6K

12

PC512

PC512

0.033U_0 402_16V7K

0.033U_0 402_16V7K

+0.75VSP

@

PR512

PR512

0_0402_ 5%

PJP501

PJP501

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

PJP502

PJP502

+1.5VP

+0.75VSP

A A

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

PJP503

PJP503

1 2

PAD-OPEN 3x3m

PAD-OPEN 3x3m

5

(9A,360mils ,Via NO.= 18)

+1.5V

(2A,80mils ,Via NO.= 4)

+0.75VS

4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/07/ 29

2011/07/ 29

2011/07/ 29

3

SUSP#9,36,43,50,52,53

Compal Secret Data

Compal Secret Data

Compal Secret Data

0_0402_ 5%

Deciphered Date

Deciphered Date

Deciphered Date

12

12

PC518

@P C518

@

0.1U_040 2_10V7K

0.1U_040 2_10V7K

SSM3K70 02FU_SC70-3

SSM3K70 02FU_SC70-3

2012/07/ 29

2012/07/ 29

2012/07/ 29

2

@

PR513

PR511

PR511

13

D

D

2

G

G

S

S

PQ503

PQ503

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Sunday, November 27, 2011

Sunday, November 27, 2011

Sunday, November 27, 2011

PR513

10K_0402_1%

10K_0402_1%

5.1K_040 2_1%

5.1K_040 2_1%

1 2

1 2

12

PC519

PC519

.1U_0402_16V7K

.1U_0402_16V7K

PWR-1.5VP / +0.75VSP

PWR-1.5VP / +0.75VSP

PWR-1.5VP / +0.75VSP

PR514

PR514
10K_040 2_5%

10K_040 2_5%

1 2

LA-8712P

1

DDR3L_E N 17

51 57

51 57

51 57

0.01Custom

0.01Custom

0.01Custom

5

D D

PL601

PL601

HCB1608KF-121T30_0603

HCB1608KF-121T30_0603

+5VALW

C C

B B

1 2

+VCCSA_PWR_SRC +VCCSA_PHASE

2

PC607

PC607

1

12

12

PC608

PC608

PC609

PC609

0.1U_0603_25V7K

0.1U_0603_25V7K

22U_0805_10VA

2200P_0402_50V7K

2200P_0402_50V7K

22U_0805_10VA

4

The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.

PU601

PU601
SY8037ADCC DFN 12P PWM

SY8037ADCC DFN 12P PWM

12

PVIN

11

112

PJP602

PJP602
JUMP_43X79

JUMP_43X79

PVIN

10

SVIN

9

FB

8

VOUT

7

VID1

12

PR610

PR610

@

@

1M_0402_5%

1M_0402_5%

2

12

PC610

PC610

22U_0805_10VA

22U_0805_10VA

SUSP#9,36,43,50,51,53

+5VALW

68P_0402_50V8J

68P_0402_50V8J

+VCCSAP_FB

PC602

PC602

PR604

PR604

1 2

1K_0402_5%

1K_0402_5%

PR609

PR609
510K_0402_1%

510K_0402_1%

1 2

12

3

PC601

@P C601

@

680P_0402_50V7K

680P_0402_50V7K

1 2

SNUB_+VCCSA

PR601

PR601

@

@

4.7_0402_1%

4.7_0402_1%

1 2

1UH_PCMB042T-1R0MS_4.5A_20%

1

LX

2

LX

3

LX

4

PG

+VCCSA_EN

5

EN

6

VID0

GND

13

PR605

PR605

1 2

1K_0402_5%

1K_0402_5%

12

PC617

PC617

@

@

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

12

PC613

PC613

22U_0805_6.3V6M

22U_0805_6.3V6M

1.8V_VIN

1.8V_LX

1

2

3

4

1UH_PCMB042T-1R0MS_4.5A_20%

PR602

PR602

100K_0402_5%

100K_0402_5%

12

@

@

12

PC611

PC611

0.1U_0402_10V7K

0.1U_0402_10V7K

VCCSA_VID0 9

VCCSA_VID1 9

PU602

PU602
SY8809DFC_DFN8_2X2

SY8809DFC_DFN8_2X2

8

EN

FB

7

IN

PG

6

LX

LX

5

GND

GND

+3VS

1 2

0_0402_5%

0_0402_5%

PR603

PR603

1.8V_FB

1.8V_LX

4x4

PL602

PL602

1 2

SA_PGOOD 36

VTTPWRGOOD50

12

PR612

PR612

14.3K_0402_1%

14.3K_0402_1%

PC603

PC603

PC604

PC604

1 2

1 2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

PL603

PL603

1.2UH_1231AS-H-1R2N=P3_2.9A_30%

1.2UH_1231AS-H-1R2N=P3_2.9A_30%

1 2

12

PR608

PR608

4.7_0402_1%

4.7_0402_1%

12

PC616

PC616

1 2

PR611

680P_0402_50V7K

680P_0402_50V7K

PR611

28.7K_0402_1%

28.7K_0402_1%

PC618

PC618

22P_0402_50V8J@

22P_0402_50V8J@

PC605

PC605

PC606

PC606

1 2

1 2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

PR606

PR606

100_0402_5%

100_0402_5%

PR607

PR607

0_0402_5%

0_0402_5%

12

PC614

PC614

12

2

1

+VCCSAP

12

12

+VCCSAP

VCCSA_SENSE 9

+VCCSAP
TDC 3A
Peak Current 4A

PJP601

PJP601

112

JUMP_43X118

JUMP_43X118

2

+VCCSA

+1.8VSP

12

PC615

PC615

47U 6.3V M X5R 0805 H1.25

47U 6.3V M X5R 0805 H1.25

47U 6.3V M X5R 0805 H1.25

47U 6.3V M X5R 0805 H1.25

PJP603

PJP603

2

112

JUMP_43X79

JUMP_43X79

1.8VSP
TDC 2 A
Peak Current 3 A

+1.8VS+1.8VSP

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/08/23 2011/12/31

2009/08/23 2011/12/31

2009/08/23 2011/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

2

Title

Title

Title

PWR-VCCPP/1.8VSP

PWR-VCCPP/1.8VSP

PWR-VCCPP/1.8VSP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA8711P

LA8711P

LA8711P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

52 57Sunday, November 27, 2011

52 57Sunday, November 27, 2011

52 57Sunday, November 27, 2011

0.1

0.1

0.1

A

B

C

D

1 1

PL901

PL901

HCB1608KF-121T30_0603

HCB1608KF-121T30_0603

+5VALW

2 2

1 2

PR902

PR902
0_0402_5%

12

PC902

PC902

22U_0805_6.3VAM

22U_0805_6.3VAM

12

PC926
22U_0805_6.3VAM

22U_0805_6.3VAM

DIS@PC926

DIS@

SUSP#9,36,43,50,51,52

0_0402_5%

1 2

EN_1.5VPCIE

12

PC923

@ PC923

@

0.1U_0402_10V7K

0.1U_0402_10V7K

4

10

PVIN

9

PVIN

8

SVIN

5

EN

LX

PG

LX

FB

TP

SS

LX

SY8036LDBC DFN 10P PWM

SY8036LDBC DFN 10P PWM

7

1

11

2

3

6

PU901

PU901

PU901
SY8033BDBC_DFN10_3X3

SY8033BDBC_DFN10_3X3

PC927

PC927

680P_0402_50V7K

680P_0402_50V7K

SNUB_+1.5VPCIE

1 2

PR917

PR917

4.7_0402_1%

4.7_0402_1%

1 2

1UH_PCMB053T-1R0M S_7A_20%

1UH_PCMB053T-1R0M S_7A_20%

LX_1.5VPCIE

DIS@PU901

DIS@

UMA@

UMA@

5x5

PL904

PL904

1 2

1.5VPCIEVP

12

12

PR916

PR916

150K_0402_1%

150K_0402_1%

PR918

PR918

100K_0402_1%

100K_0402_1%

PC928

PC928

1 2

1 2

12

PC924

PC924

22P_0402_50V8J

22P_0402_50V8J

22U_0805_6.3VAM

22U_0805_6.3VAM

12

12

PC929

PC929

PC925

PC925

PC930

PC930

22U_0805_6.3VAM

22U_0805_6.3VAM

DIS@

DIS@

22U_0805_6.3VAM

22U_0805_6.3VAM

22U_0805_6.3VAM

22U_0805_6.3VAM

DIS@

DIS@

1.5VPCIEVP

PR910

PR910
100K_0402_5%

100K_0402_5%

PXS_PWR EN16,23,54,56

+5VALW

3 3

1 2

PJP903

PJP903

112

JUMP_43X79@

JUMP_43X79@

1 2

2

EN_0.935V

12

PC913

PC913

PR911

PR911

1M_0402_5%

1M_0402_5%

0.1U_0402_10V7K@

0.1U_0402_10V7K@

@

@

12

PC908

PC908

22U_0805_6.3V6M

22U_0805_6.3V6M

PU902

PU902

SY8809DFC_DFN8_2X2

SY8809DFC_DFN8_2X2

1

2

3

4

EN

IN

LX

GND

GND

8

FB

7

PG

6

LX

5

LX_0.935VLX_0.935V

FB_0.935V

PR908

PR908

4.7_0402_1%

4.7_0402_1%

PC914

PC914

680P_0402_50V7K

680P_0402_50V7K

12

12

PL902

PL902

1UH +-20% SIG4018- 1R0 3A

1UH +-20% SIG4018- 1R0 3A

1 2

0.935VP

12

PC909

PC909

22P_0402_50V8J

22P_0402_50V8J

@

@

PR909

PR909

1 2

12

PR912

PR912

12

12

11.3K_0402_1%

11.3K_0402_1%

20K_0402_1%

20K_0402_1%

PC910

PC910

PC911

PC911

47U 6.3V M X5R 0805 H1.25

47U 6.3V M X5R 0805 H1.25

47U 6.3V M X5R 0805 H1.25

47U 6.3V M X5R 0805 H1.25

1.5VPCIEP
TDC 2.8A
Peak Current 4A
OCP current 6A

PJP902

PJP902

1 2

PAD-OPEN 4x4m@

PAD-OPEN 4x4m@

1.5VPCIEV

PJP904

PJP904

0.935VP

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/08/16 2012/08/15

2011/08/16 2012/08/15

2011/08/16 2012/08/15

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

1 2

PAD-OPEN 4x4m@

PAD-OPEN 4x4m@

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

+1.5VPCIE/0.935V

+1.5VPCIE/0.935V

+1.5VPCIE/0.935V

LA8711P

LA8711P

LA8711P

0.935V

0.2

0.2

53 57Sunday, November 27, 2011

53 57Sunday, November 27, 2011

D

53 57Sunday, November 27, 2011

0.2

A

B

C

D

1 1

PXS_PWR EN16,23,53,56

+5VALW

2 2

3 3

PR801

PR801
100K_0402_5%VGA@

100K_0402_5%VGA@

1 2

PJP801

PJP801

112

JUMP_43X79@

JUMP_43X79@

EN_VDDCI

12

PC805

PR805

1 2

1M_0402_5%

1M_0402_5%

0.1U_0402_10V7K

0.1U_0402_10V7K

VGA@ PC805

VGA@

VGA@ PR805

VGA@

PU801

PU801
SY8809DFC_DFN8_2X2

SY8809DFC_DFN8_2X2

1

2

12

PC801

22U_0805_6.3V6M

22U_0805_6.3V6M

VGA@ PC801

VGA@

LX_VDDCI

2

3

4

EN

IN

LX

GND

GND

8

FB

7

PG

6

LX

5

LX_VDDCI

FB_VDDCI

PL801

VGA@ PL801

VGA@

1UH +-20% SIG4018- 1R0 3A

1UH +-20% SIG4018- 1R0 3A

1 2

12

PR802

PR802

4.7_0402_1%

4.7_0402_1%

12

PC806

PC806

680P_0402_50V7K

680P_0402_50V7K

PR808

PR808
10K_0402_1%VGA@

10K_0402_1%VGA@

PC802

PC802

22P_0402_50V8J@

22P_0402_50V8J@

12

1 2

VGA@ PR804

VGA@

4.99K_0402_1%

4.99K_0402_1%

12

PR804

12

13

D

D

S

S

PQ801

PQ801
2N7002W- T/R7_SOT323-3

2N7002W- T/R7_SOT323-3

PR803

VGA@ PR803

VGA@

10_0402_5%

10_0402_5%

1 2

VGA@

VGA@

PR807

PR807

29.4K_0402_1%

29.4K_0402_1%

2

G

G

VGA@

VGA@

12

PR810

VGA@PR810

VGA@

10K_0402_5%

10K_0402_5%

12

PC808

@ PC808

@

4700P_0402_25V7K

4700P_0402_25V7K

12

PC803

PC804

VGA@ PC803

VGA@

VGA@ PC804

VGA@

47U 6.3V M X5R 0805 H1.25

47U 6.3V M X5R 0805 H1.25

47U 6.3V M X5R 0805 H1.25

47U 6.3V M X5R 0805 H1.25

+3VS

12

PR809
10K_0402_5%

10K_0402_5%

12

12

PR811
100K_0402_5%

100K_0402_5%

+VDDCI
TDC 2.8A
Peak Current 4A
OCP current 6A

PR806

VGA@ PR806

VGA@

0_0402_5%

0_0402_5%

12

VGA@PR809

VGA@

@PR811

@

+VDDCIP

VDDCI_SEN 25

VDDCI_VID 2 2

VDDCI_VID

1VHigh

PJP802

@PJ P802

Low 0.9V

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/08/16 2012/08/15

2011/08/16 2012/08/15

2011/08/16 2012/08/15

Compal Secret Data

Compal Secret Data

Compal Secret Data

+VDDCIP

Deciphered Date

Deciphered Date

Deciphered Date

C

@

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

+VDDCI

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

+VDDCIP

+VDDCIP

+VDDCIP

LA8711P

LA8711P

LA8711P

D

54 57Sunday, November 27, 2011

54 57Sunday, November 27, 2011

54 57Sunday, November 27, 2011

0.2

0.2

0.2

5

12

PR201

1K_0402_ 1%

1K_0402_ 1%

@ PR201

@

12

150P_0402_50V8J

D D

VR_HOT#36

C C

PH203

PH203

2-ph: PR172=20.5K Vboot=0V, Iccmax=54A

2-ph: PR172=20.5K Vboot=0V, Iccmax=54A

2-ph: PR172=20.5K Vboot=0V, Iccmax=54A2-ph: PR172=20.5K Vboot=0V, Iccmax=54A
2-ph: PR172=169K Vboot=1.1V, Iccmax=54A

2-ph: PR172=169K Vboot=1.1V, Iccmax=54A

2-ph: PR172=169K Vboot=1.1V, Iccmax=54A2-ph: PR172=169K Vboot=1.1V, Iccmax=54A

B B

A A

PC201

@ PC201

@

PR219

@PR219

@

499_0402_1%

499_0402_1%

VGATE15

12

PR226

PR226

1 2

27.4K_040 2_1%

27.4K_040 2_1%

470KB_040 2_5%_ERTJ0EV474 J

470KB_040 2_5%_ERTJ0EV474 J

PR230

PR230

1 2

3.83K_040 2_1%

3.83K_040 2_1%

+CPU_CORE
Iocp=72A, IccMA X=53A
Load line=1.9mo hm
DCR=1.1mohm

150P_0402_50V8J

1 2

PR206

PR206

330P_040 2_50V7K

330P_040 2_50V7K

196K_040 2_1%

196K_040 2_1%

1 2

+3VS

1 2

PR221

PR221

1.91K_040 2_1%

1.91K_040 2_1%

1 2

12

PC219

PC219

47P_0402 _50V8J

47P_0402 _50V8J

NTCG

5

PC205

PC205

39P_0402_50V7K

39P_0402_50V7K

12

12

12

PR204

PC216

VR_SVID_DAT8

475K_0402_1%

475K_0402_1%

12

PC211

PC211

12

PR212

PR212

PR218

PR218

54.9_0402_1%

54.9_0402_1%

12

PH202

PH202

12

470KB_040 2_5%_ERTJ0EV474 J

470KB_040 2_5%_ERTJ0EV474 J

PR204

1 2

PR227

PR227

3.83K_040 2_1%

3.83K_040 2_1%

+1.05VS

1 2

PR224

PR224

27.4K_040 2_1%

27.4K_040 2_1%

PC208

PC208

1000P_0402_50V7K

1000P_0402_50V7K

8.06K_0402_1%

8.06K_0402_1%

@ PC216

@

.1U_0402_16V7K

.1U_0402_16V7K

VR_SVID_CLK8

+GFX_CORE
Iocp=40A, IccMA X=24A
Load line=3.9mo hm
DCR=1.1mohm

2.49K_0402_1%

2.49K_0402_1%

422_0402_1%

422_0402_1%

12

PC209

PC209

330P_0402_50V7K

330P_0402_50V7K

@ PR214

@

1.91K_0402_1%

1.91K_0402_1%

PR215

PR215
130_0402_1%

130_0402_1%

1 2

VR_SVID_ALRT#8

VR_ON36

12

8.06K_0402_1%

8.06K_0402_1%

PR231

PR231

1 2

20.5K_040 2_1%

20.5K_040 2_1%

1 2

PR203

PR203

PR214

GFX_CORE_PWRGD

SVID_SCLK

PR228

PR228

12

12

PR232

PR232

267K_040 2_1%

267K_040 2_1%

PC235

PC235
470P_0402_50V7K

470P_0402_50V7K

12

PR205

PR205

12

+3VS

1 2

0_0402_5%

0_0402_5%

comp

PC229

PC229

680P_040 2_50V7K

680P_040 2_50V7K

PR235

PR235

2K_0402_1%

2K_0402_1%

1 2

4

1 2

SVID_ALERT#

PR222

PR222

NTC

4

12

PC222

PC222

1000P_04 02_50V7K

1000P_04 02_50V7K

12

PC232

PC232

47P_0402 _50V8J

47P_0402 _50V8J

PC234

PC234

1000P_0402_50V7K

1000P_0402_50V7K

1 2

FB

1 2

3K_0402_1%

3K_0402_1%

1

VWG

2

PGOODG

3

SDA

4

ALERT#

5

SCLK

6

VR_ON

7

PGOOD

8

VR_HOT#

9

NTC

10

VW

1 2

PR237

PR237

+CPU_CORE

330P_0402_50V7K@

330P_0402_50V7K@

0.01U_0402_25V7K

0.01U_0402_25V7K

ISPG

37

38

39

40

41

FBG

PAD

RTNG

COMPG

ISUMPG

PU201

PU201
ISL95835HRTZ-T_TQFN40_5X5

ISL95835HRTZ-T_TQFN40_5X5

COMP11FB12ISEN3/ FB213ISEN214ISEN115RTN16ISUMN17ISUMP18VDD19VIN

FB

ISEN2

comp

12

ISEN3

PC221

PC221

10P_0402 _50V8J

10P_0402 _50V8J

12

PC223

PC223

0.22U_040 2_6.3V6K

0.22U_040 2_6.3V6K

PR236

PR236

887_0402_1%

887_0402_1%

12

12

PC246

PC246

@

@

330P_040 2_50V7K

330P_040 2_50V7K

PR246

PR246

1 2

10_0402_ 1%

10_0402_ 1%

VCCSENSE

3

12

PC207

1 2

ISNG

36

ISUMNG

ISEN1

12

PC224

PC224

0.22U_040 2_10V6K

0.22U_040 2_10V6K

VSUM-

PC247

PC247

8

PC207

PC210

PC210

NTCG

35

0.01U_040 2_25V7K

0.01U_040 2_25V7K

12

NTCG

10_0402_1%

10_0402_1%

10_0402_1%

10_0402_1%

UGATEG

BOOTG

LGATEG

PHASEG

31

32

33

34

BOOTG

LGATEG

PHASEG

UGATEG

BOOT2

UGATE2

PHASE2

LGATE2

PWM3

LGATE1

PHASE1

UGATE1

BOOT1

20

12

12

PC236

PC236

@

@

330P_040 2_50V7K

330P_040 2_50V7K

PR239

PR239

12

1.47K_040 2_1%

1.47K_040 2_1%

PR245

PR245

@

@

100_0402 _1%

100_0402 _1%

2-ph: PR178=1.47K for ~70A OCP

2-ph: PR178=1.47K for ~70A OCP

2-ph: PR178=1.47K for ~70A OCP2-ph: PR178=1.47K for ~70A OCP

PR247

PR247
10_0402_1%

10_0402_1%

1 2

8

VSSSENSE

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR202

PR202

PR207

PR207

VCCP

12

3

12

+5VS

PC238

PC238

0.22U_040 2_10V6K

0.22U_040 2_10V6K

+VGFX_CORE

VCC_AXG_SENSE 9

VSS_AXG_SENSE 9

PHASEG

BOOTG

LGATEG

2.2_0603_5%

2.2_0603_5%

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

UGATEG

0.22U_0603_10V7K

0.22U_0603_10V7K

12

PR208

PR208

+5VS

TPCA8059-H_PPAK56-8-5

TPCA8059-H_PPAK56-8-5

12

PR217

PR217

0_0603_5%

BOOT2

30

UGATE2

29

PHASE2

28

LGATE2

27

26

25

LGATE1

24

PHASE1

23

UGATE1

22

BOOT1

21

1 2

12

PC225

PC225
1U_0603_10V6K

1U_0603_10V6K

12

PC239

PC239

PR229

PR229
1_0603_5%

1_0603_5%

12

0.033U_04 02_16V X7R

0.033U_04 02_16V X7R

0_0603_5%

12

PC218

PC218

1U_0603_10V6K

1U_0603_10V6K

CPU_B+

12

PR225

PR225

2.2_0603_5%

2.2_0603_5%

12

PC220

PC220

0.22U_0603_25V7K

0.22U_0603_25V7K

PQ203

PQ203

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

UGATE2

PHASE2

PR233

PR233

2.2_0603_5%

2.2_0603_5%

BOOT2

VSUM+

12

LGATE2

PR238

PR238

2.61K_0402_1%

2.61K_0402_1%

PR241

PR241

12

11K_0402 _1%

11K_0402 _1%

PH204

PH204
10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

VSUM-

12

PC240

PC240
.1U_0402_16V7K

.1U_0402_16V7K

UGATE1

PHASE1

BOOT1

LGATE1

2010/01/25 2009/04/28

2010/01/25 2009/04/28

2010/01/25 2009/04/28

12

PC233

PC233

0.22U_0603_10V7K

0.22U_0603_10V7K

TPCA8059-H_PPAK56-8-5

TPCA8059-H_PPAK56-8-5

PQ205

PQ205

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

PR248

PR248

2.2_0603_5%

2.2_0603_5%

12

PC248

PC248

0.22U_0603_10V7K

0.22U_0603_10V7K

PQ206

PQ206

TPCA8059-H_PPAK56-8-5

TPCA8059-H_PPAK56-8-5

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PC212

PC212

12

PQ204

PQ204

12

2

5

PQ201

PQ201

12

PQ202

PQ202

4

4

12

PC203

PC203

PC202

PC202

1 2

10U_0805 _25V6K

10U_0805 _25V6K

123

5

12

12

PR209

PR209

4.7_1206 _5%

4.7_1206 _5%

12

PC213

PC213
680P_0402_50V7K

123

680P_0402_50V7K

ISPG

+5VS

5

4

123

5

4

123

5

4

123

5

4

123

2

12

CPU_B+

12

PC227

PC227

PC226

PC226

10U_0805 _25V6K

10U_0805 _25V6K

10U_0805 _25V6K

10U_0805 _25V6K

12

PR234

PR234

4.7_1206 _5%

4.7_1206 _5%

12

VSUM+

PC237

PC237
680P_0402_50V7K

680P_0402_50V7K

ISEN2

VSUM- ISEN1

CPU_B+

12

12

PC241

PC241

PC242

PC242

10U_0805 _25V6K

10U_0805 _25V6K

12

PR249

PR249

4.7_1206 _5%

4.7_1206 _5%

VSUM+

12

ISEN1

PC249

PC249
680P_0402_50V7K

680P_0402_50V7K

VSUM-

12

12

PC206

PC204

@ PC206

@

@ PC204

@

0.1U_0402 _25V6

0.1U_0402 _25V6

2200P_04 02_50V7K

10U_0805 _25V6K

10U_0805 _25V6K

1

2

3.65K_0402_1%

3.65K_0402_1%

7.5K_0402_1%

7.5K_0402_1%

1 2

.1U_0402_16V7K

.1U_0402_16V7K

0.047U_0402_16V X7R

0.047U_0402_16V X7R

12

PC228

@ PC228

@

0.1U_0402 _25V6

0.1U_0402 _25V6

3.65K_0402_1%

3.65K_0402_1%

1 2

1 2

12

10U_0805 _25V6K

10U_0805 _25V6K

3.65K_0402_1%

3.65K_0402_1%

1 2

10K_0402_1%

10K_0402_1%

1 2

1_0402_5%

1_0402_5%

1 2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

2200P_04 02_50V7K

PL201

PL201

0.36UH_FDU1040J-H-R36M=P3_33A_20%

0.36UH_FDU1040J-H-R36M=P3_33A_20%

4

3

PR210

PR210

PH201

PH201

PR213

PR213

10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

1 2

1 2

PR216

PR216

11K_0402_1%

11K_0402_1%

1 2

PC215

PC215

1 2

PC217

PC217

ISNG

12

PR223

@ PR223

@

0_0402_5%

0_0402_5%

1

12

+

+

PC250

PC250

PC230

2

@ PC230

@

2200P_04 02_50V7K

2200P_04 02_50V7K

0.36UH_FDUM0640J-H-R36M-P3_22A_20%

0.36UH_FDUM0640J-H-R36M-P3_22A_20%

PR240

PR240

PR242

PR242

10K_0402_1%

10K_0402_1%

PR243

PR243

1_0402_5%

1_0402_5%

1 2

12

PC243

PC243

PC244

0.1U_0402 _25V6

0.1U_0402 _25V6

10U_0805 _25V6K

10U_0805 _25V6K

@ PC244

@

0.36UH_FDUM0640J-H-R36M-P3_22A_20%

0.36UH_FDUM0640J-H-R36M-P3_22A_20%

PR250

PR250

PR251

PR251

PR252

PR252

Compal Electronics, Inc.

CPU_CORE/VGFX_CORE

CPU_CORE/VGFX_CORE

CPU_CORE/VGFX_CORE

1

CPU_B+

+VGFX_CORE

12

PR211

PR211

1_0402_5%

1_0402_5%

PC214

PC214

.1U_0402_16V7K

.1U_0402_16V7K

1 2

12

PR220

PR220

953_0402_1%

953_0402_1%

Connect to +5V can disable
GFX portion

PL202

PL202

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

PL203

PL203

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

68U_25V_M _R0.44

68U_25V_M _R0.44

PL204

PL204

1 2

12

PC245

@ PC245

@

2200P_04 02_50V7K

2200P_04 02_50V7K

PL205

PL205

1 2

QAZ20

1

+CPU_CORE

PR244

PR244

10K_0402_1%

10K_0402_1%

+CPU_CORE

PR253

PR253

10K_0402_1%

10K_0402_1%

55 57Sunday, November 27, 2011

55 57Sunday, November 27, 2011

55 57Sunday, November 27, 2011

1

+

+

PC231

PC231

2

68U_25V_M _R0.44

68U_25V_M _R0.44

12

ISEN2

12

B+

0.3

0.3

0.3

A

B

C

D

E

F

G

H

1 1

2 2

VSS_GPU_SENSE25

VCC_GPU_SENSE25

3 3

PR723

PR723

0_0402_5%

0_0402_5%

PR726

PR726

0_0402_5%

0_0402_5%

PC701

PC701

1000P_0402_50V7K

1000P_0402_50V7K

12

12

PR7011K_0402_1% PR7011K_0402_1%

PR7031K_0402_1% @PR7031K_0402_1% @

PR7051K_0402_1% @PR7051K_0402_1% @

PR7071K_0402_1% PR7071K_0402_1%

1 2

1 2

1 2

1 2

12

GPU_VID1

GPU_VID2

GPU_VID3

GPU_VID4

PR721

@ PR721

@

66.5K_0402_1%

66.5K_0402_1%

1 2

1 2

PC712

PC712

1500P_0402_50V7K

1500P_0402_50V7K

1 2

PR727

PR727

1K_0402_1%

1K_0402_1%

PR702 1K_0402_1%@PR702 1K_0402_1%@

12

PR704 1K_0402_1%PR704 1K_0402_1%

12

PR706 1K_0402_1%PR706 1K_0402_1%

12

PR708 1K_0402_1%@PR708 1K_0402_1%@

12

+3VS

VGA_PWRGD17

PC714

PC714

10P_0402_25V8K

10P_0402_25V8K

VGA_COMP-1

1 2

1000P_0402_50V8J

1000P_0402_50V8J

PC719

PC719

1 2

39.2K_0402_1%

39.2K_0402_1%

9.53K_0402_1%

9.53K_0402_1%

PR728

PR728

Connect to input caps

PR729

PR729

+VGA_B+

+3VS

12

PR709

PR709

@

@

12

PR719

PR719
1K_0402_1%

1K_0402_1%

VGA_FB

VGA_COMP

1 2

80.6K_0402_1%

80.6K_0402_1%

VGA_VCC

VGA_ILIM

1 2

VGA_CSCOMP

PC702

PC702

@

@

0.1U_0402_16V7K

0.1U_0402_16V7K

PR730

PR730

PR736

PR736

1K_0402_1%

1K_0402_1%

PXS_PWREN

PR710

PR710

1 2

0_0402_5%

0_0402_5%

1 2

1 2

VGA_EN

32

PU701

PU701

EN

1

PWRGD

2

IMON

3

CLKEN

4

FBRTN

ADP3211MNR2G_QFN32_5X5

ADP3211MNR2G_QFN32_5X5

5

FB

6

COMP

7

GPU

8

ILIM

IREF9RPM10RT11RAMP12LLINE13CSREF14CSFB15CSCOMP

VGA_IREF

VGA_RPM

PR731

PR731

PR732

PR732

1 2

1 2

237K_0402_1%

237K_0402_1%

80.6K_0402_1%

80.6K_0402_1%

VGA_RAMP-1

12

+3VS

GPU_VID4

GPU_VID122GPU_VID222GPU_VID3

16,23,53,54

PR713 0_0402_5%PR 713 0_0402_5%

PR715 0_0402_5%PR 715 0_0402_5%

PR712 0_0402_5%PR 712 0_0402_5%

PR711 0_0402_5%PR 711 0_0402_5%

1 2

VID031VID130VID229VID328VID427VID526VID6

VGA_RT

1 2

301K_0402_1%

301K_0402_1%

PR716 0_0402_5%PR 716 0_0402_5%

PR714 0_0402_5%PR 714 0_0402_5%

1 2

1 2

1 2

1 2

VGA_CSFB

VGA_RAMP

12

PR733 422K_0402_1%PR733 422K_0402_1%

22

PR717 0_0402_5%PR 717 0_0402_5%

1 2

25

VCC

BST

DRVH

SW

PVCC

DRVL

PGND

AGND

AGND

16

VGA_CSCOMP

22

+5VS

1 2

VGA_VCC

24

VGA_BOOST

23

VGA_DRVH

22

VGA_SW

21

20

VGA_DRVL

19

18

17

33

12

PC721

PC721

1000P_0402_50V7K

1000P_0402_50V7K

PR718

PR718
10_0603_1%

10_0603_1%

12

PC710

PC710
1U_0603_10V6K

1U_0603_10V6K

1 2

PR720

PR720
0_0603_5%

0_0603_5%

0_0603_5%

0_0603_5%

PR724

PR724

0_0603_5%

0_0603_5%

12

PC722

PC722
560P_0402_50V7K

560P_0402_50V7K

0.22U_0603_25V7K

0.22U_0603_25V7K

VGA_BOOST-1

PR722

PR722

12

12

2.2U_0603_10V6K

2.2U_0603_10V6K

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

PC711

PC711

1 2

+5VS

PC713

PC713

12

PR734

PR734
220K_0402_1%

220K_0402_1%

12

4

4

PQ702

PQ702

PR735

PR735

80.6K_0603_1%

80.6K_0603_1%

+VGA_B+

12

12

12

12

12

12

12

PC707@

PC707@

PC708@

PC708@

PC709@

PC703

PC703

PC704

PC704

PC705

PC705

PC706

5

PQ701

PQ701

123

TPCA8065-H_SOP-ADV8-5

TPCA8065-H_SOP-ADV8-5

5

12

5

4

123

123

PQ703 TPCA8057-H_PPAK56-8-5PQ703 TPCA8057-H_PPAK56-8-5

10U_0805_25V6K

10U_0805_25V6K

0.36UH_PCMC104T-R36MN1R105_30A_20%

0.36UH_PCMC104T-R36MN1R105_30A_20%

1 2

12

PR725

4.7_1206_5%

4.7_1206_5%

@ PR725

@

12

PC720

@ PC720

@

680P_0603_50V8J

680P_0603_50V8J

10U_0805_25V6K

10U_0805_25V6K

PL702

PL702

PC706

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

1

+

+

2

PC709@

68P_0402_50V8J

68P_0402_50V8J

100P_0402_25V8K

100P_0402_25V8K

220P_0402_25V8K

220P_0402_25V8K

1

1

+

+

PC716

PC716

PC715

PC715

2

2

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y

PL701

PL701

FBMA-L11-453215800LMA90T_2P

FBMA-L11-453215800LMA90T_2P

+

+

PC717

PC717

330U_D2_2V_Y

330U_D2_2V_Y

Ipeak=59A
Imax=45.7A
F=300kHZ
Total capacitor
1460u
ESR=1.8m ohm

12

+VGA_CORE

B+

12

PC723

PC723

1000P_0402_50V7K

1000P_0402_50V7K

4 4

A

B

C

12

12

PR738

@ PR738

@

VGA_CSCOMP

1000P_0402_50V7K

1000P_0402_50V7K

1 2

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

D

PR737

PR737

PC724

PC724

PR931 PR932 LL

X

@ 0

V

0 @

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL
AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

E

2009/10/02 2010/10/02

2009/10/02 2010/10/02

2009/10/02 2010/10/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

F

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

G

Compal Electronics, Inc.

+VGA_COREP

+VGA_COREP

+VGA_COREP

LA-8712P

56 57Sunday, November 27, 2011

56 57Sunday, November 27, 2011

56 57Sunday, November 27, 2011

H

0.3

0.3

0.3

5

D D

4

3

2

1

+CPU_CORE

12

PC1001

PC1001
10U_080 5_6.3V6M

10U_080 5_6.3V6M

12

PC1002

PC1002
10U_080 5_6.3V6M

10U_080 5_6.3V6M

+CPU_CORE

12

PC1003

PC1003
10U_080 5_6.3V6M

10U_080 5_6.3V6M

12

PC1004

PC1004
10U_080 5_6.3V6M

10U_080 5_6.3V6M

12

PC1005

PC1005
10U_080 5_6.3V6M

10U_080 5_6.3V6M

+VGFX_CORE

+VGFX_CORE

Below is 458544_CRV_PDDG_0.5 Table 5-8.

5 x 22 µF (0805)

Socket Bottom

5 x (0805) no-stuff
sites

7 x 22 µF (0805)

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

12

PC1006

PC1006
10U_080 5_6.3V6M

C C

10U_080 5_6.3V6M

12

PC1007

PC1007
10U_080 5_6.3V6M

10U_080 5_6.3V6M

12

PC1008

PC1008
10U_080 5_6.3V6M

10U_080 5_6.3V6M

12

PC1009

PC1009
10U_080 5_6.3V6M

10U_080 5_6.3V6M

12

PC1010

PC1010
10U_080 5_6.3V6M

10U_080 5_6.3V6M

22U_0805_6.3V6M

PC1011

PC1011

PC1012

1

2

PC1012

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

PC1014

PC1014

PC1013

PC1013

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

PC1015

PC1015

PC1016

1

2

PC1016

1

2

22U_0805_6.3V6M

PC1017

PC1017

PC1018

1

2

PC1018

1

2

22U_0805_6.3V6M

Socket Top

22U_0805_6.3V6M

22U_0805_6.3V6M

2 x (0805) no-stuff
sites

+CPU_CORE

1

PC1019

PC1019
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1039

PC1039
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1052

PC1052
22U_080 5_6.3V6M

B B

22U_080 5_6.3V6M

2

1

PC1020

PC1020
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1040

PC1040
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1053

PC1053
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1021

PC1021
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1041

PC1041
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1054

PC1054
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1022

PC1022
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1042

PC1042
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1055

PC1055
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1023

PC1023
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1043

PC1043
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1056

PC1056
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC1057

PC1057
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

PC1024

PC1024

PC1025

1

2

330U_D2_2V_Y

330U_D2_2V_Y

1

+

+

2

PC1025

1

2

330U_D2_2V_Y

330U_D2_2V_Y

1

PC1044

PC1044

+

+

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

PC1027

PC1027

PC1026

PC1026

1

1

2

2

PC1046

PC1046

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

PC1028

PC1028

2

22U_0805_6.3V6M

1

1

PC1029

PC1029

2

2

+1.05VS

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

PC1030

PC1030

2

1

1

PC1031

PC1031

2

PC1033

PC1033

PC1032

PC1032

2

22U_0805_6.3V6M

1

1

PC1034

PC1034

PC1035

PC1035

2

2

PC1045

22U_0805_6.3V6M

PC1045

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

PC1036

PC1036

2

330U_D2_2V_Y

330U_D2_2V_Y

1

PC1049

PC1049

+

+

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

PC1037

PC1037

PC1038

PC1038

2

2

330U_D2_2V_Y

330U_D2_2V_Y

1

PC1050

PC1050

+

+

2

22U_0805_6.3V6M

+1.05VS

+CPU_CORE

1

+

+

PC1058

PC1058
330U_D2 _2V_Y

330U_D2 _2V_Y

2

A A

1

+

+

PC1059

PC1059
330U_D2 _2V_Y

330U_D2 _2V_Y

2

5

1

+

+

PC1060

PC1060
330U_D2 _2V_Y

330U_D2 _2V_Y

2

1

+

+

PC1061

PC1061
330U_D2 _2V_Y

330U_D2 _2V_Y

2

Security Class ification

Security Class ification

Security Class ification

2008/09/ 15 2012/12/ 31

2008/09/ 15 2012/12/ 31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/ 15 2012/12/ 31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Date: Sheet o f

Date: Sheet o f

2

Date: Sheet o f

Compal Electronics, Inc.

PWR - PROCESSOR DECOUPLING

PWR - PROCESSOR DECOUPLING

PWR - PROCESSOR DECOUPLING

LA8711P

LA8711P

LA8711P

57 57Sunday, November 27, 2 011

57 57Sunday, November 27, 2 011

57 57Sunday, November 27, 2 011

1

0.1

0.1

0.1