Biostar N68SC-M3S Schematics

TITLE
5
4
3
2
1
SHEET
COVER SHEET
BLOCK DIAGRAM
RESET&CLK MAP
D D
SPEC&CHANGE LIST
PROCESSOR AM3
DDR DIMMA1
DDR DIMMB1
NV CHIPSET(MCP68S)
LPC SUPER IO ITE8728
PCI EXPRESS X16
PCI 1
C C
FRONT PANEL & IDE
ATX POWER & FAN CONTROL
FLOOY & PS/2
VGA CONN
USB DEVICE
LPT & COM1
AUDIO CODEC VT1708B
AUDIO CONNECTOR
B B
RTL8201CL LAN CHIP
V_CPU PWM ISL6312
DDR CORE POWER
MCP68S CORE
POWER SEQUENCING
OVER VOLTAGE
1
2
3
4
5-9
10
11
12-18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
BIOSTAR GROUP
N68SC-M3S
VER:6.1
AM3 & MCP68S
BIOSTAR'S PROPRIETARY INFORMATION
Any unauthorized use, reproduction, duplication,
or disclosure of this document will be subject to the applicable civil and/or criminal penalties.
BOM 36
A A
Title
Title
Title
COVER SHEET
COVER SHEET
COVER SHEET
B
B
B
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
N68SC-M3S
N68SC-M3S
N68SC-M3S
1
1 36Monday, November 08, 2010
1 36Monday, November 08, 2010
1 36Monday, November 08, 2010
6.1
6.1
6.1
5
4
3
2
1
N68SC-M3S Block Diagram
D D
POWER SUPPLY
VREG
AM3 SOCKET
MEMORY DDR3
DDR DIMM(2)
CONN
HT 16X16 1GHZ
VGA
CONN
PEX X16 (1)
PCIE X16
NFORCE
C C
PRIMARY IDE
ATA 133
MCP68 (P/S/V)
PCI 33MHZ
RTL8201CL LAN
PCI SLOT (1)
692BGA
8MB FLASH
B B
SPI Port
LPC BUS 33MHZ
SIOFLOPPY CONN ITE8718
PS2/KBRD CONN
PARALLEL CONN
SERIAL CONN
AC97/HDA
AUDIO CODEC VT1708B
USB2.0 (X8)
BACK PANEL CONNUSB2 PORTS 1-0
DOUBLE STACK
USB2 PORTS 3-2 LAN RJ45
USB2 PORTS 5-4 FRONT PANEL HDR
USB2 PORTS 7-6
H/W MON
INTEGRATED SATA
A A
5
4
3
SATA CONN(X4)
Title
Title
Title
SYSTEM BLOCK
SYSTEM BLOCK
SYSTEM BLOCK
B
B
B
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
N68SC-M3S
N68SC-M3S
N68SC-M3S
1
2 36Monday, November 08, 2010
2 36Monday, November 08, 2010
2 36Monday, November 08, 2010
6.1
6.1
6.1
5
4
3
2
1
AM3 CPU
HT_CPU_TXCLK0
D D
HT_CPU_TXCLK0*
HT_CPU_RXCLK0 HT_CPU_RXCLK0*
HT_CPU_TXCLK1
HT_CPU_TXCLK1*
HT_CPU_RXCLK1 HT_CPU_RXCLK1*
CPUCLK_IN*
CPUCLK_IN
MEMO RY_A1_CLK [2:0]
MEMO RY_A1_CLK [2:0]*
MEMO RY_B1_CLK [2:0]
MEMO RY_B1_CLK [2:0]*
MEMO RY_A2_CLK [2:0]
MEMO RY_A2_CLK [2:0]*
MEMO RY_B2_CLK [2:0]
MEMO RY_B2_CLK [2:0]*
CHANNEL A1 0-63
CHANNEL B1 64-127
DIMM 0
DIMM 1
RESET MAP
PE_RESET*
PEX X16
MCP68S
AM3
CPU RST*
CPU PWRGD
HT_MCP_PWRGD
HT_MCP_RST*
ITE8718
C C
B B
32.0 KHZ
25 MHZ
A A
CLKOU T_200MHZ CLKOU T_200MHZ*
HT_CPU_RXCLK1*
HT_CPU_RXCLK1
HT_CPU_TXCLK1* HT_CPU_TXCLK1
HT_CPU_RXCLK0*
HT_CPU_RXCLK0
HT_CPU_TXCLK0* HT_CPU_TXCLK0
MCP68S
RTC_X TAL
XTAL_IN
XTAL_O UT
PE0_REFCLK
PE0_REFCLK*
PE1_REFCLK
PE1_REFCLK*
PE2_REFCLK
PE2_REFCLK*
XTAL_IN
XTAL_O UT
BUF_SIO
SUSCLK
LPC_C LK0
PCI_CLK0 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK_FB
LPC_C LK1
AC_97CLK
AC_BITCLK
BUF_25MH Z
PEX X16
27 MHZ (TV OUT ON LY)
14MHZ O R 24MHZ
32KHZ
33MHZ
33MHZ
33MHZ
AC97/AZALIA LINK
PWR SWTCH
PWR CONN
PS ON
PWR GOOD
CLOCK DISTRIBUTION
SIO
PCI SLOT1
FLASH
AC97 CODEC
LAN PHY
S-IO
PWR BUTTO N*
PS ON
PWRBT ON*
SLP_S3*
CIRCUIT
PWRBTN*
SLP_S3*
POWER_GOOD
PWRGD_SB
PWR BUTTON
SLP S3*
PWRGD
PWRGD_SB
GPIO_AUX*
LAN_PHY RESET*
HT MCP RST*
HT MCP PWRGD
PCI RST0*
PCI RST1*
PCI RST2*
PCI RST3*
LPC_R ST*PWRGD SB
AC_RESET*
AUDIO_PHY RESET*
HT_MCP_RST*
HT_MCP_PWRGD
PCIRST_SLOT1*
PCIRST_SLOT2*
PCIRST_SLOT3-4*
PCIRST_IDE*
LPCR ST_FLASH*
LPCRST_SIO*
PRI IDE PCI SLOT1
SIO FLASH
Title
Title
Title
RESET&CLOCK MAP
RESET&CLOCK MAP
RESET&CLOCK MAP
B
B
B
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
N68SC-M3S
N68SC-M3S
N68SC-M3S
1
3 36Monday, November 08, 2010
3 36Monday, November 08, 2010
3 36Monday, November 08, 2010
6.1
6.1
6.1
5
4
3
2
1
CPU VID TABLE
D D
C C
VID [4..0]
0X00000
0X00010
0X00011
0X00100
0X00101
0X00110
0X00111
0X01000
0X01001
0X01010 1.300V
0X01011
0X01100
0X01101
0X01110
0X01111
VDD
1.550V
1.525V
1.500V
1.475V
1.450V
1.425V
1.400V
1.375V
1.350V
1.325V
1.275V
1.250V
1.225V
1.200V
1.175V
VID [4..0]
0X10000
0X10001
0X10010
0X10011
0X10100
0X10101
0X10110
0X10111
0X11000
0X11001
0X11010
0X11011
0X11100
0X11110
0X11111
VDD
1.150V
1.125V0X00001
1.100V
1.075V
1.050V
1.025V
1.000V
0.975V
0.950V
0.925V
0.900V
0.875V
0.850V
0.825V0X11101
0.800V
OFF
SMBUS ADDRESS MAP
DEVICE
SLOT
DIMM 0
DIMM 1
DIMM 2
DIMM 3
B B
A A
SIO
PCI SLOT 1 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
22U/25DE 5*7 mm
100U/16DE
220U/10DE
470U/16DE
1000U/10DE
1500U/16DE
3300U/25DE
SMBUS # ADDRESS
0
0
0
1
1
1
1
ADDC BUS
BDDC BUS
6.3*11 mm
6.3*11 mm
8*11 mm
8*14 mm
10*25 mm
10*25 mm
5
1010 000 = 0X500
1010 001 = 0X51
1010 010 = 0X52
1010 011 = 0X53
0101 101 = 0X2D
ARP
ARP
ARP
ARP
?
?
PCI INTERRUPT/IDSEL MAP
BACK PANEL
SLOT
1
2
3
4
5
PCI BUS#
01
01
01
01
01
016
DEVICE#
0X05
0X06
0X07
0X08
0X09
0X0A
IDSEL PIN
22
24
PCI DEVICE MAP
DEVICE
MCP61P
MAC /MAC
PCI-PC I BRIDGE
SATA1
SATA0
IDE
MODEM CODEC
AUDIO CODEC
USB 2.0
USB 1.1
SHAPE TRIM
LDT
SMBUS2
LEGACY SLAVE
LPC
LOGICAL P CI BUS
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
PCI SLOT 5
PCI BUS# FUNC TION
MCP61 LOGICAL
PCI BU S 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
4
0X01-0X0F
XA
X9
X8
X8
X6
X4
X4
X2
X2
X1
X0
X1
?
X1
?
IDSEL PIN
- -
0
0
0
0
0
1
0
1
0
2
0
1
?
0
?
PCI SLOT
INTA*
P_INTY*
P_INTW*
DEVICE ID
- -
0X56/57
0X005C
0X0055
0X0054
0X0053
0X0058
0X0059
0X005B
0X005A
0X005F
0X005E
0X0052
0X00D3
0X0050/51
?
PCI SLOT
INTB*
P_INTZ*
P_INTX*
PCI SLOT
INTC*
P_INTW*
P_INTY*
G
TO-263
PHB55N03 90N02
PCI SLOT
INTD*
P_INTX*
P_INTZ*
D
3
REQ/GNT
1/1
2/2
D
G
S
TO-252
20N03 TM3055TL-S PHD55N03
O
O
A
SOT-223
AMS1117
I
A
R E
C
SOT-23
G
SOT-23
2N7002 SI2303S SI2301S
2
D
C
B
S
SOT-23
2N3904 2N3906 MMBT2907A 2N2222A
Title
Title
Title
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
KA
O
I
G
E
A
BAT54CKLM431 2N2222ALM431
TO-92SOT-23
BAT54S 78L05-DS2N2097A
SPEC&CHANGE LIST
SPEC&CHANGE LIST
SPEC&CHANGE LIST
LM432
TO-92
N68SC-M3S
N68SC-M3S
N68SC-M3S
B
C
1
B
E C
TO-92
HSD882-D
4 36Monday, November 08, 2010
4 36Monday, November 08, 2010
4 36Monday, November 08, 2010
6.1
6.1
6.1
5
D D
4
3
2
1
+1.2V_HT
HTCPU_UPCLK112
R47
R47
49.9 1% 0402
49.9 1% 0402
R46
R46
49.9 1% 0402
49.9 1% 0402
C C
B B
HTCPU_UPCLK1_12
HTCPU_UPCLK012
HTCPU_UPCLK0_12
HTCPU_UPCNTL_12
HTCPU_UP[15..0]12
HTCPU_UP_[15. .0]12 HTCPU_DWN_[15..0] 12
HTCPU_UPCLK1 HTCPU_UPCLK1_ HTCPU_UPCLK0 HTCPU_UPCLK0_
HTCPU_UPCNTL HTCPU_UPCNTL_
HTCPU_UP15 HTCPU_UP_15 HTCPU_UP14 HTCPU_UP_14 HTCPU_UP13 HTCPU_UP_13 HTCPU_UP12 HTCPU_UP_12
HTCPU_UP11 HTCPU_UP_11
HTCPU_UP10 HTCPU_UP_10
HTCPU_UP9 HTCPU_UP_9 HTCPU_UP8 HTCPU_UP_8
HTCPU_UP7 HTCPU_UP_7
HTCPU_UP6 HTCPU_UP_6
HTCPU_UP5 HTCPU_UP_5
HTCPU_UP4 HTCPU_UP_4 HTCPU_UP3
HTCPU_UP_3 HTCPU_UP2
HTCPU_UP_2 HTCPU_UP1 HTCPU_UP_1 HTCPU_UP0 HTCPU_UP_0
HTCPU_UP[15..0] HTCPU_UP_[15. .0]
CPU1A
CPU1A
N6
L0_CLKIN_H1
P6
L0_CLKIN_L1
N3
L0_CLKIN_H0
N2
L0_CLKIN_L0
V4
L0_CTLIN_H1
V5
L0_CTLIN_L1
U1
L0_CTLIN_H0
V1
L0_CTLIN_L0
U6
L0_CADIN_H15
V6
L0_CADIN_L15
T4
L0_CADIN_H14
T5
L0_CADIN_L14
R6
L0_CADIN_H13
T6
L0_CADIN_L13
P4
L0_CADIN_H12
P5
L0_CADIN_L12
M4
L0_CADIN_H11
M5
L0_CADIN_L11
L6
L0_CADIN_H10
M6
L0_CADIN_L10
K4
L0_CADIN_H9
K5
L0_CADIN_L9
J6
L0_CADIN_H8
K6
L0_CADIN_L8
U3
L0_CADIN_H7
U2
L0_CADIN_L7
R1
L0_CADIN_H6
T1
L0_CADIN_L6
R3
L0_CADIN_H5
R2
L0_CADIN_L5
N1
L0_CADIN_H4
P1
L0_CADIN_L4
L1
L0_CADIN_H3
M1
L0_CADIN_L3
L3
L0_CADIN_H2
L2
L0_CADIN_L2
J1
L0_CADIN_H1
K1
L0_CADIN_L1
J3
L0_CADIN_H0
J2
L0_CADIN_L0
SOCKET AM3 941 SMD
SOCKET AM3 941 SMD
L0_CLKOUT_H1 L0_CLKOUT_L1 L0_CLKOUT_H0 L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10
L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8
L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5
HT LINK
HT LINK
L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0
HTCPU_DWN[15..0] HTCPU_DWN_[15..0]
HTCPU_DWNCLK1
AD5
HTCPU_DWNCLK1_
AD4
HTCPU_DWNCLK0
AD1
HTCPU_DWNCLK0_
AC1 Y6
W6
HTCPU_DWNCNTL
W2
HTCPU_DWNCNTL_
W3
HTCPU_DWN15
Y5
HTCPU_DWN_15
Y4
HTCPU_DWN14
AB6
HTCPU_DWN_14
AA6
HTCPU_DWN13
AB5
HTCPU_DWN_13
AB4
HTCPU_DWN12
AD6
HTCPU_DWN_12
AC6
HTCPU_DWN11
AF6
HTCPU_DWN_11
AE6
HTCPU_DWN10
AF5
HTCPU_DWN_10
AF4
HTCPU_DWN9
AH6
HTCPU_DWN_9
AG6
HTCPU_DWN8
AH5
HTCPU_DWN_8
AH4
HTCPU_DWN7
HTCPU_DWN_7
Y1 W1
HTCPU_DWN6
AA2
HTCPU_DWN_6
AA3
HTCPU_DWN5
AB1
HTCPU_DWN_5
AA1
HTCPU_DWN4
AC2
HTCPU_DWN_4
AC3
HTCPU_DWN3
AE2
HTCPU_DWN_3
AE3
HTCPU_DWN2
AF1
HTCPU_DWN_2
AE1
HTCPU_DWN1
AG2
HTCPU_DWN_1
AG3
HTCPU_DWN0
AH1
HTCPU_DWN_0
AG1
HTCPU_DWNCLK1 12 HTCPU_DWNCLK1_ 12 HTCPU_DWNCLK0 12
TTTPPP555 TTTPPP666
HTCPU_DWN[15..0] 12
HTCPU_DWNCLK0_ 12
HTCPU_DWNCNTL 12HTCPU_UPCNTL12 HTCPU_DWNCNTL_ 12
A A
Title
Title
Title
M2 HT/DDR 0-63
M2 HT/DDR 0-63
M2 HT/DDR 0-63
B
B
B
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
N68SC-M3S
N68SC-M3S
N68SC-M3S
1
5 36Tuesday, November 09, 2010
5 36Tuesday, November 09, 2010
5 36Tuesday, November 09, 2010
6.1
6.1
6.1
5
CPU1B
CPU1B
AG21
MA_CLK_H7
AG20
MA_CLK_L7
AE20
MA_CLK_H6
D D
MEM_MA0_CLK_H010
MEM_MA0_CLK_L010
MEM_MA0_CLK_H110
MEM_MA0_CLK_L110
MEM_MA0_CS_L110 MEM_MA0_CS_L010
MEM_MA0_ODT110 MEM_MA0_ODT010
C C
B B
A A
MEM_MA_RESET_L10
MEM_MA_CAS_L10
MEM_MA_WE_L10
MEM_MA_RAS_L10 MEM_MA_BANK210
MEM_MA_BANK110 MEM_MA_BANK010
MEM_MA_CKE110 MEM_MA_CKE010
MEM_MA_ADD[15..0]10
MEM_MA_DQS_H[8..0]10
MEM_MA_DQS_L[8..0]10
MEM_MA_DM[8..0]10
MEM_MA_ADD[15..0] MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0
MEM_MA_DQS_H[8..0] MEM_MA_DQS_H7 MEM_MA_DQS_L7 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H0 MEM_MA_DQS_L0
MEM_MA_DQS_L[8..0] MEM_MA_DM7 MEM_MA_DM6 MEM_MA_DM5 MEM_MA_DM4 MEM_MA_DM3 MEM_MA_DM2 MEM_MA_DM1 MEM_MA_DM0 MEM_MA_DM[8..0]
AE19
MA_CLK_L6
U27
MA_CLK_H5
U26
MA_CLK_L5
V27
MA_CLK_H4
W27
MA_CLK_L4
W26
MA_CLK_H3
W25
MA_CLK_L3
U24
MA_CLK_H2
V24
MA_CLK_L2
G19
MA_CLK_H1
H19
MA_CLK_L1
G20
MA_CLK_H0
G21
MA_CLK_L0
AC25
MA0_CS_L1
AA24
MA0_CS_L0
AE28
MA0_ODT1
AC28
MA0_ODT0
AD27
MA1_CS_L1
AA25
MA1_CS_L0
AE27
MA1_ODT1
AC27
MA1_ODT0
E20
MA_RESET_L
AB25
MA_CAS_L
AB27
MA_WE_L
AA26
MA_RAS_L
N25
MA_BANK2
Y27
MA_BANK1
AA27
MA_BANK0
L27
MA_CKE1
M25
MA_CKE0
M27
MA_ADD15
N24
MA_ADD14
AC26
MA_ADD13
N26
MA_ADD12
P25
MA_ADD11
Y25
MA_ADD10
N27
MA_ADD9
R24
MA_ADD8
P27
MA_ADD7
R25
MA_ADD6
R26
MA_ADD5
R27
MA_ADD4
T25
MA_ADD3
U25
MA_ADD2
T27
MA_ADD1
W24
MA_ADD0
AD15
MA_DQS_H7
AE15
MA_DQS_L7
AG18
MA_DQS_H6
AG19
MA_DQS_L6
AG24
MA_DQS_H5
AG25
MA_DQS_L5
AG27
MA_DQS_H4
AG28
MA_DQS_L4
D29
MA_DQS_H3
C29
MA_DQS_L3
C25
MA_DQS_H2
D25
MA_DQS_L2
E19
MA_DQS_H1
F19
MA_DQS_L1
F15
MA_DQS_H0
G15
MA_DQS_L0
AF15
MA_DM7
AF19
MA_DM6
AJ25
MA_DM5
AH29
MA_DM4
B29
MA_DM3
E24
MA_DM2
E18
MA_DM1
H15
MA_DM0
SOCKET AM3 941 SMD
SOCKET AM3 941 SMD
MEM CHA
MEM CHA
MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10
MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0
MA_DQS_H8
MA_DQS_L8
MA_DM8
MA_CHECK7 MA_CHECK6 MA_CHECK5 MA_CHECK4 MA_CHECK3 MA_CHECK2 MA_CHECK1 MA_CHECK0
MA_EVENT_L
4
MEM_MA_DATA[0..63] MEM_MA_DATA63
AE14
MEM_MA_DATA62
AG14
MEM_MA_DATA61
AG16
MEM_MA_DATA60
AD17
MEM_MA_DATA59
AD13
MEM_MA_DATA58
AE13
MEM_MA_DATA57
AG15
MEM_MA_DATA56
AE16
MEM_MA_DATA55
AG17
MEM_MA_DATA54
AE18
MEM_MA_DATA53
AD21
MEM_MA_DATA52
AG22
MEM_MA_DATA51
AE17
MEM_MA_DATA50
AF17
MEM_MA_DATA49
AF21
MEM_MA_DATA48
AE21
MEM_MA_DATA47
AF23
MEM_MA_DATA46
AE23
MEM_MA_DATA45
AJ26
MEM_MA_DATA44
AG26
MEM_MA_DATA43
AE22
MEM_MA_DATA42
AG23
MEM_MA_DATA41
AH25
MEM_MA_DATA40
AF25
MEM_MA_DATA39
AJ28
MEM_MA_DATA38
AJ29
MEM_MA_DATA37
AF29
MEM_MA_DATA36
AE26
MEM_MA_DATA35
AJ27
MEM_MA_DATA34
AH27
MEM_MA_DATA33
AG29
MEM_MA_DATA32
AF27
MEM_MA_DATA31
E29
MEM_MA_DATA30
E28
MEM_MA_DATA29
D27
MEM_MA_DATA28
C27
MEM_MA_DATA27
G26
MEM_MA_DATA26
F27
MEM_MA_DATA25
C28
MEM_MA_DATA24
E27
MEM_MA_DATA23
F25
MEM_MA_DATA22
E25
MEM_MA_DATA21
E23
MEM_MA_DATA20
D23
MEM_MA_DATA19
E26
MEM_MA_DATA18
C26
MEM_MA_DATA17
G23
MEM_MA_DATA16
F23
MEM_MA_DATA15
E22
MEM_MA_DATA14
E21
MEM_MA_DATA13
F17
MEM_MA_DATA12
G17
MEM_MA_DATA11
G22
MEM_MA_DATA10
F21
MEM_MA_DATA9
G18
MEM_MA_DATA8
E17
MEM_MA_DATA7
G16
MEM_MA_DATA6
E15
MEM_MA_DATA5
G13
MEM_MA_DATA4
H13
MEM_MA_DATA3
H17
MEM_MA_DATA2
E16
MEM_MA_DATA1
E14
MEM_MA_DATA0
G14
MEM_MA_DQS_H8
J28
MEM_MA_DQS_L8
J27
MEM_MA_DM8
J25
MEM_MA_CHECK[7..0]
MEM_MA_CHECK7
K25
MEM_MA_CHECK6
J26
MEM_MA_CHECK5
G28
MEM_MA_CHECK4
G27
MEM_MA_CHECK3
L24
MEM_MA_CHECK2
K27
MEM_MA_CHECK1
H29
MEM_MA_CHECK0
H27 W30
R321
R321 301 1% 0402
301 1% 0402
MEM_MA_DATA[0..63] 10
MEM_MA_CHECK[7..0] 10
MEM_MA_EVENT_L 10
3
CPU1C
CPU1C
AJ19 AK19 AL19 AL18
U31 U30
MEM_MB0_CLK_H011
MEM_MB0_CLK_L011
MEM_MB0_CLK_H111
MEM_MB0_CLK_L111
MEM_MB0_CS_L111 MEM_MB0_CS_L011
MEM_MB0_ODT111 MEM_MB0_ODT011
MEM_MB_RESET_L11
MEM_MB_CAS_L11
MEM_MB_WE_L11
MEM_MB_RAS_L11 MEM_MB_BANK211
MEM_MB_BANK111 MEM_MB_BANK011
MEM_MB_CKE111 MEM_MB_CKE011
MEM_MB_ADD[15..0]11
MEM_MB_DQS_H[8..0]11
MEM_MB_DQS_L[8..0]11
MEM_MB_DM[8..0]11
MEM_MB_ADD[15..0] MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0
MEM_MB_DQS_H[8..0] MEM_MB_DQS_H7 MEM_MB_DQS_L7 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H0 MEM_MB_DQS_L0
MEM_MB_DQS_L[8..0] MEM_MB_DM7 MEM_MB_DM6 MEM_MB_DM5 MEM_MB_DM4 MEM_MB_DM3 MEM_MB_DM2 MEM_MB_DM1 MEM_MB_DM0 MEM_MB_DM[8..0]
W29 W28
Y31 Y30 V31
W31
A18 A19 C19 D19
AE30 AC31
AF31 AD29
AE29 AB31
AG31 AD31
B19
AC29 AC30 AB29
N31 AA31 AA28
M31 M29
N28
N29 AE31
N30
P29 AA29
P31
R29
R28
R31
R30
T31
T29
U29
U28 AA30
AK13
AJ13
AK17
AJ17 AK23 AL23 AL28 AL29
D31 C31 C24 C23 D17 C17 C14 C13
AJ14 AH17
AJ23 AK29
C30 A23 B17 B13
SOCKET AM3 941 SMD
SOCKET AM3 941 SMD
MB_CLK_H7 MB_CLK_L7 MB_CLK_H6 MB_CLK_L6 MB_CLK_H5 MB_CLK_L5 MB_CLK_H4 MB_CLK_L4 MB_CLK_H3 MB_CLK_L3 MB_CLK_H2 MB_CLK_L2 MB_CLK_H1 MB_CLK_L1 MB_CLK_H0 MB_CLK_L0
MB0_CS_L1 MB0_CS_L0
MB0_ODT1 MB0_ODT0
MB1_CS_L1 MB1_CS_L0
MB1_ODT1 MB1_ODT0
MB_RESET_L MB_CAS_L
MB_WE_L MB_RAS_L
MB_BANK2 MB_BANK1 MB_BANK0
MB_CKE1 MB_CKE0
MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10 MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0
MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0
MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0
2
MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12
MEM CHB
MEM CHB
MB_DATA11 MB_DATA10
MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0
MB_DQS_H8
MB_DQS_L8
MB_DM8
MB_CHECK7 MB_CHECK6 MB_CHECK5 MB_CHECK4 MB_CHECK3 MB_CHECK2 MB_CHECK1 MB_CHECK0
MB_EVENT_L
AH13 AL13 AL15 AJ15 AF13 AG13 AL14 AK15 AL16 AL17 AK21 AL21 AH15 AJ16 AH19 AL20 AJ22 AL22 AL24 AK25 AJ21 AH21 AH23 AJ24 AL27 AK27 AH31 AG30 AL25 AL26 AJ30 AJ31 E31 E30 B27 A27 F29 F31 A29 A28 A25 A24 C22 D21 A26 B25 B23 A22 B21 A20 C16 D15 C21 A21 A17 A16 B15 A14 E13 F13 C15 A15 A13 D13
J31 J30
J29 K29
K31 G30 G29 L29 L28 H31 G31
V29
MEM_MB_DATA[0..63] MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48 MEM_MB_DATA47 MEM_MB_DATA46 MEM_MB_DATA45 MEM_MB_DATA44 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA31 MEM_MB_DATA30 MEM_MB_DATA29 MEM_MB_DATA28 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MB_DATA25 MEM_MB_DATA24 MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA21 MEM_MB_DATA20 MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10 MEM_MB_DATA9 MEM_MB_DATA8 MEM_MB_DATA7 MEM_MB_DATA6 MEM_MB_DATA5 MEM_MB_DATA4 MEM_MB_DATA3 MEM_MB_DATA2 MEM_MB_DATA1 MEM_MB_DATA0
MEM_MB_DQS_H8 MEM_MB_DQS_L8
MEM_MB_DM8 MEM_MB_CHECK[7..0]
MEM_MB_CHECK7 MEM_MB_CHECK6 MEM_MB_CHECK5 MEM_MB_CHECK4 MEM_MB_CHECK3 MEM_MB_CHECK2 MEM_MB_CHECK1 MEM_MB_CHECK0
R322
R322 301 1% 0402
301 1% 0402
1
MEM_MB_DATA[0..63] 11
MEM_MB_CHECK[7..0] 11
MEM_MB_EVENT_L 11
+1.5V_SUS+1.5V_SUS
Title
Title
Title
M2 DDR 64-127
M2 DDR 64-127
M2 DDR 64-127
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
N68SC-M3S
N68SC-M3S
N68SC-M3S
1
6 36Tuesday, November 09, 2010
6 36Tuesday, November 09, 2010
6 36Tuesday, November 09, 2010
6.1
6.1
6.1
5
4
3
2
1
D D
+5V
C C
OIA
Q6
Q6 AZ1117H-ADJ SOT-223
AZ1117H-ADJ SOT-223
CPU_VDDA
C22
C22 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
R8
R8
49.9 1% 0402
49.9 1% 0402
R7
R7 51 1% 0402
51 1% 0402
CPU_VDDA
C134
C134 10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI
C25
C25 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
Vout=Vref (1.25V) X ( 1+R4/R 3 )=2.5V
+1.5V_SUS
RN14
RN14 330 8P4R 0402
330 8P4R 0402
1 2
3 4
5 6
7 8
HTCPU_RST_12
B B
HTCPU_PWRGD12 HTCPU_STOP_12
HTCPU_RST_
HTCPU_PWRGD
HTCPU_STOP_
+1.5V_SUS
R34
R34 150 1% 0402
150 1% 0402
R51 150 1% 0402
150 1% 0402
CPU_VDDA
C17
C17
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
CPU_CLK12
CPU_CLK_12
C27
C27 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
CPU_M_VREFF
C26
C26R51
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
THERM_SIC17 THERM_SID17
+1.5V_SUS
+1.5V_SUS
C16
C16 1000P 50V X7R 0402
1000P 50V X7R 0402
3900P 50V X7R 0402C24 3900P 50V X7R 0402C24
3900P 50V X7R 0402C23 3900P 50V X7R 0402C23
RN56
RN56 1K 8P4R 0402
1K 8P4R 0402
THERM_SIC
12
THERM_SID
34
ALERT_ CPU_THERMTRIP_
56 78
CPU_TDI22
CPU_TCK22 CPU_TMS22
+1.5V_SUS
CPU_CORE_FB31 CPU_CORE_FB_31
LESS THAN 1000mil 5/10 M_ZN,M_ZP
R44 39.2 1% 0402R44 39.2 1% 0402 R45 39.2 1% 0402R45 39.2 1% 0402
R32 510 0402R32 510 0402 R33 510 0402R33 510 0402
R35
R35 169 1% 0402
169 1% 0402
TRST_L TP /NITRST_L TP /NI
R54 300 0402R54 300 0402
CPU_CORE_FB CPU_CORE_FB_
ROUTE AS DIFF PAIR 10/5/5/5/10
CPU_TEST25_H_BYPASSCLK_N CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1
CPU_TEST12
CPU_VDDA
HTCPU_PWRGD HTCPU_STOP_ HTCPU_RST_
CPU_PRESENT#
ALERT_ PROCHOT
CPU_M_VREFF
CPU1D
CPU1D
C10
VDDA_1
D10
VDDA_2
A8
CLKIN_H
B8
CLKIN_L
C9
PWROK
D8
LDTSTOP_L
C7
RESET_L
AL3
CPU_PRESENT_L
AL6
SIC
AK6
SID
AK4
SA0
AL4
ALERT_L
AL10
TDI
AJ10
TRST_L
AH10
TCK
AL9
TMS
A5
DBREQ_L
G2
VDD_FB_H
G1
VDD_FB_L
F3
M_VDDIO_PWRGD
E12
VDDR_SENSE
F12
M_VREF
AH11
M_ZN
AJ11
M_ZP
A10
TEST25_H
B10
TEST25_L
F10
TEST19
E9
TEST18
AJ7
TEST13
F6
TEST9
D6
TEST17
E7
TEST16
F8
TEST15
C5
TEST14
AH9
TEST12
E5
TEST7
AJ5
TEST6
AH7
TEST3
AJ6
TEST2
C18
RSVD1
C20
RSVD2
F2
RSVD3
G24
RSVD4
G25
RSVD5
H25
RSVD6
L25
RSVD7
L26
RSVD8
SOCKET AM3 941 SMD
SOCKET AM3 941 SMD
MISC.
MISC.
THERMTRIP_L
VDDNB_FB_H
INT. MISC.
INT. MISC.
CORE_TYPE
VID5
VID4 SVC/VID3 SVD/VID2
PVIEN/VID1
VID0
THERMDC THERMDA
PROCHOT_L
TDO
DBRDY
VDDIO_FB_H VDDIO_FB_L
VDDNB_FB_L
PSI_L
HTREF1 HTREF0
TEST29_H
TEST29_L
TEST24 TEST23 TEST22 TEST21 TEST20
TEST28_H
TEST28_L
TEST27 TEST26 TEST10
TEST8
RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16
G5
VID5
D2
VID4
D1
VID3
C1
VID2
E3
VID1
E2
VID0
E1 AG9
AG8 AK7 AL7
AK10
B6 AK11
AL11 G4 G3
F1 V8
V7
FBCLKOUT
C11
FBCLKOUT_
D11
CPU_TEST24
AK8
CPU_TEST23
AH8
CPU_TEST22_SCANEN
AJ9
CPU_TEST21_SCANEN
AL8
R373 330 0402R373 330 0402
AJ8 J10
H9 AK9 AK5 G7 D4
L30 L31 AD25 AE24 AE25 AJ18 AJ20 AK3
+1.5V_SUS
RN4
RN4 1K 8P4R 0402
1K 8P4R 0402
1 2
3 4
5 6
7 8
DBRDYDBRDY
R50 44.2 1% 0402R50 44.2 1% 0402 R52 44.2 1% 0402R52 44.2 1% 0402
R37 80.6 1% 0402R37 80.6 1% 0402
CPU_TEST27 CPU_TEST26
K8_VID5 31 K8_VID4 31 K8_VID3 31 K8_VID2 31 K8_VID1 31 K8_VID0 31
CPU_THERMDC 19 CPU_THERMDA 19 CPU_THERMTRIP_ 12 PROCHOT 12
CPU_TDO 22
+1.2V_HT
CPU_TEST27 PROCHOT CPU_THERMTRIP_ CPU_TEST26
CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1 CPU_TEST21_SCANEN
CPU_TEST24 CPU_TEST23 CPU_TEST12 CPU_TEST22_SCANEN
RN3
RN3 330 8P4R 0402
330 8P4R 0402 1 2 3 4 5 6 7 8
R55 330 0402R55 330 0402 R57 330 0402R57 330 0402
R344 330 0402R344 330 0402 RN55 330 8P4R 0402RN55 330 8P4R 0402
1 2 3 4 7 8 5 6
+1.5V_SUS
A A
Title
Title
Title
M2 CNTL/STRAPS
M2 CNTL/STRAPS
M2 CNTL/STRAPS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
N68SC-M3S
N68SC-M3S
N68SC-M3S
1
7 36Tuesday, November 09, 2010
7 36Tuesday, November 09, 2010
7 36Tuesday, November 09, 2010
6.1
6.1
6.1
5
4
3
2
1
CPU1E
CPU1E
B3
VDD_1
D D
C C
B B
A A
C2
VDD_2
C4
VDD_3
D3
VDD_4
D5
VDD_5
E4
VDD_6
E6
VDD_7
F5
VDD_8
F7
VDD_9
G6
VDD_10
G8
VDD_11
H7
VDD_12
H11
VDD_13
H23
VDD_14
J8
VDD_15
J12
VDD_16
J14
VDD_17
J16
VDD_18
J18
VDD_19
J20
VDD_20
J22
VDD_21
J24
VDD_22
K7
VDD_23
K9
VDD_24
K11
VDD_25
K13
VDD_26
K15
VDD_27
K17
VDD_28
K19
VDD_29
K21
VDD_30
K23
VDD_31
L4
VDD_32
L5
VDD_33
L8
VDD_34
L10
VDD_35
L12
VDD_36
L14
VDD_37
L16
VDD_38
L18
VDD_39
L20
VDD_40
L22
VDD_41
M2
VDD_42
M3
VDD_43
M7
VDD_44
M9
VDD_45
M11
VDD_46
M13
VDD_47
M15
VDD_48
M17
VDD_49
M19
VDD_50
M21
VDD_51
M23
VDD_52
N8
VDD_53
N10
VDD_54
N12
VDD_55
N14
VDD_56
N16
VDD_57
N18
VDD_58
N20
VDD_59
N22
VDD_60
P7
VDD_61
P9
VDD_62
P11
VDD_63
P13
VDD_64
P15
VDD_65
P17
VDD_66
P19
VDD_67
P21
VDD_68
P23
VDD_69
R4
VDD_70
R5
VDD_71
R8
VDD_72
R10
VDD_73
R12
VDD_74
R14
VDD_75
R16
VDD_76
R18
VDD_77
R20
VDD_78
R22
VDD_79
T2
VDD_80
T3
VDD_81
T7
VDD_82
T9
VDD_83
T11
VDD_84
T13
VDD_85
SOCKET AM3 941 SMD
SOCKET AM3 941 SMD
POWER/GND1
POWER/GND1
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85
A3 A7 A9 A11 B4 B9 B11 B14 B16 B18 B20 B22 B24 B26 B28 B30 C3 D14 D16 D18 D20 D22 D24 D26 D28 D30 E11 F4 F14 F16 F18 F20 F22 F24 F26 F28 F30 G9 G11 H8 H10 H12 H14 H16 H18 H24 H26 H28 H30 J4 J5 J7 J9 J11 J13 J15 J17 J19 J21 J23 K2 K3 K8 K10 K12 K14 K16 K18 K20 K22 K24 K26 K28 K30 L7 L9 L11 L13 L15 L17 L19 L21 L23 M8 M10
+V_CPU+V_CPU
CPU1F
CPU1F
T15
VDD_86
T17
VDD_87
T19
VDD_88
T21
VDD_89
T23
VDD_90
U8
VDD_91
U10
VDD_92
U12
VDD_93
U14
VDD_94
U16
VDD_95
U18
VDD_96
U20
VDD_97
U22
VDD_98
V9
VDD_99
V11
VDD_100
V13
VDD_101
V15
VDD_102
V17
VDD_103
V19
VDD_104
V21
VDD_105
V23
VDD_106
W4
VDD_107
W5
VDD_108
W8
VDD_109
W10
VDD_110
W12
VDD_111
W14
VDD_112
W16
VDD_113
W18
VDD_114
W20
VDD_115
W22
VDD_116
Y2
VDD_117
Y3
VDD_118
Y7
VDD_119
Y9
VDD_120
Y11
VDD_121
Y13
VDD_122
Y15
VDD_123
Y17
VDD_124
Y19
VDD_125
Y21
VDD_126
Y23
VDD_127
AA8
VDD_128
AA10
VDD_129
AA12
VDD_130
AA14
VDD_131
AA16
VDD_132
AA18
VDD_133
AA20
VDD_134
AA22
VDD_135
AB7
VDD_136
AB9
VDD_137
AB11
VDD_138
AB13
VDD_139
AB15
VDD_140
AB17
VDD_141
AB19
VDD_142
AB21
VDD_143
AB23
VDD_144
AC4
VDD_145
AC5
VDD_146
AC8
VDD_147
AC10
VDD_148
AC12
VDD_149
AC14
VDD_150
AC16
VDD_151
AC18
VDD_152
AC20
VDD_153
AC22
VDD_154
AD2
VDD_155
AD3
VDD_156
AD7
VDD_157
AD9
VDD_158
AD11
VDD_159
AD23
VDD_160
AE10
VDD_161
AE12
VDD_162
AF7
VDD_163
AF9
VDD_164
AF11
VDD_165
AG4
VDD_166
AG5
VDD_167
AG7
VDD_168
AH2
VDD_169
AH3
VDD_170
SOCKET AM3 941 SMD
SOCKET AM3 941 SMD
POWER/GND2
POWER/GND2
VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98
VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170
M12 M14 M16 M18 M20 M22 N4 N5 N7 N9 N11 N13 N15 N17 N19 N21 N23 P2 P3 P8 P10 P12 P14 P16 P18 P20 P22 R7 R9 R11 R13 R15 R17 R19 R21 R23 T8 T10 T12 T14 T16 T18 T20 T22 U4 U5 U7 U9 U11 U13 U15 U17 U19 U21 U23 V2 V3 V10 V12 V14 V16 V18 V20 V22 W7 W9 W11 W13 W15 W17 W19 W21 W23 Y8 Y10 Y12 Y14 Y16 Y18 Y20 Y22 AA4 AA5 AA7 AA9
+V_CPU
CPU1G
CPU1G
A4
VDDNB_1
A6
VDDNB_2
B5
VDDNB_3
B7
VDDNB_4
C6
VDDNB_5
C8
VDDNB_6
D7
VDDNB_7
D9
VDDNB_8
E8
VDDNB_9
E10
VDDNB_10
F9
VDDNB_11
F11
VDDNB_12
G10
VDDNB_13
G12
VDDNB_14
POWER/GND3
B2
NP/RSVD
H20
NP/VSS1
AE7
NP/VSS2
SOCKET AM3 941 SMD
SOCKET AM3 941 SMD
+1.2V_HT
C525
C525 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
+1.2V_HT
C526 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V 0.1UF 16V Y5V 0402
POWER/GND3
C31
C31 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
C33
C33 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214
C53
C53
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
AA11 AA13 AA15 AA17 AA19 AA21 AA23 AB2 AB3 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC7 AC9 AC11 AC13 AC15 AC17 AC19 AC21 AC23 AD8 AD10 AD12 AD14 AD16 AD20 AD22 AD24 AE4 AE5 AE11 AF2 AF3 AF8 AF10 AF12 AF14 AF16
C56
C56
0.1UF 16V Y5V 0402
+1.2V_HT
+1.5V_SUS
+1.2V_HT_CPU
C61
C61C526
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
+1.2V_HT
AJ1 AJ2 AJ3 AJ4
A12
B12 C12 D12
M24 M26 M28 M30 P24 P26 P28 P30 T24 T26 T28 T30 V25 V26 V28 V30 Y24 Y26 Y28 Y29
AB24 AB26 AB28 AB30 AC24 AD26 AD28 AD30 AF30
C49
C49 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
+1.2V_HT
CPU1H
CPU1H
VLDT_A_1 VLDT_A_2 VLDT_A_3 VLDT_A_4
VDDR_1 VDDR_2 VDDR_3 VDDR_4
VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 VDDIO_5 VDDIO_6 VDDIO_7 VDDIO_8 VDDIO_9 VDDIO_10 VDDIO_11 VDDIO_12 VDDIO_13 VDDIO_14 VDDIO_15 VDDIO_16 VDDIO_17 VDDIO_18 VDDIO_19 VDDIO_20 VDDIO_21 VDDIO_22 VDDIO_23 VDDIO_24 VDDIO_25 VDDIO_26 VDDIO_27 VDDIO_28 VDDIO_29
SOCKET AM3 941 SMD
SOCKET AM3 941 SMD
C34
C34 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
C527
C527 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
+1.2V_HT_CPU
H1
VLDT_B_1
H2
VLDT_B_2
H5
VLDT_B_3
H6
VLDT_B_4
AG12
VDDR_5
AH12
VDDR_6
AJ12
VDDR_7
AK12
VDDR_8
AL12
VDDR_9
AF18
VSS_215
AF20
VSS_216
AF22
VSS_217
AF24
VSS_218
AF26
VSS_219
AF28
VSS_220
AG10
VSS_221
AG11
VSS_222
AH14
VSS_223
AH16
VSS_224
AH18
VSS_225
AH20
VSS_226
AH22
VSS_227
AH24
VSS_228
AH26
VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242
AH28 AH30 AK2 AK14 AK16 AK18 AK20 AK22 AK24 AK26 AK28 AK30 AL5
POWER/GND4
POWER/GND4
C302
C302
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
C36
C36 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
+1.2V_HT
C57
C57
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
C59
C59
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
Title
Title
Title
M2 PWR/GND
M2 PWR/GND
M2 PWR/GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
N68SC-M3S
N68SC-M3S
N68SC-M3S
1
8 36Monday, November 08, 2010
8 36Monday, November 08, 2010
8 36Monday, November 08, 2010
6.1
6.1
6.1
5
D D
+1.5V_SUS
4
3
2
1
12
BC38
BC38 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
+1.5V_SUS
12
BC3
BC3 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
C C
B B
+1.5V_SUS
12
+V_CPU
12
+V_CPU
12
C81
C81 1UF 10V Y5V 0402
1UF 10V Y5V 0402
BC36
BC36 1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
BC30
BC30 1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
12
C131
C131 1UF 10V Y5V 0402
1UF 10V Y5V 0402
12
BC29
BC29 1UF 16V 0805 Y5V
12
C92
C92 1UF 10V Y5V 0402
1UF 10V Y5V 0402
PLACE BOTTOM SIDE DECOUPLING
12
BC8
BC8 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
12
BC39
BC39
1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
12
BC24
BC24 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
12
C52
C52 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
12
C314
C314
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
12
BC40
BC40 1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
12
BC21
BC21 1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
12
BC16
BC16 1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
12
C54
C54 1UF 10V Y5V 0402
1UF 10V Y5V 0402
12
C315
C315
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
12
BC25
BC25 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
12
BC28
BC28 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
12
BC11
BC11 1UF 10V Y5V 0402
1UF 10V Y5V 0402
12
BC34
BC34
1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
12
BC26
BC26 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
12
BC19
BC19 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
12
BC27
BC27 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
12
BC35
BC35 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
+V_CPU
C4
C41UF 16V 0805 Y5V 10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI
+V_CPU
C297
C297 10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI
12
BC32
BC32 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
12
BC12
BC12 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
C5
C5 10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI
C306
C306 10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI
12
BC37
BC37 1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
12
BC31
BC31 1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
C6
C6 10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI
12
BC41
BC41 1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
12
12
BC43
BC43 1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
BC42
BC42 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
C11
C11 10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI
12
BC15
BC15 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
C14
C14 10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI
12
BC18
BC18 1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
+1.5V_SUS
12
C310
C310
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
A A
5
12
C311
C311
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
12
4
C312
C312
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
12
C313
C313
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
Title
Title
Title
M2 DECOUPING
M2 DECOUPING
M2 DECOUPING
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
N68SC-M3S
N68SC-M3S
N68SC-M3S
1
9 36Monday, November 08, 2010
9 36Monday, November 08, 2010
9 36Monday, November 08, 2010
6.1
6.1
6.1
5
4
3
2
1
MEM_MA_DQS_L[8..0]6 MEM_MA_DQS_H[8..0]6
D D
MEM_MA_DM[8..0]6
C C
MEM_MA_CHECK[7..0]6
SMB_MEM_SDA11,17 SMB_MEM_SCL11,17
MEM_MA_ADD[15..0]6
B B
MEM_MA_DQS_L[8..0]
MEM_MA_DQS_L0 MEM_MA_DQS_H0 MEM_MA_DQS_L1 MEM_MA_DQS_H1 MEM_MA_DQS_L2 MEM_MA_DQS_H2 MEM_MA_DQS_L3 MEM_MA_DQS_H3 MEM_MA_DQS_L4 MEM_MA_DQS_H4 MEM_MA_DQS_L5 MEM_MA_DQS_H5 MEM_MA_DQS_L6 MEM_MA_DQS_H6 MEM_MA_DQS_L7 MEM_MA_DQS_H7 MEM_MA_DQS_L8 MEM_MA_DQS_H8
MEM_MA_DM[8..0] MEM_MA_DM0
MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 MEM_MA_DM8
MEM_MA_CHECK[7..0] MEM_MA_CHECK0 MEM_MA_CHECK1 MEM_MA_CHECK2 MEM_MA_CHECK3 MEM_MA_CHECK4 MEM_MA_CHECK5 MEM_MA_CHECK6 MEM_MA_CHECK7
MEM_MA_ADD[15..0] MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
DDR3_A1
DDR3_A1A
DDR3_A1A
6
DQS0-
7
DQS0
15
DQS1-
16
DQS1
24
DQS2-
25
DQS2
33
DQS3-
34
DQS3
84
DQS4-
85
DQS4
93
DQS5-
94
DQS5
102
DQS6-
103
DQS6
111
DQS7-
112
DQS7
42
DQS8-
43
DQS8
125
DM0/DQS9
126
DQS9-
134
DM1/DQS10
135
DQS10-
143
DM2/DQS11
144
DQS11-
152
DM3/DQS12
153
DQS12-
203
DM4/DQS13
204
DQS13-
212
DM5/DQS14
213
DQS14-
221
DM6/DQS15
222
DQS15-
230
DM7/DQS16
231
DQS16-
161
DM8/DQS17
162
DQS17-
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
79
RSVD
238
SDA
118
SCL
188
A0
181
A1
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70
A10
55
A11
174
A12
196
A13
172
A14
171
A15
DDR3-240 PIN-R
DDR3-240 PIN-R
BLACK
BLACK
NC/PAR_IN
NC/ERR_OUT
NC/TEST4
DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
234 233 228 227 115 114 109 108 225 224 219 218 106 105 100 99 216 215 210 209 97 96 91 90 207 206 201 200 88 87 82 81 156 155 150 149 37 36 31 30 147 146 141 140 28 27 22 21 138 137 132 131 19 18 13 12 129 128 123 122 10 9 4 3
68 53 167
MEM_MA_DATA[0..63]MEM_MA_DQS_H[8..0] MEM_MA_DATA63 MEM_MA_DATA62 MEM_MA_DATA61 MEM_MA_DATA60 MEM_MA_DATA59 MEM_MA_DATA58 MEM_MA_DATA57 MEM_MA_DATA56 MEM_MA_DATA55 MEM_MA_DATA54 MEM_MA_DATA53 MEM_MA_DATA52 MEM_MA_DATA51 MEM_MA_DATA50 MEM_MA_DATA49 MEM_MA_DATA48 MEM_MA_DATA47 MEM_MA_DATA46 MEM_MA_DATA45 MEM_MA_DATA44 MEM_MA_DATA43 MEM_MA_DATA42 MEM_MA_DATA41 MEM_MA_DATA40 MEM_MA_DATA39 MEM_MA_DATA38 MEM_MA_DATA37 MEM_MA_DATA36 MEM_MA_DATA35 MEM_MA_DATA34 MEM_MA_DATA33 MEM_MA_DATA32 MEM_MA_DATA31 MEM_MA_DATA30 MEM_MA_DATA29 MEM_MA_DATA28 MEM_MA_DATA27 MEM_MA_DATA26 MEM_MA_DATA25 MEM_MA_DATA24 MEM_MA_DATA23 MEM_MA_DATA22 MEM_MA_DATA21 MEM_MA_DATA20 MEM_MA_DATA19 MEM_MA_DATA18 MEM_MA_DATA17 MEM_MA_DATA16 MEM_MA_DATA15 MEM_MA_DATA14 MEM_MA_DATA13 MEM_MA_DATA12 MEM_MA_DATA11 MEM_MA_DATA10 MEM_MA_DATA9 MEM_MA_DATA8 MEM_MA_DATA7 MEM_MA_DATA6 MEM_MA_DATA5 MEM_MA_DATA4 MEM_MA_DATA3 MEM_MA_DATA2 MEM_MA_DATA1 MEM_MA_DATA0
MEM_MA_DATA[0..63] 6
DIMM_CA_VREF11 DIMM_DQ_VREF11
MEM_MA_CKE06 MEM_MA_CKE16
MEM_MA_BANK06 MEM_MA_BANK16 MEM_MA_BANK26
MEM_MA_RESET_L6
MEM_MA_WE_L6 MEM_MA_RAS_L6 MEM_MA_CAS_L6
MEM_MA0_CS_L06 MEM_MA0_CS_L16
MEM_MA0_ODT06 MEM_MA0_ODT16
MEM_MA0_CLK_L16 MEM_MA0_CLK_H16 MEM_MA0_CLK_L06 MEM_MA0_CLK_H06
MEM_MA_EVENT_L6
+1.5V_SUS
+3.3V DIMM_CA_VREF
DIMM_DQ_VREF
MEM_VTT
DDR3_A1B
DDR3_A1B
51
VDDQ1 (P)
54
VDDQ2 (P)
57
VDDQ3 (P)
60
VDDQ4 (P)
62
VDDQ5 (P)
65
VDDQ6 (P)
66
VDDQ7 (P)
69
VDDQ8 (P)
72
VDDQ9 (P)
75
VDDQ10 (P)
78
VDDQ11 (P)
170
VDD1 (P)
173
VDD2 (P)
176
VDD3 (P)
179
VDD4 (P)
182
VDD5 (P)
183
VDD6 (P)
186
VDD7(P)
189
VDD8(P)
191
VDD9(P)
194
VDD10(P)
197
VDD11(P)
236
VDDSPD(P)
67
VREFCA
1
VREFDQ
117
SA0
237
SA1
50
CKE0
169
CKE1
71
BA0
190
BA1
52
A16/BA2
168
RESET
73
WE-
192
RAS-
74
CAS-
193
S-0
76
S-1
195
ODT0
77
ODT1
64
CK-1
63
CK1
185
CK-0
184
CK0
48
FREE1
49
FREE2
187
FREE3
198
FREE4
DDR3-240 PIN-R
DDR3-240 PIN-R
VSS1(P) VSS2(P) VSS3(P) VSS4(P) VSS5(P) VSS6(P) VSS7(P) VSS8(P)
VSS9(P) VSS10(P) VSS11(P) VSS12(P) VSS13(P) VSS60(P) VSS14(P) VSS15(P) VSS16(P) VSS17(P) VSS18(P) VSS19(P) VSS20(P) VSS21(P) VSS22(P) VSS23(P) VSS24(P) VSS25(P) VSS26(P) VSS27(P)
SA2 VSS29(P) VSS30(P) VSS31(P) VSS32(P) VSS33(P) VSS34(P) VSS35(P) VSS36(P) VSS37(P) VSS38(P) VSS39(P) VSS40(P) VSS41(P) VSS42(P) VSS43(P) VSS44(P) VSS45(P) VSS46(P) VSS47(P) VSS48(P) VSS49(P) VSS50(P) VSS51(P) VSS52(P) VSS53(P) VSS54(P) VSS55(P) VSS56(P) VSS57(P) VSS58(P) VSS59(P)
VTT
VTT
2 5 8 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 92 95 98 101 104 107 110 113 116 119 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 199 202 205 208 211 214 217 220 223 226 229 232 235 239 89
120 240
MEM_VTT
C524
2
C524
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
1 2
Title
Title
Title
DDR DIMMA1
DDR DIMMA1
DDR DIMMA1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
N68SC-M3S
N68SC-M3S
N68SC-M3S
1
10 36Tuesday, November 09, 2010
10 36Tuesday, November 09, 2010
10 36Tuesday, November 09, 2010
6.1
6.1
6.1
C474
C474 10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
+1.5V_SUS +1.5V_SUS
R330
R309
R309 150 1% 0402
150 1% 0402
A A
5
R328
R328 150 1% 0402
150 1% 0402
DIMM_DQ_VREF DIMM_CA_VREF
C485
C484
C484
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
C519
C519
0.1UF 16V Y5V 0402
4
C485
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
R330 150 1% 0402
150 1% 0402
R329
R329 150 1% 0402
150 1% 04020.1UF 16V Y5V 0402
C498
C498
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
3
C516
C516
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
1 2
C473
C473
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
1 2
5
D D
4
3
2
1
MEM_MB_DQS_L[8..0]6
MEM_MB_DQS_H[8..0]6
C C
B B
MEM_MB_DM[8..0]6
MEM_MB_CHECK[7..0]6
SMB_MEM_SDA10,17 SMB_MEM_SCL10,17
MEM_MB_ADD[15..0]6
MEM_MB_DQS_L[8..0] MEM_MB_DQS_H[8..0] MEM_MB_DQS_L0 MEM_MB_DQS_H0 MEM_MB_DQS_L1 MEM_MB_DQS_H1 MEM_MB_DQS_L2 MEM_MB_DQS_H2 MEM_MB_DQS_L3 MEM_MB_DQS_H3 MEM_MB_DQS_L4 MEM_MB_DQS_H4 MEM_MB_DQS_L5 MEM_MB_DQS_H5 MEM_MB_DQS_L6 MEM_MB_DQS_H6 MEM_MB_DQS_L7 MEM_MB_DQS_H7 MEM_MB_DQS_L8 MEM_MB_DQS_H8
MEM_MB_DM[8..0] MEM_MB_DM0
MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 MEM_MB_DM8
MEM_MB_CHECK[7..0] MEM_MB_CHECK0 MEM_MB_CHECK1 MEM_MB_CHECK2 MEM_MB_CHECK3 MEM_MB_CHECK4 MEM_MB_CHECK5 MEM_MB_CHECK6 MEM_MB_CHECK7
MEM_MB_ADD[15..0] MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
DDR3_B1
DDR3_B1A
DDR3_B1A
6
DQS0-
7
DQS0
15
DQS1-
16
DQS1
24
DQS2-
25
DQS2
33
DQS3-
34
DQS3
84
DQS4-
85
DQS4
93
DQS5-
94
DQS5
102
DQS6-
103
DQS6
111
DQS7-
112
DQS7
42
DQS8-
43
DQS8
125
DM0/DQS9
126
DQS9-
134
DM1/DQS10
135
DQS10-
143
DM2/DQS11
144
DQS11-
152
DM3/DQS12
153
DQS12-
203
DM4/DQS13
204
DQS13-
212
DM5/DQS14
213
DQS14-
221
DM6/DQS15
222
DQS15-
230
DM7/DQS16
231
DQS16-
161
DM8/DQS17
162
DQS17-
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
79
RSVD
238
SDA
118
SCL
188
A0
181
A1
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70
A10
55
A11
174
A12
196
A13
172
A14
171
A15
DDR3-240 PIN-R
DDR3-240 PIN-R
BLACK
BLACK
NC/PAR_IN
NC/ERR_OUT
NC/TEST4
DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
MEM_MB_DATA[0..63] MEM_MB_DATA63
234
MEM_MB_DATA62
233
MEM_MB_DATA61
228
MEM_MB_DATA60
227
MEM_MB_DATA59
115
MEM_MB_DATA58
114
MEM_MB_DATA57
109
MEM_MB_DATA56
108
MEM_MB_DATA55
225
MEM_MB_DATA54
224
MEM_MB_DATA53
219
MEM_MB_DATA52
218
MEM_MB_DATA51
106
MEM_MB_DATA50
105
MEM_MB_DATA49
100
MEM_MB_DATA48
99
MEM_MB_DATA47
216
MEM_MB_DATA46
215
MEM_MB_DATA45
210
MEM_MB_DATA44
209
MEM_MB_DATA43
97
MEM_MB_DATA42
96
MEM_MB_DATA41
91
MEM_MB_DATA40
90
MEM_MB_DATA39
207
MEM_MB_DATA38
206
MEM_MB_DATA37
201
MEM_MB_DATA36
200
MEM_MB_DATA35
88
MEM_MB_DATA34
87
MEM_MB_DATA33
82
MEM_MB_DATA32
81
MEM_MB_DATA31
156
MEM_MB_DATA30
155
MEM_MB_DATA29
150
MEM_MB_DATA28
149
MEM_MB_DATA27
37
MEM_MB_DATA26
36
MEM_MB_DATA25
31
MEM_MB_DATA24
30
MEM_MB_DATA23
147
MEM_MB_DATA22
146
MEM_MB_DATA21
141
MEM_MB_DATA20
140
MEM_MB_DATA19
28
MEM_MB_DATA18
27
MEM_MB_DATA17
22
MEM_MB_DATA16
21
MEM_MB_DATA15
138
MEM_MB_DATA14
137
MEM_MB_DATA13
132
MEM_MB_DATA12
131
MEM_MB_DATA11
19
MEM_MB_DATA10
18
MEM_MB_DATA9
13
MEM_MB_DATA8
12
MEM_MB_DATA7
129
MEM_MB_DATA6
128
MEM_MB_DATA5
123
MEM_MB_DATA4
122
MEM_MB_DATA3
10
MEM_MB_DATA2
9
MEM_MB_DATA1
4
MEM_MB_DATA0
3
68 53 167
MEM_MB_DATA[0..63] 6
DIMM_CA_VREF10 DIMM_DQ_VREF10
MEM_MB_CKE06 MEM_MB_CKE16
MEM_MB_BANK06 MEM_MB_BANK16 MEM_MB_BANK26
MEM_MB_RESET_L6
MEM_MB_WE_L6 MEM_MB_RAS_L6 MEM_MB_CAS_L6
MEM_MB0_CS_L06 MEM_MB0_CS_L16
MEM_MB0_ODT06 MEM_MB0_ODT16
MEM_MB0_CLK_L16 MEM_MB0_CLK_H16 MEM_MB0_CLK_L06 MEM_MB0_CLK_H06
MEM_MB_EVENT_L6
+1.5V_SUS
+3.3V DIMM_CA_VREF
DIMM_DQ_VREF
+3.3V
DDR3_B1B
DDR3_B1B
51
VDDQ1 (P)
54
VDDQ2 (P)
57
VDDQ3 (P)
60
VDDQ4 (P)
62
VDDQ5 (P)
65
VDDQ6 (P)
66
VDDQ7 (P)
69
VDDQ8 (P)
72
VDDQ9 (P)
75
VDDQ10 (P)
78
VDDQ11 (P)
170
VDD1 (P)
173
VDD2 (P)
176
VDD3 (P)
179
VDD4 (P)
182
VDD5 (P)
183
VDD6 (P)
186
VDD7(P)
189
VDD8(P)
191
VDD9(P)
194
VDD10(P)
197
VDD11(P)
236
VDDSPD(P)
67
VREFCA
1
VREFDQ
117
SA0
237
SA1
50
CKE0
169
CKE1
71
BA0
190
BA1
52
A16/BA2
168
RESET
73
WE-
192
RAS-
74
CAS-
193
S-0
76
S-1
195
ODT0
77
ODT1
64
CK-1
63
CK1
185
CK-0
184
CK0
48
FREE1
49
FREE2
187
FREE3
198
FREE4
DDR3-240 PIN-R
DDR3-240 PIN-R
VSS1(P) VSS2(P) VSS3(P) VSS4(P) VSS5(P) VSS6(P) VSS7(P) VSS8(P)
VSS9(P) VSS10(P) VSS11(P) VSS12(P) VSS13(P) VSS60(P) VSS14(P) VSS15(P) VSS16(P) VSS17(P) VSS18(P) VSS19(P) VSS20(P) VSS21(P) VSS22(P) VSS23(P) VSS24(P) VSS25(P) VSS26(P) VSS27(P)
VSS29(P) VSS30(P) VSS31(P) VSS32(P) VSS33(P) VSS34(P) VSS35(P) VSS36(P) VSS37(P) VSS38(P) VSS39(P) VSS40(P) VSS41(P) VSS42(P) VSS43(P) VSS44(P) VSS45(P) VSS46(P) VSS47(P) VSS48(P) VSS49(P) VSS50(P) VSS51(P) VSS52(P) VSS53(P) VSS54(P) VSS55(P) VSS56(P) VSS57(P) VSS58(P) VSS59(P)
VTT VTT
2 5 8 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 92 95 98 101 104 107 110 113 116 119
SA2
121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 199 202 205 208 211 214 217 220 223 226 229 232 235 239 89
120 240
MEM_VTT
A A
Title
Title
Title
DDR DIMMB1
DDR DIMMB1
DDR DIMMB1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
N68SC-M3S
N68SC-M3S
N68SC-M3S
1
11 36Tuesday, November 09, 2010
11 36Tuesday, November 09, 2010
11 36Tuesday, November 09, 2010
6.1
6.1
6.1
Loading...
+ 25 hidden pages