ATMEL ATmega8HVA User Manual
BDTIC www.bdtic.com/ATMEL
Features
• High Performance, Low Power AVR
• Advanced RISC Architecture
– 131 Powerful Instructions - Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 4 MIPS Throughput at 4 MHz
• High Endurance Non-volatile Memorie segments
– 8K/16K Bytes of In-System Self-Programmable Flash Program
Memory(A Tmega8HVA/16HVA)
– 256 Bytes EEPROM
– 512 Bytes Internal SRAM
– Write/Erase cycles: 10,000 Flash/100,000 EEPROM
– Data Retention: 20 years at 85°C /100 years at 25°C
– Programming Lock for Software Security
• Battery Management Features
– One or Two Cells in Series
– Over-current Protection (Charge and Discharge)
– Short-circuit Protection (Discharge)
– High Voltage Outputs to Drive N-Channel Charge/Discharge FETs
• Peripheral Features
– Two configurable 8- or 16-bit Timers with Separate Prescaler, Optional Input
Capture (IC), Compare Mode and CTC
– SPI - Serial Programmable Interface
– 12-bit Voltage ADC, Four External and One Internal ADC Inputs
– High Resolution Coulomb Counter ADC for Current Measurements
– Programmable Watchdog Timer
• Special Microcontroller Features
– debugWIRE On-chip Debug System
– In-System Programmable via SPI ports
– Power-on Reset
– On-chip Voltage Regulator with Short-circuit Monitoring Interface
– External and Internal Interrupt Sources
– Sleep Modes:
Idle, ADC Noise Reduction, Power-save, and Power-off
• Additional Secure Authentication Features available only under ND A
• Packages
– 36-pad LGA
– 28-lead TSOP
• Operating Voltage: 1.8 - 9V
• Maximum Withstand Voltage (High-voltage pins): 28V
• Temperature Range: - 20°C to 85°C
• Speed Grade: 1-4 MHz
®
8-bit Microcontroller
(1)
8-bit
Microcontroller
with 8K/16K
Bytes In-System
Programmable
Flash
ATmega8HVA
ATmega16HVA
Preliminary
Summary
8024AS–AVR–04/08
ATmega8HVA/16HVA
1. Pin Configurations
A
B
C
D
E
1.1 LGA
Figure 1-1. LGA - Pinout ATmega8HVA/16HVA
12345678
Figure 1-2. LGA - pinout ATmega8HVA/16HVA
12 3 4567 8
A DNC PV2 PV1 NV GND OC OD DNC
B CF2P CF2N VFET CF1P GND PC0 DNC GND
C VREF VREFGND VREG CF1N VCC GND GND BATT
DPI NI GND GND GND PB2 PB3 GND
E DNC DNC PA1 PA0 PB1 PB0 RESET DNC
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8024AS–AVR–04/08
1.2 TSOP
V
0)
1)
)
ATmega8HVA/16HVA
Figure 1-3. TSOP - pinout ATmega8HVA/16HVA
1.3 Pin Descriptions
1
PV2
2
PV1
3
NV
GND
4
VFET
5
6
CF1P
CF1N
7
8
CF2P
CF2N
9
VREG
10
11
VREF
REFGND
12
13
PI
14 15
NI PA0 (ADC0/SGND/T
28
OD
27
OC
26
GND
25
BATT
24
PC0 (RXD/TXD/INT0
23
VCC
22
GND
21
PB3 (MISO/INT2)
20
PB2 (MOSI/INT1)
19
PB1 (SCK)
18
PB0 (SS/CKOUT)
17
PA2 (RESET/dW)
16
PA1 (ADC1/SGND/T
1.3.1 VFET
Input to the internal voltage regulator.
1.3.2 VCC
Digital supply voltage. Normally connected to VREG.
1.3.3 VREG
Output from the internal voltage regulator.
1.3.4 CF1P/CF1N/CF2P/CF2N
CF1P/CF1N/CF2P/CF2N are the connection pins for connecting external fly capacito rs to the
step-up regulator.
1.3.5 VREF
Internal Voltage Reference for external decoupling.
1.3.6 VREFGND
Ground for decoupling of Internal Voltage Reference. Do not conn ect t o GND or SGND on PCB.
8024AS–AVR–04/08
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ATmega8HVA/16HVA
1.3.7 GND
Ground
1.3.8 Port A (PA1..PA0)
Port A serves as a low-voltage 2-bit bi-d irectional I/ O port with internal pull-up resisto rs (selected
for each bit). As inputs, Port A pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port A pins are tri-stated when a reset co ndition becomes active,
even if the clock is not running.
Port A also serves the functions of various special features of the ATmega8HVA/16HVA as
listed in ”Alternate Functions of Port A” on page 70.
1.3.9 Port B (PB3..PB0)
Port B is a low-voltage 4-bit bi-directional I/O port with internal pull-up resistors (selected for
each bit). As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset co ndition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATmega8HVA/16HVA as
listed in ”Alternate Functions of Port B” on page 71.
1.3.10 PC0
Port C serves the functions of various special features of the ATmega8HVA/16HVA as listed in
”Alternate Functions of Port C” on page 61.
1.3.11 OC
1.3.12 OD
1.3.13 NI
1.3.14 PI
1.3.15 NV/PV1/PV2
1.3.16 BATT
1.3.17 RESET
/dw
High voltage output to drive Charge FET.
High voltage output to drive Discharge FET.
NI is the filtered negative input from the current sense resistor.
PI is the filtered positive input from the current sense resistor.
NV, PV1, and PV2 are the inputs for battery cells 1 and 2.
Input for detecting when a charger is connected.
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in Table 11 on page
38. Shorter pulses are not guaranteed to generate a reset. This pin is also used as debugWIRE
communication pin.
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8024AS–AVR–04/08
2. Overview
R
D
PB3..0
CF1P CF2P
PC0
The ATmega8HVA/16HVA is a monitoring and protection circuit for 1-cell and 2-cell Li-ion applications with focus on high security/authentication, accurate monitoring, low cost and high
utilization of the cell energy. The device contains secur e authentication features as well as
autonomous battery protection during charging and discharging. The chip allows very accurate
accumulated current measurements using an 18-bit ADC with a resolution of 0.84 µV. The feature set makes the ATmega8HVA/16HVA a key component in any system focusing on high
security, battery protection, accurate monitoring, high system utilization and low cost.
Figure 2-1. Block Diagram
ATmega8HVA/16HVA
PB0
ESET/dW
BATT
VFET
VREG
Oscillator
Circuits /
Clock
Generation
Watchdog
Oscillator
VCC
GND
CF1N CF2N
Watchdog
Timer
Power
Supervision
POR &
RESET
Charger
Detect
Voltage
Regulator
Oscillator
Sampling
Interface
Program
Logic
debugWIRE
Voltage Regulator
Monitor Interface
PORTB (4)
SPI
SRAMFlash
CPU
DATA BUS
8/16-bit T/C0
8/16-bit T/C1
PORTA (2)
PA1..0
PORTC (1)
EEPROM
Security
Module
Protection
Reference
Counter ADC
PA1..0
FET
Control
Battery
Voltage
ADC
Voltage
Coulumb
VPTAT
OC
OD
PV2
PV1
NV
VREF
VREFGN
PI
NI
A combined step-up and linear voltage regulator ensures that the chip can operate with supply
voltages as low as 1.8V for 1-cell applications. The regulator automatically switches to linear
mode when the input voltage is sufficiently high, thereby ensuring a minimum power consumption at all times. For 2-cell applications, only linear regulation is enabled. The regulator
capabilities, combined with an extremely low power consumption in the power saving modes,
greatly enhances the cell energy utilization compared to existing solutions.
The chip utilizes Atmel's patented Deep Under-voltage Recovery (DUVR) mode that supports
pre-charging of deeply discharged ba tt er y cells without using a separate Pre-charge FET.
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8024AS–AVR–04/08
ATmega8HVA/16HVA
The ATmega8HVA/16HVA contains a 12-bit ADC that can be used to measure the voltage of
each cell individually. The ADC can also be used to monitor temperature, either on-chip temperature using the built-in temperature sensor, external t emper ature using thermi stors conne cted to
dedicated ADC inputs. The ATmega8HVA/16HVA contains a high-voltage tolerant, open-drain
IO pin that supports serial communication. Programming can be done in-system using the 4
General Purpose IO ports that support SPI programming.
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The MCU includes 8K/16K bytes of In-System Programmable Flash with Re ad-While-Write
capabilities, 256 bytes EEPROM, 512 bytes SRAM, 32 general purpose working registers, 6
general purpose I/O lines, debugWIRE for On-chip debugging and SPI for In-system Programming, two flexible Timer/Counters with Input Capture and compare modes, internal and external
interrupts, a 12-bit Sigma Delta ADC for voltage and temperature measurements, a high resolution Sigma Delta ADC for Coulomb Counting and instantan eous current measurements,
Additional Secure Authentication Features, an authonomou s Battery Protection module, a pro grammable Watchdog Timer with wake-up capabilities, and software selectable power saving
modes.
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two indepdent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The device is manufactured using Atmel’s high voltage high density non-volatile memo ry technology. The On-chip ISP Flash allows the program memory to be reprogrammed In-System,
through an SPI serial interface, by a conven tional no n-volatile memory progr ammer or by a n Onchip Boot program running on the AVR core. By com bining an 8-bit RISC CPU with In-System
Self-Programmable Flash, fuel gauging ADCs, dedicated battery protection circuitry, and a voltage regulator on a monolithic chip, the ATmega8HVA/16HVA is a powerful microcontroller that
provides a highly flexible and cost effective solution for Li-ion Smart Battery applications.
The ATmega8HVA/16HVA AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, and Onchip Debugger.
The ATmega8HVA/16HVA is a low-power CMOS 8-bit microcontroller based on the AVR architecture. It is part of the AVR Smart Battery family that provides secure authentication, highly
accurate monitoring and autonomous protection for Lithium-ion battery cells.
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8024AS–AVR–04/08
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