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ART FILM - pdf_top_assem

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Professional.Repairphone

TOP SIDE AS

THIS IS THE PROPERTY OF APPLE AND IT MUST BE RETURNED

ORIG DIV

:

NOTES
AR

TWORK

VIEWED FRO

TO STAN

DAR

080-2265 (FLEXIBLE PRI

062-0073 (MULTI- LAYER

SEMBLY

APPLE

DESIGNER

KEN KIPLINGER

DS AS DEFINED IN APPLE SPECIFICATION

M COMPONENT SIDE. PCB SHALL CONFORM

NTED CIRC

BOARD

UIT BOARD

S) AS APPLICABLE.

DAT

03/31/17

S) OR

TITLE

PCBF, X891

TOP MLB

E

SCAL

E

DRAW

ING NUMBER

1:1

NOTICE OF PRO

THE

PRO
THE
(I) TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
(II) NOT TO RE
(III) NOT TO RE

ART FILM - pdf_top_assem

INFORM

PRI

ETARY

POSSESSOR

820-00863-09

PRI

ATION CONTAINED HEREIN IS THE

PRO

ETARY PROPERTY

PERTY OF APPLE

AGREES TO THE FOLLOWING

PRODUCE OR COPY IT

VEAL OR PUBLISH IT

ART FILM - pdf_bot_assem

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Professional.Repairphone

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PCBF, X891

TOP MLB

820-00863-09

ART FILM - pdf_bot_assem

BOTTOM SIDE ASSEMBLY

TITLE

DRAWING NUMBER

SCALE

DATE

1:1

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE

THE POSSESSOR AGREES TO THE FOLLOWING
(I) TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
(II) NOT TO REPRODUCE OR COPY IT
(III) NOT TO REVEAL OR PUBLISH IT

03/31/17

APPLE

DESIGNER

THIS IS THE PROPERTY OF APPLE AND IT MUST BE RETURNED

ORIG DIV

KEN KIPLINGER

NOTES:
ARTWORK VIEWED FROM COMPONENT SIDE. PCB SHALL CONFORM
TO STANDARDS AS DEFINED IN APPLE SPECIFICATION
080-2265 (FLEXIBLE PRINTED CIRCUIT BOARDS) OR

062-0073 (MULTI- LAYER BOARDS) AS APPLICABLE.

ART FILM - pdf_top_mate

*

*

*

*

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UTAH

*

ROMEO

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FCAM

JULIET

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https://www.facebook.com/
Professional.Repairphone

TOP SIDE AS

THIS IS THE PROPERTY OF APPLE AND IT MUST BE RETURNED

ORIG DIV

NOTES :
AR

TWORK

VIEWED FRO

TO STAN

DAR

080-2265 (FLEXIBLE PRI

062-0073 (MULTI- LAYER

SEMBLY

APPLE

DESIGNER

KEN KIPLINGER

DS AS DEFINED IN APPLE SPECIFICATION

M COMPONENT SIDE. PCB SHALL CONFORM

NTED CIRC

BOARD

UIT BOARD

S) AS APPLICABLE.

DAT

03/31/17

S) OR

TITLE

PCBF, X891

TOP MLB

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SCAL

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DRAW

1:1

NOTICE OF PRO

THE

PRO
THE
(I) TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
(II) NOT TO RE
(III) NOT TO RE

ART FILM - pdf_top_mate

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INFORM

PRI

ETARY

POSSESSOR

820-00863-09

PRI

ATION CONTAINED HEREIN IS THE

PRO

ETARY PROPERTY

PERTY OF APPLE

AGREES TO THE FOLLOWING

PRODUCE OR COPY IT

VEAL OR PUBLISH IT

ART FILM - pdf_bot_mate

https://www.facebook.com/
Professional.Repairphone

*

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PCBF, X891

TOP MLB

820-00863-09

ART FILM - pdf_bot_mate

BOTTOM SIDE ASSEMBLY

TITLE

DRAWING NUMBER

SCALE

DATE

1:1

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE

THE POSSESSOR AGREES TO THE FOLLOWING
(I) TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
(II) NOT TO REPRODUCE OR COPY IT
(III) NOT TO REVEAL OR PUBLISH IT

03/31/17

APPLE

DESIGNER

THIS IS THE PROPERTY OF APPLE AND IT MUST BE RETURNED

ORIG DIV

KEN KIPLINGER

NOTES:
ARTWORK VIEWED FROM COMPONENT SIDE. PCB SHALL CONFORM
TO STANDARDS AS DEFINED IN APPLE SPECIFICATION
080-2265 (FLEXIBLE PRINTED CIRCUIT BOARDS) OR

062-0073 (MULTI- LAYER BOARDS) AS APPLICABLE.

ART FILM - pdf_top_assem

*

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L2012_EL2013_E

L2010_E

L1604_E

*

DSM_HB_E

LNA_GPS_E

L2109_EC2101_E

*

R2103_EC2102_E

L1606_E

L1607_E

R2102_E

R1600_E

L2102_E

*

R1612_E

R1615_E

*

R1613_E

*

C7516_S

C7515_S

C7518_S

R1611_E

R1601_E

R1603_E

*

L1605_E

*

C7533_S

*

L1608_E

C1603_E

R1609_E
C1502_E

C1602_E

C1604_E

C7532_S

XW308_E

C7530_S

NFC_DCDC_S

C7531_S

*

Q7502_SQ7501_S

*

*

C7511_S

*

C7512_S

L7502_S

*

C7521_S

C7522_S

C7514_S

C7520_S

*

R7508_S

*

C7517_S

C7507_S

C7510_S

C7526_S

C7506_S

L7503_S

C7523_S

C7503_S

L7500_S

*

T7500_S

NFC_S

L7501_S

C7505_S

*

C7504_S
C7513_S

R7502_S

C7502_S

C7500_S

R3450

C3456

C3452

C3451

C3453

C3455

C3454

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*

C3403

C3402

C3464

C3465

C3461

C3462

C3463

C3466

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U5530

R3460

C5530

MC_E

R703_E

R700_E

R715_E

C701_E

C519_E

R714_E

C532_E

C502_E

C555_E

C515_E

FD0405

FD0411

C514_E C510_EC552_E
C541_E

C536_E

C517_E

C521_E

*

C603_E

C528_E

R7702_W

C535_E

*

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*

C7709_W

C7711_W

R7711_W

C7708_W

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*

C7705_W

L7704

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R7700_WC7701_W

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W2BPF_W

*

*

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*

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R7703_W

*

C7716_W

R5807

FL5809

C5807

C5809

FL5806

FL5810

C200_E

C5806

C5810

*

FL5800

FL5802

C5800

C5802

R201_E

C203_E

FL5805

FL5895

*

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C5805

C5895

C5844

C5804

DZ203_E

R5844

FL580

4

C5890

R5801

C5845

C5803

R202_E

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FL5803

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R5845

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DZ206_E

C5896

C5850

C5894

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FL5893

FL5894

R2105_E

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L2105_E

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R919_E

*

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R5842

R920_E

FL5891

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C5820

R922_E

C5841

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R2412_E

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C2417_E

C2440_E

*

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C2415_E

GPOLAT_E

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C3416

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C5028

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C5016

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R3420

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*

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C1808_E

C1806_E

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*

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C1812_E

*

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C1318_E

R1807_E

R1809_E

C1811_E

FLPDX_E

*

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*

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FL1201_E

*

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C3440

C3417

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C507_E

R702_E

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C516_E

C512_E
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C513_E

R603_E

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C554_E

C530_E

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R801_EC822_E

U_WTR_E

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C1312_EC3043

*

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*

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C1815_E

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C1802_E

*

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*

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C5025

C5006

C5008

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C3413

C4928

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C4909

*

*

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PA_UHB_E

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*

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L4900

*

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C520_E

C4904

R410_E

*

R889_E

*

*

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C539_E

R409_E

C314_E

C888_E

C544_E

*

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C323_E C4907

*

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R888_E

C4905

C547_E

*

C4932

C307_E

*

C550_E

C328_E

C316_E

C303_E

C306_E

*

C322_E

C553_E

R604_E

C533_E

C302_E

*

R422_E

C504_E

XW301_E

*

R401_E

C549_E

C404_E

R402_E

*

C508_E

L304_E

XW302_E

*

C317_E

C534_E

C305_E

*

C501_E

XW404_E

C526_E

U_PMIC_E

XW403_E

Y401_E

XW401_E

C321_EC326_E

*

*

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*

L303_E

*

C540_E

XW305_E

R412_E

C309_E

XW402_E

R411_E

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C401_E

C403_E

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*

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415_E

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*

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*

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XW3043

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*

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*

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*

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*

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C1322_ER1308_ER1304_E

C1201_E

PA_HB_E

C1206_E

C1317_E

C1316_E

R1207_ER1203_EC1205_E

C1311_E

C1211_E

C1306_E

*

C1302_E

C1323_E

https://www.facebook.com/

TOP SIDE AS

THIS IS THE PROPERTY OF APPLE AND IT MUST BE RETURNED

ORIG DIV

NOTES :
AR

TWORK

VIEWED FRO

TO STAN

DAR

080-2265 (FLEXIBLE PRI

062-0073 (MULTI- LAYER

SEMBLY

APPLE

DESIGNER

GERA

DS AS DEFINED IN APPLE SPECIFICATION

DAN

ILOV

M COMPONENT SIDE. PCB SHALL CONFORM

NTED CIRC

BOARD

UIT BOARD

S) AS APPLICABLE.

Professional.Repairphone

DAT

04/05/17

S) OR

TITLE

E

SCAL

E

DRAW

ING NUMBER

1:1

NOTICE OF PRO

THE

INFORM

PRO

PRI

ETARY

THE

POSSESSOR
(I) TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
(II) NOT TO RE
(III) NOT TO RE

ART FILM - pdf_top_assem

PCBF, X891

BOTTOM MLB

820-00864-06

PRI

ATION CONTAINED HEREIN IS THE

PRO

ETARY PROPERTY

PERTY OF APPLE

AGREES TO THE FOLLOWING

PRODUCE OR COPY IT

VEAL OR PUBLISH IT

ART FILM - pdf_bot_assem

FD0403

FD0413

PP42_E

PP90_E

PP43_E

TP0790

PP39_E

PP37_E

PP7508_S

PP7514_S

PP7511_S

PP7503_S

PP7510_S

PP7505_S

PP7507_S

PP7504_S

P402_E

PP7506_S

PP7512_S

PP7513_S

PP7509_S

PP0700

PP5_E

PP6_E

PP0704

PP7628_W

PP7629_W

TP7505_S

TP7506_S

PP0702

TP0720

PP0703

TP0721

FD0402

FD0414

PP0701

PP101_E

PP106_E

PP95_E

PP99_E

PP58_E

PP88_E

PP100_E

PP104_E

PP87_E

PP98_E

PP28_E

PP32_E

PP57_E

PP31_E

PP26

_E

PP22_E

P601_E PP29_E

PP702_E

PP25_E

PP96_E

PP110_E

PP41_EPP40_E

PP27_E

PP113_E

PP24_E

PP38_E

PP44_E

P501_E

PP77_E

PP18_E

PP20_E

PP94_E

PP93_E

PP36_E

PP108_E

PP111_E

PP46_E

PP112_E

PP45_E

PP109_E

PP85_E

PP81_E

PP50_E

PP30_E

PP48_E

PP23_E

PP47_E

TP0708
PP7622_W

PP7620_W

PP7623_W
PP9

2_E

PP7621_W

TP0713

PP701_E

PP7626_W

PP7607_W

PP7600_W

PP

PP761

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PP 76

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PP

PP7610_W

PP
TP0709

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PP7619_W

PP7613_W

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71 4 TP0715

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TP0751

TP0755

TP0750

PP107_E

PP117_E

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PP82_E

PP55_E

PP54_E

PP56_E

PP78_E

PP53_E

PP80_E

PP127_E
PP12

9_E

PP1301_E

PP1300_E

PP116_E

PP126_E

PP

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8_E

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TP0730

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PP2_E

PP1_E

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TP0731

PP4_E

PP49_E

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PP3_E

P804

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PP51_E

P803_EPP52_E

*

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PP13_E

PP14_E

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J_DEBUG_E

PP7609_W

PP7630_W

PP7617_W
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6_W
1_W
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TP0752

TP0764

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TP0754

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TP0707

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TP0766

PP105_E

TP0760

PP1202_E

PP1201_E

TP0762

PP1203_E

TP0759

PP1200_E

PP1100_E

PP35_E

TP0758

TP0756

TP0771

TP0757

TP0772

TP0767

PP1800_E

PP89_E

https://www.facebook.com/
Professional.Repairphone

PCBF, X891

BOTTOM MLB

820-00864-06

TITLE

DRAWING NUMBER

SCALE

1:1

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE

THE POSSESSOR AGREES TO THE FOLLOWING
(I) TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
(II) NOT TO REPRODUCE OR COPY IT
(III) NOT TO REVEAL OR PUBLISH IT

ART FILM - pdf_bot_assem

BOTTOM SIDE ASSEMBLY

APPLE

DATE

04/05/17

DESIGNER

GERA DANILOV

THIS IS THE PROPERTY OF APPLE AND IT MUST BE RETURNED

ORIG DIV

NOTES:
ARTWORK VIEWED FROM COMPONENT SIDE. PCB SHALL CONFORM
TO STANDARDS AS DEFINED IN APPLE SPECIFICATION
080-2265 (FLEXIBLE PRINTED CIRCUIT BOARDS) OR

062-0073 (MULTI- LAYER BOARDS) AS APPLICABLE.

ART FILM - pdf_top_mate

*

*

*

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*

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*

*

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*

*

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R

*

*

*

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HB DSM

GPS

*

*

*

*

*

*

*

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*

*

*

*

*

*

*

D

C

­D

*

C

NFC

*

*

*

*

BASE

VINYL

*

*

*

*

*

*

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*

*

*

*

*

*

*

ORB/TOUCH

*

*

COUPLE

J-LAT

*

*

*

LAT-DI

*

*

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SPK

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* *

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*

*

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*

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*

TOP SIDE AS

THIS IS THE PROPERTY OF APPLE AND IT MUST BE RETURNED

ORIG DIV

NOTES :
AR

TWORK

VIEWED FRO

TO STAN

DAR

080-2265 (FLEXIBLE PRI

062-0073 (MULTI- LAYER

SEMBLY

APPLE

DESIGNER

GERA

DS AS DEFINED IN APPLE SPECIFICATION

DAN

ILOV

M COMPONENT SIDE. PCB SHALL CONFORM

NTED CIRC

BOARD

https://www.facebook.com/
Professional.Repairphone

UIT BOARD

S) AS APPLICABLE.

DAT

04/05/17

S) OR

TITLE

PCBF, X891

BOTTOM MLB

E

SCAL

E

DRAW

1:1

NOTICE OF PRO

THE

PRO
THE
(I) TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
(II) NOT TO RE
(III) NOT TO RE

ART FILM - pdf_top_mate

ING NUMBER

INFORM

PRI

ETARY

POSSESSOR

820-00864-06

PRI

ATION CONTAINED HEREIN IS THE

PRO

ETARY PROPERTY

PERTY OF APPLE

AGREES TO THE FOLLOWING

PRODUCE OR COPY IT

VEAL OR PUBLISH IT

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

7

6543

X891/X893 MLB Top: EVT

LAST_MODIFICATION=Mon Apr 3 13:03:06 2017

2 1

ECNREV DESCRIPTION OF REVISION

CK
APPD

DATE

2017-04-0500084097609 ENGINEERING RELEASED

D

1
2
3
4
5
6
7
8
9
10
11
12

1
2
4
5
6
10
11
12
13
14
15
16

TABLE OF CONTENTS
SYSTEM:BOM Tables
SYSTEM: Mechanical Components
SYSTEM: Testpoints (Top)
BOOTSTRAPPING
SOC: JTAG,USB,XTAL
SOC: PCIE
SOC: MIPI & ISP
SOC: LPDP
SOC: Serial
SOC: GPIO & UART
SOC: AOP

test_mlb

test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb

10/13/2016

10/13/2016
10/13/2016
10/17/2016
10/17/2016
10/13/2016
10/13/2016
10/17/2016
10/13/2016
10/17/2016

46
47
48
49
50
51

61
62
63
64
65
80

I/O: Accessory Buck
I/O: USB PD
I/O: Hydra
I/O: B2B Dock
I/O: Interposer (Bottom)
RADIOS

test_mlb
test_mlb
test_mlb
test_mlb
test_mlb

D

DATESYNCCONTENTSCSAPAGEDATESYNCCONTENTSCSAPAGE

10/17/2016
10/13/2016
10/13/2016
10/13/2016
10/13/2016
06/04/2015

C

13
14
15
16
17
18
19
20
21
22
23
24
25
26

17
18
19
26
27
28
29
30
31
32
33
34
35
36

SOC: Power (1/3)
SOC: Power (2/3)
SOC: Power (3/3)
NAND
SYSTEM POWER: PMU Bucks (1/4)
SYSTEM POWER: PMU Bucks (2/4)
SYSTEM POWER: PMU LDOs (3/4)
SYSTEM POWER: PMU (4/4)
SYSTEM POWER: Boost
SYSTEM POWER: B2B Battery
SYSTEM POWER: Charger
SYSTEM POWER: Iktara
SYSTEM POWER: B2B Cyclone + Button
SENSORS

test_mlb
test_mlb
test_mlb
test_mlb

10/17/2016
10/17/2016
10/17/2016

10/13/2016
test_mlb 10/13/2016
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb

test_mlb
test_mlb

10/13/2016

10/13/2016

11/01/2016

10/13/2016

10/13/2016

10/13/2016

10/13/2016

10/13/2016

C

B

27
28
29
30
31
32

34
35
36
37
38
39
40

37
38
39
40
41
42
4333
44
45
46
47 test_mlb
48

CAMERA: PMU (1/2)
CAMERA: PMU (2/2)
CAMERA: B2B Wide (WY)
CAMERA: B2B Tele (MT)
CAMERA: Strobe Drivers
CAMERA: B2B FCAM
CAMERA: B2B Strobe + Hold Button
PEARL: Power
PEARL: B2B Romeo + Juliet
PEARL: B2B Rosaline + Misc
AUDIO: CODEC (1/2)
AUDIO: CODEC (2/2)

test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb

test_mlb

49 AUDIO: Speaker Amp Bottom
50

AUDIO: Speaker Amp Top

10/13/2016

10/13/2016

10/13/2016

10/13/2016

10/13/2016

10/13/2016

10/13/2016

10/13/2016

B

10/13/2016

10/13/2016

10/13/2016

10/13/2016

08/25/2015

08/25/2015

A

41
42
43
44
45

51
56
57
58
59

ARC: Driver
CG: Power Supplies - Touch & Display
CG: B2B Display
CG: B2B Orb & Touch
I/O: Overvoltage Cut-Off Circuit

BOM:639-04583 (Ultimate)
BOM:639-03409 (Extreme)
MCO:056-04077

1 SCH051-02221 SCH,MLB_TOP,X891 COMMON

820-00863 1 PCB,MLB_TOP,X891

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

NO

BOM OPTIONCRITICAL

COMMONNOPCB

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

test_mlb
test_mlb
test_mlb

sync

10/13/2016

10/13/2016

10/13/2016

08/25/2015

01/10/2017

TABLE OF CONTENTS

DRAWING TITLE

SCH,MLB,TOP,X891

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

1 OF 80

SHEET

1 OF 51

A

SIZEDRAWING NUMBER

D

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

3

124567

678

3 245

1

D

EEEE Codes

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

825-7691

825-7691

1

EEEE FOR (MLB_TOP,639-04583,ULTIMATE)

EEEE FOR (MLB_TOP,639-03409,EXTREME)

1

EEEE_J2WJ

EEEE_HP26

NO

NO

SOC

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

339S00358 CRITICAL1 COMMON

339S00359 DDR-H,3G, B0

SKYE+3GB, B0, M, DEV

PART NUMBER

339S00358

339S00358

339S00358

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

U1000

U1000339S00361 DDR-S-18,3G, B0

U1000

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

TABLE_ALT_ITEM

DDR-S-20,3G, B0U1000339S00360

TABLE_ALT_ITEM

BOM OPTIONCRITICAL

ULTIMATE

EXTREME

BOM OPTIONCRITICAL

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

Global Ferrites

TABLE_ALT_HEAD

PART NUMBER

155S0610

BOM_TABLE_ALTS

BOM_TABLE_ALTS

ALL155S00194

ALL155S0610155S00200

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

FERR BD, 150OHM, TDK

FERR BD, 150OHM, TY

TABLE_ALT_ITEM

TABLE_ALT_ITEM

CRITICAL PART# COMMENT

155S0610

FERR BD, 150OHM, 01005

Global R/C Alternates

TABLE_ALT_HEAD

PART NUMBER

118S0717

138S0652 ALL138S0648

132S0436 ALL132S0400

138S00049

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

ALL118S0764

ALL138S0706138S0739

ALL138S0831

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

RES, 3.92K, 0.1%, 0201

CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO

CAP,CER,X5R,0.22UF,20%,6.3V,20%

CAP,CER,X5R,0.22UF,20%,6.3V,01005

CAP,CER,X5R,2.2UF,20%,6.3V,0201

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

CRITICAL PART# COMMENT

118S0717

138S0652

138S0706

132S0400

138S0831

RES, 3.92K, 0.1%, 0201

CAP,X5R,4.7UF,6.3V,0.65MM,0402

CAP,CER,X5R,0.22UF,20%,6.3V,20%

CAP,CER,X5R,0.22UF,20%,6.3V,01005

CAP,CER,X5R,2.2UF,20%,6.3V,0201

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

Soft-Term Cap Sub BOMs

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

SUBBOM,MLB,TOP,CAP,TYPICAL,X891

1685-00155

SUBBOM_CAP CRITICAL COMMON

Agnes Input

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA

CAP,TYPICAL,2.2UF,6.3V,0201,MURATA

Agnes Output

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

9

138S00159

138S0831 TYPICAL_CAPCRITICAL

CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA

CAP,TYPICAL,2.2UF,6.3V,0201,MURATA

9

C2900,C2901,C2903,C2906,C2907,C2910,C2911,C2913,C2914

C2900,C2901,C2903,C2906,C2907,C2910,C2911,C2913,C2914

Sensors

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

138S00159 SOFT_CAPCRITICALC3602,C3622

CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA

2

CAP,TYPICAL,2.2UF,6.3V,0201,MURATA

BOM OPTIONCRITICAL

BOM OPTIONCRITICAL

SOFT_CAPCRITICALC2970,C2971,C2980,C29814138S00159

TYPICAL_CAPCRITICALC2970,C2971,C2980,C2981138S0831 4

BOM OPTIONCRITICAL

SOFT_CAPCRITICAL

BOM OPTIONCRITICAL

TYPICAL_CAPCRITICALC3602,C36222138S0831

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

D

C

B

A

NAND

Ultimate

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

CRITICAL ULTIMATE1335S00287 HYNIX, 3DV3, ULTIMATE U2600

TABLE_ALT_HEAD

PART NUMBER

335S00284 335S00287

335S00287335S00288 U2600

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

U2600BOM_TABLE_ALTS

U2600335S00285 335S00287

U2600335S00286 335S00287

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

TOSHIBA, 1Z, ULTIMATE

TABLE_ALT_ITEM

TOSHIBA, BICS3, ULTIMATE

TABLE_ALT_ITEM

SANDISK, BICS3, ULTIMATE

TABLE_ALT_ITEM

SAMSUNG, 3DV4, ULTIMATE

Extreme

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

1335S00240 EXTREMECRITICALHYNIX, 3DV3, EXTREME U2600

TABLE_ALT_HEAD

PART NUMBER

335S00228 335S00240

335S00247 335S00240

335S00276 335S00240

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

U2600

U2600

U2600

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

TOSHIBA, BICS3, EXTREME

TABLE_ALT_ITEM

SANDISK, BICS3, EXTREME

TABLE_ALT_ITEM

SAMSUNG, 3DV4, EXTREME

Global Capacitors

TABLE_ALT_HEAD

PART NUMBER

BOM_TABLE_ALTS

138S00150 138S00149 ALL

138S00151

PART NUMBER

138S00143 ALL138S00144

138S00163

138S00144

PART NUMBER

138S00139138S00138 ALL

138S00164 ALL138S00139

PART NUMBER

138S00145 138S00146 ALL

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

PART NUMBER

138S00140

138S00142

138S00166

138S00141

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

ALL138S00148 138S00149

ALL138S00149

ALL

ALL138S00146138S00165

ALL138S00141

ALL

ALL138S00141

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

0402-3T,10.5uF@1V, Kyocera

TABLE_ALT_ITEM

0402-3T,10.5uF@1V, SEMCO

TABLE_ALT_ITEM

0402-3T,10.5uF@1V, TY

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

0402,16uF@1V, Kyocera

TABLE_ALT_ITEM

0402,16uF@1V, Taiyo

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

0201,3uF@1V, Kyocera

TABLE_ALT_ITEM

0201,3uF@1V, Taiyo

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

0402,5.1uF@3V, Kyocera

TABLE_ALT_ITEM

0402,5.1uF@3V, Taiyo

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

0201,1.1uF@3V, Kyocera

TABLE_ALT_ITEM

0201,1.1uF@3V, SEMCO

TABLE_ALT_ITEM

0201,1.1uF@3V, Taiyo

CRITICAL PART# COMMENT

138S00149

CRITICAL PART# COMMENT

138S00144

CRITICAL PART# COMMENT

138S00139

CRITICAL PART# COMMENT

138S00146

CRITICAL PART# COMMENT

138S00141

RCAM B2Bs

TABLE_5_HEAD

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

Global Inductors

TABLE_ALT_HEAD

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

152S00710 152S00617

152S00712 ALL

152S00713 ALL

152S00714 ALL

152S00720

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

152S00649 152S00650

PART NUMBER

152S00620

152S00621

152S00622

152S00626

152S00631

152S00623152S00715

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

ALL

ALL152S00716

ALL152S00717

ALL152S00632152S00718

ALL152S00640

ALL152S00641152S00721

ALL

ALL152S00651152S00653

L3340,L3341

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

IND,MLD,0.1UH,20%,6.1A,29MOHM,H=.65,1608

IND,MLD,0.1UH,20%,7.2A,17MOHM,H=0.8,2012

IND,MLD,0.47UH,20%,3.5A,53MO,H=.65,2012

IND,MLD,1.0UH,20%,2.1A,100MO,H=.65,2012

IND,MLD,1.5UH,20%,1.1A,160MO,H=.65,2012

IND,MLD,1.0UH,20%,2.5A,78MO,H=0.8,2012

IND,MLD,1.0UH,20%,3.2A,60MO,H=0.8,2016

IND,MLD,0.47UH,3.8A,55MO,H=0.65MM,2012

IND,MLD,0.47UH,4A,48MO,H=0.8MM,2012

IND,MLD,1UH,3.6A,60MO,H=0.8MM,2016

IND,1.2UH,3A,2016,0.65Z

IND,0.47UH,6.6A,3225,0.8Z

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

CRITICAL PART# COMMENT

152S00617

152S00620

152S00621

152S00622

152S00626

152S00631

152S00632

152S00640

152S00641

152S00623

152S00651

152S00650

IND,MLD,0.1UH,20%,6.1A,29MOHM,H=.65,1608

IND,MLD,0.1UH,20%,7.2A,17MOHM,H=0.8,2012

IND,MLD,0.47UH,20%,3.5A,53MO,H=.65,2012

IND,MLD,1.0UH,20%,2.1A,100MO,H=.65,2012

IND,MLD,1.5UH,20%,1.1A,160MO,H=.65,2012

IND,MLD,1.0UH,20%,2.5A,78MO,H=0.8,2012

IND,MLD,1.0UH,20%,3.2A,60MO,H=0.8,2016

IND,MLD,0.47UH,3.8A,55MO,H=0.65MM,2012

IND,MLD,0.47UH,4A,48MO,H=0.8MM,2012

IND,MLD,1UH,3.6A,60MO,H=0.8MM,2016

IND,1.2UH, 3A, 2016, 0.65Z

IND,0.47UH,6.6A,3225,0.8Z

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

138S0831 TYPICAL_CAPCRITICALC3909,C3925,C4025

Strobe B2B

Audio

Pearl B2B

CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA

3 SOFT_CAPCRITICALC3909,C3925,C4025138S00159

CAP,TYPICAL,2.2UF,6.3V,0201,MURATA

3

CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA

1138S00159

CAP,TYPICAL,2.2UF,6.3V,0201,MURATA

1138S0831

CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA

2138S00159

CAP,TYPICAL,2.2UF,6.3V,0201,MURATA

2138S0831

CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA

CAP,TYPICAL,2.2UF,6.3V,0201,MURATA

1138S0831

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

BOM OPTIONCRITICAL

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

SOFT_CAPCRITICALC4303

TABLE_5_ITEM

C

TYPICAL_CAPCRITICALC4303

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

SOFT_CAPCRITICALC4809,C4805

TABLE_5_ITEM

TYPICAL_CAPCRITICALC4809,C4805

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

SOFT_CAPCRITICALC46131138S00159

TABLE_5_ITEM

TYPICAL_CAPCRITICALC4613

Acorn

TABLE_5_HEAD

0402-3T,10.5uF@1V

0402,16uF@1V

0201,3uF@1V

0402,5.1uF@3V

0201,1.1uF@3V

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_HEADTABLE_ALT_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

XTAL Alternate

TABLE_ALT_HEAD

PART NUMBER

197S0612 197S0446

BOM_TABLE_ALTS

Y1000

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

XTAL, 24M, 1612

CRITICAL PART# COMMENT

TABLE_ALT_ITEM

197S0446

XTAL, 24M, 1612

Multi-Vendor Criticals

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEMTABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

CRITICAL PART# COMMENT

377S0106

197S0446

155S0576

155S00168

138S0979

138S0692

138S0683

138S0652

138S00070

138S00014

132S0664

132S0663

132S0534

132S0436

132S0396

132S0316

132S0304

132S0296

132S0318

SUPPR,TRANS,VARISTOR,12V,33PF,01005

XTAL,24MHZ,30PPM,9.5PF,60 OHM MAX,1612

FERR BD,10 OHM,50%,750MA,0.07 DCR,01005

FLTR,NOISE,65 OHMZ,3.4OHM,0.7-2GHZ,0605

CAP,CER,X5R,10UF,20%,10V,0402,H=0.65MM

CAP,CER,X5R,1UF,20%,6.3V,0201

CAP,CER,X5R,1UF,10%,25V,0402

CAP,CER,X5R,4.7UF,20%,6.3V,H=0.65MM,0402

CAP,X5R,4.7UF,20%,25V,0402

CAP,CER,1UF,20%,16V,X5R,0201,H=0.39MM

CAP,CER,0.047UF,10%,25V,X5R,0201

CAP,CER,X5R,1UF,10%,25V,0402

CAP,CER,X5R,0.1UF,10%,25V,0201

CAP,CER,X5R,0.22UF,20%,6.3V,01005

CAP,CER,X5R,1000PF,10%,10V,01005 CAP,CER,C0G,220PF,5%,10V,01005

CAP,CER,X5R,0.1UF,20%,6.3V,01005

CAP,CER,X5R,0.22UF,20%,6.3V,0201

CAP,CER,X5R,1000PF,10%,6.3V,01005

CAP,CER,X5R,820PF,10%,10V,01005

TABLE_CRITICAL_HEAD

CRITICAL PART# COMMENT

TABLE_CRITICAL_ITEM

132S0288

TABLE_CRITICAL_ITEM

132S0275

TABLE_CRITICAL_ITEM

132S0249

TABLE_CRITICAL_ITEM

132S0245

TABLE_CRITICAL_ITEM

132S00093

TABLE_CRITICAL_ITEM

132S00025

TABLE_CRITICAL_ITEM

132S00008

TABLE_CRITICAL_ITEM

131S0883

TABLE_CRITICAL_ITEM

131S0804

TABLE_CRITICAL_ITEM

131S0307

TABLE_CRITICAL_ITEM

131S0225

TABLE_CRITICAL_ITEM

131S0223

TABLE_CRITICAL_ITEM

131S0220

131S0216

TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM

CAP,CER,X5R,0.1UF,10%,16V,0201

CAP,CER,X5R,470PF,10%,10V,01005

CAP,CER,X7R,220PF,10%,10V,01005

CAP,CER,X5R,0.01UF,10%,6.3V,01005

CAP,X5R,0.022UF,20%,6.3V,01005

CAP,CER,X5R,0.047UF,20%,6.3V,01005

CAP,CER,0.1UF,10%,50V,X7R,0402

CAP,CER,NP0/C0G,220PF,2%,50V,0201

CAP,CER,27PF,5%,C0G,25V,0201

CAP,CER,NP0/C0G,100PF,5%,16V,01005

CAP,CER,NP0/C0G,15PF,5%,16V,01005

CAP,CER,NP0/C0G,27PF,5%,16V,01005

CAP,CER,NP0/C0G,12PF,5%,16V,01005

CAP,CER,NP0/C0G,47PF,5%,16V,01005

131S00053

TABLE_CRITICAL_ITEM

118S00068

TABLE_CRITICAL_ITEM

117S0055

TABLE_CRITICAL_ITEM

107S0257

TABLE_CRITICAL_ITEM

RES,MF,1.3 MOHM,1%,200PPM,1/20W,0201

RES,MF,1/20W,2M OHM,5,0201,SMD

THERMISTOR,NTC,10K OHM,1%,B=3435,01005

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

CODEC

Ansel

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

CAP,SOFT-TERM,10UF,10V,0402,MURATA

2138S00160

CAP,TYPICAL,10UF,10V,0402,MUR/KYO

2138S0979

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

CAP,SOFT-TERM,10UF,10V,0402,MURATA

2138S00160

CAP,TYPICAL,10UF,10V,0402,MUR/KYO

2138S0979

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

CAP,SOFT-TERM,10UF,10V,0402,MURATA

1138S00160

CAP,TYPICAL,10UF,10V,0402,MUR/KYO

1138S0979 CRITICAL

PART NUMBER

685-00155685-00156

BOM_TABLE_ALTS

SYNC_MASTER=test_mlb

PAGE TITLE

SUBBOM_CAP

C4811,C4808 SOFT_CAPCRITICAL

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

SUBBOM,MLB,TOP,CAP,SOFT,X891

SYSTEM:BOM Tables

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

BOM OPTIONCRITICAL

SOFT_CAPCRITICALC5641,C5653

TYPICAL_CAPCRITICALC5641,C5653

BOM OPTIONCRITICAL

TYPICAL_CAPCRITICALC4811,C4808

BOM OPTIONCRITICAL

SOFT_CAPCRITICALC3710

TYPICAL_CAPC3710

DRAWING NUMBER

REVISION

BRANCH

PAGE

SHEET

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

051-02221

9.0.0

evt-1
2 OF 80
2 OF 51

SYNC_DATE=10/13/2016

SIZE

D

B

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

678

3 245

1

FIDUCIALS

FD0401

FID

0P5SQ-CROSS-NSP

1

ROOM=ASSEMBLY

D

CL0400

2.10R1.60-NSP

1

FD0402

FID

0P5SQ-CROSS-NSP

1

ROOM=ASSEMBLY

FD0403

FID

0P5SQ-CROSS-NSP

1

ROOM=ASSEMBLY

FD0404

FID

0P5SQ-CROSS-NSP

1

ROOM=ASSEMBLY

FD0420

FID

0P5SQ-CROSS-NSP

1

ROOM=ASSEMBLY

FD0405

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

D

C

CRITICAL

SB0400

STDOFF-2.9OD1.4ID-0.77H-SM

1

CL0401

2.10R1.60-NSP

1

FD0410

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

FD0411

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

FD0412

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

C

B

CRITICAL

SB0402

STDOFF-MLB-TUBE

1

CL0402

2.10R1.60-NSP

1

B

CRITICAL

1

SH0401

SM

SHLD-EMI-HARD-X891

A

https://www.facebook.com/
Professional.Repairphone

CRITICAL

SB0401

STDOFF-2.9OD1.4ID-0.77H-SM

1

CRITICAL

1

SH0400

SM

SHIELD-EMI-TOP-X891

CL0403

2.10R1.60-NSP

1

PAGE TITLE

SYSTEM: Mechanical Components

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

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SHEET

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A

SIZE

D

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67

35 4

2

1

678

3 245

1

D

C

PP_ROMEO_DENSE_ANODE

34 35

PP_ROMEO_CATHODE

34 35

POWER

TP0540

P2MM-NSM

SM

1

TP0543

P2MM-NSM

1

PP

SM

PP

ROOM=TEST

ROOM=TEST

Test Points

20

XW0510

SHORT-10L-0.05MM-SM

XW0511

SHORT-10L-0.05MM-SM

17 13

PP_GPU

20 6

11 5

32 8

11

11 6

20 6

Probe Points

SOC Debug

PP0500

P2MM-NSM

AP_TO_PMU_TEST_CLKOUT

IN

BOARD_ID0

IN

AP_TO_FCAM_SHUTDOWN_L

IN

8

AP_DEBUG3

IN

DFU_STATUS

IN

PMU_TO_AP_PRE_UVLO_L

IN

AP_TO_PMU_SOCHOT_L

IN

SOC CPU/GPU

21

21

PP_GPU_LVCC

PP_CPU_PCORE_LVCCPP_CPU_PCORE

SM

1

PP

ROOM=TEST

PP0501

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0502

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0503

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0504

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0505

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0506

P2MM-NSM

SM

1

PP

ROOM=TEST

50

50 17 13

26 12

26 12

26 12

26 12

26 12

49 25 12

26 12

48 23

Sensors

SPI_AOP_TO_IMU_SCLK

IN

SPI_AOP_TO_IMU_MOSI

IN

SPI_IMU_TO_AOP_MISO

IN

ACCEL_GYRO_TO_AOP_DATARDY

IN

ACCEL_GYRO_TO_AOP_INT

IN

COMPASS_TO_AOP_INT

IN

PHOSPHORUS_TO_AOP_INT

IN

Hydra VBUS

HYDRA_TO_TIGRIS_VBUS1_VALID_L

IN

PP0540

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0541

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0542

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0544

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0545

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0546

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0547

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0550

P2MM-NSM

SM

1

PP

ROOM=TEST

41 37

41 37

47 10

47 10

50 49 41 25 12

50 49 41 25 12

PDM_CODEC_TO_ARC_CLK

IN

PDM_CODEC_TO_ARC_DATA

IN

AP_BI_CCG2_SWDIO

IN

AP_TO_CCG2_SWCLK

IN

SOC I2C1_AOP

I2C1_AOP_SCL

IN

I2C1_AOP_SDA

IN

PP0582

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0583

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0586

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0587

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0590

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0591

P2MM-NSM

SM

1

PP

ROOM=TEST

D

C

B

20 13

20 13

13

15

15

AP_CPU_PCORE_SENSE

IN

AP_VDD_GPU_SENSE

IN

TP_SOC_SENSE

IN

TP_VSS_CPU_SENSE

IN

TP_VSS_SENSE

IN

PMU

PP0512

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0513

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0514

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0515

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0516

P2MM-NSM

SM

1

PP

ROOM=TEST

16 12

50 16 12

16 10 5

16

16

NAND CCG2

PP0560

P2MM-NSM

SWD_AP_BI_NAND_SWDIO

IN

SWD_AOP_TO_MANY_SWCLK

IN

SPI_S4E_TO_AP_MISO_BOOT_CONFIG2

IN

NAND_ANI1_VREF

IN

NAND_ANI0_VREF

IN

SM

1

PP

ROOM=TEST

PP0561

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0562

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0563

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0564

P2MM-NSM

SM

1

PP

ROOM=TEST

47 10

CCG2_TO_SMC_INT_L

IN

PP0592

P2MM-NSM

SM

1

PP

ROOM=TEST

B

14 12

20 10

48 20 6

16 7

16 7

AOP_TO_DDR_SLEEP1_READY

IN

SPMI_PMU_BI_PMGR_SDATA

IN

PMU_TO_AP_HYDRA_ACTIVE_READY

IN

PCIE Refclk

90_PCIE_AP_TO_NAND_REFCLK_P

IN

90_PCIE_AP_TO_NAND_REFCLK_N

IN

PP0520

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0521

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0522

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0530

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0531

P2MM-NSM

SM

1

PP

ROOM=TEST

34 28

34 20 8

Rigel

CAMPMU_TO_RIGEL_ENABLE

IN

RIGEL_TO_ISP_INT

IN

PP0570

P2MM-NSM

SM

1

PP

ROOM=TEST

PP0571

P2MM-NSM

SM

1

PP

ROOM=TEST

A

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SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

PAGE TITLE

A

SYSTEM: Testpoints (Top)

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

5 OF 80

SHEET

4 OF 51

1

SIZE

D

678

3 245

1

D

11

11

BOARD_REV3

OUT

BOARD_REV2

OUT

R0623

1.00K

1/32W
01005

ROOM=SOC

21

5%
MF

R0622

1.00K

1/32W
01005

ROOM=SOC

21

5%
MF

NOSTUFF

BOOTSTRAPPING:BOARD REV

BOARD ID
BOOT CONFIG

PP1V8_IO

43 35 34 32

30 29 28 27 17 16 14 10 8 7 6

D

C

11

11

11

BOARD_REV1

OUT

BOARD_REV0

OUT

BOARD_ID4

OUT

CKPLUS_WAIVE=SINGLE_NODENET

R0621

1.00K

1/32W
01005

ROOM=SOC

21

5%
MF

R0620

1.00K

1/32W
01005

ROOM=SOC

No connect

21

5%
MF

C

SELECTED -->

B

50 10

11

11

11 4

BOARD_ID3

OUT

CKPLUS_WAIVE=SINGLE_NODENET

PP1V8_IO

OUT

PP1V8_IO

OUT

BOARD_ID0

OUT

On mlb_bot

MAKE_BASE=TRUE

No connect

SELECTED -->

D221 Baseband Selected on RF Board

B

A

16 10 4

16 10

16 10

SPI_S4E_TO_AP_MISO_BOOT_CONFIG2

OUT

SPI_AP_TO_S4E_MOSI_BOOT_CONFIG1

OUT

SPI_AP_TO_S4E_SCLK_BOOT_CONFIG0

OUT

No connect

R0601

4.7K

1/32W
01005

ROOM=SOC

21

1%
MF

R0600

4.7K

1/32W
01005

ROOM=SOC

21

1%
MF

NOSTUFF

SELECTED -->

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Professional.Repairphone

SYNC_MASTER=test_mlb

PAGE TITLE

BOOTSTRAPPING

DRAWING NUMBER

051-02221

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

REVISION

BRANCH

PAGE

6 OF 80

SHEET

5 OF 51

9.0.0
evt-1

SYNC_DATE=10/13/2016

SIZE

D

A

8

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67

35 4

2

1

SOC - USB, JTAG, XTAL

678

3 245

1

VDD11_XTAL:1.06-1.17V @ 2mA MAX

VDD18_USB: 1.62V - 1.98V @ 20mA MAX

D

PP1V8_XTAL

1

C1090

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

FL1092

240-OHM-25%-0.20A-0.9DCR

1

C1092

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

1

C1095

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

01005

ROOM=SOC

PP1V8_IO

43 35 34 32

30 29 28 27 17 16 14 10 8 7 5

D

21

1

C1093

4UF

20%

6.3V

2

CER-X5R
0201

ROOM=SOC

3.14-3.46V @ 12mA MAX

PP3V3_USB

19

AP_USB_REXT

6

USB Reference

1

R1000

200

1%
1/32W
MF
01005

2

ROOM=SOC

C

NC
NC

BA4
AY4

AT7

VDD12_UH1_HSIC0

UH1_HSIC0_DATA
UH1_HSIC0_STB

AP14

OMIT_TABLE

U1000

TMIT78B0-C4

WLCSP

SYM 1 OF 16

ROOM=SOC

CRITICAL

AU28

VDD18_USB

VDD18_XTAL

AN15

AN14

VDD33_USB

VDD_FIXED_USB

ANALOGMUX_OUT

AT27

(Analog)

0.765V - 0.84V @ 5mA MAX

PP0V8_SOC_FIXED_S1

AP_TO_PMU_AMUX_OUT

OUT

17 14 13 9 8 7

C

20

B

20

PMU_TO_SYSTEM_COLD_RESET_L

IN

MAKE_BASE=TRUE

R1020

10K

21

5%

1/32W

MF

01005

MAKE_BASE=TRUE

48

48

48 20 4

20 4

16

16

GND

SWD_DOCK_BI_AP_SWDIO

BI

SWD_DOCK_TO_AP_SWCLK

IN

PMU_TO_SYSTEM_COLD_RESET_R_L
PMU_TO_AP_HYDRA_ACTIVE_READY

IN

AP_TO_PMU_TEST_CLKOUT

OUT

AP_TO_NAND_RESET_L

OUT

OUT

AP_TO_NAND_FW_STRAP
GND
GND

NC
NC
NC

AT8

AV6

AT9
AT12
AT10
AT13

AU7
AT34

AV5

V2

AF34

AG38

W5
W4

JTAG_SEL

JTAG_TRST*
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK

COLD_RESET*
CFSB

CFSB_AON
TST_CLKOUT
SSD_RESET*

SSD_BFH

HOLD_RESET
TESTMODE

USB_DP

USB_DM

USB_VBUS

USB_ID

USB_REXT

CPU_TRIGGER0
CPU_TRIGGER1

GPU_TRIGGER0
GPU_TRIGGER1

SOCHOT1

DROOP

WDOG

XI0

XO0

AY6
BA6

AV7

AW6

AU8

AT22
AW21

AD2
AD3

A30
B31

AW5
BA28

BA27

NC

90_USB_AP_DATA_P
90_USB_AP_DATA_N

USB_VBUS_DETECT

AP_USB_REXT

PMU_TO_AP_THROTTLE_PCORE_L
PMU_TO_AP_THROTTLE_ECORE_L

PMU_TO_AP_THROTTLE_GPU0_L
PMU_TO_AP_THROTTLE_GPU1_L

AP_TO_PMU_SOCHOT_L
PMU_TO_AP_PRE_UVLO_L
AP_TO_PMU_WDOG_RESET

XTAL_AP_24M_IN

XTAL_AP_24M_OUT

6

BI
BI

IN

IN
IN

IN
IN

OUT

IN

OUT

23

20

20

20

20

20

48

48

B

20 4

20 11 4

NOSTUFF

1

R1010

511K

1%
1/32W
MF
01005

2

ROOM=SOC

R1011

1.00K

5%

1/32W

MF

01005

ROOM=SOC

24.000MHZ-30PPM-9.5PF-60OHM

21

SOC_24M_O

1

C1010

12PF

5%
16V

2

CERM
01005

ROOM=SOC

ROOM=SOC

Y1000

1.60X1.20MM-SM

31

42

1

C1011

12PF

5%
16V

2

CERM
01005

ROOM=SOC

A

8

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SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/17/2016

A

SOC: JTAG,USB,XTAL

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

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2

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10 OF 80

SHEET

6 OF 51

1

SIZE

D

SOC - PCIE INTERFACES

678

3 245

1

D

C

PCIe BB CLKREQ PU on BB domain

PCIe Clock Request Pull-Ups

29 28 27 17 16 14 10 8 7 6 5

PCIE_NAND_BI_AP_CLKREQ_L

16 7

PCIE_WLAN_BI_AP_CLKREQ_L

50 7

43 35 34 32 30

PP1V8_IO

R1100

100K

5%

1/32W

MF

01005

ROOM=SOC

1

2

R1130

PCIe Reset Pull-Downs

PCIE_AP_TO_WLAN_RESET_L

50 7

PCIE_AP_TO_BB_RESET_L

50 7

PCIE_AP_TO_NAND_RESET_L

16 7

R1101

100K

5%

1/32W

MF

01005

ROOM=SOC

1

2

R1121

100K

1/32W
01005

ROOM=SOC

100K

1/32W
01005

ROOM=SOC

5%
MF

5%
MF

(Analog)

R1198

19 14 13 9

1

2

1

2

R1131

ROOM=SOC

100K

5%

1/32W

MF

01005

1

2

PP1V2_SOC

0.00

0%

1/32W

MF

01005

ROOM=SOC

21

VDD12_PCIE_REFBUF:1.08V - 1.26V @ 30mA MAX

1

C1198

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

AM31

AP26

AN26

VDD12_PCIE_REFBUF

VDD12_PCIE_REFBUF

AM29

VDD18_PCIE

VDD18_PCIE

ROOM=SOC

U1000

AP29

AN30

VDD_FIXED_PCIE_ANA

VDD_FIXED_PCIE_ANA

AP31

VDD_FIXED_PCIE_ANA

AP27

AM27

VDD_FIXED_PCIE_REFBUF

VDD_FIXED_PCIE_REFBUF

1

C1199

4UF

20%

6.3V

2

CER-X5R
0201

ROOM=SOC

PP0V8_SOC_FIXED_PCIE_REFBUF

1

C1194

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

R1194

0.00

1/32W
01005

ROOM=SOC

21

0%
MF

VDD_FIXED_PCIE_REFBUF:0.765V - 0.84V @ 9mA MAX

VDD_FIXED_PCIE_ANA:0.765V - 0.84V @ 131mA MAX

1

C1193

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

1

C1192

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=SOC

1.62V - 1.98V @ 81mA MAX

PP1V8_IOPP1V2_SOC_PCIE_REFBUF

(Analog)

PP0V8_SOC_FIXED_S1

1

C1191

4UF

20%

6.3V

2

CER-X5R
0201

ROOM=SOC

43 35 34 32 30

17 14 13 9 8 6

29 28 27 17 16 14 10 8 7 6 5

TMIT78B0-C4

WLCSP

D

C

B

16

IN

16

IN

16

OUT

16

PCIE LINK 0

OUT

90_PCIE_NAND_TO_AP_RXD_P
90_PCIE_NAND_TO_AP_RXD_N

90_PCIE_AP_TO_NAND_TXD_P
90_PCIE_AP_TO_NAND_TXD_N

0.22UF

0.22UF

0.22UF

0.22UF

2 1

6.3V

01005

ROOM=SOC

2 1

6.3V 20%

01005

ROOM=SOC

2 1

6.3V 20%

01005

ROOM=SOC

2 1

6.3V

01005

ROOM=SOC

20%
X5R

C1101

X5R

C1102

X5R

C1103

20%
X5R

C1100

GND_VOID

GND_VOID

GND_VOID

GND_VOID

16 7

16 4

16 4

16 7

PCIE_NAND_BI_AP_CLKREQ_L

BI

90_PCIE_AP_TO_NAND_REFCLK_P

OUT

90_PCIE_AP_TO_NAND_REFCLK_N

OUT

90_PCIE_NAND_TO_AP_RXD_C_P
90_PCIE_NAND_TO_AP_RXD_C_N

90_PCIE_AP_TO_NAND_TXD_C_P
90_PCIE_AP_TO_NAND_TXD_C_N

PCIE_AP_TO_NAND_RESET_L

OUT

NC
NC

NC

AL38

AW27

AV27

AV29

AW29

AY30
BA30

AJ37

AL37

AW26

AY26

PCIE_CLKREQ0*
PCIE_REF_CLK0_P

PCIE_REF_CLK0_N

PCIE_RX0_P
PCIE_RX0_N

PCIE_TX0_P
PCIE_TX0_N

PCIE_PERST0*

PCIE_CLKREQ1*
PCIE_REF_CLK1_P

PCIE_REF_CLK1_N

SYM 2 OF 16

LINK3LINK0

PCIE_CLKREQ3*

PCIE_REF_CLK3_P
PCIE_REF_CLK3_N

PCIE_RX3_P
PCIE_RX3_N

PCIE_TX3_P

PCIE_TX3_N

PCIE_PERST3*

PCIE_CLKREQ2*

PCIE_REF_CLK2_P
PCIE_REF_CLK2_N

AJ36
AY24

BA24

BA36
AY36

AV35
AW35

AH36

AK37
AV25

AW25

PCIE_WLAN_BI_AP_CLKREQ_L

90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N

90_PCIE_WLAN_TO_AP_RXD_C_P
90_PCIE_WLAN_TO_AP_RXD_C_N

90_PCIE_AP_TO_WLAN_TXD_C_P
90_PCIE_AP_TO_WLAN_TXD_C_N

PCIE_AP_TO_WLAN_RESET_L

PCIE_BB_BI_AP_CLKREQ_L

BI

OUT
OUT

OUT

BI

50

50

50

50 7

6.3V

ROOM=SOC

6.3V

ROOM=SOC

6.3V

ROOM=SOC

6.3V20%

ROOM=SOC

21

0.1UF

01005

21

0.1UF

01005

21

0.1UF

01005

21

0.1UF

01005

1

C1124

4.7PF

+/-0.1PF
16V

2

NP0-C0G
01005

ROOM=SOC

1

C1125

4.7PF

+/-0.1PF
16V

2

NP0-C0G
01005

ROOM=SOC

90_PCIE_WLAN_TO_AP_RXD_P
90_PCIE_WLAN_TO_AP_RXD_N

90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_WLAN_TXD_N

90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_REFCLK_N

IN
IN

OUT
OUT

OUT
OUT

50

50

50

50

50

50

B

C1130

GND_VOID

20%

X5R-CERM

C1131

GND_VOID

20%

X5R-CERM

C1132

GND_VOID

20%

X5R-CERM

C1133

50 7

GND_VOID

X5R-CERM

A

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Professional.Repairphone

NC
NC

NC
NC

NC

AV31

AW31

AY32
BA32

AK38

AU30
AT30

PCIE_RX1_P
PCIE_RX1_N

PCIE_TX1_P
PCIE_TX1_N

PCIE_PERST1*

PCIE_EXT_REF_CLK_P
PCIE_EXT_REF_CLK_N

LINK1 LINK2

PCIE_RX2_P
PCIE_RX2_N

PCIE_TX2_P
PCIE_TX2_N

PCIE_PERST2*

PCIE_REXT

BA34
AY34

AV33
AW33

AJ38

AU32

90_PCIE_BB_TO_AP_RXD_C_P
90_PCIE_BB_TO_AP_RXD_C_N

90_PCIE_AP_TO_BB_TXD_C_P
90_PCIE_AP_TO_BB_TXD_C_N

AP_PCIE_RCAL

PCIE_AP_TO_BB_RESET_L

1

R1150

200

1%
1/32W
MF
01005

2

ROOM=SOC

OUT

21

6.3V
01005

21

6.3V
01005

21

6.3V
01005

21

6.3V
01005

0.1UF

0.1UF

0.1UF

0.1UF

PAGE TITLE

90_PCIE_BB_TO_AP_RXD_P
90_PCIE_BB_TO_AP_RXD_N

90_PCIE_AP_TO_BB_TXD_P
90_PCIE_AP_TO_BB_TXD_N

IN
IN

OUT
OUT

50

50

50

50

PCIE LINK 2 PCIE LINK 3

SYNC_DATE=10/17/2016SYNC_MASTER=test_mlb

A

C1120

GND_VOID

20%

X5R-CERM

ROOM=SOC

C1121

GND_VOID

20%

X5R-CERM

ROOM=SOC

C1122

GND_VOID

20%

X5R-CERM

ROOM=SOC

C1123

50 7

GND_VOID

20%

X5R-CERM

ROOM=SOC

SOC: PCIE

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

11 OF 80

SHEET

7 OF 51

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

678

3 245

1

D

SOC - MIPI & ISP INTERFACES

MIPI Lane & Polarity Swapping

17 14 13 9 7 6

(Analog)

0.765V - 0.84V @ 40mA MAX

PP0V8_SOC_FIXED_S1

20%

6.3V

1

2

C1290

0.1UF 2.2UF

X5R-CERM

01005

ROOM=SOC

C1291

2.2UF

20%

6.3V

X5R-CERM

0201

ROOM=SOC

ISP I2C0

29 28 27 17 16 14 10 8 7 6 5

43 35 34 32 30

1.62V - 1.98V @ 10mA MAX

PP1V8_IO

43 35 34 32

1

2

G14

G12

F13

F11

VDD18_MIPI

1

C1295

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1296

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

30 29 28 27 17 16 14 10 8 7 6 5

29 28 27 17 16 14 10 8 7 6 5

43 35 34 32 30

PP1V8_IO

29 8

I2C0_ISP_SCL

29 8

I2C0_ISP_SDA

ISP I2C1

PP1V8_IO

1

R1201

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

1

R1211

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

1

R1202

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

1

R1212

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

D

C

35

35

35

35

35

35

32

32

32

32

FCAM MIPI Juliet MIPI

32

32

43

43

43

43

43

43

43

43

90_MIPI_JULIET_TO_AP_DATA0_P

BI

90_MIPI_JULIET_TO_AP_DATA0_N

BI

90_MIPI_JULIET_TO_AP_DATA1_P

IN

90_MIPI_JULIET_TO_AP_DATA1_N

IN

90_MIPI_JULIET_TO_AP_CLK_N

IN

90_MIPI_JULIET_TO_AP_CLK_P

IN

90_MIPI_FCAM_TO_AP_DATA0_N

BI

90_MIPI_FCAM_TO_AP_DATA0_P

BI

90_MIPI_FCAM_TO_AP_DATA1_N

IN

90_MIPI_FCAM_TO_AP_DATA1_P

IN

90_MIPI_FCAM_TO_AP_CLK_P

IN

90_MIPI_FCAM_TO_AP_CLK_N

IN

90_MIPI_AP_TO_DISPLAY_DATA0_P

BI

90_MIPI_AP_TO_DISPLAY_DATA0_N

BI

90_MIPI_AP_TO_DISPLAY_DATA1_P

OUT

90_MIPI_AP_TO_DISPLAY_DATA1_N

OUT

90_MIPI_AP_TO_DISPLAY_DATA3_P

OUT

90_MIPI_AP_TO_DISPLAY_DATA3_N

OUT

90_MIPI_AP_TO_DISPLAY_DATA2_N

OUT

90_MIPI_AP_TO_DISPLAY_DATA2_P

OUT

Display MIPI

43

43

90_MIPI_AP_TO_DISPLAY_CLK_N

OUT

90_MIPI_AP_TO_DISPLAY_CLK_P

OUT

MAKE_BASE
MAKE_BASE

MAKE_BASE
MAKE_BASE

MAKE_BASE
MAKE_BASE

MAKE_BASE
MAKE_BASE

MAKE_BASE
MAKE_BASE

MAKE_BASE
MAKE_BASE

MAKE_BASE
MAKE_BASE

MAKE_BASE
MAKE_BASE

MAKE_BASE
MAKE_BASE

MAKE_BASE
MAKE_BASE

90_MIPI_JULIET_TO_AP_DATA0_P
90_MIPI_JULIET_TO_AP_DATA0_N

90_MIPI_JULIET_TO_AP_DATA1_P
90_MIPI_JULIET_TO_AP_DATA1_N

90_MIPI_JULIET_TO_AP_CLK_N
90_MIPI_JULIET_TO_AP_CLK_P

MIPI0C_REXT

8

MIPI1C_REXT

8

90_MIPI_FCAM_TO_AP_DATA0_N
90_MIPI_FCAM_TO_AP_DATA0_P

90_MIPI_FCAM_TO_AP_DATA1_N
90_MIPI_FCAM_TO_AP_DATA1_P

90_MIPI_FCAM_TO_AP_CLK_P
90_MIPI_FCAM_TO_AP_CLK_N

90_MIPI_AP_TO_DISPLAY_DATA1_P
90_MIPI_AP_TO_DISPLAY_DATA1_N

90_MIPI_AP_TO_DISPLAY_DATA3_P
90_MIPI_AP_TO_DISPLAY_DATA3_N

90_MIPI_AP_TO_DISPLAY_DATA2_N
90_MIPI_AP_TO_DISPLAY_DATA2_P

90_MIPI_AP_TO_DISPLAY_CLK_N
90_MIPI_AP_TO_DISPLAY_CLK_P

B12
A12

B14
A14

A13
B13

D12
D13

B17
A17

B15

A15

A16
B16

A10

B10

B9

A9

A7

B7

A6
B6

A8
B8

MIPI0C_DPDATA0
MIPI0C_DNDATA0

MIPI0C_DPDATA1
MIPI0C_DNDATA1

MIPI0C_DPCLK
MIPI0C_DNCLK

MIPI0C_REXT
MIPI1C_REXT

MIPI1C_DPDATA0
MIPI1C_DNDATA0

MIPI1C_DPDATA1
MIPI1C_DNDATA1

MIPI1C_DPCLK
MIPI1C_DNCLK

MIPID_DPDATA0
MIPID_DNDATA0

MIPID_DPDATA1
MIPID_DNDATA1

MIPID_DPDATA2
MIPID_DNDATA2

MIPID_DPDATA3
MIPID_DNDATA3

MIPID_DPCLK
MIPID_DNCLK

VDD_FIXED_MIPI

U1000

TMIT78B0-C4

WLCSP

SYM 3 OF 16

ROOM=SOC

ISP_I2C0_SCL

ISP_I2C0_SDA

ISP_I2C1_SCL

ISP_I2C1_SDA

ISP_I2C2_SCL

ISP_I2C2_SDA

ISP_I2C3_SCL

ISP_I2C3_SDA

SENSOR_INT

SENSOR0_CLK
SENSOR1_CLK
SENSOR2_CLK

SENSOR0_RST
SENSOR1_RST
SENSOR2_RST
SENSOR3_RST
SENSOR4_RST

SENSOR0_ISTRB
SENSOR1_ISTRB

W35
V38

W36
Y36

Y34
Y38

AA37
AB38

AB36

U38
R38
R37

V34
U35
AB34
AC37
AA35

V36
U36

NC

NC

I2C0_ISP_SCL
I2C0_ISP_SDA

I2C1_ISP_SCL
I2C1_ISP_SDA

I2C2_ISP_SCL
I2C2_ISP_SDA

I2C3_ISP_SCL
I2C3_ISP_SDA

RIGEL_TO_ISP_INT

AP_TO_WIDE_CLK_R
AP_TO_TELE_CLK_R

AP_TO_FCAM_JULIET_RIGEL_CLK_R

AP_TO_JULIET_SHUTDOWN_L

AP_TO_TELE_SHUTDOWN_L
AP_TO_WIDE_SHUTDOWN_L

AP_TO_FCAM_SHUTDOWN_L

AP_DEBUG3

OUT

BI

OUT

BI

OUT

BI

OUT

BI

IN

OUT
OUT
OUT

OUT

OUT

35

30

29

4

30 8

I2C1_ISP_SCL

30 8

I2C1_ISP_SDA

29 8

29 8

29 28 27 17 16 14 10 8 7 6 5

30 8

30 8

32 8

32 8

35 34 31 28 8

35 34 31 28 8

43 35 34 32 30

ISP I2C2

PP1V8_IO

32 8

I2C2_ISP_SCL

32 8

I2C2_ISP_SDA

1

R1221

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

1

R1222

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

C

R1240

33.2

34 20 4

1/32W
01005

ROOM=SOC

21

1%
MF

R1241

33.2

1/32W
01005

ROOM=SOC

21

1%
MF

R1242

33.2

1/32W
01005

32 4

ROOM=SOC

21

1%
MF

AP_TO_FCAM_JULIET_CLK

AP_TO_WIDE_CLK

AP_TO_TELE_CLK

OUT

OUT

OUT

29

29 28 27 17 16 14 10 8 7 6 5

30

35 32

43 35 34 32 30

35 34 31 28 8

35 34 31 28 8

ISP I2C3

PP1V8_IO

I2C3_ISP_SCL
I2C3_ISP_SDA

1

R1231

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

1

R1232

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

R1243

33.2

1%

1/32W

MF

01005

ROOM=SOC

21

AP_TO_RIGEL_CLK

OUT

34

B

50 28 21 20 12

43

AP_TO_MANY_BSYNC

OUT

DISPLAY_TO_AP_ALIVE

IN

MIPID_REXT

8

NC

NC
NC

NC

AA3

AB4

AB6

D11

AA4
AA5

Y4

DISP_TOUCH_BSYNC0
DISP_TOUCH_BSYNC1

DISP_TOUCH_EB

MIPID_REXT

DISP_I2C_SCL
DISP_I2C_SDA

DISP_POL

SENSOR0_XSHUTDOWN
SENSOR1_XSHUTDOWN

U37
T37

NC

ISP_TO_DISPLAY_FLASH_INT

OUT

43

B

A

MIPI Reference

200

1%

1/32W

MF

01005

ROOM=SOC

1

2

R1252

200

1%

1/32W

MF

01005

ROOM=SOC

R1250

200

1%

1/32W

MF

01005

ROOM=SOC

1

2

R1251

8

MIPI0C_REXT
MIPI1C_REXT

MIPID_REXT

1

8

8

8

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/13/2016

A

SOC: MIPI & ISP

DRAWING NUMBER

2

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

12 OF 80

SHEET

8 OF 51

1

SIZE

D

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

SOC - LPDP

19 14 13 7

678

VDD12_PLL_LPDP 1.14V - 1.26V @ 10mA MAX
VDD12_LPDP 1.14V - 1.26V @ 72mA MAX

PP1V2_SOC

3 245

(Analog)
VDD_FIXED_PLL_LPDP 0.765V - 0.84V @ 3mA MAX
VDD_FIXED_LPDP_TX 0.765V - 0.84V @ 16mA MAX
VDD_FIXED_LPDP_RX 0.765V - 0.84V @ 30mA MAX

PP0V8_SOC_FIXED_S1

1

17 14 13 9 8 7 6

D

1

C1390

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1391

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1392

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

1

C1393

0.01UF

10%

6.3V

2

X5R
01005

ROOM=SOC

1

C1394

15PF2.2UF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=SOC

Desense for Wifi frequencies

M9

VDD12_LPDP_TX

F16

F17

F15

VDD12_LPDP_RX

T9

VDD12_PLL_LPDP

R9

P9

VDD_FIXED_LPDP_TX

VDD_FIXED_PLL_LPDP

G18

G16

VDD_FIXED_LPDP_RX

1

C1395

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1396

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

D

C

29

29

29

29

29

29

30

30

30

30

90_LPDP_WIDE_TO_AP_D0_P

IN

90_LPDP_WIDE_TO_AP_D0_N

IN

90_LPDP_WIDE_TO_AP_D1_P

IN

90_LPDP_WIDE_TO_AP_D1_N

IN

90_LPDP_WIDE_TO_AP_D2_P

IN

90_LPDP_WIDE_TO_AP_D2_N

IN

90_LPDP_TELE_TO_AP_D0_P

IN

90_LPDP_TELE_TO_AP_D0_N

IN

90_LPDP_TELE_TO_AP_D1_P

IN

90_LPDP_TELE_TO_AP_D1_N

IN

A26
B26

A25
B25

A24
B24

A21
B21

A20
B20

LPDPRX_RX_D0_P
LPDPRX_RX_D0_N

LPDPRX_RX_D1_P
LPDPRX_RX_D1_N

LPDPRX_RX_D2_P
LPDPRX_RX_D2_N

LPDPRX_RX_D3_P
LPDPRX_RX_D3_N

LPDPRX_RX_D4_P
LPDPRX_RX_D4_N

U1000

TMIT78B0-C4

WLCSP

SYM 4 OF 16

LPDP_TX0P
LPDP_TX0N

LPDP_TX1P
LPDP_TX1N

LPDP_TX2P
LPDP_TX2N

LPDP_TX3P
LPDP_TX3N

M3
M4

L4
L5

K3
K4

J4
J5

NC
NC

NC
NC

NC
NC

NC
NC

C

B

17 14 13 9 8 7 6

30

IN

30

IN

29

BI

30

BI

MAKE_BASE=TRUE

PP0V8_SOC_FIXED_S1

300

1%

1/32W

MF

1

2

R1300

01005-1

ROOM=SOC

90_LPDP_TELE_TO_AP_D2_P
90_LPDP_TELE_TO_AP_D2_N

LPDP_WIDE_BI_AP_AUX

LPDP_TELE_BI_AP_AUX

GND
GND

AP_LPDPRX_RCAL_NEG

NC
NC

NC
NC

A19
B19

D21
D20
D19
D17
D16
D15

A22
B22

B23

A23

LPDPRX_RX_D5_P
LPDPRX_RX_D5_N

LPDPRX_AUX_D0_P
LPDPRX_AUX_D1_P
LPDPRX_AUX_D2_P
LPDPRX_AUX_D3_P
LPDPRX_AUX_D4_P
LPDPRX_AUX_D5_P

LPDPRX_BYP_CLK_P
LPDPRX_BYP_CLK_N

LPDPRX_RCAL_P

LPDPRX_RCAL_N

LPDP_AUX_P
LPDP_AUX_N

LPDP_CAL_DRV_OUT

LPDP_CAL_VSS_EXT

EDP_HPD

DP_WAKEUP

G4
G5

H3
H6

Y6
Y2

NC
NC

NC
NC

NC
NC

B

A

C1301

100PF

5%

16V

NP0-C0G

01005

ROOM=SOC

1

D18

NC

2

LPDPRX_EXT_C

SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

PAGE TITLE

A

SOC: LPDP

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

13 OF 80

SHEET

9 OF 51

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

SOC - SERIAL INTERFACES

678

3 245

1

AP I2C0

29 28 27 17 16 14 10 8 7 6 5

43 35 34 32 30

PP1V8_IO

R1400

2.2K

5%

1/32W

MF

01005

ROOM=SOC

1

2

R1401

2.2K

5%

1/32W

MF

01005

ROOM=SOC

1

2

D

C

B

R1460

38

I2S_AP_TO_CODEC_MCLK1

OUT

33.2

1%

1/32W

MF

01005

ROOM=SOC

R1464

50

I2S_AP_TO_SPKRAMP_TOP_MCLK

OUT

33.2

1%

1/32W

MF

01005

ROOM=SOC

R1465

16 5

SPI_AP_TO_S4E_SCLK_BOOT_CONFIG0

OUT

0.00

0%

1/32W

MF

01005

ROOM=SOC

R1461

50

SPI_AP_TO_RACER_SCLK

OUT

0.00

0%

1/32W

MF

01005

ROOM=SOC

R1462

38

SPI_AP_TO_CODEC_SCLK

OUT

SPI: Route as Daisy-Chain. No T's Allowed

Place series terminations close to SoC Pins

0.00

0%

1/32W

MF

01005

ROOM=SOC

21

21

21

21

21

38

38

38

38

47 4

47 4

38

50

50

50

50

16 5 4

16 5

50 5

50

50

50

38

38

38

I2S_AP_TO_CODEC_MCLK1_R
I2S_AP_TO_CODEC_ASP3_BCLK

OUT

I2S_AP_TO_CODEC_ASP3_LRCLK

OUT

I2S_CODEC_ASP3_TO_AP_DIN

IN

I2S_AP_TO_CODEC_ASP3_DOUT

OUT

I2S_AP_TO_SPKRAMP_TOP_MCLK_R

AP_BI_CCG2_SWDIO

BI

AP_TO_CCG2_SWCLK

OUT

CODEC_TO_AP_INT_L CCG2_TO_SMC_INT_L

IN

I2S_BB_TO_AP_BCLK

OUT

I2S_BB_TO_AP_LRCLK

OUT

I2S_BB_TO_AP_DIN

IN

I2S_AP_TO_BB_DOUT

OUT

SPI_S4E_TO_AP_MISO_BOOT_CONFIG2

IN

SPI_AP_TO_S4E_MOSI_BOOT_CONFIG1

OUT

SPI_AP_TO_S4E_SCLK_BOOT_CONFIG0_R
BOARD_ID3

IN

SPI_RACER_TO_AP_MISO

IN

SPI_AP_TO_RACER_MOSI

OUT

SPI_AP_TO_RACER_SCLK_R
SPI_AP_TO_RACER_CS_L

OUT

SPI_CODEC_TO_AP_MISO

IN

SPI_AP_TO_CODEC_MOSI

OUT

SPI_AP_TO_CODEC_SCLK_R
SPI_AP_TO_CODEC_CS_L

OUT

NC
NC
NC
NC
NC

NC

NC

NC
NC
NC
NC

AV23

AW23

AT24
AT25
AT26

AH34
AG36
AG35
AH38
AG37

AT35

AT36

AR36

AR34

AR35

AG4
AG5
AH2
AH6
AH4

AV22

BA21

BA22

AU22

AU23

AY22

AW22

AT23

AE4
AE2

AD5

AE6

AE38

AE35

AF38

AE37

I2S0_MCK
I2S0_BCLK
I2S0_LRCK
I2S0_DIN
I2S0_DOUT

I2S1_MCK
I2S1_BCLK
I2S1_LRCK
I2S1_DIN
I2S1_DOUT

I2S2_MCK
I2S2_BCLK
I2S2_LRCK
I2S2_DIN
I2S2_DOUT

I2S3_MCK
I2S3_BCLK
I2S3_LRCK
I2S3_DIN
I2S3_DOUT

SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI0_SSIN

SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN

SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN

SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN

U1000

TMIT78B0-C4

WLCSP

SYM 6 OF 16

ROOM=SOC

I2C0_SCL

I2C0_SDA

I2C1_SCL

I2C1_SDA

I2C2_SCL

I2C2_SDA

I2C3_SCL

I2C3_SDA

SMC_I2CM0_SCL

SMC_I2CM0_SDA

SMC_I2CM1_SCL

SMC_I2CM1_SDA

SMC_UART0_RXD

SMC_UART0_TXD

SEP_SPI0_SCLK
SEP_SPI0_MISO
SEP_SPI0_MOSI

SEP_I2C_SCL

SEP_I2C_SDA

SPMI_SCLK

SPMI_SDATA

DWI_CLK

DWI_DO

CLK24M_OUT

NAND_SYS_CLK

AG3
AG2

AD38
AD36

A34
B34

AC36
AC38

AY16
AW16

AT20
AU20

AW19
AW15

AL6

NC

AM5

NC

AM4

AL2

CKPLUS_WAIVE=I2C_PULLUP

AM3

CKPLUS_WAIVE=I2C_PULLUP

AV21
AW20

AE36

NC

AF36

NC

AV19

BA20

IKTARA_TO_SMC_INT

PMU_TO_SEP_DOUBLE_CLICK_DET

SPMI_PMGR_TO_PMU_SCLK_R SPMI_PMGR_TO_PMU_SCLK

SPMI_PMU_BI_PMGR_SDATA

AP_TO_RACER_REF_CLK_R

AP_TO_NAND_SYS_CLK_R

I2C0_AP_SCL
I2C0_AP_SDA

I2C1_AP_SCL
I2C1_AP_SDA

I2C2_AP_SCL
I2C2_AP_SDA

I2C3_AP_SCL
I2C3_AP_SDA

I2C0_SMC_SCL
I2C0_SMC_SDA

I2C1_SMC_SCL
I2C1_SMC_SDA

I2C4_AP_SCL
I2C4_AP_SDA

49 46 20 10

49 46 20 10

I2C0_AP_SCL
I2C0_AP_SDA

D

AP I2C1

PP1V8_IO

R1410

2.2K

5%

1/32W

MF

01005

ROOM=SOC

AP I2C2

PP1V8_IO

R1420

2.2K

5%

1/32W

MF

01005

ROOM=SOC

1

2

1

2

R1411

2.2K

5%

1/32W

MF

01005

ROOM=SOC

R1421

2.2K

5%

1/32W

MF

01005

ROOM=SOC

1

2

1

2

OUT

BI

OUT

BI

OUT

BI

OUT

BI

OUT

BI

OUT

IN

IN
IN

50

29 28 27 17 16 14 10 8 7 6 5

49 46 20 10

49 46 20 10

49 33 10

49 33 10

49 33 10

50 10

50 10

50 42 10

50 42 10

50 47 23 22 21 10

50 47 23 22 21 10

48 10

48 10

47 4

49 33 10

I2C1_AP_SCL
I2C1_AP_SDA

29 28 27 17 16 14 10 8 7 6 5

I2C2_AP_SCL

50 10

I2C2_AP_SDA

50 10

43 35 34 32 30

43 35 34 32 30

AP I2C3

PP1V8_IO

R1430

2.2K

5%

1/32W

MF

01005

ROOM=SOC

1

2

R1431

2.2K

5%

1/32W

MF

01005

ROOM=SOC

1

2

C

10

10

29 28 27 17 16 14 10 8 7 6 5

20

IN

50 42 10

50 42 10

I2C3_AP_SCL
I2C3_AP_SDA

43 35 34 32 30

SMC I2C

48 47 46 38 22 20 17 14 12 10

R1482

0.00

BI

20 4

1/32W
01005

21

0%
MF

ROOM=SOC

OUT

20

50 47 23 22 21 10

50 47 23 22 21 10

I2C0_SMC_SCL
I2C0_SMC_SDA

48 47 46 38 22 20 17 14 12 10

R1481

0.00

0%

1/32W

MF

01005

ROOM=SOC

21

AP_TO_RACER_REF_CLK

OUT

50

I2C1_SMC_SCL

48 10

I2C1_SMC_SDA

48 10

R1480

0.00

0%

1/32W

MF

01005

ROOM=SOC

21

AP_TO_NAND_SYS_CLK

OUT

16

29 28 27 17 16 14 10 8 7 6 5

43 35 34 32 30

PP1V8_S2

50 49

PP1V8_S2

50 49

AP I2C4

PP1V8_IO

R1440

2.2K

5%

1/32W

MF

01005

ROOM=SOC

R1450

4.7K

5%

1/32W

MF

01005

ROOM=SOC

R1470

4.7K

5%

1/32W

MF

01005

ROOM=SOC

1

2

1

2

1

2

R1441

2.2K

5%

1/32W

MF

01005

ROOM=SOC

R1451

4.7K

5%

1/32W

MF

01005

ROOM=SOC

R1471

4.7K

5%

1/32W

MF

01005

ROOM=SOC

1

2

1

2

B

1

2

A

335S00234

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

1 CRITICAL COMMON

WLCSP U1490

TABLE_ALT_HEAD

PART NUMBER

335S00234

BOM_TABLE_ALTS

U1490 U1490335S00233

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

BOM OPTIONCRITICAL

TABLE_5_HEAD

TABLE_5_ITEM

29 28 27 17 16 14 10 8 7 6 5

43 35 34 32 30

PP1V8_IO

1

C1490

0.47UF

20%

6.3V

2

X5R
01005

ROOM=SOC

VCC

U1490

SCL SDA

WLCSP

OMIT_TABLE

VSS

ROOM=SOC

CRITICAL

B2 A1

I2C4_AP_SCL

10

I2C4_AP_SDA

10

A2B1

I2C4_AP_SDA
I2C4_AP_SCL

10

10

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/17/2016

A

SOC: Serial

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

14 OF 80

SHEET

10 OF 51

8

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67

35 4

2

.

1

678

3 245

1

D

C

43

28

50

50

50

50

28

50

50

50

50

50

5 4

50

20

50

50

50 48 20

20

50

50

D

SOC - GPIO INTERFACES

U1000

TMIT78B0-C4

WLCSP

SYM 5 OF 16

ROOM=SOC

TMR32_PWM0
TMR32_PWM1
TMR32_PWM2

UART0_RXD

UART0_TXD

UART1_CTS*
UART1_RTS*

UART1_RXD

UART1_TXD

UART2_CTS*
UART2_RTS*

UART2_RXD

UART2_TXD

UART3_CTS*
UART3_RTS*

UART3_RXD

UART3_TXD

UART4_CTS*
UART4_RTS*

UART4_RXD

UART4_TXD

UART6_RXD

UART6_TXD

UART7_RXD

UART7_TXD

D28
C30
A28

AF3
AF2

P34
L36
P36
M37

B28
B29
C28
B30

D30
B32
C32
D31

K36
M35
N36
N35

AF5
AF4

R5
P2

NC
NC

PMU_TO_AP_PRE_UVLO_L

JULIET_PMU_TO_RIGEL_STROBE_R

WLAN_TO_AP_TIME_SYNC

UART_AP_DEBUG_RXD
UART_AP_DEBUG_TXD

UART_BT_TO_AP_CTS_L
UART_AP_TO_BT_RTS_L

UART_BT_TO_AP_RXD
UART_AP_TO_BT_TXD

UART_GNSS_TO_AP_CTS_L
UART_AP_TO_GNSS_RTS_L

UART_GNSS_TO_AP_RXD
UART_AP_TO_GNSS_TXD

UART_NFC_TO_AP_CTS_L
UART_AP_TO_NFC_RTS_L

UART_NFC_TO_AP_RXD
UART_AP_TO_NFC_TXD

UART_WLAN_TO_AP_CTS_L
UART_AP_TO_WLAN_RTS_L

UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_TXD

UART_ACCESSORY_TO_AP_RXD
UART_AP_TO_ACCESSORY_TXD

IN

IN

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

20 6 4

50

48

48

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

48

48

NC

NC

NC

NC

NC

NC

NC
NC

NC

AL4

T35
R36
P38
R35
N37

L37
K38
K34

L35
D33
C34
D32
D29

B33

A32

P6

P4
R4
R3
R2

T5

T4

T3

T2
U6
U4
U2

V5

V4

V3

AJ3
AJ4
AJ5

AJ6
AK3
AK4
AK5

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37

AP_TO_DISPLAY_RESET_L

OUT

AP_TO_CAMPMU_RESET_L

OUT

AP_TO_NFC_DEV_WAKE

OUT

AP_TO_BB_COREDUMP

OUT

AP_TO_BB_RESET_L

OUT

AP_TO_BB_IPC_GPIO1

OUT

CAMPMU_TO_AP_IRQ_L

IN

AP_TO_GNSS_WAKE

OUT

AP_TO_BT_WAKE

OUT

AP_TO_SPKRAMP_TOP_RESET_L

OUT

AP_TO_NFC_FW_DWLD_REQ

OUT

AP_TO_RACER_RESET_L

OUT

BOARD_ID0

IN

SPKRAMP_TOP_TO_AP_INT_L

IN

PMU_TO_AP_BUTTON_VOL_UP_L

IN

AP_TO_BBPMU_RADIO_ON_L

OUT

AP_TO_WLAN_DEVICE_WAKE

OUT

5

4

5

5

5

5

5

5

PP1V8_IO

IN

PMU_HYDRA_TO_AP_FORCE_DFU

IN

DFU_STATUS

OUT

PP1V8_IO

IN

BOARD_ID4

IN

AP_TO_PMU_AMUX_SYNC

IN

AP_TO_BB_TIME_MARK

OUT

BB_TO_AP_RESET_DETECT_L

IN

BOARD_REV3

IN

BOARD_REV2

IN

BOARD_REV1

IN

BOARD_REV0

IN

NOSTUFF

R1500

200K

1%

1/32W

MF

01005

ROOM=SOC

21

JULIET_PMU_TO_RIGEL_STROBE

OUT

35 34

C

B

20

20

PMU_TO_AP_BUTTON_POWER_KEY_L

IN

PMU_TO_AP_BUTTON_VOL_DOWN_L

IN

AB2
AC4

B

REQUEST_DFU1
REQUEST_DFU2

A

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Professional.Repairphone

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SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/13/2016

A

SOC: GPIO & UART

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

15 OF 80

SHEET

11 OF 51

1

SIZE

D

SOC - AOP

678

3 245

1

1.8V @ 15mA MAX

D

C

AOP I2C Pull-Ups

1

R1620

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

1

R1621

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

50 49 41 38

50 49 41 38

1

R1622

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

IN

IN

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK

PP1V8_S2

1

R1623

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

I2C1_AOP_SCL
I2C1_AOP_SDA
I2C0_AOP_SCL
I2C0_AOP_SDA

26 4

50 49

50 49 41 25 12 4

50 49 41 25 12 4

36 12

36 12

SPI_AOP_TO_IMU_SCLK

OUT

48 47 46 38 22 20 17 14 12 10

50 49

PP1V8_S2

1

C1690

4UF

20%

6.3V

2

CER-X5R
0201

1

C1691

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOCROOM=SOC

D

AP19

AP17

AP15

AP13

VDDIO18_AOP

VDDIO18_AOP

VDDIO18_AOP

VDDIO18_AOP

NC
NC

NC

NC

NC

AT11

AU14

AU13
AW10
AW11

AT16
AV11
AY10
AV12
AY11
AU16
AV16

AT17
AV13

AW12

AV14

AW13

AU17

AV15
AY13
BA11
AV17
BA10
AT18

AW14

AV18
BA12
AY14

AW7

AU10

AV8

AT14

AY8
BA8

AW8

AU11

AT15

AON_DDR_RESET*

AOP_FUNC_0
AOP_FUNC_1
AOP_FUNC_2
AOP_FUNC_3
AOP_FUNC_4
AOP_FUNC_5
AOP_FUNC_6
AOP_FUNC_7
AOP_FUNC_8
AOP_FUNC_9
AOP_FUNC_10
AOP_FUNC_11
AOP_FUNC_12
AOP_FUNC_13
AOP_FUNC_14
AOP_FUNC_15

AOP_FUNC_16
AOP_FUNC_17
AOP_FUNC_18
AOP_FUNC_19
AOP_FUNC_20
AOP_FUNC_21
AOP_FUNC_22
AOP_FUNC_23
AOP_FUNC_24
AOP_FUNC_25
AOP_FUNC_26

AOP_SPI_MISO
AOP_SPI_MOSI
AOP_SPI_SCLK

AOP_UART0_RXD
AOP_UART0_TXD

AOP_UART1_RXD
AOP_UART1_TXD

AOP_UART2_RXD
AOP_UART2_TXD

SPI SCM

AOP_PDM_CLK4

I2C0 SCM

U1000

TMIT78B0-C4

WLCSP

SYM 7 OF 16

ROOM=SOC

AOP_SWD_TCK_OUT

I2C1 SCM

AOP_PDM_CLK0
AOP_PDM_DATA0
AOP_PDM_DATA1

RT_CLK32768

AOP_SWD_TMS0
AOP_SWD_TMS1

SWD_TMS2
SWD_TMS3

AOP_I2CM0_SCL

AOP_I2CM0_SDA

AOP_I2CM1_SCL

AOP_I2CM1_SDA

DOCK_ATTENTION

DOCK_CONNECT

BA16
AW18
AW17

BA18
AV20

AY17
AT21
AC5
AC2

BA9
AV9

AV10
AW9

BA17
AY19

NC

NC

CODEC_TO_AOP_GPIO1
CODEC_TO_AOP_GPIO2

PMU_TO_AOP_CLK32K

SWD_AOP_TO_MANY_SWCLK

SWD_AOP_BI_RACER_SWDIO

SWD_AOP_BI_BB_SWDIO

SWD_AP_BI_NAND_SWDIO

I2C0_AOP_SCL
I2C0_AOP_SDA

I2C1_AOP_SCL
I2C1_AOP_SDA

HYDRA_TO_NUB_INT

HYDRA_TO_NUB_DOCK_CONNECT

IN
IN

IN

OUT

BI
BI
BI

OUT

BI

OUT

BI

IN

IN

38

38

20

48

48

50

50

50 16 4

16 4

36 12

36 12

50 49 41 25 12 4

50 49 41 25 12 4

C

14 4

26 4

26

26 4

48 47 46 38 22 20 17 14 12 10

50 28 21 20 8

26

26 4

35

50

38

20

50 41

50 41

38

49 41 38

36

50

36

AOP_TO_DDR_SLEEP1_READY

OUT

ACCEL_GYRO_TO_AOP_DATARDY

BI

SPI_AOP_TO_ACCEL_GYRO_CS_L

IN

ACCEL_GYRO_TO_AOP_INT

OUT

SPI_AOP_TO_PHOSPHORUS_CS_L

IN

PHOSPHORUS_TO_AOP_INT

OUT

ROMEO_TO_AOP_B2B_DETECT

IN

RACER_TO_AOP_INT_L

IN

AOP_TO_CODEC_RESET_L

OUT

AP_TO_MANY_BSYNC

IN

PMU_TO_AOP_IRQ_L

OUT

AOP_TO_SPKRAMP_BOT_ARC_RESET_L

IN

SPKRAMP_BOT_ARC_TO_AOP_INT_L

OUT

AOP_TO_CODEC_CLP_EN

OUT

I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT

OUT

PROX_BI_AP_AOP_INT_L

IN

HALL3_TO_AOP_IRQ_L

IN

ALS_TO_AOP_INT_L

IN

R1603

49.9

1/32W
01005

ROOM=SOC

21

1%
MF

R1604

49.9

1/32W
01005

ROOM=SOC

21

1%
MF

50 41 38

R1601

49.9

1/32W
01005

ROOM=SOC

21

1%
MF

49 25 4

50

26 4

26 4

50

50

50

50

50

50

COMPASS_TO_AOP_INT

IN

HALL2_TO_AOP_IRQ_L

IN

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_R
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_R
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN

IN

SPI_IMU_TO_AOP_MISO

IN

SPI_AOP_TO_IMU_MOSI

OUT

SPI_AOP_TO_IMU_SCLK_R

UART_BB_TO_AOP_RXD

IN

UART_AOP_TO_BB_TXD

OUT

AOP_TO_WLAN_CONTEXT_A

OUT

AOP_TO_WLAN_CONTEXT_B

OUT

UART_RACER_TO_AOP_RXD

IN

UART_AOP_TO_RACER_TXD

OUT

B

38

I2S_AOP_TO_CODEC_MCLK2

OUT

R1602

33.2

1/32W
01005

ROOM=SOC

21

1%
MF

38

38

38

38

I2S_AOP_TO_CODEC_ASP2_BCLK

OUT

I2S_CODEC_ASP2_TO_AOP_DIN

IN

I2S_AOP_TO_CODEC_MCLK2_R
I2S_AOP_TO_CODEC_ASP2_LRCLK

OUT

I2S_AOP_TO_CODEC_ASP2_DOUT

OUT

BA14

AT19
AU19
BA15

BA13

AOP_I2S0_BCLK
AOP_I2S0_DIN
AOP_I2S0_MCK
AOP_I2S0_LRCK

AOP_I2S0_DOUT

B

A

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SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/17/2016

A

SOC: AOP

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

16 OF 80

SHEET

12 OF 51

1

SIZE

D

678

SOC - CPU, GPU & SOC RAILS

1.06V @ 11.0A MAX

0.8V @ 6A MAX

0.575V @ 2.7A MAX

PP_CPU_PCORE

17 4

3 245

1

D

C

B

ROOM=SOC

C1708

14UF

20%

4V

X5R

0402-D2X-1

1

3

4

2

ROOM=SOC

C1709

14UF

0402-D2X-1

1

0.7V @ 75mA MAX

PP0V7_VDD_LOW_S2

19

1.01V @ 2.1A MAX

0.735V @ 0.6A MAX

PP_CPU_SRAM

17

1.06V @ 1.1A MAX

0.80V @ 0.63A MAX

0.675V @ 0.19A MAX

PP_GPU_SRAM

17

20%
X5R

2

4V

1

C1702

4UF

20%
4V

2

X5R
0201

1

ROOM=SOC

C1704

14UF

20%

4V

X5R

0402-D2X-1

1

432

ROOM=SOC

C1710

14UF

20%

4V

X5R

0402-D2X-1

3

4

1

432

ROOM=SOC

C1705

14UF

20%

4V

X5R

1

432

ROOM=SOC

C1711

14UF

20%

4V

X5R

0402-D2X-1

1

432

ROOM=SOC

C1706

14UF

20%

4V

X5R

0402-D2X-10402-D2X-1

1

432

ROOM=SOC

C1712

14UF

20%

4V

X5R

0402-D2X-1

1

432

ROOM=SOC

C1772

14UF

20%

4V

X5R

0402-D2X-1

1

2

3

4

C1703

4UF

20%
4V

2

X5R
0201

ROOM=SOCROOM=SOC

ROOM=SOC

C1707

0402-D2X-1

1

ROOM=SOC

C1713

14UF

20%
X5R

0402-D2X-1

1

1

C1750

4UF

20%

6.3V

2

CER-X5R
0201

ROOM=SOC

ROOM=SOC

C1773

14UF

20%

4V

X5R

0402-D2X-1

1

14UF

20%

4V

X5R

432

4V

432

432

OMIT

XW1701

SHORT-20L-0.05MM-SM

2 1

ROOM=SOC

AA14
AA16
AB11
AB13
AB15
AB17
AB19
AC20
AD15
AE14

AF20

AG9

AG15

AH10
AH12
AH14
AH16
AH18
AH20

AM15
AM17
AM19
AM21

AN16
AN18
AN20

AA12
AB18

AC9
AC14
AE20

AF14

U14

VDD_CPU

VDD_LOW

VDD_CPU_SRAM

U1000

TMIT78B0-C4

WLCSP

SYM 8 OF 16

ROOM=SOC

BUCK0_FB

VDD_GPU

VDD_ECPU

OUT

17

F25
J16
F31
G20
G22
G24
G26
J28
H11
H15
H19
H23
H31
J12
J18
J22
J24
J26
J30
L16
K17
K29
L12
L18
L22
L28
M23
L24
N22
N24
N28

AA10
U10
U12
V13
V15
Y13
Y15

1

C1730

4UF

20%
4V

2

X5R
0201

ROOM=SOC

ROOM=SOC

C1732

14UF

20%

4V

X5R

0402-D2X-1

1

432

ROOM=SOC

C1737

14UF

20%

4V

X5R

0402-D2X-1

1

432

1

C1731

4UF

20%
4V

2

X5R
0201

ROOM=SOC

ROOM=SOC

C1733

14UF

20%

4V

X5R

0402-D2X-1

1

432

ROOM=SOC

C1738

14UF

20%

4V

X5R

0402-D2X-1

1

432

ROOM=SOC

C1791

14UF

20%

4V

X5R

0402-D2X-1

1

432

ROOM=SOC

C1734

14UF

20%

4V

X5R

0402-D2X-1

1

432

ROOM=SOC

C1739

14UF

20%

4V

X5R

0402-D2X-1

1

432

ROOM=SOC

C1792

14UF

20%

4V

X5R

0402-D2X-1

1

432

ROOM=SOC

C1735

14UF

20%

4V

X5R

0402-D2X-1

1

432

ROOM=SOC

C1793

14UF

20%

4V

X5R

0402-D2X-1

1

3

4

2

XW1731

SHORT-20L-0.05MM-SM

NO_XNET_CONNECTION

ROOM=SOC

C1736

14UF

20%

4V

X5R

0402-D2X-1

1

432

XW1790

SHORT-20L-0.05MM-SM

2 1

1

C1794

4UF

20%
4V

2

X5R
0201

ROOM=SOC

OMIT

21

ROOM=SOC

OMIT

ROOM=SOC

(Analog)

20 4

AP_CPU_PCORE_SENSE

OUT

AH21

VDD_CPU_SENSE

0.8V @ 6mA MAX

0.8V @ 6mA MAX

0.8V @ 10mA MAX

20 4

ROOM=SOC

C1781

14UF

20%

4V

X5R

0402-D2X-1

1

432

AP_VDD_GPU_SENSE

OUT

ROOM=SOC

C1782

14UF

20%

4V

X5R

0402-D2X-1

1

432

N26
H13
H17
H21
H25
K11
K19

K23
G30
M29

N23

VDD_GPU_SRAM

VDD_GPU_SENSE

VDD_FIXED_CPU

VDD_FIXED_PLL_GPU
VDD_FIXED_PLL_SOC

VDD12_PLL_CPU
VDD12_PLL_GPU
VDD12_PLL_SOC

W14
K21

L20

W16
L21
M20

1

C1720

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

1

C1721

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

PP0V8_SOC_FIXED_S1

(Analog)

1.2V @ 7mA MAX (CPU)

1.2V @ 7mA MAX (GPU)

1.2V @ 20mA MAX (SOC)

PP1V2_SOC

1

C1722

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

1

C1723

4UF

20%

6.3V

2

CER-X5R
0201

ROOM=SOC

17 14 9 8 7 6

19 14 9 7

1.06V @ 18.3A MAX

0.8V @ 10.6A MAX

0.575V @ 3.4A MAX

PP_GPU

BUCK1_FB

BUCK11_FB

1.06V @ 4.3A MAX

0.8V @ 2.8A MAX

0.575V @ 1.4A MAX

PP_CPU_ECORE

OUT

17 4

18

0.765V @ 4.9A MAX

0.635V @ 2.6A MAX

PP_SOC_S1

1

C1760

4UF

20%
4V

2

X5R
0201

ROOM=SOC

AA9
AA18
AA22
AA24
AA28
AA30
AB21
AB25
AB27
AC22
AC24
AC28
AC30

AD9
AD21
AD25
AD27
AD29

20 18

AE22
AE24
AE28
AF25
AF27

AG22
AG24
AG28

AH25
AH27

AJ16
AJ18
AJ22
AJ24

AJ28
AK13
AK15
AK19
AK21
AK25
AK27

AL12

AL16

AL18

AL22

AL24

AL28

AL30

AM13
AM25

AN12
AN22
AN24

F22

VDD_SOC

1

C1761

4UF

20%
4V

2

X5R
0201

ROOM=SOC

ROOM=SOC

C1762

14UF

20%

4V

X5R

0402-D2X-1

1

432

U1000

TMIT78B0-C4

WLCSP

SYM 9 OF 16

ROOM=SOC

ROOM=SOC

C1763

14UF

20%

4V

X5R

0402-D2X-1

1

432

VDD_SOC_SENSE

ROOM=SOC

C1764

14UF

20%

4V

X5R

0402-D2X-1

1

432

G13
J20
L19
M13
M15
M21
N10
N12
N16
N18
N29
P13
P15
P19
P21
P25
P27
R10
R12
R16
R18
R22
R24
R28
T13
T15
T19
T21
T25
T27
U16
U18
U22
U24
U28
U30
V19
V21
V25
V27
W18
W22
W24
W28
W30
Y19
Y25
Y21
Y27

P23

SHORT-20L-0.05MM-SM

NO_XNET_CONNECTION

OMIT

XW1760

21

ROOM=SOC

TP_SOC_SENSE

OUT

BUCK2_FB

4

17

D

17 17

OUTOUT

C

B

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/17/2016

A

SOC: Power (1/3)

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

17 OF 80

SHEET

13 OF 51

1

SIZE

D

D

C

B

9 8 7 6
17 14 13

34 32

27 17
8 7 6 5
16 14 10
30 29 28

43 35

SOC - POWER SUPPLIES

0.8V @ 0.9A MAX

PP0V8_SOC_FIXED_S1

ROOM=SOC

C1801

1.8V @ 60mA MAX

PP1V8_IO

1

C1810

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=SOC

1

C1802

4UF

20%
4V

2

X5R
0201

ROOM=SOC

1

2

1

C1811

4UF

20%

6.3V

2

CER-X5R
0201

ROOM=SOC

C1803

4UF

20%
4V
X5R
0201

ROOM=SOC

1

2

1

C1804

4UF

20%
4V

2

X5R
0201

ROOM=SOC

C1812

4UF

20%

6.3V
CER-X5R
0201

ROOM=SOC

0402-D2X-1

1

1

C1805

2

ROOM=SOC

1

C1813

4UF

20%

6.3V

2

CER-X5R
0201

ROOM=SOC

14UF

20%

4V

X5R

4UF

20%
4V
X5R
0201

432

AA20
AA26

AB9
AB23
AB29
AC26
AD23
AD31
AE26

AF23
AF29

AG26

AH23
AH29

AJ14
AJ20

AJ26
AK17
AK23

AL14

AL20

AL26

AM11
AM23

AP11
AP21
AP24

F19

F23
M11
M17

N14
N20
P11
P17
P29
R14
R20
R26

T11

T17

T23

T31

U20
U26

AP23
AP25

AB31

V31
Y31

F21

D23

VDD_FIXED

VDDIO18_GRP1

VDDIO18_GRP2

VDDIO18_GRP3

678

U1000

TMIT78B0-C4

WLCSP

SYM 10 OF 16

ROOM=SOC

VDD_FIXED_PLL_DDR0
VDD_FIXED_PLL_DDR1
VDD_FIXED_PLL_DDR2
VDD_FIXED_PLL_DDR3

U1000

TMIT78B0-C4

WLCSP

SYM 12 OF 16

ROOM=SOC

VDD18_TSADC_CPU0
VDD18_TSADC_CPU1
VDD18_TSADC_CPU2

VDD18_TSADC_CPU3
VDD18_TSADC_GPU0
VDD18_TSADC_SOC0

VDD18_TSADC_SOC1
VDD18_TSADC_SOC2

LPADC_REF_P

LPADC_REF_M

18 14

V17
V23
V29
W20
W26
Y9
Y17
Y23
Y29

BA19
AY20

AK11
AJ29
D8
R29

T12
AF21
AJ9
Y16

G21
AJ12

AD30
J31

0.6V @ 262mA MAX

PP0V6_VDDQL_S1

1

C1870

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

0.8V @ 8mA MAX

PP0V8_SOC_FIXED_S1

1.06V - 1.17V @ (Inc in VDD2)

42 19 17 14

19 13 9 7

PP1V1_S2

(Analog)

1.2V @ 16mA MAX

PP1V2_SOC

0.875V @ 0.8A MAX

0.730V @ 0.51A MAX

0.600V @ 0.35A MAX

PP_DCS_S1

17

1.8V @ 5.3mA MAX (CPU)

1.8V @ 1.1mA MAX (GPU)

1.8V @ 3.3mA MAX (SOC)

1

C1830

4UF

20%
4V

2

X5R
0201

ROOM=SOC

1

C1831

4UF

20%
4V

2

X5R
0201

ROOM=SOC

1

2

Place caps on SoC Corners

PP1V2_LPADC

19

OMIT

XW1870

SHORT-20L-0.05MM-SM

LPADC_GND

(Analog)

VDDQL Voltage Sense ->

1

C1860

4UF

20%
4V

2

X5R
0201

ROOM=SOC

1

C1861

4UF

20%
4V

2

X5R
0201

ROOM=SOC

Place caps on SoC Corners

ROOM=SOC

17 14 13 9 8 7 6

1

C1862

4UF

20%
4V

2

X5R
0201

ROOM=SOC

DCS Voltage Sense ->

PP1V8_IO

43 35 34 32

C1832

4UF

20%
4V
X5R
0201

ROOM=SOC

21

30 29 28 27 17 16 14 10 8 7 6 5

1

C1833

4UF

20%
4V

2

X5R
0201

ROOM=SOC

1

C1863

4UF

20%
4V

2

X5R
0201

ROOM=SOC

NC

NC

AD1
AF1
AH1
AK9
AP9
AT1
AV1

AD39

AF31

AF39
AK31
AP39

AT39
AV39

D1

F1

F9
H1
K9

T1
V1
C4

D39
F39
K31
P31
P39
T39
V39

AR6

AN34

E6

G34

AJ11

AK29

D9

T29

AJ10

AP10

AE30
AK30

F10
L10

A4

K30
R30

VDDQL_DDR0

VDDQL_DDR1

VDDQL_DDR2

VDDQL_DDR3

VDDIO11_RET_DDR0
VDDIO11_RET_DDR1
VDDIO11_RET_DDR2
VDDIO11_RET_DDR3

VDDIO12_PLL_DDR0
VDDIO12_PLL_DDR1
VDDIO12_PLL_DDR2
VDDIO12_PLL_DDR3

VDD_DCS_DDR0

VDD_DCS_DDR1

VDD_DCS_DDR2

VDD_DCS_DDR3

U1000

TMIT78B0-C4

WLCSP

SYM 11 OF 16

ROOM=SOC

3 245

DDR0_RREF
DDR1_RREF
DDR2_RREF
DDR3_RREF

DDR0_RET*
DDR1_RET*
DDR2_RET*
DDR3_RET*

DDR0_ZQ
DDR3_ZQ

DDR0_SYS_ALIVE
DDR1_SYS_ALIVE
DDR2_SYS_ALIVE
DDR3_SYS_ALIVE

VDD1

VDD2

PP0V6_VDDQL_S1

18 14

AP5
AN35
E5
H35

AR5
AM35
E3
G35

AJ2
N38

AP6
AM34
E4
H34

AB3

AB37

AW3

AW37
B3
B37
Y3
Y37

AA2
AA38
AC39
AH39
AJ1
AK39
AM1
AN39
AP1
AV2
AV37

AW2

AW38
C2
C3
C38
D38
H39
J1
K39
M1
N39
P1
W1

DDR0_RREF
DDR1_RREF
DDR2_RREF
DDR3_RREF

DDR0_ZQ
DDR3_ZQ

1

C1840

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1850

4UF

20%
4V

2

X5R
0201

ROOM=SOC

DDR IMPEDANCE CONTROL

1

R1860

240

1%
1/32W
MF
01005

2

ROOM=SOC

1

R1861

240

1%
1/32W
MF
01005

2

ROOM=SOC

AOP_TO_DDR_SLEEP1_READY

SYSTEM_ALIVE

1

C1841

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1851

4UF

20%
4V

2

X5R
0201

ROOM=SOC

1

C1842

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1852

4UF

20%
4V

2

X5R
0201

ROOM=SOC

1

R1862

240

1%
1/32W
MF
01005

2

ROOM=SOC

IN

IN

1

2

1

2

1

R1863

240

1%
1/32W
MF
01005

2

ROOM=SOC

12 4

23 20 16

C1843

2.2UF

20%

6.3V
X5R-CERM
0201

ROOM=SOC

C1853

4UF

20%
4V
X5R
0201

ROOM=SOC

1

R1870

240

1%
1/32W
MF
01005

2

ROOM=SOC

1

R1871

240

1%
1/32W
MF
01005

2

ROOM=SOC

1.8V @ 200mA MAX

PP1V8_S2

1.06V - 1.17V @2.2A MAX

PP1V1_S2

1

D

C

50 49

42 19 17 14

48 47 46 38 22 20 17 14 12 10

B

AF9

A

V9

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

VDDIO18_GRP4

VDD18_EFUSE1
VDD18_EFUSE2

VDD18_FMON

VDD18_LPOSC

67

H12
AT6
AN13
AN19

1

C1880

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=SOC

1.8V @ 1mA MAX

PP1V8_IO

PP1V8_LPOSC_S2

1

C1881

0.47UF

20%

6.3V

2

X5R
01005

ROOM=SOC

43 35 34 32

30 29 28 27 17 16 14 10 8 7 6 5

R1880

300

5%

1/32W

MF

01005

ROOM=SOC

1.8V @ 1mA MAX

21

PP1V8_S2

A

SYNC_MASTER=test_mlb

50 49

48 47 46 38 22 20 17 14 12 10

PAGE TITLE

SYNC_DATE=10/17/2016

SOC: Power (2/3)

SIZE

D

Apple Inc.

DRAWING NUMBER

051-02221

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

35 4

2

BRANCH

evt-1

PAGE

18 OF 80

SHEET

14 OF 51

1

SOC - POWER SUPPLIES

678

3 245

1

D

C

B

A1
A2
A3

A5
A11
A18
A27
A29
A31
A33
A35
A36
A37
A38
A39

AA1

AA6
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AA25
AA27
AA29
AA31
AA34
AA36
AA39

AB1

AB5
AB10
AB12
AB14
AB16
AB20
AB22
AB24
AB26
AB28
AB30
AB35
AB39

AC1
AC3

AC6
AC15
AC21
AC23
AC25
AC27
AC29
AC31
AC34
AC35

AD4

AD6
AD14
AD20
AD22
AD24
AD26
AD28
AD34
AD35
AD37

AE1
AE3
AE5

AE9
AE15
AE21
AE23
AE25
AE27

U1000

TMIT78B0-C4

WLCSP

SYM 13 OF 16

ROOM=SOC

AE29
AE31
AE34
AE39
AF6
AF15
AF22
AF24
AF26
AF28
AF30
AF35
AF37
AG1
AG6
AG14
AG20
AG23
AG25
AG27
AG29
AG34
AG39
AH3
AH5
AH9
AH11
AH13
AH15
AH17
AH19
AH22
AH24
AH26
AH28
AH35
AH37
AJ13

VSSVSS

AJ15
AJ17
AJ19
AJ21
AJ23
AJ25
AJ27
AJ34
AJ35
AJ39
AK1
AK2
AK6
AK10
AK12
AK14
AK16
AK18
AK20
AK22
AK24
AK26
AK28
AK34
AK35
AK36
AL1
AL3
AL5
AL11
AL13
AL15
AL17
AL19
AL21
AL23
AL25
AL27
AL29
AL31

AL34
AL35
AL36
AL39

AM2

AM6
AM12
AM14
AM16
AM18
AM20
AM22
AM24
AM26
AM28
AM30
AM36
AM37
AM38
AM39

AN1
AN2
AN3
AN4
AN5

AN6
AN11
AN17
AN21
AN23
AN25
AN29
AN31
AN36
AN37
AN38

AP2

AP3

AP4
AP12
AP16
AP18
AP20
AP22
AP28
AP34
AP35
AP36
AP37
AP38

AR1

AR2

AR3

AR4
AR37
AR38
AR39

AT2
AT3
AT4

AT5
AT28
AT29
AT31
AT32
AT33
AT37
AT38

AU1

AU2
AU12
AU15
AU18
AU21
AU24
AU25
AU26
AU27

U1000

TMIT78B0-C4

WLCSP

SYM 14 OF 16

ROOM=SOC

VSS VSS

AU29
AU3
AU4
AU5
AU6
AU9
AU31
AU33
AU34
AU35
AU36
AU37
AU38
AU39
AV3
AV4
AV24
AV26
AV28
AV30
AV32
AV34
AV36
AV38
AW1
AW4
AW24
AW28
AW30
AW32
AW34
AW36
AW39
AY1
AY2
AY3
AY5
AY7
AY9
AY12
AY15
AY18
AY21
AY23
AY25
AY27
AY28
AY29
AY31
AY33
AY35
AY37
AY38
AY39
B1
B2
B4
B5
B11
B18
B27
B35
B36
B38
B39
BA1
BA2
BA3
BA5
BA7
BA23
BA25
BA26
BA29
BA31
BA33
BA35
BA37
BA38

<- DDR Vss V Sense

NC

BA39

C1
C5
C6
C7
C8

C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C29
C31
C33
C35
C36
C37
C39
D10
D14

D2

D3

D4

D5

D6

D7
D22
D24
D25
D26
D27
D34
D35
D36
D37

E1

E2
E34
E35
E36
E37
E38
E39
F12
F14
F18

F2

F3

F4

F5

F6
F20
F24
F26
F30
F34
F35
F36
F37
F38

G1

U1000

TMIT78B0-C4

WLCSP

SYM 15 OF 16

ROOM=SOC

VSSVSS

G2
G3
G6
G11
G15
G17
G19
G23
G25
G31
G36
G37
G38
G39
H2
H4
H5
H14
H16
H18
H20
H22
H24
H26
H30
H36
H37
H38
J2
J3
J6
J11
J17
J19
J21
J23
J25
J27
J29
J34
J35
J36
J37
J38
J39
K1
K2
K5
K6
K10
K12
K16
K18
K20
K22
K24
K28
K35
K37
L1
L2
L3
L6
L9
L11
L17
L23
L29
L34
L38
L39
M10
M12
M14
M16
M18

M19

M2
M5

M6
M22
M24
M28
M34
M36
M38
M39

N1
N2
N3
N4
N5
N6

N9
N11
N13
N15
N17
N19
N21
N25
N27
N34

P3

P5

P10
P12
P14
P16
P18
P20
P22
P26
P28
P30
P35
P37

R1

R6
R11
R13
R15
R17
R19
R21
R23
R25
R27
R31
R34
R39

T6
T10
T14
T16
T18
T20
T22
T24
T26
T28
T30
T34
T36
T38

U1
U3
U5

U9
U11
U13
U15
U17
U19

VSS

U1000

TMIT78B0-C4

WLCSP

SYM 16 OF 16

ROOM=SOC

VSS_CPU_SENSE

VSS_SENSE

U21
U23
U25
U27
U29
U31
U34
U39
V6
V14
V16
V18
V20
V22
V24
V26
V28
V30
V35
V37
W2
W3
W6
W9
W13
W15
W17
W19
W21
W23
W25
W27
W29
W31
W34
W37
W38
W39
Y1
Y5
Y14
Y18
Y20
Y22
Y24
Y26
Y28
Y30
Y35
Y39

AG21
P24

TP_VSS_CPU_SENSE

TP_VSS_SENSE

OUT

OUT

D

C

4

4

B

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/17/2016

A

SOC: Power (3/3)

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

19 OF 80

SHEET

15 OF 51

1

SIZE

D

391mA MAX

678

3 245

1

28 27 17 16 14 10 8 7 6 5

43 35 34 32 30 29

D

PP1V8_IO

1

C2624

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2641

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2643

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2626

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2629

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=NAND

1

C2645

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2610

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=NAND

1

C2630

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=NAND

1

C2647

4UF

20%
4V

2

X5R
0201

ROOM=NAND

S4E NAND

D

C

932mA MAX

PP0V9_NAND

19

1

C2622

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2627

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2611

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NAND

1

C2602

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=NAND

1

C2640

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2617

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

1

C2605

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=NAND

1

C2642

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2623

68PF

5%

6.3V

2

NP0-C0G
01005

ROOM=NAND

1

C2600

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2644

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2612

47PF

5%
16V

2

CERM
01005

ROOM=NAND

1

C2601

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2646

4UF

20%
4V

2

X5R
0201

ROOM=NAND

1

C2613

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=NAND

1

C2616

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=NAND

1

C2619

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=NAND

1100mA MAX (1us peak power)

PP3V0_NAND

1

C2621

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=NAND

C

19

B

1

C2603

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NAND

1

C2606

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NAND ROOM=NAND

1

R2604

3.01K

1%
1/32W
MF
01005

2

ROOM=NAND

1

C2609

100PF

5%
16V

2

NP0-C0G
01005

10

7 4

7 4

7

7

7

7

1

C2614

68PF

5%

6.3V

2

NP0-C0G
01005

ROOM=NAND

AP_TO_NAND_SYS_CLK

IN

90_PCIE_AP_TO_NAND_REFCLK_P

IN

90_PCIE_AP_TO_NAND_REFCLK_N

IN

7

PCIE_NAND_BI_AP_CLKREQ_L

BI

PCIE_NAND_RESREF
90_PCIE_AP_TO_NAND_TXD_P

IN

90_PCIE_AP_TO_NAND_TXD_N

IN

90_PCIE_NAND_TO_AP_RXD_P

OUT

90_PCIE_NAND_TO_AP_RXD_N

OUT

1

C2620

47PF

5%
16V

2

CERM
01005

ROOM=NAND

4

4

1

C2628

22PF

5%
16V

2

CERM
01005

ROOM=NAND

NAND_ANI1_VREF

OUT

NAND_ANI0_VREF

OUT

M3

CLK_IN

K11

PCIE_REFCLK_P

J12

PCIE_REFCLK_M

P5

PCIE_CLKREQ_N

H7

PCI_RESREF

M11

PCIE_RX0_P

N12

PCIE_RX0_M

R12

PCIE_TX0_P

T11

PCIE_TX0_M

J8

N8

J6

M9

N6

PCI_VDD_1

PCI_AVDD_H

PCI_AVDD_CLK_1

PCI_AVDD_CLK_2

L2J4G12

PCI_VDD_2

ANI0_VREF

AVDD18_PLL

L6

G8

G6

ANI1_VREF

L8

VDD

K9

J2

E10

E2

R8

R6

VDDIO

U2600

THGBX7G8D2LLFXG

WFLGA

ROOM=NAND

BOMOPTION=OMIT_TABLE

CRITICAL

N2

T5

P9

D3

E12

G4

L12

VCC

R2

NC

F3

R4

VPP

VDD_PLL

1

C2649

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=NAND

1

C2615

22PF

5%
16V

2

CERM
01005

ROOM=NAND

EXT_D2/BOOT2/SPINAND_SCLK

EXT_D3/SWD_UID0/SPINAND_MISO

EXT_D4/UART_RX

EXT_D5/SWD_UID1/SPINAND_MOSI

EXT_D6/UART_TX

EXT_NCE/PERST*

EXT_NRE/JTAG_TMS

EXT_NWE/JTAG_TCK

EXT_RNB/JTAG_TDO

EXT_CLE/JTAG_TDI

EXT_ALE/JTAG_SEL

1

C2618

47PF

5%
16V

2

CERM
01005

ROOM=NAND

EXT_D0/BOOT0
EXT_D1/BOOT1

EXT_D7/SPF

B3
C4
B5
C6
B7
C8
B9
B11

E8
D7
E6
E4
D5
D9

NC

NC

NC

1

C2650

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=NAND

1

C2631

68PF

5%

6.3V

2

NP0-C0G
01005

ROOM=NAND

1

C2651

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=NAND

1

C2632

100PF

5%
16V

2

NP0-C0G
01005

PMU_TO_NAND_LOW_BATT_BOOT_L

AP_TO_NAND_FW_STRAP
SPI_AP_TO_S4E_SCLK_BOOT_CONFIG0
SPI_S4E_TO_AP_MISO_BOOT_CONFIG2

SPI_AP_TO_S4E_MOSI_BOOT_CONFIG1

PCIE_AP_TO_NAND_RESET_L

SWD_AP_BI_NAND_SWDIO

SWD_AOP_TO_MANY_SWCLK

1

C2652

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=NAND

1

C2634

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NANDROOM=NAND

SYSTEM_ALIVE

1

C2635

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NAND

IN
IN
IN

OUT

IN

IN

IN

BI

IN

20

6

7

1

C2636

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NAND

1

C2637

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

B

10 5

10 5 4

10 5

23 20 14

12 4

50 12 4

6

A

AP_TO_NAND_RESET_L

IN

Board trace <= 0.2Ohm

1

R2600

100

0.1%
1/32W
MF
01005

2

ROOM=NAND

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

NAND_ZQ_C
NAND_ZQ_N

CKPLUS_WAIVE=MISS_P_DIFFPAIR

1

R2601

300

0.1%
1/32
MF
01005

2

ROOM=NAND

L4

G10

K3

C10

RESET*
TRST*
ZQ_C

ZQ_N

A4

A2

67

A6

A8

A10

A12

B1

B13

C2

C12

D1

D11

D13

F1

F5

F7

F9

F11

F13

H1

H3

H5

H9

H11

H13

VSS

J10

K1

K5

K7

K13

L10

M1

M5

M7

M13

N4

N10

P1

P3

P7

P11

P13

R10

T1

T7

T9

T13

U2

U4

U6

DROOP_N

WP_N

U8

U12

U10

T3
G2

PP1V8_IO

43 35 34 32

30 29 28 27 17 16 14 10 8 7 6 5

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/13/2016

A

NAND

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

35 4

2

BRANCH

evt-1

PAGE

26 OF 80

SHEET

16 OF 51

1

SIZE

D

D

C

B

4.9A MAX

BUCK5BUCK6BUCK7BUCK8 BUCK4

1.7A MAX

2.1A MAX

1.2A MAX 1.2A MAX

BUCK9

1.2A MAX

42 19 14

(Place in TTS)

14 13 9 8 7 6

27 19

13

13

14

PP1V1_S2

1

C2745

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2744

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

PP0V8_SOC_FIXED_S1

PP1V25_S2

(Place Close to Ansel)

0.80V - 1.06V

PP_CPU_SRAM

0.80V - 0.92V

PP_GPU_SRAM

PP_DCS_S1

1

C2743

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2763

15UF

20%

6.3V

2

X5R
0402-0.1MM-1

ROOM=PMU

1

C2742

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2752

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2762

20%

6.3V

2

X5R
0402-0.1MM-1

ROOM=PMU

1

C2772

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2782

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2792

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2741

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2751

26UF

20%
4V 10V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2761

15UF15UF

20%

6.3V

2

X5R
0402-0.1MM-1

ROOM=PMU

1

C2771

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2781

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2791

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2740

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

1

C2750

220PF

5%

2

C0G-CERM
01005

ROOM=PMU

1

C2760

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

1

C2770

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

1

C2780

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

1

C2790

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

678

L2740

1UH-20%-3.2A-0.06OHM

2 1

PIWA20160H-SM

ROOM=PMU

CRITICAL

L2741

0.47UH-20%-3.3A-0.053OHM

PIWA2012FE-SM

ROOM=PMU

OMIT

XW2740

SHORT-20L-0.05MM-SM

2 1

ROOM=PMU

L2750

1UH-20%-2.5A-0.052OHM

2 1

PIWA20160H-SM

ROOM=PMU

OMIT

XW2750

SHORT-20L-0.05MM-SM

2 1

ROOM=PMU

CRITICAL

L2760

1UH-20%-2.4A-0.06OHM

2 1

PIWA2016FE-SM

ROOM=PMU

OMIT

XW2760

SHORT-20L-0.05MM-SM

2 1

ROOM=PMU

L2770

1UH-20%-2.5A-0.052OHM

2 1

PIWA20160H-SM

ROOM=PMU

OMIT

XW2770

SHORT-20L-0.05MM-SM

2 1

ROOM=PMU

CRITICAL

L2780

1UH-20%-2.5A-0.078OHM

2 1

PIWA20120H-SM

ROOM=PMU

OMIT

XW2780

SHORT-20L-0.05MM-SM

2 1

ROOM=PMU

CRITICAL

L2790

1UH-20%-2.1A-0.1OHM

2 1

PIWA2012FE-SM

ROOM=PMU

OMIT

XW2790

SHORT-20L-0.05MM-SM

21

ROOM=PMU

BUCK4_LX0

21

BUCK4_LX1

BUCK4_FB

BUCK5_LX0

BUCK5_FB

BUCK6_LX0

BUCK6_FB

BUCK7_LX0

BUCK7_FB

BUCK8_LX0

BUCK8_FB

BUCK9_LX

BUCK9_FB

V11

W11

Y11

V9

W9

Y9

T8

V3

W3

Y3

T4

H1
H2

H4

W16
W17
W18

W14

A17
B17

E17

A6
B6

F4

BUCK4_LX0

BUCK4_LX1

BUCK4_FB

BUCK5_LX0

BUCK5_FB

BUCK6_LX0

BUCK6_FB

BUCK7_LX0

BUCK7_FB

BUCK8_LX0

BUCK8_FB

BUCK9_LX0

BUCK9_FB

U2700

D2422B0

WLCSP

SYM 2 OF 5

ROOM=PMU

CRITICAL

BUCK0_LX0

BUCK0_LX1

BUCK0_LX2

BUCK0_LX3

BUCK0_FB

BUCK1_LX0

BUCK1_LX1

BUCK1_LX2

BUCK1_LX3

BUCK1_FB

BUCK2_LX0

BUCK2_LX1

L17
L18

N16
N17
N18

R16
R17
R18

U16
U17
U18

R13

BUCK0_FB

A15
B15

A13
B13
C13

A11
B11
C11

A9

NC

B9

NC

C9

NC

F15

BUCK1_FB

V5
W5
Y5

V7
W7
Y7

BUCK0_LX0

BUCK0_LX1

BUCK0_LX2

BUCK0_LX3

BUCK1_LX0

BUCK1_LX1

BUCK1_LX2

BUCK2_LX0

BUCK2_LX1

CRITICAL

L2700

1UH-20%-3.2A-0.06OHM

21

PIWA20160H-SM

ROOM=PMU

CRITICAL

L2701

0.47UH-20%-3.3A-0.053OHM

21

PIWA2012FE-SM

ROOM=PMU

CRITICAL

L2702

0.1UH-20%-6.1A-0.031OHM

21

PINA1608-SM

ROOM=PMU

CRITICAL

L2703

0.1UH-20%-6.1A-0.031OHM

21

PINA1608-SM

ROOM=PMU

13

IN

CRITICAL

L2710

1UH-20%-3.6A-0.062OHM

21

0806

ROOM=PMU

L2711

0.47UH-20%-4A-0.048OHM

21

PIWA20120H-SM

ROOM=PMU

CRITICAL

CRITICAL

L2712

0.1UH-20%-7.2A-0.018OHM

21

PINA2012-SM

ROOM=PMU

13

IN

CRITICAL

L2720

1UH-20%-3.2A-0.06OHM

21

PIWA20160H-SM

ROOM=PMU

CRITICAL

L2721

0.47UH-20%-3.3A-0.053OHM

21

PIWA2012FE-SM

ROOM=PMU

3 245

1

C2700

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

1

C2710

220PF 26UF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

1

C2720

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

1

C2701

2

ROOM=PMU

1

C2706

2

ROOM=PMU

1

C2711

2

ROOM=PMU

1

C2716

2

ROOM=PMU

1

2

26UF

20%
4V
X5R
0402-0.1MM

26UF

20%
4V
X5R
0402-0.1MM

20%
4V
X5R
0402-0.1MM

26UF

20%
4V
X5R
0402-0.1MM

C2721

26UF

20%
4V
X5R
0402-0.1MM

ROOM=PMU

1

C2702

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2712

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2722

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2703

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2713

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2723

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2704

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2714

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2724

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

(Place in TTS)

1

C2705

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2715

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

0.625V - 1.06V

PP_CPU_PCORE

0.67V - 0.92V

1.03V for overdrive only

PP_GPU

0.67V/0.80V

PP_SOC_S1

13

1

13 4

13 4

13.8A MAX

BUCK0

13.8A MAX 4.9A MAX

BUCK1

BUCK2

D

C

B

A

BUCK2_FB

BUCK3_LX0

BUCK3_FB

VBUCK3_SW

BUCK3_SW1

SWITCH OUTPUTS

BUCK3_SW2
BUCK3_SW3

T7

BUCK2_FB

F1
F2

G4

C1
C2

A2
B1
B2

D1
D2

BUCK3_LX0

BUCK3_FB

13

IN

L2730

1UH-20%-2.4A-0.06OHM

21

PIWA2016FE-SM

ROOM=PMU

OMIT

XW2730

SHORT-20L-0.05MM-SM

21

ROOM=PMU

PP1V8_TOUCH_RACER_S2

PP1V8_IO

PP1V8_IMU_S2

1

C2730

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

43 35 34

50 42

49 26 25

1

C2731

15UF

20%

6.3V

2

X5R
0402-0.1MM-1

ROOM=PMU

32 30 29 28 27 16 14 10 8 7 6 5

1

C2732

15UF

20%

6.3V

2

X5R
0402-0.1MM-1

ROOM=PMU

SYNC_MASTER=test_mlb

PAGE TITLE

SYSTEM POWER: PMU Bucks (1/4)

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

PP1V8_S2

50 49 48

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

27 OF 80

SHEET

17 OF 51

47 46 38 22 20 14 12 10

1.7A MAX

BUCK3

SYNC_DATE=10/13/2016

SIZE

A

D

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

678

3 245

1

D

C

45 43 42 41 34 31 27 23 21 19

50 46

PP_VDD_MAIN

1

C2854

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

1

C2859

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

1

C2850

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=PMU

1

C2855

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

1

C2860

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

1

C2851

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=PMU

1

C2856

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

1

C2861

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

19

IN

1

C2852

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=PMU

1

C2857

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

1

C2862

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

VDD_MAIN_SNS

1

C2858

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

1

C2863

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

P7

VDD_MAIN_SNS

E5

VDD_MAIN_1

K5

VDD_MAIN_2

R7

VDD_MAIN_3

U14

VDD_MAIN_4

L14

VDD_MAIN_5

F14

VDD_MAIN_6

M15
M16
M17
M18

T15
T16
T17
T18

A14

B14
C14
D14

VDD_BUCK0_01

VDD_BUCK0_23

VDD_BUCK1_01

U2700

D2422B0

WLCSP

SYM 3 OF 5

ROOM=PMU

BAT/USBBUCK INPUT

BUCK10_LX0

BUCK10_FB

BUCK11_LX0

BUCK11_LX1

A4
B4

E4

G17
G18

J17
J18

BUCK10_LX

BUCK10_FB

BUCK11_LX0

BUCK11_LX1

CRITICAL

L2800

1UH-20%-2.1A-0.1OHM

21

PIWA2012FE-SM

ROOM=PMU

OMIT

XW2800

SHORT-20L-0.05MM-SM

2 1

ROOM=PMU

CRITICAL

L2810

1UH-20%-3.2A-0.06OHM

21

PIWA20160H-SM

ROOM=PMU

CRITICAL

L2811

0.47UH-20%-4A-0.048OHM

21

PIWA20120H-SM

ROOM=PMU

1

C2800

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

1

C2810

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

1

C2801

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2811

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2802

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2812

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

1

C2813

26UF

20%
4V

2

X5R
0402-0.1MM

ROOM=PMU

PP0V6_VDDQL_S1

PP_CPU_ECORE

14

13

BUCK10

BUCK11

3.0A MAX1.2A MAX

D

C

1

C2864

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

1

C2865

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

1

C2866

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=PMU

A10

B10
C10
D10

V6

W6

Y6

E1
E2

V10

W10

Y10

V2

W2

Y2

VDD_BUCK1_23

VDD_BUCK2

VDD_BUCK3

VDD_BUCK4

VDD_BUCK5

BUCK11_FB

J15

BUCK11_FB

IN

20 13

B

J1
J2

Y15

Y16

Y17

B18
C18

A7
B7

A3
B3

H17
H18

VDD_BUCK6

B

VDD_BUCK7

VDD_BUCK8

VDD_BUCK9

VDD_BUCK10

VDD_BUCK11

A

https://www.facebook.com/
Professional.Repairphone

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

PAGE TITLE

A

SYSTEM POWER: PMU Bucks (2/4)

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

28 OF 80

SHEET

18 OF 51

1

SIZE

D

678

3 245

1

D

43 42 41 34 31 27 23 21 19 18

18

20

20

VDD_MAIN_SNS

OUT

PMU_PRE_UVLO_DET

OUT

50 38 34 27 21 19

OUT

50 46 45

PMU_LDO5_UVLO_DET

PP_VDD_MAIN

XW2990

SHORT-20L-0.05MM-SM

2 1

ROOM=PMU

XW2991

SHORT-20L-0.05MM-SM

2 1

ROOM=PMU

PP_VDD_BOOST

XW2995

SHORT-20L-0.05MM-SM

2 1

ROOM=PMU

OMIT

OMIT

OMIT

1

C2990

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=PMU

OMIT_TABLE

1

C2970

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CAM_PMU

1

C2991

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=PMU

OMIT_TABLE

1

C2971

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CAM_PMU

1

C2992

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=PMU

D

C

B

A

A1
A12
A16
A18

A5

A8
B12
B16

B5

B8
C12
C15
C16
C17

C3

C4

C5

C6

C7

C8
D11
D12
D13
D15
D16
D17
D18

D8

D9
E11
E12
E13
E18

E3

F16
F17
F18

F3
F5

G1
G15
G16

G2

G3

G5
H16

H3

H5

J13
J14
J16

J5
K14
K16

U2700

D2422B0

WLCSP

SYM 5 OF 5

ROOM=PMU

VSS VSS

K17
K18
L16
L6
M7
M11
N7
N15
N8
N9
P10
P11
P15
P16
P17
P18
P8
P9
R15
R8
T3
T5
T6
T9
U10
U11
U12
U15
U3
U4
U5
U6
U7
U8
U9
V12
V15
V16
V17
V18
V4
V8
N12
W12
W15
W4
W8
Y1
Y12
Y13
Y14
Y18
Y4
Y8

43 42 41 34 31 27 23 21 19 18

50 38 34 27 21 19

50 46 45

42 17 14

27 17

19

PMU_VSS_RTC

PP_VDD_MAIN
PP_VDD_BOOST

PP1V1_S2

OMIT_TABLE

C2980

2.2UF

X5R-CERM

ROOM=PMU

PP1V25_S2

PP2V5_LDO0_S2

20

20%

6.3V
0201

1

2

OMIT_TABLE

C2981

2.2UF

6.3V

X5R-CERM

0201

ROOM=PMU

20%

U2700

D2422B0

WLCSP

K4

VDD_LDO0

N4

VDD_LDO1

M4

VDD_LDO2

R5

VDD_LDO3

N1

1

2

VDD_LDO4

V1

VDD_LDO5

W1

VDD_LDO5

L1

VDD_LDO6

K1

VDD_BYPASS

M1

VDD_LDO7

R2

VDD_LDO8

M6

VDD_LDO9

R6

VDD_LDO10

R4

VDD_LDO11

L4

VDD_LDO12

R3

VDD_LDO13

T1

VDD_LDO14

M5

VDD_VBUF

J4

VCC_LDOG

E14

VPP_OTP

SYM 1 OF 5

ROOM=PMU

LDO INPUT

LDO

VLDO0
VLDO1
VLDO2
VLDO3
VLDO4
VLDO5

VLDO6

VBYPASS

VLDO7
VLDO8
VLDO9

VLDO10
VLDO11
VLDO12
VLDO13
VLDO14

K3
N3
M3
P5
N2
U1

L2
K2
M2

P2
N6

P6
P4
L3
P3
T2

NC

PP2V5_LDO0_S2

PP3V3_USB

19

6

PP1V8_AUDIO_VA_S2

PP3V0_CONVOY

PP0V7_VDD_LOW_S2

PP3V0_NAND

13

16

PP_ACC_VAR

PP3V0_S2

PP0V9_NAND

16

PP1V8_ALWAYS

PP3V0_DISPLAY

43

PP1V2_SOC

PP1V2_CODEC_S2

PP1V0_DISPLAY_DVDD

38

43

LDO1

50 41 38

LDO2
LDO3
LDO4
LDO5

48 46

50 48 47 45 36

LDO6

LDO7
LDO8

23 20

LDO9

LDO10

14 13 9 7

LDO11
LDO12
LDO13
LDO14

C

B

NC

T14

TP_DET

VBUF_1V2

VPUMP

N5

D3

PMU_VPUMP

1

C2920

47NF

20%

6.3V

2

X5R-CERM
01005

ROOM=PMU

VPUMP: 10nF min. @4.6V

1

2

OMIT_TABLE

1

C2900

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

OMIT_TABLE

C2901

2.2UF

20%

6.3V
X5R-CERM
0201

ROOM=PMU

1

C2906

2

OMIT_TABLE

1

C2903

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

OMIT_TABLE

2.2UF

20%

6.3V
X5R-CERM
0201

ROOM=PMU

1

C2909

2

OMIT_TABLE

1

C2907

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

1.0UF

20%

6.3V
X5R
0201-1

ROOM=PMU

1

C2911

2

OMIT_TABLE

1

C2910

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

OMIT_TABLE

2.2UF

20%

6.3V
X5R-CERM
0201

ROOM=PMU

OMIT_TABLE

1

C2913

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

OMIT_TABLE

1

C2914

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

SYNC_MASTER=test_mlb

PAGE TITLE

PP1V2_LPADC

1

C2915

0.22UF

20%

6.3V

2

X5R
01005-1

ROOM=PMU

14

VBUF_1V2

SYNC_DATE=10/13/2016

A

SYSTEM POWER: PMU LDOs (3/4)

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

29 OF 80

SHEET

19 OF 51

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

678

3 245

1

D

C

B

Ansel AMUX

1

C3071

1000PF

10%
10V

2

X5R
01005

ROOM=PMU

CAMPMU_TO_PMU_AMUX

28 20

COLD_RESET & SYSTEM_ALIVE

1

R3061

100K

5%
1/32W
MF
01005

2

ROOM=PMU

PP1V8_S2

50

1

R3062

100K

5%
1/32W
MF
01005

2

ROOM=PMU

SYSTEM_ALIVE

PMU_TO_SYSTEM_COLD_RESET_L

49 48 47 46 38 22 17 14 12 10

23 20 16 14

20 6

NTCs

FOREHEAD NTC

1

5%

16V

5%

16V

5%

16V

1

2

R3041

10KOHM-1%

01005

ROOM=PMU

2

FOREHEAD_NTC_RETURN

REAR CAMERA NTC

1

1

R3042

10KOHM-1%

2

01005

ROOM=PMU

2

RADIO PA NTC on MLB Bottom

AP NTC

1

1

2

R3044

10KOHM-1%

01005

ROOM=PMU

2

REAR_CAMERA_NTC
RCAM_NTC_RETURN

C3041

100PF

NP0-C0G

01005

ROOM=PMU

C3042

100PF

NP0-C0G

01005

ROOM=PMU

C3044

100PF

NP0-C0G

01005

ROOM=PMU

23 20 16 14

FOREHEAD_NTC

AP_NTC

AP_NTC_RETURN

SYSTEM_ALIVE

OUT

OMIT

XW3041

SHORT-20L-0.05MM-SM

21

ROOM=PMU

OMIT

XW3042

SHORT-20L-0.05MM-SM

21

ROOM=PMU

23 20 19

PP1V8_ALWAYS

OMIT

XW3044

SHORT-20L-0.05MM-SM

21

ROOM=PMU

1

C3020

100PF

5%
16V

2

NP0-C0G
01005

ROOM=PMU

1

R3020

3.92K

0.1%
1/20W
MF
0201

2

ROOM=PMU

R3001

0.00

1/32W
01005

0%
MF

21

ROOM=PMU

R3000

100

21

1%

1/32W

MF

01005

ROOM=PMU

50

OUT

1

R3011

200K

1%
1/32W
MF
01005

2

ROOM=PMU

PP1V8_ALWAYS_XO

1

C3002

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=PMU

NC

6

48

6 4

20 6

48 6 4

12

50

50 28 21 12 8

10

12

49 46 10

49 46 10

10

10 4

6

28 20

48 20

46

11

43

50

34 8 4

6 4

50

3

VDD

Y3000

32.768KHZ-10PPM

CSP

1

NC

CLKOUT

CRITICAL

ROOM=PMU

GND

4

AP_TO_PMU_WDOG_RESET

IN

HYDRA_TO_PMU_HOST_RESET

IN

AP_TO_PMU_SOCHOT_L

IN

PMU_TO_SYSTEM_COLD_RESET_L

OUT

PMU_TO_AP_HYDRA_ACTIVE_READY

OUT

PMU_TO_AOP_CLK32K

OUT

PMU_TO_TOUCH_CLK32K_RESET_L

OUT

SYSTEM_ALIVE_R

AP_TO_MANY_BSYNC

IN

PMU_TO_SEP_DOUBLE_CLICK_DET

OUT

PMU_TO_AOP_IRQ_L

OUT

I2C0_AP_SCL

IN

I2C0_AP_SDA

BI

SPMI_PMGR_TO_PMU_SCLK

IN

SPMI_PMU_BI_PMGR_SDATA

OUT

AP_TO_PMU_AMUX_OUT

IN

CAMPMU_TO_PMU_AMUX

IN

HYDRA_TO_PMU_USB_BRICK_ID

IN

ACC_BUCK_TO_PMU_AMUX

IN

PMU_AMUX_AY
ACORN_TO_PMU_ADC

42 20

AP_TO_PMU_AMUX_SYNC

IN

DISPLAY_TO_PMU_AMUX

IN

TOUCH_TO_AMUX_PP1V8

IN

PMU_TO_WLAN_CLK32K

50 20

RIGEL_TO_ISP_INT

IN

AP_TO_PMU_TEST_CLKOUT

IN

PMU_AMUX_BY

OUT

FOREHEAD_NTC

20

REAR_CAMERA_NTC

20

RADIO_PA_NTC

50

AP_NTC

20

CHARGER_NTC

20

PMU_TCAL

2

1

C3030

0.22UF

20%

6.3V

2

X5R
0201

ROOM=PMU

20 19

PMU_VSS_RTC
TCXO_PMU_32K

PMU_VDD_RTC
PMU_VDD_REF

1

C3031

1UF

20%

6.3V

2

X5R
0201

ROOM=PMU

NC

NC

NC
NC

NC

NC

P13

RESET_IN1

P12

RESET_IN2

N13

RESET_IN3

R12

RESET*

H15

SHDN

M12

ACTIVE_RDY

G6

SLEEP_32K

H6

OUT_32K

K13

SYS_ALIVE

M13

FORCE_SYNC

L12

DBL_CLICK_DET

N14

IRQ*

M8

SCL

L8

SDA

K7

SCLK

L7

SDATA

D4

AMUX_A0

D5

AMUX_A1

D6

AMUX_A2

D7

AMUX_A3

F9

AMUX_A4

F10

AMUX_A5

E6

AMUX_A6

E7

AMUX_A7

E8

AMUX_AY

F6

AMUX_B0

G7

AMUX_B1

G8

AMUX_B2

F7

AMUX_B3

E9

AMUX_B4

E10

AMUX_B5

F8

AMUX_B6

H7

AMUX_B7

H8

AMUX_BY

T12

TDEV1

T13

TDEV2

U13

TDEV3

V13

TDEV4

W13

TDEV5

V14

TCAL

R1

XTAL1

P1

XTAL2

L5

VDD_RTC

J3

VDD_REF

CRITICAL

U2700

D2422B0

WLCSP

SYM 4 OF 5

ROOM=PMU

REFSBUTTONS

COMPARATOR

ADC

AMUX

NTC RESETS

GPIO

XTAL

IREF

VREF

PRE_UVLO

VDROOP0
VDROOP1

VDROOP11

VDROOP0_DET
VDROOP1_DET

VDROOP11_DET

PRE_UVLO_DET

LDO5_UVLO_DET

IBAT

VBAT
BRICK_ID1
BRICK_ID2

ADC_IN

BUTTON1
BUTTON2
BUTTON3
BUTTON4

BUTTONO1
BUTTONO2
BUTTONO3

GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25

FAULT_OUT*

R10

R9

M14

P14
E16
L15

R14
E15
K15

L13
U2

T11
T10
N11
N10
R11

G14
H14
F13
G13

K6
J7
J6

F11
F12
G9
G10
G11
G12
H9
H10
H11
H12
J8
J9
J10
J11
J12
K8
K9
K10
K11
K12
L9
L10
L11
M9
M10

H13

NC
NC

NC

NC

NC
NC

NC

NC

PMU_IREF

PMU_VREF

PMU_TO_AP_BUTTON_POWER_KEY_L

R3010

200K

1/20W

ROOM=PMU

1%
MF

201

21

C3010

0.22UF

21

20%

6.3V
X5R

0201

ROOM=PMU

PMU_TO_AP_PRE_UVLO_L

PMU_TO_AP_THROTTLE_PCORE_L

PMU_TO_AP_THROTTLE_GPU0_L

PMU_TO_AP_THROTTLE_ECORE_L

AP_CPU_PCORE_SENSE

AP_VDD_GPU_SENSE

BUCK11_FB

PMU_PRE_UVLO_DET

PMU_LDO5_UVLO_DET

HYDRA_TO_PMU_USB_BRICK_ID

ACORN_TO_PMU_ADC

BUTTON_VOL_DOWN_L

BUTTON_POWER_KEY_L

BUTTON_VOL_UP_L
BUTTON_RINGER_A

PMU_TO_AP_BUTTON_VOL_DOWN_L

PMU_TO_AP_BUTTON_VOL_UP_L

PMU_TO_NFC_EN_R

PMU_TO_AP_THROTTLE_GPU1_L

TIGRIS_TO_PMU_INT_L

WLAN_TO_PMU_HOST_WAKE

NFC_TO_PMU_HOST_WAKE

PMU_TO_GNSS_EN_R

PMU_TO_WLAN_CLK32K

PMU_TO_BT_REG_ON

BT_TO_PMU_HOST_WAKE

CODEC_TO_PMU_WAKE

PMU_TO_WLAN_REG_ON

PMU_TO_BB_USB_VBUS_DETECT

PMU_TO_AP_FORCE_DFU_R

PMU_TO_CCG2_RESET_L

PMU_TO_BBPMU_RESET_R_L

PMU_TO_NAND_LOW_BATT_BOOT_L

BB_TO_PMU_PCIE_HOST_WAKE_L

PMU_TO_IKTARA_EN_EXT_1P8V

PMU_TO_BOOST_EN

PMU_TO_DISPLAY_PANICB

PMU_TO_IKTARA_RESET_L

OUT

OUT
OUT
OUT

IN
IN
IN

IN
IN

IN

IN

IN

IN
IN

OUT
OUT
OUT

OUT

IN
IN
IN

OUT
OUT

IN
IN

OUT
OUT

OUT

OUT

IN
OUT
OUT
OUT

OUT

6

6

6

19

19

25

25

25

11

11

11

6

23

50

50

50

50

38

50

50

47

16

50

50

21

43

50

D

11 6 4

13 4

13 4

18 13

C

48 20

1

R3074

42 20

31.6K

1%
1/32W
MF
01005

2

ROOM=PMU

R3073

100

5%

1/32W

MF

01005

ROOM=PMU

R3072

100

50 20

5%

1/32W

MF

01005

ROOM=PMU

R3071

20.0K

5%

1/32W

MF

01005

ROOM=PMU

R3070

1.00K

5%

1/32W

MF

01005

ROOM=PMU

PP1V8_ALWAYS

NOSTUFF

21

21

21

21

PMU_HYDRA_TO_AP_FORCE_DFU

23 20 19

PMU_TO_NFC_EN

PMU_TO_GNSS_EN

PMU_TO_BBPMU_RESET_L

OUT

OUT

OUT

33

IN

50

50

B

50

50

48 11

BI

A

C3045

100PF

5%

16V

NP0-C0G

01005

ROOM=PMU

1

2

CHARGER NTC

1

I609

R3045

10KOHM-1%

01005

ROOM=PMU

2

CHARGER_NTC

CHARGER_NTC_RETURN

OMIT

XW3045

SHORT-20L-0.05MM-SM

ROOM=PMU

NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

PMU_VSS_RTC

20 19

SYNC_MASTER=test_mlb

1

ROOM=PMU

SHORT-20L-0.05MM-SM

XW3000

2

OMIT

21

PAGE TITLE

SYSTEM POWER: PMU (4/4)

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

SIZE

SYNC_DATE=11/01/2016

D

A

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

30 OF 80

SHEET

20 OF 51

1

678

3 245

1

D

Boost Enable Pull

PMU_TO_BOOST_EN

21 20

1

R3100

511K

1%
1/32W
MF
01005

2

ROOM=BOOST

D

C

50 47 23 22 10

45 43 42 41 34 31 27 23 19 18

50 46

PP_VDD_MAIN

1

C3190

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=BOOST

1

ROOM=BOOST

L3100

0.47UH-20%-4A-0.048OHM

PIWA20120H-SM

2

SYS_BOOST_LX

21 20

R3110

I2C0_SMC_SDA I2C0_SMC_SDA_BOOST

BI

39.2

1/32W
01005

ROOM=BOOST

21

1%
MF

50 47 23 22 10

PMU_TO_BOOST_EN

IN

I2C0_SMC_SCL

IN

BOOST

353S01124

A3

VIN

A4
C3

C4
A1
B2
C2
B1
C1

VIN

SW
SW

EN
SCL
SDA
VSEL
BYP*

U3100

SN61280E

CSP

ROOM=BOOST

CRITICAL

VOUT
VOUT

B3
B4

1

C3110

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=BOOST

1

C3111

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=BOOST

1

C3112

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=BOOST

1

C3113

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=BOOST

1

C3114

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=BOOST

1

C3115

220PF

5%
10V

2

C0G-CERM
01005

ROOM=BOOST

When VDD_MAIN < 3.4, boosts to 3.4
Otherwise tracks VDD_MAIN

PP_VDD_BOOST

50 38 34 27 19

C

B

50 28 20 12 8

AP_TO_MANY_BSYNC

IN

A2

GPIO

PGND

D3

D2

D4

AGND

D1

B

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/13/2016

A

SYSTEM POWER: Boost

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

31 OF 80

SHEET

21 OF 51

1

SIZE

D

678

3 245

1

D

C

23

VBATT_SENSE

OUT

BATTERY CONNECTOR

Rcpt: 516S00232
Plug: 516S00233

XW3200

SHORT-20L-0.05MM-SM

2 1

ROOM=B2B_BATTERY

PLACE_NEAR=J3200:2mm

NO_XNET_CONNECTION=1

<-- This one on MLB

J3200

B2B-BATT-RCPT

F-ST-SM

9

65

I2C0_SMC_BI_GG_SDA_CONN

CKPLUS_WAIVE=I2C_PULLUP

Gas gauge I2C level translator

Q3200

RV1C002UN

ROOM=B2B_BATTERY

CRITICAL

SM

SYM_VER_1

G

S

1

2

D

3

I2C0_SMC_BI_GG_SDA

1

C3202

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_BATTERY

R3202

33

21

5%

1/32W

MF

01005

ROOM=B2B_BATTERY

I2C0_SMC_SDA

D

BI

50 47 23 21 10

C

50 23

PP_BATT_VCC

1

C3292

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_BATTERY

1

C3293

330PF

10%
16V

2

CER-X7R
01005

ROOM=B2B_BATTERY

1

C3294

220PF

10%
10V

2

X7R-CERM
01005

ROOM=B2B_BATTERY

1
2

10

ROOM=B2B_BATTERY

3
4

87

1

G

PP1V8_S2

50

49 48 47 46 38 20 17 14 12 10

R3201

I2C0_SMC_TO_GG_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

3

D

Q3201

RV1C002UN

SM

ROOM=B2B_BATTERY

CRITICAL

S

SYM_VER_1

2

I2C0_SMC_TO_GG_SCL

1

C3201

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_BATTERY

33

2 1

5%

1/32W

MF

01005

ROOM=B2B_BATTERY

I2C0_SMC_SCL

IN

50 47 23 21 10

B

B

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/13/2016

A

SYSTEM POWER: B2B Battery

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

32 OF 80

SHEET

22 OF 51

1

SIZE

D

TIGRIS2 CHARGER

678

3 245

1

D

TIGRIS_PMID1

DZ3300

BZT52C20LP

DFN10062

K

R3316

A

ROOM=CHARGER

50K

1%

1/32W

MF

01005

1

2

C3316

20%
25V
X5R

0402

ROOM=CHARGER

1

C3317

2

ROOM=CHARGER

D

PP_VDD_MAIN

50 46

1

C3390

18UF

20%

1

C3310

1

4.7UF4.7UF

20%
25V

2

X5R

0402

4.7UF

20%
25V

2

CER-X5R
0402

ROOM=CHARGER

1

C3311

4.7UF

20%
25V

2

CER-X5R
0402

ROOM=CHARGER

1

C3312

220PF

5%
25V

2

COG
01005

ROOM=CHARGER

1

C3313

220PF

5%
25V

2

COG
01005

ROOM=CHARGER

1

C3314

220PF

5%
25V

2

COG
01005

ROOM=CHARGER

1

C3315

220PF

5%
25V

2

COG
01005

ROOM=CHARGER

6.3V

2

CER-X5R
0402-0.1MM

ROOM=CHARGER

1

C3391

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=CHARGER

45 43 42 41 34 31 27 21 19 18

C

B

TIGRIS_PMID2

PP1V8_ALWAYS

20 19

20

6

TIGRIS_TO_PMU_INT_L

OUT

USB_VBUS_DETECT

OUT

1

2

PP_VBUS1_E75

49

PP_VBUS2_IKTARA

50

1

R3330

100K

5%
1/32W
MF
01005

2

ROOM=CHARGER

C3320

4.7UF

20%
25V
CER-X5R
0402

ROOM=CHARGER

R3331

100

1%

1/32W

MF

01005

ROOM=CHARGER

R3332

30.1K

1%

1/32W

MF

01005

ROOM=CHARGER

1

C3301

1UF

10%
25V

2

X5R
402

ROOM=CHARGER

1

C3305

1UF

10%
25V

2

X5R
402

ROOM=CHARGER

50 47 22 21 10

50 47 22 21 10

21

21

1

C3322

220PF

5%
25V

2

COG
01005

1

C3302

220PF

5%
25V

2

COG
01005

1

C3306

220PF

5%
25V

2

COG
01005

20 16 14

48 4

1

C3323

220PF

5%
25V

2

COG

ROOM=CHARGER

ROOM=CHARGER

ROOM=CHARGER

I2C0_SMC_SDA

BI

I2C0_SMC_SCL

IN

SYSTEM_ALIVE

IN

HYDRA_TO_TIGRIS_VBUS1_VALID_L

IN

01005

ROOM=CHARGER

1

C3303

220PF

5%
25V

2

COG
01005

ROOM=CHARGER

1

C3307

220PF

5%
25V

2

COG
01005

ROOM=CHARGER

1

C3324

220PF

5%
25V

2

COG
01005

ROOM=CHARGER

1

C3304

220PF

5%
25V

2

COG
01005

ROOM=CHARGER

1

C3308

220PF

5%
25V

2

COG
01005

ROOM=CHARGER

1

2

TIGRIS_TO_PMU_INT_R_L
TIGRIS_VBUS_DETECT

23

BATTERY_NTC

C3325

220PF

5%
25V
COG
01005

ROOM=CHARGER

F2

E2

D2

C2

B2

A2

VDD_MAIN

VDD_MAIN

VDD_MAIN

VDD_MAIN

VDD_MAIN

A6

PMID1

B6

PMID1

C6

PMID1

D6

PMID1

E6

PMID1

F6

PMID2

G6

PMID2

H6

PMID2

A5

VBUS1

B5

VBUS1

C5

VBUS1

D5

VBUS1

E5

VBUS1

F5

VBUS2

G5

VBUS2

H5

VBUS2

F3

SDA

G2

SCL

F4

SYS_ALIVE

B4

VBUS1_VALID*

B3

VBUS2_VALID*

E3

INT*

C4

VBUS1_DET

D4

TEST

E4 H2

NTC

A8

U3300

SN2500A1YEWR

WCSP

ROOM=CHARGER

CRITICAL

GND

F8

E8

D8

C8

VDD_MAIN5

ACT_DIODE

HDQ_HOST

HDQ_GAUGE

AGND

H8

G8

LDO

BOOT

BUCK_SW
BUCK_SW
BUCK_SW
BUCK_SW
BUCK_SW
BUCK_SW
BUCK_SW
BUCK_SW

BATT
BATT
BATT
BATT
BATT

BATT_SNS

AUX1

NC0
NC1
NC2
NC3

B8

H3
H4
A7

B7
C7
D7
E7
F7
G7
H7

A1
B1
C1
D1
E1

F1
A3

G3
G4

A4

D3

G1
H1

TIGRIS_BOOT

NO_XNET_CONNECTION

TIGRIS_LX

TIGRIS_ACTIVE_DIODE

PP_VBUS1_E75_RVP_R

TIGRIS_LDO

1

C3360

220PF

10%
10V

2

X7R-CERM
01005

ROOM=CHARGER

C3340

0.047UF

21

10%
25V
X5R

0201

ROOM=CHARGER

VBATT_SENSE

1

C3361

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=CHARGER

L3340

0.47UH-6.8A-0.046OHM

3225

ROOM=CHARGER

22

IN

R3360

10

2 1

5%

1/32W

MF

01005

ROOM=CHARGER

TIGRIS_LX_MID

21

PP_VBUS1_E75_RVP

CRITICALCRITICAL

L3341

0.47UH-6.8A-0.046OHM

21

3225

ROOM=CHARGER

48 47 45

C3341

220PF

C0G-CERM

01005

ROOM=CHARGER

5%

10V

1

2

C3342

220PF

C0G-CERM

01005

ROOM=CHARGER

NOSTUFF

R3350

100K

1/32W
01005

ROOM=CHARGER

5%

10V

5%
MF

1

2

1

2

C3343

330PF

10%
16V

CER-X7R

01005

ROOM=CHARGER

C

A2

CRITICAL

S

B3

B2

B1

A3

Q3350

A1

G

D

C3

C2

C1

1

2

CSD68841W

BGA

ROOM=CHARGER

PP_BATT_VCC

50 22

B

1

C3350

330PF

10%
16V

2

CER-X7R
01005

ROOM=CHARGER

1

C3351

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=CHARGER

1

C3352

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=CHARGER

1

C3353

220PF

5%
10V

2

C0G-CERM
01005

ROOM=CHARGER

BATTERY NTC

A

C3370

100PF

5%

16V

NP0-C0G

01005

ROOM=CHARGER

1

1

2

I251

R3370

10KOHM-1%

01005

ROOM=CHARGER

2

BATTERY_NTC

23

BATTERY_NTC_RETURN

SHORT-20L-0.05MM-SM

OMIT

XW3370

ROOM=CHARGER

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/13/2016

A

SYSTEM POWER: Charger

DRAWING NUMBER

051-02221

21

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

33 OF 80

SHEET

23 OF 51

1

SIZE

D

678

3 245

1

D

D

C

C

Iktara Components on MLB Bottom

B

B

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

A

PAGE TITLE

SYSTEM POWER: Iktara

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

34 OF 80

SHEET

24 OF 51

1

SIZE

D

678

3 245

1

Cyclone + Button Connnector

D

Cyclone Filtering

IKTARA_COIL2

50

MAKE_BASE=TRUE

1

C3500

220PF

2%
50V

2

C0G
0201

ROOM=B2B_BUTTON

1

C3501

220PF

2%
50V

2

C0G
0201

ROOM=B2B_BUTTON

IKTARA_COIL2

25

BUTTON_VOL_DOWN_CONN_L

25

IKTARA_COIL2

25

BUTTON_VOL_UP_CONN_L

25

BUTTON_RINGER_A_CONN

25

IKTARA_COIL1

25

PP1V8_IMU_COMPASS_BTN_CONN

25

Rcpt: 516S00289
Plug: 516S00290

<-- This one on MLB

J3500

AA36D-S04VA1

F-ST-SM

PWR

PWR

ROOM=B2B_BUTTON

109

65

21
43

87

1211

COMPASS_TO_AOP_INT_BTN_CONN

I2C1_AOP_TO_COMPASS_SCL_BTN_CONN

I2C1_AOP_BI_COMPASS_SDA_BTN_CONN

25

25

25

D

C

50

IKTARA_COIL1

MAKE_BASE=TRUE

BUTTONS

20

BUTTON_RINGER_A

OUT

1

C3510

220PF

2%
50V

2

C0G
0201

ROOM=B2B_BUTTON

C3520

27PF

6.3V

NP0-C0G

0201

ROOM=B2B_BUTTON

5%

1

C3511

220PF

2%
50V

2

C0G
0201

ROOM=B2B_BUTTON

IKTARA_COIL1

25

C

R3520

100

1

2

1/32W
01005

ROOM=B2B_BUTTON

5%
MF

21

1

DZ3520

0201

5.5V-6.2PF

ROOM=B2B_BUTTON

2

BUTTON_RINGER_A_CONN

25

B

20

20

BUTTON_VOL_DOWN_L

OUT

5%

10V

5%

10V

1

2

1

2

BUTTON_VOL_UP_L

OUT

C3530

220PF

C0G-CERM

ROOM=B2B_BUTTON

C3540

220PF

C0G-CERM

ROOM=B2B_BUTTON

01005

01005

Compass (Button Flex Location)

R3530

100

5%

1/32W

MF

01005

ROOM=B2B_BUTTON

R3540

100

5%

1/32W

MF

01005

ROOM=B2B_BUTTON

21

1

DZ3530

12V-33PF

01005-1

ROOM=B2B_BUTTON

2

21

1

DZ3540

12V-33PF

01005-1

2

ROOM=B2B_BUTTON

BUTTON_VOL_DOWN_CONN_L

BUTTON_VOL_UP_CONN_L

25

25

B

A

49 26 17

50 49 41 12 4

50 49 41 12 4

49 12 4

PP1V8_IMU_S2

I2C1_AOP_SCL

IN

I2C1_AOP_SDA

BI

COMPASS_TO_AOP_INT

OUT

FL3550

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_DOCK

R3551

0.00

2 1

0%

1/32W

MF

01005

ROOM=B2B_DOCK

R3552

0.00

2 1

0%

1/32W

MF

01005

ROOM=B2B_DOCK

FL3553

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_DOCK

1

C3550

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DOCK

1

C3551

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

1

C3552

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

1

C3553

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DOCK

PP1V8_IMU_COMPASS_BTN_CONN

I2C1_AOP_TO_COMPASS_SCL_BTN_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C1_AOP_BI_COMPASS_SDA_BTN_CONN

CKPLUS_WAIVE=I2C_PULLUP

COMPASS_TO_AOP_INT_BTN_CONN

25

25

25

25

PAGE TITLE

SYSTEM POWER: B2B Cyclone + Button

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

35 OF 80

SHEET

25 OF 51

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

SIZE

D

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

678

3 245

1

D

C

12

12 4

12 4

Graphite - Accel & Gyro

APN: 338S00304

49 26 25 17

SPI_AOP_TO_ACCEL_GYRO_CS_L

IN

ACCEL_GYRO_TO_AOP_DATARDY

OUT

ACCEL_GYRO_TO_AOP_INT

OUT

PP1V8_IMU_S2

100K

5%

1/32W

MF

01005

1

2

R3601

ROOM=CARBON

5

CSB

15

SM
INT

7

MOTION_INT

16

VDD

CRITICAL

U3600

BMI262BB

LGA

ROOM=CARBON

1

VDDIO

SCLK
MOSI

MISO

D

Magnesium - Compass

(On Dock or Button Flex)

PP1V8_IMU_S2

OMIT_TABLE

1

C3600

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CARBON

2
3

46

SPI_AOP_TO_IMU_SCLK
SPI_AOP_TO_IMU_MOSI

SPI_IMU_TO_AOP_MISO

1

C3601

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CARBON

1

C3602

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CARBON

IN

IN

OUT

26 12 4

26 12 4

26 12 4

49 26 25 17

C

GND

8

GND

9

GND

10

GND

11

GND

12

GND

GND

14

13

CARBON_REGOUT

1

R3600

0.00

0%
1/32W
MF
01005

2

ROOM=CARBON

B

A

26 12 4

26 12 4

12

IN

SPI_AOP_TO_IMU_SCLK

IN

SPI_AOP_TO_PHOSPHORUS_CS_L

IN

PP1V8_IMU_S2

100K

5%

1/32W

MF

01005

1

2

R3620

ROOM=CARBON

8

VDD VDDIO

U3620

BMP284AA

SDI SDO

4

SCK

2

CS*

LGA

CRITICAL

GND

1

B

Phosphorus

BOSCH (APN:338S00188)
ST (APN:338S00230)

PP1V8_IMU_S2

OMIT_TABLE

1

C3620

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=PHOSPHORUS

6

ROOM=PHOSPHORUS

SPI_IMU_TO_AOP_MISOSPI_AOP_TO_IMU_MOSI

PHOSPHORUS_TO_AOP_INT

IRQ

53

7

1

C3622

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PHOSPHORUS

OUT

OUT

26 12 4

12 4

49 26 25 17 49 26 25 17

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/13/2016

A

SENSORS

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

36 OF 80

SHEET

26 OF 51

8

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67

35 4

2

1

678

3 245

1

Camera PMU

D

45 43 42 41 34 31 23 21 19 18

50 46

PP_VDD_MAIN

1

C3790

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=CAM_PMU

See 2831115 for C3791 removal

J7

VDD_BUCK9

J8

VDD_BUCK9

C5

VDD_MAIN

E2

VDD_MAIN

G4

VDD_MAIN

VCC MAIN

CRITICAL

U3700

D2462

WLCSP

SYM 1 OF 4

ROOM=CAM_PMU

BUCKS

BUCK9_LX0
BUCK9_LX0

BUCK9_FB

H7
H8
H5

CRITICAL

L3700

1UH-20%-2.5A-0.078OHM

CAMPMU_BUCK_LX0 PP2V85_VAR_CAM_VCM_PVDD

PIWA20120H-SM

ROOM=CAM_PMU

XW3700

SHORT-20L-0.05MM-SM

CAMPMU_BUCK_FB

ROOM=CAM_PMU

OMIT

21

1

C3700

18UF

20%

6.3V

2

CER-X5R

21

0402-0.1MM

ROOM=CAM_PMU

1

C3701

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=CAM_PMU

1

C3702

330PF

10%
16V

2

CER-X7R
01005

ROOM=CAM_PMU

D

29

C

50 38 34 21 19

19 17

PP_VDD_BOOST

PP1V25_S2

1

C3795

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=CAM_PMU

1

C3797

4UF

20%
4V

2

X5R
0201

ROOM=CAM_PMU

1

C3796

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=CAM_PMU

1

C3798

4UF

20%
4V

2

X5R
0201

ROOM=CAM_PMU

A1

VDD_LDO4_17

H2

VDD_LDO9

B6

VDD_LDO10

B5

VDD_LDO15

A2

VDD_LDO4_17

B4

VDD_LDO18

U3700

D2462

WLCSP

SYM 2 OF 4

LDO OUTPUTLDO INPUT

VLDO4
VLDO9

VLDO10
VLDO15

VLDO17
VLDO18

B2
J2

A6
A5

B1
A4

1

C3704

20%

6.3V

2

X5R-CERM
0201

ROOM=CAM_PMU

OMIT_TABLE

1

C3710

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=CAM_PMU

1

C3709

2.2UF2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CAM_PMU

1

C3715

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CAM_PMU

PP2V85_FCAM_AVDD

PP_CAM_WIDE_ADC

PP1V1_FCAM_DVDD

PP2V85_CAM_TELE_AVDD

PP1V1_CAM_WIDE_DVDD

32

29

32

29

C

PP1V1_CAM_TELE_JULIET_DVDD

Q3700

DMN1017UCP3

X3-DSN1010-3

D

2

S

3

G

ROOM=CAM_PMU

1

CRITICAL

CAMPMU_TELE_DVDD_DISABLE_L

35 30

PP1V1_CAM_TELE_DVDD

35

30

28

IN

B

For GPIO pullups only

30 29 28 17 16 14 10 8 7 6 5

43 35 34 32

PP1V8_IO

B3

VDD_LDO19

A7

VDD_LDO20_21

A8

VDD_LDO20_21

H1

VDD_LDO22

H3

VBUCK3

VLDO19
VLDO20

VLDO21
VLDO22

BUCK3_SW1

A3
B8

B7
G1

J3

NC

1

C3717

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CAM_PMU

1

C3719

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CAM_PMU

1

C3721

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CAM_PMU

1

C3718

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CAM_PMU

1

C3720

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CAM_PMU

1

C3722

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CAM_PMU

PP1V8_HAWKING

PP2V85_CAM_WIDE_AVDD

PP3V3_SVDD

PP_CAM_TELE_ADC

33

29

B

35 30 29 28

30

A

NC

J4

VPUMP

SW OUTPUTSW INPUT

ON_BUF

F2

CAMPMU_ON_BUF

ROOM=CAM_PMU

C3750

0.22UF

20%

6.3V
X5R

01005

1

2

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

PAGE TITLE

A

CAMERA: PMU (1/2)

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

37 OF 80

SHEET

27 OF 51

8

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67

35 4

2

1

Pull Downs

678

3 245

1

D

C

1

R3801

100K

5%
1/32W
MF
01005

2

ROOM=CAM_PMU

AP_TO_CAMPMU_RESET_L

11 28

1

C3800

0.22UF

20%

6.3V

2

X5R
01005

ROOM=CAM_PMU

11

D

PP3V3_SVDD

1

R3820

100K

U3700

D2462

WLCSP

I2C

RESET

SYM 3 OF 4

GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6

GPIO9
GPIO10
GPIO11
GPIO12
GPIO15

GPIO

R3802

8 31 34 35

I2C3_ISP_SDA

BI

CAMPMU_TO_AP_IRQ_L

OUT

33.2

1%

1/32W

MF

01005

21

R3803

49.9

1/32W
01005

21

1%
MF

11 28

I2C3_ISP_SCL

IN OUT

I2C3_ISP_SDA_U3700

CAMPMU_TO_AP_IRQ_R_L

AP_TO_CAMPMU_RESET_L

IN

CAMPMU_VREF
CAMPMU_IREF
CAMPMU_VRTC

1

R3800

200K

1%
1/32W
MF
01005

2

ROOM=CAM_PMU

1

C3810

0.1UF

20%

6.3V

2

X5R
01005

ROOM=CAM_PMU

NC

NC
NC

NC

E8
F8

D8
D6

F5

C1
D1

E1

J5

G5
C6

SCL
SDA

IRQ*
CRASH*
RESET_IN

VREF

IREF

VRTC

TDEV1
TDEV2

TCAL

REFERENCE

TEMPERATURE

F6
E6
D7
E4
D4
D3
F7
F3
G3
G2
E3

NC
NC
NC
NC

5%
1/32W
MF
01005

2

ROOM=CAM_PMU

CAMPMU_TO_STROBE_DRIVER_HWEN

CAMPMU_TO_RIGEL_ENABLE

YOGI_TO_RIGEL_STATUS_R

CAMPMU_TELE_DVDD_DISABLE_L

MAMA_BEAR_BI_RIGEL_STATUS_R

27 29 30 35

PP1V8_IO

AP_TO_MANY_BSYNC

OUT

8 12 20 21 50

IN

27

OUT

31 8 31 34 35

4 34

MAKE_BASE=TRUE

PP1V8_IO

5 6 7 8 10 14 16 17 27 29 30 32
34 35 43

R3811

10K

5%

1/32W

MF

01005

ROOM=CAM_PMU

R3810

10K

5%

1/32W

MF

01005

ROOM=CAM_PMU

21

YOGI_TO_RIGEL_STATUS

34 36

IN

C

21

MAMA_BEAR_BI_RIGEL_STATUS

IN

34 35

B

C2
C3
C4
C7
D2
D5
E5

F1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

U3700

D2462

WLCSP

SYM 4 OF 4

AMUX_AY

ATM

G6

VSS

G7

VSS

G8

VSS

H4

VSS

H6

VSS

J1

VSS

J6

VSS

F4

VSS

C8
E7

CAMPMU_TO_PMU_AMUX

OUT

20

B

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

PAGE TITLE

A

CAMERA: PMU (2/2)

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

38 OF 80

SHEET

28 OF 51

1

SIZE

D

D

PP1V1_CAM_WIDE_DVDD_CONN

29

90_LPDP_WIDE_TO_AP_D0_CONN_N

29

90_LPDP_WIDE_TO_AP_D0_CONN_P

29

90_LPDP_WIDE_TO_AP_D1_CONN_N

29

90_LPDP_WIDE_TO_AP_D1_CONN_P

29

90_LPDP_WIDE_TO_AP_D2_CONN_N

29

90_LPDP_WIDE_TO_AP_D2_CONN_P

29

AP_TO_WIDE_CLK_CONN

29

678

Wide Camera Connector

Rcpt: 516S00313
Plug: 516S00314

GND_VOID

GND_VOID

GND_VOID

GND_VOID

GND_VOID

GND_VOID

<-- This one on MLB

J3900

AA26DK-S026VA1

F-ST-SM

31

2827

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625

3029

32

WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN

PP1V1_CAM_WIDE_DVDD_CONN

LPDP_WIDE_BI_AP_AUX_CONN
I2C0_ISP_BI_WIDE_RCAM_OIS_SDA_CONN
I2C0_ISP_TO_WIDE_RCAM_OIS_SCL_CONN

AP_TO_WIDE_SHUTDOWN_CONN_L

WIDE_TO_TELE_SYNC_J3900_CONN

PP1V8_CAM_WIDE_VDDIO_CONN
PP_CAM_VCM_PVDD_CONN

29

29

29

29

30 29

29

30

29

30 29

PP3V3_SVDD

PP2V85_CAM_WIDE_AVDD

PP_CAM_WIDE_ADC

29 27

29 27

3 245

1

Power Filtering

FL3901

33-OHM-25%-1500MA

27

PP2V85_VAR_CAM_VCM_PVDD

0201

ROOM=B2B_WIDE_RCAM

FL3995

10-OHM-750MA

30 28 27 17 16 14 10 8 7 6 5

35 30 29 28 27

43 35 34 32

35 30 29 28 27

PP1V8_IO

PP3V3_SVDD

PP2V85_CAM_WIDE_AVDD

29 27

PP_CAM_WIDE_ADC

29 27

PP_CAM_VCM_PVDD_CONN

30 29

01005-1

ROOM=B2B_WIDE_RCAM

1

C3990

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

21

21

1

C3991

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

PP1V8_CAM_WIDE_VDDIO_CONN

1

C3995

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=B2B_WIDE_RCAM

1

C3992

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

PP_CAM_VCM_PVDD_CONN

OMIT_TABLE

1

C3909

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=B2B_WIDE_RCAM

29

1

C3996

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

30 29

D

1

C3994

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

C

ISP I2C

8

8

I2C0_ISP_SCL

IN

I2C0_ISP_SDA

BI

ROOM=B2B_WIDE_RCAM

R3900

0.00

1/32W
01005

ROOM=B2B_WIDE_RCAM

21

0%
MF

R3901

0.00

1/32W
01005

ROOM=B2B_WIDE_RCAM

21

0%
MF

1

C3900

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

1

C3901

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

I2C0_ISP_TO_WIDE_RCAM_OIS_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C0_ISP_BI_WIDE_RCAM_OIS_SDA_CONN

CKPLUS_WAIVE=I2C_PULLUP

29

29

PP1V1_CAM_WIDE_DVDD PP1V1_CAM_WIDE_DVDD_CONN

27 29

LPDP Filters

9

9

9

90_LPDP_WIDE_TO_AP_D0_P

BI

90_LPDP_WIDE_TO_AP_D0_N

BI

90_LPDP_WIDE_TO_AP_D1_P

IN

FL3903

33-OHM-25%-1500MA

21

0201

ROOM=B2B_TELE_CAM

C3930

0.1UF

ROOM=B2B_WIDE_RCAM

20%

6.3V

X5R-CERM

01005

C3931

0.1UF

ROOM=B2B_WIDE_RCAM

20%

6.3V

X5R-CERM

01005

C3940

0.1UF

ROOM=B2B_WIDE_RCAM

20%

6.3V

X5R-CERM

01005

OMIT_TABLE

1

C3925

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=B2B_TELE_RCAM

21

21

21

GND_VOID=TRUE

GND_VOID=TRUE

GND_VOID=TRUE

NOSTUFF

1

C3993

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

90_LPDP_WIDE_TO_AP_D0_CONN_P

90_LPDP_WIDE_TO_AP_D0_CONN_N

90_LPDP_WIDE_TO_AP_D1_CONN_P

1

C3928

15PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

29

29

29

C

B

A

IO Filters

8

8

AP_TO_WIDE_CLK

IN

AP_TO_WIDE_SHUTDOWN_L

IN

R3905

49.9

1/32W
01005

ROOM=B2B_WIDE_RCAM

21

1%
MF

R3907

0.00

1/32W
01005

ROOM=B2B_WIDE_RCAM

21

0%
MF

NOSTUFF

1

C3906

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

1

C3907

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

AP_TO_WIDE_CLK_CONN

AP_TO_WIDE_SHUTDOWN_CONN_L

29

29

C3941

0.1UF

9

90_LPDP_WIDE_TO_AP_D1_N

IN

ROOM=B2B_WIDE_RCAM

21

20%

6.3V

X5R-CERM

01005

GND_VOID=TRUE

90_LPDP_WIDE_TO_AP_D1_CONN_N

29

B

C3950

0.1UF

9

90_LPDP_WIDE_TO_AP_D2_P

IN

ROOM=B2B_WIDE_RCAM

21

20%

6.3V

X5R-CERM

01005

GND_VOID=TRUE

90_LPDP_WIDE_TO_AP_D2_CONN_P

29

C3951

0.1UF

9

90_LPDP_WIDE_TO_AP_D2_N

IN

ROOM=B2B_WIDE_RCAM

21

20%

6.3V

X5R-CERM

01005

GND_VOID=TRUE

90_LPDP_WIDE_TO_AP_D2_CONN_N

29

C3960

9

LPDP_WIDE_BI_AP_AUX

BI

0.1UF

21

20%

6.3V

X5R-CERM

01005

ROOM=B2B_WIDE_RCAM

SYNC_MASTER=test_mlb

PAGE TITLE

1

C3961

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

LPDP_WIDE_BI_AP_AUX_CONN

29

SYNC_DATE=10/13/2016

A

R3908

31

WIDE_AND_TELE_TO_STROBE_DRIVER_STROBE

OUT

0.00

1/32W
01005

ROOM=B2B_WIDE_RCAM

21

0%
MF

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

1

C3908

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_WIDE_RCAM

WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN

30 29

67

CAMERA: B2B Wide (WY)

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

35 4

2

BRANCH

evt-1

PAGE

39 OF 80

SHEET

29 OF 51

1

SIZE

D

678

Tele Camera Connector

3 245

1

D

30

30

30

30

30

30

30

30

30 27

35 30 27

PP1V1_CAM_TELE_DVDD_CONN

90_LPDP_TELE_TO_AP_D0_CONN_N
90_LPDP_TELE_TO_AP_D0_CONN_P

90_LPDP_TELE_TO_AP_D1_CONN_N
90_LPDP_TELE_TO_AP_D1_CONN_P

90_LPDP_TELE_TO_AP_D2_CONN_N
90_LPDP_TELE_TO_AP_D2_CONN_P
AP_TO_TELE_CLK_CONN

PP_CAM_TELE_ADC
PP2V85_CAM_TELE_AVDD

Rcpt: 516S00313
Plug: 516S00314

GND_VOID

GND_VOID

GND_VOID

GND_VOID

GND_VOID

GND_VOID

<-- This one on MLB

ROOM=B2B_TELE_RCAM

J4000

AA26DK-S026VA1

31

F-ST-SM

2827

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625

PP1V1_CAM_TELE_DVDD_CONN

LPDP_TELE_BI_AP_AUX_CONN

WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN

I2C1_ISP_TO_TELE_RCAM_OIS_SCL_CONN
I2C1_ISP_BI_TELE_RCAM_OIS_SDA_CONN

AP_TO_TELE_SHUTDOWN_CONN_L

WIDE_TO_TELE_SYNC_J4000_CONN

30

30

30 29

30

30

30

30

PP3V3_SVDD

PP1V8_CAM_TELE_VDDIO_CONN

30

Power Filtering

FL4001

10-OHM-750MA

29 28 27 17 16 14 10 8 7 6 5

35 30 29 28 27

43 35 34 32

35 30 29 28 27

35 30 27

PP1V8_IO

PP3V3_SVDD

PP2V85_CAM_TELE_AVDD
PP_CAM_TELE_ADC

30 27

PP_CAM_VCM_PVDD_CONN

30 29

01005-1

ROOM=B2B_TELE_RCAM

1

C4090

220PF

5%
10V

2

C0G-CERM
01005

21

1

2

ROOM=B2B_TELE_RCAM

1

C4017

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=B2B_TELE_RCAM

C4091

220PF

5%
10V
C0G-CERM
01005

ROOM=B2B_TELE_RCAM

1

C4096

2

1

C4092

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_TELE_RCAM

220PF

5%
10V
C0G-CERM
01005

ROOM=B2B_TELE_RCAM

PP1V8_CAM_TELE_VDDIO_CONN

30

1

C4094

220PF

5%
10V

2

C0G-CERM
01005

D

ROOM=B2B_TELE_RCAM

C

PP_CAM_VCM_PVDD_CONN

30 29

ISP I2C

8

8

I2C1_ISP_SCL

IN

I2C1_ISP_SDA

BI

32

R4000

0.00

1/32W
01005

ROOM=B2B_TELE_RCAM

21

0%
MF

R4001

0.00

1/32W
01005

ROOM=B2B_TELE_RCAM

21

0%
MF

3029

1

C4000

56PF

5%
25V

2

NP0-C0G-CERM
01005

1

C4001

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_TELE_RCAM

ROOM=B2B_TELE_RCAM

PP_CAM_VCM_PVDD_CONN

I2C1_ISP_TO_TELE_RCAM_OIS_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C1_ISP_BI_TELE_RCAM_OIS_SDA_CONN

CKPLUS_WAIVE=I2C_PULLUP

30

30

30 29

FL4003

33-OHM-25%-1500MA

PP1V1_CAM_TELE_DVDD

27

R4003

20K

1%

1/32W

MF

ROOM=B2B_TELE_CAM

01005

21

1

2

0201

ROOM=B2B_TELE_CAM

OMIT_TABLE NOSTUFF

1

C4025

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=B2B_TELE_RCAM

1

2

PP1V1_CAM_TELE_DVDD_CONN

1

C4093

220PF

5%
10V
C0G-CERM
01005

ROOM=B2B_TELE_RCAM

C4028

15PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=B2B_TELE_RCAM

30

C

LPDP

C4030

0.1UF

9

BI

90_LPDP_TELE_TO_AP_D0_P

ROOM=B2B_TELE_RCAM

21

20%

6.3V

X5R-CERM

01005

GND_VOID

C4031

0.1UF

9

BI

90_LPDP_TELE_TO_AP_D0_N

ROOM=B2B_TELE_RCAM

21

20%

6.3V

X5R-CERM

01005

GND_VOID

90_LPDP_TELE_TO_AP_D0_CONN_P

90_LPDP_TELE_TO_AP_D0_CONN_N

30

30

B

A

IO Filters

8

IN

8

30 29

AP_TO_TELE_SHUTDOWN_L

IN

WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN

BI

R4005

49.9

1/32W
01005

ROOM=B2B_TELE_RCAM

21

1%
MF

R4007

0.00

1/32W
01005

ROOM=B2B_TELE_RCAM

21

0%
MF

NOSTUFF

1

C4006

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_TELE_RCAM

1

C4007

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_TELE_RCAM

1

C4008

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_TELE_RCAM

AP_TO_TELE_CLK_CONNAP_TO_TELE_CLK

AP_TO_TELE_SHUTDOWN_CONN_L

30

30

C4040

0.1UF

9

OUT

90_LPDP_TELE_TO_AP_D1_P

ROOM=B2B_TELE_RCAM

21

20%

6.3V

X5R-CERM

01005

GND_VOID

90_LPDP_TELE_TO_AP_D1_CONN_P

30

C4041

0.1UF

9

OUT

90_LPDP_TELE_TO_AP_D1_N

ROOM=B2B_TELE_RCAM

21

20%

6.3V

X5R-CERM

01005

GND_VOID

90_LPDP_TELE_TO_AP_D1_CONN_N

30

B

C4050

0.1UF

9

OUT

ROOM=B2B_TELE_RCAM

21

20%

6.3V

X5R-CERM

01005

GND_VOID

90_LPDP_TELE_TO_AP_D2_CONN_P90_LPDP_TELE_TO_AP_D2_P

30

C4051

0.1UF

9

OUT

90_LPDP_TELE_TO_AP_D2_N

21

20%

6.3V

X5R-CERM

01005

90_LPDP_TELE_TO_AP_D2_CONN_N

GND_VOIDROOM=B2B_TELE_RCAM

30

C4060

0.1UF

9

LPDP_TELE_BI_AP_AUX

OUT

ROOM=B2B_TELE_RCAM

21

20%

6.3V

X5R-CERM

01005

LPDP_TELE_BI_AP_AUX_CONN

1

C4061

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_TELE_RCAM

SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

PAGE TITLE

30

A

R4010

29

WIDE_TO_TELE_SYNC_J3900_CONN

IN

0.00

1/32W
01005

ROOM=B2B_TELE_RCAM

21

0%
MF

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

1

C4010

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_TELE_RCAM

WIDE_TO_TELE_SYNC_J4000_CONN

30

67

CAMERA: B2B Tele (MT)

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

35 4

2

BRANCH

evt-1

PAGE

40 OF 80

SHEET

30 OF 51

1

SIZE

D

678

3 245

1

D

45 43 42 41 34 27 23 21 19 18

50 46

PP_VDD_MAIN

C4191

18UF

20%

6.3V

CER-X5R

0402-0.1MM

ROOM=STROBE

D

LED STROBE DRIVERS (NEON)

APN:353S00558
I2C Address (7-bit): 0x63

PP_LED1_BOOST_OUT

1

C4192

220PF

2

C0G-CERM

01005

ROOM=STROBE

5%

10V

1

2

1

2

31 28

31 29

50 36 31

35 34 31 28 8

35 34 31 28 8

CRITICAL

L4100

1UH-20%-3.6A-0.062OHM

0806

ROOM=STROBE

LED_DRIVER1_LX
CAMPMU_TO_STROBE_DRIVER_HWEN

IN

IN

BB_TO_STROBE_DRIVER_GSM_BURST_IND

IN

I2C3_ISP_SDA

BI

I2C3_ISP_SCL

IN

A2

B1
C2
B2

D2
A3
B3

SW
HWEN

INT 300K PD

STROBE

INT 300K PD

INT 300K PD

TX
SDA
SCL

U4100

LM3566

DSBGA

ROOM=STROBE2

CRITICAL

TORCH/TEMP

GND

OUTIN

LED1

LED2

C1

D3

D1

C3

1

C4105

220PF

5%
10V

2

C0G-CERM
01005

ROOM=STROBE

1

C4106

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=STROBE

STROBE_MODULE_NTC

PP_STROBE_COOL_WIDE_LED

PP_STROBE_WARM_ZOOM_LEDWIDE_AND_TELE_TO_STROBE_DRIVER_STROBE

1

C4102

220PF

5%
10V

2

33 31

C0G-CERM
01005

ROOM=STROBE

1

C4101

220PF

5%
10V

2

C0G-CERM
01005

ROOM=STROBE

33

33

C

B

C4196

18UF

20%

6.3V

CER-X5R

0402-0.1MM

ROOM=STROBE2

A1

C

APN:353S00868
I2C Address (7-bit): 0x67

PP_LED2_BOOST_OUT

1

2

1

CRITICAL

L4120

U4120

LM35662

ROOM=STROBE2

CRITICAL

INT 300K PD

DSBGA

TORCH/TEMP

GND

OUTIN

LED1

LED2

C1

D3

D1

C3

2

31 28

31 29

50 36 31

35 34 31 28 8

35 34 31 28 8

1UH-20%-3.6A-0.062OHM

0806

ROOM=STROBE2

LED_DRIVER2_LX

CAMPMU_TO_STROBE_DRIVER_HWEN

IN

WIDE_AND_TELE_TO_STROBE_DRIVER_STROBE

IN

BB_TO_STROBE_DRIVER_GSM_BURST_IND

IN

I2C3_ISP_SDA

BI

I2C3_ISP_SCL

IN

A2

B1
C2
B2

D2
A3
B3

SW
HWEN

INT 300K PD

STROBE

INT 300K PD

TX
SDA
SCL

1

C4125

220PF

5%
10V

2

C0G-CERM
01005

ROOM=STROBE

STROBE_MODULE_NTC

1

C4126

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=STROBE2

PP_STROBE_COOL_ZOOM_LED

PP_STROBE_WARM_WIDE_LED

1

C4122

220PF

5%
10V

2

33 31

C0G-CERM
01005

1

C4121

220PF

5%
10V

2

C0G-CERM
01005

ROOM=STROBE2ROOM=STROBE2

33

33

B

A1

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/13/2016

A

CAMERA: Strobe Drivers

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

41 OF 80

SHEET

31 OF 51

1

SIZE

D

678

3 245

1

D

NEW HAMPSHIRE POWER

16 14 10 8 7 6 5
34 30 29 28 27 17

43 35

27

27

PP1V8_IO

PP1V1_FCAM_DVDD

PP2V85_FCAM_AVDD

FL4200

10-OHM-750MA

21

01005-1

ROOM=B2B_FCAM

FL4202

10-OHM-750MA

21

01005-1

ROOM=B2B_FCAM

FL4204

10-OHM-750MA

21

01005-1

ROOM=B2B_FCAM

1

C4200

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=B2B_FCAM

1

C4202

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=B2B_FCAM

1

C4204

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=B2B_FCAM

1

C4201

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_FCAM

1

C4203

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_FCAM

1

C4205

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_FCAM

PP1V8_FCAM_VDDIO_CONN

PP1V1_FCAM_DVDD_CONN

PP2V85_FCAM_AVDD_CONN

32

32

32

PP1V1_FCAM_DVDD_CONN

32

8

8

8

8

8

8

90_MIPI_FCAM_TO_AP_DATA0_P

BI

90_MIPI_FCAM_TO_AP_DATA0_N

BI

90_MIPI_FCAM_TO_AP_CLK_P

OUT

90_MIPI_FCAM_TO_AP_CLK_N

OUT

90_MIPI_FCAM_TO_AP_DATA1_P

OUT

90_MIPI_FCAM_TO_AP_DATA1_N

OUT

FCAM Connector

Rcpt: 516S00244
Plug: 516S00245

BB35K-RA18-3A

23

24

J4200

F-ST-SM

ROOM=B2B_FCAM

<-- This one on MLB

2019

21
43
65
87
109
1211
1413
1615
1817

2221

I2C2_ISP_TO_FCAM_SAVAGE_SCL_CONN
I2C2_ISP_BI_FCAM_SAVAGE_SDA_CONN

PP1V8_FCAM_VDDIO_CONN

PP2V85_FCAM_AVDD_CONN

AP_TO_FCAM_SHUTDOWN_CONN_L

FCAM_TO_JULIET_SYNC_J4200

AP_TO_FCAM_CLK_CONN

35 32

35 32

32

32

32

32

32

D

C

FCAM I/O

35 8

8 4

35

AP_TO_FCAM_JULIET_CLK

IN

AP_TO_FCAM_SHUTDOWN_L

IN

FCAM_TO_JULIET_SYNC_J4530

OUT

1

C4210

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_FCAM

R4210

0.00

0%

1/32W

MF

01005

ROOM=B2B_FCAM

R4211

0.00

0%

1/32W

MF

01005

ROOM=B2B_FCAM

R4212

0.00

0%

1/32W

MF

01005

ROOM=B2B_FCAM

21

AP_TO_FCAM_CLK_CONN

32

C

21

1

C4211

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_FCAM

21

FCAM_TO_JULIET_SYNC_J4200

1

C4212

100PF

5%
16V

2

NP0-C0G
01005

ROOM=B2B_FCAM

AP_TO_FCAM_SHUTDOWN_CONN_L

32

32

B

ISP I2C2

8

8

I2C2_ISP_SCL

IN

I2C2_ISP_SDA

BI

R4220

0.00

1/32W
01005

21

0%
MF

ROOM=B2B_FCAM

R4221

0.00

0%

1/32W

MF

01005

ROOM=B2B_FCAM

I2C2_ISP_TO_FCAM_SAVAGE_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

1

C4220

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_FCAM

21

I2C2_ISP_BI_FCAM_SAVAGE_SDA_CONN

1

C4221

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_FCAM

CKPLUS_WAIVE=I2C_PULLUP

35 32

B

35 32

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/13/2016

A

CAMERA: B2B FCAM

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

42 OF 80

SHEET

32 OF 51

1

SIZE

D

HAWKING

678

3 245

1

D

37

37

OUT

OUT

27

HAWKING_TO_CODEC_AIN5_N

HAWKING_TO_CODEC_AIN5_P

PP1V8_HAWKING

C4300

0.22UF

21

10%

6.3V

CER-X5R

01005

ROOM=B2B_STROBE

C4301

0.22UF

21

10%

6.3V

CER-X5R

01005

ROOM=B2B_STROBE

HAWKING_TO_CODEC_AIN5_C_P

CKPLUS_WAIVE=MISS_N_DIFFPAIR

FL4303

150OHM-25%-200MA-0.7DCR

21

01005

ROOM=B2B_STROBE

OMIT_TABLE

1

C4303

2.2UF

20%

6.3V

2

X5R-CERM
0201

1

C4304

220PF

5%
10V

2

C0G-CERM

ROOM=B2B_STROBE ROOM=B2B_STROBE

01005

FL4301

150OHM-25%-200MA-0.7DCR

21

01005

ROOM=B2B_STROBE

PP1V8_HAWKING_CONN

1

C4302

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_STROBE

33

GND

HAWKING_TO_CODEC_AIN5_P_CONN

33

33

REARMIC2_TO_CODEC_AIN2_CONN_P

33

REARMIC2_TO_CODEC_AIN2_CONN_N

33

PP_CODEC_TO_REARMIC2_BIAS_CONN

33

REARMIC2_TO_CODEC_BIAS_FILT_RET

38

BUTTON_POWER_KEY_CONN_L

33

PP_STROBE_WARM_ZOOM_LED

33 31

Strobe Connector

Rcpt: 516S00267 <-- This one on MLB
Plug: 516S00268

J4300

AA36D-S010VA1

F-ST-SM

PWR

SIGNAL

PWR

ROOM=B2B_STROBE

1615

1211

21
43
65
87
109

1413

1817

PP_STROBE_COOL_WIDE_LED

I2C1_AP_BI_MIC2_SDA
I2C1_AP_TO_MIC2_SCL

PP1V8_HAWKING_CONN

HAWKING_TO_CODEC_AIN5_P_CONN

STROBE_MODULE_NTC_CONN

33

33

33

33

33

PP_STROBE_WARM_WIDE_LED

PP_STROBE_COOL_ZOOM_LEDPP_STROBE_COOL_ZOOM_LED

D

33 31

33 31

33 31 33 31

C

MIC2 (ANC REF)

PP_CODEC_TO_REARMIC2_BIAS

38

37

37

REARMIC2_TO_CODEC_AIN2_P

OUT

REARMIC2_TO_CODEC_AIN2_N

OUT

Power Key Button

FL4305

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_STROBE

1

2

FL4306

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_STROBE

1

2

FL4307

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_STROBE

1

2

PP_CODEC_TO_REARMIC2_BIAS_CONN

C4305

220PF

5%
10V
C0G-CERM
01005

ROOM=B2B_STROBE

REARMIC2_TO_CODEC_AIN2_CONN_P

C4306

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=B2B_STROBE

REARMIC2_TO_CODEC_AIN2_CONN_N

C4307

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=B2B_STROBE

33

33

33

33

GND

GND

MAKE_BASE=TRUE

C

B

20

BUTTON_POWER_KEY_L

OUT

C4310

27PF

5%

6.3V

NP0-C0G

0201

ROOM=B2B_STROBE

R4310

100

21

1

2

5%

1/32W

MF

01005

ROOM=B2B_STROBE

1

DZ4310

5.5V-6.2PF

0201

2

ROOM=B2B_STROBE

BUTTON_POWER_KEY_CONN_L

33

Strobe Filtering

PP_STROBE_WARM_ZOOM_LED

5%

10V

1

2

C4320

220PF

C0G-CERM

01005

ROOM=B2B_STROBE

33 31

B

R4308

PP_STROBE_COOL_WIDE_LED

C4322

220PF

5%

10V

C0G-CERM

01005

ROOM=B2B_STROBE

33 31

1

2

49 10

I2C1_AP_SCL

IN

0.00

0%

1/32W

MF

01005

ROOM=B2B_STROBE

21

1

C4308

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_STROBE

I2C1_AP_TO_MIC2_SCL

33

A

31

PP_STROBE_WARM_WIDE_LED

PP_STROBE_COOL_ZOOM_LED

STROBE_MODULE_NTC

OUT

C4324

220PF

5%

10V

C0G-CERM

01005

ROOM=B2B_STROBE

C4326

220PF

5%

10V

C0G-CERM

01005

ROOM=B2B_STROBE

150OHM-25%-200MA-0.7DCR

R4330

27K

0.5%

1/32W

ROOM=B2B_STROBE

01005

MF

1

2

1

2

1

2

FL4330

01005

ROOM=B2B_STROBE

33 31

49 10

33 31

I2C1_AP_SDA I2C1_AP_BI_MIC2_SDA

IN

R4309

0.00

2 1

0%

1/32W

MF

01005

ROOM=B2B_STROBE

SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

PAGE TITLE

1

C4309

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_STROBE

33

A

CAMERA: B2B Strobe + Hold Button

21

1

C4330

220PF

5%
10V

2

C0G-CERM
01005

STROBE_MODULE_NTC_CONN

ROOM=B2B_STROBE

33

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

43 OF 80

SHEET

33 OF 51

SIZE

D

8

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67

35 4

2

1

678

3 245

1

D

Rigel Driver

45 43 42 41 31 27 23 21 19 18

50 46

PP_VDD_MAIN

1

C4497

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=RIGEL

C4494

4UF

20%

6.3V

CERM-X5R

0201

ROOM=RIGEL

C4493

4UF

20%

6.3V

CERM-X5R

0201

ROOM=RIGEL

C4492

4UF

20%

6.3V

CERM-X5R

0201

ROOM=RIGEL

1

2

1

2

D

1

2

C

29 28 27 17 16 14 10 8 7 6 5

43 35 32 30

50 38 27 21 19

PP1V8_IO

PP_VDD_BOOST

Terminate @ Cap via on VDD_MAIN plane.

OMIT

XW4400

SHORT-20L-0.05MM-SM

2 1

ROOM=RIGEL

PP_RIGEL_VINCORE

PP_VANA

C4491

4UF

20%

6.3V

CERM-X5R

0201

ROOM=RIGEL

C4490

1.0UF

20%

10V

X5R-CERM

0201-1

ROOM=RIGEL

1

2

1

2

C

B

35 31 28 8

I2C3_ISP_SDA

IN

R4400

33.2

1%

1/32W

MF

01005

C4422

0.01UF

10%

6.3V

X5R

01005

ROOM=RIGEL

1

C4495

1.0UF

20%

10V

2

X5R-CERM
0201-1

ROOM=RIGEL

PP_ROMEO_CATHODE

35 4

35

28 4

36 28

35 28

35 11

8

20 8 4

35 31 28 8

21

ROMEO_TO_RIGEL_VCSEL_NTC

IN

CAMPMU_TO_RIGEL_ENABLE

IN

YOGI_TO_RIGEL_STATUS

BI

MAMA_BEAR_BI_RIGEL_STATUS

BI

JULIET_PMU_TO_RIGEL_STROBE

IN

AP_TO_RIGEL_CLK

IN

RIGEL_TO_ISP_INT

OUT

I2C3_ISP_SCL

IN

I2C3_ISP_SDA_U4400

1

C4496

1.0UF

20%

10V

2

X5R-CERM
0201-1

ROOM=RIGEL

RIGEL_LSCP

1

2

1

C4498

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=RIGEL

K4

VK

K5

VK

K6

VK

K7

VK

K8

VK

G4

NTC

C4

OTPHV

D4

TAMP

B3

ENA

C8

XEF1

C7

XEF0

B8

THROT

A4

STROBE

B7

TESTMODE

B5

TESTMODE2

B6

TEST

A7

MCLK

B4

INT

A5

SCL

A6

SDA

G5

PD0

G6

PD1

H7

LSCP

G9

G2

VCC4

VCC3

H8

C5

VDDIO

VIN_LVT

H5

H4

VANA

VINVCORE2

F2F1E2

F5

VINSDB

VINCORE

VINSDB

CRITICAL

U4400

STB600B0

WLCSP

ROOM=RIGEL

A3A2A1

VINSUB

VINSDB

VINSUB

VINSUB

A9A8A10

VINSUA

VINSUA

VINSUA

F9

F10

VINSDA

VINSDA

VINSDA

VBBOUTA
VBBOUTA
VBBOUTA

BOOSTSDA

BULKSDA
BULKSDB

BOOSTSDB

VBBOUTB
VBBOUTB
VBBOUTB

E9

VLXA
VLXA
VLXA

VCXA
VCXA

VCXB
VCXB

VLXB
VLXB
VLXB

IOUT0
IOUT0
IOUT0

IOUT1
IOUT1
IOUT1

IOUT2
IOUT2
IOUT2

IOUT3
IOUT4

PP_RIGEL_BUCK_BOOST_A

H10
J10
K10

D10
D9
E10

B10
B9

E8
D8

D3
E3

B1
B2

D1
D2
E1

J1
J2
J3

H9
K9
J9

H1
H2
H3

K1
K2
K3

G1
G10

RIGEL_VLXA

RIGEL_VCXA

RIGEL_BOOSTSDA
RIGEL_BULKSDA

RIGEL_BULKSDB
RIGEL_BOOSTSDB

RIGEL_VCXB

RIGEL_VLXB

PP_RIGEL_BUCK_BOOST_B

1

C4405

4.7UF

20%

16V

2

X5R
0402

ROOM=RIGEL

1

C4410

4.7UF

20%

16V

2

X5R
0402

ROOM=RIGEL

PP_ROMEO_DENSE_ANODE

PP_ROMEO_SPARSE_ANODE

PP_ROSALINE_ANODE

PP_ROMEO_A_ANODE
PP_ROMEO_B_ANODE

35

36

35

35

1

2

1

2

35 4

C4420

0.01UF

10%

6.3V

X5R
01005

ROOM=RIGEL

C4421

0.01UF

10%

6.3V

X5R
01005

ROOM=RIGEL

L4400

0.47UH-20%-4A-0.048OHM

21

PIWA20120H-SM

ROOM=RIGEL

L4401

0.47UH-20%-4A-0.048OHM

21

PIWA20120H-SM

ROOM=RIGEL

1

C4400

4.7UF

20%

16V

2

X5R
0402

ROOM=RIGEL

1

C4411

4.7UF

20%

16V

2

X5R
0402

ROOM=RIGEL

1

C4401

220PF

5%

10V

2

C0G-CERM
01005

ROOM=RIGEL

1

C4412

220PF

5%

10V

2

C0G-CERM
01005

ROOM=RIGEL

B

A

8

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PGNDK

PGNDK

PGNDK

PGNDK

J8J7J6J5J4

PGNDK

GNDCORE4

G8

GNDCORE2

GNDCORE3

G3

GNDCORE

F6

H6

GNDD

C6

GNDS

GNDS

E6F8E5

G7

GNDS

GNDS

GNDS

GNDS

F3

D7D6D5

GNDS

GNDS

GNDS

C3

PGNDB

PGNDB

C2

C1

PGNDA

PGNDA

C9

C10

PAGE TITLE

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

A

PEARL: Power

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

44 OF 80

SHEET

34 OF 51

1

SIZE

D

678

3 245

1

Romeo Connector

D

C

Romeo Power Filtering

PP_ROMEO_B_ANODE

35 34

PP_ROMEO_A_ANODE

35 34

35 34 4

35 34 4

35 30 29 28 27

PP_ROMEO_DENSE_ANODE
PP_ROMEO_SPARSE_ANODE

35 34

PP_ROMEO_CATHODE
PP3V3_SVDD

Romeo I/O

FL4554

150OHM-25%-200MA-0.7DCR

12

34

ROMEO_TO_AOP_B2B_DETECT

OUT

ROMEO_TO_RIGEL_VCSEL_NTC

OUT

01005

ROOM=B2B_PEARL

FL4555

150OHM-25%-200MA-0.7DCR

01005

ROOM=B2B_PEARL

1

C4592

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

21

1

2

21

1

2

1

C4593

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

C4554

220PF

5%
10V
C0G-CERM
01005

ROOM=B2B_PEARL

C4555

220PF

5%
10V
C0G-CERM
01005

ROOM=B2B_PEARL

1

C4594

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

1

C4595

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

ROMEO_TO_AOP_B2B_DETECT_CONN

ROMEO_TO_RIGEL_VCSEL_NTC_CONN

1

C4596

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

35

35

1

C4597

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

34 31 28 8

ISP I2C3

I2C3_ISP_SCL

IN

R4552

0.00

1/32W
01005

ROOM=B2B_PEARL

21

0%
MF

1

C4552

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_PEARL

35 34 4

35 34 4

35 34 4

PP_ROMEO_DENSE_ANODE

PP_ROMEO_CATHODE

PP_ROMEO_B_ANODE

35 34

PP_ROMEO_A_ANODE

35 34

ROMEO_TO_AOP_B2B_DETECT_CONN

35

I2C3_ISP_BI_MAMA_BEAR_SDA_CONN

35

PP_ROMEO_CATHODE

PP_ROMEO_SPARSE_ANODE

35 34

I2C3_ISP_TO_MAMA_BEAR_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

35

Rcpt: 516S00267
Plug: 516S00268

AA36D-S010VA1

ROOM=B2B_PEARL

J4500

F-ST-SM

PWR

SIGNAL

PWR

<-- This one on MLB

1615

1211

21
43
65
87
109

1413

1817

PP_ROMEO_DENSE_ANODE

PP_ROMEO_CATHODE

I2C3_ISP_TO_MAMA_BEAR_SCL_CONN
MAMA_BEAR_BI_RIGEL_STATUS_CONN

ROMEO_TO_RIGEL_VCSEL_NTC_CONN

35

35

35

PP3V3_SVDD

PP_ROMEO_CATHODE

PP_ROMEO_SPARSE_ANODE

35 34

35 34 4

D

35 34 4

35 30 29 28 27

35 34 4

C

34 28

MAMA_BEAR_BI_RIGEL_STATUS

IN

FL4556

150OHM-25%-200MA-0.7DCR

21

01005

ROOM=B2B_PEARL

1

C4556

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

MAMA_BEAR_BI_RIGEL_STATUS_CONN

35

34 31 28 8

I2C3_ISP_SDA

BI

R4553

0.00

1/32W
01005

ROOM=B2B_PEARL

21

0%
MF

1

C4553

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_PEARL

I2C3_ISP_BI_MAMA_BEAR_SDA_CONN

CKPLUS_WAIVE=I2C_PULLUP

35

B

30 27

A

43 34 32 30
27 17 16 14

7 6 5

10 8
29 28

Juliet Power and I/O

XW4570

SHORT-01005

PP1V1_CAM_TELE_JULIET_DVDD

27

PP2V85_CAM_TELE_AVDD

ROOM=B2B_PEARL

FL4572

10-OHM-750MA

01005-1

FL4574

10-OHM-750MA

01005-1

ROOM=B2B_PEARL

21

21

ROOM=B2B_PEARL

21

PP1V1_JULIET_DVDD_CONN

1

C4570

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=B2B_PEARL

1

C4571

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

PP2V85_JULIET_AVDD_CONN

1

C4572

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=B2B_PEARL

1

C4573

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

PP1V8_JULIET_VDDIO_CONNPP1V8_IO

1

C4574

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=B2B_PEARL

1

C4575

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

35

35

35

32 8

34 11

35 32

Juliet Connector

Rcpt: 516S00244
Plug: 516S00245

R4560

8

AP_TO_JULIET_SHUTDOWN_L

IN

150OHM-25%-200MA-0.7DCR

AP_TO_FCAM_JULIET_CLK

IN

5%

25V

1

2

C4562

56PF

NP0-C0G-CERM

ROOM=B2B_PEARL

01005

0.00

1/32W
01005

ROOM=B2B_PEARL

21

0%
MF

FL4561

01005

ROOM=B2B_PEARL

AP_TO_JULIET_SHUTDOWN_L_CONN

1

C4560

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

21

AP_TO_JULIET_CLK_CONN

35

35

35

90_MIPI_JULIET_TO_AP_DATA0_P

8

90_MIPI_JULIET_TO_AP_DATA0_N

8

90_MIPI_JULIET_TO_AP_CLK_P

8

90_MIPI_JULIET_TO_AP_CLK_N

8

90_MIPI_JULIET_TO_AP_DATA1_P

8

90_MIPI_JULIET_TO_AP_DATA1_N

8

PP1V1_JULIET_DVDD_CONN

R4563

JULIET_PMU_TO_RIGEL_STROBE

OUT

IN

FCAM_TO_JULIET_SYNC_J4530

0.00

1/32W
01005

ROOM=B2B_PEARL

21

0%
MF

1

C4563

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

1

C4564

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

JULIET_PMU_TO_RIGEL_STROBE_CONN

35

J4530

BB35K-RA18-3A

F-ST-SM

23

24

ROOM=B2B_PEARL

<-- This one on MLB

2019

21
43
65
87
109
1211
1413
1615
1817

2221

SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

PAGE TITLE

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

JULIET_PMU_TO_RIGEL_STROBE_CONN

I2C2_ISP_BI_FCAM_SAVAGE_SDA_CONN
I2C2_ISP_TO_FCAM_SAVAGE_SCL_CONN

35

FCAM_TO_JULIET_SYNC_J4530

PP2V85_JULIET_AVDD_CONN

PP1V8_JULIET_VDDIO_CONN

AP_TO_JULIET_SHUTDOWN_L_CONN

AP_TO_JULIET_CLK_CONN

35

35

35

BI

IN

35

PEARL: B2B Romeo + Juliet

Apple Inc.

35 32

32

32

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

45 OF 80

SHEET

35 OF 51

B

A

SIZE

D

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

678

3 245

1

D

AOP I2C

12

IN

12

I2C0_AOP_SDA

BI

R4600

0.00

1/32W
01005

ROOM=B2B_PEARL

21

0%
MF

R4601

0.00

1/32W
01005

ROOM=B2B_PEARL

21

0%
MF

1

C4600

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_PEARL

1

C4601

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_PEARL

I2C0_AOP_TO_PROX_ALS_YOGI_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C0_AOP_BI_PROX_ALS_YOGI_SDA_CONN

CKPLUS_WAIVE=I2C_PULLUP

36

36

Yogi Signals

28 34

YOGI_TO_RIGEL_STATUS

BI

36 50

FL4650

150OHM-25%-200MA-0.7DCR

21

01005

ROOM=B2B_PEARL

1

C4650

2

ROOM=B2B_PEARL

SPEAKER2

SPKRAMP_TOP_TO_COIL_OUT_POS

IN

220PF

5%
10V
C0G-CERM
01005

C4631

220PF

5%

10V

C0G-CERM

ROOM=B2B_PEARL

01005

Rosaline + Misc Connector

<-- This one on MLBRcpt: 516S00325

Plug: 516S00326

YOGI_TO_RIGEL_STATUS_CONNI2C0_AOP_SCL

1

C4635

1

2

820PF

10%
10V

2

X5R
01005

ROOM=B2B_PEARL

1

C4630

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

38

36

XW4600

SHORT-20L-0.05MM-SM

FRONTMIC3_TO_CODEC_BIAS_FILT_RET

FRONTMIC3_TO_CODEC_AIN3_CONN_N

36

PP3V0_YOGI_PROX_ALS_CONN

36

34 36

PP_ROSALINE_ANODE

COIL_TO_SPKRAMP_TOP_VSENSE_POS_CONN

36

SPKRAMP_TOP_TO_COIL_OUT_NEG

36 50

CODEC_AOUT_TO_HAC_CONN_P

36

36 50

SPKRAMP_TOP_TO_COIL_OUT_POS

ROOM=B2B_PEARL

OMIT

21

J4600

AA26DK-S028VA1

F-ST-SM

33

3029

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827

3231

34

ROOM=B2B_PEARL

FRONTMIC3_TO_CODEC_AIN3_CONN_P

PP_CODEC_TO_FRONTMIC3_BIAS_CONN

YOGI_TO_RIGEL_STATUS_CONN
PROX_BI_AP_AOP_INT_CONN_L

I2C0_AOP_BI_PROX_ALS_YOGI_SDA_CONN
I2C0_AOP_TO_PROX_ALS_YOGI_SCL_CONN

ALS_TO_AOP_INT_CONN_L

PP_ROSALINE_ANODE

BB_TO_STROBE_DRIVER_GSM_BURST_IND_CONN

COIL_TO_SPKRAMP_TOP_VSENSE_NEG_CONN

SPKRAMP_TOP_TO_COIL_OUT_NEG

CODEC_AOUT_TO_HAC_CONN_N

SPKRAMP_TOP_TO_COIL_OUT_POS

36

D

36

36

36

36

36

36

34 36

36

36

36 50

36

36 50

C

PROX & ALS POWER

36 50

50

50

SPKRAMP_TOP_TO_COIL_OUT_NEG

IN

COIL_TO_SPKRAMP_TOP_VSENSE_POS

OUT

COIL_TO_SPKRAMP_TOP_VSENSE_NEG

OUT

MIC3

NOSTUFF

C4633

220PF

5%

10V

C0G-CERM

ROOM=B2B_PEARL

01005

NOSTUFF

C4634

220PF

5%

10V

C0G-CERM

ROOM=B2B_PEARL

01005

1

2

1

2

1

C4636

820PF

10%
10V

2

X5R
01005

ROOM=B2B_PEARL

R4633

0.00

0%

1/32W

MF

01005

ROOM=B2B_PEARL

R4634

0.00

0%

1/32W

MF

01005

ROOM=B2B_PEARL

1

C4632

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

COIL_TO_SPKRAMP_TOP_VSENSE_POS_CONN

21

COIL_TO_SPKRAMP_TOP_VSENSE_NEG_CONN

21

36

36

PP_ROSALINE_ANODE

1

C4660

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

C

34 36

B

PP3V0_S2

19 45 47 48
50

PROX/ALS I/O

12

PROX_BI_AP_AOP_INT_L

BI

R4611

0.00

0%

1/32W

MF

01005

ROOM=B2B_PEARL

R4617

240

1%

1/32W

MF

01005

ROOM=B2B_PEARL

FL4640

150OHM-25%-200MA-0.7DCR

PP_CODEC_TO_FRONTMIC3_BIAS

38

01005

ROOM=B2B_PEARL

21

OMIT_TABLE

1

C4613

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=B2B_PEARL

1

C4614

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

PP3V0_YOGI_PROX_ALS_CONN

36

37

OUT

FRONTMIC3_TO_CODEC_AIN3_N

FL4641

150OHM-25%-200MA-0.7DCR

01005

ROOM=B2B_PEARL

21

1

DZ4640

6.8V-100PF

01005

ROOM=B2B_PEARL

2

PP_CODEC_TO_FRONTMIC3_BIAS_CONN

36

B

21

1

DZ4641

6.8V-100PF

01005

ROOM=B2B_PEARL

2

FRONTMIC3_TO_CODEC_AIN3_CONN_N

36

FL4642

150OHM-25%-200MA-0.7DCR

21

1

C4617

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

PROX_BI_AP_AOP_INT_CONN_L

36

37

OUT

FRONTMIC3_TO_CODEC_AIN3_P

2 1

01005

ROOM=B2B_PEARL

1

DZ4642

6.8V-100PF

01005

ROOM=B2B_PEARL

2

FRONTMIC3_TO_CODEC_AIN3_CONN_P

36

A

12

31 50

ALS_TO_AOP_INT_L

OUT

BB_TO_STROBE_DRIVER_GSM_BURST_IND

IN

FL4618

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_PEARL

1

C4618

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_PEARL

FL4619

150OHM-25%-200MA-0.7DCR

01005

ROOM=B2B_PEARL

NOSTUFF

21

1

R4619

0.00

0%
1/32W
MF
01005

2

ROOM=B2B_PEARL

ALS_TO_AOP_INT_CONN_L

BB_TO_STROBE_DRIVER_GSM_BURST_IND_CONN

36

36

37

37

OUT

OUT

CODEC_AOUT_TO_HAC_P

CODEC_AOUT_TO_HAC_N

FL4643

150OHM-25%-200MA-0.7DCR

21

01005

ROOM=B2B_PEARL

1

2

FL4644

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_PEARL

1

2

DZ4643

6.8V-100PF

01005

ROOM=B2B_PEARL

DZ4644

6.8V-100PF

01005

ROOM=B2B_PEARL

CODEC_AOUT_TO_HAC_CONN_P

CODEC_AOUT_TO_HAC_CONN_N

36

36

PAGE TITLE

PEARL: B2B Rosaline + Misc

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

46 OF 80

SHEET

36 OF 51

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

SIZE

D

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

678

CALLAN AUDIO CODEC (ANALOG INPUTS & OUTPUTS)

3 245

1

D

49

49

33

33

36

36

IN

LOWERMIC1_TO_CODEC_AIN1_N

IN

REARMIC2_TO_CODEC_AIN2_P

IN

REARMIC2_TO_CODEC_AIN2_N

IN

FRONTMIC3_TO_CODEC_AIN3_P

IN

FRONTMIC3_TO_CODEC_AIN3_N

IN

K3

L3

K4

L4

K6

L6

AIN1+
AIN1-

AIN2+
AIN2-

AIN3+
AIN3-

U4700

CS42L75

WLCSP

SYM 1 OF 3

CRITICAL

ROOM=CODEC

AOUT+

AOUT-

K8
L8

CODEC_AOUT_TO_HAC_PLOWERMIC1_TO_CODEC_AIN1_P
CODEC_AOUT_TO_HAC_N

OUT
OUT

D

36

36

C

49

49

33

33

LOWERMIC4_TO_CODEC_AIN4_P

IN

LOWERMIC4_TO_CODEC_AIN4_N

IN

HAWKING_TO_CODEC_AIN5_P

IN

HAWKING_TO_CODEC_AIN5_N

IN

NC
NC

NC
NC

K5

L5

G3
G2

F3

G4

F4

E3

AIN4+
AIN4-

AIN5+
AIN5-

AIN6+
AIN6-

AIN7+
AIN7-

C

C4700

100PF

21

B

50

50

41 4

41 4

PDM_CODEC_TO_SPKRAMP_TOP_CLK

OUT

PDM_CODEC_TO_SPKRAMP_TOP_DATA

OUT

PDM_CODEC_TO_ARC_CLK

OUT

PDM_CODEC_TO_ARC_DATA

OUT

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

C2

AIN8+

D3

AIN8-

B8

DMIC1_CLK

D8

DMIC1_DATA

E11

DMIC2_CLK

E10

DMIC2_DATA

D10

DMIC3_CLK

D9

DMIC3_DATA

E9

DMIC4_CLK

F8

DMIC4_DATA

B11

PDMOUT1_CLK

B10

PDMOUT1_DATA

A10

PDMOUT2_CLK

B9

PDMOUT2_DATA

F10

PDMOUT3_CLK

F9

PDMOUT3_DATA

DP

DN

MBUS_REF

E1
F1

G1

90_MIKEYBUS_CODEC_DATA_P
90_MIKEYBUS_CODEC_DATA_N

MIKEYBUS_REFERENCE

1

R4710

100

5%
1/32W
MF
01005

2

ROOM=CODEC

5%

16V

R4700

20.0

5%

1/32W

MF

01005

ROOM=CODEC

21

NP0-C0G

01005

ROOM=CODEC

90_MIKEYBUS_DATA_P

48

BI

R4701

49

IN

20.0

5%

1/32W

MF

01005

ROOM=CODEC

21

90_MIKEYBUS_DATA_N

48

BI

B

C4701

100PF

21

5%

16V

NP0-C0G

01005

ROOM=CODEC

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/13/2016

A

AUDIO: CODEC (1/2)

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

47 OF 80

SHEET

37 OF 51

1

SIZE

D

678

CALLAN AUDIO CODEC (POWER & I/O)

3 245

1

D

C

B

49

33

36

49

48 47 46 38 22 20 17 14 12 10

LOWERMIC1_TO_CODEC_BIAS_FILT_RET

IN

REARMIC2_TO_CODEC_BIAS_FILT_RET

IN

FRONTMIC3_TO_CODEC_BIAS_FILT_RET

IN

LOWERMIC4_TO_CODEC_BIAS_FILT_RET

IN

50 41 19

50 34 27 21 19

50 49

PP1V8_AUDIO_VA_S2

1

2

PP_VDD_BOOST

PP1V8_S2

1

2

C4803

4.7UF

21

20%

6.3V

X5R-CERM1

402

ROOM=CODEC

C4804

4.7UF

21

20%

6.3V

X5R-CERM1

402

ROOM=CODEC

C4801

4.7UF

21

20%

6.3V

X5R-CERM1

402

ROOM=CODEC

C4802

4.7UF

21

20%

6.3V

X5R-CERM1

402

ROOM=CODEC

PP_CODEC_TO_LOWERMIC1_BIAS

49

LOWERMIC1_BIAS_FILT_IN

PP_CODEC_TO_REARMIC2_BIAS

33

REARMIC2_BIAS_FILT_IN

PP_CODEC_TO_FRONTMIC3_BIAS

36

FRONTMIC3_BIAS_FILT_IN

PP_CODEC_TO_LOWERMIC4_BIAS

49

LOWERMIC4_BIAS_FILT_IN

OMIT_TABLE

C4809

2.2UF

20%

6.3V
X5R-CERM
0201

ROOM=CODEC

CODEC_AGND

OMIT_TABLE

C4811

10UF

20%
10V
X5R-CERM
0402-0.1MM

ROOM=CODEC

1

C4812

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

1

C4813

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

38

1

C4814

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

1

C4815

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

OMIT_TABLE

1

C4805

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CODEC

PP1V2_CODEC_S2

1

C4817

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=CODEC

1

C4823

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=CODEC ROOM=CODEC

1

C4824

1.0UF

20%

6.3V

2

X5R
0201-1

1

C4821

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=CODEC

NC
NC

K11

MIC1_BIAS

K10

MIC1_BIAS_FILT

J11

MIC2_BIAS

J10

MIC2_BIAS_FILT

K9

MIC3_BIAS

J9

MIC3_BIAS_FILT

H9

MIC4_BIAS

H8

MIC4_BIAS_FILT

H11

MIC5_BIAS

H10

MIC5_BIAS_FILT

A2A9C1

VD

VL_SW

G11

B1

VL

VD_FILT

VD_FILT

CRITICAL

ROOM=CODEC

U4700

CS42L75

WLCSP

SYM 2 OF 3

L9

VP

J1

VA

J2

VA

F2

K2

VA

LP_FILT+

LP_FILT-

VP_MBUS

49 41 12

D1
D2

FILT+

FILT-

K1

L2

50 41

CODEC_TO_SPKRAMP_BOT_ARC_MCLK

OUT

I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT

IN

CODEC_LP_FILTP
CODEC_LP_FILTN

CODEC_FILTP

1

C4820

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

OMIT_TABLE

1

C4808

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=CODEC

R4830

33.2

1%

1/32W

MF

01005

ROOM=CODEC

R4831

49.9

1%

1/32W

MF

01005

ROOM=CODEC

21

21

12

20

10

10

10

10

10

10

12

50 49 41 12

50 49 41 12

50 41 12

12

12

12

12

10

10

10

10

12

12

12

48 47 46 38 22 20 17 14 12 10

AOP_TO_CODEC_RESET_L

IN

CODEC_TO_PMU_WAKE

OUT

CODEC_TO_AP_INT_L

OUT

SPI_AP_TO_CODEC_CS_L

IN

SPI_AP_TO_CODEC_SCLK

IN

SPI_AP_TO_CODEC_MOSI

IN

SPI_CODEC_TO_AP_MISO

OUT

I2S_AP_TO_CODEC_MCLK1

IN

I2S_AOP_TO_CODEC_MCLK2

IN

50 49

CODEC_TO_SPKRAMP_BOT_ARC_MCLK_R

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK

OUT

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK

OUT

I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT_R

I2S_CODEC_ASP1_TO_AOP_AMPS_DIN

OUT

I2S_AOP_TO_CODEC_ASP2_BCLK

IN

I2S_AOP_TO_CODEC_ASP2_LRCLK

IN

I2S_AOP_TO_CODEC_ASP2_DOUT

IN

I2S_CODEC_ASP2_TO_AOP_DIN

OUT

I2S_AP_TO_CODEC_ASP3_BCLK

IN

I2S_AP_TO_CODEC_ASP3_LRCLK

IN

I2S_AP_TO_CODEC_ASP3_DOUT

IN

I2S_CODEC_ASP3_TO_AP_DIN

OUT

CODEC_TO_AOP_GPIO1

OUT

CODEC_TO_AOP_GPIO2

OUT

AOP_TO_CODEC_CLP_EN

IN

PP1V8_S2

R4800

100K

5%

1/32W

MF

01005

ROOM=CODEC

D

1

2

U4700

NC
NC

NC
NC

J4

RESET*

H3

WAKE*

D4

INT*

C7

CS*

A7

CCLK

C8

MOSI

B7

MISO

A4

MCLK1_IN

B4

MCLK2_IN

A5

MCLK_OUT

A6

ASP1_SCLK

C6

ASP1_LRCK/FSYNC

B5

ASP1_SDIN

B6

ASP1_SDOUT

C4

ASP2_SCLK

D5

ASP2_LRCK/FSYNC

D6

ASP2_SDIN

C5

ASP2_SDOUT

C11

ASP3_SCLK

C9

ASP3_LRCK/FSYNC

C10

ASP3_SDIN

D11

ASP3_SDOUT
DIGLDO_PULLDN

H5

DIGLDO_EN

A3

SW1_CLK

C3

SW1_SD

B3

SW2_CLK

B2

SW2_SD

E6

GPIO1

E5

GPIO2

F6

CLP_EN

CS42L75

WLCSP

SYM 3 OF 3

ROOM=CODEC

CRITICAL

JTAG_TMS

JTAG_TCK

JTAG_TDI

JTAG_TDO

GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA

TSTI
TSTI
TSTI

E7
D7
E8
F7

G10
J3
J5

F5H4
G5
G6
G7
H1
H2
H6
H7
J6
J7
J8
E4

NC
NC
NC
NC

C

B

A

1

C4822

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=CODEC

1

C4825

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=CODEC

NC
NC

G8

MIC6_BIAS

G9

MIC6_BIAS_FILT

GNDD

E2

A8

A1

SHORT-10L-0.1MM-SM

F11

A11

XW4802

2 1

ROOM=CODEC

K7

GNDP

L7

L1

L11

L10

CODEC_AGND

38

SYNC_MASTER=test_mlb

PAGE TITLE

AUDIO: CODEC (2/2)

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

48 OF 80

SHEET

38 OF 51

SIZE

D

SYNC_DATE=10/13/2016

A

8

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67

35 4

2

1

678

3 245

1

D

D

C

C

South Speaker Amplifier on MLB Bottom

B

B

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

SYNC_DATE=08/25/2015

PAGE TITLE

A

AUDIO: Speaker Amp Bottom

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

49 OF 80

SHEET

39 OF 51

1

SIZE

D

678

3 245

1

D

D

C

C

North Speaker Amplifier on MLB Bottom

B

B

A

8

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SYNC_DATE=08/25/2015

PAGE TITLE

A

AUDIO: Speaker Amp Top

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

50 OF 80

SHEET

40 OF 51

1

SIZE

D

Pull Downs

678

3 245

1

D

1

R5108

100K

5%
1/32W
MF
01005

2

ROOM=ARC_CTRL

AOP_TO_SPKRAMP_BOT_ARC_RESET_L

50 41 12

ARC DRIVER

D

APN: 338S00296

I2C ADDRESS: 1000 001x

0x82

C

B

45 43 42 34 31 27 23 21 19 18 50 41 38 19

PP_VDD_MAIN

50 46

20%

6.3V

1

2

C5131

18UF

20%

6.3V

CER-X5R

0402-0.1MM

C5130

18UF

CER-X5R

0402-0.1MM

ROOM=ARC_CTRL ROOM=ARC_CTRL

1

2

C5125

ROOM=ARC_CTRL

4UF

20%

6.3V

CERM-X5R

0201

1

2

A5

F5

1

C5127

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=ARC_CTRL

1

C5134

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=ARC_CTRL

PP1V8_AUDIO_VA_S2

CRITICAL

L5100

VP

VA

1.2UH-20%-3A-0.11OHM

A1
B1

C1
D1

F1
E1

E2
E3

D2
C2

F4
F3

1

C5126

220PF

5%
10V

2

C0G-CERM
01005

ROOM=ARC_CTRL

SOLENOID1_TO_ARC1_VSENSE_POS
SOLENOID1_TO_ARC1_VSENSE_NEG

ARC1_FILT

1

C5135

0.1UF

10%
16V

2

X5R-CERM
0201

ROOM=ARC_CTRL

ARC1_ISENSE_POS
ARC1_ISENSE_NEG

1

C5136

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=ARC_CTRL

50 41 38 19

21

MEFE2016T-SM

ROOM=ARC_CTRL

PP1V8_AUDIO_VA_S2

MAKE_BASE=TRUE

50 49 25 12 4

50 49 25 12 4

50 12

50 41 12

50 38

50 49 38 12

50 49 38 12

50 38 12

49 38 12

37 4

37 4

ARC1_LX

I2C1_AOP_SDA

BI

I2C1_AOP_SCL

IN

SPKRAMP_BOT_ARC_TO_AOP_INT_L

BI

AOP_TO_SPKRAMP_BOT_ARC_RESET_L

IN

PP1V8_AUDIO_VA_S2
CODEC_TO_SPKRAMP_BOT_ARC_MCLK

IN

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK

IN

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK

IN

I2S_CODEC_ASP1_TO_AOP_AMPS_DIN

IN

I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT

OUT

PDM_CODEC_TO_ARC_CLK

IN

PDM_CODEC_TO_ARC_DATA

IN

NC

A2

SW

B2

SW

D6

SDA

E6

SCL

A7

INT*

A6

RESET*

F6

ALIVE/SYNC

E5

AD0/PDM_CLK1

B7

MCLK

C7

SCLK

C6

LRCK/FSYNC

D7

SDIN

B6

SDOUT

F7

PDM_CLK0

E7

PDM_DATA0

D5

PDM_DATA1 AD1

A4

A3

GNDP GNDA

B4

B3

U5100

CS35L26C-A1

WLCSP

ROOM=ARC_CTRL

CRITICAL

D4

D3

C5

C4

C3

B5

E4

VBST_B
VBST_B

VBST_A
VBST_A

ISNS+

ISNS-

VSNS+

VSNS-

OUT+

OUT-

FILT+

F2

1

C5137

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=ARC_CTRL

C

PP_ARC1_VBOOST

1

C5124

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=ARC_CTRL

1

C5128

0.01UF

10%

6.3V

2

X5R
01005

ROOM=ARC_CTRL

49

IN

49

IN

1

C5138

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=ARC_CTRL

ROOM=ARC_CTRL

C5129

470PF

10%
10V
X5R

01005

1

C5139

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=ARC_CTRL

1

2

1

C5142

470PF

10%
10V

2

X5R
01005

ROOM=ARC_CTRL

ARC1_TO_SOLENOID1_OUT_POS
ARC1_TO_SOLENOID1_OUT_NEG

49

49

B

A

8

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SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

PAGE TITLE

A

ARC: Driver

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

51 OF 80

SHEET

41 OF 51

1

SIZE

D

678

3 245

1

Acorn PMU

D

D

C

B

19 17 14

45 43 41 34 31 27 23 21 19 18

50 46

PP1V1_S2

1

C5691

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=ACORN

PP_VDD_MAIN

1

C5690

4.7UF

20%

6.3V

2

CER
0402

ROOM=ACORN

1

C5692

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=ACORN

PP_CP1_OUT_ACORN

PP5V45_BOOST2_ACORN

PP_BOOST1_ACORN

1.5UH-20%-1.6A-0.18OHM

1

C5650

220PF

5%
16V

2

C0G
01005

ROOM=ACORN

1

C5652

220PF

5%
16V

2

C0G
01005

ROOM=ACORN

1

C5654

220PF

5%
16V

2

C0G
01005

ROOM=ACORN

L5600

2 1

PIWA2012FE-SM

ROOM=ACORN

1

C5651

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=ACORN

OMIT_TABLE

1

C5653

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=ACORN

1

C5655

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=ACORN

ACORN_LX

A1

A2
A4

F4

B4

G4

VJ

VK
VL

VG

VB

IN

SW

U5600

LM3373A1YKA

DSBGA

ROOM=ACORN

LOAD SWITCH

LDO1

CP1

CRITICAL

LDO2

CP2

CP3

AGND

F1

CP23_GND

CP1_GND

E1

D1

SIDO_GND

H3

VC

VA

C1+

C1-

C2+

C2-

VH

VN

C3+

C3-

VP

C4+

C4-

C5+

C5-

HWEN

EN1
EN2

SCL

SDA

AMUX

B1

C1
B2

B3

A3
C3

H2H4

D4
C2

C4

E4
D2

D3

E2
E3

H1
F2

F3
G2

G3
G1

ACORN_CP1_CAP1_POS
ACORN_CP1_CAP1_NEG

ACORN_CP1_CAP2_POS
ACORN_CP1_CAP2_NEG

ACORN_CP2_CAP_POS
ACORN_CP2_CAP_NEG

ACORN_CP3_CAP1_POS
ACORN_CP3_CAP1_NEG

ACORN_CP3_CAP2_POS
ACORN_CP3_CAP2_NEG

PP1V8_TOUCH_RACER_S2

RACER_TO_ACORN_ORB_SCAN

TOUCH_TO_ACORN_PP5V25_EN

I2C3_AP_SCL
I2C3_AP_SDA

ACORN_TO_PMU_ADC

1

C5660

1000PF

10%

6.3V

2

X5R-CERM
01005

ROOM=ACORN

42

42

42

42

42

42

42

42

42

42

IN
IN

IN

BI

OUT

Charge Pump 1 Caps

1

C5642

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=ACORN

PP1V1_RACER

PP3V5_RACER

PP5V25_TOUCH_VDDH

PN6V7_RACER

50

50

50

50

ACORN_CP1_CAP1_POS

42

ACORN_CP1_CAP1_NEG

42

ACORN_CP1_CAP2_POS

42

ACORN_CP1_CAP2_NEG

42

1

C5611

0.22UF

20%

6.3V

2

X5R
01005

ROOM=ACORN

1

C5612

0.22UF

20%

6.3V

2

X5R
01005

ROOM=ACORN

C

Charge Pump 2 Caps

1

C5621

PP10V0_RACER

OMIT_TABLE

1

C5640

4.7UF

20%
16V

2

X5R
0402

ROOM=ACORN

50 17

50

50

50 10

50 10

20

1

C5641

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=ACORN

1

C5645

4UF

20%

6.3V

2

CERM-X5R
0201

ROOM=ACORN

50

ACORN_CP2_CAP_POS

42

ACORN_CP2_CAP_NEG

42

Charge Pump 3 Caps

ACORN_CP3_CAP1_POS

42

ACORN_CP3_CAP1_NEG

42

ACORN_CP3_CAP2_POS

42

ACORN_CP3_CAP2_NEG

42

1UF

20%
16V

2

CER-X5R
0201

ROOM=ACORN

1

C5631

0.22UF

20%

6.3V

2

X5R
01005

ROOM=ACORN

1

C5632

0.22UF

20%

6.3V

2

X5R
01005

ROOM=ACORN

B

A

8

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SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/13/2016

A

CG: Power Supplies - Touch & Display

SIZE

D

Apple Inc.

DRAWING NUMBER

051-02221

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

56 OF 80

SHEET

42 OF 51

1

678

3 245

1

Display Flex Connector

D

Display Control Signals

FL5700

150OHM-25%-200MA-0.7DCR

11

20

AP_TO_DISPLAY_RESET_L

IN

1%

1/32W

MF

01005

1

2

PMU_TO_DISPLAY_PANICB

IN

R5700

61.9K

ROOM=B2B_DISPLAY

150OHM-25%-200MA-0.7DCR

8

DISPLAY_TO_AP_ALIVE

OUT

2 1

ROOM=B2B_DISPLAY

R5701

FL5702

2 1

01005

10

21

5%

1/32W

MF

01005

ROOM=B2B_DISPLAY

01005

ROOM=B2B_DISPLAY

1

C5700

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DISPLAY

1

C5701

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DISPLAY

1

C5702

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DISPLAY

AP_TO_DISPLAY_RESET_CONN_L

PMU_TO_DISPLAY_PANICB_CONN

DISPLAY_TO_AP_ALIVE_CONN

43

43

43

Rcpt: 516S00210 <-- This one on MLB
Plug: 516S00211

PP1V8_DISPLAY_CONN

43

DISPLAY_TO_PMU_AMUX_CONN

43

AP_TO_DISPLAY_RESET_CONN_L

43

MTEST

43

PMU_TO_DISPLAY_PANICB_CONN

43

NC_SPI_DISPLAY_FLASH_CS_L
NC_PP_VPP
NC_SPI_DISPLAY_FLASH_TO_AP_MISO

90_MIPI_AP_TO_DISPLAY_DATA2_CONN_P

43

90_MIPI_AP_TO_DISPLAY_DATA2_CONN_N

43

90_MIPI_AP_TO_DISPLAY_CLK_CONN_P

43

90_MIPI_AP_TO_DISPLAY_CLK_CONN_N

43

90_MIPI_AP_TO_DISPLAY_DATA3_CONN_P

43

90_MIPI_AP_TO_DISPLAY_DATA3_CONN_N

43

J5700

BM28P0.6-34DS/2-0.35V

NO_TEST=1
NO_TEST=1
NO_TEST=1

F-ST-SM

ROOM=B2B_DISPLAY

PWR

SIG

3635

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827
3029
3231
3433

NO_TEST=1

NO_TEST=1

NO_TEST=1

PP_VDD_MAIN_HILO_CONNPP_VDD_MAIN_HILO_CONN

MTEST

PP3V0_DISPLAY_CONN

43 43

43

43

NC_SPI_AP_TO_DISPLAY_FLASH_SCLK

PP1V0_DISPLAY_DVDD_CONN

43

NC_DISPLAY_PIFA

ISP_TO_DISPLAY_FLASH_INT_CONN

43

NC_SPI_AP_TO_DISPLAY_FLASH_MOSI

DISPLAY_TO_AP_ALIVE_CONN

90_MIPI_AP_TO_DISPLAY_DATA1_CONN_P
90_MIPI_AP_TO_DISPLAY_DATA1_CONN_N

90_MIPI_AP_TO_DISPLAY_DATA0_CONN_P
90_MIPI_AP_TO_DISPLAY_DATA0_CONN_N

43

43

43

43

43

D

C

20

FL5703

150OHM-25%-200MA-0.7DCR

DISPLAY_TO_PMU_AMUX

IN

2 1

01005

ROOM=B2B_DISPLAY

1

C5703

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DISPLAY

FL5704

150OHM-25%-200MA-0.7DCR

8

ISP_TO_DISPLAY_FLASH_INT

IN

2 1

01005

ROOM=B2B_DISPLAY

1

C5704

220PF

5%
10V

2

C0G-CERM
01005

ISP_TO_DISPLAY_FLASH_INT_CONN

ROOM=B2B_DISPLAY

DISPLAY_TO_PMU_AMUX_CONN

43

43

Display MIPI

8

8

8

8

90_MIPI_AP_TO_DISPLAY_DATA0_P

BI

90_MIPI_AP_TO_DISPLAY_DATA0_N

BI

90_MIPI_AP_TO_DISPLAY_DATA1_P

IN

90_MIPI_AP_TO_DISPLAY_DATA1_N

IN

L5700

65OHM-0.7-2GHZ-3.4OHM

GND_VOID

TAM0605

4

3 2

SYM_VER-2

ROOM=B2B_DISPLAY

L5710

65OHM-0.7-2GHZ-3.4OHM

GND_VOID

TAM0605

4

3 2

SYM_VER-2

ROOM=B2B_DISPLAY

CRITICAL

1

CRITICAL

1

90_MIPI_AP_TO_DISPLAY_DATA0_CONN_P

90_MIPI_AP_TO_DISPLAY_DATA0_CONN_N

90_MIPI_AP_TO_DISPLAY_DATA1_CONN_P

90_MIPI_AP_TO_DISPLAY_DATA1_CONN_N

43

43

43

43

Display Power

29 28 27 17 16 14 10 8 7 6 5

35 34 32 30

PP1V8_IO

PWR

3837

C

FL5780

33-OHM-25%-1500MA

2 1

0201

ROOM=B2B_DISPLAY

1

C5781

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DISPLAY

PP1V8_DISPLAY_CONN

43

B

L5720

65OHM-0.7-2GHZ-3.4OHM

8

8

90_MIPI_AP_TO_DISPLAY_DATA2_P

IN

90_MIPI_AP_TO_DISPLAY_DATA2_N

IN

GND_VOID

TAM0605

4

3 2

SYM_VER-2

ROOM=B2B_DISPLAY

L5730

65OHM-0.7-2GHZ-3.4OHM

8

IN

4

TAM0605

SYM_VER-2

CRITICAL

1

CRITICAL

1

90_MIPI_AP_TO_DISPLAY_DATA2_CONN_N

90_MIPI_AP_TO_DISPLAY_DATA3_CONN_P90_MIPI_AP_TO_DISPLAY_DATA3_P

43

43

33-OHM-25%-1500MA

PP1V0_DISPLAY_DVDD90_MIPI_AP_TO_DISPLAY_DATA2_CONN_P

19 43

FL5782

2 1

0201

ROOM=B2B_DISPLAY

FL5783

1

C5782

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DISPLAY

PP1V0_DISPLAY_DVDD_CONN

43

FERR-70OHM-25%-0.300A

8

90_MIPI_AP_TO_DISPLAY_DATA3_N

IN

3 2

GND_VOID

ROOM=B2B_DISPLAY

90_MIPI_AP_TO_DISPLAY_DATA3_CONN_N

43

CRITICAL

PP3V0_DISPLAY

19

01005

ROOM=B2B_DISPLAY

L5740

65OHM-0.7-2GHZ-3.4OHM

8

8

90_MIPI_AP_TO_DISPLAY_CLK_P

IN

90_MIPI_AP_TO_DISPLAY_CLK_N

IN

GND_VOID

TAM0605

4

3 2

SYM_VER-2

ROOM=B2B_DISPLAY

1

90_MIPI_AP_TO_DISPLAY_CLK_CONN_P

90_MIPI_AP_TO_DISPLAY_CLK_CONN_N

43

43

45 42 41 34 31 27 23 21 19 18

50 46

PP_VDD_MAIN

XW5784

SHORT-0201

21

ROOM=B2B_DISPLAY

XW5785

SHORT-0201

21

ROOM=B2B_DISPLAY

21

1

C5783

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DISPLAY

1

C5784

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DISPLAY

1

2

PP3V0_DISPLAY_CONN

PP_VDD_MAIN_HILO_CONN

1

C5785

220PF

5%
10V
C0G-CERM
01005

ROOM=B2B_DISPLAY

C5786

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DISPLAY

43

B

43

A

8

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SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

PAGE TITLE

A

CG: B2B Display

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

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evt-1

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57 OF 80

SHEET

43 OF 51

1

SIZE

D

678

3 245

1

D

D

C

C

Orb + Touch Connector on MLB Bottom

B

B

A

8

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SYNC_DATE=08/25/2015

PAGE TITLE

A

CG: B2B Orb & Touch

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

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evt-1

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58 OF 80

SHEET

44 OF 51

1

SIZE

D

D

678

VDD_MAIN OV CUT-OFF CIRCUIT

3 245

1

D

C

43 42 41 34 31 27 23 21 19 18 48 47 23

PP_VDD_MAIN

50 46

1

R5901

1.3M

1%
1/20W
MF
0201

2

ROOM=OV_CUTOFF

ROOM=OV_CUTOFF

OMIT

SHORT-20L-0.05MM-SM

XW5900

OV_VMON_INA

NOSTUFF

1

C5902

15PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=OV_CUTOFF

1

R5902

100K

1%
1/32W
MF
01005

2

ROOM=OV_CUTOFF

2 1

ROOM=SOC

PP_VDD_MAIN_VMON

PP_VBUS1_E75_RVP

20%
25V
X5R

0201

1

2

5

INA

3

INB

ROOM=OV_CUTOFF

C5900

0.47UF

2

CRITICAL

VDD

U5900

TPS3700RUG

X2QFN

OUTA

OUTB

GND

6

DZ5900

0201

K A

RB521ES-30

7

1

NC0
NC1

4
8

PP3V0_S2

NC

50 48 47 36 19

To Hydra and E75

R5903

PP_HYDRA_ACC1_R PP_HYDRA_ACC1

NC
NC

0.00

1/32W
01005

ROOM=OV_CUTOFF

21

0%
MF

49 48

C

B

B

A

8

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A

SYNC_DATE=01/10/2017SYNC_MASTER=sync

PAGE TITLE

I/O: Overvoltage Cut-Off Circuit

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

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SHEET

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1

SIZE

D

678

3 245

1

D

43 42 41 34 31 27 23 21 19 18

49 48 47 38 22 20 17 14 12 10

50 45

50

PP_VDD_MAIN

PP1V8_S2

B2

U6100

FPF1204UCX

WLCSP-COMBO

VIN

ROOM=ACC_BUCK

CRITICAL

ON

GND

B1

VOUT

A1A2

C6100

CER-X5R

ROOM=ACC_BUCK

4UF

20%

6.3V
0201

D

ACCESSORY BUCK

I2C ADDRESS: 0x52

PP_VDD_MAIN_ACC_BUCK_VIN

1

2

A2

C

49 20 10

49 20 10

I2C0_AP_SDA

BI

I2C0_AP_SCL

IN

A1
B1

SDA
SCL

ROOM=ACC_BUCK

VIN

U6110

FAN53741

CSP

CRITICAL

GND

C2

SW

FB

B2

C1

CRITICAL

0.47UH-20%-2.52A-0.08OHM

ACC_BUCK_SW
ACC_BUCK_FB

L6110

PIGA1608-SM

ROOM=ACC_BUCK

To Hydra

21

1

C6111

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=ACC_BUCK

1

C6112

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=ACC_BUCK ROOM=ACC_BUCK

1

C6117

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

ROOM=ACC_BUCK

2

OMIT

XW6110

SHORT-20L-0.05MM-SM

ROOM=ACC_BUCK

1

1

C6110

100PF 18UF

5%
16V

2

NP0-C0G
01005

ROOM=ACC_BUCK

PP_ACC_VAR

1

R6116

10K

5%
1/32W
MF
01005

2

48 19

ACC_BUCK_TO_PMU_AMUX

OUT

C

20

B

B

A

8

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SYNC_DATE=10/17/2016SYNC_MASTER=test_mlb

PAGE TITLE

A

I/O: Accessory Buck

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

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evt-1

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61 OF 80

SHEET

46 OF 51

1

SIZE

D

678

3 245

1

D

D

USB-PD

C

48 45 23

PP_VBUS1_E75_RVP

1

R6210

499K

1%
1/20W
MF
201

2

ROOM=USB_PD

1

R6211

50K

1%
1/32W
MF
01005

2

ROOM=USB_PD

1

C6210

22NF

20%

6.3V

2

X5R-CERM
01005

ROOM=USB_PD

50 23 22 21 10

I2C0_SMC_SDA

BI

49 48 46 38 22 20 17 14 12 10

50 48 45 36 19

R6200

43.2

1/32W
01005

21

1%
MF

50

50 23 22 21 10

PP1V8_S2
PP3V0_S2

1

2

10 4

OUT

IN

10 4

BI

10 4

IN

C6290

1.0UF

20%

6.3V
X5R
0201-1

ROOM=USB_PD

1

C6291

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=USB_PD

CCG2_TO_SMC_INT_L

PP5V0_USB_RVP_R

I2C0_SMC_SCL
I2C0_SMC_SDA_CCG2_R

AP_BI_CCG2_SWDIO
AP_TO_CCG2_SWCLK

PP1V8_VCCD_CCG2

1

C6292

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=USB_PD

NC

NC
NC

C3
D3
C2
D2
B2

A3
A2

E2
D1

A1

VDDD

VCCD

GPIO_C3
GPIO_D3
GPIO_C2
GPIO_D2
GPIO_B2

I2C_0_SCL
I2C_0_SDA

SWD_IO
SWD_CLK

CRITICAL

ROOM=USB_PD

CG8740AAT

NCNC

E1E3C4

VDDIO

U6200

CSP

E4

VCONN2

VCONN1

CC1
CC2

RD1

XRES

B4
A4

B3

B1

NC
NC

PMU_TO_CCG2_RESET_L

C

CCG2_TO_HYDRA_CC

1

C6200

220PF

5%
10V

2

C0G-CERM
01005

ROOM=USB_PD

20

IN

OUT

48

B

VSS

D4

VSS

C1

B

A

8

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SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

PAGE TITLE

A

I/O: USB PD

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

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SHEET

47 OF 51

1

SIZE

D

678

3 245

1

D

D

Hydra

I2C Address: 0011010X

C

B

20

50 47 45 36 19

HYDRA_TO_PMU_USB_BRICK_ID

OUT

6

6

90_USB_AP_DATA_P

BI

90_USB_AP_DATA_N

BI

PP3V0_S2

1

C6390

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=HYDRA

1

C6300

0.01UF

10%

6.3V

2

X5R
01005

ROOM=HYDRA

GND_VOID

GND_VOID

1

C6391

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=HYDRA

R6300

6.34K

1/32W
01005

ROOM=HYDRA

L6300

15NH-250MA

0201

ROOM=HYDRA

L6301

15NH-250MA

0201

ROOM=HYDRA

1%
MF

21

21

21

49 47 46 38 22 20 17 14 12 10

37

37

50

50

11

11

11

11

MAKE_BASE=TRUE

6

6

50 20 11

12

47

PP1V8_S2

50

90_MIKEYBUS_DATA_P

BI

90_MIKEYBUS_DATA_N

BI

90_USB_BB_DATA_P

BI

90_USB_BB_DATA_N

BI

HYDRA_TO_PMU_USB_BRICK_ID_R
90_USB_AP_DATA_L_P

90_USB_AP_DATA_L_N
UART_AP_TO_ACCESSORY_TXD

IN

UART_ACCESSORY_TO_AP_RXD

OUT

UART_AP_DEBUG_TXD

IN

UART_AP_DEBUG_RXD

OUT

GND

SWD_DOCK_TO_AP_SWCLK

OUT

SWD_DOCK_BI_AP_SWDIO

BI

PMU_HYDRA_TO_AP_FORCE_DFU

OUT

HYDRA_TO_NUB_DOCK_CONNECT

OUT

CCG2_TO_HYDRA_CC

IN

C6395

1

0.01UF

10%

2

6.3V
X5R
01005

ROOM=HYDRA

NC

NC

H4

VDD1V8

C2

DIG_DP

D2

DIG_DN

D3

USB1_DP

D4

USB1_DN

F3

BRICK_ID

B3

USB0_DP

B4

USB0_DN

D1

UART0_TX

C1

UART0_RX

F2

UART1_TX

E2

UART1_RX

B1

UART2_TX

A1

UART2_RX

E1

JTAG_CLK

F1

JTAG_DIO

H2

FORCE_DFU

G2

EXT_SW_EN

G1

DOCK_CONNECT

B2

CC0

A2

CC1

H5

VDD3V0

A6

ACC_PWR

U6300

CBTL1612A1

WLCSP

ROOM=HYDRA

CRITICAL

E6

D6

C6

B6

CON_DET_L

POW_GATE_EN*

SWITCH_EN

HOST_RESET

BYPASS

P_IN
ACC1
ACC1
ACC1
ACC1
ACC1
ACC2
ACC2
ACC2
ACC2
ACC2

DP1

DN1

DP2

DN2

SDA

SCL

INT

G6
A5
B5
C5
D5
E5
A7
B7
C7
D7
E7

C3

C4

A3

A4

G3

H3

E4

F6

G5

G4

F7

F5

PP_ACC_VAR

46 19

PP_HYDRA_ACC1

PP_HYDRA_ACC2

90_HYDRA_DP1_CONN_P
90_HYDRA_DP1_CONN_N

90_HYDRA_DP2_CONN_P
90_HYDRA_DP2_CONN_N

HYDRA_CON_DETECT_L

HYDRA_TO_TIGRIS_VBUS1_VALID_L

PMU_TO_AP_HYDRA_ACTIVE_READY

HYDRA_TO_PMU_HOST_RESET

I2C1_SMC_SDA
I2C1_SMC_SCL

HYDRA_TO_NUB_INT

HYDRA_BYPASS

49

BI
BI

BI
BI

IN

OUT

IN

OUT

BI

IN

OUT

C

From Tigris2

PP_VBUS1_E75_RVP

49 45

1

C6312

0.47UF

20%
25V

2

CER-X5R
0201

ROOM=HYDRA

49

20

10

12

49

49

49

49

10

1

C6311

0.47UF

20%
25V

2

CER-X5R
0201

ROOM=HYDRA

23 4

20 6 4

47 45 23

B

A

E3

DVSS

G7

H1

H6

H7

DVSS1

F4

1

C6330

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=HYDRA

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=10/13/2016

A

8

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I/O: Hydra

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

63 OF 80

SHEET

48 OF 51

1

SIZE

D

678

3 245

1

D

C

B

A

Compass (Dock Flex Location)

150OHM-25%-200MA-0.7DCR

26 25 17

IN

BI

PP1V8_IMU_S2

I2C1_AOP_SCL

I2C1_AOP_SDA

2 1

ROOM=B2B_DOCK

ROOM=B2B_DOCK

NOSTUFF

FL6433

150OHM-25%-200MA-0.7DCR

OUT

2 1

ROOM=B2B_DOCK

LOWER MIC1 + LOWER MIC4

150OHM-25%-200MA-0.7DCR

37

37

37

LOWERMIC1_TO_CODEC_AIN1_P

OUT

LOWERMIC1_TO_CODEC_AIN1_N

OUT

PP_CODEC_TO_LOWERMIC1_BIAS

38

OUT

2 1

ROOM=B2B_DOCK

150OHM-25%-200MA-0.7DCR

2 1

150OHM-25%-200MA-0.7DCR

2 1

150OHM-25%-200MA-0.7DCR

2 1

NOSTUFF

FL6430

01005

ROOM=B2B_DOCK

NOSTUFF

R6431

0.00

2 1

0%

1/32W

MF

01005

NOSTUFF

R6432

0.00

2 1

0%

1/32W

MF

01005

01005

FL6450

01005

FL6452

01005

ROOM=B2B_DOCK

FL6454

01005

ROOM=B2B_DOCK

FL6460

01005

ROOM=B2B_DOCK

NOSTUFF

1

C6430

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DOCK

NOSTUFF

1

C6431

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

NOSTUFF

1

C6432

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

NOSTUFF

1

C6433

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DOCK

1

C6450

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

1

C6452

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

1

C6454

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DOCK

1

C6460

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

ARC

48 47 46 38 22 20 17 14 12 10

46 20 10

46 20 10

50 41 38 12

50 41 38 12

41 38 12

PP1V8_IMU_COMPASS_DOCK_CONN

I2C1_AOP_TO_COMPASS_SCL_DOCK_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C1_AOP_BI_COMPASS_SDA_DOCK_CONN

CKPLUS_WAIVE=I2C_PULLUP

COMPASS_TO_AOP_INT_DOCK_CONNCOMPASS_TO_AOP_INT

LOWERMIC1_TO_CODEC_AIN1_CONN_P

LOWERMIC1_TO_CODEC_AIN1_CONN_N

PP_CODEC_TO_LOWERMIC1_BIAS_CONN

LOWERMIC4_TO_CODEC_AIN4_CONN_PLOWERMIC4_TO_CODEC_AIN4_P

PP1V8_S2

50

I2C0_AP_SCL

IN

I2C0_AP_SDA

BI

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK

IN

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK

IN

I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT

BI

49

49

49

49

49

49

49

49

48

33 10

33 10

Hydra

HYDRA_CON_DETECT_L

OUT

PP_HYDRA_ACC1

48 45

PP_HYDRA_ACC2

48

37

LOWERMIC4_TO_CODEC_AIN4_N

OUT

PP_CODEC_TO_LOWERMIC4_BIAS

I2C1_AP_SCL

IN

I2C1_AP_SDA

BI

150OHM-25%-200MA-0.7DCR

ARC1_TO_SOLENOID1_OUT_POS

49 41

ARC1_TO_SOLENOID1_OUT_NEG

ROOM=B2B_DOCK

FL6400

2 1

01005

ROOM=B2B_DOCK

R6416

0.00

2 1

0%

1/32W

MF

01005

ROOM=B2B_DOCK

R6418

0.00

2 1

0%

1/32W

MF

01005

ROOM=B2B_DOCK

R6419

49.9

2 1

1%

1/32W

MF

01005

ROOM=B2B_DOCK

R6420

49.9

2 1

1%

1/32W

MF

01005

ROOM=B2B_DOCK

R6421

49.9

2 1

1%

1/32W

MF

01005

ROOM=B2B_DOCK

C6472

820PF

01005

1

10%
10V

2

X5R

22-OHM-25%-1800MA

150OHM-25%-200MA-0.7DCR

2 1

150OHM-25%-200MA-0.7DCR

2 1

1

C6400

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DOCK

1

C6416

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

1

C6418

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_CONN

1

C6419

68PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_CONN

1

C6420

68PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT_CONN

1

C6421

68PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

C6471

220PF

10V

C0G-CERM

ROOM=B2B_DOCK

01005

R6410

100

2 1

5%

1/32W

MF

01005

ROOM=B2B_DOCK

FL6411

10-OHM-1.1A

01005

ROOM=B2B_DOCK

FL6413

0201

ROOM=B2B_DOCK

FL6462

01005

ROOM=B2B_DOCK

FL6464

01005

ROOM=B2B_DOCK

R6465

0.00

2 1

0%

1/32W

MF

01005

ROOM=B2B_DOCK

R6466

0.00

2 1

0%

1/32W

MF

01005

ROOM=B2B_DOCK

5%

1

2

1

2

21

1

2

21

1

C6462

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

1

C6464

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DOCK

1

C6465

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

1

C6466

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_DOCK

PP1V8_SAKONNET_CONN

I2C0_AP_TO_SAKONNET_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C0_AP_BI_SAKONNET_SDA_CONN

CKPLUS_WAIVE=I2C_PULLUP

C6470

220PF

C0G-CERM

ROOM=B2B_DOCK

01005

5%

10V

1

2

C6473

820PF

ROOM=B2B_DOCK

01005

10%
10V
X5R

HYDRA_CON_DETECT_CONN_L

C6410

27PF

5%
16V
NP0-C0G
01005

ROOM=B2B_DOCK

PP_HYDRA_ACC1_CONN

C6411

220PF

5%
10V
C0G-CERM
01005

ROOM=B2B_DOCK

PP_HYDRA_ACC2_CONN

1

C6413

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DOCK

LOWERMIC4_TO_CODEC_AIN4_CONN_N

PP_CODEC_TO_LOWERMIC4_BIAS_CONN

I2C1_AP_TO_MIC1_SCL_CONN

I2C1_AP_BI_MIC1_SDA_CONN

49

49

49

49

49

PP_VBUS1_E75

23

49

ROOM=B2B_DOCK

49 41

1

2

49

49

49

CKPLUS_WAIVE=I2C_PULLUP

CKPLUS_WAIVE=I2C_PULLUP

C6490

10%
25V
X5R

0201

49

49 38

49

49

DOCK FLEX CONNECTOR

Rcpt: 516S00038
Plug: 516S00037

J6400

BM28P0.6-44DS-0.35V

SPKRAMP_BOT_TO_COIL_OUT_NEG

50 49

SPKRAMP_BOT_TO_COIL_OUT_POS

50 49

COIL_TO_SPKRAMP_BOT_VSENSE_POS_CONN

49

COIL_TO_SPKRAMP_BOT_VSENSE_NEG_CONN

PP_CODEC_TO_LOWERMIC4_BIAS_CONN

49

LOWERMIC4_TO_CODEC_BIAS_FILT_RET

38

LOWERMIC4_TO_CODEC_AIN4_CONN_N

49

LOWERMIC4_TO_CODEC_AIN4_CONN_P

49

PP1V8_IMU_COMPASS_DOCK_CONN

49

I2C1_AOP_BI_COMPASS_SDA_DOCK_CONN

49

I2C1_AOP_TO_COMPASS_SCL_DOCK_CONN

49

COMPASS_TO_AOP_INT_DOCK_CONN

49

LOWERMIC1_TO_CODEC_AIN1_CONN_P

49

LOWERMIC1_TO_CODEC_AIN1_CONN_N

49

LOWERMIC1_TO_CODEC_BIAS_FILT_RET

38

PP_CODEC_TO_LOWERMIC1_BIAS_CONN

49

I2C1_AP_BI_MIC1_SDA_CONN

49

I2C1_AP_TO_MIC1_SCL_CONN

49

SOLENOID1_TO_ARC1_VSENSE_NEG

41

SOLENOID1_TO_ARC1_VSENSE_POS

41

10%
25V
X5R

0201

1

C6492

0.1UF

2

ROOM=B2B_DOCK

1

C6491

0.1UF0.1UF

2

ROOM=B2B_DOCK

10%
25V
X5R

0201

1

C6493

2

ROOM=B2B_DOCK

220PF

01005

5%
25V
COG

1

C6494

220PF

2

01005

ROOM=B2B_DOCK

SOUTH SPEAKER

50

COIL_TO_SPKRAMP_BOT_VSENSE_POS

OUT

1

5%

25V

2

COG

FL6480

150OHM-25%-200MA-0.7DCR

2 1

F-ST-SM

45

43

47

ROOM=B2B_DOCK

01005

ROOM=B2B_DOCK

FL6482

150OHM-25%-200MA-0.7DCR

50

50 49

50 49

COIL_TO_SPKRAMP_BOT_VSENSE_NEG

OUT

SPKRAMP_BOT_TO_COIL_OUT_POS

IN

SPKRAMP_BOT_TO_COIL_OUT_NEG

IN

ROOM=B2B_DOCK

ROOM=B2B_DOCK

2 1

01005

ROOM=B2B_DOCK

10%
10V
X5R

10%
10V
X5R

1

2

1

2

SYNC_MASTER=test_mlb

PAGE TITLE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

C6484

820PF

01005

C6486

820PF

01005

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

<-- This one on MLB

46

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827
3029
3231
3433
3635
3837
4039
4241
44

48

C6495

0.1UF

ROOM=B2B_DOCK

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_CONN

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_CONN
I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT_CONN

1

10%
25V

2

X5R

0201

COIL_TO_SPKRAMP_BOT_VSENSE_POS_CONN

NOSTUFF

1

C6480

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DOCK

COIL_TO_SPKRAMP_BOT_VSENSE_NEG_CONN

NOSTUFF

1

C6482

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DOCK

1

C6483

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DOCK

1

C6485

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_DOCK

I/O: B2B Dock

Apple Inc.

I2C0_AP_BI_SAKONNET_SDA_CONN
I2C0_AP_TO_SAKONNET_SCL_CONN

10%
25V
X5R

0201

1

2

C6496

0.1UF

ROOM=B2B_DOCK

90_HYDRA_DP1_CONN_P
90_HYDRA_DP1_CONN_N

90_HYDRA_DP2_CONN_N
90_HYDRA_DP2_CONN_P

PP_HYDRA_ACC1_CONN
MIKEYBUS_REFERENCE

HYDRA_CON_DETECT_CONN_L

PP1V8_SAKONNET_CONN

PP_HYDRA_ACC2_CONN

48

48 49

48

48

49

37

49

49

49

49

49

49

49

49

ARC1_TO_SOLENOID1_OUT_NEG
ARC1_TO_SOLENOID1_OUT_POS

10%
25V
X5R

0201

1

2

49

49

DRAWING NUMBER

C6497

0.1UF

ROOM=B2B_DOCK

051-02221

REVISION

9.0.0

BRANCH

evt-1

PAGE

64 OF 80

SHEET

49 OF 51

49 41

49 41

SYNC_DATE=10/13/2016

SIZE

D

D

C

B

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

678

3 245

1

D

C

B

A

11

11

11

11

11

20

11

20

10

47 23 22 21 10

47 23 22 21 10

36 31

37

37

10

11

11

10

10

41 38 19

11

11

12

10 5

49 41 38 12

41 38 12

49 41 38 12

20

10

10

10

10

11

11

11

41 12

41 12

12

49 41 25 12 4

49 41 25 12 4

43 42 41 34 31 27 23 21 19 18

48 47 46 38 22 20 17 14 12 10

50 46 45

11

11

11

11

38 34 27 21 19

11

11

11

11

50 49

UART_AP_TO_GNSS_TXD
UART_AP_TO_GNSS_RTS_L
UART_GNSS_TO_AP_CTS_L
UART_GNSS_TO_AP_RXD
AP_TO_GNSS_WAKE
PMU_TO_GNSS_EN
AP_TO_BB_TIME_MARK
90_PCIE_AP_TO_BB_REFCLK_N

7

90_PCIE_AP_TO_BB_REFCLK_P

7

90_PCIE_BB_TO_AP_RXD_P

7

90_PCIE_BB_TO_AP_RXD_N

7

90_PCIE_AP_TO_BB_TXD_P

7

90_PCIE_AP_TO_BB_TXD_N

7

90_PCIE_WLAN_TO_AP_RXD_P

7

90_PCIE_WLAN_TO_AP_RXD_N

7

90_PCIE_AP_TO_WLAN_REFCLK_N

7

90_PCIE_AP_TO_WLAN_REFCLK_P

7

90_PCIE_AP_TO_WLAN_TXD_N

7

90_PCIE_AP_TO_WLAN_TXD_P

7

PMU_TO_IKTARA_EN_EXT_1P8V
IKTARA_TO_SMC_INT
I2C0_SMC_SCL
I2C0_SMC_SDA
BB_TO_STROBE_DRIVER_GSM_BURST_IND

PDM_CODEC_TO_SPKRAMP_TOP_CLK
PDM_CODEC_TO_SPKRAMP_TOP_DATA
PCIE_AP_TO_BB_RESET_L

7

I2S_AP_TO_SPKRAMP_TOP_MCLK
AP_TO_SPKRAMP_TOP_RESET_L
SPKRAMP_TOP_TO_AP_INT_L
I2C2_AP_SDA
I2C2_AP_SCL
PP1V8_AUDIO_VA_S2

PP_GPU_LVCC

4

PP_CPU_PCORE_LVCC

4

AP_TO_BB_IPC_GPIO1
AP_TO_BB_RESET_L

HALL3_TO_AOP_IRQ_L

BOARD_ID3
PCIE_WLAN_BI_AP_CLKREQ_L

7

PCIE_AP_TO_WLAN_RESET_L

7

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK
PMU_TO_IKTARA_RESET_L
I2S_BB_TO_AP_DIN
I2S_BB_TO_AP_LRCLK
I2S_BB_TO_AP_BCLK
I2S_AP_TO_BB_DOUT
BB_TO_AP_RESET_DETECT_L
AP_TO_BBPMU_RADIO_ON_L
AP_TO_WLAN_DEVICE_WAKE
SPKRAMP_BOT_ARC_TO_AOP_INT_L
AOP_TO_SPKRAMP_BOT_ARC_RESET_L

SWD_AOP_BI_BB_SWDIO
I2C1_AOP_SDA
I2C1_AOP_SCL
PP_VDD_MAIN

UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_CTS_L
UART_AP_TO_BT_TXD
UART_BT_TO_AP_RXD
PP_VDD_BOOST
UART_AP_TO_WLAN_TXD
UART_AP_TO_WLAN_RTS_L
UART_WLAN_TO_AP_RXD
UART_WLAN_TO_AP_CTS_L
PP1V8_S2

NC

NC

NC

S1
S2
S3
S4
S5
S6
S7
S8

S9
S10
S11
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
S29
S30
S31
S32
S33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43
S44
S45
S46
S47
S48
S49
S50
S51
S52
S53
S54
S55
S56
S57
S58
S59
S60
S61
S62
S63
S64
S65
S66
S67
S68
S69
S70
S71
S72
S73
S74
S75
S76
S77
S78
S79
S80
S81
S82
S83
S84
S85
S86

IOS1
IOS2
IOS3
IOS4
IOS5
IOS6
IOS7
IOS8
IOS9
IOS10
IOS11
IOS12
IOS13
IOS14
IOS15
IOS16
IOS17
IOS18
IOS19
IOS20
IOS21
IOS22
IOS23
IOS24
IOS25
IOS26
IOS27
IOS28
IOS29
IOS30
IOS31
IOS32
IOS33
IOS34
IOS35
IOS36
IOS37
IOS38
IOS39
IOS40
IOS41
IOS42
IOS43
IOS44
IOS45
IOS46
IOS47
IOS48
IOS49
IOS50
IOS51
IOS52
IOS53
IOS54
IOS55
IOS56
IOS57
IOS58
IOS59
IOS60
IOS61
IOS62
IOS63
IOS64
IOS65
IOS66
IOS67
IOS68
IOS69
IOS70
IOS71
IOS72
IOS73
IOS74
IOS75
IOS76
IOS77
IOS78
IOS79
IOS80
IOS81
IOS82
IOS83
IOS84
IOS85
IOS86

J_INT_BOT

INTERPOSER-BOT-D22

SMT-PAD

SYM 3 OF 3

SIGNAL

IOS87
IOS88
IOS89
IOS90
IOS91
IOS92
IOS93
IOS94
IOS95
IOS96
IOS97
IOS98

IOS99
IOS100
IOS101
IOS102
IOS103
IOS104
IOS105
IOS106
IOS107
IOS108
IOS109
IOS110
IOS111
IOS112
IOS113
IOS114
IOS115
IOS116
IOS117
IOS118
IOS119
IOS120
IOS121
IOS122
IOS123
IOS124
IOS125
IOS126
IOS127
IOS128
IOS129
IOS130
IOS131
IOS132
IOS133
IOS134
IOS135
IOS136
IOS137
IOS138
IOS139
IOS140
IOS141
IOS142
IOS143
IOS144
IOS145
IOS146
IOS147
IOS148
IOS149
IOS150
IOS151
IOS152
IOS153
IOS154
IOS155
IOS156
IOS157
IOS158
IOS159
IOS160
IOS161
IOS162
IOS163
IOS164
IOS165
IOS166
IOS167
IOS168
IOS169
IOS170
IOS171
IOS172

S87
S88
S89
S90
S91
S92
S93
S94
S95
S96
S97
S98
S99
S100
S101
S102
S103
S104
S105
S106
S107
S108
S109
S110
S111
S112
S113
S114
S115
S116
S117
S118
S119
S120
S121
S122
S123
S124
S125
S126
S127
S128
S129
S130
S131
S132
S133
S134
S135
S136
S137
S138
S139
S140
S141
S142
S143
S144
S145
S146
S147
S148
S149
S150
S151
S152
S153
S154
S155
S156
S157
S158
S159
S160
S161
S162
S163
S164
S165
S166
S167
S168
S169
S170
S171
S172

NC

PP1V8_S2

50 49

PP_VDD_MAIN

BB_TO_PMU_PCIE_HOST_WAKE_L

PMU_TO_BBPMU_RESET_L

PMU_AMUX_AY

AOP_TO_WLAN_CONTEXT_B

UART_BB_TO_AOP_RXD
UART_AOP_TO_BB_TXD

AOP_TO_WLAN_CONTEXT_A

BT_TO_PMU_HOST_WAKE

PMU_TO_BT_REG_ON

PMU_TO_WLAN_CLK32K

WLAN_TO_PMU_HOST_WAKE

PMU_TO_WLAN_REG_ON

PMU_AMUX_BY

CODEC_TO_SPKRAMP_BOT_ARC_MCLK

PMU_TO_BB_USB_VBUS_DETECT

20

20

20

12

12

12

12

20

20

20

20

20

20

41 38

20

PMU_HYDRA_TO_AP_FORCE_DFU

AP_TO_BT_WAKE

WLAN_TO_AP_TIME_SYNC

RADIO_PA_NTC

11

11

20

AP_TO_MANY_BSYNC

TOUCH_TO_AMUX_PP1V8

PP3V5_RACER
PP1V1_RACER

PP5V25_TOUCH_VDDH

RACER_TO_ACORN_ORB_SCAN

PP1V8_TOUCH_RACER_S2

I2C3_AP_SCL
I2C3_AP_SDA

TOUCH_TO_ACORN_PP5V25_EN

PN6V7_RACER

PMU_TO_TOUCH_CLK32K_RESET_L

PP10V0_RACER

AP_TO_RACER_RESET_L

RACER_TO_AOP_INT_L

20

42

42

42

42

42 17

42 10

42 10

42

42

20

42

11

12

SWD_AOP_TO_MANY_SWCLK

SWD_AOP_BI_RACER_SWDIO

UART_AOP_TO_RACER_TXD
UART_RACER_TO_AOP_RXD

HALL2_TO_AOP_IRQ_L

AP_TO_RACER_REF_CLK
SPI_AP_TO_RACER_CS_L
SPI_RACER_TO_AP_MISO
SPI_AP_TO_RACER_MOSI
SPI_AP_TO_RACER_SCLK

PP_BATT_VCC

12

12

12

12

10

10

10

10

10

23 22

PP3V0_S2

90_USB_BB_DATA_P
90_USB_BB_DATA_N

PP_VBUS2_IKTARA

IKTARA_COIL2

IKTARA_COIL1

AP_TO_BB_COREDUMP

PCIE_BB_BI_AP_CLKREQ_L
SPKRAMP_TOP_TO_COIL_OUT_POS
SPKRAMP_TOP_TO_COIL_OUT_NEG

COIL_TO_SPKRAMP_TOP_VSENSE_POS
COIL_TO_SPKRAMP_TOP_VSENSE_NEG
COIL_TO_SPKRAMP_BOT_VSENSE_POS
COIL_TO_SPKRAMP_BOT_VSENSE_NEG

SPKRAMP_BOT_TO_COIL_OUT_POS
SPKRAMP_BOT_TO_COIL_OUT_NEG

AP_TO_NFC_DEV_WAKE

UART_NFC_TO_AP_CTS_L

UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD

UART_AP_TO_NFC_RTS_L

AP_TO_NFC_FW_DWLD_REQ

NFC_TO_PMU_HOST_WAKE

PMU_TO_NFC_EN

48

48

23

25

25

11

7

36

36

36

36

49

49

49

49

11

11

11

11

11

11

20

20

48 47 46 38 22 20 17 14 12 10

50 46 45

43 42 41 34 31 27 23 21 19 18

D

G1

IOG1

G2

IOG2

G3

IOG3

G4

IOG4

G5

IOG5

G6

IOG6

G7

IOG7

G8

IOG8

G9

IOG9

G10

48 20 11

28 21 20 12 8

16 12 4

48 47 45 36 19

G11
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
G23
G24
G25
G26
G27
G28
G29
G30
G31
G32
G33
G34
G35
G36
G37
G38
G39
G40
G41
G42
G43
G44
G45
G46
G47
G48
G49
G50
G51
G52
G53
G54
G55
G56
G57
G58
G59
G60
G61
G62

IOG10
IOG11
IOG12
IOG13
IOG14
IOG15
IOG16
IOG17
IOG18
IOG19
IOG20
IOG21
IOG22
IOG23
IOG24
IOG25
IOG26
IOG27
IOG28
IOG29
IOG30
IOG31
IOG32
IOG33
IOG34
IOG35
IOG36
IOG37
IOG38
IOG39
IOG40
IOG41
IOG42
IOG43
IOG44
IOG45
IOG46
IOG47
IOG48
IOG49
IOG50
IOG51
IOG52
IOG53
IOG54
IOG55
IOG56
IOG57
IOG58
IOG59
IOG60
IOG61
IOG62

J_INT_BOT

INTERPOSER-BOT-D22

SMT-PAD

SYM 1 OF 3

GND

IOG63
IOG64
IOG65
IOG66
IOG67
IOG68
IOG69
IOG70
IOG71
IOG72
IOG73
IOG74
IOG75
IOG76
IOG77
IOG78
IOG79
IOG80
IOG81
IOG82
IOG83
IOG84
IOG85
IOG86
IOG87
IOG88
IOG89
IOG90
IOG91
IOG92
IOG93
IOG94
IOG95
IOG96
IOG97
IOG98

IOG99
IOG100
IOG101
IOG102
IOG103
IOG104
IOG105
IOG106
IOG107
IOG108
IOG109
IOG110
IOG111
IOG112
IOG113
IOG114
IOG115
IOG116
IOG117
IOG118
IOG119
IOG120
IOG121
IOG122
IOG123
IOG124

G63
G64
G65
G66
G67
G68
G69
G70
G71
G72
G73
G74
G75
G76
G77
G78
G79
G80
G81
G82
G83
G84
G85
G86
G87
G88
G89
G90
G91
G92
G93
G94
G95
G96
G97
G98
G99
G100
G101
G102
G103
G104
G105
G106
G107
G108
G109
G110
G111
G112
G113
G114
G115
G116
G117
G118
G119
G120
G121
G122
G123
G124

G125
G126
G127
G128
G129
G130
G131
G132
G133
G134
G135
G136
G137
G138
G139
G140
G141
G142
G143
G144
G145
G146
G147
G148
G149
G150
G151
G152
G153
G154
G155
G156
G157
G158
G159
G160
G161
G162
G163
G164
G165
G166
G167
G168
G169
G170
G171
G172
G173
G174
G175
G176
G177
G178
G179
G180
G181
G182
G183
G184
G185
G186

IOG125
IOG126
IOG127
IOG128
IOG129
IOG130
IOG131
IOG132
IOG133
IOG134
IOG135
IOG136
IOG137
IOG138
IOG139
IOG140
IOG141
IOG142
IOG143
IOG144
IOG145
IOG146
IOG147
IOG148
IOG149
IOG150
IOG151
IOG152
IOG153
IOG154
IOG155
IOG156
IOG157
IOG158
IOG159
IOG160
IOG161
IOG162
IOG163
IOG164
IOG165
IOG166
IOG167
IOG168
IOG169
IOG170
IOG171
IOG172
IOG173
IOG174
IOG175
IOG176
IOG177
IOG178
IOG179
IOG180
IOG181
IOG182
IOG183
IOG184
IOG185
IOG186

PAGE TITLE

J_INT_BOT

INTERPOSER-BOT-D22

SMT-PAD

SYM 2 OF 3

GND

IOG187
IOG188
IOG189
IOG190
IOG191
IOG192
IOG193
IOG194
IOG195
IOG196
IOG197
IOG198
IOG199
IOG200
IOG201
IOG202
IOG203
IOG204
IOG205
IOG206
IOG207
IOG208
IOG209
IOG210
IOG211
IOG212
IOG213
IOG214
IOG215
IOG216
IOG217
IOG218
IOG219
IOG220
IOG221
IOG222
IOG223
IOG224
IOG225
IOG226
IOG227
IOG228
IOG229
IOG230
IOG231
IOG232
IOG233
IOG234
IOG235
IOG236
IOG237
IOG238
IOG239
IOG240
IOG241
IOG242
IOG243
IOG244
IOG245
IOG246
IOG247
IOG248

G187
G188
G189
G190
G191
G192
G193
G194
G195
G196
G197
G198
G199
G200
G201
G202
G203
G204
G205
G206
G207
G208
G209
G210
G211
G212
G213
G214
G215
G216
G217
G218
G219
G220
G221
G222
G223
G224
G225
G226
G227
G228
G229
G230
G231
G232
G233
G234
G235
G236
G237
G238
G239
G240
G241
G242
G243
G244
G245
G246
G247
G248

C

B

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

A

I/O: Interposer (Bottom)

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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D

C

C

Radios on MLB Bottom

B

B

A

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SYNC_DATE=06/04/2015

PAGE TITLE

A

RADIOS

DRAWING NUMBER

051-02221

Apple Inc.

REVISION

9.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
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1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

7

6543

X891 MLB Bottom: EVT

LAST_MODIFICATION=Wed Apr 5 18:45:28 2017

2 1

ECNREV DESCRIPTION OF REVISION

CK
APPD

DATE

2017-04-0600084160166 ENGINEERING RELEASED

D

1
2
3
4
5
6
7
8
9
10
11
12

1
2
4
6
7
34
49
50
55
58
66
80

TABLE OF CONTENTS
SYSTEM: BOM Tables
SYSTEM: Mechanical Components
BOOTSTRAPPING
SYSTEM: Testpoints (Bottom)
SYSTEM POWER: Iktara
AUDIO: Speaker Amp Bottom
AUDIO: Speaker Amp Top
HALL EFFECT
CG: B2B Luna & Touch
I/O: Interposer (Top)
RADIOS

test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb
test_mlb

D

DATESYNCCONTENTSCSAPAGEDATESYNCCONTENTSCSAPAGE

11/03/2016
11/03/2016
11/03/2016
11/09/2016
11/09/2016
11/09/2016
11/09/2016
03/23/2017
11/09/2016
11/10/2016
08/19/2016

C

page1
BOM_OMIT_TABLE
PMIC: BUCKS & LDOS
PMIC: CLOCKS & CONTROL
BB: POWER
BB: CONTROL & HS PERIPHERALS
BB: GPIOS & QLINK
XCVR

14
15
16
17
18
19
20

113
2
3
4
5
6
7

8
21 9 XCVR
22
23
24
25
26

10

11

12

13

14

QPOET MODULE
LB PAD
HB PAD
UHB PAD
2G PA

C

B

27
28
29
30
31
32
33
34
35
36 RFFE TO GPO TRANSLATOR
37
38
39
40

15

16

17

18

19

20

21

22

23

24

1

75

1

4

LB DSM
HB DSM
COUPLER2
GNSS
METROCIRC
LOWER ANTENNA
UPPER ANTENNA
SIM, EUICC, DEBUG CONN
TEST POINTS

page1
NFC
SymbolPorts
Guinness

SIM TRAY
PROBE POINTS

WIFI

07/05/2016

B

07/06/2016

01/30/2014

A

41

5

BOM:639-03222 (ROW)
BOM:639-03410 (JPN)
MCO:056-04079

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

WiFiANTFeeds

BOM OPTIONCRITICAL

COMMONSCHSCH,MLB_BOT,X8911051-02222 NO

COMMONPCBPCB,MLB_BOT,X8911820-00864 NO

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

Sub Designs

SOURCE PROJECT SUB-DESIGN NAME VERSION

HARD/
SOFT

SRADIO_MLBD22 0.149.0 2017_04_05_18:45:19

0.22.0 2017_03_22_22:10:24NFC_MLBD22 S

0.20.0WIFI_MLBD22 S 2017_04_04_08:01:02

SYNC_DATE/TIME

TABLE_HIERARCHY_CONFIG_HEAD

TABLE_HIERARCHY_CONFIG_ITEM

TABLE_HIERARCHY_CONFIG_ITEM

TABLE_HIERARCHY_CONFIG_ITEM

TABLE OF CONTENTS

DRAWING TITLE

SCH,MLB,BOT,X891

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-02222

REVISION

6.0.0

BRANCH

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A

SIZEDRAWING NUMBER

D

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3

124567

D

EEEE Codes

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

825-7691 1 JPNEEEE_HP27

825-7691 1 ROWEEEE_HLJ9

EEEE FOR (MLB_BOT, 639-03410, JPN)

EEEE FOR (MLB_BOT, 639-03222, ROW)

NO

NO

Global Capacitors

TABLE_ALT_HEAD

PART NUMBER

BOM_TABLE_ALTS

138S00150 138S00149 ALL

138S00151

PART NUMBER

138S00143 ALL138S00144

138S00163

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

ALL138S00148 138S00149

ALL138S00149

ALL138S00144

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

0402-3T,10.5uF@1V, Kyocera

TABLE_ALT_ITEM

0402-3T,10.5uF@1V, SEMCO

TABLE_ALT_ITEM

0402-3T,10.5uF@1V, TY

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

0402,16uF@1V, Kyocera

TABLE_ALT_ITEM

0402,16uF@1V, Taiyo

CRITICAL PART# COMMENT

138S00149

CRITICAL PART# COMMENT

138S00144

678

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

0402-3T,10.5uF@1V

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

0402,16uF@1V

Iktara

132S00021

132S0423

132S0423

685-00183

371S00133

371S00132

CAP,CER,0.082UF,10%,50V,X7R,0402

8

2

CAP,CER,0.022UF,50V,X7R,10%,0402

CAP,CER,0.022UF,50V,X7R,10%,0402

2

PART NUMBER

685-00182

SUBBOM,MLB,BOT,DIODES,DIODES,X891

1685-00182

DIODES,SHOTTKY DIODE,30V,2A,0603

4

ONSEMI,SHOTTKY DIODE,30V,2A,0603

4

BOM_TABLE_ALTS

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

C3451,C3452,C3453,C3454,C3461,C3462,C3463,C3464

C3456,C3466

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

SUBBOM_DS

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

SUBBOM,MLB,BOT,DIODES,ONSEMI,X891

SUBBOM_DS

D3400,D3401,D3402,D3403

D3400,D3401,D3402,D3403

BOM OPTIONCRITICAL

NO COMMON

COMMONCRITICALC3455,C3465

NOSTUFFCRITICAL

TABLE_ALT_HEAD

TABLE_ALT_ITEM

BOM OPTIONCRITICAL

CRITICAL

CRITICAL

CRITICAL

COMMON

DIODES_DS

ONSEMI_DS

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

3 245

1

Soft-Term Cap Sub BOMs

TABLE_5_HEAD

SUBBOM,MLB,BOT,CAP,TYPICAL,X891

1685-00157

Touch/Luna B2B

CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA

1138S00159

138S0831 1

CAP,TYPICAL,2.2UF,6.3V,0201,MURATA

PART NUMBER

685-00157685-00158

BOM_TABLE_ALTS

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

SUBBOM_CAP

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

SUBBOM,MLB,BOT,CAP,SOFT,X891

BOM OPTIONCRITICAL

TABLE_5_ITEM

COMMONCRITICALSUBBOM_CAP

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

D

SOFT_CAPCRITICALC5890

TABLE_5_ITEM

TYPICAL_CAPCRITICALC5890

C

PART NUMBER

138S00138 ALL

138S00139

138S00164 ALL138S00139

PART NUMBER

138S00145 138S00146

PART NUMBER

138S00166 ALL138S00141

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

ALL

ALL138S00146138S00165

ALL138S00141138S00140

ALL138S00142 138S00141

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

0201,3uF@1V, Kyocera

0201,3uF@1V, Taiyo

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

0402,5.1uF@3V, Kyocera

0402,5.1uF@3V, Taiyo

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

0201,1.1uF@3V, Kyocera

0201,1.1uF@3V, SEMCO

0201,1.1uF@3V, Taiyo

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

CRITICAL PART# COMMENT

138S00139

CRITICAL PART# COMMENT

138S00146

CRITICAL PART# COMMENT

138S00141

0201,3uF@1V

0402,5.1uF@3V

0201,1.1uF@3V

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

C

B

Global Ferrites

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

IND,MLD,0.47UH,20%,2.5A,80MO,1608

FERR BD,150 OHM,25%,200MA,0.7 DCR,01005

FERR BD,150 OHM,25%,200MA,0.7 DCR,01005

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

CRITICAL PART# COMMENT

152S00557

155S0610

IND,MLD,0.47UH,20%,2.5A,80MO,1608

FERR BD,150 OHM,25%,200MA,0.7 DCR,01005

152S00558

155S00194

155S00200

PART NUMBER

152S00557

155S0610

155S0610

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

ALL

ALL

ALL

Global R/C Alternates

TABLE_ALT_HEAD

PART NUMBER

138S0986138S00024

138S0739138S0945

138S0706138S0739

138S0831

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

ALL138S0652138S0648

ALL

ALL138S0739138S0706

ALL

ALL

ALL132S0400132S0436

ALL138S00049

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO

CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK

CAP,CER,1UF,20%,10V,X5R,0201,MURATA

CAP,CER,1UF,20%,10V,X5R,0201,KYOCERA

CAP,CER,X5R,0.22UF,20%,6.3V,20%

CAP,CER,X5R,0.22UF,20%,6.3V,01005

CAP,CER,X5R,2.2UF,20%,6.3V,0201

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

CRITICAL PART# COMMENT

138S0652

138S0986

138S0739

138S0706

132S0400

138S0831

CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO

CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK

CAP,CER,1UF,20%,10V,X5R,0201,MURATA

CAP,CER,X5R,0.22UF,20%,6.3V,20%

CAP,CER,X5R,0.22UF,20%,6.3V,01005

CAP,CER,X5R,2.2UF,20%,6.3V,0201

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

B

A

Global Inductors

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

IND,1.2UH,3A,2016,0.65Z

IND,1.2UH,3A,2016,0.8Z

TABLE_ALT_ITEM

TABLE_ALT_ITEM

CRITICAL PART# COMMENT

152S00651

152S00652

IND,1.2UH,3A,2016,0.65Z

IND,1.2UH,3A,2016,0.8Z

152S00653

152S00654

PART NUMBER

152S00651

152S00652

BOM_TABLE_ALTS

BOM_TABLE_ALTS

ALL

ALL

Multi-Vendor Criticals

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

CRITICAL PART# COMMENT

138S0979

138S0683

132S0663

132S0288

132S0275

132S0245

CAP,CER,X5R,10UF,20%,10V,0402,H=0.65MM

CAP,CER,X5R,1UF,10%,25V,0402

CAP,CER,X5R,1UF,10%,25V,0402

CAP,CER,X5R,0.1UF,10%,16V,0201

CAP,CER,X5R,470PF,10%,10V,01005

CAP,CER,X5R,0.01UF,10%,6.3V,01005

TABLE_CRITICAL_HEAD

CRITICAL PART# COMMENT

TABLE_CRITICAL_ITEM

132S00008

TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM

131S0804

TABLE_CRITICAL_ITEM

131S0307

TABLE_CRITICAL_ITEM

131S00053

TABLE_CRITICAL_ITEM

117S0055

TABLE_CRITICAL_ITEM

107S0257

CAP,CER,0.1UF,10%,50V,X7R,0402

CAP,CER,27PF,5%,C0G,25V,0201

CAP,CER,NP0/C0G,100PF,5%,16V,01005

CAP,CER,C0G,220PF,5%,10V,01005

RES,MF,1/20W,2M OHM,5,0201,SMD

THERMISTOR,NTC,10K OHM,1%,B=3435,01005

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

SYNC_MASTER=

PAGE TITLE

SYSTEM: BOM Tables

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=11/03/2016

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

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FIDUCIALS

D

FD0401

FID

0P5SQ-CROSS-NSP

1

ROOM=ASSEMBLY

FD0402

FID

0P5SQ-CROSS-NSP

1

ROOM=ASSEMBLY

FD0403

FID

0P5SQ-CROSS-NSP

1

ROOM=ASSEMBLY

FD0404

FID

0P5SQ-CROSS-NSP

1

ROOM=ASSEMBLY

FD0405

FID

0P5SQ-CROSS-NSP

1

ROOM=ASSEMBLY

D

C

FD0406

FID

0P5SQ-CROSS-NSP

1

ROOM=ASSEMBLY

FD0410

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

FD0411

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

FD0412

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

FD0413

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

C

B

FD0414

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

FD0415

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

B

A

CRITICAL

SH0400

SHIELD-EMI-TOP-X891

CRITICAL

SB0400

STDOFF-SUBMERGED-X891

1

ROOM=ASSEMBLY

SM

PAGE TITLE

SYSTEM: Mechanical Components

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=11/03/2016

DRAWING NUMBER

051-02222

REVISION

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D

D

BOOTSTRAPPING:BOARD ID[3]

PP1V8_S2

C

BOARD_ID3

OUT

CKPLUS_WAIVE=SINGLE_NODENET

NOSTUFF

R0630

1.00K

5%

1/32W

MF

01005

ROOM=SOC

C

21

B

D22 Selected (BOARD_ID3) ->

B

A

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SYNC_DATE=11/03/2016

PAGE TITLE

A

BOOTSTRAPPING

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

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SIZE

D

678

3 245

1

D

PP_VDD_MAIN

PP_BATT_VCC

TP0700

1

TP-P55

ROOM=TEST

TP0701

1

TP-P55

ROOM=TEST

TP0702

ROOM=TEST

TP0703

ROOM=TEST

TP0515

ROOM=TEST

1

TP-P55

1

TP-P55

1

TP-P55

A

A

A

A

A

Test Points

VDD_MAIN

VBATT

PP1V8_TOUCH_RACER_S2

PP5V25_TOUCH_VDDH

PP3V5_RACER

PN6V7_RACER

PP10V0_RACER

TP0750

A

TP-P55

ROOM=TEST

TP0751

A

TP-P55

ROOM=TEST

TP0752

A

TP-P55

ROOM=TEST

TP0753

A

TP-P55

ROOM=TEST

TP0754

A

TP-P55

ROOM=TEST

GND

TP0780

TP-P55

ROOM=TEST

TP0790

1

TP-P55

ROOM=TEST

A

A

Stockholm GND TP

Probe Points

Iktara Debug

PMU_TO_IKTARA_EN_EXT_1P8V

IN

IKTARA_ANA1

IN

IKTARA_GPIO3

IN

IKTARA_GPIO4

IN

PP0700

P2MM-NSM

SM

1

PP0701

P2MM-NSM

1

PP0702

P2MM-NSM

1

PP0703

P2MM-NSM

1

PP

SM

PP

SM

PP

SM

PP

ROOM=TEST

ROOM=TEST

ROOM=TEST

ROOM=TEST

D

C

TP0705

1

TP-P55

TP0706

1

TP-P55

ROOM=TEST

A

PMU_AMUX_AY

TP0707

1

TP-P55

ROOM=TEST

TP0708

1

TP-P55

ROOM=TEST

A

A

TP0522

1

TP-P55

ROOM=TEST

TP0709

1

TP-P55

ROOM=TESTROOM=TEST

TP0710

1

TP-P55

ROOM=TEST

A

AA

A

AMUX

TP0713

1

TP-P55

ROOM=TEST

A

ANALOG MUX A OUTPUT

PP1V1_RACER

TOUCH_TO_ACORN_PP5V25_EN

TOUCH_TO_AMUX_PP1V8

PMU_TO_TOUCH_CLK32K_RESET_L

AP_TO_MANY_BSYNC

HALL2_TO_AOP_IRQ_L

TP0755

A

TP-P55

ROOM=TEST

TP0756

A

TP-P55

ROOM=TEST

TP0757

A

TP-P55

ROOM=TEST

TP0758

A

TP-P55

ROOM=TEST

TP0759

A

TP-P55

ROOM=TEST

TP0760

A

TP-P55

ROOM=TEST

IKTARA_TO_SMC_INT

IN

PP0704

P2MM-NSM

SM

1

PP

ROOM=TEST

C

B

PMU_AMUX_BY

PMU_HYDRA_TO_AP_FORCE_DFU

PP_GPU_LVCC

TP0715

1

TP-P55

ROOM=TEST

A

DFU

TP0714

1

TP-P55

ROOM=TEST

A

LVCC

TP0720

1

TP-P55

ROOM=TEST

A

ANALOG MUX B OUTPUT

FORCE DFU

AP_TO_RACER_RESET_L

UART_RACER_TO_AOP_RXD

RACER_TO_AOP_INT_L

UART_AOP_TO_RACER_TXD

TP0761

A

TP-P55

ROOM=TEST

TP0762

A

TP-P55

ROOM=TEST

TP0763

A

TP-P55

ROOM=TEST

TP0764

A

TP-P55

ROOM=TEST

B

A

PP_CPU_PCORE_LVCC

IKTARA_COIL1

IKTARA_COIL2

TP0721

1

TP-P55

ROOM=TEST

A

COIL

TP0730

TP-P55

ROOM=TEST

TP0731

TP-P55

ROOM=TEST

A

A

RACER_TO_ACORN_ORB_SCAN

SPI_AP_TO_RACER_CS_L

SPI_AP_TO_RACER_MOSI

I2C3_AP_SDA

I2C3_AP_SCL

TP0766

A

TP-P55

ROOM=TEST

TP0767

A

TP-P55

ROOM=TEST

TP0768

A

TP-P55

ROOM=TEST

TP0771

A

TP-P55

ROOM=TEST

TP0772

A

TP-P55

ROOM=TEST

SYNC_MASTER=test_mlb

PAGE TITLE

SYSTEM: Testpoints (Bottom)

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=11/09/2016

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

7 OF 80

SHEET

5 OF 41

A

SIZE

D

8

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67

35 4

2

1

Iktara

678

3 245

1

D

C3445

220PF

5%
25V
COG

01005

ROOM=IKTARA

PP_IKTARA_VRECT

20%

25V

X5R

20%

25V

X5R

1

2

1

2

1

C3411

2.2UF

2

0402-4

ROOM=IKTARA

C3440

2.2UF

0402-4

ROOM=IKTARA

C3412

2.2UF

0402-4

ROOM=IKTARA

C3441

2.2UF

0402-4

ROOM=IKTARA

20%

25V

X5R

20%

25V

X5R

D

1

2

R3401

0.020

1

1/6W

2

D7

D6

D5

D4

D3

D2

D1

0402

2

XW3401

SHORT-10L-0.05MM-SM
SHORT-10L-0.05MM-SM

1

PP_IKTARA_VRECT_SENSE

E1

21

1%
MF

ROOM=IKTARA

XW3400

ROOM=IKTARA
ROOM=IKTARA

PP_IKTARA_VMID_SENSE

1

C3413

2.2UF

2

1

L1

K1

J1

E4

H1

F1

20%

25V

2

X5R
0402-4

PP_IKTARA_VMID

1

C3442

2.2UF

20%

25V

2

X5R

ROOM=IKTARA

0402-4

ROOM=IKTARA

1

C3443

220PF

5%
25V

2

COG
01005

ROOM=IKTARA

C

B

To Coil

IKTARA_COIL1

1

R3450

100K

1%
1/20W
MF
201

2

To Coil

IKTARA_COIL2

1

R3460

100K

1%
1/20W
MF
201

2

OMIT_TABLE

1

C3451

0.1UF

10%

50V

2

CER-X7R
0402

ROOM=IKTARA

OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE

1

C3461

0.1UF

10%

50V

2

CER-X7R
0402

ROOM=IKTARA

OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE

1

C3452

0.1UF

10%

50V

2

CER-X7R
0402

ROOM=IKTARA

1

C3462

0.1UF

10%

50V

2

CER-X7R
0402

ROOM=IKTARA

1

C3453

0.1UF

10%

50V

2

CER-X7R
0402

ROOM=IKTARA

OMIT_TABLE

1

C3463

0.1UF

10%

50V

2

CER-X7R
0402

ROOM=IKTARA

1

C3454

0.1UF

10%

50V

2

CER-X7R
0402

ROOM=IKTARA

OMIT_TABLE

1

C3464

0.1UF

10%

50V

2

CER-X7R
0402

ROOM=IKTARA

1

C3455

0.1UF

10%

50V

2

CER-X7R
0402

ROOM=IKTARA

1

C3465

0.1UF

10%

50V

2

CER-X7R
0402

ROOM=IKTARA

OMIT_TABLE

1

C3456

0.1UF

10%

50V

2

CER-X7R
0402

ROOM=IKTARA

1

C3466

0.1UF

10%

50V

2

CER-X7R
0402

ROOM=IKTARA

PP_VDD_MAIN

K

D3400

DSN2 DSN2DSN2

NSR20F30NX

ROOM=IKTARA

A

NOSTUFF

10%

50V

X5R

0201

1

2

C3402

2200PF

ROOM=IKTARA

K

A

1

C3406

0.033UF

10%

50V

2

X7R
0402

ROOM=IKTARA

1

C3403

2200PF

10%

50V

2

X5R
0201

ROOM=IKTARA

D3401

DSN2

NSR20F30NX

ROOM=IKTARA

C3404

0.1UF

10%

16V

X5R-CERM

0201

ROOM=IKTARA

21

C3405

0.1UF

21

1

C3407

0.033UF

10%

50V

2

X7R
0402

ROOM=IKTARA

OUT

IKTARA_ANA1

10%

16V

X5R-CERM

0201

ROOM=IKTARA

R3422

0.00

0%

1/32W

MF

01005

ROOM=IKTARA

21

PP_VDD_MAIN_IKTARA

K

D3402

NSR20F30NX

ROOM=IKTARA

A

OMIT_TABLEOMIT_TABLEOMIT_TABLEOMIT_TABLE

K

D3403

NSR20F30NX

A

ROOM=IKTARA

IKTARA_COMM1

IKTARA_BOOT1

IKTARA_AC1

IKTARA_AC2

IKTARA_BOOT2

IKTARA_COMM2

NC

NC

NC

B5

CLAMP1

C5

COMM1

C7

BOOT1_VDD

B6

AC1

B7

AC1

C6

AC1

B1

AC2

B2

AC2

C2

AC2

C1

BOOT2_VDD

C3

COMM2

B3

CLAMP2

E2

ANA1

F2

ANA2

G3

ANA3

G2

ANA4

G6

REFBP

G5

DIGTEST

VRECT_VDD

VRECT_VDD

VRECT_VDD

VRECT_VDD

A3

A2

A1

VRECT_S

VRECT_VDD

VRECT_VDD

VRECT_VDD

CRITICAL

BC59355A2

A7

A6

A5

A4

U3400

WLCSP

ROOM=IKTARA

PGNDRGND

J3

B4

K3

L3

VMID_S

VMID_VDD

VMID_VDD

VMID_R_VDD

HV_GPO2

BOOTB_VDD

VMID_AUX_SW_VDD

VMID_AUX_VDD

VDIG_CORE_VDD

VAUX_1P8_VDD

GPIO3/SWDIO

GPIO4/SWCLK

EN_EXT_1P8

VSYS_ANA_VDD

VSYS_1P8_VDD

OTP_WREN

AVSS

L7

F5

H3

C4

G4

VMID_VDD

VMID_VDD

HV_GPO1

SW
SW
SW

VOUT

VDD5V

VDDO

SDA

SCL

INT

RESET*

GPIO1
GPIO2

GPIO5
GPIO6
GPIO7

F4

H4
H5

H2
J2

K2
L2

G1
E6

E5
E3
F7
H7
G7

L4
L5
K4
J4

H6
L6
J6
K5
J5
K7
K6

E7
F3
F6
J7

NC
NC

NC

NC
NC

NC
NC

IKTARA_VOUT_SNS

1

C3419

1UF

20%

6.3V

2

X5R
0201

ROOM=IKTARA

1

R3408

1.00K

5%
1/32W
MF
01005

2

ROOM=IKTARA

1

C3418

20%

6.3V

2

X5R
0201

OMIT

XW3402

SHORT-20L-0.05MM-SM

21

ROOM=IKTARA

1

C3417

4UF1UF

20%

6.3V

2

CERM-X5R

ROOM=IKTARA

0201

ROOM=IKTARA

PP5V0_VMID_AUX_IKTARA

PP5V0_VDD_IKTARA

PP1V5_VDIG_CORE_IKTARA

PP1V8_IKTARA

1

C3416

2.2UF

20%

6.3V

2

X5R-CERM
0201-2

ROOM=IKTARA

I2C0_SMC_SDA
I2C0_SMC_SCL

IKTARA_TO_SMC_INT

PMU_TO_IKTARA_RESET_R_L

IKTARA_GPIO3
IKTARA_GPIO4

IKTARA_GPIO7

PMU_TO_IKTARA_EN_EXT_1P8V_R

PP_VDD_MAIN

PP1V8_S2

IN

BI

OUT

OUT
OUT

1

C3415

1UF

10%

25V

2

X5R
402

ROOM=IKTARA

PP_VBUS2_IKTARA

1

C3444

220PF

5%
25V

2

COG
01005

ROOM=IKTARA

R3420

100

21

5%

1/32W

MF

01005

ROOM=IKTARA

R3421

100

21

5%

1/32W

MF

01005

ROOM=IKTARA

Pull-Ups

PP_VDD_MAIN

R3406

2M

5%

1/20W

MF

ROOM=IKTARA

PP1V8_IKTARA

ROOM=IKTARA

PMU_TO_IKTARA_RESET_L

PMU_TO_IKTARA_EN_EXT_1P8V

201

R3407

10K

5%

1/32W

MF

01005

C

1

2

1

2

B

IN

IN

A

8

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SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=11/09/2016

A

SYSTEM POWER: Iktara

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

34 OF 80

SHEET

6 OF 41

1

SIZE

D

678

3 245

1

D

C4907

18UF

20% 20%

6.3V

CER-X5R

0402-0.1MM

ROOM=SPKAMP1

1

2

C4905

18UF

6.3V

CER-X5R

0402-0.1MM

ROOM=SPKAMP1

1

2

C4909

0402-0.1MM

ROOM=SPKAMP1

18UF

20%

6.3V

CER-X5R

1

2

C4914

4UF

20%

6.3V

CERM-X5R

ROOM=SPKAMP1

0201

D

South Speaker Amplifier

APN: 338S00295
I2C ADDRESS: 1000 000x

0x80

PP1V8_AUDIO_VA_S2PP_VDD_MAIN

1

2

1

C4925

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SPKAMP1

1

C4926

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SPKAMP1

C

B

CRITICAL

L4900

1.2UH-20%-3A-0.077OHM

21

MEHK2016T-SM

ROOM=SPKAMP1

SPKRAMP_BOT_LX

I2C1_AOP_SDA

BI

I2C1_AOP_SCL

IN

SPKRAMP_BOT_ARC_TO_AOP_INT_L

BI

AOP_TO_SPKRAMP_BOT_ARC_RESET_L

IN

SPKRAMP_BOT_TO_SPKRAMP_TOP_SYNC

BI

CODEC_TO_SPKRAMP_BOT_ARC_MCLK

IN

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK

IN

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK

IN

I2S_CODEC_ASP1_TO_AOP_AMPS_DIN

BI

NC
NC

A5

VP

A2

SW

B2

SW

D6

SDA

E6

SCL

A7

INT*

A6

RESET*

F6

ALIVE/SYNC

E5

AD0/PDM_CLK1

B7

MCLK

C7

SCLK

C6

LRCK/FSYNC

D7

SDIN

B6

SDOUT

F7

PDM_CLK0

E7

PDM_DATA0

D5

PDM_DATA1 AD1

B4

B3

A4

A3

U4900

CS35L26B-A1

WLCSP

ROOM=SPKAMP1

CRITICAL

GNDP GNDA

C5

C4

C3

D3

D4

F5

VA

B5

E4

VBST_B
VBST_B

VBST_A
VBST_A

ISNS+

ISNS-

VSNS+

VSNS-

OUT+

OUT-

FILT+

F2

A1
B1

C1
D1

F1
E1

E2
E3

D2
C2

F4
F3

1

C4927

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SPKAMP1

SPKRAMP_BOT_ISENSE_POS
SPKRAMP_BOT_ISENSE_NEG

COIL_TO_SPKRAMP_BOT_VSENSE_POS
COIL_TO_SPKRAMP_BOT_VSENSE_NEG

SPKRAMP_BOT_FILT

1

C4928

0.1UF

10%
16V

2

X5R-CERM
0201

ROOM=SPKAMP1

1

C4929

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SPKAMP1

1

C4903

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=SPKAMP1

C

PP_SPKRAMP_BOT_VBOOST

1

C4904

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=SPKAMP1

1

C4930

0.01UF

10%

6.3V

2

X5R
01005

ROOM=SPKAMP1

IN
IN

1

C4931

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=SPKAMP1

1

C4932

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=SPKAMP1

SPKRAMP_BOT_TO_COIL_OUT_POS
SPKRAMP_BOT_TO_COIL_OUT_NEG

C4922

470PF

01005

ROOM=SPKAMP1

10%
10V
X5R

1

2

1

C4934

470PF

10%
10V

2

X5R
01005

ROOM=SPKAMP1

B

A

8

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SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=11/09/2016

A

AUDIO: Speaker Amp Bottom

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

49 OF 80

SHEET

7 OF 41

1

SIZE

D

Pull Downs

AP_TO_SPKRAMP_TOP_RESET_L

1

R5001

100K

5%
1/32W
MF
01005

2

ROOM=SPKAMP2

678

3 245

1

D

PP_VDD_MAIN

C5027

18UF

20%

6.3V

CER-X5R

0402-0.1MM

ROOM=SPKAMP2

1

C5026

2

0402-0.1MM

ROOM=SPKAMP2

18UF

20%

6.3V

CER-X5R

1

2

C5028

0402-0.1MM

ROOM=SPKAMP2

North Speaker Amplifier

APN: 338S00295
I2C ADDRESS: 1000 000x

0x80

1

18UF

20% 20%

6.3V

CER-X5R

2

C5029

CERM-X5R

ROOM=SPKAMP2

4UF

20%

6.3V
0201

1

2

1

C5015

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SPKAMP2

PP1V8_AUDIO_VA_S2

1

C5016

2.2UF

6.3V

2

X5R-CERM
0201

ROOM=SPKAMP2

D

C

B

CRITICAL

L5000

1.2UH-20%-3A-0.11OHM

21

MEFE2016T-SM

ROOM=SPKAMP2

SPKRAMP_TOP_LX

I2C2_AP_SDA

BI

I2C2_AP_SCL

IN

SPKRAMP_TOP_TO_AP_INT_L

BI

AP_TO_SPKRAMP_TOP_RESET_L

IN

SPKRAMP_BOT_TO_SPKRAMP_TOP_SYNC

BI

I2S_AP_TO_SPKRAMP_TOP_MCLK

IN

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK

IN

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK

IN

I2S_CODEC_ASP1_TO_AOP_AMPS_DIN

BI

PDM_CODEC_TO_SPKRAMP_TOP_CLK

IN

PDM_CODEC_TO_SPKRAMP_TOP_DATA

IN

A5

VP

A2

SW

B2

SW

D6

SDA

E6

SCL
INT*

A7

RESET*

A6
F6

ALIVE/SYNC
AD0/PDM_CLK1

E5
B7

MCLK

C7

SCLK

C6

LRCK/FSYNC

D7

SDIN

B6

SDOUT
PDM_CLK0

F7
E7

PDM_DATA0

D5

PDM_DATA1 AD1

B4

B3

A4

A3

U5000

CS35L26B-A1

WLCSP

ROOM=SPKAMP2

CRITICAL

GNDP GNDA

C5

C4

C3

D3

D4

F5

VA

B5

E4

VBST_B
VBST_B

VBST_A
VBST_A

ISNS+

ISNS-

VSNS+

VSNS-

OUT+

OUT-

FILT+

F2

A1
B1

C1
D1

F1
E1

E2
E3

D2
C2

F4
F3

1

C5012

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SPKAMP2

SPKRAMP_TOP_ISENSE_POS
SPKRAMP_TOP_ISENSE_NEG

COIL_TO_SPKRAMP_TOP_VSENSE_POS
COIL_TO_SPKRAMP_TOP_VSENSE_NEG

SPKRAMP_TOP_FILT

1

C5011

0.1UF

10%
16V

2

X5R-CERM
0201

ROOM=SPKAMP2

1

C5018

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SPKAMP2

1

C5024

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=SPKAMP2

C

PP_SPKRAMP_TOP_VBOOST

1

C5025

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=SPKAMP2

1

C5019

0.01UF

10%

6.3V

2

X5R
01005

ROOM=SPKAMP2

IN
IN

1

C5006

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=SPKAMP2

1

C5008

10UF

20%
10V

2

X5R-CERM
0402-0.1MM

ROOM=SPKAMP2

SPKRAMP_TOP_TO_COIL_OUT_POS
SPKRAMP_TOP_TO_COIL_OUT_NEG

C5000

470PF

ROOM=SPKAMP2

01005

10%
10V
X5R

1

2

1

C5001

470PF

10%
10V

2

X5R
01005

ROOM=SPKAMP2

B

A

8

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SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=11/09/2016

A

AUDIO: Speaker Amp Top

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

50 OF 80

SHEET

8 OF 41

1

SIZE

D

678

3 245

1

D

D

C

PP1V8_S2

Hall Effect

APN:353S3697

1

C5530

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=HALL

VDD

U5530

AK8789

DFN

ROOM=HALL

CRITICAL

THRM

PAD

VSS

215

OUT1
OUT2

4
3

NC

HALL3_TO_AOP_IRQ_L

C

OUT

B

B

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

A

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=03/23/2017

HALL EFFECT

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

55 OF 80

SHEET

9 OF 41

1

SIZE

D

678

3 245

1

D

Racer I/O

AP_TO_RACER_RESET_L

IN

AP_TO_RACER_REF_CLK

IN

RACER_TO_AOP_INT_L

OUT

FL5800

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_TOUCH_ORB

1

C5800

2

R5801

0.00

1/32W
01005

ROOM=B2B_TOUCH_ORB

21

0%
MF

FL5802

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_TOUCH_ORB

1

C5802

2

220PF

5%
10V
C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

220PF

5%
10V
C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

AP_TO_RACER_RESET_CONN_L

C5860

27PF

AP_TO_RACER_REF_CLK_C

ROOM=B2B_TOUCH_ORB

RACER_TO_AOP_INT_CONN_L

5%
25V
C0G

0201

Luna + Touch Connector

Rcpt: 516S00325
Plug: 516S00326

SPI_AP_TO_RACER_SCLK_CONN
SPI_AP_TO_RACER_CS_CONN_L
AP_TO_RACER_RESET_CONN_L
RACER_TO_ACORN_ORB_SCAN_CONN

21

AP_TO_RACER_REF_CLK_CONN

SWD_AOP_TO_RACER_CONN
SWD_AOP_BI_RACER_SWDIO_CONN
HALL2_TO_AOP_IRQ_CONN_L

AP_TO_RACER_REF_CLK_CONN

PMU_TO_TOUCH_CLK32K_RESET_CONN_L
I2C3_AP_BI_TOUCH_EEPROM_SDA_CONN
I2C3_AP_TO_TOUCH_EEPROM_SCL_CONN
TOUCH_TO_AMUX_PP1V8_CONN

Touch and Misc I/O

<-- This one on MLB

J5800

AA26DK-S028VA1

F-ST-SM

33

3029

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827

3231

34

ROOM=B2B_TOUCH_ORB

SPI_AP_TO_RACER_MOSI_CONN
SPI_RACER_TO_AP_MISO_CONN

RACER_TO_AOP_INT_CONN_L

PP10V0_RACER_CONN
UART_RACER_TO_AOP_RXD_CONN
UART_AOP_TO_RACER_TXD_CONN

PP1V8_TOUCH_RACER_CONN

PP1V1_RACER_CONN
PN6V7_RACER_CONN
PP3V5_RACER_CONN

AP_TO_TOUCH_BSYNC_CONN

TOUCH_TO_ACORN_PP5V25_EN_CONN

PP5V25_TOUCH_VDDH_CONN

D

C

B

UART_AOP_TO_RACER_TXD TOUCH_TO_ACORN_PP5V25_EN_CONN

IN

UART_RACER_TO_AOP_RXD TOUCH_TO_AMUX_PP1V8

OUT

OUT

SPI_AP_TO_RACER_CS_L

IN

IN

SPI_AP_TO_RACER_MOSI SPI_AP_TO_RACER_MOSI_CONN

IN

SPI_RACER_TO_AP_MISO

OUT

AP I2C Filters

FL5803

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_TOUCH_ORB

1

C5803

2

FL5804

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_TOUCH_ORB

1

C5804

2

FL5805

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_TOUCH_ORB

1

C5805

2

FL5806

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_TOUCH_ORB

1

C5806

2

R5807

0.00

1/32W
01005

ROOM=B2B_TOUCH_ORB

0%
MF

21

1

C5807

2

FL5809

0.00

1/32W
01005

ROOM=B2B_TOUCH_ORB

0%
MF

21

1

C5809

2

FL5810

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_TOUCH_ORB

1

C5810

2

UART_AOP_TO_RACER_TXD_CONN TOUCH_TO_ACORN_PP5V25_EN

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

UART_RACER_TO_AOP_RXD_CONN

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

RACER_TO_ACORN_ORB_SCAN_CONNRACER_TO_ACORN_ORB_SCAN

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

NOSTUFF

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

NOSTUFF

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

SPI_AP_TO_RACER_CS_CONN_L

SPI_AP_TO_RACER_SCLK_CONNSPI_AP_TO_RACER_SCLK

SPI_RACER_TO_AP_MISO_CONN

OUT

OUT

PMU_TO_TOUCH_CLK32K_RESET_L

IN

IN

BI

AP_TO_MANY_BSYNC

IN

SWD_AOP_TO_MANY_SWCLK

SWD_AOP_BI_RACER_SWDIO

NOSTUFF

R5845

10K

1%

1/32W

MF

ROOM=B2B_TOUCH_ORB

01005

FL5840

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_TOUCH_ORB

1

C5840

220PF

5%
10V

2

C0G-CERM
01005

FL5841

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_TOUCH_ORB

1

C5841

220PF

5%
10V

2

C0G-CERM
01005

R5842

33.2

2 1

1%

1/32W

MF

ROOM=B2B_TOUCH_ORB

01005

1

C5842

100PF

5%
16V

2

NP0-C0G
01005

R5844

49.9

2 1

1%

1/32W

MF

ROOM=B2B_TOUCH_ORB

01005

1

C5844

100PF

5%
16V

2

NP0-C0G
01005

ROOM=B2B_TOUCH_ORB

FL5845

150OHM-25%-200MA-0.7DCR

2 1

1

2

01005

ROOM=B2B_TOUCH_ORB

1

C5845

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

FL5847

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_TOUCH_ORB

1

C5847

100PF

5%
16V

2

NP0-C0G
01005

ROOM=B2B_TOUCH_ORB

ROOM=B2B_TOUCH_ORB

ROOM=B2B_TOUCH_ORB

PMU_TO_TOUCH_CLK32K_RESET_CONN_L

ROOM=B2B_TOUCH_ORB

TOUCH_TO_AMUX_PP1V8_CONN

SWD_AOP_TO_RACER_CONN

SWD_AOP_BI_RACER_SWDIO_CONN

AP_TO_TOUCH_BSYNC_CONN

Touch And Racer Power

FL5890

33-OHM-25%-1500MA

PP1V8_TOUCH_RACER_S2

OMIT_TABLE

ROOM=B2B_TOUCH_ORB

PP5V25_TOUCH_VDDH

PP3V5_RACER

PN6V7_RACER

PP10V0_RACER

PP1V1_RACER

C5890

2.2UF

20%

6.3V

X5R-CERM

0201

150OHM-25%-0.28A-0.69OHM

150OHM-25%-200MA-0.7DCR

1

2

2 1

33-OHM-25%-1500MA

2 1

33-OHM-25%-1500MA

2 1

2 1

33-OHM-25%-1500MA

2 1

0201

ROOM=B2B_TOUCH_ORB

FL5891

01005

ROOM=B2B_TOUCH_ORB

FL5893

0201

ROOM=B2B_TOUCH_ORB

FL5894

0201

ROOM=B2B_TOUCH_ORB

FL5895

01005

ROOM=B2B_TOUCH_ORB

FL5896

0201

ROOM=B2B_TOUCH_ORB

21

PP1V8_TOUCH_RACER_CONN

C

1

C5891

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

PP5V25_TOUCH_VDDH_CONN

1

C5892

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

PP3V5_RACER_CONN

1

C5893

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

PN6V7_RACER_CONN

1

C5894

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

1

C5895

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

1

C5896

220PF

5%
10V

2

C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

PP10V0_RACER_CONN

PP1V1_RACER_CONN

B

R5820

0.00

2 1

0%

1/32W

MF

01005

ROOM=B2B_TOUCH_ORB

1

C5820

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

I2C3_AP_BI_TOUCH_EEPROM_SDA_CONN

A

OUT

I2C3_AP_SDA

R5821

IN

I2C3_AP_SCL

0.00

2 1

0%

1/32W

MF

01005

ROOM=B2B_TOUCH_ORB

1

C5821

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

I2C3_AP_TO_TOUCH_EEPROM_SCL_CONN

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

Hall Effect

HALL2_TO_AOP_IRQ_L HALL2_TO_AOP_IRQ_CONN_L

IN

67

FL5850

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=B2B_TOUCH_ORB

1

2

C5850

220PF

5%
10V
C0G-CERM
01005

ROOM=B2B_TOUCH_ORB

SYNC_MASTER=test_mlb

PAGE TITLE

SYNC_DATE=11/09/2016

A

CG: B2B Luna & Touch

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

35 4

2

BRANCH

evt-1

PAGE

58 OF 80

SHEET

10 OF 41

1

SIZE

D

678

3 245

1

D

C

B

A

NC_UART_AP_TO_GNSS_TXD
NC_UART_AP_TO_GNSS_RTS_L
NC_UART_GNSS_TO_AP_CTS_L
NC_UART_GNSS_TO_AP_RXD
NC_AP_TO_GNSS_WAKE
NC_PMU_TO_GNSS_EN
AP_TO_BB_TIME_MARK
90_PCIE_AP_TO_BB_REFCLK_N

90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_BB_TO_AP_RXD_P
90_PCIE_BB_TO_AP_RXD_N
90_PCIE_AP_TO_BB_TXD_P

90_PCIE_AP_TO_BB_TXD_N
90_PCIE_WLAN_TO_AP_RXD_P

90_PCIE_WLAN_TO_AP_RXD_N
90_PCIE_AP_TO_WLAN_REFCLK_N

90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_TXD_N

90_PCIE_AP_TO_WLAN_TXD_P

PMU_TO_IKTARA_EN_EXT_1P8V
IKTARA_TO_SMC_INT
I2C0_SMC_SCL
I2C0_SMC_SDA
BB_TO_STROBE_DRIVER_GSM_BURST_IND

PDM_CODEC_TO_SPKRAMP_TOP_CLK
PDM_CODEC_TO_SPKRAMP_TOP_DATA
PCIE_AP_TO_BB_RESET_L
I2S_AP_TO_SPKRAMP_TOP_MCLK
AP_TO_SPKRAMP_TOP_RESET_L
SPKRAMP_TOP_TO_AP_INT_L
I2C2_AP_SDA
I2C2_AP_SCL
PP1V8_AUDIO_VA_S2

PP_GPU_LVCC
PP_CPU_PCORE_LVCC

AP_TO_BB_IPC_GPIO1
AP_TO_BB_RESET_L

HALL3_TO_AOP_IRQ_L

BOARD_ID3
PCIE_WLAN_BI_AP_CLKREQ_L
PCIE_AP_TO_WLAN_RESET_L
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK
PMU_TO_IKTARA_RESET_L
I2S_BB_TO_AP_DIN
I2S_BB_TO_AP_LRCLK
I2S_BB_TO_AP_BCLK
I2S_AP_TO_BB_DOUT
BB_TO_AP_RESET_DETECT_L
NC_AP_TO_BBPMU_RADIO_ON_L
AP_TO_WLAN_DEVICE_WAKE
SPKRAMP_BOT_ARC_TO_AOP_INT_L
AOP_TO_SPKRAMP_BOT_ARC_RESET_L

SWD_AOP_BI_BB_SWDIO
I2C1_AOP_SDA
I2C1_AOP_SCL
PP_VDD_MAIN

UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_CTS_L
UART_AP_TO_BT_TXD
UART_BT_TO_AP_RXD
PP_VDD_BOOST
UART_AP_TO_WLAN_TXD
UART_AP_TO_WLAN_RTS_L
UART_WLAN_TO_AP_RXD
UART_WLAN_TO_AP_CTS_L
PP1V8_S2

NC

NC

NC

S1
S2
S3
S4
S5
S6
S7
S8

S9
S10
S11
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
S29
S30
S31
S32
S33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43
S44
S45
S46
S47
S48
S49
S50
S51
S52
S53
S54
S55
S56
S57
S58
S59
S60
S61
S62
S63
S64
S65
S66
S67
S68
S69
S70
S71
S72
S73
S74
S75
S76
S77
S78
S79
S80
S81
S82
S83
S84
S85
S86

IOS1
IOS2
IOS3
IOS4
IOS5
IOS6
IOS7
IOS8
IOS9
IOS10
IOS11
IOS12
IOS13
IOS14
IOS15
IOS16
IOS17
IOS18
IOS19
IOS20
IOS21
IOS22
IOS23
IOS24
IOS25
IOS26
IOS27
IOS28
IOS29
IOS30
IOS31
IOS32
IOS33
IOS34
IOS35
IOS36
IOS37
IOS38
IOS39
IOS40
IOS41
IOS42
IOS43
IOS44
IOS45
IOS46
IOS47
IOS48
IOS49
IOS50
IOS51
IOS52
IOS53
IOS54
IOS55
IOS56
IOS57
IOS58
IOS59
IOS60
IOS61
IOS62
IOS63
IOS64
IOS65
IOS66
IOS67
IOS68
IOS69
IOS70
IOS71
IOS72
IOS73
IOS74
IOS75
IOS76
IOS77
IOS78
IOS79
IOS80
IOS81
IOS82
IOS83
IOS84
IOS85
IOS86

J_INT_TOP

INTERPOSER-TOP-D22

SMT-PAD

SYM 3 OF 3

SIGNAL

IOS87
IOS88
IOS89
IOS90
IOS91
IOS92
IOS93
IOS94
IOS95
IOS96
IOS97
IOS98

IOS99
IOS100
IOS101
IOS102
IOS103
IOS104
IOS105
IOS106
IOS107
IOS108
IOS109
IOS110
IOS111
IOS112
IOS113
IOS114
IOS115
IOS116
IOS117
IOS118
IOS119
IOS120
IOS121
IOS122
IOS123
IOS124
IOS125
IOS126
IOS127
IOS128
IOS129
IOS130
IOS131
IOS132
IOS133
IOS134
IOS135
IOS136
IOS137
IOS138
IOS139
IOS140
IOS141
IOS142
IOS143
IOS144
IOS145
IOS146
IOS147
IOS148
IOS149
IOS150
IOS151
IOS152
IOS153
IOS154
IOS155
IOS156
IOS157
IOS158
IOS159
IOS160
IOS161
IOS162
IOS163
IOS164
IOS165
IOS166
IOS167
IOS168
IOS169
IOS170
IOS171
IOS172

S87
S88
S89
S90
S91
S92
S93
S94
S95
S96
S97
S98
S99
S100
S101
S102
S103
S104
S105
S106
S107
S108
S109
S110
S111
S112
S113
S114
S115
S116
S117
S118
S119
S120
S121
S122
S123
S124
S125
S126
S127
S128
S129
S130
S131
S132
S133
S134
S135
S136
S137
S138
S139
S140
S141
S142
S143
S144
S145
S146
S147
S148
S149
S150
S151
S152
S153
S154
S155
S156
S157
S158
S159
S160
S161
S162
S163
S164
S165
S166
S167
S168
S169
S170
S171
S172

NC

PP1V8_S2

PP_VDD_MAIN

BB_TO_PMU_PCIE_HOST_WAKE_L

PMU_TO_BBPMU_RESET_L

PMU_AMUX_AY

AOP_TO_WLAN_CONTEXT_B

UART_BB_TO_AOP_RXD
UART_AOP_TO_BB_TXD

AOP_TO_WLAN_CONTEXT_A

BT_TO_PMU_HOST_WAKE

PMU_TO_BT_REG_ON

PMU_TO_WLAN_CLK32K

WLAN_TO_PMU_HOST_WAKE

PMU_TO_WLAN_REG_ON

PMU_AMUX_BY

CODEC_TO_SPKRAMP_BOT_ARC_MCLK

PMU_TO_BB_USB_VBUS_DETECT
PMU_HYDRA_TO_AP_FORCE_DFU

AP_TO_BT_WAKE

WLAN_TO_AP_TIME_SYNC

RADIO_PA_NTC

AP_TO_MANY_BSYNC

TOUCH_TO_AMUX_PP1V8

PP3V5_RACER
PP1V1_RACER

PP5V25_TOUCH_VDDH

RACER_TO_ACORN_ORB_SCAN

PP1V8_TOUCH_RACER_S2

I2C3_AP_SCL
I2C3_AP_SDA

TOUCH_TO_ACORN_PP5V25_EN

PN6V7_RACER

PMU_TO_TOUCH_CLK32K_RESET_L

PP10V0_RACER

AP_TO_RACER_RESET_L

RACER_TO_AOP_INT_L

SWD_AOP_TO_MANY_SWCLK

SWD_AOP_BI_RACER_SWDIO

UART_AOP_TO_RACER_TXD
UART_RACER_TO_AOP_RXD

HALL2_TO_AOP_IRQ_L

AP_TO_RACER_REF_CLK
SPI_AP_TO_RACER_CS_L
SPI_RACER_TO_AP_MISO
SPI_AP_TO_RACER_MOSI
SPI_AP_TO_RACER_SCLK

PP_BATT_VCC

PP3V0_S2

90_USB_BB_DATA_P
90_USB_BB_DATA_N

PP_VBUS2_IKTARA

IKTARA_COIL2

IKTARA_COIL1

AP_TO_BB_COREDUMP

PCIE_BB_BI_AP_CLKREQ_L
SPKRAMP_TOP_TO_COIL_OUT_POS
SPKRAMP_TOP_TO_COIL_OUT_NEG

COIL_TO_SPKRAMP_TOP_VSENSE_POS
COIL_TO_SPKRAMP_TOP_VSENSE_NEG
COIL_TO_SPKRAMP_BOT_VSENSE_POS
COIL_TO_SPKRAMP_BOT_VSENSE_NEG

SPKRAMP_BOT_TO_COIL_OUT_POS
SPKRAMP_BOT_TO_COIL_OUT_NEG

AP_TO_NFC_DEV_WAKE

UART_NFC_TO_AP_CTS_L

UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD

UART_AP_TO_NFC_RTS_L

AP_TO_NFC_FW_DWLD_REQ

NFC_TO_PMU_HOST_WAKE

PMU_TO_NFC_EN

G1
G2
G3
G4
G5
G6
G7
G8

G9
G10
G11
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
G23
G24
G25
G26
G27
G28
G29
G30
G31
G32
G33
G34
G35
G36
G37
G38
G39
G40
G41
G42
G43
G44
G45
G46
G47
G48
G49
G50
G51
G52
G53
G54
G55
G56
G57
G58
G59
G60
G61
G62

IOG1
IOG2
IOG3
IOG4
IOG5
IOG6
IOG7
IOG8
IOG9
IOG10
IOG11
IOG12
IOG13
IOG14
IOG15
IOG16
IOG17
IOG18
IOG19
IOG20
IOG21
IOG22
IOG23
IOG24
IOG25
IOG26
IOG27
IOG28
IOG29
IOG30
IOG31
IOG32
IOG33
IOG34
IOG35
IOG36
IOG37
IOG38
IOG39
IOG40
IOG41
IOG42
IOG43
IOG44
IOG45
IOG46
IOG47
IOG48
IOG49
IOG50
IOG51
IOG52
IOG53
IOG54
IOG55
IOG56
IOG57
IOG58
IOG59
IOG60
IOG61
IOG62

J_INT_TOP

INTERPOSER-TOP-D22

SMT-PAD

SYM 1 OF 3

GND

IOG63
IOG64
IOG65
IOG66
IOG67
IOG68
IOG69
IOG70
IOG71
IOG72
IOG73
IOG74
IOG75
IOG76
IOG77
IOG78
IOG79
IOG80
IOG81
IOG82
IOG83
IOG84
IOG85
IOG86
IOG87
IOG88
IOG89
IOG90
IOG91
IOG92
IOG93
IOG94
IOG95
IOG96
IOG97
IOG98

IOG99
IOG100
IOG101
IOG102
IOG103
IOG104
IOG105
IOG106
IOG107
IOG108
IOG109
IOG110
IOG111
IOG112
IOG113
IOG114
IOG115
IOG116
IOG117
IOG118
IOG119
IOG120
IOG121
IOG122
IOG123
IOG124

G63
G64
G65
G66
G67
G68
G69
G70
G71
G72
G73
G74
G75
G76
G77
G78
G79
G80
G81
G82
G83
G84
G85
G86
G87
G88
G89
G90
G91
G92
G93
G94
G95
G96
G97
G98
G99
G100
G101
G102
G103
G104
G105
G106
G107
G108
G109
G110
G111
G112
G113
G114
G115
G116
G117
G118
G119
G120
G121
G122
G123
G124

G125
G126
G127
G128
G129
G130
G131
G132
G133
G134
G135
G136
G137
G138
G139
G140
G141
G142
G143
G144
G145
G146
G147
G148
G149
G150
G151
G152
G153
G154
G155
G156
G157
G158
G159
G160
G161
G162
G163
G164
G165
G166
G167
G168
G169
G170
G171
G172
G173
G174
G175
G176
G177
G178
G179
G180
G181
G182
G183
G184
G185
G186

IOG125
IOG126
IOG127
IOG128
IOG129
IOG130
IOG131
IOG132
IOG133
IOG134
IOG135
IOG136
IOG137
IOG138
IOG139
IOG140
IOG141
IOG142
IOG143
IOG144
IOG145
IOG146
IOG147
IOG148
IOG149
IOG150
IOG151
IOG152
IOG153
IOG154
IOG155
IOG156
IOG157
IOG158
IOG159
IOG160
IOG161
IOG162
IOG163
IOG164
IOG165
IOG166
IOG167
IOG168
IOG169
IOG170
IOG171
IOG172
IOG173
IOG174
IOG175
IOG176
IOG177
IOG178
IOG179
IOG180
IOG181
IOG182
IOG183
IOG184
IOG185
IOG186

PAGE TITLE

J_INT_TOP

INTERPOSER-TOP-D22

SMT-PAD

SYM 2 OF 3

GND

I/O: Interposer (Top)

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

IOG187
IOG188
IOG189
IOG190
IOG191
IOG192
IOG193
IOG194
IOG195
IOG196
IOG197
IOG198
IOG199
IOG200
IOG201
IOG202
IOG203
IOG204
IOG205
IOG206
IOG207
IOG208
IOG209
IOG210
IOG211
IOG212
IOG213
IOG214
IOG215
IOG216
IOG217
IOG218
IOG219
IOG220
IOG221
IOG222
IOG223
IOG224
IOG225
IOG226
IOG227
IOG228
IOG229
IOG230
IOG231
IOG232
IOG233
IOG234
IOG235
IOG236
IOG237
IOG238
IOG239
IOG240
IOG241
IOG242
IOG243
IOG244
IOG245
IOG246
IOG247
IOG248

G187
G188
G189
G190
G191
G192
G193
G194
G195
G196
G197
G198
G199
G200
G201
G202
G203
G204
G205
G206
G207
G208
G209
G210
G211
G212
G213
G214
G215
G216
G217
G218
G219
G220
G221
G222
G223
G224
G225
G226
G227
G228
G229
G230
G231
G232
G233
G234
G235
G236
G237
G238
G239
G240
G241
G242
G243
G244
G245
G246
G247
G248

DRAWING NUMBER

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=11/10/2016SYNC_MASTER=test_mlb

051-02222

6.0.0

evt-1
66 OF 80
11 OF 41

D

C

B

A

SIZE

D

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

678

3 245

1

D

90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N
90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_WLAN_TXD_N
90_PCIE_WLAN_TO_AP_RXD_P
90_PCIE_WLAN_TO_AP_RXD_N
PCIE_WLAN_BI_AP_CLKREQ_L
PCIE_AP_TO_WLAN_RESET_L
WLAN_TO_PMU_HOST_WAKE

AOP_TO_WLAN_CONTEXT_A
AOP_TO_WLAN_CONTEXT_B
AP_TO_BT_WAKE
AP_TO_WLAN_DEVICE_WAKE

PMU_TO_BT_REG_ON
PMU_TO_WLAN_CLK32K
PMU_TO_WLAN_REG_ON

UART_WLAN_TO_AP_CTS_L
UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_RTS_L
UART_AP_TO_WLAN_TXD

90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N
90_PCIE_AP_TO_WLAN_TX_P
90_PCIE_AP_TO_WLAN_TX_N
90_PCIE_WLAN_TO_AP_RX_P
90_PCIE_WLAN_TO_AP_RX_N
PCIE_AP_BI_WLAN_CLKREQ_L
PCIE_AP_TO_WLAN_PERST_L
PCIE_WLAN_TO_PMU_WAKE

AOP_TO_WLAN_CONTEXT_A
AOP_TO_WLAN_CONTEXT_B
AP_TO_BT_WAKE
AP_TO_WLAN_DEV_WAKE

PMU_TO_BT_REG_ON
PMU_TO_WLAN_32K
PMU_TO_WLAN_REG_ON

UART_WLAN_TO_AP_CTS_L
UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_RTS_L
UART_AP_TO_WLAN_TXD

WIFI_MLB

Wifi/BT

I90

SUBDESIGN_SUFFIX=W

PP_VDD_MAIN

PP1V8_SDRAM

UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX

BT_TO_PMU_HOST_WAKE

UART_BT_TO_AP_CTS_L

UART_BT_TO_AP_RXD

UART_AP_TO_BT_RTS_L

UART_AP_TO_BT_TXD

PP_VDD_MAIN

PP1V8_S2

UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX

BT_TO_PMU_HOST_WAKE
UART_BT_TO_AP_CTS_L

UART_BT_TO_AP_RXD

UART_AP_TO_BT_RTS_L

UART_AP_TO_BT_TXD

NC_AP_TO_BBPMU_RADIO_ON_L

I118

PP_VDD_MAIN

PP3V0_S2
PP1V8_S2

PP_VDD_BOOST

NBC

NC_AP_TO_BBPMU_RADIO_ON_L

PMU_TO_BBPMU_RESET_L
AP_TO_BB_RESET_L

BB_TO_AP_RESET_DETECT_L
BB_TO_STROBE_DRIVER_GSM_BURST_IND

AP_TO_BB_TIME_MARK
AP_TO_BB_COREDUMP
AP_TO_MANY_BSYNC
AP_TO_BB_IPC_GPIO1

90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_REFCLK_N
90_PCIE_AP_TO_BB_TXD_P
90_PCIE_AP_TO_BB_TXD_N
90_PCIE_BB_TO_AP_RXD_P
90_PCIE_BB_TO_AP_RXD_N
PCIE_AP_TO_BB_RESET_L
PCIE_BB_BI_AP_CLKREQ_L
BB_TO_PMU_PCIE_HOST_WAKE_L

MAKE_BASE=TRUE

PP_VDD_MAIN
PP3V0_S2
PP1V8_SDRAM
PP_VDD_BOOST_RF

PMU_TO_BBPMU_RESET_L
AP_TO_BB_RESET_L

BB_TO_AP_RESET_ACT_L

BB_TO_AP_RESET_DETECT_L
BB_TO_AP_GSM_TXBURST

AP_TO_BB_TIME_MARK
AP_TO_BB_COREDUMP_TRIG
TOUCH_TO_BBPMU_FORCE_PWM
AP_TO_BB_IPC_GPIO

AP_TO_BB_IPC_GPIO2

100_PCIE_AP_TO_BB_REFCLK_P
100_PCIE_AP_TO_BB_REFCLK_N
100_PCIE_AP_TO_BB_TX_P
100_PCIE_AP_TO_BB_TX_N
100_PCIE_BB_TO_AP_RX_P
100_PCIE_BB_TO_AP_RX_N
PCIE_AP_TO_BB_PERST_L
PCIE_AP_BI_BB_CLKREQ_L
PCIE_BB_TO_PMU_WAKE_L

Cellular

SUBDESIGN_SUFFIX=E

I85

D

radio_mlb

C

WLAN_TO_AP_TIME_SYNC

WLAN_TIME_SYNC

RADIO PA NTC

50_UAT_WLAN_5G_SOUTH

50_LAT_WLAN_MLC

50_UAT_WLAN_2G_SOUTH

50_UAT_WLAN_2G_SOUTH
50_UAT_WLAN_5G_SOUTH

50_LAT_WLAN_MLC

UART_AOP_TO_BB_TXD
UART_BB_TO_AOP_RXD

I2S_BB_TO_AP_BCLK
I2S_BB_TO_AP_LRCLK
I2S_AP_TO_BB_DOUT
I2S_BB_TO_AP_DIN

UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX

NFC_TO_BB_CLK_REQ
BB_TO_NFC_CLK

NFC_SWP1

UART_AP_TO_BB_TXD
UART_BB_TO_AP_RXD

UART_AOP_TO_BB_TXD
UART_BB_TO_AOP_RXD

UART_AOP_TO_GNSS_TXD
UART_GNSS_TO_AOP_RXD

I2S_BB_TO_AP_BCLK
I2S_BB_TO_AP_LRCLK
I2S_AP_TO_BB_DOUT
I2S_BB_TO_AP_DIN

UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX

NFC_TO_BB_CLKREQ
BB_TO_NFC_CLK
BB_SIM1_SWP

C

B

C3043

100PF

5%

16V

NP0-C0G

01005

ROOM=PMU

1

I115

1

2

R3043

10KOHM-1%

01005

ROOM=PMU

2

RADIO_PA_NTC

PA_NTC_RETURN

SHORT-20L-0.05MM-SM

OMIT

XW3043

21

ROOM=PMU

SWD_AOP_TO_MANY_SWCLK
SWD_AOP_BI_BB_SWDIO
PMU_TO_BB_USB_VBUS_DETECT
90_USB_BB_DATA_P
90_USB_BB_DATA_N

SWD_AP_TO_BB_CLK
SWD_AP_BI_BB_IO
USB_BB_VBUS
90_USB_BB_P
90_USB_BB_N

B

50_LAT_WLAN_MLC
50_UAT_WLAN_2G_SOUTH
50_UAT_WLAN_5G_SOUTH

50_LAT_WLAN_MLC
50_UAT_WLAN_2G_SOUTH
50_UAT_WLAN_5G_SOUTH

A

PP_VDD_MAIN
PP1V8_S2

PMU_TO_NFC_EN
BB_TO_NFC_CLK
NFC_TO_BB_CLK_REQ

AP_TO_NFC_FW_DWLD_REQ
AP_TO_NFC_DEV_WAKE

NFC_TO_PMU_HOST_WAKE

UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD

UART_AP_TO_NFC_RTS_L
UART_NFC_TO_AP_CTS_L

NFC_SWP1

NFC

PP_VDD_MAIN
PP1V8_SDRAM

PMU_TO_NFC_EN
BB_TO_NFC_CLK
NFC_TO_BB_CLK_REQ
AP_TO_NFC_FW_DWLD
AP_TO_NFC_DEV_WAKE
NFC_TO_PMU_HOST_WAKE
NFC_DWP_TX_TP

NC

UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD
UART_AP_TO_NFC_RTS_L
UART_NFC_TO_AP_CTS_L

NFC_SWP1

SUBDESIGN_SUFFIX=S

nfc_mlb

NC_AP_TO_GNSS_WAKE
NC_PMU_TO_GNSS_EN
NC_UART_AP_TO_GNSS_TXD
NC_UART_GNSS_TO_AP_RXD
NC_UART_AP_TO_GNSS_RTS_L
NC_UART_GNSS_TO_AP_CTS_L

NC_AP_TO_GNSS_WAKE
NC_PMU_TO_GNSS_EN
NC_UART_AP_TO_GNSS_TXD
NC_UART_GNSS_TO_AP_RXD
NC_UART_AP_TO_GNSS_RTS_L
NC_UART_GNSS_TO_AP_CTS_L

MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE

PMU_TO_GNSS_EN
UART_AP_TO_GNSS_TXD
UART_GNSS_TO_AP_RXD
UART_AP_TO_GNSS_RTS_L
UART_GNSS_TO_AP_CTS_L
GNSS_TO_PMU_HOST_WAKE
AP_TO_GNSS_TIME_MARK

SYNC_MASTER=test_mlb

PAGE TITLE

RADIOS

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=08/19/2016

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

80 OF 80

SHEET

12 OF 41

A

SIZE

D

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

D

C

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

7

6543

D22 RADIO_MLB

LAST_MODIFICATION=Wed Apr 5 18:36:41 2017

DATESYNCCONTENTSCSAPAGE

13

page1

14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

36

1

2

4

6

7

34

49

50

58

66

80

<CSA_PAGE12>

<CSA_PAGE13>

<CSA_PAGE14>

<CSA_PAGE15>

<CSA_PAGE16>

<CSA_PAGE17>

<CSA_PAGE18>

<CSA_PAGE19>

<CSA_PAGE20>

<CSA_PAGE21>

<CSA_PAGE22>

<CSA_PAGE23>

<CSA_PAGE24>

<CSA_PAGE25>

<CSA_PAGE26>

<CSA_PAGE27>

<CSA_PAGE28>

<CSA_PAGE29>

<CSA_PAGE30>

page1
BOM_OMIT_TABLE
PMIC: BUCKS & LDOS

PMIC: CLOCKS & CONTROL
BB: POWER

BB: CONTROL & HS PERIPHERALS
BB: GPIOS & QLINK
XCVR
XCVR
QPOET MODULE
LB PAD
HB PAD
UHB PAD
2G PA
LB DSM
HB DSM
COUPLER2
GNSS
METROCIRC
LOWER ANTENNA
UPPER ANTENNA
SIM, EUICC, DEBUG CONN
TEST POINTS35
RFFE TO GPO TRANSLATOR

<SYNC_MASTER1>
<SYNC_MASTER2>
<SYNC_MASTER3>
<SYNC_MASTER4>
<SYNC_MASTER5>
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
ap_core_flat
MASTER

ap_core_flat
ap_core_flat
MASTER

<SYNC_DATE1>

<SYNC_DATE2>

<SYNC_DATE3>

<SYNC_DATE4>

<SYNC_DATE5>

09/09/15

09/09/15

09/09/15

09/09/15

08/13/15

09/09/15

09/09/15

09/09/15

09/09/15

09/09/15

09/09/15

09/09/15

09/09/15

09/09/15

09/09/15

09/09/15

09/09/15

09/09/15

09/09/15

09/09/15

09/09/15

<SYNC_DATE27>

08/10/15

09/09/15

<SYNC_DATE30>

0.134.3
EVT

AP CONNECTIONS

24 23 21 7

22 10 3

24 23

23 4

22 4

23 7

23 7

23 7

23 7

23 7

23 6

23 6

23 6

23 6

23 6

23 6

23 7

23 7

23 7

23 7

23 7

23 7

23 7

23 7

23 7

23 22 7

23 22 7

23 22

2 1

POWER

IN
IN
IN
IN

PP1V8_S2
PP_VDD_MAIN
PP3V0_S2
PP_VDD_BOOST

BB CONTROL

IN

IN
OUT
OUT

IN

IN

4

IN

IN

PMU_TO_BBPMU_RESET_L
AP_TO_BB_RESET_L
BB_TO_AP_RESET_DETECT_L
BB_TO_STROBE_DRIVER_GSM_BURST_IND

AP_TO_BB_TIME_MARK
AP_TO_BB_COREDUMP
AP_TO_MANY_BSYNC

AP_TO_BB_IPC_GPIO1

PCIE

90_PCIE_AP_TO_BB_REFCLK_P

IN

90_PCIE_AP_TO_BB_REFCLK_N

IN

90_PCIE_AP_TO_BB_TXD_P

IN

90_PCIE_AP_TO_BB_TXD_N

IN

90_PCIE_BB_TO_AP_RXD_P

OUT

90_PCIE_BB_TO_AP_RXD_N

OUT

PCIE_AP_TO_BB_RESET_L

IN

PCIE_BB_BI_AP_CLKREQ_L

IO

BB_TO_PMU_PCIE_HOST_WAKE_L

OUT

AOP

UART_AOP_TO_BB_TXD

IN

UART_BB_TO_AOP_RXD

OUT

AUDIO

I2S_BB_TO_AP_BCLK

OUT

I2S_BB_TO_AP_LRCLK

OUT

I2S_AP_TO_BB_DOUT

IN

I2S_BB_TO_AP_DIN

OUT

WLAN

UART_BB_TO_WLAN_COEX

IN

UART_WLAN_TO_BB_COEX

OUT

STOCKHOLM

NFC_SWP1

IO

ECNREV DESCRIPTION OF REVISION

VOLTAGE=1.8V

PP_VDD_BOOST

MAKE_BASE=TRUE

SWD/USB

23 6

23 6

23 22 4

22 6

22 6

SWD_AOP_TO_MANY_SWCLK

IN

SWD_AOP_BI_BB_SWDIO

IO

PMU_TO_BB_USB_VBUS_DETECT

IN

90_USB_BB_DATA_P

IO

90_USB_BB_DATA_N

IO

WIFI

20

19

19

50_LAT_WLAN_MLC

IO

50_UAT_WLAN_2G_SOUTH

IO

50_UAT_WLAN_5G_SOUTH

IO

CK
APPD

DATE

2017-04-0600084160166 ENGINEERING RELEASED

D

22 10 3

C

B

SCH: 951-03772
BOM: 939-XXXXX

ALTERNATES

PART NUMBER

ALTERNATE FOR

PART NUMBER

335S0894335S00013 U_EEPROM_E

DESCRIPTION BOM OPTIONREFERENCE DESIGNATOR(S)

IC, EEPROM

BOM_TABLE_ALTS

4

23 4

NFC_TO_BB_CLK_REQ

IN

BB_TO_NFC_CLK

OUT

B

DOCK

A

197S00093

197S00065 Y401_E197S00067

XTAL, 38P4MHZ
XTAL, 38P4MHZ

BOM_TABLE_ALTSY401_E197S00065
BOM_TABLE_ALTS

DRAWING TITLE

SCH,MLB,BOT,X891

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

page1

051-02222

REVISION

6.0.0

BRANCH

evt-1

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1 OF 24

SHEET

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A

SIZEDRAWING NUMBER

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8 7 6 5 4 3

BOM OPTIONS:

2 1

D

D

C

C

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Professional.Repairphone

B

B

A

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678

RF PMIC: SWITCHERS & LDOS

U_PMIC_E

PDM9655

BGA

SYM 6 OF 6

SREG

98
29

31
52
12
14
96
34
13
20

SWITCHERS BULK CAPS

MAKE_BASE=TRUE

22 10 3 1

22 10 3 1

22 10 3 1

IN

IN

IN IN

PP_VDD_MAIN

1

C302_E

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

MAKE_BASE=TRUE

PP_VDD_MAIN

PP_VDD_MAIN

1

C303_E

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

MAKE_BASE=TRUE

PP_VDD_MAIN

PP_VDD_MAIN

1

C304_E

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

3

GND

GND

PP_VDD_MAIN

PP_VDD_MAIN

PP_VDD_MAIN

PP_VDD_MAIN

GND

3

3

3

MAKE_BASE=TRUE

3

3

MAKE_BASE=TRUE

3

3

MAKE_BASE=TRUE

PP_VDD_MAIN

3

PP_VDD_MAIN

3

PP_VDD_MAIN

3

PP_VDD_MAIN

3

PP_VDD_MAIN

3

22 10 3 1

IN

3

IN

3

IN

4 3

IN

22 10 3 1

3

22 10 3 1

GND

3

GND

3

GND

3

GND

3

GND

3

PP_VDD_MAIN

PP_1V2_SMPS2_E

3

PP_1V0_SMPS3_E
PP_1V0_SMPS3_E
PP_1V8_SMPS4_E
PP_VDD_BOOST
PP_1V0_SMPS3_E
PP_VDD_BOOST

1

C328_E

4UF

20%

6.3V

2

CERM-X5R
0201

93
103
114

84

95
105
116

74

53

43

44

75

76
108
110
100

111
113

102

VDD_S1
VDD_S1
VDD_S1

GND_S1
GND_S1
GND_S1
GND_S1

VDD_S2

GND_S2
VDD_S3

VDD_S3
GND_S3

GND_S3
VDD_S4
GND_S4
VDD_S5

VDD_S5
GND_S5

GND_S5

VREG_S1

VSW_S1
VSW_S1
VSW_S1

VREG_S2

VSW_S2
VSW_S2

VREG_S3

VSW_S3
VSW_S3
VSW_S3

VREG_S4

VSW_S4

VREG_S5

VSW_S5
VSW_S5

VIN_VPH1
VIN_VPH2

VDD_L1_2
VDD_L1_2
VDD_L3_8
VDD_L4
VDD_L5_6
VDD_L7
VDD_L9
VDD_L10_11_12_13

72

94
104
115

41
63

73
23
54

64
65

86
109
99

101
112

U_PMIC_E

PDM9655

BGA

SYM 4 OF 6

LREG

3 245

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

XW301_E

SHORT-10L-0.1MM-SM

PP_0V8_SMPS1_SNS_E

VSW_SMPS1_E

PP_1V2_SMPS2_SNS_E

VSW_SMPS2_E

PP_1V0_SMPS3_SNS_E

VSW_SMPS3_E

PP_1V8_SMPS4_SNS_E

VSW_SMPS4_E

PP_0V8_SMPS5_SNS_E

VSW_SMPS5_E

VREG_L1
VREG_L2
VREG_L3
VREG_L4
VREG_L5
VREG_L6
VREG_L7
VREG_L8

VREG_L9
VREG_L10
VREG_L11
VREG_L12
VREG_L13

42
32
2
4
85
107
33
22
3
19
9
21
10

0.65MM

0.65MM

NC

NC

1

C306_E C307_E C310_EC308_E C312_EC311_E

4.7UF 4.7UF

20%

6.3V

2

X5R-CERM1
402

1

20%

6.3V

2

X5R-CERM1
402

L304_E

1UH-20%-3.6A-0.035OHM

2 1

2016

RADIO_PMIC

L301_E

1UH-20%-2.4A-0.06OHM

21

PIWA2016FE-SM

L305_E

1UH-20%-2.4A-0.06OHM

21

PIWA2016FE-SM

L302_E

2.2UH-20%-2.7A-0.09OHM

21

2016

L303_E

2.2UH-20%-2.7A-0.09OHM

21

2016

1

4.7UF

20%

6.3V

2

X5R-CERM1
402

1

2

4UF

20%
4V
X5R
0201

2 1

ROOM=PMU

XW302_E

SHORT-10L-0.1MM-SM

2 1

ROOM=PMU

XW303_E

SHORT-10L-0.1MM-SM

2 1

ROOM=PMU

XW304_E

SHORT-10L-0.1MM-SM

2 1

ROOM=PMU

XW305_E

SHORT-10L-0.1MM-SM

2 1

ROOM=PMU

1

4.7UF

20%

6.3V

2

X5R-CERM1
402

1

4.7UF

20%

6.3V

2

X5R-CERM1

1

4.7UF

20%

6.3V

2

X5R-CERM1
402402

1

C317_E

26UF

20%
4V

2

X5R
0402-0.1MM

1

26UF

20%
4V

2

X5R
0402-0.1MM

1

C319_E

26UF

20%
4V

2

X5R
0402-0.1MM

1

C320_E

26UF

20%
4V

2

X5R
0402-0.1MM

1

C321_E

26UF

20%
4V

2

X5R
0402-0.1MM

1

C313_E

15UF

20%

6.3V

2

CERM
0402

1

C322_E

26UF

20%
4V

2

X5R
0402-0.1MM

VOLTAGE=1.2V

VOLTAGE=1.2V
VOLTAGE=1.0V
VOLTAGE=0.9V

VOLTAGE=1.8V

VOLTAGE=1.8V

VOLTAGE=1.0V
VOLTAGE=0.9V
VOLTAGE=3.0V
VOLTAGE=3.0V

VOLTAGE=1.8V

1

2.2UF

20%

6.3V

2

X5R-CERM
0201

1

C323_EC318_E

26UF

20%
4V

2

X5R
0402-0.1MM

1

C324_E

26UF

20%
4V

2

X5R
0402-0.1MM

1

C325_E

26UF

20%
4V

2

X5R
0402-0.1MM

1

C326_E

26UF

20%
4V

2

X5R
0402-0.1MM

GND

GND

3

1

C327_E

26UF

20%
4V

2

X5R
0402-0.1MM

PP_1V2_LDO1_E
PP_1V2_LDO2_E
PP_1V0_LDO3_E
PP_0V9_LDO4_E
PP_1V8_LDO5_E
PP_1V8_LDO6_E

PP_1V0_LDO8_E
PP_0V8_LDO9_E

PP_3V0_LDO10_E

PP_UIM1_LDO11_E

PP_UIM2_LDO13_E

3

GND

VOLTAGE=0.8V

GND

1

C316_EC314_EC309_E

2.2UF

20%

6.3V

2

X5R-CERM
0201

1

VOLTAGE=0.8V

PP_0V8_SMPS1_E

OUT

0.80V/2898MA

VOLTAGE=1.2V

PP_1V2_SMPS2_E

3

1.2V/1366MA

VOLTAGE=1.0V

PP_1V0_SMPS3_E

OUT

1.0V/1972MA

3

VOLTAGE=1.8V

PP_1V8_SMPS4_E

OUT

1.80V/509MA

GND

3

OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT

OUT

3

PP_0V8_SMPS5_E

23 12 8 3

8 3

23 12

23 5

23 8

23 5

23 8

23 5

5

22 5

5

OUT

23 22 10 8 7 6 5 4 3

23 5

3

4 3

23 5

0.80V/1250MA

1.20V/1.5MA

1.20V/2MA
1V/431MA

0.90V/128MA

1.80V/272.4MA

23 18 16 15 13 12 11 8 5 4

1.80V/221.6MA

2.7V/5MA

1.00V/368.3MA

0.80V/1045MA

3.00V/30MA

1.8V/60MA

2.7V/69MA

1.8V/30MA

D

C

B

22 10 3 1

22 10 3 1

IN

PP_VDD_MAIN

1

2

IN

MAKE_BASE=TRUE

PP_VDD_MAIN

C301_E

18UF

20%

6.3V
CER-X5R
0402-0.1MM

PP_VDD_MAIN

MAKE_BASE=TRUE

1

C305_E

18UF

20%

6.3V

2

CER-X5R
0402-0.1MM

GND

PP_VDD_MAIN

GND

PP_VDD_MAIN

PP_VDD_MAIN

3

3

MAKE_BASE=TRUE

3

MAKE_BASE=TRUE

B

VIO TX & RX

PP_1V8_LDO6_E

3 4 5 6 7 8 10 22 23

3

MAKE_BASE=TRUE

XW306_E

SHORT-10L-0.1MM-SM

2 1

ROOM=PMU

XW307_E

SHORT-10L-0.1MM-SM

2 1

ROOM=PMU

XW308_E

SHORT-10L-0.1MM-SM

2 1

ROOM=PMU

PP_1V8_VIO_TX_E

11 12 13
17

PP_1V8_VIO_RX_E

11 12 13

PP_1V8_VIO_DRX_E

16

https://www.facebook.com/

A

8

Professional.Repairphone

A

1

C1114_E

47PF

5%
16V

2

CERM
01005

67

35 4

PAGE TITLE

PMIC: BUCKS & LDOS

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

2

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

3 OF 24

SHEET

15 OF 41

1

SIZE

D

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678

3 245

1

D

C

RF PMIC: XTAL, CLOCKS AND MISCELLANEOUS

HW_REV_ID

<0.10V T500/DEV1

0.15V-0.25V

0.35V-0.45V

0.55V-0.65V

0.75V-0.85V

R407

NOSTUFF

422K
180K
105K

66.5K

0.95V-1.05V

1.15V-1.25V

1.35V-1.45V

1.55V-1.65V

1.75V-1.85V

PA_THERM2

0.00V-0.10V

0.15V-0.25V

0.35V-0.45V

0.55V-0.65V

0.75V-0.85V

0.95V-1.05V

1.15V-1.25V

28K

16.5K

7.87K
10K

R409

NOSTUFF

422K
180K
105K

66.5K

44.2K

28K

R408 MLB/RADIO_DEV

51.1K

51.1K

51.1K

51.1K

51.1K

51.1K44.2K

51.1K

51.1K

51.1K

NOSTUFF

R410

51.1K

51.1K

51.1K

51.1K

51.1K

51.1K

51.1K

PROTO1.5
PROTO2.5/DEV2
PROTO1/DEV3
PROTO2/DEV4
EVT
CARRIER/DEV5
DVT/DEV6
PVT/DEV7
PROTO3

PRODUCT TYPE
RADIO DEV
3RD TYPE
POR MLB (FF)
SPARE
SPARE
SPARE
SPARE

Y
1
2
3
4
5
6
7

NOTE XTAL SYMBOL MIRRORED

COMPARED TO PREVIOUS SCH

6 23

3

RADIO_PMIC

Y401_E

38.4MHZ-10PPM-7PF

1.6X1.2-SM

3
2

1
4

XO_OUT_D0_EN_E

PP_1V8_SMPS4_E

PP_1V8_LDO5_E

1

NOSTUFF

2

1

C401_E

1000PF

10%

6.3V

2

X5R-CERM
01005

RADIO_PMIC

SHORT-10L-0.1MM-SM

XTAL_38P4M_OUT_E
XTAL_38P4M_IN_E

R413_E

100K

1%
1/32W
MF
01005

RADIO_PMIC

XW401_E

ROOM=PMU

XO_THERM_E

XO_GND_E

2

1

3 4 5 8 11 12 13 15 16 18 23

28

BB_CLK_EN

VDD_XO_RF VREG_RF

5

XTAL_OUT

6

XTAL_IN

60 17

XO_THERM

48

GND_XOADC

18 16

GND_XO_CLK

PP_1V8_LDO5_E

U_PMIC_E

PDM9655

BGA

SYM 1 OF 6

CLKS

SLEEP_CLK
LN_BB_CLK

RF_CLK1
RF_CLK2
RF_CLK3

GND_RF_CLK

VREG_XO

GND_XO

SHORT-10L-0.1MM-SM

XW403_E

ROOM=PMU

35
30

49
39
50

715
8

2

1

NC

VREG_XO_PMIC_E

C402_E

1UF

10%

16V

CER-X6S

0402

RADIO_PMIC

GND_XO_XW_E

50_SLEEP_CLK_32K_E

50_MDM_19P2M_CLK_E

50_WTR_38P4M_CLK_R_E

BB_TO_NFC_CLK

VREG_RF_PMIC_E

1

2

2

XW404_E

1

BOARD_REV_ID_E

4

1

1

4

AP_TO_MANY_BSYNC

NFC_TO_BB_CLK_REQ

JAPAN_ROW_SEL_E

GND_RF_CLK_XW_E

SHORT-10L-0.1MM-SM

ROOM=PMU

6 23

6 23

4

1

C404_E

4.7UF

20%

6.3V

2

X5R-CERM1
402

RADIO_PMIC

NC

NC

50_WTR_38P4M_CLK_R_E

4

23 1

24

GPIO_01

57

GPIO_02

97

GPIO_03

36

GPIO_04

66

GPIO_05

89

GPIO_06

U_PMIC_E

PDM9655

BGA

SYM 3 OF 6

GPIO

R405_E

0.00

1/32W
01005

RADIO_PMIC

21

0%
MF

90

GND

68

GND

1

GND

11

GND

58

GND

59

GND

69

GND

79

GND

106

GND

GPIO_07
GPIO_08
GPIO_09
GPIO_10

OPT_1
OPT_2

50_WTR_38P4M_CLK_E

1

C407_E

47PF

5%

16V

2

CERM
01005

NOSTUFF

RADIO_PMIC

U_PMIC_E

PDM9655

BGA

SYM 2 OF 6

GND

77

NC

78

NC

55
56

87
88

BB_SIM1_REMOVAL_ALARM_E

NC

8 23

OPT_1_E
OPT_2_E

D

7 23

C

4

4

B

1.35V-1.45V

1.55V-1.65V

1.75V-1.85V

JPN_ROW_SEL

<0.10V

0.15V-0.25V

0.35V-0.45V

0.55V-0.65V

0.75V-0.85V

0.95V-1.05V

1.15V-1.25V

1.35V-1.45V

1.55V-1.65V

16.5K

7.87K
10K

R430

NOSTUFF

422K
180K

51.1K

51.1K

NOSTUFF

R431

51.1K

51.1K

51.1K

105K 51.1K

66.5K 4

51.1K

44.2K 51.1K
28K

16.5K

7.87K

51.1K

51.1K

51.1K

SPARE
SPARE
SPARE

MAV PLATFORM

MAV17.0
MAV17.1
MAV17.2
MAV17.3
MAV17.4
MAV17.5
MAV17.6 ROW
MAV17.7
MAV17.8

8
9
A

Y
0

2
3

5
6

8

118S0743 1 CRITICALRESISTOR 01005, 44.2K OHMS 1% JPNR430_E

SKU

ROW
JPN 1
ROW
JPN
ROW
JPN

JPN 7
ROW

1

TABLE_5_HEAD

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

CRITICAL118S0612 1 R430_E ROWRESISTOR 01005, 66.5K OHMS 1%

3 4 5 8 11 12 13 15 16 18 23

PP_1V8_LDO5_E

MLB

1

R409_E

180K

5%
1/32W
MF
01005

2

PRODUCT_TYPE_E

1

R410_E

51.1K

1%
1/32W
MF
01005

2

BOM OPTIONCRITICAL

TABLE_5_ITEM

TABLE_5_ITEM

3 4 5 8 11 12 13 15 16 18 23

4

R407_E

44.2K

1%
1/32W
MF
01005

2

1

R408_E

51.1K

1%
1/32W
MF
01005

2

PP_1V8_LDO5_E

EVT

BOARD_REV_ID_E

4

1

R430_E

66.5K

1%
1/32W
MF
01005

2

OMIT_TABLE

JAPAN_ROW_SEL_E

1

R431_E

51.1K

1%
1/32W
MF
01005

2

PMIC_PA_THERM1_E

1

R422_E

10K

1%
1/32W
MF
01005

2

RADIO_BB

4

4

4

OPT_1_E
OPT_2_E

NOSTUFF

1

150

1%
1/32W
MF
01005

2

RADIO_PMIC

NOSTUFF

1

R411_ER412_E

150

1%
1/32W
MF
01005

2

RADIO_PMIC

4

B

A

1.75V-1.85V

22 1

6 23

10

10K

AP_TO_BB_RESET_L

PS_HOLD_E

QPOET_PMIC_ADC_E

NOSTUFF

RADIO_PMIC

NOSTUFF

RADIO_PMIC

RADIO_PMIC

R401_E

1.00K

1%

1/32W

MF

01005

R402_E

20.0K

5%

1/32W

MF

01005

R415_E

0.00

0%

1/32W

MF

01005

MAV17.9

SPMI_CLK_E

6 23

SPMI_DATA_E

6 23

4

23 4 1

21

23 22 1

21

21

IN

PMIC_CBLPWR_L_E
PMU_TO_BBPMU_RESET_L
PON_E

4

PS_HOLD_PMIC_E

23

PMIC_RESOUT_L_E

6 23

PMU_TO_BB_USB_VBUS_DETECT

PMIC_PA_THERM1_E

4

PRODUCT_TYPE_E

4

XO_THERM_2_E

4

PMIC_ECM_ADC_IN_E

9

JPN

45

SPMI_CLK

46

SPMI_DATA

47

KPD_PWR*

37

RESIN*

70

PON_1

71

PS_HOLD

67

PON_RST*

81

VBUS_DET

80

EXT_ECM

40

BAT_ID_THERM

61

PA_THERM1

62

PA_THERM2

51

PA_THERM3

U_PMIC_E

PDM9655

BGA

SYM 5 OF 6

MISC

VDD_MDM_IO

DVDD_BYP

AVDD_BYP

REF_BYP

GND_REF

VREF_LPDDR

VREF_MDM

VREF_WTR

91

27

38

26
25
82

92
83

PP_1V8_LDO6_E

REF_BYP_PMIC_E

RADIO_PMIC

GND_REF_XW_E

BB_VREF_LPDDR2_E

VREF_PX_BIAS_E

C403_E

0.1UF

CER-X5R

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

1

10%

6.3V

2

01005

VREF_DAC_E

3 5 6 7 8 10 22 23

DVDD_BYP_PMIC_E

AVDD_BYP_PMIC_E

XW402_E

SHORT-10L-0.1MM-SM

2 1

RADIO_PMIC

6

5

9

1

C405_E

0.47UF

10%

6.3V

2

CERM-X5R
0201

RADIO_PMIC

1

C406_E

0.1UF

10%

6.3V

2

CER-X5R
01005

NOSTUFF

1

C888_E

100PF

5%
16V

2

NP0-C0G
01005

PP_1V8_LDO5_E

1

R889_E

100K

2

RADIO_PMIC

1

1%
1/32W
MF
01005

NOSTUFF

XO_THERM_2_E

R888_E

100K-1%-0.001A

0402

2

3 4 5 8 11 12 13
15 16 18 23

4

R416_E

4

4

4

DVDD_BYP_PMIC_E

PON_E

PMIC_CBLPWR_L_E

0.00

1/32W
01005

RADIO_PMIC

R417_E

0.00

1/32W
01005

RADIO_PMIC

R418_E

0.00

1/32W
01005

RADIO_PMIC

0%
MF

0%
MF

0%
MF

21

NOSTUFF

21

21

NOSTUFF

PMU_TO_BBPMU_RESET_L

PMU_TO_BBPMU_RESET_L

23 4 1

IN

23 4 1

A

PAGE TITLE

PMIC: CLOCKS & CONTROL

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

4 OF 24

SHEET

16 OF 41

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

OPT CONFIG

678

3 245

1

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

D

C

B

A

BB:POWER

PP_1V2_LDO2_E

3 5 23

PP_1V8_LDO6_E

3 4 5 6 7 8 10 22 23

PP_UIM1_LDO11_E

3 22

PP_UIM2_LDO13_E

3

PP_1V8_LDO6_E

3 4 5 6 7 8 10 22 23

PP_0V9_LDO4_E

3 5 23

1

C501_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

1

C502_E C504_E

0.1UF 0.1UF

20%

6.3V

2

X5R-CERM
01005

1

20%

6.3V

2

X5R-CERM
01005

1

C503_E C505_E

1.0UF

10%

6.3V

2

X5R-CERM
0201-1

1

1.0UF

10%

6.3V

2

X5R-CERM
0201-1

1

C506_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

1

2

1

C508_E

0.22UF

10%

6.3V

2

CER-X5R
01005

C507_E

0.1UF

20%

6.3V
X5R-CERM
01005

PP_0V8_SMPS5_E

3 5 23

PP_0V8_LDO9_E

3 5 23

1

C510_E

0.22UF

10%

6.3V

2

CER-X5R
01005

1

C511_E

1.0UF

10%

6.3V

2

X5R-CERM
0201-1

1

C509_E C512_E C516_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

1

2

1

C514_E

0.22UF

10%

6.3V

2

CER-X5R
01005

0.1UF

20%

6.3V
X5R-CERM
01005

1

C513_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

1

C515_E

1.0UF

10%

6.3V

2

X5R-CERM
0201-1

1

2

0.1UF

20%

6.3V
X5R-CERM
01005

1

C517_E

1.0UF

10%

6.3V

2

X5R-CERM
0201-1

1

C518_E

1.0UF

10%

6.3V

2

X5R-CERM
0201-1

SDC1

1

C519_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

F15

F16
G14
H13

J12

J13
K13
K14

L14
N12
N13
P13
P14

R7
R10
R11
R14
R15

T7

T8

T15
T16

D19
E19

F5

F8

F9

F11
G11
G15

H5
H11
H12
H15
H16

J16
J17
J19

K5
K17

L10

VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE

VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM

B20

VDD_P1

B21

VDD_P1

F20

VDD_P1

F21

VDD_P1

K20

VDD_P1

K21

VDD_P1

M2

VDD_P1

N2

VDD_P1

N20

VDD_P1

N21

VDD_P1

AA15

AA17
AA12
AA10

AA19

NC
NC

VDD_P2

A3

VDD_P3

C10

VDD_P3

E2

VDD_P3

L1

VDD_P3

T2

VDD_P3

U21

VDD_P3

AA4

VDD_P3
VDD_P3

VDD_P4
VDD_P5

AA7

VDD_P7
VDD_P7

C16

VDD_USB_HS_0P9

B14

VDD_USB_SS_0P9

C13

VDD_USB_SS_0P9

B10

VDD_PCIE_0P9

C11

VDD_PCIE_0P9

U_MDM_E

MDM9655

BGA

SYM 7 OF 8

PWM1

VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM

VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM

U_MDM_E

MDM9655

BGA

SYM 8 OF 8

PWM2

F6
F7
G9
G10
H6
H7
H8
J8
J9
K6
K9
K10
L7
M6
M7
M8
N8
N9
P9
P10

L11
L15
M5
M11
M12
M15
M16
M19
N16
N17
P6
R17
T6
T12
T17
U12
U15
U17

VDD_USB_HS_1P8
VDD_USB_SS_1P8

VDD_PCIE_1P8

VDD_USB_HS_3P1

VDD_DDR_CORE_1P8
VDD_DDR_CORE_1P8
VDD_DDR_CORE_1P8
VDD_DDR_CORE_1P8

VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2

VREF_SDC

VREF_UIM

VDD_QLINK_CLK_0P9

VDD_QLINK_IO_0P9

VDD_PLL

VDD_QFPROM_PRG

VDD_ALWAYS_ON

138S0831 TYPICAL_CAP3 TYPICAL,2.2UF,0201,MURATA C520_E,C521_E,C522_E

PP_0V8_SMPS5_E

3 5 23

PP_0V8_LDO9_E

3 5 23

1

C520_E

2.2UF

20%

6.3V

2

X5R-CERM
0201

OMIT_TABLE

1

C527_E

0.22UF

10%

6.3V

2

CER-X5R
01005

E16
C15

NC

E12
B17
A20

E1
H21
T1

C20
G1
J20
M21
N1
P1

U16
W11

B7
C8

F12
F17
T11

1

2

LAYOUT: C530_RF CLOSE TO MDM_RF PIN B7

1

C521_E

2.2UF

20%

6.3V

2

X5R-CERM
0201

1.0UF

21

10%

6.3V

1.0UF

10%

6.3V
X5R-CERM
0201-1

PP_0V8_SMPS1_E

PP_0V8_LDO9_E

1

2

X5R-CERM

C525_E C531_E C537_E

0.22UF

10%

6.3V
CER-X5R
01005

C540_E

0201-1

1

C524_EC530_E C536_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

3 5 23

3 5 23

1

0.22UF

10%

6.3V

2

CER-X5R
01005

OMIT_TABLE

1

C522_E

2.2UF

20%

6.3V

2

X5R-CERM
0201

1

C526_E C532_E

0.22UF

10%

6.3V

2

CER-X5R
01005

1

0.22UF

10%

6.3V

2

CER-X5R
01005

OMIT_TABLE

1

C523_E

0.22UF

10%

6.3V

2

CER-X5R
01005

1

C529_E

0.22UF

10%

6.3V

2

CER-X5R
01005

1

2

1

2

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

C533_E

0.22UF

10%

6.3V
CER-X5R
01005

1

C535_E

1.0UF

10%

6.3V

2

X5R-CERM
0201-1

C556_E

1.0UF

10%

6.3V
X5R-CERM
0201-1

1

2

1

C538_E

2

0.22UF

10%

6.3V
CER-X5R
01005

0.22UF

10%

6.3V
CER-X5R
01005

1

C539_E

0.22UF

10%

6.3V

2

CER-X5R
01005

PP_1V8_LDO5_E

PP_3V0_LDO10_E

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

1

1.0UF

10%

6.3V

2

X5R-CERM
0201-1

1

C542_E C545_E C548_E C551_E

0.22UF

10%

6.3V

2

CER-X5R
01005

1

C543_E

0.22UF

10%

6.3V

2

CER-X5R
01005

1

C544_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

3 4 5 8 11 12 13 15 16 18 23

3

PP_1V8_LDO6_E

1

C534_EC528_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

PP_1V2_LDO2_E

VREF_PX_BIAS_E

PP_0V9_LDO4_E
PP_0V9_LDO4_E

PP_1V8_LDO5_E

PP_1V8_LDO5_E

PP_VDD_AON_E

1

C541_E

1.0UF

10%

6.3V

2

X5R-CERM
0201

NOSTUFF

BOM OPTIONCRITICAL

SOFT_CAP3138S00159 SOFT-TERM,2.2UF,0201,KYOCERA C520_E,C521_E,C522_E

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

1

C546_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

1

C547_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

1

2

3 4 5 6 7 8 10 22 23

3 5 23

4

3 5 23

3 5 23

3 4 5 8 11 12 13 15 16 18 23

3 4 5 8 11 12 13 15 16 18 23

P501_E

P2MM-NSM

SM

1

PP

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

C549_E C552_E C555_E

0.1UF

20%

6.3V
X5R-CERM
01005

1

C550_E C553_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

1

C554_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

PP_0V8_SMPS1_E

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

3 5 23

U_MDM_E

MDM9655

A1
A4

A7
A12
A16
A18
A19
A21
B16
B18
B19

C7

C9

C12
C14
C18
C19
C21

D1

D4
E10
E15
E20
E21

F1
F10
F13
F14
F19

G5
G6
G7

G8
G12
G13
G16
G17
G19
G20
G21

H9
H10
H14
H20

J5
J6

J7
J10
J11
J14
J15
J21

K1
K7

K8
K11
K12
K15
K16

L5
L6
L8

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

PAGE TITLE

BGA

SYM 4 OF 8

GND

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND

L9
L12
L13
L16
L17
L19
L20
L21
M1
M9
M10
M13
M14
M17
M20
N6
N7
N10
N11
N14
N15
N19
P7
P8
P11
P12
P15
P16
P17
P21
R1
R5
R6
R8
R9
R12
R13
R16
T5
T9
T10
T13
T14
U1
V21
AA1
AA5
AA8
AA9
AA11
AA14
AA18

AA20
AA21

BB: POWER

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

5 OF 24

SHEET

17 OF 41

D

C

B

A

SIZE

D

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

678

BB:CONTROL & HS PERIPHERALS

3 245

1

D

C

1 22

1 22

1

R601_E

100

1%
1/32W
MF
01005

2

RADIO_BB

90_USB_BB_DATA_P
90_USB_BB_DATA_N

SS_CAL_RES_E
BB_USB_HS_TXRTUNE_E

1

R602_E

4.02K

1%
1/32W
MF
01005

2

RADIO_BB

NC
NC

NC
NC

NC

E17

USB_HS_DP

C17

USB_HS_DM

B13

USB_SS_TX_P

A13

USB_SS_TX_M

A15

USB_SS_RX_P

B15

USB_SS_RX_M

B12

NC

A14

USB_SS_REXT

A17

USB_HS_REXT

U_MDM_E

MDM9655

BGA

SYM 1 OF 8

USB_PCIE

RADIO_BB

PCIE_REFCLK_P

PCIE_REFCLK_M

PCIE_TX_P

PCIE_TX_M
PCIE_RX_P

PCIE_RX_M

PCIE_REXT

E13

90_PCIE_AP_TO_BB_REFCLK_P

E14

90_PCIE_AP_TO_BB_REFCLK_N

A11

90_PCIE_BB_TO_AP_RXD_P

B11

90_PCIE_BB_TO_AP_RXD_N

A9
B9

A10

90_PCIE_AP_TO_BB_TXD_P
90_PCIE_AP_TO_BB_TXD_N

PCIE_CAL_RES_E

1

R603_E

100

1%
1/32W
MF
01005

2

RADIO_BB

IN
IN

OUT
OUT

IN
IN

D

U_MDM_E

MDM9655

BGA

SYM 6 OF 8

BB_VREF_LPDDR2_E

4

1

C603_E

23 1

23 1

23 1

23 1

23 1

23 1

0.1UF

20%
4V

2

X5R
01005

RADIO_BB

N5 H19

VREF_LPDDR2

K19

VREF_DQ0

H17

VREF_DQ1

MEMORY

VREF_DQ_BDM

BDM_ZQ

EBI1_CAL

D2
P5

BB_BDM_ZQ_E

BB_EBI1_CAL_E

1

R604_E

240

1%
1/32W
MF
01005

2

RADIO_BB

1

R605_E

240

1%
1/32W
MF
01005

2

RADIO_BB

C

B

P601_E

P2MM-NSM

SM

1

PP

50_SLEEP_CLK_32K_E

4 23

XO_OUT_D0_EN_E

4 23

50_MDM_19P2M_CLK_E

4 23

BB_JTAG_RST_L_E

22

PMIC_RESOUT_L_E

4 23

BB_JTAG_TCK_E

6 22

BB_JTAG_TRST_L_E
BB_JTAG_TMS_E

6 22

NC
NC

NC
NC

Y2

L2

E11
V20

P3
R2

R3

U13

W14

Y12
U14

W13

SLEEP_CLK

CXO
SRST*

RESIN*
MODE_0

MODE_1
TCK

TRST*
TMS
TDI
TDO

U_MDM_E

MDM9655

BGA

SYM 3 OF 8

CONTORL

RESOUT*

PS_HOLDCXO_EN

SDC1_CLK

SDC1_CMD
SDC1_DATA_0
SDC1_DATA_1
SDC1_DATA_2
SDC1_DATA_3

SPMI_CLK

SPMI_DATA

N3
M3

Y16
Y14
W15
Y15
AA16
W16

Y13
AA13

NC

NC
NC
NC
NC
NC
NC

SPMI_DATA_E

PS_HOLD_E

SPMI_CLK_E

4 23

4 23

4 23

3 4 5 7 8 10 22 23

SWD_AOP_TO_MANY_SWCLK

1 23

SWD_AOP_BI_BB_SWDIO

1 23

PP_1V8_LDO6_E

2

NC

U2_E

74AUP1G34GX

5

SOT1226

4

NC

3

1

NOSTUFF

R606_E

0.00

1/32W
01005

RADIO_PMIC

R607_E

0.00

1/32W
01005

RADIO_PMIC

21

0%
MF

21

0%
MF

NOTE: NO STUFF BUFFER FOR EUREKA CONFIG

BB_JTAG_TCK_E

BB_JTAG_TMS_E

6 22

6 22

B

A

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

A

PAGE TITLE

BB: CONTROL & HS PERIPHERALS

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

6 OF 24

SHEET

18 OF 41

1

SIZE

D

D

C

BB:GPIOS & QLINK

Y10

U20

U10

Y1
W3
W2
W1

Y8

U5
W8

U8
W5

U6

Y5
W4

U9

U7

Y6

AA6

Y9

Y7
W7
W9

T20
T21

K3

J2
H1
H2
F2
E3
D3
C3
C2
C1
B1
B2
F3

G2

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39

I2C MOVE PER EUREKA

23 1

23 1

23 1

23 1

23 1

OUT

IN

23 1

IN
OUT

23 1

OUT

UART_BB_TO_AOP_RXD
UART_AOP_TO_BB_TXD
BB_EEPROM_I2C_SDA_E

7 23

BB_EEPROM_I2C_SCL_E

7 23

I2S_BB_TO_AP_LRCLK
I2S_AP_TO_BB_DOUT
I2S_BB_TO_AP_DIN

I2S_BB_TO_AP_BCLK

FAST_BOOT_SELECT0_E

7 23

75_RFFE6_SCLK_E

7

75_RFFE6_SDATA_E

7

WMSS_RESET_L_E

8 23

BB_TO_STROBE_DRIVER_GSM_BURST_IND

NC
NC
NC
NC
NC
NC
NC
NC

NC
NC
NC
NC
NC
NC
NC
NC

NC

NC
NC
NC
NC
NC
NC
NC

NC
NC
NC

W10

U_MDM_E

MDM9655

BGA

SYM 5 OF 8

GPIO

RADIO_BB

GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56
GPIO_57
GPIO_58
GPIO_59
GPIO_60
GPIO_61
GPIO_62
GPIO_63
GPIO_64
GPIO_65
GPIO_66
GPIO_67
GPIO_68
GPIO_69
GPIO_70
GPIO_71
GPIO_72
GPIO_73
GPIO_74
GPIO_75
GPIO_76
GPIO_77
GPIO_78
GPIO_79

678

A2
A8
B8
B3
V3
V1
V2
U3
U2
T3
Y18
W18
G3
W19
Y21
P20
W21
R20
Y20
R19
W6
Y3
P19
V19
W17
Y17
W20
R21
H3
U19
Y19
Y4
J3
J1
L3
K2
W12
T19
U11
Y11

NC

NC

NC

PER RFSW. MOVED TO PIN50

NC

MPM

NC
NC

NC
NC

NC

NC

NC
NC

BB_TO_AP_RESET_DETECT_L
AP_TO_BB_COREDUMP

PCIE_AP_TO_BB_DEV_WAKE

BB_GNSS_LNA_EN_E

QLINK_REQ_W0_E

QLINK_EN_W0_E

75_RFFE3_SDATA_E

75_RFFE3_SCLK_E

75_RFFE4_SDATA_E

75_RFFE4_SCLK_E

75_RFFE5_SDATA_E

75_RFFE5_SCLK_E

AP_TO_BB_TIME_MARK
UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX

AP_TO_BB_IPC_GPIO1

BB_TO_PMU_PCIE_HOST_WAKE_L

PCIE_BB_BI_AP_CLKREQ_L

FAST_BOOT_SELECT1_E

BB_SIM1_REMOVAL_ALARM_E

75_RFFE2_SDATA_E

75_RFFE2_SCLK_E

75_RFFE1_SDATA_E

75_RFFE1_SCLK_E

BB_SIM1_DATA_E

BB_SIM1_DETECT_E

BB_SIM1_RST_E
BB_SIM1_CLK_E

OUT

8 23

8 23

7

7

7

7

7

7

IN

23 22 1

23 22 1

OUT

IN

BI

1 7 23

BI

7 23

BI

7

7

7

7

BI

IN
OUT
OUT

23 18

23 1

23 1

23 1

23 1

PER EUREKA

23 7 1

23 4

23 22

22

23 22

23 22

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

PCIE_AP_TO_BB_RESET_L

RADIO_BB

1

C702_E

100PF

5%
16V

2

NP0-C0G
01005

NOSTUFF

3 245

1

D

U_MDM_E

MDM9655

BGA

SYM 2 OF 8

ANALOG_RF

23 8

IN

23 8

IN

23 8

IN

23 8

IN

23 8

IN

23 8

IN

23 8

IN

23 8

IN

23 8

OUT

23 8

OUT

23 1

IN

QLINK_CLK_P_E

QLINK_CLK_N_E
QLINK_DL0_P_E
QLINK_DL0_N_E

QLINK_DL1_P_E
QLINK_DL1_N_E
QLINK_DL2_P_E
QLINK_DL2_N_E
QLINK_UL0_P_E

QLINK_UL0_N_E

E9

QLINK_CLK_P

E8

QLINK_CLK_M

A5

QLINK_DL0_P

B5

QLINK_DL0_M

C6

QLINK_DL1_P

C5

QLINK_DL1_M

B6

QLINK_DL2_P

A6

QLINK_DL2_M

E6

QLINK_UL0_P

E7

QLINK_UL0_M

NC
NC

NC
NC

NC
NC
NC

B4
C4

D20
D21

P2
AA2
AA3

NC
NC

NC
NC

NC
NC
NC

C

BB EEPROM

BB_EEPROM_I2C_SCL_E

7 23

1

R701_E

10K

1%
1/32W
MF
01005

2

RADIO_BB

1

C701_E

1UF

20%
10V

2

X5R
0201

RADIO_BB

VCC

U_EEPROM_E

CAT24C08C4A

WLCSP

RADIO_BB

PP_1V8_LDO6_E

1

R702_E

10K

1%
1/32W
MF
01005

2

RADIO_BB

B2B1

SDASCL

BB_EEPROM_I2C_SDA_E

3 4 5 6 7 8 10 22 23

7 23

B

75_RFFE1_SCLK_E

7

VSS

PP_1V8_LDO6_E

3 4 5 6 7 8 10 22 23

PP_1V8_LDO6_E

3 4 5 6 7 8 10 22 23

A2 A1

NOSTUFF

1

R714_E R715_E

10K

1%
1/32W
MF
01005

2

RADIO_BB

7 23

FAST_BOOT_SELECT0_E

FAST_BOOT_SELECT1_E

7 23

DEFAULT CONFIG EUREKA CONFIG

1

10K

1%
1/32W
MF
01005

2

RADIO_BB

24 23 21 1

PCIE_BB_BI_AP_CLKREQ_L

1 7 23

IN

3 4 5 6 7 8 10 22 23

PP_1V8_LDO6_E

PP1V8_S2

NOSTUFF

1

R700_E

100K

5%
1/32W
MF
01005

2

ROOM=SOC

1

R703_E

100K

5%
1/32W
MF
01005

2

ROOM=SOC

RFFE MAP

B

RFFE1 - WTR, LATGPO, LATUNE

MAKE_BASE=TRUE

OUT

24 23

RFFE2 - HB DSM, LB DSM

75_RFFE1_SCLK_E

MAKE_BASE=TRUE

OUT

24 23 8

75_RFFE4_SCLK_E

7

75_RFFE4_SCLK_E

RFFE3 - UHB, HB, LB PAD LNA

A

75_RFFE1_SDATA_E

7

75_RFFE2_SCLK_E

7

75_RFFE2_SDATA_E

7

75_RFFE3_SCLK_E

7

75_RFFE3_SDATA_E

7

75_RFFE1_SDATA_E

75_RFFE2_SCLK_E

75_RFFE2_SDATA_E

MAKE_BASE=TRUE

75_RFFE3_SCLK_E

MAKE_BASE=TRUE

75_RFFE3_SDATA_E

MAKE_BASE=TRUE

BI

24 23 8

MAKE_BASE=TRUE

OUT

23 16 15

MAKE_BASE=TRUE

BI

OUT

BI

23 16 15

MAKE_BASE=TRUE

75_RFFE4_SDATA_E

7

75_RFFE5_SCLK_E

7

75_RFFE5_SDATA_E

7

75_RFFE4_SDATA_E

MAKE_BASE=TRUE

75_RFFE5_SCLK_E

MAKE_BASE=TRUE

75_RFFE5_SDATA_E

BI

OUT

BI

24 23

PP_1V8_LDO6_E

3 4 5 6 7 8 10 22 23

1

R713_E

23 17

BB_TO_PMU_PCIE_HOST_WAKE_L

1 7 23

23 17

100K

5%
1/32W
MF
01005

2

ROOM=SOC

RFFE4 - UATGPO, UATUNE
RFFE5 - CPL
RFFE6 - QET, 2G PA/UHB, HB, LA PAD

MAKE_BASE=TRUE

75_RFFE6_SCLK_E

23 13 12 11

7

75_RFFE6_SCLK_E

OUT

23 13 12 11 10

PAGE TITLE

A

BB: GPIOS & QLINK

DRAWING NUMBER

MAKE_BASE=TRUE

Apple Inc.

23 13 12 11

75_RFFE6_SDATA_E

7

75_RFFE6_SDATA_E

BI

23 13 12 11 10

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

7 OF 24

SHEET

19 OF 41

SIZE

D

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

678

TRANSCEIVER: QLINK & POWER

3 245

1

D

18

4 23

50_WTR_38P4M_CLK_E

50_GNSS_WTR_IN_E

NC
NC
NC
NC

50

252
229
241
230

20

XO_IN

DNC
DNC
DNC
DNC

GNSS_IN

U_WTR_E

WTR5975

CSP

SYM 1 OF 5

VDD_1P0_DIG
VDD_1P0_DIG
VDD_1P0_DIG

VDD_1P8_DIG

QLINK_CLK-

QLINK_CLK+

3 8 23

DNC

DNC

187
110
232

PP_1V0_LDO8_E

113

NC

155

253

NC

153
175

PP_1V0_LDO8_E

1

C801_E

0.1UF

10%

6.3V

2

CER-X5R
01005

23

PP_1V8_LDO6_E

3 4 5 6
7 10 22

QLINK_CLK_N_E
QLINK_CLK_P_E

1

C803_E

0.1UF

10%

6.3V

2

CER-X5R
01005

1

2

7 23

7 23

3 8 23

C802_E

0.1UF

10%

6.3V
CER-X5R
01005

D

PLACE C827 AT
CENTER OF STAR
ROUTING

C

B

ETDAC_QPOET1_N_E

10

ETDAC_QPOET1_P_E

10

75_RFFE1_SCLK_E

7 23 24

75_RFFE1_SDATA_E

7 23 24

R800_E

0.00

1/32W
01005

21

0%
MF

7 23

7 23

7 23

R801_E

0.00

0%

1/32W

MF

01005

WMSS_RESET_L_E

QLINK_REQ_W0_E

QLINK_EN_W0_E

75_RFFE_WTR_SCLK_E

21

75_RFFE_WTR_SDATA_E

NC

NC
NC

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

NC

19

DNC

87

ETDAC_CH0-

75

ETDAC_CH0+

246

ETDAC_CH1-

234

ETDAC_CH1+

101

DNC

112

DNC

222

WMSS_RESET*

210

QLINK_REQ

197

QLINK_EN

123

W_GRFC_0

166

W_GRFC_1

177

W_GRFC_2

198

W_GRFC_3

188

W_GRFC_4

167

W_GRFC_5

199

W_GRFC_6

200

W_GRFC_7

211

W_GRFC_8

212

W_GRFC_9

135

DNC

QLINK_UL0-

QLINK_UL0+

QLINK_DL0-

QLINK_DL0+

QLINK_DL1-

QLINK_DL1+

QLINK_DL2-

QLINK_DL2+

GND
GND
GND
GND
GND

GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

164
144

165
186
196
219
231
209

247
57
5
7
207

11
10
22
34

114

99
100
111
122
134
145
154
176
178
220
242
243
244

QLINK_UL0_N_E
QLINK_UL0_P_E

QLINK_DL0_N_E
QLINK_DL0_P_E
QLINK_DL1_N_E
QLINK_DL1_P_E
QLINK_DL2_N_E
QLINK_DL2_P_E

PP_1V0_LDO3_E

3 8 23

7 23

7 23

7 23

7 23

7 23

7 23

7 23

7 23

PP_1V0_LDO3_E

3 8 23

R806_E

0.00

0%

1/32W

MF

01005

PP_1V0_LDO8_E

3 8 23

21

1

C810_E

0.1UF

10%

6.3V

2

CER-X5R
01005

1

C805_E

0.1UF

10%

6.3V

2

CER-X5R
01005

R810_E

0.00

0%

1/32W

MF

01005

21

1

2

1

C811_E

0.1UF

10%

6.3V

2

CER-X5R
01005

R808_E

0.00

0%

1/32W

MF

01005

WTR_VDD_1P0_RX0_E

C824_E

0.1UF

10%

6.3V
CER-X5R
01005

NOSTUFF

1

2

PP_1V0_LDO3_E

1

C804_E

4.7UF

20%

6.3V

2

X5R-CERM1
402

PP_1V0_LDO3_E

3 8 23

1

C808_E

0.1UF

10%

6.3V

2

CER-X5R
01005

21

PP_1V0_LDO8_FILT_E

VOLTAGE=1.0V

1

C809_E

0.1UF

10%

6.3V

2

CER-X5R
01005

C816_E

0.1UF

10%

6.3V
CER-X5R
01005

PP_1V0_LDO3_E

3 8 23

1

0.1UF

10%

6.3V

2

CER-X5R
01005

3 8 23

23

PP_1V0_LDO3_E

3 8

PP_1V0_LDO3_E

3 8 23

PP_1V0_LDO3_FILT_E

VOLTAGE=1.0V

3 8 12 23

PP_1V2_LDO1_E

PP_1V2_LDO1_E

3 8 12 23

PP_1V2_LDO1_E

3 8 12 23

PP_1V2_LDO1_E

3 8 12 23

PP_1V2_LDO1_E

3 8 12 23

PP_1V8_LDO5_E

1

C827_E

4.7UF

20%

6.3V

2

X5R-CERM1
402

NC

49

VDD_1P0_XO

31

VDD_1P0_GNSS

208

VDD_1P0_QLINK

184

VDD_1P0_RX0

56

VDD_1P0_RX1

130

VDD_1P0_RX2

41

DNC

121

VDD_1P0_RX

179

VDD_1P2_ANA3

125

VDD_1P2_ANA4

162

VDD_1P2_RX0

18

VDD_1P2_ANA1

44

VDD_1P2_RX1

192

VDD_1P2_ANA2

3 4 5 8 11 12
13 15 16 18 23

U_WTR_E

WTR5975

CSP

SYM 2 OF 5

PP_1V2_LDO1_E

1

C807_E

4.7UF

20%

6.3V

2

X5R-CERM1
402

VDD_1P0_TX

VDD_1P2_ANA

VDD_1P2_STG

VDD_1P0_TX0

VDD_1P2_TX0

VDD_1P8_TX0

VDD_1P8_ANA0

DNC

3 8 12 23

1

77

2

146

PP_1V2_LDO1_E

3 8
12 23

1

69
117

37

58

2

67

NC

PP_1V8_LDO5_E

C820_EC821_E

2

SHARE WITH PIN 233

C819_E

0.1UF

10%

6.3V
CER-X5R
01005

0.1UF

10%

6.3V
CER-X5R
01005

NOSTUFF

1

C823_E

0.1UF

10%

6.3V

2

CER-X5R
01005

3 4 5 8 11 12 13 15 16
18 23

PP_1V0_LDO3_E

PP_1V2_LDO1_E

PP_1V0_LDO3_E

3 8 23

PP_1V2_LDO1_E

3 8 12 23

PP_1V8_LDO5_E

1

C825_E

0.1UF

10%

6.3V

2

CER-X5R
01005

3 8 23

3 8 12 23

23
16
13
11
3 4
5 8
12
15

1

18

C812_E

0.1UF

2

NOSTUFF

10%

6.3V
CER-X5R
01005

1

C806_E

0.1UF

10%

6.3V

2

CER-X5R
01005

C

B

A

1

C826_E

0.1UF

10%

6.3V

2

CER-X5R

R807_E

3 4 5 8 11 12 13 15 16 18 23

PP_1V8_LDO5_E

0.00

0%

1/32W

MF

01005

PP_1V8_LDO5_FILT_E

21

VOLTAGE=1.8V

1

2

C815_E

0.1UF

10%

6.3V
CER-X5R
01005

01005

3 4 5 8 11 12 13 15 16 18 23

SHARE WITH PIN 233

1

C814_E

0.1UF

10%

6.3V

2

CER-X5R
01005

PP_1V8_LDO5_E

150

NC
NC
NC

DNC

93

DNC

51

DNC

91

VDD_1P8_FBRX

137 233

VDD_1P8_ANA2

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

VDD_1P0_TX1

DNC

VDD_1P8_TX1

VDD_1P8_ANA1

218

215

NC

251

PP_1V8_LDO5_E

PP_1V8_LDO5_E

PP_1V0_LDO3_E

1

C822_E

0.1UF

10%

6.3V

2

CER-X5R
01005

1

C818_E

0.1UF

10%

6.3V

2

CER-X5R
01005

PAGE TITLE

18 23
13 15
3 4
5 8 11 12
16

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

1

C817_E

0.1UF

10%

6.3V

2

CER-X5R
01005

NOSTUFF

XCVR

3 8 23

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

8 OF 24

SHEET

20 OF 41

A

SIZE

D

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

67

35 4

2

1

678

3 245

1

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

D

C

B

A

TRANSCEIVER: TX & RX

U_WTR_E

WTR5975

CSP

45
46
47
26

36
25

13
14

203
205
206
204

228
217

239
240

78
68

48
59

221

245

201

183

171
237

170

124
126
136
138
147
148
149
156
168
169
189
213

39

76
88

82
80

94

40

90

89

GND
GND
GND
GND

GND
GND

GND
GND

GND
GND
GND
GND

GND
GND

GND
GND

GND
GND

GND
GND

GND

GND

GND
GND
GND

GND
GND
GND

GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

SYM 3 OF 5

U_WTR_E

WTR5975

CSP

SYM 5 OF 5

DNC
DNC

TX_CH0_HB1
TX_CH0_HB2

TX_CH0_MB1
TX_CH0_MB2

DNC

TX_CH0_LB2

TX_CH0_LMB

VREF_DAC

DNC

TX_CH1_HB1

TX_CH1_MB

TX_CH1_UHB

DNC

TX_CH1_LMB1

TX_CH1_MB2

TX_CH1_LTEU

GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND

12
1

23
35

3
15

24
16
4

235
223

226

225
238

227
250
249
216

8
185
42
30

86
55
73
97
54
72
96
152
142
120
141
119
133
151

70
60
61

NC
NC
NC
NC

NC
NC

NC

NC

NC

NC

NC

NC

50_TX_HB_WTR_E

50_TX_MB_WTR_E

50_TX_LB_WTR_E

50_TX_MLB_2G_WTR_E

VREF_DAC_E

50_TX_UHB_WTR_E

11

13

4

12

12

13

50_CPL2_CPLOUT_E

17

50_PRX_LB2_WTR_IN_E

11

50_PRX_UHB1_PAD_UHB_A_WTR_IN_E

13

50_PRX_MB2_PAD_MB_B_WTR_IN_E

12

50_PRX_MB1_PAD_MB_A_WTR_IN_E

12

50_PRX_HB1_PAD_LHB_WTR_IN_E

12

50_PRX_HB2_PAD_HB_A_WTR_IN_E

12

R901_E

49.9

1%

1/32W

MF

01005

9

9

9

21

50_FBRX_TERM_E

50_DRX_LHB_WTR_IN_E

50_DRX_MB_B_WTR_IN_E

50_DRX_HB_WTR_IN_E

U_WTR_E

WTR5975

CSP

SYM 4 OF 5

92

TX_FBRX-

115

TX_FBRX+

103

GND132

66

PRX_LB

74

PRX_UHB_LTEU_A

132

PRX_MB_B

163

NC NC

PRX_UHB_LTEU_B

64

PRX_MB_A

131

PRX_LHB

84

PRX_HB

102

GND

104

GND

127

GND

79

GND

214

GND

248

GND

29

GND

38

GND

172

GND

182

GND

181

GND

190

GND

106

GND

81

GND

139

GND

DRX_UHB_LTEU_A

DRX_UHB_LTEU_B

DRX_LB

DRX_MB_B

DRX_MB_A

DRX_LHB

DRX_HB

GND
GND
GND
GND

GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

R918_E

0.00

1/32W
01005

OMIT_TABLE
JPN = STUFF

0%

MF

21

1

R922_E

0.00

1/32W

0%

01005

MF

2

OMIT_TABLE
ROW = STUFF

R920_E

R919_E

0.00

1/32W
01005

OMIT_TABLE
ROW = STUFF

21

0%

MF

0.00

1/32W
01005

OMIT_TABLE
JPN = STUFF

21

0%

MF

6

DNC
DNC
DNC
DNC
DNC
DNC
DNC
DNC
DNC
DNC
DNC
DNC

NC

17

NC

27

NC

28

NC

202

NC

191

NC

236

NC

224

NC

105

NC

116

NC

180

NC

157

NC

109
98

50_DRX_HB_OUT2_UHB_LTEU_A_WTR_IN_E

108
143
65

NC

107
85

174
43
118
160

53
95
83

195
194
161
193
173
33
32
9
21
159
129
128
140
158
63
52
71
62

50_PRX_MLB1_DRX_MB_LHB_WTR_IN_E

50_DRX_LB_WTR_IN_E

50_DRX_MB_B_WTR_IN_E

50_DRX_LHB_WTR_IN_E
50_DRX_HB_WTR_IN_E

50_DRX_HB_OUT1_MBHB_WTR_IN_E

STRIPLINE

13

18

16

9

9

9

16

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

R919_E117S0161 CRITICAL1 ROW01005 0R

R922_E117S0161 ROW1 CRITICAL01005 0R

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

01005 0R JPNR918_E CRITICAL1117S0161

01005 0R JPNR920_E117S0161 1 CRITICAL

PAGE TITLE

XCVR

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

BOM OPTIONCRITICAL

BOM OPTIONCRITICAL

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

9 OF 24

SHEET

21 OF 41

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

D

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

C

B

A

SIZE

D

8

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67

35 4

2

1

QET:MODULE

678

3 245

1

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

D

7 11 12 13 23

7 11 12 13 23

75_RFFE6_SCLK_E

75_RFFE6_SDATA_E

NOSTUFF

C1002_E

1000PF

10%
16V
X7R

0201

1

2

22 3 1

22 3 1

PP_VDD_MAIN
PP_VDD_BOOST

MAKE_BASE=TRUE

MAKE_BASE=TRUE

VDD_AMP_E

PP_VDD_MAIN

PP_VDD_BOOST

PP_VDD_MAIN

PP_1V8_LDO6_E

1

C1000_E

6800PF

10%

6.3V

2

X5R
01005

10

11 12 13 17

10

3 4 5 6 7 8 22 23

D

C

10

PP_VDD_MAIN

ETDAC_QPOET1_P_E

8

ETDAC_QPOET1_N_E

8

GND PP_QET_PA_E

MAKE_BASE=TRUE

C3

SDATA

B2

SCLK

D4

VBAT

VDD_1P8

VBAT_SW

VDD_AMP

D7

B7

D2

U_QET_E

45YEWE046646HB

B3

VIN_BOB

C5

DAC+

B5

DAC-

B8

USID_LSB VCC_PA_ET0

LGA

SYM 1 OF 2

VCC_PA_ET1

ECM_OUT

B6

C8
D8

NOSTUFF

1

C1001_E

10UF

20%
10V

2

X5R-CERM
0402-7

QPOET_PMIC_ADC_E

C

U_QET_E

4

A1

A2

A3

A4

A5

A6

A7

A8

A9

B1

B4

B9

C1

C2

C4

C7

VOLTAGE=4.0V

11 12 13

45YEWE046646HB

LGA

SYM 2 OF 2

C9
D6
D3
D1
E1
D9
E2

GNDGND

E4
E3
E7
E6
E5
E8
E9

B

VCC_PA_GSM0
VCC_PA_GSM1

Q_VDD_APT_E

C6
D5

B

A

https://www.facebook.com/
Professional.Repairphone

8

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A

PAGE TITLE

QPOET MODULE

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

10 OF 24

SHEET

22 OF 41

1

SIZE

D

LB PAD

678

3 245

1

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

TABLE_5_HEAD

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

155S00316 1 2G CPLB JPN CPL2GB_E CRITICAL JPN

BOM OPTIONCRITICAL

TABLE_5_ITEM

D

C

B

A

A1
A2
A3
A5
A4
A6
A7
A8

A9
A10
A11
A12
A13
A14
A15
A16

B1
B16

C1

C16

D1

D16

E1
E16

F1

F16

G1

G16

H1

H16

J1
J2
J3
J4
J5
J6
J7
J8

J9
J10
J11
J12
J13
J14
J15
J16

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

PA_LB_E

SKY78140

LGA

SYM 2 OF 2

THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD

H3
H4
H5
H6
H7
H8
H9
H10
H11
H13
H14
B6
B7
B8
B9
B10
B11
B13
B14
B15
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
G12
G13
G14

3 12 13

7 12 13 23

7 12 13 23

PP_1V8_VIO_RX_E

75_RFFE3_SCLK_E

75_RFFE3_SDATA_E

10 12 13

PP_QET_PA_E

50_TX_LB_WTR_E

9

R1107_E

1.00

1/32W
01005

NOSTUFF

21

1%
MF

1

C1102_E

47PF

5%
16V

2

CERM
01005

NOSTUFF
RADIO_LB_PAD

LB_SNUBBER_E

1

C1115_E

470PF

10%
10V

2

X5R
01005

3 12 13 17

7 10 12 13 23

7 10 12 13 23

RADIO_LB_PAD

PP_1V8_VIO_TX_E

VOLTAGE=1.8V

75_RFFE6_SCLK_E

75_RFFE6_SDATA_E

R1101_E

0.00

1/32W
01005

21

0%
MF

10 12 13 17

50_TX_LB_PA_IN_E

1

C1103_E

47PF

5%
16V

2

CERM
01005

NOSTUFF
RADIO_LB_PAD

PP_VDD_BOOST

1

C1104_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

RADIO_LB_PAD

1

C1105_E

47PF

5%
16V

2

CERM
01005

NOSTUFF
RADIO_LB_PAD

1

C1109_E

47PF

5%
16V

2

CERM
01005

RADIO_LB_PAD

1

C1107_E

47PF

5%
16V

2

CERM
01005

NOSTUFF
RADIO_LB_PAD

B12

TX_LB_IN

1

C1110_E

47PF

5%
16V

2

CERM
01005

RADIO_LB_PAD

B4

B5

VIO_RX

SCLK_RX

SDATA_RX

H15

G15B3F15

VIO_TX

SCLK_TX

SDATA_TX

PA_LB_E

SKY78140

SYM 1 OF 2

LGA

1

R1103_E

0.00

0%
1/32W
MF
01005

2

RADIO_LB_PAD

VOLTAGE=4.0V

PP_VCC1_LB_PA_E

C15

D15

E15

VCC1

VCC2

VBATT

LB_2G_ANT

B2

VDD_LNA

LB_ANT

1

C1111_E

47PF

5%
16V

2

CERM
01005

NOSTUFF
RADIO_LB_PAD

1

C1112_E

47PF

5%
16V

2

CERM
01005

RADIO_LB_PAD

H12

50_LBPAD_2G_OUT_2GCPL2B_IN_E

50_CPL3_SENS_OUT_2GCPLB_IN_E

13

H2

50_PAD_ANT_LB_E

VOLTAGE=1.8V

1 2

4

R1104_E

0.00

1/32W

RADIO_LB_PAD

01005

21

0%
MF

CPL2GB_E

WIFI

LDJ0Q869M30CG015

LGA

MAIN_OUT IN

COUPLED_OUTTERMINATE

1

D

TABLE_5_HEAD

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

PP_1V8_LDO5_E

BOM OPTIONCRITICAL

3 4 5 8 12 13 15 16 18 23

C

50_2GCPLB_OUT_CPLR2_MUX_IN_JPN_E

3

50_2GCPL_SENS_OUT_CPL2_IN_E

13 17

17

B

50_PAD_ANT_LB_CPL2_IN_E

17

L1101_E

10NH-+/-3%-0.25A

01005

NOSTUFF

2

RADIO_LB_PAD

PP1100_E

P2MM-NSM

SM

PP

1

50_PRX_LB2_WTR_IN_E

9

D2

PRX_LB

A

PAGE TITLE

LB PAD

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

11 OF 24

SHEET

23 OF 41

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67

35 4

2

1

D

C

B

A

10 11 13

PP_1V8_VIO_TX_E

3 11 13 17

PP_1V8_VIO_RX_E

3 11
13

50_TX_MB_WTR_E

9

50_TX_HB_WTR_E

9

HB PAD

PP_QET_PA_E

R1207_E

1.00

1/32W
01005

C1201_E

1

10PF

2%
25V

2

C0G-CERM
01005

NOSTUFF

1

C1202_E

10PF

2%
25V

2

C0G-CERM
01005

NOSTUFF

NOSTUFF

21

1%
MF

HB_SNUBBER_E

1

C1211_E

470PF

10%
10V

2

X5R
01005

1

10PF

2%
25V

2

C0G-CERM
01005

NOSTUFF

1

C1215_E

10PF

2%
25V

2

C0G-CERM
01005

NOSTUFF

1

2

10 11 13 17

7 10 11 13 23

PP_VDD_BOOST

75_RFFE6_SCLK_E

7 10 11 13 23

75_RFFE6_SDATA_E

1

C1214_EC1213_E

10PF

2%
25V

2

C0G-CERM
01005

NOSTUFF

75_RFFE3_SCLK_E

7 11 13 23

75_RFFE3_SDATA_E

7 11 13 23

1

C1216_E

10PF

2%
25V

2

C0G-CERM
01005

NOSTUFF

R1201_E

0.00

1/32W
01005

0%
MF

21

1

NOSTUFF

L1200_E

10NH-+/-3%-0.25A

01005

2

RADIO_HB_PAD

C1200_E

27PF

21

5%

16V

NP0-C0G

01005

1

NOSTUFF

L1201_E

10NH-+/-3%-0.25A

01005

2

PP1200_E

P2MM-NSM

SM

1

50_PRX_MB1_PAD_MB_A_WTR_IN_E

PP

PP1201_E

P2MM-NSM

SM

PP

PP1202_E

P2MM-NSM

SM

PP

PP1203_E

P2MM-NSM

SM

PP

152S00026 0201 2G HB MATCH, 3.5NH 0.5A R1209_E CRITICAL1 JPN

9

1

1

1

50_PRX_MB2_PAD_MB_B_WTR_IN_E

9

50_PRX_HB1_PAD_LHB_WTR_IN_E

9

50_PRX_HB2_PAD_HB_A_WTR_IN_E

9

C1205_E

5.0PF

+/-0.1PF
16V
NP0-C0G
01005

RADIO_HB_PAD

50_TX_MB_IN_E

50_TX_HB_PA_IN_E

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

678

RADIO_HB_PAD

R1203_E

0.00

1/32W
01005

12

TX_MB_IN

14 8

TX_HB_IN

36

PRX_MB1

38

PRX_MB2

32

PRX_HB1

34

PRX_HB2

C1212_E131S0246 JPN1 CRITICAL01005 2G HB MATCH, 1.5PF

21

0%
MF

1

C1206_E C1208_E

1UF

20%
16V

2

CER-X5R
0201

RADIO_HB_PAD

29

SCLK_RX

SDATA_RX

PP_VCC1_HB_PA_E

VOLTAGE=4.0V

28

253024

VIO_RX

SCLK_TX

SDATA_TX

23

VIO_TX

20

VCC1

VBATT

171841

VCC2

40

VDD_LNA

VBIAS_LNA

PA_HB_E

HB-PAD-AFEM-8072

LGA

SYM 1 OF 3

TX_2GHB_OUT

BOM OPTIONCRITICAL

CRITICAL1 JPNR1200_E152S2045 0201 2G HB MATCH, 3.0NH 0.6A

BOM OPTIONCRITICAL

50_HBPAD_2G_OUT_E

ANT

VOLTAGE=1.8V

1

C1207_E

1000PF

10%

6.3V

2

X5R-CERM
01005

RADIO_HB_PAD

VOLTAGE=1.2V

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

RADIO_HB_PAD

62

50_PAD_ANT_HB_E

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

R1209_E

3.5NH+/-0.1NH-0.5A

50_HBPAD_2G_OUT_MATCH_E

21

0201

OMIT_TABLE

PP_1V8_LDO5_E

PP_1V2_LDO1_E

1

C1212_E

1.5PF

+/-0.1PF
16V

2

NP0-C0G
01005

RADIO_HB_PAD
OMIT_TABLE

1

NOSTUFF

C1209_E

6.2NH-3%-0.4A

0201

RADIO_HB_PAD

2

3 4 5 8 11 13 15 16 18 23

3 8 23

OMIT_TABLE

R1200_E

3.0NH+/-0.1NH-0.6A

0201

FL1201_E

LFL151G81TF1E406

4

OUT

3 1

NC

LGA

NOSTUFF

17

GND

5

R1210_E

0.00

1/32W
01005

21

0%
MF

3 245

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

PA_HB_E

HB-PAD-AFEM-8072

LGA

SYM 3 OF 3

THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD

THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD

293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390

10
11
13
15
16
19
21
22
26
27
31
33
35
37
39
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
59
60
61
58
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98

99
100
101
102
103
104
105
106
107

1
2
3
4
5
6
7
9

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

PA_HB_E

HB-PAD-AFEM-8072

LGA

SYM 2 OF 3

THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

108
109
110
111
112
113

114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138

139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194

PAGE TITLE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

21

6

IN

50_HBPAD_2G_OUT_CPL2_IN_JPN_E

NC

GND

2

50_PAD_ANT_HB_CPL2_IN_E

NCNC

17

195

THRM_PAD

196

THRM_PAD

197

THRM_PAD

198

THRM_PAD

199

THRM_PAD

200

THRM_PAD

201

THRM_PAD

202

THRM_PAD

203

THRM_PAD

204

THRM_PAD

205

THRM_PAD

206

THRM_PAD

207

THRM_PAD

208

THRM_PAD

209

THRM_PAD

210

THRM_PAD

211

THRM_PAD

212

THRM_PAD

213

THRM_PAD

214

THRM_PAD

215

THRM_PAD

216

THRM_PAD

217

THRM_PAD

218

THRM_PAD

219

THRM_PAD

220

THRM_PAD

221

THRM_PAD

222

THRM_PAD

223

THRM_PAD

224

THRM_PAD

225

THRM_PAD

226

THRM_PAD

227

THRM_PAD

228

THRM_PAD

229

THRM_PAD

230

THRM_PAD

231

THRM_PAD

232

THRM_PAD

233

THRM_PAD

234

THRM_PAD THRM_PAD

235

THRM_PAD

236

THRM_PAD

237

THRM_PAD

238

THRM_PAD

239

THRM_PAD

240

THRM_PAD

241

THRM_PAD

242

THRM_PAD

243

THRM_PAD

244

THRM_PAD

245

THRM_PAD

246

THRM_PAD

247

THRM_PAD

248

THRM_PAD

249

THRM_PAD

250

THRM_PAD

251

THRM_PAD

252

THRM_PAD

253

THRM_PAD

254

THRM_PAD

255

THRM_PAD

256

THRM_PAD

257

THRM_PAD

258

THRM_PAD

259

THRM_PAD

260

THRM_PAD

261

THRM_PAD

262

THRM_PAD

263

THRM_PAD

264

THRM_PAD

265

THRM_PAD

266

THRM_PAD

267

THRM_PAD

268

THRM_PAD

269

THRM_PAD

270

THRM_PAD

271

THRM_PAD

272

THRM_PAD

273

THRM_PAD

274

THRM_PAD

275

THRM_PAD

276

THRM_PAD

277

THRM_PAD

278

THRM_PAD

279

THRM_PAD

280

THRM_PAD

281

THRM_PAD

282

THRM_PAD

283

THRM_PAD

284

THRM_PAD

285

THRM_PAD

286

THRM_PAD

287

THRM_PAD

288

THRM_PAD

289

THRM_PAD

290

THRM_PAD

291

THRM_PAD

292

THRM_PAD

HB PAD

1

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

12 OF 24

SHEET

24 OF 41

D

C

B

A

SIZE

D

8

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67

35 4

2

1

D

C

B

UHB/2G PAD -JPN

3 11 12

50_TX_MLB_2G_WTR_E

9

50_TX_UHB_WTR_E

9

PP_1V8_VIO_TX_E

3 11 12 17

RADIO_UHB_PAD

1

C1302_E

18PF

5%
16V

2

CERM
01005

NOSTUFF

PP_1V8_VIO_RX_E

RADIO_UHB_PAD

1

C1301_E

18PF

5%
16V

2

CERM
01005

NOSTUFF

7 10 11 12 23

7 11 12 23

75_RFFE3_SCLK_E

RADIO_UHB_PAD

1

C1305_E

2

NOSTUFF

R1302_E

0.00

1/32W
01005

21

0%
MF

R1303_E

0.00

1/32W
01005

21

0%
MF

PP1300_E

P2MM-NSM

SM

PP

PP1301_E

P2MM-NSM

SM

PP

75_RFFE6_SCLK_E

RADIO_UHB_PAD

75_RFFE6_SDATA_E

1

2

18PF

5%
16V
CERM
01005

C1306_E

18PF

5%
16V
CERM
01005

NOSTUFF

1

NOSTUFF

50_TX_MLB_2G_IN_E

7 10 11 12
23

75_RFFE3_SDATA_E

7 11 12 23

L1300_E

10NH-+/-3%-0.25A

01005

2

50_TX_UHB_IN_E

1

NOSTUFF

L1303_E

10NH-+/-3%-0.25A

01005

2

1

50_PRX_MLB1_DRX_MB_LHB_WTR_IN_E

9

1

50_PRX_UHB1_PAD_UHB_A_WTR_IN_E

9

D10

C10

B4

B2

L4

L5

SCLK_RX

SDATA_RX

TX_MLB_IN

TX_UHB_IN

PRX_MLB1

PRX_UHB1

L8L6L9

VIO_RX

678

L10

VIO_TX

SCLK_TX

SDATA_TX

OMIT_TABLE

PA_UHB_E

SKY78141

LGA

SYM 1 OF 2

RADIO_UHB_PAD

1

C1311_E

18PF

5%
16V

2

CERM
01005

OMIT_TABLE

RADIO_UHB_PAD

1

R1304_E

0.00

0%
1/32W
MF
01005

2

OMIT_TABLE

VOLTAGE=4.0V

PP_VCC1_UHB_PA_E

G10

F10

I10

VCC2

VCC1

VBATT

ANT_MLB1

ANT_UHB1

ANT_UHB2

CPL_OUT3

VOLTAGE=1.8V

B6

VDD_LNA

NC/GND

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

PP_VDD_BOOST

1

C1316_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

RADIO_UHB_PAD

1

C1312_E

0.1UF

10%

6.3V

2

CER-X5R
01005

OMIT_TABLE

1

C1323_E

1.0UF

20%

6.3V

2

X5R
0201-1

RADIO_2G_PA

OMIT_TABLE

RADIO_UHB_PAD

1

C1317_E

18PF

5%
16V

2

CERM
01005

NOSTUFF

PP_1V8_LDO5_E

3 4 5 8 11 12 15 16 18 23

R1305_E

2.0NH+/-0.1NH-0.380A

L2

50_PAD_ANT_MLB1_E

E2

50_PAD_ANT_UHB1_E

RADIO_UHB_PAD

1

C1319_E

0.5PF

+/-0.05PF
16V

2

NP0-C0G
01005

NOSTUFF

01005

OMIT_TABLE

RADIO_UHB_PAD

R1306_E

0.00

0%

1/32W

MF

01005

OMIT_TABLE

21

RADIO_UHB_PAD

1

C1318_E

1.0PF

+/-0.1PF
16V

2

NP0-C0G
01005

OMIT_TABLE

21

R1307_E

0.8NH-+/-0.1NH-0.9A-0.05OHM

G2

50_PAD_ANT_UHB2_E 50_UAT_TRX_UHB_MCS_E

01005

RADIO_UHB_PAD

1

C1320_E

0.2PF

+/-0.1PF
16V

2

NP0-C0G
01005

NOSTUFF

J2

C2

50_2G_LB_PA_OUT_2GCPLA_IN_E

OMIT_TABLE

21

10 11 12 17

PP_QET_PA_E

R1308_E

UHB_SNUBBER_E

1

C1322_E

470PF

10%
10V

2

X5R
01005

NOSTUFF

50_PAD_MLB1_2G_HB_CPL2_IN_E

50_UHB1_LAT3_E

50_CPL3_SENS_OUT_2GCPLB_IN_E

1.00

1%

1/32W

MF

01005

NOSTUFF

3 245

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

353S01243 JPNPA_UHB_E CRITICAL1 UHB PAD MP

117S0161 1 R1302_E JPNCRITICALMLB/2GTX IN MCH2, 0 OHMS

1 R1303_E JPNCRITICALUHB INPUT MCH1, 0 OHMS117S0161

1 MLB/2G MB OUT MCH1 01005 0R CRITICAL JPNR1305_E117S0161

UHB1 OUTPUT MCH1, 0 OHMS CRITICAL JPN117S0161 R1306_E1

UHB2 OUT/DRX BP MCH1, 0.8NH 0.9A152S00494 JPNCRITICALR1307_E1

UHB LNA DECOUPLING, 0.1UF 6.3V 10%132S0683 CRITICAL JPNC1312_E1

131S0214 VBAT DECOUPLING,18PF CRITICAL JPN1 C1311_E

VBAT DECOUPLING, 1UF1 JPN138S0692 CRITICALC1323_E

VCC2/VCC1 RESISTOR OPTION, 0 OHM R1304_E CRITICAL JPN1117S0161

C1318_EMLB OUTPUT MCH UAT, 01005 1.0PF CRITICAL JPN1131S0375

10 11 12

1

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

D

PA_UHB_E

SKY78141

21

17

20

19

11

A1
A2
A3
A4
A5
A6
A7
A8

A9
A10
A11

B1

B3

B5

B7

B8

B9
B10
B11

C1
C11

D1

D2
D11

E1
E10
E11

F1
F2

F11

G1

G11

H1

H2
H10
H11

I1
I2

I11

J1
J10
J11

K1

K2
K10
K11

L1
L3
L7

L11

M1
M2
M3
M4
M5
M6
M7
M8

M9
M10
M11

GND GND

LGA

SYM 2 OF 2

C3
C4
C5
C6
C7
C8
C9
D3
D4
D5
D6
D7
D8
D9
E3
E4
E5
E6
E7
E8
E9
F3
F4
F5
F6
F7
F8
F9
G3
G4
G5
G6
G7
G8
G9
H3
H4
H5
H6
H7
H8
H9
I3
I4
I5
I6
I7
I8
I9
J3
J4
J5
J6
J7
J8
J9
K3
K4
K5
K6
K7
K8
K9

C

B

A

8

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CPL2GA_E

WIFI

LDJ0Q869M30CG015

LGA

MAIN_OUTIN

R1300_E

49.9

1/32W
01005

OMIT_TABLE

21

50_2GCPLA_TERM_E

1%
MF

THESE ARE ONLY STUFFED FOR ROW CONFIG.

OMIT_TABLE

3

COUPLED_OUT TERMINATE

67

12

4

50_2GCPLA_OUT_CPLR2_MUX_IN_ROW_E

50_2GCPL_SENS_OUT_CPL2_IN_E

11 17

17

35 4

PAGE TITLE

UHB PAD

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

2

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

13 OF 24

SHEET

25 OF 41

1

SIZE

A

D

2G PA - ROW

678

3 245

1

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

D

C

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

CRITICAL ROWPA_UHB_E1353S01247 2G PA MP

117S0161 ROWMLB/2GTX IN MCH2, 0 OHMS1 CRITICALR1302_E

CRITICAL ROW1 UHB INPUT MCH1, 0 OHMS117S0161 R1303_E

152S1917 1 01005 2.0NH 0.6A R1305_E ROWCRITICAL

UHB2 OUT/DRX BP MCH1, 0 OHMS ROW1 R1307_E117S0161 CRITICAL

VBAT DECOUPLING,18PF131S0214 CRITICAL ROWC1311_E1

138S0692 1 CRITICAL ROWC1323_EVBAT DECOUPLING, 1UF

117S0161 1 ROWVCC2/VCC1 RESISTOR OPTION, 0 OHM CRITICALR1304_E

ROW CLPA1 ROW155S00316 CRITICALCPL2GA_E

118S0652 R1300_E ROWCRITICAL1 01005 49.9R

D

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

C

TABLE_5_ITEM

B

B

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

A

PAGE TITLE

2G PA

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

14 OF 24

SHEET

26 OF 41

1

SIZE

D

LB DSM

678

3 245

1

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

D

16

VIO_HB_LB_DSM_FILT_E

IN

23 16 7

23 16 7

IN
IN

75_RFFE2_SCLK_E
75_RFFE2_SDATA_E

NOSTUFF

1

C1502_E

47PF

5%
16V

2

CERM
01005

VOLTAGE=1.8V

1

C1504_E

150PF

5%
25V

2

C0G
01005

PP_1V8_LDO5_E

D

3 4 5 8 11 12 13 16 18 23

C

B

18

50_DRX_LB_OUT_E

OUT

TO DIPLEXER
THEN MLB STRIPLINE

R1501_E

0.00

1/32W
01005

21

0%
MF

NOSTUFF

1

C1500_E

2

47PF

5%
16V
CERM
01005

7

8

SCLK

SDATA

9

VIO

10

VDD

DSM_LB_E

SKY13760-19

BGA

SYM 1 OF 2

DRX_LB_IN_1

50_DRX_LB_OUT_MATCH_E 50_DRX_LB_IN2_MATCH_E

1

NOSTUFF

4

DRX_LB_OUT_1 DRX_LB_IN_2

L1501_E L1503_E

4.7NH-3%-0.270A

01005

2

DRX_LB_IN_3

50_DRX_LB_IN1_MATCH_E

17

15

50_DRX_LB_IN3_MATCH_E

13

1

NOSTUFF

L1502_E

4.7NH-3%-0.270A

01005

2

1

NOSTUFF

4.7NH-3%-0.270A

01005

2

1

L1504_E

1.5PF

+/-0.1PF
16V

2

NP0-C0G
01005-1

R1507_E

0.00

0%

1/32W

MF

01005

21

50_UAT_TRX_LB_MCW_E

R1508_E

0.00

0%

1/32W

MF

01005

21

50_LAT_DRX_LB_MCW_E

R1506_E

4.7NH-3%-0.35A-0.35OHM

21

01005

50_DSM_TRX_LB_IN_LB_E

METROCIRC

METROCIRC

TO QUADPLEXER

19

19

C

DSM_LB_E

SKY13760-19

BGA

SYM 2 OF 2

1

GND

2

GND

3

GND

5

GND

6

GND

21

IN

11
12
14
16
18
19
20

GND
GND
GND
GND
GND
GND
GND

B

A

8

PDF Watermark Remover DEMO : Purchase from www.PDFWatermarkRemover.com to remove the watermark

A

PAGE TITLE

LB DSM

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

15 OF 24

SHEET

27 OF 41

1

SIZE

D

D

HB DSM

16 9

OUT

50_DRX_HB_OUT1_MBHB_WTR_IN_E

TO STRIPLINE

R1603_E

0.00

1/32W
01005

OMIT_TABLE
JPN = STUFF

21

0%
MF

678

DECOUPLING SHARED WITH LB DSM

NOSTUFF

1

C1602_E

47PF

5%
16V

2

CERM
01005

1

C1603_E

120PF

5%
25V

2

COG
01005

50_DRX_HB_OUT1_MATCH_E

28

27

SCLK

SDATA

26

VIO

25

VDD

VIO_HB_LB_DSM_FILT_E

15

VOLTAGE=1.8V

1

2

C1604_E

0.1UF

20%

6.3V
X5R-CERM
01005

3 245

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

R1609_E

0.00

1/32W
01005

21

0%
MF

75_RFFE2_SDATA_E

75_RFFE2_SCLK_E

PP_1V8_VIO_DRX_E

PP_1V8_LDO5_E

IN

IN

IN

3 4 5 8 11 12 13 15 18 23

23 15 7

23 15 7

3

117S0161 1 01005 0R CRITICAL ROWR1600_E

117S0161 CRITICAL01005 0R1 JPNR1603_E

01005 0R CRITICAL JPN1117S0161 R1612_E

1

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

TABLE_5_ITEM

ROWCRITICAL1117S0161 R1602_E01005 0R

D

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

TABLE_5_ITEM

C

9

50_UAT_TRX_UHB_MCW_E

16

TO METROCIRC

50_DRX_HB_OUT2_UHB_LTEU_A_WTR_IN_E

OUT

STRIPLINE

R1600_E

0.00

1/32W
01005

OMIT_TABLE

ROW = STUFF

21

0%
MF

R1601_E

0.00

0%

1/32W

MF

01005

DSM_HB_E

SKY13762

2

DRX_HB_OUT1

BGA

SYM 1 OF 2

DRX_HB_IN1

21

50_DRX_HB_IN1_MATCH_E

1

NOSTUFF

0.6NH-+/-0.1NH-0.95A-0.05OHM

L1608_E

4.7NH-3%-0.270A

01005

2

R1611_E

50_DRX_HB_OUT2_MATCH_E

4

DRX_HB_OUT2

DRX_HB_IN2

50_DRX_HB_IN2_MATCH_E

23

1

NOSTUFF

L1605_E

4.7NH-3%-0.270A

01005

2

R1615_E

50_DRX_HB_IN3_MATCH_E

21

6

DRX_HB_OUT3

DRX_HB_IN3

20

1

NOSTUFF

L1607_E

10NH-+/-3%-0.25A

01005

R1613_E

0.00

1/32W
01005

0.00

1/32W
01005

21

0%
MF

21

0%
MF

01005

21

50_UAT_TRX_MLB_MB_HB_MCW_E

19

METROCIRC

C

50_LAT_DRX_MLB_MB_HB_MCW_E

METROCIRC

50_DSM_HB_IN_TRX_MBHB_E

TO QUADPLEXER

19

1
3
5
7
8

9
10
11

GND

12

21

IN

14
15
17
18
19
22
24

DSM_HB_E

SKY13762

BGA

SYM 2 OF 2

B

16 9

50_DRX_HB_OUT1_MBHB_WTR_IN_E

OUT

STRIPLINE

R1602_E

0.00

1/32W
01005

OMIT_TABLE
ROW = STUFF

21

0%
MF

50_DRX_HB_OUT3_MATCH_E

1

NOSTUFF

L1602_E

4.7NH-3%-0.270A

01005

2

DRX_UHB_IN2

DRX_UHB_IN3

50_DRX_UHB_IN2_MATCH_E

13

16

2

1

NOSTUFF

L1606_E

OMIT_TABLE
JPN = STUFF

4.7NH-3%-0.270A

01005

2

R1610_E

0.6NH-+/-0.1NH-0.95A-0.05OHM

21

01005

R1612_E

0.00

1/32W
01005

21

0%
MF

B

MAKE_BASE=TRUE

50_UAT_TRX_UHB_MCW_E

METROCIRC

50_UAT_TRX_UHB_MCW_E

FROM HB_OUT1

50_DSM_HB_IN_TRX_UHB_E50_DRX_UHB_IN3_MATCH_E

TO UAT4 ANTENNA

19

16

21

IN

A

8

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A

PAGE TITLE

1

L1604_E

0.5PF

+/-0.05PF
16V

2

C0G-CERM
01005

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

Apple Inc.

HB DSM

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

16 OF 24

SHEET

28 OF 41

1

SIZE

D

D

COUPLER2

678

3 245

1

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

TABLE_5_HEAD

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

PP_VDD_BOOST

1

C1805_E

1

C1804_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

3 11 12 13

PP_1V8_VIO_TX_E

1

C1803_E

47PF

5%
16V

2

CERM
01005

NOSTUFF
RADIO_CPL2

RADIO_CPL2

47PF

5%
16V

2

CERM
01005

RADIO_CPL2

10 11 12 13

01005 3.0NH 0.45A152S00504 CRITICAL1 JPNR1809_E

01005 7N5H 300MA152S00524 C1813_E1 CRITICAL JPN

131S0249 01005 2.2PF 0.1PF1 CRITICAL JPNC1802_E

BOM OPTIONCRITICAL

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

JPNCRITICAL1 01005 2.2PF 0.1PF131S0249 C1815_E

TABLE_5_ITEM

D

C

11

C1813_E

7.5NH-3%-0.3A-0.5OHM

MAKE_BASE=TRUE

OMIT_TABLE

01005

7 23

50_PAD_ANT_LB_CPL2_IN_E

11

75_RFFE5_SCLK_E

1

C1801_E

47PF

5%
16V

2

CERM
01005

NOSTUFF
RADIO_CPL2

75_RFFE5_SDATA_E

7 23

20

TRX_LB_IN

3

2

1

VIO

RFFE_CLK

RFFE_DAT

CPL2_E

7

VDD

DRX_LB_OUT

TABLE_5_HEAD

RADIO_CLP2

R1804_E

50_CPL2_DRX_LB_E

6

0.00

1/32W
01005

0%
MF

21

50_LAT_DRX_LB_MCS_E

METROCIRC

1

C1809_E

1.0PF

+/-0.1PF
16V

2

NP0-C0G
01005

NOSTUFF
RADIO_CPL2

19

117S0161 01005 0R1 ROWCRITICALC1814_E

01005 0R117S0161 1 ROWCRITICALR1810_E

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

BOM OPTIONCRITICAL

TABLE_5_ITEM

TABLE_5_ITEM

SKY13770

LGA

SYM 1 OF 2

R1803_E

C

22PF

TRX_LB_UAT

11

50_CPL2_TRX_LB_E

21

5%

16V

CERM

01005-1

50_UAT_TRX_LB_MCS_E

METROCIRC

1

19

C1808_E

22NH-150MA

0201

21

50_2GCPL_MUX_OUT_CPL2_IN_E50_2GCPLB_OUT_CPLR2_MUX_IN_JPN_E

19

TX_2GLB

2

B

1

C1802_E

2.2PF

+/-0.1PF
16V

2

NP0-C0G
01005

OMIT_TABLE

50_2GCPLA_OUT_CPLR2_MUX_IN_ROW_E

13

MAKE_BASE=TRUE

1

C1814_E

0.00

0%
1/32W
MF
01005

2

OMIT_TABLE

50_PAD_ANT_HB_CPL2_IN_E

12

50_HBPAD_2G_OUT_CPL2_IN_JPN_E

12

MAKE_BASE=TRUE

50_PAD_MLB1_2G_HB_CPL2_IN_E

13

MAKE_BASE=TRUE

1

C1815_E

2.2PF

+/-0.1PF
16V

2

NP0-C0G
01005

OMIT_TABLE

32

50_HBPAD_2G_OUT_CPL2_IN_JPN_E

RADIO_CPL2

1

R1810_E

0.00

0%
1/32W
MF
01005

2

OMIT_TABLE

31

R1809_E

3.0NH-+/-0.1NH-0.45A-0.2OHM

21

50_PAD_MLB1_CPL2_IN_E

01005

33

TRX_HB_IN

TX_2GHB

TRX_MLB_IN

TRX_LB_LAT

TRX_HB_LAT

TRX_HB_UAT

RADIO_CLP2

R1806_E

18

50_TRX_LB_LAT_E

0.00

0%

1/32W

MF

01005

21

50_TRX_LB_LAT_DIPLEXER_IN_E

1

C1811_E

22NH-3%-0.14A-2.26OHM

01005

2

RADIO_CLP2

RADIO_CPL2

R1807_E

23

50_TRX_HB_LAT_E 50_TRX_HB_LAT_DIPLEXER_IN_E

0.00

0%

1/32W

MF

01005

21

NOSTUFF

C1812_E

13NH-3%-0.3A

0201

30

50_CPL2_TRX_HB_E

RADIO_CLP2

R1802_E

0.00

0%

1/32W

MF

01005

RADIO_CLP2

21

RADIO_CPL2

1

C1807_E

10PF

5%
16V

2

NP0-C0G
01005

RADIO_CPL2
NOSTUFF

50_UAT_TRX_MLB_MB_HB_MCS_E

20

20

METROCIRC

19

10
12
13
14
15
16
17
21
22
24
25
26
28
29
34
36

4
5
8

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

CPL2_E

SKY13770

LGA

SYM 2 OF 2

B

A

50_2GCPL_SENS_OUT_CPL2_IN_E

11 13

PP1800_E

P2MM-NSM

SM

1

PP

50_CPL2_CPLOUT_E

9

27

RF_CPL3_IN

CPL_OUT1

9

DRX_HB_OUT

35

50_CPL2_DRX_HB_E

R1801_E

0.00

1/32W
01005

21

0%
MF

1

C1806_E

1.0PF

+/-0.1PF
16V

2

NP0-C0G
01005

NOSTUFF
RADIO_CPL2

50_LAT_DRX_MLB_MB_HB_MCS_E

METROCIRC

19

PAGE TITLE

COUPLER2

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

17 OF 24

SHEET

29 OF 41

A

SIZE

D

8

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67

35 4

2

1

678

GPS & GPS/LB DIPLEXER

3 245

1

D

C

50_GNSS_WTR_IN_E

8

PLACE AT WTR END

L2108_E

12NH-3%-140MA

01005-1

D

L2109_E

23 16 15 13 12 11 8 5 4 3

21

1

1

C2107_E

1.0NH+/-0.1NH-0.580A

+/-0.1PF
16V

2

NP0-C0G
01005

2.2PF

L2106_E

01005

NOSTUFF

2

STRIPLINE

IN

PP_1V8_LDO5_E

50_GNSS_DPLX_MATCH_E

1

L2102_E

1.0NH+/-0.1NH-0.580A

01005

NOSTUFF

2

0.00

1/32W
01005

21

0%
MF

R2102_E

0.00

1/32W
01005

21

0%
MF

PP_1V8_VDD_GLNA_E

VOLTAGE=1.8V

1

C2101_E

0.1UF

20%

6.3V

2

X5R-CERM
01005

50_GNSS_OUT_MATCH_E

4

VCC

LNA_GPS_E

SKY65790-11

5 7

RFOUT

LGA

GND

9

8

LNA_EN

6

2

RFIN

1

50_GNSS_IN_MATCH_E

3

R2103_E

0.00

1/32W
01005

21

0%
MF

NOSTUFF

1

C2102_E

18PF

2%
16V

2

CERM
01005

50_GNSS_QPLEX_E

21

IN

C

50_DRX_LB_WTR_IN_E

9

R2105_E

0.00

1/32W
01005

21

0%

MF

L2105_E

1.0NH+/-0.1NH-0.580A

01005

NOSTUFF

BB_GNSS_LNA_EN_E

STRIPLINE

1

1

50_DRX_LB_OUT_E

23 7

IN

15

IN

L2103_E

1.0NH+/-0.1NH-0.580A

01005

NOSTUFF

2

2

B

B

A

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

8

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A

PAGE TITLE

GNSS

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

18 OF 24

SHEET

30 OF 41

1

SIZE

D

METROCIRC

678

3 245

1

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

D

D

METROCIRC

C

21

16

15

16

15

16

21

UPPER MLB

50_UAT_WLAN_5G_NORTH_E

50_UAT_WLAN_2G_NORTH_E

50_UAT_TRX_UHB_MCW_E
50_LAT_DRX_LB_MCW_E
50_LAT_DRX_MLB_MB_HB_MCW_E
50_UAT_TRX_LB_MCW_E
50_UAT_TRX_MLB_MB_HB_MCW_E

17

1

11

5

15

3

13

2
4
6
7
8

9
10
12
14
16
19
21
23

FLTPSSL-523J

SIG1-N
SIG2-N
SIG3-N
SIG4-N
SIG5-N
SIG6-N
SIG7-N

GND

MC_E

SM

SIG1-S
SIG2-S
SIG3-S
SIG4-S
SIG5-S
SIG6-S
SIG7-S

GND

LOWER MLB

18
24
34
20
30
22
32

25
26
27
28
29
31
33
41
42
43
44
45
46

50_UAT_WLAN_5G_SOUTH

50_UAT_WLAN_2G_SOUTH

50_UAT_TRX_UHB_MCS_E
50_LAT_DRX_LB_MCS_E
50_LAT_DRX_MLB_MB_HB_MCS_E
50_UAT_TRX_LB_MCS_E
50_UAT_TRX_MLB_MB_HB_MCS_E

1

17

17

17

17

1

13

C

B

B

A

8

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PAGE TITLE

METROCIRC

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

19 OF 24

SHEET

31 OF 41

1

SIZE

D

LOWER ANTENNA

678

3 245

1

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

D

C

24

24

24

24

PP1V8_GPOLAT_E

75_LATTUN_SDATA_E

50_LAT_WLAN_MLC

1

BB_TO_LAT_GPO2_CONN_E
BB_TO_LAT_GPO1_CONN_E

JLAT1_E

MM3729-2702A16

M-ST-SM

1
2
3
4
5
6
7
8

SHLD

17
18
19
20
21
22
23

9

50_UHB1_LAT3_E

10
11

75_LATTUN_SCLK_E

12
13
14
15
16

50_LMHB_LAT1_E

24
25
26

27
28
29
30

PP3V0_LAT_CONN_E

BB_TO_LAT_GPO4_CONN_E
BB_TO_LAT_GPO3_CONN_E

D

13

24

24

24

24

20

C

50_TRX_LB_LAT_DIPLEXER_IN_E

17

17

50_TRX_HB_LAT_DIPLEXER_IN_E

FLPDX_E

DPX202690DT-4215A1SJ

6

LB

4

HB

1

LGA

GND

3

COMMON

5

2

1.0NH-+/-0.1NH-0.9A-0.05OHM

50_LMHB_LAT1_MATCH_E

L1901_E

01005

NOSTUFF

RADIO_CPL2

RADIO_CLP2

R1903_E

0.00

1/20W

0201

1

1%
MF

21

50_LMHB_LAT1_E

1

NOSTUFF

20

C1901_E

18NH+/-3%-0.250A

0201

2

2

RADIO_CPL2

B

B

A

8

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A

PAGE TITLE

LOWER ANTENNA

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

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PAGE

20 OF 24

SHEET

32 OF 41

1

SIZE

D

678

UAT & LB/UHB DIPLEXER

3 245

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

TABLE_5_HEAD

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

155S00280 B42_WIFI5_DPX FL2002_E1 CRITICAL JPN

155S00290 B42_WIFI5_DPX_PASSTHRU1 CRITICAL ROWFL2002_E

BOM OPTIONCRITICAL

TABLE_5_ITEM

TABLE_5_ITEM

1

D

C

19

15

16

50_DSM_TRX_LB_IN_LB_E

OUT

50_DSM_HB_IN_TRX_MBHB_E

OUT

1

L2011_E

22NH-3%-0.12A-3.2OHM

01005

2

R2002_E

0.00

1/32W
01005

21

0%
MF

50_2G_WIFI_QPLEX_MATCH_E50_UAT_WLAN_2G_NORTH_E

NOSTUFF

1

C2001_E

18PF

2%
16V

2

CERM
01005

NOSTUFF

1

C2002_E

18PF

2%
16V

2

CERM
01005

9

LB

13

MLB_MB_HB

1

WIFI

15

GNSS

2

D

FLQPLX_E

ACFM-W712-AP1

LGA

5

ANT

GND

8

7

6

4

3

10

11

12

14

16

EPAD

17

3 ELEMENT FOR 5GHZ ATTEN

L2009_E

1.2NH-+/-0.1NH-0.80A

50_LMHGW_UAT1_MATCH_E

NOSTUFF

1

C2005_E

18PF

2%
25V

2

C0G
0201

01005

21

50_LMHGW_UAT1_E

1

NOSTUFF

L2007_E

1.0NH+/-0.1NH-0.75A

0201

21

C

B

50_UAT_WLAN_5G_NORTH_E

19

18

50_GNSS_QPLEX_E

OUT

L2013_E

0.00

1/32W
01005

1

NOSTUFF

L2012_E L2010_E

1.0NH+/-0.1NH-0.580A

01005

2

0%
MF

21

50_W5G_DPX_IN_E

1

NOSTUFF

1.0NH+/-0.1NH-0.580A

01005

2

FL2002_E

DPX255850DT-5056C1SJ

LGA

OMIT_TABLE

1

HBP

3

LBP

GND

5

4

2

7

COMMP

9

8

6

50_UHB_W5G_UAT2_MATCH_E

1

NOSTUFF

2

L2008_E

0.6NH-+/-0.1NH-0.95A-0.05OHM

21

01005

1

NOSTUFF

50_UHB_W5G_UAT2_E

21

JUAT1_E

MM3729-2702A12

M-RT-SM

1

13
14
15
16
17
18
19

2
3
4
5
6

SHLD

21 24

PP3V0_UAT_CONN_E

BB_TO_UAT_GPO2_CONN_E

24

BB_TO_UAT_GPO1_CONN_E

24

50_UHB_W5G_UAT2_E

21

7

50_LMHGW_UAT1_E

8
9
10
11
12

20
21

22
23
24
25

75_UATTUN_SDATA_E
75_UATTUN_SCLK_E

PP3V0_UAT_CONN_E

PP1V8_S2

21

24

24

21 24

1 7 23 24

B

A

16

50_DSM_HB_IN_TRX_UHB_E

OUT

1

NOSTUFF

L2004_E

1.0NH+/-0.1NH-0.580A

01005

2

L2005_E

1.0NH+/-0.1NH-0.580A

01005

2

L2006_E

1.0NH+/-0.1NH-0.580A

01005

2

PAGE TITLE

UPPER ANTENNA

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-02222

REVISION

6.0.0

BRANCH

evt-1

PAGE

21 OF 24

SHEET

33 OF 41

A

SIZE

D

8

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67

35 4

2

1

678

SIM CONN EUICC & DEBUG CONN

3 245

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST

1

D

PP_UIM1_LDO11_E

3 5 22

1

C203_E

2.2UF

20%

6.3V

2

X5R-CERM
0201

D

PP_1V8_LDO6_E

3 4 5 6 7 8 10 23

1

R201_E

15.00K

1%
1/32W
MF
01005

2

RADIO_SIMCARD

BB_SIM1_DETECT_E

9 8

SIM_DETECT_SPG

7 22 23

7 22 23

BB_SIM1_CLK_E

BB_SIM1_RST_E

3

CLK

2

RESET

1

VCC

5

11

10

12

13

14

SIMCARD-BEACH-D22

16

15

J_SIM_E

F-RT-SM

GND

19

18

17

20

21

22

23

24

25

SIM_DETECT

28

27

26

29

SWP

30

IO

7

6

NFC_SWP1

IO

BB_SIM1_DATA_E

23 22 1

7 22

7 22 23

1

R202_E

100K

5%
1/32W
MF
01005

2

ROOM=RADIO_BB

RADIO_SIMCARD

1

C200_E

100PF

5%
16V

2

NP0-C0G
01005

SIM CARD

C

B

PP_UIM1_LDO11_E

1

DZ202_E

12V-33PF

01005

RADIO_SIMCARD RADIO_SIMCARD

2

BB_SIM1_DETECT_E

RADIO_SIMCARD

2

DZ203_E

5.5V-6.2PF

0201-THICKSTNCL

1

3 5 22

7 22

BB_SIM1_DATA_E

7 22 23

BB_SIM1_RST_E

7 22 23

1

DZ204_E

SG-WLL-2-2

ESD202-B1-CSP01005

2

1

DZ205_E

SG-WLL-2-2

ESD202-B1-CSP01005

2

23 22 1

BB_SIM1_CLK_E

7 22 23

1

DEBUG CONNECTOR

MLB 516S1185
FLEX 516S1184

C

DZ206_E

SG-WLL-2-2

ESD202-B1-CSP01005

2

10 3 1

IO

NFC_SWP1

1

1 4 23

PP_VDD_MAIN

PMU_TO_BB_USB_VBUS_DETECT

DZ207_E

SG-WLL-2-2

ESD202-B1-CSP01005

2

4 1

6

6

SELECT

10 3 1

AP_TO_BB_RESET_L
BB_JTAG_TCK_E
BB_JTAG_TMS_E

PP_VDD_BOOST

20-5857-036-001-829

NC
NC
NC
NC

NC

J_DEBUG_E

F-ST-SM

41

3837

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827
3029
3231
3433
3635

90_USB_BB_DATA_P
90_USB_BB_DATA_N

PP_UIM1_LDO11_E
BB_SIM1_RST_E
BB_SIM1_CLK_E
BB_SIM1_DATA_E
NFC_SWP1
BB_SIM1_DETECT_E

NC
NC
NC
NC
NC
NC

BB_JTAG_RST_L_E

UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX

NC

1 6

1 6

3 5 22

IN

IN

BI

1 22 23

OUT

OUT

23 7 1

23 7 1

23 22 7

23 22 7

23 22 7

22 7

6

B

42

NOSTUFF

4039

A

8

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SYNC_DATE=07/05/2016SYNC_MASTER=SIM TRAY

PAGE TITLE

A

SIM, EUICC, DEBUG CONN

DRAWING NUMBER

051-02222

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

evt-1

PAGE

22 OF 24

SHEET

34 OF 41

1

SIZE

D