Apple iPhone 5SE Schematic

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No share Dick itesla.solutions
L5208_RF
C5212_RF
R0501 R0500
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C0540
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PP1005
C0541
U3000
C0542
C0543
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*
C5201_RF
T5301_RF
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C5330_RF
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C3308
U3300
C3394
L2040
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L2080
L2030
L2050
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C3729
C3730
C3709
PP1521
R1521
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C3702
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L5201_RF
C3021
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PP0907
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C5302_RF
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C3020
C4304
R3021
U3020
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R3020
C4303
L5301_RF
C5322_RF
R4301
PP1008
R3022
PP1007
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C5321_RF
C3011
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U5301_RF
C3010
U5302_RF
C3012
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C4021
L5303_RF
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R5309_RF
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R5301_RF
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C2086
C4000
C3386
PP3174_RF
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C2087
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L3300
C4002
C3385
C3384
L4021
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U4000
C4006
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*
C4007
C2061
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L4000
C2060
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C2130
C1321
C1240
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C1157
C1249
C1247
C2062
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*
L2060
R2250
C1316
C2095
C2250
R1021
R1020
C2032
C2044
C1551
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*
U2000
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*
C0731
C2092
C2094 C2093
C2089
C2091
C0743
C3740
C2127
C2122
PP0610
C0610
FL0610
C0611
C2123
C2121
C3742
C2088
U3700
C3700
C1509
R2200
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VR3101_RF
C2125
C2120
C2124
C3741
*
C3746
C2126
C1520
C1501
C1540
C1523
C3745
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L3700
C1506
C1541
C3760
C1522
L5216_RF
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C5138_RF
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FLWIFDIP_RF
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R5101_RF
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R5214_RF
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C4306
XW4302
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C4305
U4301
XW4301
R4302
C3013
C4301
C2099
U3010
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PP1009
L4020
U4020
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PP1002
C4022
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D4021
C1248
C1242
C0740
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C1111
C2025
C2111
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C1117
C0814
C1108
C1228
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C2109
C1227
Y2200
PP1021
C2201
C0601
C2200
C2104
C1250
C2202
C2270
C2101
C2103
R2270
C2131
C2205
C1200
R2205
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C1153
C0612
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C0620
C2090
C0742
C0741
C0604
R0945
C2114
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C1125
C1122
L2070
C2085
C2001
C1546
C1548
C2110
C1521
C1542
C1543
C1550
C0705
C0706
C0707
C0708
U1500
U4300
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C4323
C4302
C4324
L4301
C4314
C4315
*
*
C4322
C4319
C4321
C3387
C3610
PP0909
PP09010
C3660
C3611
C3665
R3503
C3602
R3502
C4020D4020
U3500
C4023
*
R3650
C0802
C3664
C0815
PP0908
C3506
C3505
C1150
C1151
C3670
C3653
C0801
*
C1202
C1110
C0751
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***
C1114
C1116
C1100
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*
C1224
C1113
C1101
TP1120
R0600
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*
*
C1317
C1107
C1106
C0600
C1280
FL1280
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*
*
*
C1115
C1112
C1246
C1225
PP1100
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*
*
*
C1226
C1245
C1109
C1154
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*
PP1020
C1137
C1140
C1121
C0603
PP1022
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*
*
C1131
C1133
C1201
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*
*
*
C1221
C1134
C1138
C1155
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*
*
C1129
C1132
C1127
R2201
C0602
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*
*
*
C1203
C1135
C1220
C1141
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*
*
C1128
C1222
C1126
*
*
C1120
C1136
C1139
C0744
C1330
C1123
C2005
C2004
R0951
C1312
PP1003
C1243
R0700
C2006
C1223
C2071
C2106
C1503
C1500
C1502
Q4500
*
R4500
C4500
C4503
C4504
L0601
L0602
C2305
*
C2300
C2322C2307
C2321C2320
C2311
C2330
C2303
C2304
*
C1505
C1504
C1507
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U_BUFFER_RF
C3208_RF
C3270_RF
L3201_RF
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C3204_RF
C3226_RF
C3227_RF
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C3209_RF
C3240_RF
L3202_RF
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*
C3220_RF
FD0505
C3603_RF
C4309_RF
U_LBPAD_RF
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L4224_RFC4230_RF
C4300_RF
C4227_RFC4208_RF
L4222_RF
U_VLBPAD_RF
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L4712_RF
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C3217_RF
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C4118_RF
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L4904_RF
C4413_RF
L4408_RF
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U_DSM_RF
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C4803_RFL4806_RF
L4905_RFC4901_RF
C4231_RF
L4223_RF
L5129_RF
FD0504
FD0516
GPS_SP1_RF
UPPER_LBMB_ANT_RF
C5105_RF
* FL5146_RF
L5101_RF *
C5106_RF
C5107_RF
C5101_RF
C5102_RF
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U_ANTPAC_RF
L5111_RF
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C5103_RF
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FD0501
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C5110_RF
FD0515
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R5137_RF
U_SWUANT_RF
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R5102_RF
UP_COAX_RF
R4304
PP4304
R4307
DZ4301
C4312
C4317
PP4303
C4320
C3662
C3651
C3661
XW3660
C3663
C3601
C3600
C3654
R3550
C1302
C3504
C3640
C2102
*
R3515
R3729
C1156
R0411
R1205
PP1101
C3650
*
U0901
C1322
R0950
C2112
C1241
C2007
R0408
R0407
R0903
C0750
PP0903
R0902
PP0902
C0752
C1323
PP1004
R0940
*
C1130
TP1100
R0909
R0910R0941
C2132
*
UPPER_HB_ANT_RF
PP4500
C4510
R4510
C4501
U4500
C4502
R2310
R2311
R2320
R2303R2300
U2300
C2414
*
C2301
C2302
*
L2300
R1500
*
DZ3102_RF
C3102_RF
C4041
Q2300
*
C2306
LOW_COAX_RF
*
C3911_RF
C3910_RF
C3913_RF
C3916_RF
C3904_RF
R3901_RF
C3902_RF
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C3917_RF
SP3_RF
L5135_RF
U_GPSLNA_RF
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FD0514
C5129_RF
C2210
R5136_RF
R2210
SP0502
C5130_RF
PP4306
*
C5109_RF
XW5100_RF
C4307
*
R4720
FL4720
C4720
*
FL4700
C4700
C4701
FL4701
FL4702
J4700
C4702
XW3620
C4703
DZ4713
FL4713C4713
C4721
C4722
BS0502
R0405
C0523
*
XW3600
R0406
R0404
R0402
R0409
R0401
R0410
R0930
R5205_RFR5202_RF
R5206_RFR5201_RF
L3200
C5220_RF
C5202_RF
PP3157_RF
C5221_RF
C5222_RF
PP4305
C3211
*
J4300
U4302
R4306
C4310
TP20 TP21
R0952
*
C4308
U0902
C4326
C4325
C4327
C4724
C4710
C4723
Q4701
R4710
*
DZ4710
C4313
C4711
FL4711
*
D4701
DZ4711
C4715
C2108
C4714
DZ4712
FL4712
R0906
C4712
*
U0900
C0900
C3554
C3552
C0522
C0521
C0520
R0907
R0801
R0721
R0802
C3612
R1203
XW1110
XW1120
XW2050
XW2080
XW1100
XW2070
C3231
C3201
C3202
C3232
C3299
FL3230
FL3200
C3106
FL3232
C3230
PP3122_RF
PP3121_RF
R4305
PP3127_RF
PP3158_RF
PP3162_RFPP3163_RF
PP3128_RF
PP3124_RF
PP3152_RF
PP3119_RF
PP3173_RF
R5210_RF
PP3120_RF
TP22
PP5304_RF
C4316
C4318
C4311
C4309
TP23
L4201L4202
L4200
*
*
*
*
XW4701
R4701
J4200
C4206
C4221
C4230
C4220
C4222
C4208
C4211
C4213
C4212
FL4230
FL4220
R4220FL4221
FL4222
FL4213
FL4212
FL4211
PP1103
PP1023
C4716
PP3191_RF
PP1102
R1202
R4020
C1320
R2240
C1310
C2240
R2261
R1200
R1204
R0803
XW2100
U0600
XW2105
XW2200
XW2230
XW0740
XW2040
PP1104PP1105
*
C1244
R0403
R0400
*
XW2030
R0640
R1201
R0720
R0701
C2070
PP3190_RF
PP08
L2001
L2000
C2008
C2009
C2002 C2011
C2010
C2003
R1520R0730
PP1520
PP1504PP1505
PP3115_RFPP3116_RF
C2220
R2220
L3203 L3204
L3202L3201
PP0701
PP0700
*
J3200
C3209
C3207
C5203_RF
R3204
R3203
C3205
C3233
C3221
C3234
FL3231
C3220
FL3220
XW3203
PP3186_RF
PP3105_RF
PP3123_RF
PP3101_RF
FL4241
*
C4207
C4204
FL4207
PP0900
PP3102_RF
PP1006
C1301
XW2240
XW2220
XW2210
C0704C0730
PP1503
TP5303_RF
C3203
C3208
C3204
C3206
FL3201
PP3154_RF
PP3153_RF
FD0502
*
XW3202
L3205
Q3140
PP3185_RF
R3140
C3122
C3123
C3124
FL3153
FL3154
FL3150
FL3155
FL3156
FL3100
C3200
FL3104
PP4301
*
U3200
R4303
C3210
PP4302
C4202
C4200
FL4200
C4201
C4203
FL4205
PP0901
R0901
PP0904
R0900
R0904
R0805
C2203
L2002
*
*
C2000
C0701
C0702C0703
PP1502
C3002
PP3155_RF
C3001
C3000
R3202
C3120
DZ3153
C3121
DZ3154
R3101
DZ3152
DZ3150
DZ3151
FL3151FL3152
DZ3155
C3126
DZ3156
C3127
FL3126FL3102FL3146
C3100
C3145
C3101
XW3630
C3146
C3104
C3144
C3105
J3100
C4241
C3143
C3125
FL3101
R3103
**
C3113
R3143
C3111
L3102 L3100
FL3111
FL3125
C3112
*
R3102
R0807
R0806
FL3110C3110
C3128
R0809
C3129
R5313_RF
C3130
C2107
TP5301_RF
C4205
SH0501
BS0501
PP0905
R0905
PP0906
C4004
C0513
R0960
R0808
R0920
R0804
R1002
C3373
C0512
C0510
C0511
C0709
C0710
C3396
C0712
C0711
C2041
C1314C1300
C2043
C2042
C2040
C2081
C1313
PP1010
C2080
C2030
C2031
R0922
C2100
C2050 R2260
C2260
C2014
C2051
XW0650
R0650
C0651
Y0600
*
R0651
C0650
C2023
C2022
C2026
C2024
C1104
C2016
C1103
C1105
C2015
C2018
C2012
C2017
C2019
C2013
*
L2011
XW3703
L2003
XW3704
*
L2012
L2010
*
TP06TP16
TP17
PP07
PP1500PP1501
TP14TP07
XW3103_RF
FD0511
*
FD0503
PP3199_RF
PP3196_RFPP3197_RF
PP3172_RF
PP3198_RF
XW3102_RF
PP0620PP0621
C3211_RF
U_BB_RF
*
FL_B17LP_RF
U_WTR_RF
C4314_RF
L4312_RF
C4311_RF
L4313_RF
FL_B39LP_RF
*
C4010_RF
*
XW4004_RF
*
R3502_RF
U3501_RF
C3430_RF
C3213_RF
C3434_RF
R3501_RF
PP3171_RF
XW3104_RF
PP3170_RF
R3104_RF
C3419_RF
C3427_RF
C3501_RF
C3203_RF
C3438_RF
C3215_RF
C3402_RF
C3414_RF
C3418_RF
C3436_RF
XW3101_RF
C3415_RF
R3506_RF
C3403_RF
C3412_RF
C3409_RF
C3406_RF
R3102_RFR3103_RF
C3421_RF
C3411_RF
C3432_RF
C4320_RF
*
FL_GPSRF_RF
C4304_RF
C4808_RF
*
L4810_RF
U_LB_SW_RF
L4816_RF
L4830_RF
*
C4816_RF
R4815_RF
C3833_RF
C3809_RF
C4305_RF
L4813_RF
C4809_RF
C4827_RF
L4814_RF
L4825_RF
C4820_RF
XW4300_RF
L4826_RF
C4831_RF
C3830_RFC3823_RF
L4829_RF
C4826_RF
L4827_RF
L4823_RF
C4832_RF
C4720_RF
R4700_RF
R3702_RF
L4512_RF
C4701_RF
*
L4713_RF
L4704_RF
C4817_RF
U_VLB_SW_RF
C4703_RF
L4705_RF
L4819_RF
XW4200_RF
L4602_RF
L4821_RF
*
L4004_RFL4002_RF
U_QPOET_RF
XW4001_RF
L4820_RF
*
FT_B40_RF
L4527_RF
C4006_RF
C4002_RF
*
C4001_RF
XW4002_RF
TP19
TP00
TP18 TP09
TP11 TP10
FL4602
FL4600
FL4612C4612
FL4611C4611
FL4610
FL4601
DZ4602
SL0501
FL4112
FL4105
FL4107
PP3140_RF
PP3139_RF
PP3138_RF
TP08
TP12
TP24TP15
TP13
C4650
C4652
C4651
TP01
C4654
C4653
FL4605
FL4642
C4642
FL4604
FL4603
FL4641
C4641
C4640
C4610
R4640
DZ4603
FL4624
DZ4601
FL4608
C4698
DZ4600
FL4620
C4699
DZ4610
R4600
C4696
FL4114
C4697
DZ4604
XW3901_RF
C4624
XW3900_RF
J4600
C4601
C4620
C4112
C4600
C4115
C4105
C4110
C4107
DZ4101
C4042
C4111
C4635C4634
C4106
C4116
*
C4100
C2115
FL4110
C2116
FL4143
C2113
C4117
XW3500
R4111
C4102
*
R4116
FL4100
Q2301
C4104
C4101
R2301
R2302
C4103
C2413
C2412
TP05
TP03
TP02
XW3902_RF
J2400
FD0512
PP3132_RF
PP3131_RF
*
PP3111_RF
PP3104_RF
PP3112_RF
SH0500
C3210_RF
R3601_RF
C3435_RF
C3425_RF
C3437_RF
C3422_RF
C3417_RF
C3405_RF
C3408_RF
XW3301_RF
C3424_RF
C3423_RF
C3401_RF
C3214_RF
C3428_RF
C3601_RF
C3433_RF
C3420_RF
C3429_RF
XW3801_RF
XW3802_RF
C3808_RF
XW3803_RFC3811_RF
C4423_RF
L4402_RF
C3817_RF
C3807_RF
C3824_RF
C3825_RF
C3826_RF
C2411C2410FL2400C2400
C4602_RF
*
XW2400
R4607_RF
XW4700_RF
C4407_RF
*
L4407_RF
FRX34B39_RF
*
L4604_RF
C4007_RF
C4003_RF
*
LOW_ANT_RF
8
No share Dick itesla.solutions
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
N69 MLB - EVT
7
6 5 4 3
2 1
ECNREV DESCRIPTION OF REVISION
CK APPD
DATE
2015-08-2400047524174 ENGINEERING RELEASED
D
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LAST_MODIFICATION=Wed Aug 19 11:42:47 2015
PAGE DATE PAGE DATECONTENTS
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27 WIFI/BT: MODULE AND FRONT END
28
30
<CSA>
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TABLE OF CONTENTS
SYSTEM:BOM TABLES
SYSTEM:N69 SPECIFIC [4]
SYSTEM:MECHANICAL
SOC:JTAG,USB,XTAL
SOC:PCIE
SOC:CAMERA & DISPLAY
SOC:SERIAL & GPIO
SOC:OWL
SOC:POWER (1/3)
SOC:POWER (2/3)
SOC:POWER (3/3)
NAND
SYSTEM POWER:PMU (1/3)
SYSTEM POWER:PMU (2/3)
SYSTEM POWER:PMU (3/3)
SYSTEM POWER:CHARGER
SYSTEM POWER:BATTERY CONN
SENSORS:MOTION SENSORS
CAMERA:FOREHEAD FLEX B2B
CAMERA:REAR CAMERA B2B
CAMERA:STROBE DRIVER
AUDIO:CALTRA CODEC (1/2)
AUDIO:CALTRA CODEC (2/2)
AUDIO:SPEAKER DRIVER
DISPLAY:POWER
MESA POWER AND IO FILTERS
DISPLAY FLEX
D403 (TOUCH B2B, DRIVER ICS)29
I/O:TRISTAR 2
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
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48
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52
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55
56
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<CSA>
46
49
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CONTENTS SYNCSYNC
I/O:DOCK FLEX B2B
I/O:BUTTON FLEX B2B
BASEBAND:RADIO SYMBOL
page1
CELL:ALIASES
AP INTERFACE & DEBUG CONNECTORS
BASEBAND PMU (1 0F 2)
BASEBAND PMU (2 OF 2)
BASEBAND (1 OF 2)
BASEBAND (1 OF 2)
MOBILE DATA MODEM (2 OF 2)
RF TRANSCEIVER (1 0F 3)
RF TRANSCEIVER (2 OF 3)
RF TRANSCEIVER (3 OF 3)
QFE DCDC
2G PA
VERY LOW BAND PAD
LOW BAND PAD
MID BAND PAD
HIGH BAND PAD
ANTENNA SWITCH
HIGH BAND SWITCH
RX DIVERSITY
RX DIVERSITY (2)
GPS
ANTENNA FEEDS
STOCKHOLM
OMIT_TABLE_RF
Radio Subdesign Ports
D
C
B
A
SCH 051-00648 BRD 820-00282
MCO 056-01352
BOM 639-00931 (N69 BETTER) BOM 639-01012 (N69H BETTER)
BOM 639-01231 (N69 BEST) BOM 639-01232 (N69H BEST) BOM 639-01271 (N69 ULTRA) BOM 639-01272 (N69H ULTRA)
TABLE OF CONTENTS
DRAWING TITLE
SCH,MLB,N69
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
051-00648
REVISION
4.0.0
BRANCH
PAGE
1 OF 49
SHEET
1 OF 60
A
SIZEDRAWING NUMBER
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SCHEMATIC & PCB BOM CALLOUTS
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
SCHSCH,MLB,N69051-00648 1 CRITICAL
1
PCBF,MLB,N69820-00282 PCB CRITICAL
EEEE CODE FOR 639-00931 16GB825-6838 CRITICAL1 EEEE_GH6K
1 EEEE_GJYD825-6838 CRITICAL
EEEE CODE FOR 639-01012 16GB
EEEE CODE FOR 639-01231 32GB CRITICAL
EEEE_GN7J1825-6838
EEEE CODE FOR 639-01232 32GB825-6838 1 CRITICALEEEE_GN7H
825-6838 EEEE CODE FOR 639-01271 64GB EEEE_GP3V
825-6838
1 CRITICAL
CRITICALEEEE_GP3WEEEE CODE FOR 639-01272 64GB1
S3E NAND BOM OPTIONS
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
335S00054 U1500 CRITICAL1
335S00072
335S00076 1 CRITICAL
NAND,1YNM,16GX8,S3E,64G,T,SLGA70
NAND,1YNM,32GX8,S3E,64G,T,SLGA70
NAND,1YNM,64GX8,S3E,TLC,128G,H,ULGA70
PART NUMBER
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
U15001
U1500
CRITICAL
TABLE_ALT_HEAD
TABLE_ALT_ITEM
335S00054 NAND_16G U1500335S00071 HYNIX 16G SLGA70
TABLE_ALT_ITEM
335S00085 NAND_32G U1500 TOSHIBA 16G SLGA70335S00072
CARBON BOM OPTIONS
PART# DESCRIPTIONQTY
132S0316
117S0202 1
IC,CARBON,MPU-6700-12,LGA16
IC,ACCEL,3-AXIS,DIG,BMA282,LGA14 INVENSENSE_CARBONU3020338S1163 1
1132S0316 INVENSENSE_CARBONC3020
CAP,CER,X5R,0.1UF,20%,6.3V,01005
CAP,CER,X5R,1UF,20%,6.3V,0201
CAP,CER,X5R,0.1UF,20%,6.3V,01005
RES,MF,20OHM,5%,1/32W,01005
1
RES,MF,20OHM,5%,1/32W,01005
1 INVENSENSE_CARBON117S0202
RES,MF,20OHM,5%,1/32W,01005
IC,CARBON,MPU-6800-00,LGA16
1 U3010 INVENSENSE_CARBON_1_1338S00087
U3010338S00017 1 INVENSENSE_CARBON
C3021 INVENSENSE_CARBON138S0692 1
C3022 INVENSENSE_CARBON1
R3022
BOM OPTIONREFERENCE DESIGNATOR(S)
INVENSENSE_CARBONR3020117S0202
INVENSENSE_CARBONR3021
COMPASS PART NUMBER
PART# DESCRIPTIONQTY
338S00084 U3000 COMMON1
IC,COMPASS,MAGNESIUM,601A-19,FLGA14
BOM OPTIONREFERENCE DESIGNATOR(S)
SHIELD PART NUMBERS
PART# DESCRIPTIONQTY
SHIELD,EMI,UPPER FRONT,N69
SHIELD,EMI,LOWER FRONT,N69806-03630 1 COMMONSH0501
SHIELD,EMI,BACK,N69 SH05031 COMMON806-03556
SH0500 COMMON1806-03629
BOM OPTIONREFERENCE DESIGNATOR(S)
BOM OPTIONCRITICAL
?
?
EEEE_16G
EEEE_16GH
EEEE_32G
EEEE_32GH
EEEE_64G
EEEE_64GH
BOM OPTIONCRITICAL
NAND_16G
NAND_32G
NAND_64G
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
ALTERNATE BOM OPTIONS
PART NUMBER
138S0831138S00032 ALTERNATE TY,2.2UF,0201C0610
138S0831 KYOCERA,2.2UF,0201ALTERNATE C0610138S00049
138S00003 ALTERNATE138S00005 TY,15UF,0402C1500
118S0764
ALTERNATE L2060 CYNTEC,1UH,1608152S1929152S2052
155S0453 FL3101 TY,FERR,120-OHM,01005ALTERNATE155S0773
377S0168 377S0140 DZ3150ALTERNATE
ALTERNATE FL4200155S0581155S00067
155S00009155S00012 L3100ALTERNATE
138S0739138S0706
ALTERNATE138S0945
ALTERNATE155S00095 FL1280155S00068
138S0652 ALTERNATE
132S0436132S0400 ALTERNATE C1280
ALTERNATE
ALTERNATE138S0986
335S00066
ALTERNATE335S0946 U0900
138S0867138S00020 C1100ALTERNATE
FL3100155S0513 ALTERNATE MURATA,FERR,22-OHM155S0660
R2250ALTERNATE118S0717
C5302_RFALTERNATE
C5302_RF138S0739
C3650138S0648
FL3151155S0941155S0960
C5201_RF138S00024
C1100138S0867138S00022 ALTERNATE
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
KYOCERA,15UF,0402C1500138S00048 138S00003 ALTERNATE
PANASONIC,3.92K-OHM,0201
TY,4.3UF,0402ALTERNATE138S0835 C1106138S00006
TDK,VARISTOR,6.8V,100PF,01005
TDK,FERR,240-OHM,0201
MURATA,CHOKE,65-OHM,0605
MURATA,CAP,CER,1UF,20%,10V,X5R,0201
KYOCERA,CAP,CER,1UF,20%,10V,X5R,0201
FERR BD,100 OHM,25%,100MA,2 OHM,01005
TY,4.7UF,0402
CAP,CER,X5R,0.22UF,20%,6.3V,01005
FERR BD,70 OHM,25%,300MA,0.4 DCR,01005
CAP,CER,3-TERM,7.5UF,20%,4V,0402
IC,EEPROM,16KX8,1.8V,I2C,WLCSP4
DIODES INC. ACT DIODEALTERNATE376S00047 Q2300376S00106
CUMULUS 2ND FLOWALTERNATE U4301343S0638343S0688
TY,10UF,0402
MURATA,10UF,0402
PMU/SOC BOM OPTIONS
PART# DESCRIPTIONQTY
POP,MALTA+2GB 25NM DDR,A1,M,DEV
339S00121 MALTA
1 U0600
RES,MF,3.01KOHM,1%,1/32W,01005
1 MALTA
1 NOSTUFFC0730131S0307
CAP,CER,NPO/COG,100PF,5%,16V,01005
RES,MF,330OHM,1%,1/32W,01005
R0730118S00009
C0731132S0316 NOSTUFF1 CAP,CER,X5R,0.1UF,20%,6.3V,01005
1338S00170 U2000 MALTAIC,PMU,ANTIGUA,D2255A1,OTP-BG
PART# DESCRIPTIONQTY
339S00096 1 U0600 MAUIPOP,MAUI+2GB 25NM DDR,C0,H,DEV
118S0631
131S0307 C07301 MAUI
RES,MF,100OHM,1%,1/32W,01005
1 R0730 MAUI
CAP,CER,NPO/COG,100PF,5%,16V,01005
117S0161 R06511 MAUIRES,MF,0OHM,1/32W,01005
132S0316 1 C0731
CAP,CER,X5R,0.1UF,20%,6.3V,01005
IC,PMU,ANTIGUA,D2255A1,OTP-YG
U20001 MAUI338S00171
BOM OPTIONREFERENCE DESIGNATOR(S)
MALTA1 R0651118S00025
BOM OPTIONREFERENCE DESIGNATOR(S)
MAUI
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
NOT ALL REFERENCE DESIGNATORS LISTED. USED 91 TIMES IN DESIGN.
USED 91 TIMES IN DESIGN.
USED 5 TIMES IN DESIGN.
USED 61 TIMES IN DESIGN.
USED 61 TIMES IN DESIGN.
USED 1 TIME IN DESIGN.
USED 20 TIMES IN DESIGN.
USED 1 TIME IN DESIGN.
USED 35 TIMES IN DESIGN.
USED 9 TIMES IN DESIGN.
USED 5 TIMES IN DESIGN.
USED 10 TIMES IN DESIGN.
USED 4 TIMES IN DESIGN.
USED 4 TIMES IN DESIGN.
USED 1 TIME IN DESIGN.
USED 9 TIMES IN DESIGN.
USED 1 TIME IN DESIGN.
USED 8 TIMES IN DESIGN.
USED 1 TIME IN DESIGN.
USED 1 TIME IN DESIGN.
USED 1 TIME IN DESIGN.
USED 1 TIME IN DESIGN.
USED 51 TIMES IN DESIGN.
USED 51 TIMES IN DESIGN.
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
D
C
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A
POWER INDUCTOR ALTERNATES
PART NUMBER
152S00121 152S00081 L2001 TAIYO 2012 0.47UH?
152S00120 152S00077
152S00123 TAIYO 3225 15UH? L4020152S1936
?152S00117 L2000 TAIYO 2016 1.0UH152S00074
L2070?
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
TAIYO 2016 1.0UH 0.65MM
TAIYO 2016 1.2UHL3700152S00075152S00118 ?
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
SOC ALTERNATES
PART NUMBER
ALTERNATE339S00122 339S00121
339S00123 339S00121
PART NUMBER
ALTERNATE339S00096339S00097 U0600
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
TABLE_ALT_ITEM
MALTA DEV, H DRAMU0600
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
TABLE_ALT_ITEM
MAUI DEV, M DRAM
TABLE_ALT_ITEM
U0600ALTERNATE339S00096 MAUI DEV, S DRAM339S00098
SYNC_MASTER=N/A
SYNC_DATE=N/A
A
PAGE TITLE
SYSTEM:BOM TABLES
DRAWING NUMBER SIZE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
051-00648
REVISION
4.0.0
BRANCH
PAGE
3 OF 49
SHEET
2 OF 60
D
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TESTPOINTS
31 30 17
33 18 17
PP5V0_USB
PP_BATT_VCC
POWER
TP00
TP-P6
ROOM=TEST
TP01
TP-P6
ROOM=TEST
TP02
TP-P6
ROOM=TEST
TP03
TP-P6
ROOM=TEST
TP05
TP-P55
ROOM=TEST
N69 I2C DEVICE MAP
I2C BUS
I2C0
AMUX
PMU_AMUX_AY
A
A
POWER GROUND
VBUS
16
PMU_AMUX_BY
16
TP16
A
TP-P55
ROOM=TEST
I2C1
TP17
A
TP-P55
ROOM=TEST
MOJAVE
A
VBATT
A
A
TP-P55
ROOM=TEST
A
TP24
TP 24 FOR USB
FIXTURE SI
27 26
27 26
MESA_TO_BOOST_EN
PP11V3_MESA
TP18
TP-P55
ROOM=TEST
TP19
TP-P55
ROOM=TEST
LCM
A
A
I2C2
OWL
ISP I2C0
DEVICE
ANTIGUA PMU
CHESTNUT
BACKLIGHT
TIGRIS
SPEAKER AMP
TRISTAR
ALS
REAR CAM
BINARY
0100111X
1100010X
1110101X
0011010X 0X1A
0101001X
TBD TBDTBD
7-BIT HEX
0X741110100X
0X62 0XC4
0X75
0X401000000X
0X29
N/AN/AUNUSED
8-BIT HEX
0XE8
0X4E0X27
D
0XEA
0X80
0X34
0X52
N/A
C
16 9 5
28 21 20 14 13 12 9 8 7 6 5 3
PMU_TO_SYSTEM_COLD_RESET_L
FORCE_DFU
8
PP1V8
29
DFU_STATUS
8
RESET
TP06
TP-P55
ROOM=TEST
DFU
TP07
TP-P55
ROOM=TEST
PP07
P4MM-NSM
SM
1
PP
ROOM=TEST
PP08
P4MM-NSM
SM
1
PP
ROOM=TEST
PP_LCM_BL_CAT1_CONN
28
PP_LCM_BL_CAT2_CONN
28
A
SOC & BB RESET
TP20
TP-P55
ROOM=TEST
TP21
TP-P55
ROOM=TEST
A
ISP I2C1
A
FRONT CAM
TOUCH I2C
1100011XLED DRIVER
0110110X
N/A
0X63
0XC6
0X6C0X36
N/AN/AUNUSED
C
PP_LCM_BL_ANODE_CONN
28
FORCE DFU PROCEDURE:
A
28
LCD_TO_AP_PIFA_CONN
1. FROM OFF MODE SHORT TP07 TO PP07
2. PLUG IN E75 CABLE TO FORCE DFU
TP22
TP-P55
ROOM=TEST
TP23
TP-P55
ROOM=TEST
A
0xA20x511010001XSEP EEPROMSEP I2C
A
BOOTSTRAPPING:BOARD REV
BOARD ID BOOT CONFIG
B
A
90_TRISTAR_DP1_CONN_P
31 30
90_TRISTAR_DP1_CONN_N
31 30
90_TRISTAR_DP2_CONN_P
31 30
90_TRISTAR_DP2_CONN_N
31 30
31 30
31 30
31 30
PP_TRISTAR_ACC1
PP_TRISTAR_ACC2
TRISTAR_CON_DETECT_L
E75
TP08
TP-P55
ROOM=TEST
TP09
TP-P55
ROOM=TEST
TP10
TP-P55
ROOM=TEST
TP11
TP-P55
ROOM=TEST
TP12
TP-P55
ROOM=TEST
TP13
TP-P55
ROOM=TEST
TP14
TP-P55
ROOM=TEST
TP15
TP-P55
ROOM=TEST
8
OUT
A
TRISTAR USB
A
A
8
OUT
8
OUT
8
OUT
BOARD_REV3
BOARD_REV2
BOARD_REV1
BOARD_REV0
R0400
R0401
NOSTUFF
R0402
01005 MF
NOSTUFF
R0403
TRISTAR DEBUG UART
A
8
OUT
A
8
OUT
BOARD_ID4
BOARD_ID3
TRISTAR ACCESSORY ID
A
A
A
ACCESSORY POWER
8
BI
8
OUT
8
OUT
8
OUT
8
OUT
8
OUT
BOARD_ID2
BOARD_ID1
BOARD_ID0
BOOT_CONFIG2
BOOT_CONFIG1
BOOT_CONFIG0
RESISTOR STUFF = HIGH '1'
RESISTOR NOSTUFF = LOW '0'
NOSTUFF
R0404
01005 MF
NOSTUFF
R0405
01005
NOSTUFF
R0406
R0407
01005
NOSTUFF
R0408
NOSTUFF
R0409
01005 MF
R0410
01005
R0411
01005
ROOM=SOC
1 2
MF01005 1/32W
5%
ROOM=SOC
1 2
5%
ROOM=SOC
1 2
5%
ROOM=SOC
1 2
MF01005
5%
ROOM=SOC
1 2
5%
ROOM=SOC
1 2
MF 1/32W
5%
ROOM=SOC
1 2
MF01005
5%
ROOM=SOC
1 2
MF 1/32W
5%
ROOM=SOC
1 2
5%
ROOM=SOC
1 2
5%
ROOM=SOC
1 2
5%
ROOM=SOC
1 2
MF 1/32W
5%
1.00K
1.00K
1/32WMF01005
1.00K
1/32W
1.00K
1/32W
1.00K
1/32W
1.00K
1.00K
1/32W
1.00K
1.00K
1/32W01005 MF
1.00K
1/32W
1.00K
1/32WMF
1.00K
PP1V8
3 5 6 7 8 9 21 31 41 02 12 82 29
BOARD_REV[3:0]
FLOAT=LOW, PULLUP=HIGH
1111 PROTO0 MLB 1110 PROTO1 1101 PROTO2
SELECTED -->
1100 EVT XXXX CARRIER XXXX DVT
BOARD_ID[4:0]
FLOAT=LOW, PULLUP=HIGH
SELECTED -->
00010 N69 MLB 00011 N69 DEV
BOOT_CONFIG[2:0]
FLOAT=LOW, PULLUP=HIGH
000 SPI0 001 SPI0 TEST MODE 010 NVME0 x2 MODE
SELECTED -->
SYNC_MASTER=N/A SYNC_DATE=N/A
PAGE TITLE
011 NVME0 x2 TEST MODE 100 NVME0 x1 MODE 101 NVME0 x1 TEST MODE 110 SLOW SPI0 TEST MODE 111 FAST SPI0 TEST MODE
SYSTEM:N69 SPECIFIC [4]
DRAWING NUMBER SIZE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
051-00648
REVISION
4.0.0
BRANCH
PAGE
4 OF 49
SHEET
3 OF 60
D
B
A
8 7 5 4 2 1
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1
C0510
100PF
5%
16V
2
NP0-C0G 01005
1
C0511
56PF
5%
16V
2
NP0-C0G 01005
BOARD STANDOFFS
AND AC COUPLING CAPS FOR
COMPASS RETURN CURRENTS
EAST_STANDOFF_AC_GND_SCREW
1
C0512
3.3PF
+/-0.1PF
16V
2
CERM 01005
1
C0513
56PF
5%
16V
2
NP0-C0G 01005
WEST_STANDOFF_AC_GND_SCREW
TOP-SIDE, EAST
1
BS0501
STDOFF-2.7OD1.4ID-1.04H-SM-1
TOP-SIDE, WEST
1
SHIELDS
UPPER FRONT SHIELD
1
SH0500
SHLD-EMI-UPPER-FRONT-N69
OMIT_TABLE
LOWER FRONT SHIELD
1
SH0501
SHLD-EMI-LOWER-FRONT-N69
OMIT_TABLE
SM
SM
345678
2 1
FIDUCIALS
FD0501
FID
0P5SM1P0SQ-NSP
1
ROOM=ASSEMBLY
FD0502
FID
0P5SM1P0SQ-NSP
1
ROOM=ASSEMBLY
FD0503
FID
0P5SM1P0SQ-NSP
1
ROOM=ASSEMBLY
FD0505
FID
0P5SM1P0SQ-NSP
1
ROOM=ASSEMBLY
D
C
1
C0520
100PF
5%
16V
2
NP0-C0G 01005
1
C0521
56PF
5%
16V
2
NP0-C0G 01005
1
C0522
3.3PF
+/-0.1PF
16V
2
CERM 01005
1
C0523
56PF
5%
16V
2
NP0-C0G 01005
BS0502
STDOFF-2.7OD1.4ID-1.04H-SM-1
PLATED SHIELD SLOT
SL0501
TH-NSP
1
SL-1.20X0.40-1.50X0.70-NSP
TOP-SIDE, GROUND SPRING
SPRING-SUPER-COWLING-GROUND-X145
SP0502
1
CLIP-SM
FD0510
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0511
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0512
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0514
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0515
FID
0P5SQ-SMP3SQ-NSP
1
C
B
NORTH WIFI UNDERFILL BLOCKING
CKPLUS_WAIVE=TERMSHORTED
R0500
R0501
01005
CKPLUS_WAIVE=TERMSHORTED
1 2
MF01005
0%
1 2
MF
0%
0.00
1/32W
0.00
1/32W
ROOM=ASSEMBLY
FD0504
FID
0P5SM1P0SQ-NSP
1
ROOM=ASSEMBLY
FD0516
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
B
A
COMPASS AC GROUNDING CAPS
COMPASS_AC_GND_SCREW
1
C0540
0.01UF
10%
25V
2
X5R-CERM 0201
ROOM=ASSEMBLY
1
C0541
100PF
2%
50V
2
C0G 0201
ROOM=ASSEMBLY
1
C0542
56PF
2%
50V
2
NP0-C0G-CERM 0201
ROOM=ASSEMBLY
1
C0543
3.3PF
+/-0.1PF
25V
2
C0G-CERM 0201
ROOM=ASSEMBLY
PP0501
P4MM-NSM
SM
1
PP
SYNC_MASTER=N/A SYNC_DATE=N/A
PAGE TITLE
SYSTEM:MECHANICAL
DRAWING NUMBER SIZE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
051-00648
REVISION
4.0.0
BRANCH
PAGE
5 OF 49
SHEET
4 OF 60
D
A
8 7 5 4 2 1
36
SOC - USB, JTAG, XTAL
No share Dick itesla.solutions
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2 1
D
15 7 6
VDD12_PLL_LPDP:1.14-1.26V @2mA MAX VDD12_PLL_SOC: 1.14-1.26V @12mA MAX VDD12_PLL_CPU: 1.14-1.26V @2mA MAX
R0600
0.00
PP1V2
1 2
0%
1/32W
MF
01005
ROOM=SOC
PP1V2_PLL PP1V8
C0600
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=SOC
C0601
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=SOC
1
C0604
0.22UF
20%
6.3V
2
X5R 0201
ROOM=PMU
C0602
0.01UF
10%
6.3V
2
X5R 01005
ROOM=SOC
C0603
0.01UF
10%
6.3V
2
X5R 01005
ROOM=SOC
AP21
C15
F22
U20
T19
W19
AF13
AL21
1
C0612
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=SOC
AN20
PP1V8_XTAL
AL34
1
C0611
0.1UF
20%
2
X5R-CERM 01005
ROOM=SOC
PP3V3_USB
C0620
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=SOC
VDD18_USB: 1.71-1.89V @20mA MAX VDD18_XTAL:1.62-1.98V @2mA MAX
FL0610
1KOHM-25%-0.2A
1 2
0201
1
C0610
2.2UF
20%
6.3V
26.3V X5R-CERM
0201
ROOM=SOC
15
VDD33_USB:3.14-3.46V @5mA MAX
ROOM=SOC
D
3 6 7 8 9 21 31 41 02 12 82 92
C
33
33
30
30
BI
BI
BI
IN
PP0620
P2MM-NSM
SM
1
PP
ROOM=SOC
50_AP_BI_BB_HSIC0_DATA 50_AP_BI_BB_HSIC0_STB
PP0621
P2MM-NSM
SM
1
PP
ROOM=SOC
SWD_DOCK_BI_AP_SWDIO SWD_DOCK_TO_AP_SWCLK
NC
NC
NC
NC
NC
AN22
AN21
C16
D15
Y32
AC32
AB31
AA32
AB32
AA31
VDD12_UH1_HSIC0
UH1_HSIC0_DATA
UH1_HSIC0_STB
UH2_HSIC1_DATA
UH2_HSIC1_STB
JTAG_SEL
JTAG_TRST*
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK
VDD12_PLL_LPDP
VDD12_UH2_HSIC1
VDD18_USB
VDD12_PLL_CPU
VDD12_PLL_SOC
OMIT_TABLE
CRITICAL
U0600
MAUI-2GB-25NM-DDR-H
FCMSP
SC58980X0B-A040
SYM 1 OF 14
ROOM=SOC
VDD33_USB
VDD18_XTAL
ANALOGMUX_OUT
USB_D_P
USB_D_N
USB_VBUS
USB_ID
AP24
AT20
AT19
AP19
AR19
AP_TO_PMU_AMUX_OUT
90_USB_AP_DATA_AP_P 90_USB_AP_DATA_AP_N
USB_VBUS_DETECT
NC
16
OUT
L0601
15NH-250MA
1 2
ROOM=TRISTAR
0201
17
IN
L0602
15NH-250MA
1 2
0201
ROOM=TRISTAR
90_USB_AP_DATA_P 90_USB_AP_DATA_N
BI
BI
C
30
30
B
PP0610
ROOM=SOC
P3MM-NSM
SM
1
PP
16 9 3
30 26 16 9
16
13
IN
IN
OUT
OUT
PMU_TO_SYSTEM_COLD_RESET_L
PMU_TO_OWL_ACTIVE_READY
AP_TO_PMU_TEST_CLKOUT
AP_TO_NAND_RESET_L
AC31
H33
AR23
AN23
H32
AF6
AL22
AG25
COLD_RESET*
CFSB
TST_CLKOUT
S3E_RESET*
HOLD_RESET
TESTMODE
FUSE1_FSRC
FUSE2_FSRC
USB_REXT
WDOG
XI0
XO0
AP18
Y33
AK35
AL35
USB_REXT
AP_TO_PMU_WDOG_RESET
45_XTAL_AP_24M_IN 45_XTAL_AP_24M_OUT
OUT
16
R0640
200
1% 1/32W MF 01005
2
ROOM=SOC
R0650
511K
1% 1/32W MF 01005
ROOM=SOC
R0651
0.00
1 2
0%
1/32W
MF
01005
ROOM=SOC
OMIT_TABLE
24.000MHZ-30PPM-9.5PF-60OHM
45_SOC_24M_O
1
C0650
12PF
5% 16V
2
CERM 01005
ROOM=SOC
CRITICAL
ROOM=SOC
Y0600
1.60X1.20MM-SM
1 3
2 4
45_AP_XTAL_GND
C0651
12PF
5% 16V CERM
2
01005
ROOM=SOC
B
XW0650
SHORT-10L-0.1MM-SM
1 2
ROOM=SOC
A
SYNC_MASTER=N/A SYNC_DATE=N/A
PAGE TITLE
SOC:JTAG,USB,XTAL
DRAWING NUMBER SIZE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
8 7 5 4 2 1
36
REVISION
BRANCH
PAGE
SHEET
051-00648
4.0.0
6 OF 49
5 OF 60
A
D
D
No share Dick itesla.solutions
SOC - PCIE INTERFACES
VDD12_PCIE_REFBUF:1.08-1.26V @50mA MAX
15 7 5
VDD12_PCIE_TXPLL: 1.08-1.32V @10mA MAX VDD12_PCIE: 1.14-1.26V @115mA MAX
PP1V2
1
C0740
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
1
C0741
1.0UF
20%
6.3V
2
X5R 0201-1
ROOM=SOC
1
C0742
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=SOC
XW0740
SHORT-10L-0.1MM-SM
1 2
ROOM=SOC
1
C0744
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=SOC
PP1V2_PCIE_TXPLL
1
C0743
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=SOC
1
C0731
0.1UF
20%
6.3V
2
X5R-CERM 01005
OMIT_TABLE
ROOM=SOC
AK28
AK25
AL24
AL27
AL26
AJ26
AH28
AJ25
AL23
AJ29
AL29
AJ24
AK27
AJ27
1
C0752
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=SOC
345678
VDD085_PCIE:0.802-TBDV @TBDmA MAX
PP_FIXED
1
C0751
1.0UF
20%
6.3V
2
X5R 0201-1
ROOM=SOC
1
C0750
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
7 11 41
2 1
D
C
13
IN
13
IN
13
OUT
13
OUT
13
IN
13
13
13
IN
OUT
OUT
PCIE LINK 0PCIE LINK 1
PCIE_EXT_C
0.1UF
X5R-CERM
01005
0.1UF
X5R-CERM
01005
0.1UF
X5R-CERM
01005
90_PCIE_NAND_TO_AP_RXD0_C_P 90_PCIE_NAND_TO_AP_RXD0_C_N
90_PCIE_AP_TO_NAND_TXD0_C_P
90_PCIE_NAND_TO_AP_RXD0_P 90_PCIE_NAND_TO_AP_RXD0_N
90_PCIE_AP_TO_NAND_TXD0_P
C0701
ROOM=SOC
C0702
ROOM=SOC
C0703
ROOM=SOC
1 2
20%
6.3V
1 2
20%
6.3V
1 2
20%
6.3V
90_PCIE_AP_TO_NAND_TXD0_N 90_PCIE_AP_TO_NAND_TXD0_C_N
C0704
ROOM=SOC
C0705
90_PCIE_NAND_TO_AP_RXD1_P 90_PCIE_NAND_TO_AP_RXD1_C_P 90_PCIE_NAND_TO_AP_RXD1_N
ROOM=SOC
C0706
ROOM=SOC
C0707
90_PCIE_AP_TO_NAND_TXD1_P 90_PCIE_AP_TO_NAND_TXD1_N
ROOM=SOC
C0708 1 2
ROOM=SOC
1 2
6.3V
1 2
20%
6.3V
1 2
6.3V
1 2
20%
6.3V
20%
6.3V
0.1UF
X5R-CERM20% 01005
0.1UF
X5R-CERM 01005
0.1UF
X5R-CERM20% 01005
0.1UF
X5R-CERM 01005
0.1UF
X5R-CERM 01005
90_PCIE_NAND_TO_AP_RXD1_C_N
90_PCIE_AP_TO_NAND_TXD1_C_P 90_PCIE_AP_TO_NAND_TXD1_C_N
AP29
AM30
AN30
AT32
AR32
AM28
AN28
AT31
AR31
PCIE_EXT_C
PCIE_RX0_P
PCIE_RX0_N
PCIE_TX0_P
PCIE_TX0_N
PCIE_RX1_P
PCIE_RX1_N
PCIE_TX1_P
PCIE_TX1_N
VDD12_PCIE
VDD12_PCIE_TXPLL
VDD085_PCIE
VDD12_PCIE_REFBUF
OMIT_TABLE
CRITICAL
U0600
MAUI-2GB-25NM-DDR-H
FCMSP
SC58980X0B-A040
SYM 2 OF 14
ROOM=SOC
PCIE_REF_CLK0_P
PCIE_REF_CLK0_N
PCIE_REF_CLK1_P
PCIE_REF_CLK1_N
PCIE_REF_CLK2_P
PCIE_REF_CLK2_N
PCIE_REF_CLK3_P
PCIE_REF_CLK3_N
PCIE_CLKREQ0*
PCIE_CLKREQ1*
PCIE_CLKREQ2*
PCIE_CLKREQ3*
AN35
AP35
AN34
AP34
AM32
AN32
AM31
AN31
AT11
AP12
AR12
AT12
NC
NC
NC
NC
NC
NC
90_PCIE_AP_TO_NAND_REFCLK_P 90_PCIE_AP_TO_NAND_REFCLK_N
90_PCIE_AP_TO_WLAN_REFCLK_P 90_PCIE_AP_TO_WLAN_REFCLK_N
OUT
OUT
OUT
OUT
13
13
33
33
R0720
100K
5% 1/32W MF 01005
ROOM=SOC
P2MM-NSM
SM
1
PP
P2MM-NSM
SM
1
PP
PP0700
PP0701
R0721
100K
5% 1/32W MF 01005
ROOM=SOC
PP1V8
3 5 7 8 9 21 31 41 02 12 82 92
PCIE_NAND_TO_AP_CLKREQ_L PCIE_WLAN_TO_AP_CLKREQ_L
BI
BI
C
13
33
B
33
33
33
33
IN
IN
OUT
OUT
90_PCIE_WLAN_TO_AP_RXD_P 90_PCIE_WLAN_TO_AP_RXD_N
90_PCIE_AP_TO_WLAN_TXD_P 90_PCIE_AP_TO_WLAN_TXD_N
C0709 1 2
ROOM=SOC
20%
6.3V
C0710
ROOM=SOC
20%
6.3V 01005
C0711
ROOM=SOC X5R-CERM
20%
6.3V
C0712
20%ROOM=SOC
1 2
1 2
1 2
X5R-CERM 01005
X5R-CERM
01005
X5R-CERM
010056.3V
0.1UF
0.1UF
0.1UF
0.1UF
90_PCIE_WLAN_TO_AP_RXD_C_P 90_PCIE_WLAN_TO_AP_RXD_C_N
90_PCIE_AP_TO_WLAN_TXD_C_P 90_PCIE_AP_TO_WLAN_TXD_C_N
NC
NC
NC
NC
AM27
AN27
AT28
AR28
AM26
AN26
AT26
AR26
PCIE_RX2_P
PCIE_RX2_N
PCIE_TX2_P
PCIE_TX2_N
PCIE_RX3_P
PCIE_RX3_N
PCIE_TX3_P
PCIE_TX3_N
PCIE_PERST0*
PCIE_PERST1*
PCIE_PERST2*
PCIE_PERST3*
PCIE_EXT_REF_CLK_P
PCIE_EXT_REF_CLK_N
PCIE_RX_TX_BYPASS_CLK_P
PCIE_RX_TX_BYPASS_CLK_N
AR10
AT10
AP11
AR11
AR33
AT33
AT29
AR29
NC
NC
R0700
100K
5% 1/32W MF 01005
ROOM=SOC
R0701
100K
5% 1/32W MF 01005
ROOM=SOC
PCIE_AP_TO_NAND_RESET_L PCIE_AP_TO_WLAN_RESET_L
OUT
OUT
13
33
B
A
NC
NC
NC
NC
AM25
AN25
AR24
AT24
PCIE_RX4_P
PCIE_RX4_N
PCIE_TX4_P
PCIE_TX4_N
PCIE_RCAL_P
PCIE_RCAL_N
AT30
AR30
45_PCIE_RCAL_N
R0730
3.01K
1% 1/32W MF 01005
ROOM=SOC
OMIT_TABLE
1
C0730
100PF
5% 16V
2
NP0-C0G 01005
ROOM=SOC
OMIT_TABLE
PAGE TITLE
SOC:PCIE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=N/ASYNC_MASTER=N/A
DRAWING NUMBER SIZE
051-00648
REVISION
D
4.0.0
BRANCH
PAGE
7 OF 49
SHEET
6 OF 60
A
8 7 5 4 2 1
36
SOC - CAMERA & DISPLAY INTERFACES
No share Dick itesla.solutions
345678
2 1
D
C
B
28
28
21
21
21
21
21
21
21
21
21
21
28
28
28
28
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
0.756-0.893V @11mA MAX
14 11 6
PP_FIXED
90_MIPI_RCAM_TO_AP_DATA0_CONN_P 90_MIPI_RCAM_TO_AP_DATA0_CONN_N
90_MIPI_RCAM_TO_AP_DATA1_CONN_P 90_MIPI_RCAM_TO_AP_DATA1_CONN_N
90_MIPI_RCAM_TO_AP_DATA2_CONN_P 90_MIPI_RCAM_TO_AP_DATA2_CONN_N
90_MIPI_RCAM_TO_AP_DATA3_CONN_P 90_MIPI_RCAM_TO_AP_DATA3_CONN_N
90_MIPI_RCAM_TO_AP_CLK_CONN_P 90_MIPI_RCAM_TO_AP_CLK_CONN_N
45_RCAM_REXT
90_MIPI_AP_TO_LCM_DATA0_P 90_MIPI_AP_TO_LCM_DATA0_N
90_MIPI_AP_TO_LCM_DATA1_P 90_MIPI_AP_TO_LCM_DATA1_N
90_MIPI_AP_TO_LCM_CLK_P 90_MIPI_AP_TO_LCM_CLK_N
45_LCM_REXT
1
C0814
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=SOC
1
C0801
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=SOC
NC
NC
NC
NC
B8
MIPI0C_DATA0_P
A8
MIPI0C_DATA0_N
A9
MIPI0C_DATA1_P
B9
MIPI0C_DATA1_N
A13
MIPI0C_DATA2_P
B13
MIPI0C_DATA2_N
B14
MIPI0C_DATA3_P
A14
MIPI0C_DATA3_N
A12
MIPI0C_CLK_P
B12
MIPI0C_CLK_N
D12
MIPI0C_REXT
A3
MIPID_DATA0_P
B3
MIPID_DATA0_N
B4
MIPID_DATA1_P
A4
MIPID_DATA1_N
B6
MIPID_DATA2_P
A6
MIPID_DATA2_N
A7
MIPID_DATA3_P
B7
MIPID_DATA3_N
A5
MIPID_CLK_P
B5
MIPID_CLK_N
D9
MIPID_REXT
D10
E10
E13E8D13
VDD085_MIPI
E7D8E11
VDD18_MIPI
OMIT_TABLE
U0600
MAUI-2GB-25NM-DDR-H
FCMSP
SC58980X0B-A040
SYM 3 OF 14
ROOM=SOC
CRITICAL
SENSOR0_XSHUTDOWN
SENSOR1_XSHUTDOWN
E14
ISP_I2C0_SCL
ISP_I2C0_SDA
ISP_I2C1_SCL
ISP_I2C1_SDA
SENSOR0_CLK
SENSOR0_RST
SENSOR1_CLK
SENSOR1_RST
SENSOR0_ISTRB
SENSOR1_ISTRB
MIPICSI_MUXSEL
MIPI1C_REXT
MIPI1C_DATA0_P
MIPI1C_DATA0_N
MIPI1C_DATA1_P
MIPI1C_DATA1_N
MIPI1C_CLK_P
MIPI1C_CLK_N
G31
G32
F35
G34
D33
D32
F33
E34
D34
F32
C35
C34
G35
D14
B17
A17
B19
A19
A18
B18
1.62-1.98V @23mA MAX
PP1V8
1
C0802
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=SOC
1
C0815
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=SOC
R0804
1.00K
5% 1/32W MF 01005
ROOM=SOC
R0805
1.00K
5% 1/32W MF 01005
ROOM=SOC
45_AP_TO_RCAM_CLK_R AP_TO_RCAM_SHUTDOWN_L
45_AP_TO_FCAM_CLK_R AP_TO_FCAM_SHUTDOWN_L
NC
AP_TO_STOCKHOLM_DWLD_REQUEST
NC
AP_TO_MUON_BL_STROBE_EN
NC
45_FCAM_REXT
90_MIPI_FCAM_TO_AP_DATA0_P 90_MIPI_FCAM_TO_AP_DATA0_N
NC
NC
90_MIPI_FCAM_TO_AP_CLK_P 90_MIPI_FCAM_TO_AP_CLK_N
3 5 6 7 8 9 21 31 41 02 12 82 29
R0806
1.00K
5% 1/32W MF 01005
ROOM=SOC
21
OUT
R0809
33.2
OUT
20
%1 FM
ROOM=SOC
OUT
OUT
IN
IN
IN
IN
R0807
1.00K
5% 1/32W MF 01005
ROOM=SOC
%1 FM
01005
33
26
20
20
20
20
1/32W
PP1V8
3 5 6 7 8 9 21 31 41 02 12 82 29
I2C_ISP_TO_RCAM_SCL I2C_ISP_BI_RCAM_SDA
I2C_ISP_TO_FCAM_SCL I2C_ISP_BI_FCAM_SDA
R0808
33.2
01005
ROOM=SOC
45_AP_TO_RCAM_CLK
1/32W
45_AP_TO_FCAM_CLK
OUT
OUT
OUT
OUT
BI
BI
20
21
20
12 22
12 22
20
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
15 6 5
A29
B29
A33
B33
A32
B32
A31
B31
A30
B30
D24
D25
AL4
H35
NOTE:VDD12_LPDP SHOULD BE POWERED
EVEN WHEN LPDP IS NOT USED
PP1V2
E25
E27
E23
F24
VDD12_LPDP
OMIT_TABLE
U0600
MAUI-2GB-25NM-DDR-H
LPDP_AUX_P
LPDP_AUX_N
LPDP_TX0_P
LPDP_TX0_N
LPDP_TX1_P
LPDP_TX1_N
LPDP_TX2_P
LPDP_TX2_N
LPDP_TX3_P
LPDP_TX3_N
LPDP_CAL_DRV_OUT
LPDP_CAL_VSS_EXT
EDP_HPD
DP_WAKEUP
FCMSP
SC58980X0B-A040
SYM 4 OF 14
ROOM=SOC
CRITICAL
D
C
B
A
R0801
4.02K
1%
1/32W
MF
01005
ROOM=SOC
R0802
4.02K
1%
1/32W
MF
01005
ROOM=SOC
R0803
4.02K
1% 1/32W MF 01005
ROOM=SOC
PAGE TITLE
SYNC_DATE=N/ASYNC_MASTER=N/A
A
SOC:CAMERA & DISPLAY
DRAWING NUMBER SIZE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
8 7 5 4 2 1
36
REVISION
BRANCH
PAGE
SHEET
051-00648
4.0.0
8 OF 49
7 OF 60
D
SOC - GPIO & SERIAL INTERFACES
No share Dick itesla.solutions
345678
2 1
D
C
B
32 16
32 16
25
25
33
33
33
22
29
28
16
33
33
33 29 28 9
33
33
33
33
24 16
33
13
29
33
33
32 16 8
33
21
R0900
2.2K
5%
1/32W
MF
01005
ROOM=SOC
2
R0901
2.2K
5%
1/32W
MF
01005
ROOM=SOC
R0902
2.2K
5%
1/32W
MF
01005
ROOM=SOC
R0903
2.2K
5%
1/32W
MF
01005
ROOM=SOC
R0904
1.33K
1%
1/32W
MF
01005
ROOM=SOC
R0905
1.33K
1%
1/32W
MF
01005
ROOM=SOC
PP1V8
3 5 6 7 8 9 21 31 41 02 29
12 82
D
R0920
33.2
24
OUT
C1
D2
D1
F1
E2
F3
F2
H3
G3
H4
K1
K2
K3
N1
AH2
AH3
AH4
AJ1
AJ2
AJ3
AJ4
AK1
AP3
AN4
AP4
AP5
AR2
AR3
AR4
AP6
AT3
AT4
AR6
AP7
AT5
AP8
AP9
J1
J3
J4
L2
L3
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
MAUI-2GB-25NM-DDR-H
SC58980X0B-A040
CRITICAL
NC
NC
BUTTON_VOL_UP_L
IN
BUTTON_VOL_DOWN_L
IN
SPEAKERAMP_TO_AP_INT_L
IN
NC
OUT
OUT
OUT
OUT
OUT
OUT
OUT
AP_TO_SPEAKERAMP_RESET_L AP_TO_BT_WAKE AP_TO_BB_RESET_L PCIE_AP_TO_WLAN_DEV_WAKE AP_TO_LED_DRIVER_EN AP_TO_TOUCH_RESET_L AP_TO_LCM_RESET_L PMU_TO_AP_IRQ_L
IN
NC
OUT
3
AP_TO_STOCKHOLM_DEV_WAKE BOARD_ID3
IN
NC
3
OUT
OUT
3
3
3
OUT
3
3
OUT
OUT
3
3
3
3
OUT
OUT
OUT
BOOT_CONFIG0
IN
AP_TO_BB_WAKE_MODEM LCM_TO_AP_HIFA_BSYNC
IN
BB_TO_AP_HSIC_DEVICE_RDY
IN
BB_TO_AP_GPS_TIME_MARK
IN
AP_TO_BB_HSIC_HOST_RDY BB_TO_AP_RESET_DETECT_L
IN
BOOT_CONFIG1
IN
FORCE_DFU
IN
DFU_STATUS BOOT_CONFIG2
IN
BOARD_ID4
IN
CODEC_TO_AP_PMU_INT_L
IN
AP_TO_BB_RADIO_ON_L AP_TO_NAND_FW_STRAP TOUCH_TO_AP_INT_L
IN
BOARD_REV3
IN
BOARD_REV2
IN
BOARD_REV1
IN
BOARD_REV0
IN
AP_TO_BB_COREDUMP BB_TO_AP_IPC_GPIO
IN
BUTTON_RINGER_A
IN
AP_TO_BB_MESA_ON CAM_EXT_LDO_EN
AP10
OMIT_TABLE
U0600
FCMSP
SYM 5 OF 14
ROOM=SOC
TMR32_PWM0
TMR32_PWM1
TMR32_PWM2
UART0_RXD
UART0_TXD
UART1_CTS*
UART1_RTS*
UART1_RXD
UART1_TXD
UART2_CTS*
UART2_RTS*
UART2_RXD
UART2_TXD
UART3_CTS*
UART3_RTS*
UART3_RXD
UART3_TXD
UART4_CTS*
UART4_RTS*
UART4_RXD
UART4_TXD
UART5_RTXD
UART6_RXD
UART6_TXD
UART7_RXD
UART7_TXD
AE1
AF2
AF3
AE3
AE4
K31
K32
L33
L32
AT23
AR20
AP23
AP22
N4
P3
R3
R2
J33
J34
J35
K33
T32
AF1
AE2
J31
J32
NC
AP_TO_VIBE_TRIG
NC
UART_AP_DEBUG_RXD UART_AP_DEBUG_TXD
UART_BT_TO_AP_CTS_L UART_AP_TO_BT_RTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_TXD
UART_STOCKHOLM_TO_AP_CTS_L UART_AP_TO_STOCKHOLM_RTS_L UART_STOCKHOLM_TO_AP_RXD UART_AP_TO_STOCKHOLM_TXD
UART_BB_TO_AP_CTS_L UART_AP_TO_BB_RTS_L UART_BB_TO_AP_RXD UART_AP_TO_BB_TXD
UART_WLAN_TO_AP_CTS_L UART_AP_TO_WLAN_RTS_L UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_TXD
SWI_AP_BI_TIGRIS
UART_ACCESSORY_TO_AP_RXD UART_AP_TO_ACCESSORY_TXD
NC
NC
25
OUT
45_I2S_AP_TO_CODEC_MCLK
45_I2S_AP_TO_SPEAKERAMP_MCLK
32
OUT
30
IN
30
OUT
33
IN
33
OUT
33
IN
33
OUT
33
IN
33
OUT
33
IN
33
OUT
33
IN
33
OUT
33
IN
33
OUT
33
IN
33
OUT
33
IN
33
OUT
9 71
BI
30
IN
30
OUT
29
27
OUT
OUT
SPI_AP_TO_TOUCH_SCLK
SPI_AP_TO_MESA_SCLK
01005
01005
1 2
1/32W
01005
ROOM=SOC
R0922
33.2
1 2
1/32W
01005
ROOM=SOC
ROOM=SOC
R0960
0.00
1 2
0%
ROOM=SOC
R0930
0.00
1 2
0%
1%
MF
1%
MF
1/32W MF
1/32W MF
24 9
24 9
24 9
24
33
33
33
33
25 24
25 24
25 24
25 24
20
33
33
33
33
30 16
24
24
24
24
24 8
24 8
24 8
24
29 8
29 8
29
27
27
27
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
IN
OUT
OUT
IN
OUT
IN
OUT
OUT
IN
OUT
3
IN
3
IN
3
IN
IN
OUT
OUT
OUT
IN
OUT
OUT
IN
OUT
IN
45_I2S_AP_TO_CODEC_MCLK_R 45_I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_AP_OWL_TO_CODEC_XSP_LRCLK I2S_CODEC_TO_AP_OWL_XSP_DIN I2S_AP_TO_CODEC_XSP_DOUT
45_I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_LRCLK I2S_BT_TO_AP_DIN I2S_AP_TO_BT_DOUT
45_I2S_AP_TO_SPEAKERAMP_MCLK_R 45_I2S_AP_TO_CODEC_ASP_BCLK I2S_AP_TO_CODEC_ASP_LRCLK I2S_CODEC_TO_AP_ASP_DIN I2S_AP_TO_CODEC_ASP_DOUT
ALS_TO_AP_INT_L 45_I2S_AP_TO_BB_BCLK I2S_AP_TO_BB_LRCLK I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT
TRISTAR_TO_AP_INT 45_I2S_AP_TO_CODEC_MSP_BCLK I2S_AP_TO_CODEC_MSP_LRCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT
BOARD_ID2 BOARD_ID1 BOARD_ID0
SPI_CODEC_TO_AP_MISO SPI_AP_TO_CODEC_MOSI SPI_AP_TO_CODEC_SCLK SPI_AP_TO_CODEC_CS_L
SPI_TOUCH_TO_AP_MISO SPI_AP_TO_TOUCH_MOSI SPI_AP_TO_TOUCH_SCLK_R SPI_AP_TO_TOUCH_CS_L
SPI_MESA_TO_AP_MISO SPI_AP_TO_MESA_MOSI SPI_AP_TO_MESA_SCLK_R MESA_TO_AP_INT
BUTTON PULL-UP RESISTORS AND BUFFERS
NC
NC
P34
R34
N34
N35
M33
M4
M3
P1
N3
L4
U32
V33
U33
T33
V34
AM3
AM4
AN2
AP1
AN1
R32
R31
V32
P31
P32
AD4
AC3
AB2
AD3
P33
V35
N32
M31
E33
E35
F34
F31
AA2
Y2
AA3
AC4
I2S0_MCK
I2S0_BCLK
I2S0_LRCK
I2S0_DIN
I2S0_DOUT
I2S1_MCK
I2S1_BCLK
I2S1_LRCK
I2S1_DIN
I2S1_DOUT
I2S2_MCK
I2S2_BCLK
I2S2_LRCK
I2S2_DIN
I2S2_DOUT
I2S3_MCK
I2S3_BCLK
I2S3_LRCK
I2S3_DIN
I2S3_DOUT
I2S4_MCK
I2S4_BCLK
I2S4_LRCK
I2S4_DIN
I2S4_DOUT
SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI0_SSIN
SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN
SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN
SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN
OMIT_TABLE
U0600
FCMSP
SC58980X0B-A040
SYM 6 OF 14
MAUI-2GB-25NM-DDR-H
ROOM=SOC
CRITICAL
CPU_ACTIVE_STATUS
I2C0_SCL
I2C0_SDA
I2C1_SCL
I2C1_SDA
I2C2_SCL
I2C2_SDA
SEP_SPI0_SCLK
SEP_SPI0_MISO
SEP_SPI0_MOSI
SEP_I2C_SCL
SEP_I2C_SDA
SEP_GPIO0
SEP_GPIO1
SOCHOT0
SOCHOT1
CLK32K_OUT
NAND_SYS_CLK
E31
D35
AH1
AG4
L31
M32
W3
AA4
U2
V3
Y4
Y3
AB4
NC
NC
NC
NC
NC
R0906
2.2K
5%
1/32W
MF
01005
ROOM=SOC
R0907
2.2K
5%
1/32W
MF
01005
ROOM=SOC
R0941
ROOM=SOC
PP1V8
3 5 6 7 8 9 21 31 41 02 12 82 29
I2C_SEP_TO_EEPROM_SCL I2C_SEP_BI_EEPROM_SDA
PP1V8_ALWAYS
NOSTUFF
R0910
10K
5%
1/32W
MF
01005
2
10K
5%
1/32W
MF
01005
ROOM=SOC
2
PP1V8
R0909
10K
5% 1/32W MF 01005
2
ROOM=SOC
ROOM=SOC
I2C0_AP_SCL I2C0_AP_SDA
I2C1_AP_SCL I2C1_AP_SDA
I2C2_AP_SCL I2C2_AP_SDA
8
OUT
8
BI
8 21 51 71
3 5 6 7 8 9 21 31 41 02 12 82 29
R0940
AM1
PMU_TO_AP_SOCHOT0_R_L PMU_TO_AP_SOCHOT0_L
AM2
H31
NC
H34
AM24
45_AP_TO_TOUCH_CLK32K_RESET_L
AP_TO_NAND_SYS_CLK_R
OUT
0.00
1 2
%0 FM
01005
29
1/32W
AP_TO_PMU_SOCHOT1_L
R0945
0.00
1 2
0%
1/32W
MF
01005
ROOM=SOC
AP_TO_NAND_SYS_CLK
OUT
OUT
OUT
OUT
BI
BI
BI
13
8 61 62
8 61 62
8 71 52 03
8 71 52 03
8 02
8 02
OUT
IN
C
16
16
B
A
28 21 20 14 13 12 9 8 7 6 5 3
29
PP1V8
ANTI-ROLLBACK EEPROM
128kbit
APN:335S0946
1
C0900
1.0UF
20%
6.3V
2
X5R 0201-1
ROOM=SOC
U0900
M34128-FCS6_P/T
B1 A2
SCL
CRITICAL
A1B2
ROOM=SOC
VCCVSS
WLCSP
SDA
I2C_SEP_BI_EEPROM_SDA I2C_SEP_TO_EEPROM_SCL
IN
BI
PP1V8_SDRAM
R0951
100K
5% 1/32W MF 01005
ROOM=SOC
32 16 8
BUTTON_RINGER_A
PP1V8_SDRAM
R0950
392K
27
IN
BUTTON_MENU_KEY_L
1% 1/32W MF 01005
2
U0901
74LVC1G34GX
5
SOT1226
4
3
1
BUTTON_MENU_KEY_BUFF_L
NC
8
8
PP1V8_ALWAYS
R0952
392K
32
IN
BUTTON_HOLD_KEY_L
1% 1/32W MF 01005
2
2
NC
U0902
74LVC1G34GX
5
SOT1226
4
NC NC
3
1
BUTTON_HOLD_KEY_BUFF_L
8 21 41 51 61 71 42 62 03 33
8 21 41 51 61 71 42 62 03 33
8 21 51 71
OUT
OUT
9 61
9 61
I2C PROBE POINTS
ROOM=SOC
P3MM-NSM
26 16 8
26 16 8
30 25 17 8
30 25 17 8
20 8
20 8
I2C0_AP_SCL
I2C0_AP_SDA
I2C1_AP_SCL
I2C1_AP_SDA
I2C2_AP_SCL
I2C2_AP_SDA
1
1
P3MM-NSM
ROOM=SOC
ROOM=SOC
P3MM-NSM
1
1
P3MM-NSM
ROOM=SOC
ROOM=SOC
P3MM-NSM
1
1
P3MM-NSM
ROOM=SOC
SM
PP
PP0900
PP
PP0901
SM
SM
PP
PP0902
PP
PP0903
SM
SM
PP
PP0904
PP
PP0905
SM
ROOM=SOC
PP0906
P2MM-NSM
SM
1
PP
ROOM=SOC
PP0907
P2MM-NSM
SM
1
PP
SPI_TOUCH_TO_AP_MISO
SPI_AP_TO_TOUCH_MOSI
SYNC_MASTER=N/A
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SPI PROBE POINTS
ROOM=SOC
PP0908
P2MM-NSM
SM
1
8 92
ROOM=SOC
SPI_CODEC_TO_AP_MISO
PP
PP0909
P2MM-NSM
SM
1
8 92
ROOM=SOC
SPI_AP_TO_CODEC_MOSI
PP
PP09010
P2MM-NSM
SM
1
SPI_AP_TO_CODEC_SCLK
PP
SOC:SERIAL & GPIO
Apple Inc.
R
8 42
8 42
8 42
SYNC_DATE=N/A
DRAWING NUMBER SIZE
051-00648
REVISION
D
4.0.0
BRANCH
PAGE
9 OF 49
SHEET
8 OF 60
A
8 7 5 4 2 1
36
.
D
No share Dick itesla.solutions
SOC - OWL
345678
2 1
POWER STATE CONTROL PROBE POINTS
ROOM=SOC
P3MM-NSM
SM
16 9
30 26 16 9 5
16 9
16 11 9
OWL_TO_PMU_ACTIVE_REQUEST
PMU_TO_OWL_ACTIVE_READY
OWL_TO_PMU_SLEEP1_REQUEST
PMU_TO_OWL_SLEEP1_READY
1
PP
ROOM=SOC
P3MM-NSM
SM
1
PP
ROOM=SOC
P3MM-NSM
SM
1
PP
ROOM=SOC
P3MM-NSM
SM
1
PP
PP1020
PP1021
PP1022
PP1023
D
C
B
16 9
16 11 9
19 9
19 9
33 29 28 8
19 9
19 9
19 9
19 9
24 8
24 8
24 8
19
19
19
19
19
33
33
33
33
OUT
IN
OUT
IN
IN
IN
OUT
IN
IN
OUT
IN
IN
OUT
OUT
IN
OUT
OUT
OUT
OUT
IN
OUT
OWL_TO_PMU_SLEEP1_REQUEST PMU_TO_OWL_SLEEP1_READY
SPI_OWL_TO_COMPASS_CS_L COMPASS_TO_OWL_INT
ACCEL_TO_OWL_INT2_R
ACCEL_GYRO_TO_OWL_INT1 SPI_OWL_TO_ACCEL_GYRO_CS_L ACCEL_GYRO_TO_OWL_INT2
LCM_TO_AP_HIFA_BSYNC OWL_TO_PMU_SHDN_BI_TIGRIS_SWI
9
SPI_OWL_TO_DISCRETE_ACCEL_CS_L ACCEL_TO_OWL_INT1_R
SPI_IMU_TO_OWL_MISO SPI_OWL_TO_IMU_MOSI SPI_OWL_TO_IMU_SCLK
UART_BB_TO_OWL_RXD UART_OWL_TO_BB_TXD
OWL_TO_WLAN_CONTEXT_B OWL_TO_WLAN_CONTEXT_A
45_I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_CODEC_TO_AP_OWL_XSP_DIN
I2S_AP_OWL_TO_CODEC_XSP_LRCLK
NC
NC
NC
NC
NC
AD30
AB33
AF35
AH32
AG32
AG31
AG30
AF33
AE34
AF34
AF31
AF32
AH31
AH33
AK31
AK32
AL33
AJ32
AK33
AH30
AJ31
AJ34
AJ33
AD34
AA34
AE32
AE31
MAUI-2GB-25NM-DDR-H
OWL_DDR_REQ
OWL_DDR_RESET*
OWL_FUNC_0
OWL_FUNC_1
OWL_FUNC_2
OWL_FUNC_3
OWL_FUNC_4
OWL_FUNC_5
OWL_FUNC_6
OWL_FUNC_7
OWL_FUNC_8
OWL_FUNC_9
OWL_I2CM_SCL
OWL_I2CM_SDA
OWL_SPI_MISO
OWL_SPI_MOSI
OWL_SPI_SCLK
OWL_UART0_RXD
OWL_UART0_TXD
OWL_UART1_RXD
OWL_UART1_TXD
OWL_UART2_RXD
OWL_UART2_TXD
OWL_I2S_BCLK
OWL_I2S_DIN
OWL_I2S_MCK
OWL_I2S_LRCK
OMIT_TABLE
U0600
FCMSP
SC58980X0B-A040
SYM 7 OF 14
ROOM=SOC
CRITICAL
CFSB_AOP
AWAKE_REQ
AWAKE_RESET*
PMGR_MISO
PMGR_MOSI
PMGR_SCLK0
PMGR_SSCLK1
RT_CLK32768
OWL_SWD_TCK_OUT
OWL_SWD_TMS0
OWL_SWD_TMS1
SWD_TMS2
SWD_TMS3
HOLD_KEY*
SKEY*
MENU_KEY*
W33
AA33
AD32
AL2
AL1
AK4
AL3
AD31
AE33
AD35
AC33
U31
T31
U3
W4
V4
PMU_TO_SYSTEM_COLD_RESET_L
OWL_TO_PMU_ACTIVE_REQUEST PMU_TO_OWL_ACTIVE_READY
DWI_PMU_TO_PMGR_MISO 45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI 45_DWI_PMGR_TO_PMU_SCLK 45_DWI_PMGR_TO_BACKLIGHT_SCLK
PMU_TO_OWL_CLK32K
SWD_AP_PERIPHERAL_SWCLK
NC
SWD_AP_BI_BB_SWDIO SWD_AP_BI_NAND_SWDIO
NC
BUTTON_HOLD_KEY_BUFF_L
NC
BUTTON_MENU_KEY_BUFF_L
IN
OUT
IN
IN
OUT
OUT
IN
OUT
BI
IN
IN
3 5 61
9 61
5 9 61 62 03
16
16
26
16
31 33
33
8 61
8 61
SM
1
PP
SM
1
PP
OUT
SM
1
PP
PP1003
P2MM-NSM
PP1002
P2MM-NSM
61 62
PP1004
P2MM-NSM
PP1V8
R1002
1.00K
5% 1/32W MF 01005
ROOM=SOC
3 5 6 7 8 21 31 41 02 12 82 92
13
BI
C
B
A
PP1005
P2MM-NSM
PP1006
P2MM-NSM
PP1007
P2MM-NSM
PP1008
P2MM-NSM
PP1009
P2MM-NSM
PP1010
P2MM-NSM
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
1
SPI_OWL_TO_IMU_MOSI
9 91
OWL SYSTEM SHUTDOWN OPTION
1
1
1
1
1
SPI_OWL_TO_DISCRETE_ACCEL_CS_L
SPI_OWL_TO_ACCEL_GYRO_CS_L
SPI_OWL_TO_COMPASS_CS_L
SPI_IMU_TO_OWL_MISO
SPI_OWL_TO_IMU_SCLK
9 91
9 91
9 91
9 91
9 91
OWL_TO_PMU_SHDN_BI_TIGRIS_SWI
9
NOSTUFF
R1020
1 2
5%
ROOM=SOC
NOSTUFF
R1021
1 2
FM %5
ROOM=SOC
10
10
1/32W 01005MF
1/32W 01005
SWI_AP_BI_TIGRIS
OWL_TO_PMU_SHDN
OUT
BI
16
8 71
SYNC_MASTER=N/A SYNC_DATE=N/A
PAGE TITLE
SOC:OWL
DRAWING NUMBER SIZE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
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REVISION
4.0.0
BRANCH
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SHEET
9 OF 60
D
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8 7 5 4 2 1
36
345678
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2 1
D
C
B
A
SOC - CPU, GPU & SOC RAILS
PP_GPU
14 10
0.8V @10.5A MAX
TP1120
0.50MM
SM
1
SM
PP
PP_GPU
1
PP_CPU
PP
PP_CPU
14 10
0.625V @TBDA MAX
0.9V @10.5A MAX
1.0V @12.5A MAX
TP1100
0.50MM
01 41
01 41
1
C1100
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=SOC
ROOM=SOC
C1106
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1112
1UF
20%
4V CERM 0402
1
234
1
C1120
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=SOC
ROOM=SOC
C1126
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1132
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1138
0.47UF
20%
6.3V CERM 0402
1
234
1
C1101
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=SOC
ROOM=SOC
C1107
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1113
1UF
20%
4V CERM 0402
1
234
1
C1121
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=SOC
ROOM=SOC
C1127
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1133
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1139
0.47UF
20%
6.3V CERM 0402
1
234
ROOM=SOC
C1108
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1114
1UF
20%
4V CERM 0402
1
234
1
C1122
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
ROOM=SOC
C1128
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1134
1UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1140
0.47UF
20%
6.3V CERM 0402
1
234
14
OUT
1
C1103
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
ROOM=SOC
C1109
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1115
1UF
20%
4V CERM 0402
1
234
1
C1123
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
ROOM=SOC
C1129
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1135
1UF
20%
4V CERM 0402
1
234
ROOM=SOC
1
C1104
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
ROOM=SOC
C1110
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1116
0.47UF
20%
6.3V CERM 0402
1
234
ROOM=SOC
C1130
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1136
1UF
20%
4V CERM 0402
1
234
C1141
0.47UF
20%
6.3V CERM 0402
1
234
45_BUCK0_PP_CPU_FB
PP1100
P2MM-NSM
PP1101
P2MM-NSM
1
C1105
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
ROOM=SOC
C1111
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1117
0.47UF
20%
6.3V CERM 0402
1
234
1
C1125
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
ROOM=SOC
C1131
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1137
1UF
20%
4V CERM 0402
1
234
XW1100
SHORT-10L-0.1MM-SM
1 2
ROOM=SOC
SM
1
PP
ROOM=SOC
SM
1
PP
ROOM=SOC
AP_CPU_SENSE_P
AP_CPU_SENSE_N
XW1110
SHORT-10L-0.1MM-SM
ROOM=SOC
AA7
AA9
AA11
AB6
AB10
AB12
AC13
AD6
AD8
AD10
AD12
AE7
AE9
AE11
AE13
AF8
AF10
AF12
AH6
AH8
AH10
AH12
AJ5
AJ7
AJ9
AJ11
AJ13
AK6
AK10
AL7
AL9
AL11
AM6
AM8
AM10
AN7
AN11
AL13
Y8
Y10
Y12
AM12
Y6
Y7
1 2
VDD_CPU
VDD_CPU_SENSE
VSS_CPU_SENSE
45_BUCK1_PP_GPU_FB
PP1102
P2MM-NSM
PP1103
P2MM-NSM
OMIT_TABLE
U0600
MAUI-2GB-25NM-DDR-H
FCMSP
SC58980X0B-A040
SYM 8 OF 14
ROOM=SOC
CRITICAL
VDD_GPU_SENSE
VSS_GPU_SENSE
SM
1
PP
ROOM=SOC
SM
PP
ROOM=SOC
AP_GPU_SENSE_N
1
AP_GPU_SENSE_P
OUT
VDD_GPU
41 61
G15
W13
T12
M6
U9
V12
W9
M12
M18
N15
N21
N9
F10
H14
H16
H20
H22
H6
H8
J11
J13
J17
J19
J23
J7
K10
K14
K16
K20
K22
K6
K8
L11
L13
L15
L17
L19
L21
M24
L7
L9
F8
M8
N11
N13
N17
N19
P10
G11
P12
P14
P16
P20
R15
R19
G13
R9
T10
T14
T16
U11
V14
V16
G7
R23
G9
H10
T24
P22
W17
N23
G17
G21
T18
T20
G20
H19
AA17
AA19
AA23
AB14
AB16
AB20
AB22
AB24
AB26
AC17
AC19
AC23
AD16
AD20
AD22
AD24
AD26
AE5
AE15
AE17
AE19
AE23
AF14
AF16
AF20
AF22
AF24
AF26
AG17
AG19
AG23
AH16
AH20
AH22
AH24
AH26
AJ15
AJ17
AJ19
AJ23
AK14
J29
G23
AK22
F14
AL15
AM5
G25
G27
H24
H26
H28
J27
K24
K26
K28
L27
L23
M26
M28
AL19
N27
P24
P26
P28
R17
R27
R29
T22
T26
T28
U17
V20
V22
V24
V26
W11
Y28
AJ20
AK21
VDD_SOC
F6
N7
T7
V8
W7
VDD_SOC_SENSE
VSS_SOC_SENSE
AP_SOC_SENSE_N
AP_SOC_SENSE_P
OMIT_TABLE
U0600
MAUI-2GB-25NM-DDR-H
FCMSP
SC58980X0B-A040
SYM 9 OF 14
ROOM=SOC
CRITICAL
SM
1
PP
ROOM=SOC
ROOM=SOC
SM
1
PP
VDD_SOC
VSS
PP1104
P2MM-NSM
PP1105
P2MM-NSM
W23
Y14
Y16
Y20
Y22
Y24
Y26
G29
AA27
F17
F20
L29
N29
V28
L22
L24
L26
L28
M1
M5
M7
M9
M11
M13
M17
M21
M23
M25
M27
M29
M35
N6
N10
N12
N14
N16
N18
G19
N22
N24
N26
N28
N30
N33
P9
P11
P13
P15
P17
P19
P21
P23
P25
P27
P29
P35
R4
R6
R8
R10
R12
R14
M19
R18
R20
R22
R24
R26
R28
R30
T1
T2
R33
T9
T11
T13
T15
T17
P7
T23
T25
T27
T30
T35
U6
U10
U12
1
C1150
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=SOC
ROOM=SOC
C1153
4.3UF
20%
4V CERM 0402
1
234
1
C1151
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=SOC
ROOM=SOC
C1154
1UF
20%
4V CERM 0402
1
234
PP_SOC
14
0.825V @4.7A MAX
0.725V @TBDA MAX
XW1120
SHORT-10L-0.1MM-SM
ROOM=SOC
C1155
1UF
20%
4V CERM 0402
1
234
1 2
ROOM=SOC
ROOM=SOC
C1156
1UF
20%
4V CERM 0402
1
234
45_BUCK2_PP_SOC_FB
ROOM=SOC
C1157
0.47UF
20%
6.3V CERM 0402
1
234
OUT
14
SYNC_MASTER=N/A SYNC_DATE=N/A
PAGE TITLE
SOC:POWER (1/3)
DRAWING NUMBER SIZE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
051-00648
REVISION
4.0.0
BRANCH
PAGE
11 OF 49
SHEET
10 OF 60
D
C
B
A
D
8 7 5 4 2 1
36
D
No share Dick itesla.solutions
C
B
SOC - POWER SUPPLIES
1.06 - 1.17V @635mA MAX INTERNALLY SUPPLIES VDDQ
PP1V1
14 11
1
C1240
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=SOC
1
C1241
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
1
C1242
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
ROOM=SOC
C1245
4.3UF
1
0.802-TBDV @1.1A MAX
14 7 6 14
PP_FIXED
1
C1200
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=SOC
ROOM=SOC
C1201
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1202
1UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1203
0.47UF
20%
6.3V CERM 0402
1
234
AA15
AA21
AA25
AB18
AC15
AC21
AC25
AD14
AD18
AE21
AE25
AF18
AG15
AG21
AH25
AH14
AH18
AJ21
AK16
F12
G10
V18
AL17
J25
L25
N25
R25
R7
AN6
U25
W15
W21
W25
Y18
F21
F26
AB28
AC27
G18
AK20
F16
R16
T8
V7
U19
W27
U27
AF4
AF27
U21
MAUI-2GB-25NM-DDR-H
SC58980X0B-A040
SYM 10 OF 14
CRITICAL
VDD_FIXED
OMIT_TABLE
U0600
FCMSP
ROOM=SOC
VDD_CPU_SRAM
VDD_GPU_SRAM
AC11
AC7
AC9
AA13
AG11
AG7
AG9
AK12
H12
H18
R21
U15
J15
J21
J9
K12
K18
M10
M14
M16
M20
P18
R11
R13
U13
V10
M22
ROOM=SOC
C1220
0.47UF
20%
6.3V CERM 0402
1
234
ROOM=SOC
C1224
0.47UF
20%
6.3V CERM 0402
1
234
ROOM=SOC
C1228
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1221
1UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1225
1UF
20%
4V CERM 0402
1
234
20%
4V CERM 0402
234
1
C1243
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
ROOM=SOC
C1222
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1226
4.3UF
20%
4V CERM 0402
1
234
ROOM=SOC
C1246
1
1UF
20%
4V CERM 0402
234
1
C1244
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
1
C1247
1.0UF
20%
6.3V
2
X5R 0201-1
ROOM=SOC
0.8V @TBDA MAX
0.9V @TBDA MAX
1.0V @1.0A MAX
PP_CPU_SRAM
1
C1223
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
0.8V @0.5A MAX
PP_GPU_SRAM
1
C1227
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
1
C1248
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
1
2
14
C1249
1.0UF
20%
6.3V X5R 0201-1
ROOM=SOC
A20
A22
B11
B15
B23
B25
D16
D20
D22
E15
E17
E19
E21
AN19
AR18
AR21
AR8
AT13
AT16
AM14
AM16
AM18
AM20
AR15
AN13
AN15
AB29
V29
Y29
Y35
AB35
AG34
M34
R35
T29
T34
AA30
U30
AC30
AA1
AC2
V6
W2
H2
M2
U5
P6
T6
U1
N5
R5
W5
VDDIO11_DDR0
VDDIO11_DDR1
VDDIO11_DDR2
VDDIO11_DDR3
OMIT_TABLE
U0600
MAUI-2GB-25NM-DDR-H
FCMSP
SC58980X0B-A040
SYM 11 OF 14
ROOM=SOC
CRITICAL
345678
2 1
DDR IMPEDANCE CONTROL
PP1V1
DDR0_RREF
DDR1_RREF
DDR2_RREF
DDR3_RREF
DDR0_ZQ
DDR3_ZQ
DDR0_RET*
DDR1_RET*
DDR2_RET*
DDR3_RET*
VDDIO11_PLL_DDR
14 11
C21
AP17
V31
P5
B21
P2
C18
AP15
Y31
U4
F19
AK18
W26
P8
1
R1200
240
1% 1/32W MF 01005
2
ROOM=SOC
45_DDR0_RREF 45_DDR1_RREF 45_DDR2_RREF 45_DDR3_RREF
45_DDR0_ZQ 45_DDR3_ZQ
PMU_TO_OWL_SLEEP1_READY
1.1V @7mA MAX
45_PP1V1_DDR_PLL
1
C1280
0.22UF
20%
6.3V
2
X5R 01005-1
ROOM=SOC
1
R1201
240
1% 1/32W MF 01005
2
ROOM=SOC
1
1
R1202
240
1% 1/32W MF
2
01005
ROOM=SOC
IN
2
9 61
FL1280
100OHM-25%-0.12A
1 2
01005
ROOM=SOC
R1203
240
1% 1/32W MF 01005
ROOM=SOC
1
2
PP1V1
R1204
240
1% 1/32W MF 01005
ROOM=SOC
11 41
1
2
R1205
240
1% 1/32W MF 01005
ROOM=SOC
D
C
VDDIO11_RET_DDR
DDR0_SYS_ALIVE
DDR1_SYS_ALIVE
DDR2_SYS_ALIVE
DDR3_SYS_ALIVE
D19
AN17
W31
T4
C19
AP16
W32
T3
PP1V1_SDRAM
1.06 - 1.17V
21 41 51
SYSTEM_ALIVE
IN
31 61 71
B
A
SYNC_MASTER=N/A SYNC_DATE=N/A
PAGE TITLE
0.756-TBDV @44mA MAX
PP0V8_OWL
15
1
C1250
1.0UF
20%
6.3V
2
X5R 0201-1
ROOM=SOC
8 7 5 4 2 1
AH29
AD29
AF29
VDD_LOW
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
36
SOC:POWER (2/3)
Apple Inc.
R
DRAWING NUMBER SIZE
REVISION
BRANCH
PAGE
SHEET
051-00648
4.0.0
12 OF 49
11 OF 60
A
D
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2 1
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A
A1
A2
A11
A16
A21
A24
A25
A27
A34
A35
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA24
AA26
N8
AA28
AA35
AB1
C17
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AB27
AB30
AC1
AC6
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AC24
AC26
T5
AC28
AC34
AC35
AD5
AD7
AD9
AD11
AD15
AD17
AD19
AD21
AD23
AD25
AD27
AD33
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE22
AE24
AE26
AE29
AE30
AE35
AF5
AF7
AF9
AF11
AF15
AF17
AF19
AF21
OMIT_TABLE
U0600
MAUI-2GB-25NM-DDR-H
FCMSP
SC58980X0B-A040
SYM 13 OF 14
ROOM=SOC
CRITICAL
AF23
AF25
AF30
AG1
AG2
AG3
AG6
AG8
AG10
AG14
AG16
AG18
AG20
AG22
AG24
U7
AG29
AG33
AG35
AH5
AH7
AH9
AH11
AH13
AH15
AH17
AH19
AH21
AH23
AH27
AJ6
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
W8
AJ22
AG12
AK24
AJ28
AK2
AK3
AK5
VSSVSS
AK7
AK9
AK11
AK13
AK15
B28
AK17
M15
AP28
AK26
AK30
AK34
AK29
AL6
AL8
AL10
AL12
AF28
AL14
AM29
AL16
AR27
AL18
Y30
AL20
AL25
AL28
AL30
AL31
AM7
AM9
AM11
AM13
AM15
AM17
AM19
AM21
AM33
AM34
AM35
AN3
AN5
AN16
AN8
AN10
AN12
AN14
AN18
AN29
AN33
AP2
AP13
AP14
AP20
AP25
AP26
AP27
AP30
AP31
AP32
AP33
AR1
AR5
AR9
AR14
AR16
AR25
AR34
AR35
AT1
AT2
AT6
AT8
AT9
AT14
AT17
AT18
AT21
AT25
AT34
AT35
B1
B2
B16
B20
B22
B24
B27
B34
B35
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C20
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
C33
D3
D4
D5
D6
D11
D17
D21
D23
D26
D27
D28
D29
D30
E1
E3
E4
E5
D7
E9
MAUI-2GB-25NM-DDR-H
SC58980X0B-A040
VSS VSS
OMIT_TABLE
U0600
FCMSP
SYM 14 OF 14
ROOM=SOC
CRITICAL
E12
E16
E18
E20
E22
E24
E26
E29
E32
F4
F5
F7
F9
F11
F13
F15
F18
D18
F23
E30
F25
F27
F28
F29
G4
G5
G6
G8
G12
G14
G16
E6
G22
G24
G26
G28
G33
H1
H7
H9
H11
H13
H15
H17
E28
H21
H23
H25
H27
H29
J2
J5
J6
J30
J8
J10
J12
J14
J16
J18
J20
J22
J24
J26
J28
K7
K9
K11
K13
K15
K17
K19
K21
K23
K25
K27
K29
K34
K35
L1
L5
L6
K4
L8
L10
L12
L14
L16
L18
L20
33 30 26 24 17 16 15 14 8
1.06-1.17V @1.3A(TBD) MAX
15 14 11
28 21 20 14 13 12 9 8 7 6 5 3
PP1V1_SDRAM
28 21 20 14 13 12 9 8 7 6 5 3
1.70-1.95V @100mA(TBD) MAX
PP1V8_SDRAM
1
C1310
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=SOC
1.62-1.98V @41mA MAX
PP1V8
29
1
C1320
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=SOC
VDDIO18_GRP10:1.62-1.98V @8mA MAX VDDIO18_LPOSC:1.62-1.98V @1mA MAX
19 14
17 15 8
PP1V8_IMU_OWL
PP1V8_ALWAYS
PP1V8
29
VDD18_FMON :1.62-1.98V @1mA MAX VDD18_UVD :1.62-1.98V @5mA MAX VDD18_AMUX :1.62-1.98V @1mA MAX VDD18_TSADC:1.645-1.89V @2mA MAX
1
C1300
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
1
C1312
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
1
C1301
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
1
C1313
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
ROOM=SOC
C1316
1UF
20%
4V CERM 0402
1
234
1
C1321
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
1.62-1.98V @1mA MAX
1
C1322
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
SOC - POWER SUPPLIES
OMIT_TABLE
U0600
FCMSP
SYM 12 OF 14
ROOM=SOC
(OWL)
(AON)
VSS
U14
U16
U18
U22
U24
U26
U28
U35
V1
V5
AA29
U29
V9
V11
V13
V15
V17
V19
V21
V23
V25
V27
W30
W1
W6
W10
W12
W14
W16
W18
W20
W22
W24
W28
W29
W34
Y1
Y9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25
Y27
Y34
AC29
AD28
AE27
AG27
AJ30
AJ35
AK19
AT27
D31
G30
L30
P4
U8
V30
A28
AL32
T21
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
1
C1302
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
1
C1314
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=SOC
ROOM=SOC
C1317
1UF
20%
4V CERM 0402
1
234
1
C1323
2.2UF
20%
6.3V
2
X5R-CERM
0201
ROOM=SOC
1
C1330
2.2UF
20%
6.3V
2
X5R-CERM
0201
ROOM=SOC
A10
A26
AD1
AH35
AT22
AT7
G1
L35
A15
A23
AB34
AD2
AH34
AR13
AR17
AR22
AR7
AT15
B10
B26
G2
L34
N2
R1
U34
V2
W35
F30
H30
K30
M30
N31
P30
H5
K5
AN9
AA5
AC5
AG5
AL5
AM23
AE28
AG28
Y5
AG26
AM22
AD13
AN24
AG13
AK8
AB8
N20
U23
AK23
MAUI-2GB-25NM-DDR-H
VDD1
VDD2
VDDIO18_GRP1
VDDIO18_GRP2
VDDIO18_GRP3
VDDIO18_GRP4
VDDIO18_GRP10
VDDIO18_GRP11
VDD18_LPOSC
VDD18_FMON
VDD18_UVD
VDD18_AMUX
VDD18_TSADC
SC58980X0B-A040
CRITICAL
SOC:POWER (3/3)
Apple Inc.
R
SYNC_DATE=N/ASYNC_MASTER=N/A
DRAWING NUMBER SIZE
051-00648
REVISION
D
4.0.0
BRANCH
PAGE
13 OF 49
SHEET
12 OF 60
D
C
B
A
8 7 5 4 2 1
36
D
No share Dick itesla.solutions
S3E NAND
28 21 20 14 13 12 9 8 7 6 5 3
29
PP1V8
R1530
24.9
1 2
1%
1/32W
MF
01005
ROOM=NAND
PP1V8_NAND_AVDD
NAND_AGND
13
1
C1530
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=NAND
1
C1531
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=NAND
345678
2 1
D
C
B
15
28 21 20 14 13 12 9 8 7 6 5 3
PP0V9_NAND
PP1V8
29
1
C1520
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
C15601
2
1
C1561
2
0.01UF
10%
6.3V X5R 01005
ROOM=NAND
0.01UF
10%
6.3V X5R 01005
ROOM=NAND
1
C1521
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
NOSTUFF
1
R1560
10K
1% 1/32W MF 01005
2
ROOM=NAND
1
R1561
10K
1% 1/32W MF 01005
2
ROOM=NAND
NOSTUFF
1
C1548
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
C1522
1
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=NAND
1
C1527
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=NAND
1
C1540
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
1
C1546
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
1
R1501
3.01K
1% 1/20W MF 201
2
ROOM=NAND
1
C1524
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=NAND
1
C1528
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=NAND
1
C1541
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
1
C1550
0.1UF
20%
6.3V
2
X5R-CERM 01005
ROOM=NAND
1
2
8
13 6
13 6
6
13 6
13 6
13 6
13 6
6
6
6
6
5
C1525
100PF
5% 16V NP0-C0G 01005
ROOM=NAND
1
C1542
10UF
20%
6.3V CERM-X5R
2
0402-9
ROOM=NAND
1
C1551
0.1UF
20%
6.3V
2
X5R-CERM 01005
NAND_VREF
IN
IN
IN
OUT
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
AP_TO_NAND_SYS_CLK
90_PCIE_AP_TO_NAND_REFCLK_P 90_PCIE_AP_TO_NAND_REFCLK_N
PCIE_NAND_TO_AP_CLKREQ_L
45_PCIE_NAND_RESREF
90_PCIE_AP_TO_NAND_TXD0_P 90_PCIE_AP_TO_NAND_TXD0_N
90_PCIE_AP_TO_NAND_TXD1_P 90_PCIE_AP_TO_NAND_TXD1_N
90_PCIE_NAND_TO_AP_RXD0_P 90_PCIE_NAND_TO_AP_RXD0_N
90_PCIE_NAND_TO_AP_RXD1_P 90_PCIE_NAND_TO_AP_RXD1_N
AP_TO_NAND_RESET_L
ROOM=NAND
1
C1526
100PF
5% 16V
2
NP0-C0G 01005
ROOM=NAND
1
C1543
10UF
20%
6.3V CERM-X5R
2
0402-9
ROOM=NAND
1
C1554
1000PF
10%
6.3V
2
X5R-CERM 01005
ROOM=NAND
1
C1523
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
45_NAND_ZQ
NC
M4
D2
CLK_IN
H8
PCIE_REFCLK_P
H6
PCIE_REFCLK_M
G9
PCIE_CLKREQ*
PCI_RESREF
M8
PCIE_RX0_P
K8
PCIE_RX0_M
N5
PCIE_RX1_P
N3
PCIE_RX1_M
P8
PCIE_TX0_P
N7
PCIE_TX0_M
M2
PCIE_TX1_P
K2
PCIE_TX1_M
F8
RESET*
D8
TRST*
D6
ZQ
J5
J7M6K4
PCI_VDD1
PCI_AVDD_H
PCI_AVDD_CLK1
PCI_AVDD_CLK2
K6
C3
AVDD1
PCI_VDD2
A3A7F2J1J9R3R7
E5
VDD
VDD
VREF
VDD
THGBX5G7D2KLFXG
BOMOPTION=OMIT_TABLE
VDD
VDD
VDD
U1500
WLGA
VER-1
ROOM=NAND
CRITICAL
VDD
A5
VDDIO
OB0
OB10
VDDIO
OF0
VDDIO
VDDIO
OF10
VDDIO
R5
VDDIO
OA0
VCC
OA10
VCC
OD0
VCC
OD10
OG0
VCC
VCC
EXT_D0
EXT_D1
EXT_D2
EXT_D3
EXT_D4
EXT_D5
EXT_D6
EXT_D7
EXT_NCE
EXT_NRE
EXT_NWE
EXT_RNB
EXT_CLE
EXT_ALE
OG10
VCC
1
C1509
100PF
5% 16V
2
NP0-C0G 01005
ROOM=NAND
G3
J3
H2
NC
E3
NC
E7
NC
F6
NC
C7
NC
B8
G1
F4
C5
G5
NC
H4
NC
D4
1
C1500
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
1
C1504
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
1
C1507
100PF
5% 16V
2
NP0-C0G 01005
ROOM=NAND
1
C1501
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
1
C1506
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
1
C1508
100PF
5% 16V
2
NP0-C0G 01005
ROOM=NAND
PMU_TO_NAND_LOW_BATT_BOOT_L AP_TO_NAND_FW_STRAP
SYSTEM_ALIVE
PCIE_AP_TO_NAND_RESET_L
SWD_AP_BI_NAND_SWDIO_R
SWD_AP_NAND_SWCLK_R
1
C1502
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
1
C1505
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
1
C1510
100PF
5% 16V
2
NP0-C0G 01005
ROOM=NAND
IN
IN
IN
IN
16
8
11 61 71
6
1
C1503
15UF
20%
6.3V
2
X5R 0402-1
ROOM=NAND
PP3V0_NAND
ROOM=NAND
R1520
1 2
MF
ROOM=NAND
R1521
1 2
ROOM=NAND
P3MM-NSM
SM
1
PP
0.00
01005
0.00
01005
1
PP
SM
P3MM-NSM
ROOM=NAND
15
PP1520
SWD_AP_BI_NAND_SWDIO
1/32W0%
SWD_AP_PERIPHERAL_SWCLK
1/32W%0 FM
PP1521
BI
IN
C
9
B
9 33
A
PCIE RECEIVE-SIDE PROBE POINTS
ROOM=NAND
P3MM-NSM
SM
90_PCIE_AP_TO_NAND_REFCLK_P
13 6
90_PCIE_AP_TO_NAND_REFCLK_N
13 6
90_PCIE_AP_TO_NAND_TXD0_P
13 6
90_PCIE_AP_TO_NAND_TXD0_N
13 6
90_PCIE_AP_TO_NAND_TXD1_P
13 6
90_PCIE_AP_TO_NAND_TXD1_N
13 6
1
PP
1
PP
SM
P3MM-NSM
ROOM=NAND
ROOM=NAND
P3MM-NSM
SM
1
PP
1
PP
SM
P3MM-NSM
ROOM=NAND
ROOM=NAND
P3MM-NSM
SM
1
PP
1
PP
SM
P3MM-NSM
ROOM=NAND
PP1500 PP1501
PP1502 PP1503
PP1504 PP1505
1
R1500
34.8
0.5% 1/32W MF 01005
2
ROOM=NAND
13
NAND_AGND
VSSA
B2
VSS
B4
VSS
B6
VSS
OE10
VSS
L3L5L7
G7
VSS
VSS
VSS
VSS
P2P4P6
VSS
VSS
VSS
OC0
VSS
OC10
VSS
OE0
SYNC_MASTER=N/A
PAGE TITLE
NAND
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=N/A
DRAWING NUMBER SIZE
051-00648
REVISION
D
4.0.0
BRANCH
PAGE
15 OF 49
SHEET
13 OF 60
A
8 7 5 4 2 1
36
D
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C
ANTIGUA PMU - Buck Supplies
VCC_MAIN_SNS
10UF
20% VOLTAGE=6.3V CERM-X5R 0402-9
ROOM=PMU
2.2UF
20% VOLTAGE=6.3V X5R-CERM 0201
C2095
10UF
20% VOLTAGE=6.3V CERM-X5R 0402-9
ROOM=SOC
33 26 25 24 22 21 17 15
PP_VCC_MAIN
1
C2085
10UF
20% VOLTAGE=6.3V
2
CERM-X5R 0402-9
ROOM=PMU
1
C2089
2.2UF
20% VOLTAGE=6.3V
2
X5R-CERM 0201
ROOM=PMU
1
C2093
2.2UF
20% VOLTAGE=6.3V
2
X5R-CERM 0201
ROOM=PMU
1
C2086
10UF
20% VOLTAGE=6.3V
2
CERM-X5R 0402-9
ROOM=PMU
1
C2090
2.2UF
20% VOLTAGE=6.3V
2
X5R-CERM 0201
ROOM=PMU
1
C2094
2.2UF
20% VOLTAGE=6.3V
2
X5R-CERM 0201
ROOM=PMU
15
IN
1
2
1
2
1
2
C2087
C2091
ROOM=PMU
1
C2088
10UF
20% VOLTAGE=6.3V
2
CERM-X5R 0402-9
ROOM=PMU
1
C2092
2.2UF
20% VOLTAGE=6.3V
2
X5R-CERM 0201
ROOM=PMU
1
C2099
100PF
5% VOLTAGE=16V
2
NP0-C0G 01005
ROOM=PMU
V3
VDD_MAIN_SNS
R6
F10
L13
VDD_MAIN
L5
R8
L4
A4
B4
C4
A8
B8
C8
A16
B16
C16
A12
B12
C12
J17
J18
J19
T18
T19
V12
Y12
Z12
N17
N18
N19
J1
J2
VDD_BUCK0_01
VDD_BUCK0_23
VDD_BUCK1_01
VDD_BUCK1_23
VDD_BUCK2
VDD_BUCK3
VDD_BUCK4
VDD_BUCK5
VDD_BUCK6
U2000
ANTIGUA-D2255A080
CSP
SYM 2 OF 5
ROOM=PMU
BUCK INPUT BAT/USB
CRITICAL
OMIT_TABLE
BUCK0_LX0
BUCK0_LX1
BUCK0_LX2
BUCK0_LX3
BUCK0_FB
BUCK1_LX0
BUCK1_LX1
BUCK1_LX2
A3
B3
C3
A5
B5
C5
A7
B7
C7
A9
B9
C9
F8
A17
B17
C17
A15
B15
C15
A13
B13
C13
BUCK0_LX0
BUCK0_LX1
BUCK0_LX2
BUCK0_LX3
45_BUCK0_PP_CPU_FB
BUCK1_LX0
BUCK1_LX1
BUCK1_LX2
L2000
1.0UH-20%-3.6A-0.060OHM
1 2
PIQA20161T-SM
ROOM=PMU
CRITICAL
L2001
0.47UH-20%-3.8A-0.048OHM
1 2
PIQA20121T-SM
ROOM=PMU
CRITICAL
L2002
1.0UH-20%-3.6A-0.060OHM
12
PIQA20161T-SM
ROOM=PMU
CRITICAL
L2003
0.47UH-20%-3.8A-0.048OHM
12
PIQA20121T-SM
ROOM=PMU
CRITICAL
L2010
1.0UH-20%-3.6A-0.060OHM
1 2
PIQA20161T-SM
ROOM=PMU
CRITICAL
L2011
0.47UH-20%-3.8A-0.048OHM
1 2
PIQA20121T-SM
ROOM=PMU
CRITICAL
L2012
1.0UH-20%-3.6A-0.060OHM
12
PIQA20161T-SM
ROOM=PMU
CRITICAL
IN
10
1
C2000
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2006
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2012
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2017
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2001
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2007
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2013
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2018
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
345678
2 1
D
1
C2002
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2008
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2014
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2019
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2003
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2009
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2015
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2004
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2010
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2016
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
2X 15UF BULK CAPS
REMOVED FOR N69
1
C2005
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2011
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
PP_CPU
VOLTAGE=1.03V
0.625V/0.9V/1.03V
PP_GPU
VOLTAGE=0.9V
0.70V/0.80V/0.9V
10
12.5A MAX
BUCK0
10
C
10.5A MAX
BUCK1
B
A
BUCK5
1.1A MAX
BUCK6
400mA MAX
BUCK7
1.1A MAX
BUCK8
1.1A MAX
11 7 6
21
11
11
PP_FIXED
VOLTAGE=0.85V
PP1V2_CAMERA
VOLTAGE=1.2V
PP_CPU_SRAM
VOLTAGE=1.0V
0.80V/0.90V/1.0V
PP_GPU_SRAM
VOLTAGE=1.0V
0.80V/0.90V/1.0V
1
C2060
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2050
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2070
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2080
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2061
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2051
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2071
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2081
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
29 28 21 20 13 12 9 8 7 6 5 3
29
19 12
11
1.0UH-20%-3.6A-0.060OHM
1UH-20%-1.2A-0.320OHM
1
C2062
100PF
5%
VOLTAGE=16V
2
NP0-C0G 01005
ROOM=PMU
21
1.0UH-20%-2.25A-0.15OHM
1.0UH-20%-2.25A-0.15OHM
PP1V8
PP1V8_TOUCH PP1V8_IMU_OWL
PP1V1
CRITICAL
L2050
PIQA20161T-SM
ROOM=PMU
XW2050
SHORT-10L-0.1MM-SM
ROOM=PMU
L2060
0603
ROOM=PMU
CRITICAL
IN
45_BUCK6_FB
CRITICAL
L2070
PIXB2016FE-SM
ROOM=PMU
XW2070
SHORT-10L-0.1MM-SM
ROOM=PMU
L2080
PIXB2016FE-SM
ROOM=PMU
CRITICAL
XW2080
SHORT-10L-0.1MM-SM
ROOM=PMU
12
1 2
12
12
1 2
12
1 2
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.1V
BUCK5_LX0
45_BUCK5_FB
BUCK6_LX0
BUCK7_LX0
45_BUCK7_FB
BUCK8_LX0
45_BUCK8_FB
E1
E2
E17
E18
E19
U18
V18
Y18
Z18
U16
U15
V16
Y16
Z16
M17
M18
M19
M13
H1
H2
J5
F1
F2
C1
F17
F18
F19
C19
VDD_BUCK7
VDD_BUCK8
BUCK3_SW1
BUCK3_SW2
BUCK3_SW3
BUCK4_SW1
BUCK5_LX0
BUCK5_FB
BUCK6_LX0
BUCK6_FB
BUCK7_LX0
BUCK7_FB
BUCK8_LX0
BUCK8_FB
BUCK1_LX3
BUCK1_FB
BUCK2_LX0
BUCK2_LX1
BUCK2_FB
BUCK3_LX0
BUCK3_FB
VBUCK3_SW
BUCK4_LX0
BUCK4_LX1
BUCK4_FB
VBUCK4_SW
A11
B11
C11
F12
H17
H18
H19
K17
K18
K19
J14
R18
R19
V19
U17
V17
Y17
Z17
V11
Y11
Z11
V13
Y13
Z13
T9
V15
Y15
Z15
NC
NC
4TH PHASE INDUCTOR
REMOVED FOR N69
NC
45_BUCK1_PP_GPU_FB
BUCK2_LX0
BUCK2_LX1
45_BUCK2_PP_SOC_FB
BUCK3_LX0
CRITICAL
45_BUCK3_FB
BUCK4_LX0
BUCK4_LX1
CRITICAL
45_BUCK4_FB
L2020
1.0UH-20%-3.6A-0.060OHM
1 2
PIQA20161T-SM
ROOM=PMU
CRITICAL
L2021
0.47UH-20%-3.8A-0.048OHM
1 2
PIQA20121T-SM
ROOM=PMU
CRITICAL
L2030
1.0UH-20%-3.6A-0.060OHM
1 2
PIQA20161T-SM
ROOM=PMU
XW2030
SHORT-10L-0.1MM-SM
1 2
ROOM=PMU
L2040
1.0UH-20%-3.6A-0.060OHM
1 2
PIQA20161T-SM
ROOM=PMU
CRITICAL
L2041
0.47UH-20%-3.8A-0.048OHM
1 2
PIQA20121T-SM
ROOM=PMU
XW2040
SHORT-10L-0.1MM-SM
1 2
ROOM=PMU
IN
IN
10
01 61
1
C2022
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2030
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2040
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2023
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2031
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2041
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2024
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2032
100PF
5% VOLTAGE=16V
2
NP0-C0G 01005
ROOM=PMU
1
C2042
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2025
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2043
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2026
15UF
20% VOLTAGE=6.3V
2
X5R 0402-1
ROOM=PMU
1
C2044
100PF
5% VOLTAGE=16V
2
NP0-C0G 01005
ROOM=PMU
PP_SOC
VOLTAGE=0.825V
0.725V/0.825V
PP1V8_SDRAM
VOLTAGE=1.8V
PP1V1_SDRAM
VOLTAGE=1.1V
10
8 21 51 61 71 42 62 03 33
11 21 51
SYNC_MASTER=N/A
PAGE TITLE
SYSTEM POWER:PMU (1/3)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
4.7A MAX
BUCK2
1.5A MAX
BUCK3
4.7A MAX
BUCK4
SYNC_DATE=N/A
DRAWING NUMBER SIZE
051-00648
REVISION
D
4.0.0
BRANCH
PAGE
20 OF 49
SHEET
14 OF 60
B
A
8 7 5 4 2 1
36
345678
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2 1
ANTIGUA LDO SPECS
D
14
OUT
ANTIGUA PMU - LDOs
33 26 25 24 22 21 17 14
VCC_MAIN_SNS
PP_VCC_MAIN
XW2105
SHORT-10L-0.1MM-SM
1 2
ROOM=PMU
1
C2120
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=PMU
1
C2123
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=PMU
1
C2121
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=PMU
1
C2124
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=PMU
1
C2122
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=PMU
1
C2125
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=PMU
LDO#
LDO1 (A)
LDO2 (B) +/-2.5%
LDO3 (A)
LDO4 (D)
LDO5 (F)
LDO6 (C1)
ADJ.RANGE
2.5-3.3V
1.2-1.9V
2.5-3.3V
0.7-1.2V
2.5-3.3V
1.2-3.6V
LDO7 (C) 2.5-3.3V
LDO8 (C)
LDO9 (C)
LDO10 (G) 1335mA
LDO11 (C)
2.5-3.3V
2.5-3.3V
0.7-1.2V
2.5-3.3V
ACCURACY
+/-2.5%
+/-2.5%
+/-2.5%
+/-2.5%
+/-2.5%
+/-25MV
+/-25mV
+/-25mV
+/-2.5%
+/-25mV
MAX.CURRENT
50mA
50mA
50mA
50MA
1000mA
150mA
200MA
200MA
250mA
250mA
D
C
14 12 11
33 30 26 24 17 16 14 12 8
PP1V1_SDRAM
C2130
2.2UF
X5R-CERM
ROOM=PMU
PP1V8_SDRAM
C2132
2.2UF
X5R-CERM
ROOM=PMU
20%
6.3V
0201
20%
6.3V
0201
1
2
1
2
1
2
C2126
10UF
20%
6.3V CERM-X5R 0402-9
ROOM=PMU
C2131
2.2UF
20%
6.3V
X5R-CERM
0201
ROOM=PMU
1
C2127
10UF
20%
6.3V
2
CERM-X5R 0402-9
1
2
ROOM=PMU
M3
V2
M2
U1
U2
L2
Y6
Y4
Y3
Y9
Z9
R3
Y5
Y7
N2
K3
P12
VDD_LDO1_3
VDD_LDO2
VDD_LDO4
VDD_LDO5
VDD_LDO6
VDD_LDO7
VDD_LDO8
VDD_LDO9
VDD_LDO10
VDD_LDO11
VDD_LDO13
VDD_LDO14
VDD_LDO15
VDD_BYPASS
VPP_OTP
U2000
ANTIGUA-D2255A080
CSP
SYM 1 OF 5
ROOM=PMU
LDO INPUT
LDO
CRITICAL
OMIT_TABLE
VLDO1
VLDO2
VLDO3
VLDO4
VLDO5
VLDO6
VBYPASS
VLDO7
VLDO8
VLDO9
VLDO9_FB
VLDO10
VLDO11
VLDO12
VLDO13
VLDO14
VLDO15
M1
V1
L1
N1
T1
T2
K1
K2
Z6
Z4
Z3
Y2
RCAM_AF_FB
Y8
Z8
R2
K6
Z5
Z7
P2
1 2
XW2100
SHORT-10L-0.1MM-SMROOM=PMU
LDO12 (E)
LDO13 (C)
LDO14 (H)
1.8V
2.5-3.3V
0.8-1.5V
LDO15 (B) 1.2-2.0V
VOLTAGE=3.3V
VOLTAGE=1.8V
VOLTAGE=3.0V
VOLTAGE=0.8V
VOLTAGE=3.0V
VOLTAGE=3.3V
VOLTAGE=3.0V
VOLTAGE=3.1V
VOLTAGE=2.5V
VOLTAGE=0.9V
VOLTAGE=3.0V
VOLTAGE=1.8V
VOLTAGE=3.1V
VOLTAGE=1.2V
VOLTAGE=1.9V
PP3V3_USB PP1V8_VA PP3V0_TRISTAR PP0V8_OWL PP3V0_NAND
PP3V3_ACC
PP3V0_PROX_ALS PP3V1_VIBE PP2V5_RCAM_AF
PP0V9_NAND
PP3V0_PROX_IRLED PP1V8_ALWAYS PP3V1_MESA PP1V2 PP1V9_MESA
+/-5%
+/-25mV
+/-2.5%
+/-2.5%
10mA
250mA
250mA
50mA
5
42 52
62 03 13 33
11
13
30
20
32
21
13
20
8 21 71
27
5 6 7
27
LDO1 LDO2 LDO3 LDO4 LDO5
LDO6
LDO7 LDO8 LDO9
LDO10
LDO11 LDO12 LDO13 LDO14 LDO15
C
B
A
D10
D11
D12
D13
D14
D15
D16
D17
D18
D2
D5
D6
D7
D8
D9
D3
E10
E11
E12
E13
D4
E15
E16
E3
E4
E5
E7
E8
E9
F14
F15
F16
F3
F4
G14
G15
G16
G3
G4
H15
H16
H3
H4
U2000
ANTIGUA-D2255A080
CSP
SYM 5 OF 5
ROOM=PMU
CRITICAL
OMIT_TABLE
NC NC
J15
J16
J3
J4
K15
K16
L15
L16
M14
M15
M16
N14
N15
N16
P13
P14
P15
P16
P17
R13
R14
R15
R16
R17
T10
T11
T12
T13
T14
T15
T17
U10
U11
U12
U13
U14
U4
U5
U6
V4
V5
V6
A1
A10
A14
A18
A19
A2
A6
B1
B10
B14
B18
B19
B2
B6
C10
C14
C18
C2
C6
D1
D19
E14
G1
G17
G18
G19
G2
H7
J6
K12
K7
L17
L18
L19
L6
L7
VSS
U2000
ANTIGUA-D2255A080
CSP
SYM 4 OF 5
ROOM=PMU
CRITICAL
OMIT_TABLE
L9
M8
M9
N10
N12
N13
N9
P10
P11
P18
P19
P5
R10
R11
R12
R9
T16
T3
T6
T8
U3
U9
V10
V14
V8
V9
Y1
Y10
Y14
Y19
Z1
Z10
Z14
Z19
Z2
VPUMP
U19
VPUMP:10nF min. @ 4.6V
45_PMU_VSS_RTC
16
NOTE: T3 IS XTAL REF GND
45_PMU_VPUMP
1
C2100
47NF
20%
6.3V
2
X5R-CERM 01005
ROOM=PMU
1
C2101
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=PMU
1
2
1
C2102
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=PMU
C2103
2.2UF
20%
6.3V X5R-CERM 0201
ROOM=PMU
1
C2104
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=PMU
1
2
1
C2106
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=PMU
C2107
2.2UF
20%
6.3V X5R-CERM 0201
ROOM=PMU
1
2
1
C2108
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=PMU
C2109
2.2UF
20%
6.3V X5R-CERM 0201
ROOM=PMU
1
2
1
C2110
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=PMU
C2111
2.2UF
20%
6.3V X5R-CERM 0201
ROOM=PMU
1
2
1
C2112
0.1UF
20%
2
6.3V X5R-CERM 01005
ROOM=SOC
C2113
2.2UF
20%
6.3V X5R-CERM 0201
ROOM=PMU
1
2
1
C2114
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=PMU
C2115
2.2UF
20%
6.3V X5R-CERM 0201
ROOM=PMU
PAGE TITLE
1
C2116
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=PMU
SYSTEM POWER:PMU (2/3)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=N/ASYNC_MASTER=N/A
DRAWING NUMBER SIZE
051-00648
REVISION
D
4.0.0
BRANCH
PAGE
21 OF 49
SHEET
15 OF 60
B
A
8 7 5 4 2 1
36
ANTIGUA PMU - GPIOs, NTCs
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345678
2 1
CONTROL PIN NOTES:
NOTE (1):INPUT PULL-DOWN 100-300k
NOTE (2):INPUT PULL-DOWN 1M
NOTE (3):INPUT PULL-UP OR DOWN 100k-300k
NOTE (4):OUTPUT OPEN-DRAIN, REQUIRES PULL-UP
D
C
9 5 3
17 13 11
OUT
OUT
33 30 26 24 17 15 14 12 8
PP1V8_SDRAM
PMU_TO_SYSTEM_COLD_RESET_L
SYSTEM_ALIVE
1
R2260
100K
5% 1/32W MF 01005
2
ROOM=PMU
1
C2260
1000PF
10%
6.3V
2
X5R-CERM 01005
ROOM=PMU
1
R2261
100K
5% 1/32W MF 01005
2
ROOM=PMU
30 26 9 5
26 16 8
26 8
5
30
8
9
9
11 9
9
33 16
8
OUT
IN
BI
IN
IN
IN
IN
IN
OUT
IN
OUT
9
OUT
OUT
TRISTAR_TO_PMU_HOST_RESET AP_TO_PMU_SOCHOT1_L
OWL_TO_PMU_SHDN
OWL_TO_PMU_SLEEP1_REQUEST PMU_TO_OWL_SLEEP1_READY OWL_TO_PMU_ACTIVE_REQUEST PMU_TO_OWL_ACTIVE_READY
PMU_TO_OWL_CLK32K 45_PMU_TO_WLAN_CLK32K
PMU_TO_AP_IRQ_L
I2C0_AP_SCL I2C0_AP_SDA
NC
P7
RESET_IN1
P8
RESET_IN2
P9
RESET_IN3
K4
RESET*
N8
SHDN
N3
SLEEP1_REQ
N7
SLEEP1_RDY
P3
ACTIVE_REQ
P4
ACTIVE_RDY
T4
SLEEP_32K
R4
OUT_32K
H6
SYS_ALIVE
L3
TMPR_DET
L8
IRQ*
R7
SCL
T7
SDA
CRITICAL
OMIT_TABLE
U2000
ANTIGUA-D2255A080
CSP
SYM 3 OF 5
(3)
(3)
(3)
RESETS
REFS
COMPARATORGPIO
VDROOP_DET
(4)
(1)
(1)
(1)
(4)
(2)
(4)
ROOM=PMU
IREF
VREF
PRE_UVLO
VDROOP
K5
M4
M5
G5
H5
45_PMU_IREFAP_TO_PMU_WDOG_RESET
PMU_VREF
PMU_VDROOP_OUT
PMU_VDROOP_DET_IN
1
C2205
1000PF
10% 10V
2
X5R 01005
ROOM=PMU
R2201
0.00
1 2
ROOM=PMU
R2205
1 2
FM %1
150
ROOM=PMU
NO_XNET_CONNECTION=1
1
C2270
0.22UF
20%
6.3V
2
X5R 0201
ROOM=PMU
1/32W
01005FM %0
1/32W 01005
R2270
200K
1% 1/20W MF 201
ROOM=PMU
PMU_TO_AP_SOCHOT0_L
45_BUCK1_PP_GPU_FB
NOTE:VDROOP_DET R/C Low-pass Fc=1.06MHz
OUT
IN
D
8
01 41
C
B
C2210
100PF
NP0-C0G
01005
ROOM=PMU
C2220
100PF
NP0-C0G
01005
ROOM=PMU
5%
16V
5%
16V
FOREHEAD NTC
1
1
R2210
10KOHM-1%
2
01005 ROOM=PMU
2
REAR CAMERA NTC
1
1
R2220
10KOHM-1%
2
01005 ROOM=PMU
2
RADIO PA NTC
1
FOREHEAD_NTC_RETURN
RCAM_NTC_RETURN
SHORT-10L-0.1MM-SM
ROOM=PMU
SHORT-10L-0.1MM-SM
ROOM=PMU
SHORT-10L-0.1MM-SM
ROOM=PMU
NC
U7
U8
V7
F13
G13
J12
H13
H14
K10
K11
K13
J13
N11
M12
L11
M10
L14
L12
M11
L10
K14
M6
M7
N4
N5
N6
P1
R1
P6
SCLK
MOSI
MISO
AMUX_A0
AMUX_A1
AMUX_A2
AMUX_A3
AMUX_A4
AMUX_A5
AMUX_A6
AMUX_A7
AMUX_AY
AMUX_B0
AMUX_B1
AMUX_B2
AMUX_B3
AMUX_B4
AMUX_B5
AMUX_B6
AMUX_B7
AMUX_BY
TDEV1
TDEV2
TDEV3
TDEV4
TCAL
XTAL1
XTAL2
VDD_RTC
(1)
(1)
PMGR
AMUXNTCXTAL
ADCBUTTONS
BRICK_ID
ADC_IN
BUTTON1
BUTTON2
BUTTON3
BUTTON4
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
T5
TRISTAR_TO_PMU_USB_BRICK_ID
R5
CHESTNUT_TO_PMU_ADCMUX
G6
BUTTON_MENU_KEY_BUFF_L
F6
BUTTON_HOLD_KEY_BUFF_L
E6
BUTTON_RINGER_A
F5
NC
F7
TIGRIS_TO_PMU_INT_L
G7
BB_TO_PMU_HOST_WAKE_L
J7
PMU_TO_BB_PMIC_RESET_R_L
G8
TRISTAR_TO_AP_INT
H8
STOCKHOLM_TO_PMU_HOST_WAKE
J8
PMU_TO_NAND_LOW_BATT_BOOT_L
K8
WLAN_TO_PMU_HOST_WAKE
F9
CODEC_TO_PMU_MIKEY_INT_L
G9
PMU_TO_BT_REG_ON
H9
BT_TO_PMU_HOST_WAKE
J9
PMU_TO_WLAN_REG_ON
G10
NC
H10
PMU_TO_CODEC_DIGLDO_PULLDN
J10
CODEC_TO_AP_PMU_INT_L
F11
PMU_TO_BB_USB_VBUS_DETECT
G11
PMU_TO_STOCKHOLM_EN
H11
WLAN_TO_PMU_PCIE_WAKE_L
K9
NC
J11
PMU_TO_LCM_PANICB
G12
NC
H12
I2C0_AP_SCL
IN
IN
IN
IN
8 9 61
8 9 61
8 61 23
IN
IN
IN
IN
OUT
IN
IN
OUT
IN
OUT
OUT
IN
OUT
OUT
IN
OUT
IN
61 03
1
C2203
1000PF
10%
6.3V
2
X5R-CERM 01005
ROOM=CHESTNUT
BUTTON1 + BUTTON2 ASSERTED FOR >TBD SECONDS CAUSES TWO-FINGER RESET
17
33
8 03
33
13
33
24
33
33
33
24
8 42
33
33
33
28
8 61 62
R2200
1.00K
1 2
5%
1/32W
MF
01005
ROOM=PMU
PMU_TO_BB_PMIC_RESET_L
IN
61 62
OUT
33
B
9
26 9
9
16 9 8
32 16 8
16 9 8
28 26
30 16
26 16
32 8
33 16
32 8
IN
IN
OUT
5
5
3
33
33
33
33
3
45_DWI_PMGR_TO_PMU_SCLK 45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI DWI_PMU_TO_PMGR_MISO
IN
IN
IN
IN
IN
IN
IN
IN
OUT
IN
IN
IN
IN
IN
IN
IN
OUT
AP_TO_PMU_AMUX_OUT BUTTON_MENU_KEY_BUFF_L BUTTON_RINGER_A AP_TO_PMU_TEST_CLKOUT BUTTON_HOLD_KEY_BUFF_L LCM_TO_CHESTNUT_PWR_EN TRISTAR_TO_PMU_USB_BRICK_ID CHESTNUT_TO_PMU_ADCMUX PMU_AMUX_AY
BB_TO_PMU_AMUX_SMPS1
BB_TO_PMU_AMUX_LDO5 BUTTON_VOL_DOWN_L 45_PMU_TO_WLAN_CLK32K BB_TO_PMU_AMUX_LDO11 BUTTON_VOL_UP_L BB_TO_PMU_AMUX_SMPS4 PMU_AMUX_BY
FOREHEAD_NTC REAR_CAMERA_NTC
XW22101 2
RADIO_PA_NTC AP_NTC 45_PMU_TCAL
XW22201 2
45_PMU_XTAL1 45_PMU_XTAL2
XW22301 2
PMU_VDD_RTC
A
C2230
100PF
NP0-C0G
01005
ROOM=PMU
5%
16V
1
2
R2230
10KOHM-1%
01005 ROOM=PMU
2
PA_NTC_RETURN
AP NTC
1
5%
16V
1
2
R2240
10KOHM-1%
01005 ROOM=PMU
2
AP_NTC_RETURN
C2240
100PF
NP0-C0G
01005
ROOM=PMU
NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC
SHORT-10L-0.1MM-SM
ROOM=PMU
1
C2202
XW22401 2
0.22UF
20%
6.3V
2
X5R 0201
ROOM=PMU
CRITICAL
Y2200
1
C2250
100PF
5% 16V
2
NP0-C0G 01005
ROOM=PMU
R2250
3.92K
0.1% 1/20W MF 0201 ROOM=PMU
C2200
18PF
5%
16V
CERM
01005
ROOM=PMU
32.768KHZ-20PPM-12.5PF
1
2
15
1 2
1.60X1.00-SM
ROOM=PMU
45_PMU_VSS_RTC
1
C2201
18PF
5% 16V
2
CERM 01005
ROOM=PMU
XW2200
SHORT-10L-0.1MM-SM
1 2
ROOM=PMU
PAGE TITLE
SYSTEM POWER:PMU (3/3)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=N/ASYNC_MASTER=N/A
DRAWING NUMBER SIZE
051-00648
REVISION
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TIGRIS CHARGER
APN:343S00033
PP_VCC_MAIN
VOLTAGE=4.3V
D
41 51 12 22 42 52 62 33
C
B
16
1
C2330
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=CHARGER
TIGRIS_PMID
OUT
31 30 3
15 12 8
PP5V0_USB TIGRIS_BOOT
PP1V8_ALWAYS
TIGRIS_TO_PMU_INT_L
R2310
100K
5% 1/32W MF 01005
ROOM=CHARGER
1
C2310
4.2UF
10% 16V
2
X5R-CERM 0402-1
ROOM=CHARGER
R2311
100
1 2
1%
1/32W
MF
01005
ROOM=CHARGER
1
C2320
4.2UF
10% 16V
2
X5R-CERM 0402-1
ROOM=CHARGER
1
C2311
100PF
5% 35V
2
NP0-C0G 01005
ROOM=CHARGER
1
C2321
4.2UF
10% 16V
2
X5R-CERM 0402-1
ROOM=CHARGER
30 25 8
30 25 8
30
BI
IN
16 13 11
IN
1
C2322
100PF
5% 35V
2
NP0-C0G 01005
ROOM=CHARGER
I2C1_AP_SDA I2C1_AP_SCL
SYSTEM_ALIVE
TRISTAR_TO_TIGRIS_VBUS_OFF
TIGRIS_TO_PMU_INT_R_L
TIGRIS_VBUS_DETECT
F5
PMID
A5
VBUS
B5
VBUS
D5
VBUS
C5
VBUS
E5
VBUS
G3
SDA
E4
SCL
E3
SYS_ALIVE
F4
VBUS_OVP_OFF
G2
INT
F1
VBUS_DET
F3
TEST
A2B2D2
VDD_MAIN
U2300
SN2400AB0
WCSP
ROOM=CHARGER
CRITICAL
PGND
C2
VDD_MAIN
VDD_MAIN
VDD_MAIN
PGND
PGND
PGND
LDO
BOOT
BUCK_SW
BUCK_SW
BUCK_SW
BUCK_SW
BAT
BAT
BAT
BAT
BAT_SNS
ACT_DIODE
HDQ_HOST
HDQ_GAUGE
G4
G5
A4
B4
D4
C4
A1
B1
D1
C1
E1
E2
G1
F2
R2320
30.1K
5
OUT
USB_VBUS_DETECT
1 2
1%
1/32W
MF
01005
ROOM=CHARGER
A3
B3
D3
C3
1
C2331
10UF
20%
6.3V
2
CERM-X5R 0402-9
ROOM=CHARGER
TIGRIS_LDO
1
C2307
100PF
5% 16V
2
NP0-C0G 01005
TIGRIS_BUCK_LX
VBATT_SENSE
TIGRIS_ACTIVE_DIODE
SWI_AP_BI_TIGRIS
TIGRIS_TO_BATTERY_SWI_1V8
ROOM=CHARGER
C2300
0.047UF
1 2
10% 16V X5R
0201
ROOM=CHARGER
1
C2305
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=CHARGER
IN
BI
17
CRITICAL
L2300
1.0UH-20%-3.6A-0.060OHM
1 2
PIQA20161T-SM
ROOM=CHARGER
ROOM=CHARGER
18
8 9
C2301
100PF
5%
16V
NP0-C0G
01005
1
2
C2302
100PF
NP0-C0G
ROOM=CHARGER
01005
1
5%
16V
2
NOSTUFF
R2300
100K
1/32W
01005
ROOM=CHARGER
5%
MF
1
C2306
100PF
5% 16V
2
NP0-C0G 01005
ROOM=CHARGER
1
C2303
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=CHARGER
A2A3B1B2B3
A1
G
C1C2C3
1
C2304
2.2UF
20%
6.3V
2
X5R-CERM 0201
ROOM=CHARGER
C
CRITICAL
S
Q2300
CSD68827W
BGA
ROOM=CHARGER
D
PP_BATT_VCC
3 81 33
B
A
18
BI
33 30 26 24 16 15 14 12 8
PP1V8_SDRAM
R2302
40.2K
1% 1/32W MF 01005
R2303
100
R2301
0.00
1 2
MF 0%
NOSTUFF
3
D
1/32W
01005
1 2
5%
1/32W
MF
01005
ROOM=CHARGER
TIGRIS_TO_BATTERY_SWI_1V8TIGRIS_TO_BATTERY_SWI_1V8_RTIGRIS_TO_BATTERY_SWI
17
Q2301
G
2
S
1
DMN2990UFA
DFN0806
SYNC_MASTER=N/A SYNC_DATE=N/A
PAGE TITLE
SYSTEM POWER:CHARGER
DRAWING NUMBER SIZE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
051-00648
REVISION
4.0.0
BRANCH
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23 OF 49
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C
17
BI
BATTERY CONNECTOR
FL2400
120-OHM-210MA
TIGRIS_TO_BATTERY_SWI TIGRIS_BATTERY_SWI_CONN
1 2
01005
ROOM=BATTERY_B2B
1
C2400
56PF
5% 16V
2
NP0-C0G 01005
ROOM=BATTERY_B2B
THIS ONE ON MLB --->
CRITICAL
ROOM=BATTERY_B2B
RCPT-BATT-2BLADES
J2400
F-ST-SM
7 8
1
4
9 10
11
5
23
6
12
516S00104 (RCPT)
516S00105 (PLUG)
1
C2414
27PF
5% 16V
2
NP0-C0G 01005
ROOM=BATTERY_B2B
XW2400
SHORT-10L-0.25MM-SM
1 2
ROOM=BATTERY_B2B
1
C2413
56PF
5% 16V
2
NP0-C0G 01005
ROOM=BATTERY_B2B
1
C2410
56PF
5% 16V
2
NP0-C0G 01005
ROOM=BATTERY_B2B
1
C2411
100PF
5% 16V
2
NP0-C0G 01005
ROOM=BATTERY_B2B
1
C2412
220PF
10% 10V
2
X7R-CERM 01005
ROOM=BATTERY_B2B
PP_BATT_VCC
VOLTAGE=4.3V
VBATT_SENSE
3 71 33
OUT
C
17
B
B
A
PAGE TITLE
SYSTEM POWER:BATTERY CONN
DRAWING NUMBER SIZE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
8 7 5 4 2 1
36
REVISION
BRANCH
PAGE
SHEET
SYNC_DATE=N/ASYNC_MASTER=N/A
051-00648
4.0.0
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