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Evaluation Board for the AD5246 Digital Potentiometer
FEATURES
Full-featured board in conjunction with low voltage digiPOT
motherboard (EVAL-MB-LV-SDZ)
Various test circuits
Various ac/dc input signals
PC control via a separately purchased system demonstration
platform (SDP-B or SDP-S)
PC software for control
PACKAGE CONTENTS
EVAL-AD5246DBZ
EVAL-MB-LV-SDZ motherboard
CD that includes
Self-installing software that allows users to control the
board and exercise all functions of the device
Electronic version of the AD5246 data sheet
Electronic version of the UG-396 user guide
EVAL-AD5246DBZ WITH MOTHERBOARD AND SDP-B
GENERAL DESCRIPTION
This user guide describes the evaluation board for evaluating the
AD5246, a single channel, 128-position, digital potentiometer.
The AD5246 supports a single-supply 2.7 V to 5.5 V operation,
making the device suited for battery-powered applications and
many other applications with a superior low temperature
coefficient performance.
In addition, the AD5246 uses a versatile I
operates in fast mode, allowing speeds of up to 400 kHz.
The E VA L -AD5246DBZ and E VA L -MB-LV-SDZ can operate in
single-supply mode and incorporate an internal power supply
from the USB.
Complete specifications for the AD5246 part can be found in
the AD5246 data sheet, which is available from Analog Devices,
Inc., and should be consulted in conjunction with this user
guide when using the evaluation board.
2
C serial interface that
Figure 1. Digital Picture of Evaluation Board with Low Voltage digiPOT Motherboard and System Demonstration Platform
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. 0 | Page 1 of 16
UG-396 Evaluation Board User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Ordering Information .................................................................... 15
Bill of Materials ........................................................................... 15
Rev. 0 | Page 2 of 16
Evaluation Board User Guide UG-396
J1-1
EXT VDD
Analog positive power supply, VDD;
EVALUATION BOARD HARDWARE
POWER SUPPLIES
The EVAL-MB-LV-SDZ supports using single power supplies.
The evaluation board can be powered either from the SDP port
or externally by the J1 and J2 connectors as described in Table 1.
All supplies are decoupled to ground using 10 µF tantalum and
0.1 µF ceramic capacitors.
Table 1. Maximum and Minimum Voltages of the Connectors
Connector No. Label Voltage
from 2.7 V to 5.5 V.
J1-2 GND Analog ground.
J2-1 VLOGIC Digital supply, from 2.7 V to VDD.
J2-2 DGND Digital ground.
Table 3. Link Functions
Link No. Power Supply Options
A11 VDD This link selects one of the following as the positive power supply:
5 V (from SDP). It is not recommended to power the board with this supply due to SDP voltage limitations.
3.3 V (from SDP).
VDD (external supply from the J1 connector).
A5 V
A12 GND AGND.
This link selects one of the following as the digital supply:
LOGIC
3.3 V (from SDP).
VLOGIC EXT (external supply from the J2 connector).
LINK OPTIONS
Several link and switch options are incorporated in the EVALMB-LV-SDZ evaluation board and should be set up before
using the board. Tab le 2 describes the positions of the links to
control the evaluation board by a PC, via the SDP board. The
functions of these link options are described in detail in Table 3
through Tab le 5.
Table 2. Link Options Setup for SDP Control (Default)
Link No. Option
A11 3.3 V
A12 AGND
A5 3.3 V
Rev. 0 | Page 3 of 16
UG-396 Evaluation Board User Guide
V
V
A
TEST CIRCUITS
The EVAL-AD5246DBZ and EVAL-MB-LV-SDZ incorporate
several test circuits to evaluate the AD5246 performance.
Antilogarithmic DAC
RDAC can be operated as a antilogarithmic DAC, as shown in
Figure 2. R35 should be replaced from the populated value of
0 Ω to the suggested value of 1.5 kΩ.
– V
DD
2
– V
DD
2
The output voltage plot is shown in Figure 3. The output voltage
is relative to V
1.0
0.8
0.6
0.4
TIVE OUTPUT VOLTAGE
REL
0.2
0
AC+
SS
VDD
V
DD
SS
RDAC
BIAS
AGND
R34
A1
W1
A
W
B
R35
BUF-W1
B1
–
+
EXTERNAL
CONNECTION
VOUT1
10624-002
Figure 2. DAC
and VB.
A
0 20406080100120
DECIMAL CO DE
Figure 3. Antilogarithmic Gain
10624-003
Table 4 shows the options available for the voltage references.
Table 4. DAC Voltage References
Link
Terminal
(DB1)
B A2-B A9 AC+
Link
(MB2) Options Description
Connects
Terminal A1 to
/2
V
DD
VDD
Connects
Terminal A1 to
V
DD
W A3-B BUF-W1
Connects
Terminal W1
to an output
buffer
R35 A10 BIAS
Connects
Terminal B1 to
/2
V
DD
AGND
Connects
Terminal B1 to
analog
ground
1
Daughter board
2
Motherboard
A1
inserted
The output voltage is defined in Equation 1.
R
VVV
)( (1)
B
OUT
R
WB
A
RDAC
128
35
RR
35
WB
k10
where:
RDAC is code loaded in the RDAC register.
V
is the voltage applied to the A terminal (A9 link).
A
V
is the voltage applied to the B terminal (A10 link).
B
However, by using the R34 external resistor, the user can reduce
the voltage of the voltage reference. In this case, use the A1 test
point to measure the voltage applied to the A terminal and
recalculate V
in Equation 1.
A
Rev. 0 | Page 4 of 16
Evaluation Board User Guide UG-396
Signal Amplifier
RDAC can be operated as an inverting or noninverting signal
amplifier supporting linear or pseudo logarithmic gains. Table 5
shows the available configurations.
The noninverting amplifier with linear gain is shown in Figure 4,
and the gain is defined in Equation 3.
R
WB
(2)
1
R38
is the resistor between the W and B terminals.
R41
1.7kΩ
W2
V
IN
R38
2.7kΩ
RDAC
+
–
C1
10nF
W
B2
B
R42
VOUT2
10624-004
where
G
R
WB
Figure 4. Linear Noninverting Amplifier
Table 5. Amplifier Selection Link Options
Amplifier Gain Link(DB1) Link (MB2) Label V
Noninverting Linear A2 = A3-A A7 LIN 0 V to VDD
A6 N-INV
A1 not inserted A8 N-INV
Inverting Linear A2 = A3-A A7 LIN −VDD to 0 V
A6 INV
A1 not inserted
1
Daughter board.
2
Motherboard.
The inverting amplifier with linear gain is shown in Figure 5,
and the gain is defined in Equation 5.
Note that the input signal, V
R
WB
(3)
R38
is the resistor between the W and B terminals.
V
IN
W2
R38
2.7kΩ
Figure 5. Linear Inverting Amplifier
where
G
R
WB
, must be negative.
IN
R41
1.7kΩ
+
–
W
B2
B
RDAC
C1
10nF
R42
VOUT2
10624-005
Range
IN
A8 INV
Rev. 0 | Page 5 of 16
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