ANALOG DEVICES UG-192 Service Manual

Evaluation Board User Guide
One Technology Way P. O . Box 9106 Norwood, MA 02062-9106, U.S.A. Tel : 781.329.4700 Fax : 781.461.3113 www.analog.com
UG-192
Evaluation Board for SSM2317 Filterless Class-D Audio Amplifier

PACKAGE CONTENTS

SSM2317-EVALZ

OTHER SUPPORTING DOCUMENTATION

SSM2317 data sheet

GENERAL DESCRIPTION

The SSM2317 is a fully integrated, single-chip, mono Class-D audio amplifier that is designed to maximize performance for mobile phone applications. The application circuit requires a minimum of exter­nal components and operates from a single 2.5 V to 5.5 V supply. It is capable of delivering 3 W of continuous output power with less than 1% THD + N driving a 3  load from a single 5.0 V supply.
The SSM2317 is equipped with a differential mode input port and a high efficiency, full H-bridge at the output that enables direct coupling of the audio power signal to the loudspeaker. The differential mode input stage allows for cancelling of common-mode noise.
Automatic level control (ALC) can be activated to suppress clipping and improve dynamic range. This feature only requires one external resistor tied to GND via the VTH pin and an activation voltage on the ALC_EN pin. For setup configuration and sync operation, see the SSM2317 data sheet.
The part also features a high efficiency, low noise output modulation scheme that does not require external LC output filters when attached to an inductive load. The modulation provides high efficiency even at low output power. Filterless operation also helps to decrease distortion due to the nonlinearities of output LC filters.
This user guide describes how to configure and use the SSM2317 evaluation board to evaluate the SSM2317. It is recommended that this data sheet be read in conjunction with the SSM2317 data sheet, which provides more detailed information about the specifications, internal block diagrams, and application guidance for the amplifier IC.

EVALUATION BOARD OVERVIEW

The SSM2317 evaluation board carries a complete application circuit for driving a loudspeaker. Figure 1 shows the top view of the evaluation board, and Figure 2 shows the bottom view.
Figure 1. SSM2317 Evaluation Board Top View
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS.
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Figure 2. SSM2317 Evaluation Board Bottom View
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UG-192 Evaluation Board User Guide

TABLE OF CONTENTS

Package Contents.............................................................................. 1
Other Supporting Documentation................................................. 1
General Description ......................................................................... 1
Evaluation Board Overview ............................................................1
Revision History ............................................................................... 2
Setting Up the Evaluation Board .................................................... 3
Input Configuration..................................................................... 3
Operation Mode Configuration ................................................. 3

REVISION HISTORY

10/10—Revision 0: Initial Version
Output Configuration...................................................................3
Power Supply Configuration .......................................................3
Component Selection ...................................................................3
Getting Started...............................................................................4
What to Test...................................................................................4
Evaluation Board Schematic and Artwork.....................................5
Ordering Information.......................................................................8
Bill of Materials..............................................................................8
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Evaluation Board User Guide UG-192
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SETTING UP THE EVALUATION BOARD

INPUT CONFIGURATION

A 4-pin header (J1) on the middle left side of the board feeds the audio signal into the board (see Figure 1). If the input audio signal is differential (IN+ and IN−), three pins of J1 are used for IN+, IN−, and signal ground. For a single-ended audio input, only two pins of J1 are used. One is for the signal ground and the other is for either IN+ or IN−. If IN+ is used, place a jumper between Pin 3 and Pin 4 of J1, shorting IN− to ground. If IN− is used, place the jumper between Pin 1 and Pin 2 of J1, connecting IN+ to ground.

OPERATION MODE CONFIGURATION

The 6-pin header, J2, is used to turn on/off the SSM2317 amp­lifier and configure the ALC operation modes. Placing a jumper across Pin 1 and Pin 2 of J2 shuts down the SSM2317 so that only a minimum current (about 20 nA) is drawn from the power supply (when R3 is shorted). Removing the jumper puts the SSM2317 in normal operation. Placing a jumper across Pin 3 and Pin 4 of J2 disables ALC mode, while removing the jumper activates ALC mode. When ALC is disabled, the SSM2317 behaves like a tradi­tional amplifier with a fixed 18 dB. Placing a jumper across Pin 5 and Pin 6 of J2 shorts across the ALC threshold resistor (on board) and sets a maximum limiter level of 90% of V
(when
DD
ALC is activated).

OUTPUT CONFIGURATION

The output connector, J4, is located on the right side of the board (see Figure 1). J4 drives a loudspeaker whose impedance should be no less than 3 .
Although the SSM2317 does not require any external LC output filters due to a low noise modulation scheme, if the speaker length is >10 cm, it is recommended to put a ferrite bead (L1 and L2) near each output pin of the SSM2317 to reduce electromagnetic interfer­ence (EMI), as shown in the schematic in Figure 3. Some users may want to replace the ferrite beads with these inductors to evaluate applications with specific EMI vs. audio performance constraints. As an aid, a properly tuned ferrite bead-based EMI filter is assembled at the output terminals of the device.
For optimal performance, as specified in the SSM2317 data sheet (in particular, for THD and SNR), remove the entire EMI filter, short across the ferrite bead terminals, and open the capacitor terminals.

POWER SUPPLY CONFIGURATION

The evaluation board schematic is shown in Figure 3. The 2-pin header, J3, must be used to power the board. Care must be taken to connect the dc power with correct polarity and voltage. The positive voltage terminal of J3 (VDD) is indicated with an arrow in Figure 1.

Polarity and Voltage

The wrong power supply polarity or an overvoltage may damage the board permanently. The maximum peak current is approxi­mately 0.33 A when driving an 8 Ω load and when the input voltage is 5 V.

COMPONENT SELECTION

Selecting the proper components is the key to achieving the performance required at the cost budgeted.

ALC Threshold Setting Resistor—R5

When ALC mode is active, the maximum output amplitude threshold (V from 90% to 45% of V between the VTH pin and GND. Shorting the VTH pin to GND sets V
TH
V
to 45% of VDD. The relation of RTH to VTH is shown by the
TH
following equation:
V ×
TH
Maximum output power is derived from V equation:
P
OUT
R
where
To tune a variety of V the evaluation board. To measure the potentiometer resistance set­ting, insert an ohmmeter across Pin 5 and Pin 6 of J2.
Note that measuring the resistance across the potentiometer is not adequate to determine the actual R internal input resistance of 50 k at the VTH pin. The user must take into account the internal resistance while evaluating actual R
. For example, after tuning R5 to a desirable level, the user
TH
measures the resistance from Pin 5 and Pin 6 of J2. Then, to infer the actual R
where:
R
Threshold
to GND.
R
Measured
) during the limiting operation can be adjusted
TH
by inserting an external resistor, RTH,
DD
to 90% of VDD. Leaving the VTH pin unconnected sets
R
k50
TH
×=
9.0
V
TH
2
=
R
SP
is the speaker impedance.
SP
, use this simple calculation:
TH
RR
2k50
2
⎞ ⎟
levels, a potentiometer, R5, is mounted on
TH
=
MeasuredThreshold
V
DD
R
×+
TH
by the following
TH
value. This is due to the
TH
111
k50
is the desired external resistor value from the VTH pin
is the measured resistance from the VTH pin to GND.
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